diff options
author | Paul Mackerras <paulus@samba.org> | 2006-06-12 03:53:34 -0400 |
---|---|---|
committer | Paul Mackerras <paulus@samba.org> | 2006-06-12 03:53:34 -0400 |
commit | 7a0c58d0513c246ac5438ef4a55ce8b93395ae0e (patch) | |
tree | d18f58349ced242aa62e622e381e60933f71d451 /include | |
parent | 6218a761bbc27acc65248c80024875bcc06d52b1 (diff) | |
parent | 289a1e995e74734b5ec76ca8a5490058f4fecc24 (diff) |
Merge branch 'merge'
Diffstat (limited to 'include')
-rw-r--r-- | include/asm-alpha/smp.h | 4 | ||||
-rw-r--r-- | include/asm-arm/arch-ixp23xx/memory.h | 2 | ||||
-rw-r--r-- | include/asm-arm/arch-l7200/serial_l7200.h | 2 | ||||
-rw-r--r-- | include/asm-arm/arch-l7200/uncompress.h | 2 | ||||
-rw-r--r-- | include/asm-generic/pgtable.h | 11 | ||||
-rw-r--r-- | include/asm-mips/addrspace.h | 1 | ||||
-rw-r--r-- | include/asm-mips/delay.h | 22 | ||||
-rw-r--r-- | include/asm-mips/page.h | 2 | ||||
-rw-r--r-- | include/asm-mips/pgtable-32.h | 61 | ||||
-rw-r--r-- | include/asm-mips/pgtable-64.h | 13 | ||||
-rw-r--r-- | include/asm-mips/pgtable.h | 15 | ||||
-rw-r--r-- | include/asm-mips/smp.h | 5 | ||||
-rw-r--r-- | include/asm-mips/sparsemem.h | 14 | ||||
-rw-r--r-- | include/asm-s390/futex.h | 15 | ||||
-rw-r--r-- | include/asm-s390/lowcore.h | 4 | ||||
-rw-r--r-- | include/asm-sparc64/pgtable.h | 17 | ||||
-rw-r--r-- | include/asm-um/irqflags.h | 6 | ||||
-rw-r--r-- | include/asm-um/uaccess.h | 6 | ||||
-rw-r--r-- | include/linux/elevator.h | 2 | ||||
-rw-r--r-- | include/linux/i2o.h | 5 | ||||
-rw-r--r-- | include/linux/m48t86.h | 4 | ||||
-rw-r--r-- | include/linux/mempolicy.h | 1 | ||||
-rw-r--r-- | include/linux/mmzone.h | 1 | ||||
-rw-r--r-- | include/linux/pci-acpi.h | 2 |
24 files changed, 139 insertions, 78 deletions
diff --git a/include/asm-alpha/smp.h b/include/asm-alpha/smp.h index 9950706abdf8..e1432102be05 100644 --- a/include/asm-alpha/smp.h +++ b/include/asm-alpha/smp.h | |||
@@ -45,10 +45,8 @@ extern struct cpuinfo_alpha cpu_data[NR_CPUS]; | |||
45 | #define hard_smp_processor_id() __hard_smp_processor_id() | 45 | #define hard_smp_processor_id() __hard_smp_processor_id() |
46 | #define raw_smp_processor_id() (current_thread_info()->cpu) | 46 | #define raw_smp_processor_id() (current_thread_info()->cpu) |
47 | 47 | ||
48 | extern cpumask_t cpu_present_mask; | ||
49 | extern cpumask_t cpu_online_map; | ||
50 | extern int smp_num_cpus; | 48 | extern int smp_num_cpus; |
51 | #define cpu_possible_map cpu_present_mask | 49 | #define cpu_possible_map cpu_present_map |
52 | 50 | ||
53 | int smp_call_function_on_cpu(void (*func) (void *info), void *info,int retry, int wait, cpumask_t cpu); | 51 | int smp_call_function_on_cpu(void (*func) (void *info), void *info,int retry, int wait, cpumask_t cpu); |
54 | 52 | ||
diff --git a/include/asm-arm/arch-ixp23xx/memory.h b/include/asm-arm/arch-ixp23xx/memory.h index 6e19f46d54d1..c85fc06a043c 100644 --- a/include/asm-arm/arch-ixp23xx/memory.h +++ b/include/asm-arm/arch-ixp23xx/memory.h | |||
@@ -49,7 +49,7 @@ static inline int __ixp23xx_arch_is_coherent(void) | |||
49 | { | 49 | { |
50 | extern unsigned int processor_id; | 50 | extern unsigned int processor_id; |
51 | 51 | ||
52 | if (((processor_id & 15) >= 2) || machine_is_roadrunner()) | 52 | if (((processor_id & 15) >= 4) || machine_is_roadrunner()) |
53 | return 1; | 53 | return 1; |
54 | 54 | ||
55 | return 0; | 55 | return 0; |
diff --git a/include/asm-arm/arch-l7200/serial_l7200.h b/include/asm-arm/arch-l7200/serial_l7200.h index 238c595d97ea..b1008a9d23e5 100644 --- a/include/asm-arm/arch-l7200/serial_l7200.h +++ b/include/asm-arm/arch-l7200/serial_l7200.h | |||
@@ -28,7 +28,7 @@ | |||
28 | #define UARTDR 0x00 /* Tx/Rx data */ | 28 | #define UARTDR 0x00 /* Tx/Rx data */ |
29 | #define RXSTAT 0x04 /* Rx status */ | 29 | #define RXSTAT 0x04 /* Rx status */ |
30 | #define H_UBRLCR 0x08 /* mode register high */ | 30 | #define H_UBRLCR 0x08 /* mode register high */ |
31 | #define M_UBRLCR 0x0C /* mode reg mid (MSB of buad)*/ | 31 | #define M_UBRLCR 0x0C /* mode reg mid (MSB of baud)*/ |
32 | #define L_UBRLCR 0x10 /* mode reg low (LSB of baud)*/ | 32 | #define L_UBRLCR 0x10 /* mode reg low (LSB of baud)*/ |
33 | #define UARTCON 0x14 /* control register */ | 33 | #define UARTCON 0x14 /* control register */ |
34 | #define UARTFLG 0x18 /* flag register */ | 34 | #define UARTFLG 0x18 /* flag register */ |
diff --git a/include/asm-arm/arch-l7200/uncompress.h b/include/asm-arm/arch-l7200/uncompress.h index 9fcd40aee3e3..04be2a088639 100644 --- a/include/asm-arm/arch-l7200/uncompress.h +++ b/include/asm-arm/arch-l7200/uncompress.h | |||
@@ -6,7 +6,7 @@ | |||
6 | * Changelog: | 6 | * Changelog: |
7 | * 05-01-2000 SJH Created | 7 | * 05-01-2000 SJH Created |
8 | * 05-13-2000 SJH Filled in function bodies | 8 | * 05-13-2000 SJH Filled in function bodies |
9 | * 07-26-2000 SJH Removed hard coded buad rate | 9 | * 07-26-2000 SJH Removed hard coded baud rate |
10 | */ | 10 | */ |
11 | 11 | ||
12 | #include <asm/hardware.h> | 12 | #include <asm/hardware.h> |
diff --git a/include/asm-generic/pgtable.h b/include/asm-generic/pgtable.h index 358e4d309ceb..c2059a3a0621 100644 --- a/include/asm-generic/pgtable.h +++ b/include/asm-generic/pgtable.h | |||
@@ -159,17 +159,8 @@ static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addres | |||
159 | #define lazy_mmu_prot_update(pte) do { } while (0) | 159 | #define lazy_mmu_prot_update(pte) do { } while (0) |
160 | #endif | 160 | #endif |
161 | 161 | ||
162 | #ifndef __HAVE_ARCH_MULTIPLE_ZERO_PAGE | 162 | #ifndef __HAVE_ARCH_MOVE_PTE |
163 | #define move_pte(pte, prot, old_addr, new_addr) (pte) | 163 | #define move_pte(pte, prot, old_addr, new_addr) (pte) |
164 | #else | ||
165 | #define move_pte(pte, prot, old_addr, new_addr) \ | ||
166 | ({ \ | ||
167 | pte_t newpte = (pte); \ | ||
168 | if (pte_present(pte) && pfn_valid(pte_pfn(pte)) && \ | ||
169 | pte_page(pte) == ZERO_PAGE(old_addr)) \ | ||
170 | newpte = mk_pte(ZERO_PAGE(new_addr), (prot)); \ | ||
171 | newpte; \ | ||
172 | }) | ||
173 | #endif | 164 | #endif |
174 | 165 | ||
175 | /* | 166 | /* |
diff --git a/include/asm-mips/addrspace.h b/include/asm-mips/addrspace.h index 42520cc84b0f..1386af1cb7d9 100644 --- a/include/asm-mips/addrspace.h +++ b/include/asm-mips/addrspace.h | |||
@@ -129,6 +129,7 @@ | |||
129 | #if defined (CONFIG_CPU_R4300) \ | 129 | #if defined (CONFIG_CPU_R4300) \ |
130 | || defined (CONFIG_CPU_R4X00) \ | 130 | || defined (CONFIG_CPU_R4X00) \ |
131 | || defined (CONFIG_CPU_R5000) \ | 131 | || defined (CONFIG_CPU_R5000) \ |
132 | || defined (CONFIG_CPU_RM7000) \ | ||
132 | || defined (CONFIG_CPU_NEVADA) \ | 133 | || defined (CONFIG_CPU_NEVADA) \ |
133 | || defined (CONFIG_CPU_TX49XX) \ | 134 | || defined (CONFIG_CPU_TX49XX) \ |
134 | || defined (CONFIG_CPU_MIPS64) | 135 | || defined (CONFIG_CPU_MIPS64) |
diff --git a/include/asm-mips/delay.h b/include/asm-mips/delay.h index 64dd45150f64..928f30f8c45c 100644 --- a/include/asm-mips/delay.h +++ b/include/asm-mips/delay.h | |||
@@ -19,20 +19,22 @@ static inline void __delay(unsigned long loops) | |||
19 | { | 19 | { |
20 | if (sizeof(long) == 4) | 20 | if (sizeof(long) == 4) |
21 | __asm__ __volatile__ ( | 21 | __asm__ __volatile__ ( |
22 | ".set\tnoreorder\n" | 22 | " .set noreorder \n" |
23 | "1:\tbnez\t%0,1b\n\t" | 23 | " .align 3 \n" |
24 | "subu\t%0,1\n\t" | 24 | "1: bnez %0, 1b \n" |
25 | ".set\treorder" | 25 | " subu %0, 1 \n" |
26 | " .set reorder \n" | ||
26 | : "=r" (loops) | 27 | : "=r" (loops) |
27 | : "0" (loops)); | 28 | : "0" (loops)); |
28 | else if (sizeof(long) == 8) | 29 | else if (sizeof(long) == 8) |
29 | __asm__ __volatile__ ( | 30 | __asm__ __volatile__ ( |
30 | ".set\tnoreorder\n" | 31 | " .set noreorder \n" |
31 | "1:\tbnez\t%0,1b\n\t" | 32 | " .align 3 \n" |
32 | "dsubu\t%0,1\n\t" | 33 | "1: bnez %0, 1b \n" |
33 | ".set\treorder" | 34 | " dsubu %0, 1 \n" |
34 | :"=r" (loops) | 35 | " .set reorder \n" |
35 | :"0" (loops)); | 36 | : "=r" (loops) |
37 | : "0" (loops)); | ||
36 | } | 38 | } |
37 | 39 | ||
38 | 40 | ||
diff --git a/include/asm-mips/page.h b/include/asm-mips/page.h index a1eab136ff6c..4035ec79ecd4 100644 --- a/include/asm-mips/page.h +++ b/include/asm-mips/page.h | |||
@@ -139,9 +139,11 @@ typedef struct { unsigned long pgprot; } pgprot_t; | |||
139 | 139 | ||
140 | #define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT) | 140 | #define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT) |
141 | 141 | ||
142 | #ifndef CONFIG_SPARSEMEM | ||
142 | #ifndef CONFIG_NEED_MULTIPLE_NODES | 143 | #ifndef CONFIG_NEED_MULTIPLE_NODES |
143 | #define pfn_valid(pfn) ((pfn) < max_mapnr) | 144 | #define pfn_valid(pfn) ((pfn) < max_mapnr) |
144 | #endif | 145 | #endif |
146 | #endif | ||
145 | 147 | ||
146 | #define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT) | 148 | #define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT) |
147 | #define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT) | 149 | #define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT) |
diff --git a/include/asm-mips/pgtable-32.h b/include/asm-mips/pgtable-32.h index 4d6bc45df594..087c20769256 100644 --- a/include/asm-mips/pgtable-32.h +++ b/include/asm-mips/pgtable-32.h | |||
@@ -177,48 +177,67 @@ pfn_pte(unsigned long pfn, pgprot_t prot) | |||
177 | ((swp_entry_t) { ((type) << 10) | ((offset) << 15) }) | 177 | ((swp_entry_t) { ((type) << 10) | ((offset) << 15) }) |
178 | 178 | ||
179 | /* | 179 | /* |
180 | * Bits 0, 1, 2, 9 and 10 are taken, split up the 27 bits of offset | 180 | * Bits 0, 4, 8, and 9 are taken, split up 28 bits of offset into this range: |
181 | * into this range: | ||
182 | */ | 181 | */ |
183 | #define PTE_FILE_MAX_BITS 27 | 182 | #define PTE_FILE_MAX_BITS 28 |
184 | 183 | ||
185 | #define pte_to_pgoff(_pte) \ | 184 | #define pte_to_pgoff(_pte) ((((_pte).pte >> 1 ) & 0x07) | \ |
186 | ((((_pte).pte >> 3) & 0x3f ) + (((_pte).pte >> 11) << 8 )) | 185 | (((_pte).pte >> 2 ) & 0x38) | \ |
186 | (((_pte).pte >> 10) << 6 )) | ||
187 | 187 | ||
188 | #define pgoff_to_pte(off) \ | 188 | #define pgoff_to_pte(off) ((pte_t) { (((off) & 0x07) << 1 ) | \ |
189 | ((pte_t) { (((off) & 0x3f) << 3) + (((off) >> 8) << 11) + _PAGE_FILE }) | 189 | (((off) & 0x38) << 2 ) | \ |
190 | (((off) >> 6 ) << 10) | \ | ||
191 | _PAGE_FILE }) | ||
190 | 192 | ||
191 | #else | 193 | #else |
192 | 194 | ||
193 | /* Swap entries must have VALID and GLOBAL bits cleared. */ | 195 | /* Swap entries must have VALID and GLOBAL bits cleared. */ |
196 | #if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32) | ||
197 | #define __swp_type(x) (((x).val >> 2) & 0x1f) | ||
198 | #define __swp_offset(x) ((x).val >> 7) | ||
199 | #define __swp_entry(type,offset) \ | ||
200 | ((swp_entry_t) { ((type) << 2) | ((offset) << 7) }) | ||
201 | #else | ||
194 | #define __swp_type(x) (((x).val >> 8) & 0x1f) | 202 | #define __swp_type(x) (((x).val >> 8) & 0x1f) |
195 | #define __swp_offset(x) ((x).val >> 13) | 203 | #define __swp_offset(x) ((x).val >> 13) |
196 | #define __swp_entry(type,offset) \ | 204 | #define __swp_entry(type,offset) \ |
197 | ((swp_entry_t) { ((type) << 8) | ((offset) << 13) }) | 205 | ((swp_entry_t) { ((type) << 8) | ((offset) << 13) }) |
206 | #endif /* defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32) */ | ||
198 | 207 | ||
208 | #if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32) | ||
199 | /* | 209 | /* |
200 | * Bits 0, 1, 2, 7 and 8 are taken, split up the 27 bits of offset | 210 | * Bits 0 and 1 of pte_high are taken, use the rest for the page offset... |
201 | * into this range: | ||
202 | */ | 211 | */ |
203 | #define PTE_FILE_MAX_BITS 27 | 212 | #define PTE_FILE_MAX_BITS 30 |
204 | 213 | ||
205 | #if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1) | 214 | #define pte_to_pgoff(_pte) ((_pte).pte_high >> 2) |
206 | /* fixme */ | 215 | #define pgoff_to_pte(off) ((pte_t) { _PAGE_FILE, (off) << 2 }) |
207 | #define pte_to_pgoff(_pte) (((_pte).pte_high >> 6) + ((_pte).pte_high & 0x3f)) | ||
208 | #define pgoff_to_pte(off) \ | ||
209 | ((pte_t){(((off) & 0x3f) + ((off) << 6) + _PAGE_FILE)}) | ||
210 | 216 | ||
211 | #else | 217 | #else |
212 | #define pte_to_pgoff(_pte) \ | 218 | /* |
213 | ((((_pte).pte >> 3) & 0x1f ) + (((_pte).pte >> 9) << 6 )) | 219 | * Bits 0, 4, 6, and 7 are taken, split up 28 bits of offset into this range: |
220 | */ | ||
221 | #define PTE_FILE_MAX_BITS 28 | ||
222 | |||
223 | #define pte_to_pgoff(_pte) ((((_pte).pte >> 1) & 0x7) | \ | ||
224 | (((_pte).pte >> 2) & 0x8) | \ | ||
225 | (((_pte).pte >> 8) << 4)) | ||
214 | 226 | ||
215 | #define pgoff_to_pte(off) \ | 227 | #define pgoff_to_pte(off) ((pte_t) { (((off) & 0x7) << 1) | \ |
216 | ((pte_t) { (((off) & 0x1f) << 3) + (((off) >> 6) << 9) + _PAGE_FILE }) | 228 | (((off) & 0x8) << 2) | \ |
229 | (((off) >> 4) << 8) | \ | ||
230 | _PAGE_FILE }) | ||
217 | #endif | 231 | #endif |
218 | 232 | ||
219 | #endif | 233 | #endif |
220 | 234 | ||
235 | #if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32) | ||
236 | #define __pte_to_swp_entry(pte) ((swp_entry_t) { (pte).pte_high }) | ||
237 | #define __swp_entry_to_pte(x) ((pte_t) { 0, (x).val }) | ||
238 | #else | ||
221 | #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) | 239 | #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) |
222 | #define __swp_entry_to_pte(x) ((pte_t) { (x).val }) | 240 | #define __swp_entry_to_pte(x) ((pte_t) { (x).val }) |
241 | #endif | ||
223 | 242 | ||
224 | #endif /* _ASM_PGTABLE_32_H */ | 243 | #endif /* _ASM_PGTABLE_32_H */ |
diff --git a/include/asm-mips/pgtable-64.h b/include/asm-mips/pgtable-64.h index 82166b254b27..2faf5c9ff127 100644 --- a/include/asm-mips/pgtable-64.h +++ b/include/asm-mips/pgtable-64.h | |||
@@ -224,15 +224,12 @@ static inline pte_t mk_swap_pte(unsigned long type, unsigned long offset) | |||
224 | #define __swp_entry_to_pte(x) ((pte_t) { (x).val }) | 224 | #define __swp_entry_to_pte(x) ((pte_t) { (x).val }) |
225 | 225 | ||
226 | /* | 226 | /* |
227 | * Bits 0, 1, 2, 7 and 8 are taken, split up the 32 bits of offset | 227 | * Bits 0, 4, 6, and 7 are taken. Let's leave bits 1, 2, 3, and 5 alone to |
228 | * into this range: | 228 | * make things easier, and only use the upper 56 bits for the page offset... |
229 | */ | 229 | */ |
230 | #define PTE_FILE_MAX_BITS 32 | 230 | #define PTE_FILE_MAX_BITS 56 |
231 | 231 | ||
232 | #define pte_to_pgoff(_pte) \ | 232 | #define pte_to_pgoff(_pte) ((_pte).pte >> 8) |
233 | ((((_pte).pte >> 3) & 0x1f ) + (((_pte).pte >> 9) << 6 )) | 233 | #define pgoff_to_pte(off) ((pte_t) { ((off) << 8) | _PAGE_FILE }) |
234 | |||
235 | #define pgoff_to_pte(off) \ | ||
236 | ((pte_t) { (((off) & 0x1f) << 3) + (((off) >> 6) << 9) + _PAGE_FILE }) | ||
237 | 234 | ||
238 | #endif /* _ASM_PGTABLE_64_H */ | 235 | #endif /* _ASM_PGTABLE_64_H */ |
diff --git a/include/asm-mips/pgtable.h b/include/asm-mips/pgtable.h index 174a3cda8c26..d0af2a3b0152 100644 --- a/include/asm-mips/pgtable.h +++ b/include/asm-mips/pgtable.h | |||
@@ -70,7 +70,15 @@ extern unsigned long zero_page_mask; | |||
70 | #define ZERO_PAGE(vaddr) \ | 70 | #define ZERO_PAGE(vaddr) \ |
71 | (virt_to_page(empty_zero_page + (((unsigned long)(vaddr)) & zero_page_mask))) | 71 | (virt_to_page(empty_zero_page + (((unsigned long)(vaddr)) & zero_page_mask))) |
72 | 72 | ||
73 | #define __HAVE_ARCH_MULTIPLE_ZERO_PAGE | 73 | #define __HAVE_ARCH_MOVE_PTE |
74 | #define move_pte(pte, prot, old_addr, new_addr) \ | ||
75 | ({ \ | ||
76 | pte_t newpte = (pte); \ | ||
77 | if (pte_present(pte) && pfn_valid(pte_pfn(pte)) && \ | ||
78 | pte_page(pte) == ZERO_PAGE(old_addr)) \ | ||
79 | newpte = mk_pte(ZERO_PAGE(new_addr), (prot)); \ | ||
80 | newpte; \ | ||
81 | }) | ||
74 | 82 | ||
75 | extern void paging_init(void); | 83 | extern void paging_init(void); |
76 | 84 | ||
@@ -345,8 +353,9 @@ static inline pgprot_t pgprot_noncached(pgprot_t _prot) | |||
345 | #if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1) | 353 | #if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1) |
346 | static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) | 354 | static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) |
347 | { | 355 | { |
348 | pte.pte_low &= _PAGE_CHG_MASK; | 356 | pte.pte_low &= _PAGE_CHG_MASK; |
349 | pte.pte_low |= pgprot_val(newprot); | 357 | pte.pte_high &= ~0x3f; |
358 | pte.pte_low |= pgprot_val(newprot); | ||
350 | pte.pte_high |= pgprot_val(newprot) & 0x3f; | 359 | pte.pte_high |= pgprot_val(newprot) & 0x3f; |
351 | return pte; | 360 | return pte; |
352 | } | 361 | } |
diff --git a/include/asm-mips/smp.h b/include/asm-mips/smp.h index 75c6fe7c2126..e14e4b69de21 100644 --- a/include/asm-mips/smp.h +++ b/include/asm-mips/smp.h | |||
@@ -48,7 +48,6 @@ extern struct call_data_struct *call_data; | |||
48 | #define SMP_CALL_FUNCTION 0x2 | 48 | #define SMP_CALL_FUNCTION 0x2 |
49 | 49 | ||
50 | extern cpumask_t phys_cpu_present_map; | 50 | extern cpumask_t phys_cpu_present_map; |
51 | extern cpumask_t cpu_online_map; | ||
52 | #define cpu_possible_map phys_cpu_present_map | 51 | #define cpu_possible_map phys_cpu_present_map |
53 | 52 | ||
54 | extern cpumask_t cpu_callout_map; | 53 | extern cpumask_t cpu_callout_map; |
@@ -86,9 +85,9 @@ extern void prom_init_secondary(void); | |||
86 | extern void plat_smp_setup(void); | 85 | extern void plat_smp_setup(void); |
87 | 86 | ||
88 | /* | 87 | /* |
89 | * Called after init_IRQ but before __cpu_up. | 88 | * Called in smp_prepare_cpus. |
90 | */ | 89 | */ |
91 | extern void prom_prepare_cpus(unsigned int max_cpus); | 90 | extern void plat_prepare_cpus(unsigned int max_cpus); |
92 | 91 | ||
93 | /* | 92 | /* |
94 | * Last chance for the board code to finish SMP initialization before | 93 | * Last chance for the board code to finish SMP initialization before |
diff --git a/include/asm-mips/sparsemem.h b/include/asm-mips/sparsemem.h new file mode 100644 index 000000000000..795ac6c23203 --- /dev/null +++ b/include/asm-mips/sparsemem.h | |||
@@ -0,0 +1,14 @@ | |||
1 | #ifndef _MIPS_SPARSEMEM_H | ||
2 | #define _MIPS_SPARSEMEM_H | ||
3 | #ifdef CONFIG_SPARSEMEM | ||
4 | |||
5 | /* | ||
6 | * SECTION_SIZE_BITS 2^N: how big each section will be | ||
7 | * MAX_PHYSMEM_BITS 2^N: how much memory we can have in that space | ||
8 | */ | ||
9 | #define SECTION_SIZE_BITS 28 | ||
10 | #define MAX_PHYSMEM_BITS 35 | ||
11 | |||
12 | #endif /* CONFIG_SPARSEMEM */ | ||
13 | #endif /* _MIPS_SPARSEMEM_H */ | ||
14 | |||
diff --git a/include/asm-s390/futex.h b/include/asm-s390/futex.h index 40c25e166a9b..1802775568b9 100644 --- a/include/asm-s390/futex.h +++ b/include/asm-s390/futex.h | |||
@@ -11,23 +11,24 @@ | |||
11 | #define __futex_atomic_fixup \ | 11 | #define __futex_atomic_fixup \ |
12 | ".section __ex_table,\"a\"\n" \ | 12 | ".section __ex_table,\"a\"\n" \ |
13 | " .align 4\n" \ | 13 | " .align 4\n" \ |
14 | " .long 0b,2b,1b,2b\n" \ | 14 | " .long 0b,4b,2b,4b,3b,4b\n" \ |
15 | ".previous" | 15 | ".previous" |
16 | #else /* __s390x__ */ | 16 | #else /* __s390x__ */ |
17 | #define __futex_atomic_fixup \ | 17 | #define __futex_atomic_fixup \ |
18 | ".section __ex_table,\"a\"\n" \ | 18 | ".section __ex_table,\"a\"\n" \ |
19 | " .align 8\n" \ | 19 | " .align 8\n" \ |
20 | " .quad 0b,2b,1b,2b\n" \ | 20 | " .quad 0b,4b,2b,4b,3b,4b\n" \ |
21 | ".previous" | 21 | ".previous" |
22 | #endif /* __s390x__ */ | 22 | #endif /* __s390x__ */ |
23 | 23 | ||
24 | #define __futex_atomic_op(insn, ret, oldval, newval, uaddr, oparg) \ | 24 | #define __futex_atomic_op(insn, ret, oldval, newval, uaddr, oparg) \ |
25 | asm volatile(" l %1,0(%6)\n" \ | 25 | asm volatile(" sacf 256\n" \ |
26 | "0: " insn \ | 26 | "0: l %1,0(%6)\n" \ |
27 | " cs %1,%2,0(%6)\n" \ | 27 | "1: " insn \ |
28 | "1: jl 0b\n" \ | 28 | "2: cs %1,%2,0(%6)\n" \ |
29 | "3: jl 1b\n" \ | ||
29 | " lhi %0,0\n" \ | 30 | " lhi %0,0\n" \ |
30 | "2:\n" \ | 31 | "4: sacf 0\n" \ |
31 | __futex_atomic_fixup \ | 32 | __futex_atomic_fixup \ |
32 | : "=d" (ret), "=&d" (oldval), "=&d" (newval), \ | 33 | : "=d" (ret), "=&d" (oldval), "=&d" (newval), \ |
33 | "=m" (*uaddr) \ | 34 | "=m" (*uaddr) \ |
diff --git a/include/asm-s390/lowcore.h b/include/asm-s390/lowcore.h index db0606c1abd4..bea727904287 100644 --- a/include/asm-s390/lowcore.h +++ b/include/asm-s390/lowcore.h | |||
@@ -98,8 +98,8 @@ | |||
98 | #define __LC_KERNEL_ASCE 0xD58 | 98 | #define __LC_KERNEL_ASCE 0xD58 |
99 | #define __LC_USER_ASCE 0xD60 | 99 | #define __LC_USER_ASCE 0xD60 |
100 | #define __LC_PANIC_STACK 0xD68 | 100 | #define __LC_PANIC_STACK 0xD68 |
101 | #define __LC_CPUID 0xD90 | 101 | #define __LC_CPUID 0xD80 |
102 | #define __LC_CPUADDR 0xD98 | 102 | #define __LC_CPUADDR 0xD88 |
103 | #define __LC_IPLDEV 0xDB8 | 103 | #define __LC_IPLDEV 0xDB8 |
104 | #define __LC_JIFFY_TIMER 0xDC0 | 104 | #define __LC_JIFFY_TIMER 0xDC0 |
105 | #define __LC_CURRENT 0xDD8 | 105 | #define __LC_CURRENT 0xDD8 |
diff --git a/include/asm-sparc64/pgtable.h b/include/asm-sparc64/pgtable.h index c44e7466534e..cd464f469a2c 100644 --- a/include/asm-sparc64/pgtable.h +++ b/include/asm-sparc64/pgtable.h | |||
@@ -689,6 +689,23 @@ static inline void set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *p | |||
689 | #define pte_clear(mm,addr,ptep) \ | 689 | #define pte_clear(mm,addr,ptep) \ |
690 | set_pte_at((mm), (addr), (ptep), __pte(0UL)) | 690 | set_pte_at((mm), (addr), (ptep), __pte(0UL)) |
691 | 691 | ||
692 | #ifdef DCACHE_ALIASING_POSSIBLE | ||
693 | #define __HAVE_ARCH_MOVE_PTE | ||
694 | #define move_pte(pte, prot, old_addr, new_addr) \ | ||
695 | ({ \ | ||
696 | pte_t newpte = (pte); \ | ||
697 | if (tlb_type != hypervisor && pte_present(pte)) { \ | ||
698 | unsigned long this_pfn = pte_pfn(pte); \ | ||
699 | \ | ||
700 | if (pfn_valid(this_pfn) && \ | ||
701 | (((old_addr) ^ (new_addr)) & (1 << 13))) \ | ||
702 | flush_dcache_page_all(current->mm, \ | ||
703 | pfn_to_page(this_pfn)); \ | ||
704 | } \ | ||
705 | newpte; \ | ||
706 | }) | ||
707 | #endif | ||
708 | |||
692 | extern pgd_t swapper_pg_dir[2048]; | 709 | extern pgd_t swapper_pg_dir[2048]; |
693 | extern pmd_t swapper_low_pmd_dir[2048]; | 710 | extern pmd_t swapper_low_pmd_dir[2048]; |
694 | 711 | ||
diff --git a/include/asm-um/irqflags.h b/include/asm-um/irqflags.h new file mode 100644 index 000000000000..659b9abdfdba --- /dev/null +++ b/include/asm-um/irqflags.h | |||
@@ -0,0 +1,6 @@ | |||
1 | #ifndef __UM_IRQFLAGS_H | ||
2 | #define __UM_IRQFLAGS_H | ||
3 | |||
4 | /* Empty for now */ | ||
5 | |||
6 | #endif | ||
diff --git a/include/asm-um/uaccess.h b/include/asm-um/uaccess.h index bea5a015f667..16c734af9193 100644 --- a/include/asm-um/uaccess.h +++ b/include/asm-um/uaccess.h | |||
@@ -41,11 +41,11 @@ | |||
41 | 41 | ||
42 | #define __get_user(x, ptr) \ | 42 | #define __get_user(x, ptr) \ |
43 | ({ \ | 43 | ({ \ |
44 | const __typeof__(ptr) __private_ptr = ptr; \ | 44 | const __typeof__(*(ptr)) __user *__private_ptr = (ptr); \ |
45 | __typeof__(x) __private_val; \ | 45 | __typeof__(x) __private_val; \ |
46 | int __private_ret = -EFAULT; \ | 46 | int __private_ret = -EFAULT; \ |
47 | (x) = (__typeof__(*(__private_ptr)))0; \ | 47 | (x) = (__typeof__(*(__private_ptr)))0; \ |
48 | if (__copy_from_user((void *) &__private_val, (__private_ptr), \ | 48 | if (__copy_from_user((__force void *)&__private_val, (__private_ptr),\ |
49 | sizeof(*(__private_ptr))) == 0) { \ | 49 | sizeof(*(__private_ptr))) == 0) { \ |
50 | (x) = (__typeof__(*(__private_ptr))) __private_val; \ | 50 | (x) = (__typeof__(*(__private_ptr))) __private_val; \ |
51 | __private_ret = 0; \ | 51 | __private_ret = 0; \ |
@@ -62,7 +62,7 @@ | |||
62 | 62 | ||
63 | #define __put_user(x, ptr) \ | 63 | #define __put_user(x, ptr) \ |
64 | ({ \ | 64 | ({ \ |
65 | __typeof__(ptr) __private_ptr = ptr; \ | 65 | __typeof__(*(ptr)) __user *__private_ptr = ptr; \ |
66 | __typeof__(*(__private_ptr)) __private_val; \ | 66 | __typeof__(*(__private_ptr)) __private_val; \ |
67 | int __private_ret = -EFAULT; \ | 67 | int __private_ret = -EFAULT; \ |
68 | __private_val = (__typeof__(*(__private_ptr))) (x); \ | 68 | __private_val = (__typeof__(*(__private_ptr))) (x); \ |
diff --git a/include/linux/elevator.h b/include/linux/elevator.h index ad133fcfb239..1713ace808bf 100644 --- a/include/linux/elevator.h +++ b/include/linux/elevator.h | |||
@@ -21,7 +21,7 @@ typedef void (elevator_put_req_fn) (request_queue_t *, struct request *); | |||
21 | typedef void (elevator_activate_req_fn) (request_queue_t *, struct request *); | 21 | typedef void (elevator_activate_req_fn) (request_queue_t *, struct request *); |
22 | typedef void (elevator_deactivate_req_fn) (request_queue_t *, struct request *); | 22 | typedef void (elevator_deactivate_req_fn) (request_queue_t *, struct request *); |
23 | 23 | ||
24 | typedef int (elevator_init_fn) (request_queue_t *, elevator_t *); | 24 | typedef void *(elevator_init_fn) (request_queue_t *, elevator_t *); |
25 | typedef void (elevator_exit_fn) (elevator_t *); | 25 | typedef void (elevator_exit_fn) (elevator_t *); |
26 | 26 | ||
27 | struct elevator_ops | 27 | struct elevator_ops |
diff --git a/include/linux/i2o.h b/include/linux/i2o.h index dd7d627bf66f..c115e9e840b4 100644 --- a/include/linux/i2o.h +++ b/include/linux/i2o.h | |||
@@ -1114,8 +1114,11 @@ static inline struct i2o_message *i2o_msg_get(struct i2o_controller *c) | |||
1114 | 1114 | ||
1115 | mmsg->mfa = readl(c->in_port); | 1115 | mmsg->mfa = readl(c->in_port); |
1116 | if (unlikely(mmsg->mfa >= c->in_queue.len)) { | 1116 | if (unlikely(mmsg->mfa >= c->in_queue.len)) { |
1117 | u32 mfa = mmsg->mfa; | ||
1118 | |||
1117 | mempool_free(mmsg, c->in_msg.mempool); | 1119 | mempool_free(mmsg, c->in_msg.mempool); |
1118 | if(mmsg->mfa == I2O_QUEUE_EMPTY) | 1120 | |
1121 | if (mfa == I2O_QUEUE_EMPTY) | ||
1119 | return ERR_PTR(-EBUSY); | 1122 | return ERR_PTR(-EBUSY); |
1120 | return ERR_PTR(-EFAULT); | 1123 | return ERR_PTR(-EFAULT); |
1121 | } | 1124 | } |
diff --git a/include/linux/m48t86.h b/include/linux/m48t86.h index 9065199319d0..915d6b4f0f89 100644 --- a/include/linux/m48t86.h +++ b/include/linux/m48t86.h | |||
@@ -11,6 +11,6 @@ | |||
11 | 11 | ||
12 | struct m48t86_ops | 12 | struct m48t86_ops |
13 | { | 13 | { |
14 | void (*writeb)(unsigned char value, unsigned long addr); | 14 | void (*writebyte)(unsigned char value, unsigned long addr); |
15 | unsigned char (*readb)(unsigned long addr); | 15 | unsigned char (*readbyte)(unsigned long addr); |
16 | }; | 16 | }; |
diff --git a/include/linux/mempolicy.h b/include/linux/mempolicy.h index 6a7621b2b12b..f5fdca1d67e6 100644 --- a/include/linux/mempolicy.h +++ b/include/linux/mempolicy.h | |||
@@ -36,6 +36,7 @@ | |||
36 | #include <linux/nodemask.h> | 36 | #include <linux/nodemask.h> |
37 | 37 | ||
38 | struct vm_area_struct; | 38 | struct vm_area_struct; |
39 | struct mm_struct; | ||
39 | 40 | ||
40 | #ifdef CONFIG_NUMA | 41 | #ifdef CONFIG_NUMA |
41 | 42 | ||
diff --git a/include/linux/mmzone.h b/include/linux/mmzone.h index 36740354d4db..2d8337150493 100644 --- a/include/linux/mmzone.h +++ b/include/linux/mmzone.h | |||
@@ -15,6 +15,7 @@ | |||
15 | #include <linux/seqlock.h> | 15 | #include <linux/seqlock.h> |
16 | #include <linux/nodemask.h> | 16 | #include <linux/nodemask.h> |
17 | #include <asm/atomic.h> | 17 | #include <asm/atomic.h> |
18 | #include <asm/page.h> | ||
18 | 19 | ||
19 | /* Free memory management - zoned buddy allocator. */ | 20 | /* Free memory management - zoned buddy allocator. */ |
20 | #ifndef CONFIG_FORCE_MAX_ZONEORDER | 21 | #ifndef CONFIG_FORCE_MAX_ZONEORDER |
diff --git a/include/linux/pci-acpi.h b/include/linux/pci-acpi.h index 4877e35ae202..936ef82ed76a 100644 --- a/include/linux/pci-acpi.h +++ b/include/linux/pci-acpi.h | |||
@@ -50,7 +50,7 @@ | |||
50 | extern acpi_status pci_osc_control_set(acpi_handle handle, u32 flags); | 50 | extern acpi_status pci_osc_control_set(acpi_handle handle, u32 flags); |
51 | extern acpi_status pci_osc_support_set(u32 flags); | 51 | extern acpi_status pci_osc_support_set(u32 flags); |
52 | #else | 52 | #else |
53 | #if !defined(acpi_status) | 53 | #if !defined(AE_ERROR) |
54 | typedef u32 acpi_status; | 54 | typedef u32 acpi_status; |
55 | #define AE_ERROR (acpi_status) (0x0001) | 55 | #define AE_ERROR (acpi_status) (0x0001) |
56 | #endif | 56 | #endif |