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authorKyungmin Park <kyungmin.park@samsung.com>2005-09-03 02:15:48 -0400
committerThomas Gleixner <tglx@mtd.linutronix.de>2005-11-06 15:20:53 -0500
commitcdc001305da4f057353911018e28f26f8f879061 (patch)
tree3672f12af5da82b646aee7ed2d923225fe279a3b /include
parent52b0eea73de05df33c51ca652e288a3ba1bba03b (diff)
[PATCH] OneNAND: Simple Bad Block handling support
Based on NAND memory bad block table code Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'include')
-rw-r--r--include/linux/mtd/onenand.h9
1 files changed, 9 insertions, 0 deletions
diff --git a/include/linux/mtd/onenand.h b/include/linux/mtd/onenand.h
index c557caa24a6c..89aaffbc9576 100644
--- a/include/linux/mtd/onenand.h
+++ b/include/linux/mtd/onenand.h
@@ -14,6 +14,7 @@
14 14
15#include <linux/spinlock.h> 15#include <linux/spinlock.h>
16#include <linux/mtd/onenand_regs.h> 16#include <linux/mtd/onenand_regs.h>
17#include <linux/mtd/bbm.h>
17 18
18#define MAX_BUFFERRAM 2 19#define MAX_BUFFERRAM 2
19 20
@@ -67,10 +68,14 @@ struct onenand_bufferram {
67 * @param wait [REPLACEABLE] hardware specific function for wait on ready 68 * @param wait [REPLACEABLE] hardware specific function for wait on ready
68 * @param read_bufferram [REPLACEABLE] hardware specific function for BufferRAM Area 69 * @param read_bufferram [REPLACEABLE] hardware specific function for BufferRAM Area
69 * @param write_bufferram [REPLACEABLE] hardware specific function for BufferRAM Area 70 * @param write_bufferram [REPLACEABLE] hardware specific function for BufferRAM Area
71 * @param read_word [REPLACEABLE] hardware specific function for read register of OneNAND
72 * @param write_word [REPLACEABLE] hardware specific function for write register of OneNAND
73 * @param scan_bbt [REPLACEALBE] hardware specific function for scaning Bad block Table
70 * @param chip_lock [INTERN] spinlock used to protect access to this structure and the chip 74 * @param chip_lock [INTERN] spinlock used to protect access to this structure and the chip
71 * @param wq [INTERN] wait queue to sleep on if a OneNAND operation is in progress 75 * @param wq [INTERN] wait queue to sleep on if a OneNAND operation is in progress
72 * @param state [INTERN] the current state of the OneNAND device 76 * @param state [INTERN] the current state of the OneNAND device
73 * @param autooob [REPLACEABLE] the default (auto)placement scheme 77 * @param autooob [REPLACEABLE] the default (auto)placement scheme
78 * @param bbm [REPLACEABLE] pointer to Bad Block Management
74 * @param priv [OPTIONAL] pointer to private chip date 79 * @param priv [OPTIONAL] pointer to private chip date
75 */ 80 */
76struct onenand_chip { 81struct onenand_chip {
@@ -96,6 +101,8 @@ struct onenand_chip {
96 unsigned short (*read_word)(void __iomem *addr); 101 unsigned short (*read_word)(void __iomem *addr);
97 void (*write_word)(unsigned short value, void __iomem *addr); 102 void (*write_word)(unsigned short value, void __iomem *addr);
98 void (*mmcontrol)(struct mtd_info *mtd, int sync_read); 103 void (*mmcontrol)(struct mtd_info *mtd, int sync_read);
104 int (*block_markbad)(struct mtd_info *mtd, loff_t ofs);
105 int (*scan_bbt)(struct mtd_info *mtd);
99 106
100 spinlock_t chip_lock; 107 spinlock_t chip_lock;
101 wait_queue_head_t wq; 108 wait_queue_head_t wq;
@@ -103,6 +110,8 @@ struct onenand_chip {
103 110
104 struct nand_oobinfo *autooob; 111 struct nand_oobinfo *autooob;
105 112
113 void *bbm;
114
106 void *priv; 115 void *priv;
107}; 116};
108 117