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authorMichael Ellerman <michael@ellerman.id.au>2007-04-23 04:47:08 -0400
committerPaul Mackerras <paulus@samba.org>2007-04-24 08:06:58 -0400
commit6cfef5b27e49e826125f12637ee0d7210a896044 (patch)
treec120c3cdd8693ed7b5042d84d82878cdf0128b46 /include
parente3f64788d32f97b31709a45911dabaa37f933359 (diff)
[POWERPC] Rename MPIC_BROKEN_U3 to MPIC_U3_HT_IRQS
Rename MPIC_BROKEN_U3 to something a little more descriptive. Its effect is to enable support for HT irqs behind the PCI-X/HT bridge on U3/U4 (aka. CPC9x5) parts. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'include')
-rw-r--r--include/asm-powerpc/mpic.h12
1 files changed, 6 insertions, 6 deletions
diff --git a/include/asm-powerpc/mpic.h b/include/asm-powerpc/mpic.h
index cb204a71e912..e4d5fc5362a0 100644
--- a/include/asm-powerpc/mpic.h
+++ b/include/asm-powerpc/mpic.h
@@ -199,7 +199,7 @@ enum {
199}; 199};
200 200
201 201
202#ifdef CONFIG_MPIC_BROKEN_U3 202#ifdef CONFIG_MPIC_U3_HT_IRQS
203/* Fixup table entry */ 203/* Fixup table entry */
204struct mpic_irq_fixup 204struct mpic_irq_fixup
205{ 205{
@@ -208,7 +208,7 @@ struct mpic_irq_fixup
208 u32 data; 208 u32 data;
209 unsigned int index; 209 unsigned int index;
210}; 210};
211#endif /* CONFIG_MPIC_BROKEN_U3 */ 211#endif /* CONFIG_MPIC_U3_HT_IRQS */
212 212
213 213
214enum mpic_reg_type { 214enum mpic_reg_type {
@@ -239,7 +239,7 @@ struct mpic
239 239
240 /* The "linux" controller struct */ 240 /* The "linux" controller struct */
241 struct irq_chip hc_irq; 241 struct irq_chip hc_irq;
242#ifdef CONFIG_MPIC_BROKEN_U3 242#ifdef CONFIG_MPIC_U3_HT_IRQS
243 struct irq_chip hc_ht_irq; 243 struct irq_chip hc_ht_irq;
244#endif 244#endif
245#ifdef CONFIG_SMP 245#ifdef CONFIG_SMP
@@ -268,7 +268,7 @@ struct mpic
268 /* Spurious vector to program into unused sources */ 268 /* Spurious vector to program into unused sources */
269 unsigned int spurious_vec; 269 unsigned int spurious_vec;
270 270
271#ifdef CONFIG_MPIC_BROKEN_U3 271#ifdef CONFIG_MPIC_U3_HT_IRQS
272 /* The fixup table */ 272 /* The fixup table */
273 struct mpic_irq_fixup *fixups; 273 struct mpic_irq_fixup *fixups;
274 spinlock_t fixup_lock; 274 spinlock_t fixup_lock;
@@ -313,7 +313,7 @@ struct mpic
313/* Set this for a big-endian MPIC */ 313/* Set this for a big-endian MPIC */
314#define MPIC_BIG_ENDIAN 0x00000002 314#define MPIC_BIG_ENDIAN 0x00000002
315/* Broken U3 MPIC */ 315/* Broken U3 MPIC */
316#define MPIC_BROKEN_U3 0x00000004 316#define MPIC_U3_HT_IRQS 0x00000004
317/* Broken IPI registers (autodetected) */ 317/* Broken IPI registers (autodetected) */
318#define MPIC_BROKEN_IPI 0x00000008 318#define MPIC_BROKEN_IPI 0x00000008
319/* MPIC wants a reset */ 319/* MPIC wants a reset */
@@ -352,7 +352,7 @@ struct mpic
352 * @senses_num: number of entries in the array 352 * @senses_num: number of entries in the array
353 * 353 *
354 * Note about the sense array. If none is passed, all interrupts are 354 * Note about the sense array. If none is passed, all interrupts are
355 * setup to be level negative unless MPIC_BROKEN_U3 is set in which 355 * setup to be level negative unless MPIC_U3_HT_IRQS is set in which
356 * case they are edge positive (and the array is ignored anyway). 356 * case they are edge positive (and the array is ignored anyway).
357 * The values in the array start at the first source of the MPIC, 357 * The values in the array start at the first source of the MPIC,
358 * that is senses[0] correspond to linux irq "irq_offset". 358 * that is senses[0] correspond to linux irq "irq_offset".