mn10300: add the MN10300/AM33 architecture to the kernel

Add architecture support for the MN10300/AM33 CPUs produced by MEI to the
kernel.

This patch also adds board support for the ASB2303 with the ASB2308 daughter
board, and the ASB2305.  The only processor supported is the MN103E010, which
is an AM33v2 core plus on-chip devices.

[akpm@linux-foundation.org: nuke cvs control strings]
Signed-off-by: Masakazu Urade <urade.masakazu@jp.panasonic.com>
Signed-off-by: Koichi Yasutake <yasutake.koichi@jp.panasonic.com>
Signed-off-by: David Howells <dhowells@redhat.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

124 files changed, 9472 insertions, 0 deletions

diff --git a/include/asm-mn10300/.gitignore b/include/asm-mn10300/.gitignore
new file mode 100644
index 000000000000..0f87ba790e26
--- /dev/null
+++ b/include/asm-mn10300/.gitignore
@@ -0,0 +1,2 @@
+proc
+unit
diff --git a/include/asm-mn10300/Kbuild b/include/asm-mn10300/Kbuild
new file mode 100644
index 000000000000..79384c537dc6
--- /dev/null
+++ b/include/asm-mn10300/Kbuild
@@ -0,0 +1,5 @@
+include include/asm-generic/Kbuild.asm
+
+unifdef-y += termios.h
+unifdef-y += ptrace.h
+unifdef-y += page.h
diff --git a/include/asm-mn10300/atomic.h b/include/asm-mn10300/atomic.h
new file mode 100644
index 000000000000..27c9690b9574
--- /dev/null
+++ b/include/asm-mn10300/atomic.h
@@ -0,0 +1,166 @@
+/* MN10300 Atomic counter operations
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_ATOMIC_H
+#define _ASM_ATOMIC_H
+
+#ifdef CONFIG_SMP
+#error not SMP safe
+#endif
+
+/*
+ * Atomic operations that C can't guarantee us.  Useful for
+ * resource counting etc..
+ */
+
+/*
+ * Make sure gcc doesn't try to be clever and move things around
+ * on us. We need to use _exactly_ the address the user gave us,
+ * not some alias that contains the same information.
+ */
+typedef struct {
+        int     counter;
+} atomic_t;
+
+#define ATOMIC_INIT(i)  { (i) }
+
+#ifdef __KERNEL__
+
+/**
+ * atomic_read - read atomic variable
+ * @v: pointer of type atomic_t
+ *
+ * Atomically reads the value of @v.  Note that the guaranteed
+ * useful range of an atomic_t is only 24 bits.
+ */
+#define atomic_read(v)  ((v)->counter)
+
+/**
+ * atomic_set - set atomic variable
+ * @v: pointer of type atomic_t
+ * @i: required value
+ *
+ * Atomically sets the value of @v to @i.  Note that the guaranteed
+ * useful range of an atomic_t is only 24 bits.
+ */
+#define atomic_set(v, i) (((v)->counter) = (i))
+
+#include <asm/system.h>
+
+/**
+ * atomic_add_return - add integer to atomic variable
+ * @i: integer value to add
+ * @v: pointer of type atomic_t
+ *
+ * Atomically adds @i to @v and returns the result
+ * Note that the guaranteed useful range of an atomic_t is only 24 bits.
+ */
+static inline int atomic_add_return(int i, atomic_t *v)
+{
+        unsigned long flags;
+        int temp;
+
+        local_irq_save(flags);
+        temp = v->counter;
+        temp += i;
+        v->counter = temp;
+        local_irq_restore(flags);
+
+        return temp;
+}
+
+/**
+ * atomic_sub_return - subtract integer from atomic variable
+ * @i: integer value to subtract
+ * @v: pointer of type atomic_t
+ *
+ * Atomically subtracts @i from @v and returns the result
+ * Note that the guaranteed useful range of an atomic_t is only 24 bits.
+ */
+static inline int atomic_sub_return(int i, atomic_t *v)
+{
+        unsigned long flags;
+        int temp;
+
+        local_irq_save(flags);
+        temp = v->counter;
+        temp -= i;
+        v->counter = temp;
+        local_irq_restore(flags);
+
+        return temp;
+}
+
+static inline int atomic_add_negative(int i, atomic_t *v)
+{
+        return atomic_add_return(i, v) < 0;
+}
+
+static inline void atomic_add(int i, atomic_t *v)
+{
+        atomic_add_return(i, v);
+}
+
+static inline void atomic_sub(int i, atomic_t *v)
+{
+        atomic_sub_return(i, v);
+}
+
+static inline void atomic_inc(atomic_t *v)
+{
+        atomic_add_return(1, v);
+}
+
+static inline void atomic_dec(atomic_t *v)
+{
+        atomic_sub_return(1, v);
+}
+
+#define atomic_dec_return(v)            atomic_sub_return(1, (v))
+#define atomic_inc_return(v)            atomic_add_return(1, (v))
+
+#define atomic_sub_and_test(i, v)       (atomic_sub_return((i), (v)) == 0)
+#define atomic_dec_and_test(v)          (atomic_sub_return(1, (v)) == 0)
+#define atomic_inc_and_test(v)          (atomic_add_return(1, (v)) == 0)
+
+#define atomic_add_unless(v, a, u)                              \
+({                                                              \
+        int c, old;                                             \
+        c = atomic_read(v);                                     \
+        while (c != (u) && (old = atomic_cmpxchg((v), c, c + (a))) != c) \
+                c = old;                                        \
+        c != (u);                                               \
+})
+
+#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
+
+static inline void atomic_clear_mask(unsigned long mask, unsigned long *addr)
+{
+        unsigned long flags;
+
+        mask = ~mask;
+        local_irq_save(flags);
+        *addr &= mask;
+        local_irq_restore(flags);
+}
+
+#define atomic_xchg(ptr, v)             (xchg(&(ptr)->counter, (v)))
+#define atomic_cmpxchg(v, old, new)     (cmpxchg(&((v)->counter), (old), (new)))
+
+/* Atomic operations are already serializing on MN10300??? */
+#define smp_mb__before_atomic_dec()     barrier()
+#define smp_mb__after_atomic_dec()      barrier()
+#define smp_mb__before_atomic_inc()     barrier()
+#define smp_mb__after_atomic_inc()      barrier()
+
+#include <asm-generic/atomic.h>
+
+#endif /* __KERNEL__ */
+#endif /* _ASM_ATOMIC_H */
diff --git a/include/asm-mn10300/auxvec.h b/include/asm-mn10300/auxvec.h
new file mode 100644
index 000000000000..4fdb60b2ae39
--- /dev/null
+++ b/include/asm-mn10300/auxvec.h
@@ -0,0 +1,4 @@
+#ifndef _ASM_AUXVEC_H
+#define _ASM_AUXVEC_H
+
+#endif
diff --git a/include/asm-mn10300/bitops.h b/include/asm-mn10300/bitops.h
new file mode 100644
index 000000000000..cc6d40c05cf3
--- /dev/null
+++ b/include/asm-mn10300/bitops.h
@@ -0,0 +1,229 @@
+/* MN10300 bit operations
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ *
+ * These have to be done with inline assembly: that way the bit-setting
+ * is guaranteed to be atomic. All bit operations return 0 if the bit
+ * was cleared before the operation and != 0 if it was not.
+ *
+ * bit 0 is the LSB of addr; bit 32 is the LSB of (addr+1).
+ */
+#ifndef __ASM_BITOPS_H
+#define __ASM_BITOPS_H
+
+#include <asm/cpu-regs.h>
+
+#define smp_mb__before_clear_bit()      barrier()
+#define smp_mb__after_clear_bit()       barrier()
+
+/*
+ * set bit
+ */
+#define __set_bit(nr, addr)                                     \
+({                                                              \
+        volatile unsigned char *_a = (unsigned char *)(addr);   \
+        const unsigned shift = (nr) & 7;                        \
+        _a += (nr) >> 3;                                        \
+                                                                \
+        asm volatile("bset %2,(%1) # set_bit reg"               \
+                     : "=m"(*_a)                                \
+                     : "a"(_a), "d"(1 << shift),  "m"(*_a)      \
+                     : "memory", "cc");                         \
+})
+
+#define set_bit(nr, addr) __set_bit((nr), (addr))
+
+/*
+ * clear bit
+ */
+#define ___clear_bit(nr, addr)                                  \
+({                                                              \
+        volatile unsigned char *_a = (unsigned char *)(addr);   \
+        const unsigned shift = (nr) & 7;                        \
+        _a += (nr) >> 3;                                        \
+                                                                \
+        asm volatile("bclr %2,(%1) # clear_bit reg"             \
+                     : "=m"(*_a)                                \
+                     : "a"(_a), "d"(1 << shift), "m"(*_a)       \
+                     : "memory", "cc");                         \
+})
+
+#define clear_bit(nr, addr) ___clear_bit((nr), (addr))
+
+
+static inline void __clear_bit(int nr, volatile void *addr)
+{
+        unsigned int *a = (unsigned int *) addr;
+        int mask;
+
+        a += nr >> 5;
+        mask = 1 << (nr & 0x1f);
+        *a &= ~mask;
+}
+
+/*
+ * test bit
+ */
+static inline int test_bit(int nr, const volatile void *addr)
+{
+        return 1UL & (((const unsigned int *) addr)[nr >> 5] >> (nr & 31));
+}
+
+/*
+ * change bit
+ */
+static inline void __change_bit(int nr, volatile void *addr)
+{
+        int     mask;
+        unsigned int *a = (unsigned int *) addr;
+
+        a += nr >> 5;
+        mask = 1 << (nr & 0x1f);
+        *a ^= mask;
+}
+
+extern void change_bit(int nr, volatile void *addr);
+
+/*
+ * test and set bit
+ */
+#define __test_and_set_bit(nr,addr)                             \
+({                                                              \
+        volatile unsigned char *_a = (unsigned char *)(addr);   \
+        const unsigned shift = (nr) & 7;                        \
+        unsigned epsw;                                          \
+        _a += (nr) >> 3;                                        \
+                                                                \
+        asm volatile("bset %3,(%2) # test_set_bit reg\n"        \
+                     "mov epsw,%1"                              \
+                     : "=m"(*_a), "=d"(epsw)                    \
+                     : "a"(_a), "d"(1 << shift), "m"(*_a)       \
+                     : "memory", "cc");                         \
+                                                                \
+        !(epsw & EPSW_FLAG_Z);                                  \
+})
+
+#define test_and_set_bit(nr, addr) __test_and_set_bit((nr), (addr))
+
+/*
+ * test and clear bit
+ */
+#define __test_and_clear_bit(nr, addr)                          \
+({                                                              \
+        volatile unsigned char *_a = (unsigned char *)(addr);   \
+        const unsigned shift = (nr) & 7;                        \
+        unsigned epsw;                                          \
+        _a += (nr) >> 3;                                        \
+                                                                \
+        asm volatile("bclr %3,(%2) # test_clear_bit reg\n"      \
+                     "mov epsw,%1"                              \
+                     : "=m"(*_a), "=d"(epsw)                    \
+                     : "a"(_a), "d"(1 << shift), "m"(*_a)       \
+                     : "memory", "cc");                         \
+                                                                \
+        !(epsw & EPSW_FLAG_Z);                                  \
+})
+
+#define test_and_clear_bit(nr, addr) __test_and_clear_bit((nr), (addr))
+
+/*
+ * test and change bit
+ */
+static inline int __test_and_change_bit(int nr, volatile void *addr)
+{
+        int     mask, retval;
+        unsigned int *a = (unsigned int *)addr;
+
+        a += nr >> 5;
+        mask = 1 << (nr & 0x1f);
+        retval = (mask & *a) != 0;
+        *a ^= mask;
+
+        return retval;
+}
+
+extern int test_and_change_bit(int nr, volatile void *addr);
+
+#include <asm-generic/bitops/lock.h>
+
+#ifdef __KERNEL__
+
+/**
+ * __ffs - find first bit set
+ * @x: the word to search
+ *
+ * - return 31..0 to indicate bit 31..0 most least significant bit set
+ * - if no bits are set in x, the result is undefined
+ */
+static inline __attribute__((const))
+unsigned long __ffs(unsigned long x)
+{
+        int bit;
+        asm("bsch %2,%0" : "=r"(bit) : "0"(0), "r"(x & -x));
+        return bit;
+}
+
+/*
+ * special slimline version of fls() for calculating ilog2_u32()
+ * - note: no protection against n == 0
+ */
+static inline __attribute__((const))
+int __ilog2_u32(u32 n)
+{
+        int bit;
+        asm("bsch %2,%0" : "=r"(bit) : "0"(0), "r"(n));
+        return bit;
+}
+
+/**
+ * fls - find last bit set
+ * @x: the word to search
+ *
+ * This is defined the same way as ffs:
+ * - return 32..1 to indicate bit 31..0 most significant bit set
+ * - return 0 to indicate no bits set
+ */
+static inline __attribute__((const))
+int fls(int x)
+{
+        return (x != 0) ? __ilog2_u32(x) + 1 : 0;
+}
+
+/**
+ * ffs - find first bit set
+ * @x: the word to search
+ *
+ * - return 32..1 to indicate bit 31..0 most least significant bit set
+ * - return 0 to indicate no bits set
+ */
+static inline __attribute__((const))
+int ffs(int x)
+{
+        /* Note: (x & -x) gives us a mask that is the least significant
+         * (rightmost) 1-bit of the value in x.
+         */
+        return fls(x & -x);
+}
+
+#include <asm-generic/bitops/ffz.h>
+#include <asm-generic/bitops/fls64.h>
+#include <asm-generic/bitops/find.h>
+#include <asm-generic/bitops/sched.h>
+#include <asm-generic/bitops/hweight.h>
+
+#define ext2_set_bit_atomic(lock, nr, addr) \
+        test_and_set_bit((nr) ^ 0x18, (addr))
+#define ext2_clear_bit_atomic(lock, nr, addr) \
+        test_and_clear_bit((nr) ^ 0x18, (addr))
+
+#include <asm-generic/bitops/ext2-non-atomic.h>
+#include <asm-generic/bitops/minix-le.h>
+
+#endif /* __KERNEL__ */
+#endif /* __ASM_BITOPS_H */
diff --git a/include/asm-mn10300/bug.h b/include/asm-mn10300/bug.h
new file mode 100644
index 000000000000..4fcf3384e259
--- /dev/null
+++ b/include/asm-mn10300/bug.h
@@ -0,0 +1,35 @@
+/* MN10300 Kernel bug reporting
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_BUG_H
+#define _ASM_BUG_H
+
+/*
+ * Tell the user there is some problem.
+ */
+#define _debug_bug_trap()                                       \
+do {                                                            \
+        asm volatile(                                           \
+                "       syscall 15                      \n"     \
+                "0:                                     \n"     \
+                "       .section __bug_table,\"a\"      \n"     \
+                "       .long 0b,%0,%1                  \n"     \
+                "       .previous                       \n"     \
+                :                                               \
+                : "i"(__FILE__), "i"(__LINE__)                  \
+                );                                              \
+} while (0)
+
+#define BUG() _debug_bug_trap()
+
+#define HAVE_ARCH_BUG
+#include <asm-generic/bug.h>
+
+#endif /* _ASM_BUG_H */
diff --git a/include/asm-mn10300/bugs.h b/include/asm-mn10300/bugs.h
new file mode 100644
index 000000000000..31c8bc592b47
--- /dev/null
+++ b/include/asm-mn10300/bugs.h
@@ -0,0 +1,20 @@
+/* MN10300 Checks for architecture-dependent bugs
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_BUGS_H
+#define _ASM_BUGS_H
+
+#include <asm/processor.h>
+
+static inline void __init check_bugs(void)
+{
+}
+
+#endif /* _ASM_BUGS_H */
diff --git a/include/asm-mn10300/busctl-regs.h b/include/asm-mn10300/busctl-regs.h
new file mode 100644
index 000000000000..1632aef73401
--- /dev/null
+++ b/include/asm-mn10300/busctl-regs.h
@@ -0,0 +1,151 @@
+/* AM33v2 on-board bus controller registers
+ *
+ * Copyright (C) 2002 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+
+#ifndef _ASM_BUSCTL_REGS_H
+#define _ASM_BUSCTL_REGS_H
+
+#include <asm/cpu-regs.h>
+
+#ifdef __KERNEL__
+
+/* bus controller registers */
+#define BCCR                    __SYSREG(0xc0002000, u32)       /* bus controller control reg */
+#define BCCR_B0AD               0x00000003      /* block 0 (80000000-83ffffff) bus allocation */
+#define BCCR_B1AD               0x0000000c      /* block 1 (84000000-87ffffff) bus allocation */
+#define BCCR_B2AD               0x00000030      /* block 2 (88000000-8bffffff) bus allocation */
+#define BCCR_B3AD               0x000000c0      /* block 3 (8c000000-8fffffff) bus allocation */
+#define BCCR_B4AD               0x00000300      /* block 4 (90000000-93ffffff) bus allocation */
+#define BCCR_B5AD               0x00000c00      /* block 5 (94000000-97ffffff) bus allocation */
+#define BCCR_B6AD               0x00003000      /* block 6 (98000000-9bffffff) bus allocation */
+#define BCCR_B7AD               0x0000c000      /* block 7 (9c000000-9fffffff) bus allocation */
+#define BCCR_BxAD_EXBUS         0x0             /* - direct to system bus controller */
+#define BCCR_BxAD_OPEXBUS       0x1             /* - direct to memory bus controller */
+#define BCCR_BxAD_OCMBUS        0x2             /* - direct to on chip memory */
+#define BCCR_API                0x00070000      /* bus arbitration priority */
+#define BCCR_API_DMACICD        0x00000000      /* - DMA > CI > CD */
+#define BCCR_API_DMACDCI        0x00010000      /* - DMA > CD > CI */
+#define BCCR_API_CICDDMA        0x00020000      /* - CI > CD > DMA */
+#define BCCR_API_CDCIDMA        0x00030000      /* - CD > CI > DMA */
+#define BCCR_API_ROUNDROBIN     0x00040000      /* - round robin */
+#define BCCR_BEPRI_DMACICD      0x00c00000      /* bus error address priority */
+#define BCCR_BEPRI_DMACDCI      0x00000000      /* - DMA > CI > CD */
+#define BCCR_BEPRI_CICDDMA      0x00400000      /* - DMA > CD > CI */
+#define BCCR_BEPRI_CDCIDMA      0x00800000      /* - CI > CD > DMA */
+#define BCCR_BEPRI              0x00c00000      /* - CD > CI > DMA */
+#define BCCR_TMON               0x03000000      /* timeout value settings */
+#define BCCR_TMON_16IOCLK       0x00000000      /* - 16 IOCLK cycles */
+#define BCCR_TMON_256IOCLK      0x01000000      /* - 256 IOCLK cycles */
+#define BCCR_TMON_4096IOCLK     0x02000000      /* - 4096 IOCLK cycles */
+#define BCCR_TMON_65536IOCLK    0x03000000      /* - 65536 IOCLK cycles */
+#define BCCR_TMOE               0x10000000      /* timeout detection enable */
+
+#define BCBERR                  __SYSREG(0xc0002010, u32)       /* bus error source reg */
+#define BCBERR_BESB             0x0000001f      /* erroneous access destination space */
+#define BCBERR_BESB_MON         0x00000001      /* - monitor space */
+#define BCBERR_BESB_IO          0x00000002      /* - IO bus */
+#define BCBERR_BESB_EX          0x00000004      /* - EX bus */
+#define BCBERR_BESB_OPEX        0x00000008      /* - OpEX bus */
+#define BCBERR_BESB_OCM         0x00000010      /* - on chip memory */
+#define BCBERR_BERW             0x00000100      /* type of access */
+#define BCBERR_BERW_WRITE       0x00000000      /* - write */
+#define BCBERR_BERW_READ        0x00000100      /* - read */
+#define BCBERR_BESD             0x00000200      /* error detector */
+#define BCBERR_BESD_BCU         0x00000000      /* - BCU detected error */
+#define BCBERR_BESD_SLAVE_BUS   0x00000200      /* - slave bus detected error */
+#define BCBERR_BEBST            0x00000400      /* type of access */
+#define BCBERR_BEBST_SINGLE     0x00000000      /* - single */
+#define BCBERR_BEBST_BURST      0x00000400      /* - burst */
+#define BCBERR_BEME             0x00000800      /* multiple bus error flag */
+#define BCBERR_BEMR             0x00007000      /* master bus that caused the error */
+#define BCBERR_BEMR_NOERROR     0x00000000      /* - no error */
+#define BCBERR_BEMR_CI          0x00001000      /* - CPU instruction fetch bus caused error */
+#define BCBERR_BEMR_CD          0x00002000      /* - CPU data bus caused error */
+#define BCBERR_BEMR_DMA         0x00004000      /* - DMA bus caused error */
+
+#define BCBEAR                  __SYSREGC(0xc0002020, u32)      /* bus error address reg */
+
+/* system bus controller registers */
+#define SBBASE(X)               __SYSREG(0xd8c00100 + (X) * 0x10, u32)  /* SBC base addr regs */
+#define SBBASE_BE               0x00000001      /* bank enable */
+#define SBBASE_BAM              0x0000fffe      /* bank address mask [31:17] */
+#define SBBASE_BBA              0xfffe0000      /* bank base address [31:17] */
+
+#define SBCNTRL0(X)             __SYSREG(0xd8c00200 + (X) * 0x10, u32)  /* SBC bank ctrl0 regs */
+#define SBCNTRL0_WEH            0x00000f00      /* write enable hold */
+#define SBCNTRL0_REH            0x0000f000      /* read enable hold */
+#define SBCNTRL0_RWH            0x000f0000      /* SRW signal hold */
+#define SBCNTRL0_CSH            0x00f00000      /* chip select hold */
+#define SBCNTRL0_DAH            0x0f000000      /* data hold */
+#define SBCNTRL0_ADH            0xf0000000      /* address hold */
+
+#define SBCNTRL1(X)             __SYSREG(0xd8c00204 + (X) * 0x10, u32)  /* SBC bank ctrl1 regs */
+#define SBCNTRL1_WED            0x00000f00      /* write enable delay */
+#define SBCNTRL1_RED            0x0000f000      /* read enable delay */
+#define SBCNTRL1_RWD            0x000f0000      /* SRW signal delay */
+#define SBCNTRL1_ASW            0x00f00000      /* address strobe width */
+#define SBCNTRL1_CSD            0x0f000000      /* chip select delay */
+#define SBCNTRL1_ASD            0xf0000000      /* address strobe delay */
+
+#define SBCNTRL2(X)             __SYSREG(0xd8c00208 + (X) * 0x10, u32)  /* SBC bank ctrl2 regs */
+#define SBCNTRL2_WC             0x000000ff      /* wait count */
+#define SBCNTRL2_BWC            0x00000f00      /* burst wait count */
+#define SBCNTRL2_WM             0x01000000      /* wait mode setting */
+#define SBCNTRL2_WM_FIXEDWAIT   0x00000000      /* - fixed wait access */
+#define SBCNTRL2_WM_HANDSHAKE   0x01000000      /* - handshake access */
+#define SBCNTRL2_BM             0x02000000      /* bus synchronisation mode */
+#define SBCNTRL2_BM_SYNC        0x00000000      /* - synchronous mode */
+#define SBCNTRL2_BM_ASYNC       0x02000000      /* - asynchronous mode */
+#define SBCNTRL2_BW             0x04000000      /* bus width */
+#define SBCNTRL2_BW_32          0x00000000      /* - 32 bits */
+#define SBCNTRL2_BW_16          0x04000000      /* - 16 bits */
+#define SBCNTRL2_RWINV          0x08000000      /* R/W signal invert polarity */
+#define SBCNTRL2_RWINV_NORM     0x00000000      /* - normal (read high) */
+#define SBCNTRL2_RWINV_INV      0x08000000      /* - inverted (read low) */
+#define SBCNTRL2_BT             0x70000000      /* bus type setting */
+#define SBCNTRL2_BT_SRAM        0x00000000      /* - SRAM interface */
+#define SBCNTRL2_BT_ADMUX       0x00000000      /* - addr/data multiplexed interface */
+#define SBCNTRL2_BT_BROM        0x00000000      /* - burst ROM interface */
+#define SBCNTRL2_BTSE           0x80000000      /* burst enable */
+
+/* memory bus controller */
+#define SDBASE(X)               __SYSREG(0xda000008 + (X) * 0x4, u32)   /* MBC base addr regs */
+#define SDBASE_CE               0x00000001      /* chip enable */
+#define SDBASE_CBAM             0x0000fff0      /* chip base address mask [31:20] */
+#define SDBASE_CBAM_SHIFT       16
+#define SDBASE_CBA              0xfff00000      /* chip base address [31:20] */
+
+#define SDRAMBUS                __SYSREG(0xda000000, u32)       /* bus mode control reg */
+#define SDRAMBUS_REFEN          0x00000004      /* refresh enable */
+#define SDRAMBUS_TRC            0x00000018      /* refresh command delay time */
+#define SDRAMBUS_BSTPT          0x00000020      /* burst stop command enable */
+#define SDRAMBUS_PONSEQ         0x00000040      /* power on sequence */
+#define SDRAMBUS_SELFREQ        0x00000080      /* self-refresh mode request */
+#define SDRAMBUS_SELFON         0x00000100      /* self-refresh mode on */
+#define SDRAMBUS_SIZE           0x00030000      /* SDRAM size */
+#define SDRAMBUS_SIZE_64Mbit    0x00010000      /* 64Mbit SDRAM (x16) */
+#define SDRAMBUS_SIZE_128Mbit   0x00020000      /* 128Mbit SDRAM (x16) */
+#define SDRAMBUS_SIZE_256Mbit   0x00030000      /* 256Mbit SDRAM (x16) */
+#define SDRAMBUS_TRASWAIT       0x000c0000      /* row address precharge command cycle number */
+#define SDRAMBUS_REFNUM         0x00300000      /* refresh command number */
+#define SDRAMBUS_BSTWAIT        0x00c00000      /* burst stop command cycle */
+#define SDRAMBUS_SETWAIT        0x03000000      /* mode register setting command cycle */
+#define SDRAMBUS_PREWAIT        0x0c000000      /* precharge command cycle */
+#define SDRAMBUS_RASLATE        0x30000000      /* RAS latency */
+#define SDRAMBUS_CASLATE        0xc0000000      /* CAS latency */
+
+#define SDREFCNT                __SYSREG(0xda000004, u32)       /* refresh period reg */
+#define SDREFCNT_PERI           0x00000fff      /* refresh period */
+
+#define SDSHDW                  __SYSREG(0xda000010, u32)       /* test reg */
+
+#endif /* __KERNEL__ */
+
+#endif /* _ASM_BUSCTL_REGS_H */
diff --git a/include/asm-mn10300/byteorder.h b/include/asm-mn10300/byteorder.h
new file mode 100644
index 000000000000..3c993cc625f8
--- /dev/null
+++ b/include/asm-mn10300/byteorder.h
@@ -0,0 +1,46 @@
+/* MN10300 Byte-order primitive construction
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_BYTEORDER_H
+#define _ASM_BYTEORDER_H
+
+#include <asm/types.h>
+
+#ifdef __GNUC__
+
+static inline __attribute__((const))
+__u32 ___arch__swab32(__u32 x)
+{
+        __u32 ret;
+        asm("swap %1,%0" : "=r" (ret) : "r" (x));
+        return ret;
+}
+
+static inline __attribute__((const))
+__u16 ___arch__swab16(__u16 x)
+{
+        __u16 ret;
+        asm("swaph %1,%0" : "=r" (ret) : "r" (x));
+        return ret;
+}
+
+#define __arch__swab32(x) ___arch__swab32(x)
+#define __arch__swab16(x) ___arch__swab16(x)
+
+#if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
+#  define __BYTEORDER_HAS_U64__
+#  define __SWAB_64_THRU_32__
+#endif
+
+#endif /* __GNUC__ */
+
+#include <linux/byteorder/little_endian.h>
+
+#endif /* _ASM_BYTEORDER_H */
diff --git a/include/asm-mn10300/cache.h b/include/asm-mn10300/cache.h
new file mode 100644
index 000000000000..9e01122208a9
--- /dev/null
+++ b/include/asm-mn10300/cache.h
@@ -0,0 +1,54 @@
+/* MN10300 cache management registers
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+
+#ifndef _ASM_CACHE_H
+#define _ASM_CACHE_H
+
+#include <asm/cpu-regs.h>
+#include <asm/proc/cache.h>
+
+#ifndef __ASSEMBLY__
+#define L1_CACHE_DISPARITY      (L1_CACHE_NENTRIES * L1_CACHE_BYTES)
+#else
+#define L1_CACHE_DISPARITY      L1_CACHE_NENTRIES * L1_CACHE_BYTES
+#endif
+
+/* data cache purge registers
+ * - read from the register to unconditionally purge that cache line
+ * - write address & 0xffffff00 to conditionally purge that cache line
+ *   - clear LSB to request invalidation as well
+ */
+#define DCACHE_PURGE(WAY, ENTRY) \
+        __SYSREG(0xc8400000 + (WAY) * L1_CACHE_WAYDISP + \
+                 (ENTRY) * L1_CACHE_BYTES, u32)
+
+#define DCACHE_PURGE_WAY0(ENTRY) \
+        __SYSREG(0xc8400000 + 0 * L1_CACHE_WAYDISP + (ENTRY) * L1_CACHE_BYTES, u32)
+#define DCACHE_PURGE_WAY1(ENTRY) \
+        __SYSREG(0xc8400000 + 1 * L1_CACHE_WAYDISP + (ENTRY) * L1_CACHE_BYTES, u32)
+#define DCACHE_PURGE_WAY2(ENTRY) \
+        __SYSREG(0xc8400000 + 2 * L1_CACHE_WAYDISP + (ENTRY) * L1_CACHE_BYTES, u32)
+#define DCACHE_PURGE_WAY3(ENTRY) \
+        __SYSREG(0xc8400000 + 3 * L1_CACHE_WAYDISP + (ENTRY) * L1_CACHE_BYTES, u32)
+
+/* instruction cache access registers */
+#define ICACHE_DATA(WAY, ENTRY, OFF) \
+        __SYSREG(0xc8000000 + (WAY) * L1_CACHE_WAYDISP + (ENTRY) * 0x10 + (OFF) * 4, u32)
+#define ICACHE_TAG(WAY, ENTRY)   \
+        __SYSREG(0xc8100000 + (WAY) * L1_CACHE_WAYDISP + (ENTRY) * 0x10, u32)
+
+/* instruction cache access registers */
+#define DCACHE_DATA(WAY, ENTRY, OFF) \
+        __SYSREG(0xc8200000 + (WAY) * L1_CACHE_WAYDISP + (ENTRY) * 0x10 + (OFF) * 4, u32)
+#define DCACHE_TAG(WAY, ENTRY)   \
+        __SYSREG(0xc8300000 + (WAY) * L1_CACHE_WAYDISP + (ENTRY) * 0x10, u32)
+
+#endif /* _ASM_CACHE_H */
diff --git a/include/asm-mn10300/cacheflush.h b/include/asm-mn10300/cacheflush.h
new file mode 100644
index 000000000000..2db746a251f8
--- /dev/null
+++ b/include/asm-mn10300/cacheflush.h
@@ -0,0 +1,116 @@
+/* MN10300 Cache flushing
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_CACHEFLUSH_H
+#define _ASM_CACHEFLUSH_H
+
+#ifndef __ASSEMBLY__
+
+/* Keep includes the same across arches.  */
+#include <linux/mm.h>
+
+/*
+ * virtually-indexed cache managment (our cache is physically indexed)
+ */
+#define flush_cache_all()                       do {} while (0)
+#define flush_cache_mm(mm)                      do {} while (0)
+#define flush_cache_dup_mm(mm)                  do {} while (0)
+#define flush_cache_range(mm, start, end)       do {} while (0)
+#define flush_cache_page(vma, vmaddr, pfn)      do {} while (0)
+#define flush_cache_vmap(start, end)            do {} while (0)
+#define flush_cache_vunmap(start, end)          do {} while (0)
+#define flush_dcache_page(page)                 do {} while (0)
+#define flush_dcache_mmap_lock(mapping)         do {} while (0)
+#define flush_dcache_mmap_unlock(mapping)       do {} while (0)
+
+/*
+ * physically-indexed cache managment
+ */
+#ifndef CONFIG_MN10300_CACHE_DISABLED
+
+extern void flush_icache_range(unsigned long start, unsigned long end);
+extern void flush_icache_page(struct vm_area_struct *vma, struct page *pg);
+
+#else
+
+#define flush_icache_range(start, end)          do {} while (0)
+#define flush_icache_page(vma, pg)              do {} while (0)
+
+#endif
+
+#define flush_icache_user_range(vma, pg, adr, len) \
+        flush_icache_range(adr, adr + len)
+
+#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
+        do {                                    \
+                memcpy(dst, src, len);          \
+                flush_icache_page(vma, page);   \
+        } while (0)
+
+#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
+        memcpy(dst, src, len)
+
+/*
+ * primitive routines
+ */
+#ifndef CONFIG_MN10300_CACHE_DISABLED
+extern void mn10300_icache_inv(void);
+extern void mn10300_dcache_inv(void);
+extern void mn10300_dcache_inv_page(unsigned start);
+extern void mn10300_dcache_inv_range(unsigned start, unsigned end);
+extern void mn10300_dcache_inv_range2(unsigned start, unsigned size);
+#ifdef CONFIG_MN10300_CACHE_WBACK
+extern void mn10300_dcache_flush(void);
+extern void mn10300_dcache_flush_page(unsigned start);
+extern void mn10300_dcache_flush_range(unsigned start, unsigned end);
+extern void mn10300_dcache_flush_range2(unsigned start, unsigned size);
+extern void mn10300_dcache_flush_inv(void);
+extern void mn10300_dcache_flush_inv_page(unsigned start);
+extern void mn10300_dcache_flush_inv_range(unsigned start, unsigned end);
+extern void mn10300_dcache_flush_inv_range2(unsigned start, unsigned size);
+#else
+#define mn10300_dcache_flush()                          do {} while (0)
+#define mn10300_dcache_flush_page(start)                do {} while (0)
+#define mn10300_dcache_flush_range(start, end)          do {} while (0)
+#define mn10300_dcache_flush_range2(start, size)        do {} while (0)
+#define mn10300_dcache_flush_inv()                      mn10300_dcache_inv()
+#define mn10300_dcache_flush_inv_page(start) \
+        mn10300_dcache_inv_page((start))
+#define mn10300_dcache_flush_inv_range(start, end) \
+        mn10300_dcache_inv_range((start), (end))
+#define mn10300_dcache_flush_inv_range2(start, size) \
+        mn10300_dcache_inv_range2((start), (size))
+#endif /* CONFIG_MN10300_CACHE_WBACK */
+#else
+#define mn10300_icache_inv()                            do {} while (0)
+#define mn10300_dcache_inv()                            do {} while (0)
+#define mn10300_dcache_inv_page(start)                  do {} while (0)
+#define mn10300_dcache_inv_range(start, end)            do {} while (0)
+#define mn10300_dcache_inv_range2(start, size)          do {} while (0)
+#define mn10300_dcache_flush()                          do {} while (0)
+#define mn10300_dcache_flush_inv_page(start)            do {} while (0)
+#define mn10300_dcache_flush_inv()                      do {} while (0)
+#define mn10300_dcache_flush_inv_range(start, end)      do {} while (0)
+#define mn10300_dcache_flush_inv_range2(start, size)    do {} while (0)
+#define mn10300_dcache_flush_page(start)                do {} while (0)
+#define mn10300_dcache_flush_range(start, end)          do {} while (0)
+#define mn10300_dcache_flush_range2(start, size)        do {} while (0)
+#endif /* CONFIG_MN10300_CACHE_DISABLED */
+
+/*
+ * internal debugging function
+ */
+#ifdef CONFIG_DEBUG_PAGEALLOC
+extern void kernel_map_pages(struct page *page, int numpages, int enable);
+#endif
+
+#endif /* __ASSEMBLY__ */
+
+#endif /* _ASM_CACHEFLUSH_H */
diff --git a/include/asm-mn10300/checksum.h b/include/asm-mn10300/checksum.h
new file mode 100644
index 000000000000..9fb2a8d8826a
--- /dev/null
+++ b/include/asm-mn10300/checksum.h
@@ -0,0 +1,86 @@
+/* MN10300 Optimised checksumming code
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_CHECKSUM_H
+#define _ASM_CHECKSUM_H
+
+extern __wsum csum_partial(const void *buff, int len, __wsum sum);
+extern __wsum csum_partial_copy_nocheck(const void *src, void *dst,
+                                        int len, __wsum sum);
+extern __wsum csum_partial_copy_from_user(const void *src, void *dst,
+                                          int len, __wsum sum,
+                                          int *err_ptr);
+extern __sum16 ip_fast_csum(const void *iph, unsigned int ihl);
+extern __wsum csum_partial(const void *buff, int len, __wsum sum);
+extern __sum16 ip_compute_csum(const void *buff, int len);
+
+#define csum_partial_copy_fromuser csum_partial_copy
+extern __wsum csum_partial_copy(const void *src, void *dst, int len,
+                                __wsum sum);
+
+static inline __sum16 csum_fold(__wsum sum)
+{
+        asm(
+                "       add     %1,%0           \n"
+                "       addc    0xffff,%0       \n"
+                : "=r" (sum)
+                : "r" (sum << 16), "0" (sum & 0xffff0000)
+                : "cc"
+            );
+        return (~sum) >> 16;
+}
+
+static inline __wsum csum_tcpudp_nofold(unsigned long saddr,
+                                        unsigned long daddr,
+                                        unsigned short len,
+                                        unsigned short proto,
+                                        __wsum sum)
+{
+        __wsum tmp;
+
+        tmp = (__wsum) ntohs(len) << 16;
+        tmp += (__wsum) proto << 8;
+
+        asm(
+                "       add     %1,%0           \n"
+                "       addc    %2,%0           \n"
+                "       addc    %3,%0           \n"
+                "       addc    0,%0            \n"
+                : "=r" (sum)
+                : "r" (daddr), "r"(saddr), "r"(tmp), "0"(sum)
+                : "cc"
+            );
+        return sum;
+}
+
+/*
+ * computes the checksum of the TCP/UDP pseudo-header
+ * returns a 16-bit checksum, already complemented
+ */
+static inline __sum16 csum_tcpudp_magic(unsigned long saddr,
+                                        unsigned long daddr,
+                                        unsigned short len,
+                                        unsigned short proto,
+                                        __wsum sum)
+{
+        return csum_fold(csum_tcpudp_nofold(saddr, daddr, len, proto, sum));
+}
+
+#undef _HAVE_ARCH_IPV6_CSUM
+
+/*
+ *      Copy and checksum to user
+ */
+#define HAVE_CSUM_COPY_USER
+extern __wsum csum_and_copy_to_user(const void *src, void *dst, int len,
+                                    __wsum sum, int *err_ptr);
+
+
+#endif /* _ASM_CHECKSUM_H */
diff --git a/include/asm-mn10300/cpu-regs.h b/include/asm-mn10300/cpu-regs.h
new file mode 100644
index 000000000000..757e9b5388ea
--- /dev/null
+++ b/include/asm-mn10300/cpu-regs.h
@@ -0,0 +1,290 @@
+/* MN10300 Core system registers
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_CPU_REGS_H
+#define _ASM_CPU_REGS_H
+
+#ifndef __ASSEMBLY__
+#include <linux/types.h>
+#endif
+
+#ifdef CONFIG_MN10300_CPU_AM33V2
+/* we tell the compiler to pretend to be AM33 so that it doesn't try and use
+ * the FP regs, but tell the assembler that we're actually allowed AM33v2
+ * instructions */
+#ifndef __ASSEMBLY__
+asm(" .am33_2\n");
+#else
+.am33_2
+#endif
+#endif
+
+#ifdef __KERNEL__
+
+#ifndef __ASSEMBLY__
+#define __SYSREG(ADDR, TYPE) (*(volatile TYPE *)(ADDR))
+#define __SYSREGC(ADDR, TYPE) (*(const volatile TYPE *)(ADDR))
+#else
+#define __SYSREG(ADDR, TYPE) ADDR
+#define __SYSREGC(ADDR, TYPE) ADDR
+#endif
+
+/* CPU registers */
+#define EPSW_FLAG_Z             0x00000001      /* zero flag */
+#define EPSW_FLAG_N             0x00000002      /* negative flag */
+#define EPSW_FLAG_C             0x00000004      /* carry flag */
+#define EPSW_FLAG_V             0x00000008      /* overflow flag */
+#define EPSW_IM                 0x00000700      /* interrupt mode */
+#define EPSW_IM_0               0x00000000      /* interrupt mode 0 */
+#define EPSW_IM_1               0x00000100      /* interrupt mode 1 */
+#define EPSW_IM_2               0x00000200      /* interrupt mode 2 */
+#define EPSW_IM_3               0x00000300      /* interrupt mode 3 */
+#define EPSW_IM_4               0x00000400      /* interrupt mode 4 */
+#define EPSW_IM_5               0x00000500      /* interrupt mode 5 */
+#define EPSW_IM_6               0x00000600      /* interrupt mode 6 */
+#define EPSW_IM_7               0x00000700      /* interrupt mode 7 */
+#define EPSW_IE                 0x00000800      /* interrupt enable */
+#define EPSW_S                  0x00003000      /* software auxilliary bits */
+#define EPSW_T                  0x00008000      /* trace enable */
+#define EPSW_nSL                0x00010000      /* not supervisor level */
+#define EPSW_NMID               0x00020000      /* nonmaskable interrupt disable */
+#define EPSW_nAR                0x00040000      /* register bank control */
+#define EPSW_ML                 0x00080000      /* monitor level */
+#define EPSW_FE                 0x00100000      /* FPU enable */
+
+/* FPU registers */
+#define FPCR_EF_I               0x00000001      /* inexact result FPU exception flag */
+#define FPCR_EF_U               0x00000002      /* underflow FPU exception flag */
+#define FPCR_EF_O               0x00000004      /* overflow FPU exception flag */
+#define FPCR_EF_Z               0x00000008      /* zero divide FPU exception flag */
+#define FPCR_EF_V               0x00000010      /* invalid operand FPU exception flag */
+#define FPCR_EE_I               0x00000020      /* inexact result FPU exception enable */
+#define FPCR_EE_U               0x00000040      /* underflow FPU exception enable */
+#define FPCR_EE_O               0x00000080      /* overflow FPU exception enable */
+#define FPCR_EE_Z               0x00000100      /* zero divide FPU exception enable */
+#define FPCR_EE_V               0x00000200      /* invalid operand FPU exception enable */
+#define FPCR_EC_I               0x00000400      /* inexact result FPU exception cause */
+#define FPCR_EC_U               0x00000800      /* underflow FPU exception cause */
+#define FPCR_EC_O               0x00001000      /* overflow FPU exception cause */
+#define FPCR_EC_Z               0x00002000      /* zero divide FPU exception cause */
+#define FPCR_EC_V               0x00004000      /* invalid operand FPU exception cause */
+#define FPCR_RM                 0x00030000      /* rounding mode */
+#define FPCR_RM_NEAREST         0x00000000      /* - round to nearest value */
+#define FPCR_FCC_U              0x00040000      /* FPU unordered condition code */
+#define FPCR_FCC_E              0x00080000      /* FPU equal condition code */
+#define FPCR_FCC_G              0x00100000      /* FPU greater than condition code */
+#define FPCR_FCC_L              0x00200000      /* FPU less than condition code */
+#define FPCR_INIT               0x00000000      /* no exceptions, rounding to nearest */
+
+/* CPU control registers */
+#define CPUP                    __SYSREG(0xc0000020, u16)       /* CPU pipeline register */
+#define CPUP_DWBD               0x0020          /* write buffer disable flag */
+#define CPUP_IPFD               0x0040          /* instruction prefetch disable flag */
+#define CPUP_EXM                0x0080          /* exception operation mode */
+#define CPUP_EXM_AM33V1         0x0000          /* - AM33 v1 exception mode */
+#define CPUP_EXM_AM33V2         0x0080          /* - AM33 v2 exception mode */
+
+#define CPUM                    __SYSREG(0xc0000040, u16)       /* CPU mode register */
+#define CPUM_SLEEP              0x0004          /* set to enter sleep state */
+#define CPUM_HALT               0x0008          /* set to enter halt state */
+#define CPUM_STOP               0x0010          /* set to enter stop state */
+
+#define CPUREV                  __SYSREGC(0xc0000050, u32)      /* CPU revision register */
+#define CPUREV_TYPE             0x0000000f      /* CPU type */
+#define CPUREV_TYPE_S           0
+#define CPUREV_TYPE_AM33V1      0x00000000      /* - AM33 V1 core, AM33/1.00 arch */
+#define CPUREV_TYPE_AM33V2      0x00000001      /* - AM33 V2 core, AM33/2.00 arch */
+#define CPUREV_TYPE_AM34V1      0x00000002      /* - AM34 V1 core, AM33/2.00 arch */
+#define CPUREV_REVISION         0x000000f0      /* CPU revision */
+#define CPUREV_REVISION_S       4
+#define CPUREV_ICWAY            0x00000f00      /* number of instruction cache ways */
+#define CPUREV_ICWAY_S          8
+#define CPUREV_ICSIZE           0x0000f000      /* instruction cache way size */
+#define CPUREV_ICSIZE_S         12
+#define CPUREV_DCWAY            0x000f0000      /* number of data cache ways */
+#define CPUREV_DCWAY_S          16
+#define CPUREV_DCSIZE           0x00f00000      /* data cache way size */
+#define CPUREV_DCSIZE_S         20
+#define CPUREV_FPUTYPE          0x0f000000      /* FPU core type */
+#define CPUREV_FPUTYPE_NONE     0x00000000      /* - no FPU core implemented */
+#define CPUREV_OCDCTG           0xf0000000      /* on-chip debug function category */
+
+#define DCR                     __SYSREG(0xc0000030, u16)       /* Debug control register */
+
+/* interrupt/exception control registers */
+#define IVAR0                   __SYSREG(0xc0000000, u16)       /* interrupt vector 0 */
+#define IVAR1                   __SYSREG(0xc0000004, u16)       /* interrupt vector 1 */
+#define IVAR2                   __SYSREG(0xc0000008, u16)       /* interrupt vector 2 */
+#define IVAR3                   __SYSREG(0xc000000c, u16)       /* interrupt vector 3 */
+#define IVAR4                   __SYSREG(0xc0000010, u16)       /* interrupt vector 4 */
+#define IVAR5                   __SYSREG(0xc0000014, u16)       /* interrupt vector 5 */
+#define IVAR6                   __SYSREG(0xc0000018, u16)       /* interrupt vector 6 */
+
+#define TBR                     __SYSREG(0xc0000024, u32)       /* Trap table base */
+#define TBR_TB                  0xff000000      /* table base address bits 31-24 */
+#define TBR_INT_CODE            0x00ffffff      /* interrupt code */
+
+#define DEAR                    __SYSREG(0xc0000038, u32)       /* Data access exception address */
+
+#define sISR                    __SYSREG(0xc0000044, u32)       /* Supervisor interrupt status */
+#define sISR_IRQICE             0x00000001      /* ICE interrupt */
+#define sISR_ISTEP              0x00000002      /* single step interrupt */
+#define sISR_MISSA              0x00000004      /* memory access address misalignment fault */
+#define sISR_UNIMP              0x00000008      /* unimplemented instruction execution fault */
+#define sISR_PIEXE              0x00000010      /* program interrupt */
+#define sISR_MEMERR             0x00000020      /* illegal memory access fault */
+#define sISR_IBREAK             0x00000040      /* instraction break interrupt */
+#define sISR_DBSRL              0x00000080      /* debug serial interrupt */
+#define sISR_PERIDB             0x00000100      /* peripheral debug interrupt */
+#define sISR_EXUNIMP            0x00000200      /* unimplemented ex-instruction execution fault */
+#define sISR_OBREAK             0x00000400      /* operand break interrupt */
+#define sISR_PRIV               0x00000800      /* privileged instruction execution fault */
+#define sISR_BUSERR             0x00001000      /* bus error fault */
+#define sISR_DBLFT              0x00002000      /* double fault */
+#define sISR_DBG                0x00008000      /* debug reserved interrupt */
+#define sISR_ITMISS             0x00010000      /* instruction TLB miss */
+#define sISR_DTMISS             0x00020000      /* data TLB miss */
+#define sISR_ITEX               0x00040000      /* instruction TLB access exception */
+#define sISR_DTEX               0x00080000      /* data TLB access exception */
+#define sISR_ILGIA              0x00100000      /* illegal instruction access exception */
+#define sISR_ILGDA              0x00200000      /* illegal data access exception */
+#define sISR_IOIA               0x00400000      /* internal I/O space instruction access excep */
+#define sISR_PRIVA              0x00800000      /* privileged space instruction access excep */
+#define sISR_PRIDA              0x01000000      /* privileged space data access excep */
+#define sISR_DISA               0x02000000      /* data space instruction access excep */
+#define sISR_SYSC               0x04000000      /* system call instruction excep */
+#define sISR_FPUD               0x08000000      /* FPU disabled excep */
+#define sISR_FPUUI              0x10000000      /* FPU unimplemented instruction excep */
+#define sISR_FPUOP              0x20000000      /* FPU operation excep */
+#define sISR_NE                 0x80000000      /* multiple synchronous exceptions excep */
+
+/* cache control registers */
+#define CHCTR                   __SYSREG(0xc0000070, u16)       /* cache control */
+#define CHCTR_ICEN              0x0001          /* instruction cache enable */
+#define CHCTR_DCEN              0x0002          /* data cache enable */
+#define CHCTR_ICBUSY            0x0004          /* instruction cache busy */
+#define CHCTR_DCBUSY            0x0008          /* data cache busy */
+#define CHCTR_ICINV             0x0010          /* instruction cache invalidate */
+#define CHCTR_DCINV             0x0020          /* data cache invalidate */
+#define CHCTR_DCWTMD            0x0040          /* data cache writing mode */
+#define CHCTR_DCWTMD_WRBACK     0x0000          /* - write back mode */
+#define CHCTR_DCWTMD_WRTHROUGH  0x0040          /* - write through mode */
+#define CHCTR_DCALMD            0x0080          /* data cache allocation mode */
+#define CHCTR_ICWMD             0x0f00          /* instruction cache way mode */
+#define CHCTR_DCWMD             0xf000          /* data cache way mode */
+
+/* MMU control registers */
+#define MMUCTR                  __SYSREG(0xc0000090, u32)       /* MMU control register */
+#define MMUCTR_IRP              0x0000003f      /* instruction TLB replace pointer */
+#define MMUCTR_ITE              0x00000040      /* instruction TLB enable */
+#define MMUCTR_IIV              0x00000080      /* instruction TLB invalidate */
+#define MMUCTR_ITL              0x00000700      /* instruction TLB lock pointer */
+#define MMUCTR_ITL_NOLOCK       0x00000000      /* - no lock */
+#define MMUCTR_ITL_LOCK0        0x00000100      /* - entry 0 locked */
+#define MMUCTR_ITL_LOCK0_1      0x00000200      /* - entry 0-1 locked */
+#define MMUCTR_ITL_LOCK0_3      0x00000300      /* - entry 0-3 locked */
+#define MMUCTR_ITL_LOCK0_7      0x00000400      /* - entry 0-7 locked */
+#define MMUCTR_ITL_LOCK0_15     0x00000500      /* - entry 0-15 locked */
+#define MMUCTR_CE               0x00008000      /* cacheable bit enable */
+#define MMUCTR_DRP              0x003f0000      /* data TLB replace pointer */
+#define MMUCTR_DTE              0x00400000      /* data TLB enable */
+#define MMUCTR_DIV              0x00800000      /* data TLB invalidate */
+#define MMUCTR_DTL              0x07000000      /* data TLB lock pointer */
+#define MMUCTR_DTL_NOLOCK       0x00000000      /* - no lock */
+#define MMUCTR_DTL_LOCK0        0x01000000      /* - entry 0 locked */
+#define MMUCTR_DTL_LOCK0_1      0x02000000      /* - entry 0-1 locked */
+#define MMUCTR_DTL_LOCK0_3      0x03000000      /* - entry 0-3 locked */
+#define MMUCTR_DTL_LOCK0_7      0x04000000      /* - entry 0-7 locked */
+#define MMUCTR_DTL_LOCK0_15     0x05000000      /* - entry 0-15 locked */
+
+#define PIDR                    __SYSREG(0xc0000094, u16)       /* PID register */
+#define PIDR_PID                0x00ff          /* process identifier */
+
+#define PTBR                    __SYSREG(0xc0000098, unsigned long) /* Page table base register */
+
+#define IPTEL                   __SYSREG(0xc00000a0, u32)       /* instruction TLB entry */
+#define DPTEL                   __SYSREG(0xc00000b0, u32)       /* data TLB entry */
+#define xPTEL_V                 0x00000001      /* TLB entry valid */
+#define xPTEL_UNUSED1           0x00000002      /* unused bit */
+#define xPTEL_UNUSED2           0x00000004      /* unused bit */
+#define xPTEL_C                 0x00000008      /* cached if set */
+#define xPTEL_PV                0x00000010      /* page valid */
+#define xPTEL_D                 0x00000020      /* dirty */
+#define xPTEL_PR                0x000001c0      /* page protection */
+#define xPTEL_PR_ROK            0x00000000      /* - R/O kernel */
+#define xPTEL_PR_RWK            0x00000100      /* - R/W kernel */
+#define xPTEL_PR_ROK_ROU        0x00000080      /* - R/O kernel and R/O user */
+#define xPTEL_PR_RWK_ROU        0x00000180      /* - R/W kernel and R/O user */
+#define xPTEL_PR_RWK_RWU        0x000001c0      /* - R/W kernel and R/W user */
+#define xPTEL_G                 0x00000200      /* global (use PID if 0) */
+#define xPTEL_PS                0x00000c00      /* page size */
+#define xPTEL_PS_4Kb            0x00000000      /* - 4Kb page */
+#define xPTEL_PS_128Kb          0x00000400      /* - 128Kb page */
+#define xPTEL_PS_1Kb            0x00000800      /* - 1Kb page */
+#define xPTEL_PS_4Mb            0x00000c00      /* - 4Mb page */
+#define xPTEL_PPN               0xfffff006      /* physical page number */
+
+#define xPTEL_V_BIT             0       /* bit numbers corresponding to above masks */
+#define xPTEL_UNUSED1_BIT       1
+#define xPTEL_UNUSED2_BIT       2
+#define xPTEL_C_BIT             3
+#define xPTEL_PV_BIT            4
+#define xPTEL_D_BIT             5
+#define xPTEL_G_BIT             9
+
+#define IPTEU                   __SYSREG(0xc00000a4, u32)       /* instruction TLB virtual addr */
+#define DPTEU                   __SYSREG(0xc00000b4, u32)       /* data TLB virtual addr */
+#define xPTEU_VPN               0xfffffc00      /* virtual page number */
+#define xPTEU_PID               0x000000ff      /* process identifier to which applicable */
+
+#define IPTEL2                  __SYSREG(0xc00000a8, u32)       /* instruction TLB entry */
+#define DPTEL2                  __SYSREG(0xc00000b8, u32)       /* data TLB entry */
+#define xPTEL2_V                0x00000001      /* TLB entry valid */
+#define xPTEL2_C                0x00000002      /* cacheable */
+#define xPTEL2_PV               0x00000004      /* page valid */
+#define xPTEL2_D                0x00000008      /* dirty */
+#define xPTEL2_PR               0x00000070      /* page protection */
+#define xPTEL2_PR_ROK           0x00000000      /* - R/O kernel */
+#define xPTEL2_PR_RWK           0x00000040      /* - R/W kernel */
+#define xPTEL2_PR_ROK_ROU       0x00000020      /* - R/O kernel and R/O user */
+#define xPTEL2_PR_RWK_ROU       0x00000060      /* - R/W kernel and R/O user */
+#define xPTEL2_PR_RWK_RWU       0x00000070      /* - R/W kernel and R/W user */
+#define xPTEL2_G                0x00000080      /* global (use PID if 0) */
+#define xPTEL2_PS               0x00000300      /* page size */
+#define xPTEL2_PS_4Kb           0x00000000      /* - 4Kb page */
+#define xPTEL2_PS_128Kb         0x00000100      /* - 128Kb page */
+#define xPTEL2_PS_1Kb           0x00000200      /* - 1Kb page */
+#define xPTEL2_PS_4Mb           0x00000300      /* - 4Mb page */
+#define xPTEL2_PPN              0xfffffc00      /* physical page number */
+
+#define MMUFCR                  __SYSREGC(0xc000009c, u32)      /* MMU exception cause */
+#define MMUFCR_IFC              __SYSREGC(0xc000009c, u16)      /* MMU instruction excep cause */
+#define MMUFCR_DFC              __SYSREGC(0xc000009e, u16)      /* MMU data exception cause */
+#define MMUFCR_xFC_TLBMISS      0x0001          /* TLB miss flag */
+#define MMUFCR_xFC_INITWR       0x0002          /* initial write excep flag */
+#define MMUFCR_xFC_PGINVAL      0x0004          /* page invalid excep flag */
+#define MMUFCR_xFC_PROTVIOL     0x0008          /* protection violation excep flag */
+#define MMUFCR_xFC_ACCESS       0x0010          /* access level flag */
+#define MMUFCR_xFC_ACCESS_USR   0x0000          /* - user mode */
+#define MMUFCR_xFC_ACCESS_SR    0x0010          /* - supervisor mode */
+#define MMUFCR_xFC_TYPE         0x0020          /* access type flag */
+#define MMUFCR_xFC_TYPE_READ    0x0000          /* - read */
+#define MMUFCR_xFC_TYPE_WRITE   0x0020          /* - write */
+#define MMUFCR_xFC_PR           0x01c0          /* page protection flag */
+#define MMUFCR_xFC_PR_ROK       0x0000          /* - R/O kernel */
+#define MMUFCR_xFC_PR_RWK       0x0100          /* - R/W kernel */
+#define MMUFCR_xFC_PR_ROK_ROU   0x0080          /* - R/O kernel and R/O user */
+#define MMUFCR_xFC_PR_RWK_ROU   0x0180          /* - R/W kernel and R/O user */
+#define MMUFCR_xFC_PR_RWK_RWU   0x01c0          /* - R/W kernel and R/W user */
+#define MMUFCR_xFC_ILLADDR      0x0200          /* illegal address excep flag */
+
+#endif /* __KERNEL__ */
+
+#endif /* _ASM_CPU_REGS_H */
diff --git a/include/asm-mn10300/cputime.h b/include/asm-mn10300/cputime.h
new file mode 100644
index 000000000000..6d68ad7e0ea3
--- /dev/null
+++ b/include/asm-mn10300/cputime.h
@@ -0,0 +1 @@
+#include <asm-generic/cputime.h>
diff --git a/include/asm-mn10300/current.h b/include/asm-mn10300/current.h
new file mode 100644
index 000000000000..ca6027d83743
--- /dev/null
+++ b/include/asm-mn10300/current.h
@@ -0,0 +1,37 @@
+/* MN10300 Current task structure accessor
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_CURRENT_H
+#define _ASM_CURRENT_H
+
+#include <linux/thread_info.h>
+
+/*
+ * dedicate E2 to keeping the current task pointer
+ */
+#ifdef CONFIG_MN10300_CURRENT_IN_E2
+
+register struct task_struct *const current asm("e2") __attribute__((used));
+
+#define get_current() current
+
+extern struct task_struct *__current;
+
+#else
+static inline __attribute__((const))
+struct task_struct *get_current(void)
+{
+        return current_thread_info()->task;
+}
+
+#define current get_current()
+#endif
+
+#endif /* _ASM_CURRENT_H */
diff --git a/include/asm-mn10300/delay.h b/include/asm-mn10300/delay.h
new file mode 100644
index 000000000000..34517b359399
--- /dev/null
+++ b/include/asm-mn10300/delay.h
@@ -0,0 +1,19 @@
+/* MN10300 Uninterruptible delay routines
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_DELAY_H
+#define _ASM_DELAY_H
+
+extern void __udelay(unsigned long usecs);
+extern void __delay(unsigned long loops);
+
+#define udelay(n) __udelay(n)
+
+#endif /* _ASM_DELAY_H */
diff --git a/include/asm-mn10300/device.h b/include/asm-mn10300/device.h
new file mode 100644
index 000000000000..f0a4c256403b
--- /dev/null
+++ b/include/asm-mn10300/device.h
@@ -0,0 +1 @@
+#include <asm-generic/device.h>
diff --git a/include/asm-mn10300/div64.h b/include/asm-mn10300/div64.h
new file mode 100644
index 000000000000..bf9c515a998c
--- /dev/null
+++ b/include/asm-mn10300/div64.h
@@ -0,0 +1,103 @@
+/* MN10300 64-bit division
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_DIV64
+#define _ASM_DIV64
+
+#include <linux/types.h>
+
+extern void ____unhandled_size_in_do_div___(void);
+
+/*
+ * divide n by base, leaving the result in n and returning the remainder
+ * - we can do this quite efficiently on the MN10300 by cascading the divides
+ *   through the MDR register
+ */
+#define do_div(n, base)                                                 \
+({                                                                      \
+        unsigned __rem = 0;                                             \
+        if (sizeof(n) <= 4) {                                           \
+                asm("mov        %1,mdr  \n"                             \
+                    "divu       %2,%0   \n"                             \
+                    "mov        mdr,%1  \n"                             \
+                    : "+r"(n), "=d"(__rem)                              \
+                    : "r"(base), "1"(__rem)                             \
+                    : "cc"                                              \
+                    );                                                  \
+        } else if (sizeof(n) <= 8) {                                    \
+                union {                                                 \
+                        unsigned long long l;                           \
+                        u32 w[2];                                       \
+                } __quot;                                               \
+                __quot.l = n;                                           \
+                asm("mov        %0,mdr  \n"     /* MDR = 0 */           \
+                    "divu       %3,%1   \n"                             \
+                    /* __quot.MSL = __div.MSL / base, */                \
+                    /* MDR = MDR:__div.MSL % base */                    \
+                    "divu       %3,%2   \n"                             \
+                    /* __quot.LSL = MDR:__div.LSL / base, */            \
+                    /* MDR = MDR:__div.LSL % base */                    \
+                    "mov        mdr,%0  \n"                             \
+                    : "=d"(__rem), "=r"(__quot.w[1]), "=r"(__quot.w[0]) \
+                    : "r"(base), "0"(__rem), "1"(__quot.w[1]),          \
+                      "2"(__quot.w[0])                                  \
+                    : "cc"                                              \
+                    );                                                  \
+                n = __quot.l;                                           \
+        } else {                                                        \
+                ____unhandled_size_in_do_div___();                      \
+        }                                                               \
+        __rem;                                                          \
+})
+
+/*
+ * do an unsigned 32-bit multiply and divide with intermediate 64-bit product
+ * so as not to lose accuracy
+ * - we use the MDR register to hold the MSW of the product
+ */
+static inline __attribute__((const))
+unsigned __muldiv64u(unsigned val, unsigned mult, unsigned div)
+{
+        unsigned result;
+
+        asm("mulu       %2,%0   \n"     /* MDR:val = val*mult */
+            "divu       %3,%0   \n"     /* val = MDR:val/div;
+                                         * MDR = MDR:val%div */
+            : "=r"(result)
+            : "0"(val), "ir"(mult), "r"(div)
+            );
+
+        return result;
+}
+
+/*
+ * do a signed 32-bit multiply and divide with intermediate 64-bit product so
+ * as not to lose accuracy
+ * - we use the MDR register to hold the MSW of the product
+ */
+static inline __attribute__((const))
+signed __muldiv64s(signed val, signed mult, signed div)
+{
+        signed result;
+
+        asm("mul        %2,%0   \n"     /* MDR:val = val*mult */
+            "div        %3,%0   \n"     /* val = MDR:val/div;
+                                         * MDR = MDR:val%div */
+            : "=r"(result)
+            : "0"(val), "ir"(mult), "r"(div)
+            );
+
+        return result;
+}
+
+extern __attribute__((const))
+uint64_t div64_64(uint64_t dividend, uint64_t divisor);
+
+#endif /* _ASM_DIV64 */
diff --git a/include/asm-mn10300/dma-mapping.h b/include/asm-mn10300/dma-mapping.h
new file mode 100644
index 000000000000..7c882fca9ec8
--- /dev/null
+++ b/include/asm-mn10300/dma-mapping.h
@@ -0,0 +1,234 @@
+/* DMA mapping routines for the MN10300 arch
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_DMA_MAPPING_H
+#define _ASM_DMA_MAPPING_H
+
+#include <linux/mm.h>
+#include <linux/scatterlist.h>
+
+#include <asm/cache.h>
+#include <asm/io.h>
+
+extern void *dma_alloc_coherent(struct device *dev, size_t size,
+                                dma_addr_t *dma_handle, int flag);
+
+extern void dma_free_coherent(struct device *dev, size_t size,
+                              void *vaddr, dma_addr_t dma_handle);
+
+#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent((d), (s), (h), (f))
+#define dma_free_noncoherent(d, s, v, h)  dma_free_coherent((d), (s), (v), (h))
+
+/*
+ * Map a single buffer of the indicated size for DMA in streaming mode.  The
+ * 32-bit bus address to use is returned.
+ *
+ * Once the device is given the dma address, the device owns this memory until
+ * either pci_unmap_single or pci_dma_sync_single is performed.
+ */
+static inline
+dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size,
+                          enum dma_data_direction direction)
+{
+        BUG_ON(direction == DMA_NONE);
+        mn10300_dcache_flush_inv();
+        return virt_to_bus(ptr);
+}
+
+/*
+ * Unmap a single streaming mode DMA translation.  The dma_addr and size must
+ * match what was provided for in a previous pci_map_single call.  All other
+ * usages are undefined.
+ *
+ * After this call, reads by the cpu to the buffer are guarenteed to see
+ * whatever the device wrote there.
+ */
+static inline
+void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
+                      enum dma_data_direction direction)
+{
+        BUG_ON(direction == DMA_NONE);
+}
+
+/*
+ * Map a set of buffers described by scatterlist in streaming mode for DMA.
+ * This is the scather-gather version of the above pci_map_single interface.
+ * Here the scatter gather list elements are each tagged with the appropriate
+ * dma address and length.  They are obtained via sg_dma_{address,length}(SG).
+ *
+ * NOTE: An implementation may be able to use a smaller number of DMA
+ *       address/length pairs than there are SG table elements.  (for example
+ *       via virtual mapping capabilities) The routine returns the number of
+ *       addr/length pairs actually used, at most nents.
+ *
+ * Device ownership issues as mentioned above for pci_map_single are the same
+ * here.
+ */
+static inline
+int dma_map_sg(struct device *dev, struct scatterlist *sglist, int nents,
+               enum dma_data_direction direction)
+{
+        struct scatterlist *sg;
+        int i;
+
+        BUG_ON(!valid_dma_direction(direction));
+        WARN_ON(nents == 0 || sglist[0].length == 0);
+
+        for_each_sg(sglist, sg, nents, i) {
+                BUG_ON(!sg_page(sg));
+
+                sg->dma_address = sg_phys(sg);
+        }
+
+        mn10300_dcache_flush_inv();
+        return nents;
+}
+
+/*
+ * Unmap a set of streaming mode DMA translations.
+ * Again, cpu read rules concerning calls here are the same as for
+ * pci_unmap_single() above.
+ */
+static inline
+void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
+                  enum dma_data_direction direction)
+{
+        BUG_ON(!valid_dma_direction(direction));
+}
+
+/*
+ * pci_{map,unmap}_single_page maps a kernel page to a dma_addr_t. identical
+ * to pci_map_single, but takes a struct page instead of a virtual address
+ */
+static inline
+dma_addr_t dma_map_page(struct device *dev, struct page *page,
+                        unsigned long offset, size_t size,
+                        enum dma_data_direction direction)
+{
+        BUG_ON(direction == DMA_NONE);
+        return page_to_bus(page) + offset;
+}
+
+static inline
+void dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,
+                    enum dma_data_direction direction)
+{
+        BUG_ON(direction == DMA_NONE);
+}
+
+/*
+ * Make physical memory consistent for a single streaming mode DMA translation
+ * after a transfer.
+ *
+ * If you perform a pci_map_single() but wish to interrogate the buffer using
+ * the cpu, yet do not wish to teardown the PCI dma mapping, you must call this
+ * function before doing so.  At the next point you give the PCI dma address
+ * back to the card, the device again owns the buffer.
+ */
+static inline
+void dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle,
+                             size_t size, enum dma_data_direction direction)
+{
+}
+
+static inline
+void dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle,
+                                size_t size, enum dma_data_direction direction)
+{
+        mn10300_dcache_flush_inv();
+}
+
+static inline
+void dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle,
+                                   unsigned long offset, size_t size,
+                                   enum dma_data_direction direction)
+{
+}
+
+static inline void
+dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle,
+                                 unsigned long offset, size_t size,
+                                 enum dma_data_direction direction)
+{
+        mn10300_dcache_flush_inv();
+}
+
+
+/*
+ * Make physical memory consistent for a set of streaming mode DMA translations
+ * after a transfer.
+ *
+ * The same as pci_dma_sync_single but for a scatter-gather list, same rules
+ * and usage.
+ */
+static inline
+void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
+                         int nelems, enum dma_data_direction direction)
+{
+}
+
+static inline
+void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
+                            int nelems, enum dma_data_direction direction)
+{
+        mn10300_dcache_flush_inv();
+}
+
+static inline
+int dma_mapping_error(dma_addr_t dma_addr)
+{
+        return 0;
+}
+
+/*
+ * Return whether the given PCI device DMA address mask can be supported
+ * properly.  For example, if your device can only drive the low 24-bits during
+ * PCI bus mastering, then you would pass 0x00ffffff as the mask to this
+ * function.
+ */
+static inline
+int dma_supported(struct device *dev, u64 mask)
+{
+        /*
+         * we fall back to GFP_DMA when the mask isn't all 1s, so we can't
+         * guarantee allocations that must be within a tighter range than
+         * GFP_DMA
+         */
+        if (mask < 0x00ffffff)
+                return 0;
+        return 1;
+}
+
+static inline
+int dma_set_mask(struct device *dev, u64 mask)
+{
+        if (!dev->dma_mask || !dma_supported(dev, mask))
+                return -EIO;
+
+        *dev->dma_mask = mask;
+        return 0;
+}
+
+static inline
+int dma_get_cache_alignment(void)
+{
+        return 1 << L1_CACHE_SHIFT;
+}
+
+#define dma_is_consistent(d)    (1)
+
+static inline
+void dma_cache_sync(void *vaddr, size_t size,
+                    enum dma_data_direction direction)
+{
+        mn10300_dcache_flush_inv();
+}
+
+#endif
diff --git a/include/asm-mn10300/dma.h b/include/asm-mn10300/dma.h
new file mode 100644
index 000000000000..098df2e617ab
--- /dev/null
+++ b/include/asm-mn10300/dma.h
@@ -0,0 +1,118 @@
+/* MN10300 ISA DMA handlers and definitions
+ *
+ * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_DMA_H
+#define _ASM_DMA_H
+
+#include <asm/system.h>
+#include <linux/spinlock.h>
+#include <asm/io.h>
+#include <linux/delay.h>
+
+#undef MAX_DMA_CHANNELS         /* switch off linux/kernel/dma.c */
+#define MAX_DMA_ADDRESS         0xbfffffff
+
+extern spinlock_t dma_spin_lock;
+
+static inline unsigned long claim_dma_lock(void)
+{
+        unsigned long flags;
+        spin_lock_irqsave(&dma_spin_lock, flags);
+        return flags;
+}
+
+static inline void release_dma_lock(unsigned long flags)
+{
+        spin_unlock_irqrestore(&dma_spin_lock, flags);
+}
+
+/* enable/disable a specific DMA channel */
+static inline void enable_dma(unsigned int dmanr)
+{
+}
+
+static inline void disable_dma(unsigned int dmanr)
+{
+}
+
+/* Clear the 'DMA Pointer Flip Flop'.
+ * Write 0 for LSB/MSB, 1 for MSB/LSB access.
+ * Use this once to initialize the FF to a known state.
+ * After that, keep track of it. :-)
+ * --- In order to do that, the DMA routines below should ---
+ * --- only be used while holding the DMA lock ! ---
+ */
+static inline void clear_dma_ff(unsigned int dmanr)
+{
+}
+
+/* set mode (above) for a specific DMA channel */
+static inline void set_dma_mode(unsigned int dmanr, char mode)
+{
+}
+
+/* Set only the page register bits of the transfer address.
+ * This is used for successive transfers when we know the contents of
+ * the lower 16 bits of the DMA current address register, but a 64k boundary
+ * may have been crossed.
+ */
+static inline void set_dma_page(unsigned int dmanr, char pagenr)
+{
+}
+
+
+/* Set transfer address & page bits for specific DMA channel.
+ * Assumes dma flipflop is clear.
+ */
+static inline void set_dma_addr(unsigned int dmanr, unsigned int a)
+{
+}
+
+
+/* Set transfer size (max 64k for DMA1..3, 128k for DMA5..7) for
+ * a specific DMA channel.
+ * You must ensure the parameters are valid.
+ * NOTE: from a manual: "the number of transfers is one more
+ * than the initial word count"! This is taken into account.
+ * Assumes dma flip-flop is clear.
+ * NOTE 2: "count" represents _bytes_ and must be even for channels 5-7.
+ */
+static inline void set_dma_count(unsigned int dmanr, unsigned int count)
+{
+}
+
+
+/* Get DMA residue count. After a DMA transfer, this
+ * should return zero. Reading this while a DMA transfer is
+ * still in progress will return unpredictable results.
+ * If called before the channel has been used, it may return 1.
+ * Otherwise, it returns the number of _bytes_ left to transfer.
+ *
+ * Assumes DMA flip-flop is clear.
+ */
+static inline int get_dma_residue(unsigned int dmanr)
+{
+        return 0;
+}
+
+
+/* These are in kernel/dma.c: */
+extern int request_dma(unsigned int dmanr, const char *device_id);
+extern void free_dma(unsigned int dmanr);
+
+/* From PCI */
+
+#ifdef CONFIG_PCI
+extern int isa_dma_bridge_buggy;
+#else
+#define isa_dma_bridge_buggy    (0)
+#endif
+
+#endif /* _ASM_DMA_H */
diff --git a/include/asm-mn10300/dmactl-regs.h b/include/asm-mn10300/dmactl-regs.h
new file mode 100644
index 000000000000..58a199da0f4a
--- /dev/null
+++ b/include/asm-mn10300/dmactl-regs.h
@@ -0,0 +1,101 @@
+/* MN10300 on-board DMA controller registers
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_DMACTL_REGS_H
+#define _ASM_DMACTL_REGS_H
+
+#include <asm/cpu-regs.h>
+
+#ifdef __KERNEL__
+
+/* DMA registers */
+#define DMxCTR(N)               __SYSREG(0xd2000000 + ((N) * 0x100), u32)       /* control reg */
+#define DMxCTR_BG               0x0000001f      /* transfer request source */
+#define DMxCTR_BG_SOFT          0x00000000      /* - software source */
+#define DMxCTR_BG_SC0TX         0x00000002      /* - serial port 0 transmission */
+#define DMxCTR_BG_SC0RX         0x00000003      /* - serial port 0 reception */
+#define DMxCTR_BG_SC1TX         0x00000004      /* - serial port 1 transmission */
+#define DMxCTR_BG_SC1RX         0x00000005      /* - serial port 1 reception */
+#define DMxCTR_BG_SC2TX         0x00000006      /* - serial port 2 transmission */
+#define DMxCTR_BG_SC2RX         0x00000007      /* - serial port 2 reception */
+#define DMxCTR_BG_TM0UFLOW      0x00000008      /* - timer 0 underflow */
+#define DMxCTR_BG_TM1UFLOW      0x00000009      /* - timer 1 underflow */
+#define DMxCTR_BG_TM2UFLOW      0x0000000a      /* - timer 2 underflow */
+#define DMxCTR_BG_TM3UFLOW      0x0000000b      /* - timer 3 underflow */
+#define DMxCTR_BG_TM6ACMPCAP    0x0000000c      /* - timer 6A compare/capture */
+#define DMxCTR_BG_AFE           0x0000000d      /* - analogue front-end interrupt source */
+#define DMxCTR_BG_ADC           0x0000000e      /* - A/D conversion end interrupt source */
+#define DMxCTR_BG_IRDA          0x0000000f      /* - IrDA interrupt source */
+#define DMxCTR_BG_RTC           0x00000010      /* - RTC interrupt source */
+#define DMxCTR_BG_XIRQ0         0x00000011      /* - XIRQ0 pin interrupt source */
+#define DMxCTR_BG_XIRQ1         0x00000012      /* - XIRQ1 pin interrupt source */
+#define DMxCTR_BG_XDMR0         0x00000013      /* - external request 0 source (XDMR0 pin) */
+#define DMxCTR_BG_XDMR1         0x00000014      /* - external request 1 source (XDMR1 pin) */
+#define DMxCTR_SAM              0x000000e0      /* DMA transfer src addr mode */
+#define DMxCTR_SAM_INCR         0x00000000      /* - increment */
+#define DMxCTR_SAM_DECR         0x00000020      /* - decrement */
+#define DMxCTR_SAM_FIXED        0x00000040      /* - fixed */
+#define DMxCTR_DAM              0x00000000      /* DMA transfer dest addr mode */
+#define DMxCTR_DAM_INCR         0x00000000      /* - increment */
+#define DMxCTR_DAM_DECR         0x00000100      /* - decrement */
+#define DMxCTR_DAM_FIXED        0x00000200      /* - fixed */
+#define DMxCTR_TM               0x00001800      /* DMA transfer mode */
+#define DMxCTR_TM_BATCH         0x00000000      /* - batch transfer */
+#define DMxCTR_TM_INTERM        0x00001000      /* - intermittent transfer */
+#define DMxCTR_UT               0x00006000      /* DMA transfer unit */
+#define DMxCTR_UT_1             0x00000000      /* - 1 byte */
+#define DMxCTR_UT_2             0x00002000      /* - 2 byte */
+#define DMxCTR_UT_4             0x00004000      /* - 4 byte */
+#define DMxCTR_UT_16            0x00006000      /* - 16 byte */
+#define DMxCTR_TEN              0x00010000      /* DMA channel transfer enable */
+#define DMxCTR_RQM              0x00060000      /* external request input source mode */
+#define DMxCTR_RQM_FALLEDGE     0x00000000      /* - falling edge */
+#define DMxCTR_RQM_RISEEDGE     0x00020000      /* - rising edge */
+#define DMxCTR_RQM_LOLEVEL      0x00040000      /* - low level */
+#define DMxCTR_RQM_HILEVEL      0x00060000      /* - high level */
+#define DMxCTR_RQF              0x01000000      /* DMA transfer request flag */
+#define DMxCTR_XEND             0x80000000      /* DMA transfer end flag */
+
+#define DMxSRC(N)               __SYSREG(0xd2000004 + ((N) * 0x100), u32)       /* control reg */
+
+#define DMxDST(N)               __SYSREG(0xd2000008 + ((N) * 0x100), u32)       /* src addr reg */
+
+#define DMxSIZ(N)               __SYSREG(0xd200000c + ((N) * 0x100), u32)       /* dest addr reg */
+#define DMxSIZ_CT               0x000fffff      /* number of bytes to transfer */
+
+#define DMxCYC(N)               __SYSREG(0xd2000010 + ((N) * 0x100), u32)       /* intermittent
+                                                                                 * size reg */
+#define DMxCYC_CYC              0x000000ff      /* number of interrmittent transfers -1 */
+
+#define DM0IRQ                  16              /* DMA channel 0 complete IRQ */
+#define DM1IRQ                  17              /* DMA channel 1 complete IRQ */
+#define DM2IRQ                  18              /* DMA channel 2 complete IRQ */
+#define DM3IRQ                  19              /* DMA channel 3 complete IRQ */
+
+#define DM0ICR                  GxICR(DM0IRQ)   /* DMA channel 0 complete intr ctrl reg */
+#define DM1ICR                  GxICR(DM0IR1)   /* DMA channel 1 complete intr ctrl reg */
+#define DM2ICR                  GxICR(DM0IR2)   /* DMA channel 2 complete intr ctrl reg */
+#define DM3ICR                  GxICR(DM0IR3)   /* DMA channel 3 complete intr ctrl reg */
+
+#ifndef __ASSEMBLY__
+
+struct mn10300_dmactl_regs {
+        u32             ctr;
+        const void      *src;
+        void            *dst;
+        u32             siz;
+        u32             cyc;
+} __attribute__((aligned(0x100)));
+
+#endif /* __ASSEMBLY__ */
+
+#endif /* __KERNEL__ */
+
+#endif /* _ASM_DMACTL_REGS_H */
diff --git a/include/asm-mn10300/elf.h b/include/asm-mn10300/elf.h
new file mode 100644
index 000000000000..256a70466ca4
--- /dev/null
+++ b/include/asm-mn10300/elf.h
@@ -0,0 +1,147 @@
+/* MN10300 ELF constant and register definitions
+ *
+ * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_ELF_H
+#define _ASM_ELF_H
+
+#include <linux/utsname.h>
+#include <asm/ptrace.h>
+#include <asm/user.h>
+
+/*
+ * AM33 relocations
+ */
+#define R_MN10300_NONE          0       /* No reloc.  */
+#define R_MN10300_32            1       /* Direct 32 bit.  */
+#define R_MN10300_16            2       /* Direct 16 bit.  */
+#define R_MN10300_8             3       /* Direct 8 bit.  */
+#define R_MN10300_PCREL32       4       /* PC-relative 32-bit.  */
+#define R_MN10300_PCREL16       5       /* PC-relative 16-bit signed.  */
+#define R_MN10300_PCREL8        6       /* PC-relative 8-bit signed.  */
+#define R_MN10300_24            9       /* Direct 24 bit.  */
+#define R_MN10300_RELATIVE      23      /* Adjust by program base.  */
+
+/*
+ * ELF register definitions..
+ */
+typedef unsigned long elf_greg_t;
+
+#define ELF_NGREG (sizeof (struct pt_regs) / sizeof(elf_greg_t))
+typedef elf_greg_t elf_gregset_t[ELF_NGREG];
+
+#define ELF_NFPREG 32
+typedef float elf_fpreg_t;
+
+typedef struct {
+        elf_fpreg_t     fpregs[ELF_NFPREG];
+        u_int32_t       fpcr;
+} elf_fpregset_t;
+
+extern int dump_fpu(struct pt_regs *, elf_fpregset_t *);
+
+/*
+ * This is used to ensure we don't load something for the wrong architecture
+ */
+#define elf_check_arch(x) \
+        (((x)->e_machine == EM_CYGNUS_MN10300) ||       \
+         ((x)->e_machine == EM_MN10300))
+
+/*
+ * These are used to set parameters in the core dumps.
+ */
+#define ELF_CLASS       ELFCLASS32
+#define ELF_DATA        ELFDATA2LSB
+#define ELF_ARCH        EM_MN10300
+
+/*
+ * ELF process initialiser
+ */
+#define ELF_PLAT_INIT(_r, load_addr)                                    \
+do {                                                                    \
+        struct pt_regs *_ur = current->thread.uregs;                    \
+        _ur->a3   = 0;  _ur->a2   = 0;  _ur->d3   = 0;  _ur->d2   = 0;  \
+        _ur->mcvf = 0;  _ur->mcrl = 0;  _ur->mcrh = 0;  _ur->mdrq = 0;  \
+        _ur->e1   = 0;  _ur->e0   = 0;  _ur->e7   = 0;  _ur->e6   = 0;  \
+        _ur->e5   = 0;  _ur->e4   = 0;  _ur->e3   = 0;  _ur->e2   = 0;  \
+        _ur->lar  = 0;  _ur->lir  = 0;  _ur->mdr  = 0;                  \
+        _ur->a1   = 0;  _ur->a0   = 0;  _ur->d1   = 0;  _ur->d0   = 0;  \
+} while (0)
+
+#define USE_ELF_CORE_DUMP
+#define ELF_EXEC_PAGESIZE       4096
+
+/*
+ * This is the location that an ET_DYN program is loaded if exec'ed.  Typical
+ * use of this is to invoke "./ld.so someprog" to test out a new version of
+ * the loader.  We need to make sure that it is out of the way of the program
+ * that it will "exec", and that there is sufficient room for the brk.
+ * - must clear the VMALLOC area
+ */
+#define ELF_ET_DYN_BASE         0x04000000
+
+/*
+ * regs is struct pt_regs, pr_reg is elf_gregset_t (which is
+ * now struct user_regs, they are different)
+ * - ELF_CORE_COPY_REGS has been guessed, and may be wrong
+ */
+#define ELF_CORE_COPY_REGS(pr_reg, regs)        \
+do {                                            \
+        pr_reg[0]       = regs->a3;             \
+        pr_reg[1]       = regs->a2;             \
+        pr_reg[2]       = regs->d3;             \
+        pr_reg[3]       = regs->d2;             \
+        pr_reg[4]       = regs->mcvf;           \
+        pr_reg[5]       = regs->mcrl;           \
+        pr_reg[6]       = regs->mcrh;           \
+        pr_reg[7]       = regs->mdrq;           \
+        pr_reg[8]       = regs->e1;             \
+        pr_reg[9]       = regs->e0;             \
+        pr_reg[10]      = regs->e7;             \
+        pr_reg[11]      = regs->e6;             \
+        pr_reg[12]      = regs->e5;             \
+        pr_reg[13]      = regs->e4;             \
+        pr_reg[14]      = regs->e3;             \
+        pr_reg[15]      = regs->e2;             \
+        pr_reg[16]      = regs->sp;             \
+        pr_reg[17]      = regs->lar;            \
+        pr_reg[18]      = regs->lir;            \
+        pr_reg[19]      = regs->mdr;            \
+        pr_reg[20]      = regs->a1;             \
+        pr_reg[21]      = regs->a0;             \
+        pr_reg[22]      = regs->d1;             \
+        pr_reg[23]      = regs->d0;             \
+        pr_reg[24]      = regs->orig_d0;        \
+        pr_reg[25]      = regs->epsw;           \
+        pr_reg[26]      = regs->pc;             \
+} while (0);
+
+/*
+ * This yields a mask that user programs can use to figure out what
+ * instruction set this CPU supports.  This could be done in user space,
+ * but it's not easy, and we've already done it here.
+ */
+#define ELF_HWCAP       (0)
+
+/*
+ * This yields a string that ld.so will use to load implementation
+ * specific libraries for optimization.  This is more specific in
+ * intent than poking at uname or /proc/cpuinfo.
+ *
+ * For the moment, we have only optimizations for the Intel generations,
+ * but that could change...
+ */
+#define ELF_PLATFORM  (NULL)
+
+#ifdef __KERNEL__
+#define SET_PERSONALITY(ex, ibcs2) set_personality(PER_LINUX)
+#endif
+
+#endif /* _ASM_ELF_H */
diff --git a/include/asm-mn10300/emergency-restart.h b/include/asm-mn10300/emergency-restart.h
new file mode 100644
index 000000000000..3711bd9d50bd
--- /dev/null
+++ b/include/asm-mn10300/emergency-restart.h
@@ -0,0 +1 @@
+#include <asm-generic/emergency-restart.h>
diff --git a/include/asm-mn10300/errno.h b/include/asm-mn10300/errno.h
new file mode 100644
index 000000000000..4c82b503d92f
--- /dev/null
+++ b/include/asm-mn10300/errno.h
@@ -0,0 +1 @@
+#include <asm-generic/errno.h>
diff --git a/include/asm-mn10300/exceptions.h b/include/asm-mn10300/exceptions.h
new file mode 100644
index 000000000000..fa16466ef3f9
--- /dev/null
+++ b/include/asm-mn10300/exceptions.h
@@ -0,0 +1,121 @@
+/* MN10300 Microcontroller core exceptions
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_EXCEPTIONS_H
+#define _ASM_EXCEPTIONS_H
+
+#include <linux/linkage.h>
+
+/*
+ * define the breakpoint instruction opcode to use
+ * - note that the JTAG unit steals 0xFF, so we want to avoid that if we can
+ *   (can use 0xF7)
+ */
+#define GDBSTUB_BKPT            0xFF
+
+#ifndef __ASSEMBLY__
+
+/*
+ * enumeration of exception codes (as extracted from TBR MSW)
+ */
+enum exception_code {
+        EXCEP_RESET             = 0x000000,     /* reset */
+
+        /* MMU exceptions */
+        EXCEP_ITLBMISS          = 0x000100,     /* instruction TLB miss */
+        EXCEP_DTLBMISS          = 0x000108,     /* data TLB miss */
+        EXCEP_IAERROR           = 0x000110,     /* instruction address */
+        EXCEP_DAERROR           = 0x000118,     /* data address */
+
+        /* system exceptions */
+        EXCEP_TRAP              = 0x000128,     /* program interrupt (PI instruction) */
+        EXCEP_ISTEP             = 0x000130,     /* single step */
+        EXCEP_IBREAK            = 0x000150,     /* instruction breakpoint */
+        EXCEP_OBREAK            = 0x000158,     /* operand breakpoint */
+        EXCEP_PRIVINS           = 0x000160,     /* privileged instruction execution */
+        EXCEP_UNIMPINS          = 0x000168,     /* unimplemented instruction execution */
+        EXCEP_UNIMPEXINS        = 0x000170,     /* unimplemented extended instruction execution */
+        EXCEP_MEMERR            = 0x000178,     /* illegal memory access */
+        EXCEP_MISALIGN          = 0x000180,     /* misalignment */
+        EXCEP_BUSERROR          = 0x000188,     /* bus error */
+        EXCEP_ILLINSACC         = 0x000190,     /* illegal instruction access */
+        EXCEP_ILLDATACC         = 0x000198,     /* illegal data access */
+        EXCEP_IOINSACC          = 0x0001a0,     /* I/O space instruction access */
+        EXCEP_PRIVINSACC        = 0x0001a8,     /* privileged space instruction access */
+        EXCEP_PRIVDATACC        = 0x0001b0,     /* privileged space data access */
+        EXCEP_DATINSACC         = 0x0001b8,     /* data space instruction access */
+        EXCEP_DOUBLE_FAULT      = 0x000200,     /* double fault */
+
+        /* FPU exceptions */
+        EXCEP_FPU_DISABLED      = 0x0001c0,     /* FPU disabled */
+        EXCEP_FPU_UNIMPINS      = 0x0001c8,     /* FPU unimplemented operation */
+        EXCEP_FPU_OPERATION     = 0x0001d0,     /* FPU operation */
+
+        /* interrupts */
+        EXCEP_WDT               = 0x000240,     /* watchdog timer overflow */
+        EXCEP_NMI               = 0x000248,     /* non-maskable interrupt */
+        EXCEP_IRQ_LEVEL0        = 0x000280,     /* level 0 maskable interrupt */
+        EXCEP_IRQ_LEVEL1        = 0x000288,     /* level 1 maskable interrupt */
+        EXCEP_IRQ_LEVEL2        = 0x000290,     /* level 2 maskable interrupt */
+        EXCEP_IRQ_LEVEL3        = 0x000298,     /* level 3 maskable interrupt */
+        EXCEP_IRQ_LEVEL4        = 0x0002a0,     /* level 4 maskable interrupt */
+        EXCEP_IRQ_LEVEL5        = 0x0002a8,     /* level 5 maskable interrupt */
+        EXCEP_IRQ_LEVEL6        = 0x0002b0,     /* level 6 maskable interrupt */
+
+        /* system calls */
+        EXCEP_SYSCALL0          = 0x000300,     /* system call 0 */
+        EXCEP_SYSCALL1          = 0x000308,     /* system call 1 */
+        EXCEP_SYSCALL2          = 0x000310,     /* system call 2 */
+        EXCEP_SYSCALL3          = 0x000318,     /* system call 3 */
+        EXCEP_SYSCALL4          = 0x000320,     /* system call 4 */
+        EXCEP_SYSCALL5          = 0x000328,     /* system call 5 */
+        EXCEP_SYSCALL6          = 0x000330,     /* system call 6 */
+        EXCEP_SYSCALL7          = 0x000338,     /* system call 7 */
+        EXCEP_SYSCALL8          = 0x000340,     /* system call 8 */
+        EXCEP_SYSCALL9          = 0x000348,     /* system call 9 */
+        EXCEP_SYSCALL10         = 0x000350,     /* system call 10 */
+        EXCEP_SYSCALL11         = 0x000358,     /* system call 11 */
+        EXCEP_SYSCALL12         = 0x000360,     /* system call 12 */
+        EXCEP_SYSCALL13         = 0x000368,     /* system call 13 */
+        EXCEP_SYSCALL14         = 0x000370,     /* system call 14 */
+        EXCEP_SYSCALL15         = 0x000378,     /* system call 15 */
+};
+
+extern void __set_intr_stub(enum exception_code code, void *handler);
+extern void set_intr_stub(enum exception_code code, void *handler);
+extern void set_jtag_stub(enum exception_code code, void *handler);
+
+struct pt_regs;
+
+extern asmlinkage void __common_exception(void);
+extern asmlinkage void itlb_miss(void);
+extern asmlinkage void dtlb_miss(void);
+extern asmlinkage void itlb_aerror(void);
+extern asmlinkage void dtlb_aerror(void);
+extern asmlinkage void raw_bus_error(void);
+extern asmlinkage void double_fault(void);
+extern asmlinkage int  system_call(struct pt_regs *);
+extern asmlinkage void fpu_exception(struct pt_regs *, enum exception_code);
+extern asmlinkage void nmi(struct pt_regs *, enum exception_code);
+extern asmlinkage void uninitialised_exception(struct pt_regs *,
+                                               enum exception_code);
+extern asmlinkage void irq_handler(void);
+extern asmlinkage void profile_handler(void);
+extern asmlinkage void nmi_handler(void);
+extern asmlinkage void misalignment(struct pt_regs *, enum exception_code);
+
+extern void die(const char *, struct pt_regs *, enum exception_code)
+        ATTRIB_NORET;
+
+extern int die_if_no_fixup(const char *, struct pt_regs *, enum exception_code);
+
+#endif /* __ASSEMBLY__ */
+
+#endif /* _ASM_EXCEPTIONS_H */
diff --git a/include/asm-mn10300/fb.h b/include/asm-mn10300/fb.h
new file mode 100644
index 000000000000..697b24a91e1a
--- /dev/null
+++ b/include/asm-mn10300/fb.h
@@ -0,0 +1,23 @@
+/* MN10300 Frame buffer stuff
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_FB_H
+#define _ASM_FB_H
+
+#include <linux/fb.h>
+
+#define fb_pgprotect(...) do {} while (0)
+
+static inline int fb_is_primary_device(struct fb_info *info)
+{
+        return 0;
+}
+
+#endif /* _ASM_FB_H */
diff --git a/include/asm-mn10300/fcntl.h b/include/asm-mn10300/fcntl.h
new file mode 100644
index 000000000000..46ab12db5739
--- /dev/null
+++ b/include/asm-mn10300/fcntl.h
@@ -0,0 +1 @@
+#include <asm-generic/fcntl.h>
diff --git a/include/asm-mn10300/fpu.h b/include/asm-mn10300/fpu.h
new file mode 100644
index 000000000000..64a2b83a7a6a
--- /dev/null
+++ b/include/asm-mn10300/fpu.h
@@ -0,0 +1,85 @@
+/* MN10300 FPU definitions
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ * Derived from include/asm-i386/i387.h: Copyright (C) 1994 Linus Torvalds
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_FPU_H
+#define _ASM_FPU_H
+
+#include <asm/processor.h>
+#include <asm/sigcontext.h>
+#include <asm/user.h>
+
+#ifdef __KERNEL__
+
+/* the task that owns the FPU state */
+extern struct task_struct *fpu_state_owner;
+
+#define set_using_fpu(tsk)                              \
+do {                                                    \
+        (tsk)->thread.fpu_flags |= THREAD_USING_FPU;    \
+} while (0)
+
+#define clear_using_fpu(tsk)                            \
+do {                                                    \
+        (tsk)->thread.fpu_flags &= ~THREAD_USING_FPU;   \
+} while (0)
+
+#define is_using_fpu(tsk) ((tsk)->thread.fpu_flags & THREAD_USING_FPU)
+
+#define unlazy_fpu(tsk)                                 \
+do {                                                    \
+        preempt_disable();                              \
+        if (fpu_state_owner == (tsk))                   \
+                fpu_save(&tsk->thread.fpu_state);       \
+        preempt_enable();                               \
+} while (0)
+
+#define exit_fpu()                              \
+do {                                            \
+        struct task_struct *__tsk = current;    \
+        preempt_disable();                      \
+        if (fpu_state_owner == __tsk)           \
+                fpu_state_owner = NULL;         \
+        preempt_enable();                       \
+} while (0)
+
+#define flush_fpu()                                     \
+do {                                                    \
+        struct task_struct *__tsk = current;            \
+        preempt_disable();                              \
+        if (fpu_state_owner == __tsk) {                 \
+                fpu_state_owner = NULL;                 \
+                __tsk->thread.uregs->epsw &= ~EPSW_FE;  \
+        }                                               \
+        preempt_enable();                               \
+        clear_using_fpu(__tsk);                         \
+} while (0)
+
+extern asmlinkage void fpu_init_state(void);
+extern asmlinkage void fpu_kill_state(struct task_struct *);
+extern asmlinkage void fpu_disabled(struct pt_regs *, enum exception_code);
+extern asmlinkage void fpu_exception(struct pt_regs *, enum exception_code);
+
+#ifdef CONFIG_FPU
+extern asmlinkage void fpu_save(struct fpu_state_struct *);
+extern asmlinkage void fpu_restore(struct fpu_state_struct *);
+#else
+#define fpu_save(a)
+#define fpu_restore(a)
+#endif /* CONFIG_FPU  */
+
+/*
+ * signal frame handlers
+ */
+extern int fpu_setup_sigcontext(struct fpucontext *buf);
+extern int fpu_restore_sigcontext(struct fpucontext *buf);
+
+#endif /* __KERNEL__ */
+#endif /* _ASM_FPU_H */
diff --git a/include/asm-mn10300/frame.inc b/include/asm-mn10300/frame.inc
new file mode 100644
index 000000000000..5b1949bdf039
--- /dev/null
+++ b/include/asm-mn10300/frame.inc
@@ -0,0 +1,91 @@
+/* MN10300 Microcontroller core system register definitions -*- asm -*-
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_FRAME_INC
+#define _ASM_FRAME_INC
+
+#ifndef __ASSEMBLY__
+#error not for use in C files
+#endif
+
+#ifndef __ASM_OFFSETS_H__
+#include <asm/asm-offsets.h>
+#endif
+
+#define pi break
+
+#define fp a3
+
+###############################################################################
+#
+# build a stack frame from the registers
+# - the caller has subtracted 4 from SP before coming here
+#
+###############################################################################
+.macro SAVE_ALL
+        add     -4,sp                           # next exception frame ptr save area
+        movm    [other],(sp)
+        mov     usp,a1
+        mov     a1,(sp)                         # USP in MOVM[other] dummy slot
+        movm    [d2,d3,a2,a3,exreg0,exreg1,exother],(sp)
+        mov     sp,fp                           # FRAME pointer in A3
+        add     -12,sp                          # allow for calls to be made
+        mov     (__frame),a1
+        mov     a1,(REG_NEXT,fp)
+        mov     fp,(__frame)
+
+        and     ~EPSW_FE,epsw                   # disable the FPU inside the kernel
+
+        # we may be holding current in E2
+#ifdef CONFIG_MN10300_CURRENT_IN_E2
+        mov     (__current),e2
+#endif
+.endm
+
+###############################################################################
+#
+# restore the registers from a stack frame
+#
+###############################################################################
+.macro RESTORE_ALL
+        # peel back the stack to the calling frame
+        # - this permits execve() to discard extra frames due to kernel syscalls
+        mov     (__frame),fp
+        mov     fp,sp
+        mov     (REG_NEXT,fp),d0                # userspace has regs->next == 0
+        mov     d0,(__frame)
+
+#ifndef CONFIG_MN10300_USING_JTAG
+        mov     (REG_EPSW,fp),d0
+        btst    EPSW_T,d0
+        beq     99f
+
+        or      EPSW_NMID,epsw
+        movhu   (DCR),d1
+        or      0x0001, d1
+        movhu   d1,(DCR)
+
+99:
+#endif
+        movm    (sp),[d2,d3,a2,a3,exreg0,exreg1,exother]
+
+        # must restore usp even if returning to kernel space,
+        # when CONFIG_PREEMPT is enabled.
+        mov     (sp),a1                         # USP in MOVM[other] dummy slot
+        mov     a1,usp
+
+        movm    (sp),[other]
+        add     8,sp
+        rti
+
+.endm
+
+
+#endif /* _ASM_FRAME_INC */
diff --git a/include/asm-mn10300/futex.h b/include/asm-mn10300/futex.h
new file mode 100644
index 000000000000..0b745828f42b
--- /dev/null
+++ b/include/asm-mn10300/futex.h
@@ -0,0 +1 @@
+#include <asm-generic/futex.h>
diff --git a/include/asm-mn10300/gdb-stub.h b/include/asm-mn10300/gdb-stub.h
new file mode 100644
index 000000000000..e5a6368559af
--- /dev/null
+++ b/include/asm-mn10300/gdb-stub.h
@@ -0,0 +1,183 @@
+/* MN10300 Kernel GDB stub definitions
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ * - Derived from asm-mips/gdb-stub.h (c) 1995 Andreas Busse
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_GDB_STUB_H
+#define _ASM_GDB_STUB_H
+
+#include <asm/exceptions.h>
+
+/*
+ * register ID numbers in GDB remote protocol
+ */
+
+#define GDB_REGID_PC            9
+#define GDB_REGID_FP            7
+#define GDB_REGID_SP            8
+
+/*
+ * virtual stack layout for the GDB exception handler
+ */
+#define NUMREGS                 64
+
+#define GDB_FR_D0               (0 * 4)
+#define GDB_FR_D1               (1 * 4)
+#define GDB_FR_D2               (2 * 4)
+#define GDB_FR_D3               (3 * 4)
+#define GDB_FR_A0               (4 * 4)
+#define GDB_FR_A1               (5 * 4)
+#define GDB_FR_A2               (6 * 4)
+#define GDB_FR_A3               (7 * 4)
+
+#define GDB_FR_SP               (8 * 4)
+#define GDB_FR_PC               (9 * 4)
+#define GDB_FR_MDR              (10 * 4)
+#define GDB_FR_EPSW             (11 * 4)
+#define GDB_FR_LIR              (12 * 4)
+#define GDB_FR_LAR              (13 * 4)
+#define GDB_FR_MDRQ             (14 * 4)
+
+#define GDB_FR_E0               (15 * 4)
+#define GDB_FR_E1               (16 * 4)
+#define GDB_FR_E2               (17 * 4)
+#define GDB_FR_E3               (18 * 4)
+#define GDB_FR_E4               (19 * 4)
+#define GDB_FR_E5               (20 * 4)
+#define GDB_FR_E6               (21 * 4)
+#define GDB_FR_E7               (22 * 4)
+
+#define GDB_FR_SSP              (23 * 4)
+#define GDB_FR_MSP              (24 * 4)
+#define GDB_FR_USP              (25 * 4)
+#define GDB_FR_MCRH             (26 * 4)
+#define GDB_FR_MCRL             (27 * 4)
+#define GDB_FR_MCVF             (28 * 4)
+
+#define GDB_FR_FPCR             (29 * 4)
+#define GDB_FR_DUMMY0           (30 * 4)
+#define GDB_FR_DUMMY1           (31 * 4)
+
+#define GDB_FR_FS0              (32 * 4)
+
+#define GDB_FR_SIZE             (NUMREGS * 4)
+
+#ifndef __ASSEMBLY__
+
+/*
+ * This is the same as above, but for the high-level
+ * part of the GDB stub.
+ */
+
+struct gdb_regs {
+        /* saved main processor registers */
+        u32     d0, d1, d2, d3, a0, a1, a2, a3;
+        u32     sp, pc, mdr, epsw, lir, lar, mdrq;
+        u32     e0, e1, e2, e3, e4, e5, e6, e7;
+        u32     ssp, msp, usp, mcrh, mcrl, mcvf;
+
+        /* saved floating point registers */
+        u32     fpcr, _dummy0, _dummy1;
+        u32     fs0,  fs1,  fs2,  fs3,  fs4,  fs5,  fs6,  fs7;
+        u32     fs8,  fs9,  fs10, fs11, fs12, fs13, fs14, fs15;
+        u32     fs16, fs17, fs18, fs19, fs20, fs21, fs22, fs23;
+        u32     fs24, fs25, fs26, fs27, fs28, fs29, fs30, fs31;
+};
+
+/*
+ * Prototypes
+ */
+extern void show_registers_only(struct pt_regs *regs);
+
+extern asmlinkage void gdbstub_init(void);
+extern asmlinkage void gdbstub_exit(int status);
+extern asmlinkage void gdbstub_io_init(void);
+extern asmlinkage void gdbstub_io_set_baud(unsigned baud);
+extern asmlinkage int  gdbstub_io_rx_char(unsigned char *_ch, int nonblock);
+extern asmlinkage void gdbstub_io_tx_char(unsigned char ch);
+extern asmlinkage void gdbstub_io_tx_flush(void);
+
+extern asmlinkage void gdbstub_io_rx_handler(void);
+extern asmlinkage void gdbstub_rx_irq(struct pt_regs *, enum exception_code);
+extern asmlinkage int  gdbstub_intercept(struct pt_regs *, enum exception_code);
+extern asmlinkage void gdbstub_exception(struct pt_regs *, enum exception_code);
+extern asmlinkage void __gdbstub_bug_trap(void);
+extern asmlinkage void __gdbstub_pause(void);
+extern asmlinkage void start_kernel(void);
+
+#ifndef CONFIG_MN10300_CACHE_DISABLED
+extern asmlinkage void gdbstub_purge_cache(void);
+#else
+#define gdbstub_purge_cache()   do {} while (0)
+#endif
+
+/* Used to prevent crashes in memory access */
+extern asmlinkage int  gdbstub_read_byte(const u8 *, u8 *);
+extern asmlinkage int  gdbstub_read_word(const u8 *, u8 *);
+extern asmlinkage int  gdbstub_read_dword(const u8 *, u8 *);
+extern asmlinkage int  gdbstub_write_byte(u32, u8 *);
+extern asmlinkage int  gdbstub_write_word(u32, u8 *);
+extern asmlinkage int  gdbstub_write_dword(u32, u8 *);
+
+extern asmlinkage void gdbstub_read_byte_guard(void);
+extern asmlinkage void gdbstub_read_byte_cont(void);
+extern asmlinkage void gdbstub_read_word_guard(void);
+extern asmlinkage void gdbstub_read_word_cont(void);
+extern asmlinkage void gdbstub_read_dword_guard(void);
+extern asmlinkage void gdbstub_read_dword_cont(void);
+extern asmlinkage void gdbstub_write_byte_guard(void);
+extern asmlinkage void gdbstub_write_byte_cont(void);
+extern asmlinkage void gdbstub_write_word_guard(void);
+extern asmlinkage void gdbstub_write_word_cont(void);
+extern asmlinkage void gdbstub_write_dword_guard(void);
+extern asmlinkage void gdbstub_write_dword_cont(void);
+
+extern u8       gdbstub_rx_buffer[PAGE_SIZE];
+extern u32      gdbstub_rx_inp;
+extern u32      gdbstub_rx_outp;
+extern u8       gdbstub_rx_overflow;
+extern u8       gdbstub_busy;
+extern u8       gdbstub_rx_unget;
+
+#ifdef CONFIG_GDBSTUB_DEBUGGING
+extern void gdbstub_printk(const char *fmt, ...)
+        __attribute__((format(printf, 1, 2)));
+#else
+static inline __attribute__((format(printf, 1, 2)))
+void gdbstub_printk(const char *fmt, ...)
+{
+}
+#endif
+
+#ifdef CONFIG_GDBSTUB_DEBUG_ENTRY
+#define gdbstub_entry(FMT, ...) gdbstub_printk(FMT, ##__VA_ARGS__)
+#else
+#define gdbstub_entry(FMT, ...) ({ 0; })
+#endif
+
+#ifdef CONFIG_GDBSTUB_DEBUG_PROTOCOL
+#define gdbstub_proto(FMT, ...) gdbstub_printk(FMT, ##__VA_ARGS__)
+#else
+#define gdbstub_proto(FMT, ...) ({ 0; })
+#endif
+
+#ifdef CONFIG_GDBSTUB_DEBUG_IO
+#define gdbstub_io(FMT, ...) gdbstub_printk(FMT, ##__VA_ARGS__)
+#else
+#define gdbstub_io(FMT, ...) ({ 0; })
+#endif
+
+#ifdef CONFIG_GDBSTUB_DEBUG_BREAKPOINT
+#define gdbstub_bkpt(FMT, ...) gdbstub_printk(FMT, ##__VA_ARGS__)
+#else
+#define gdbstub_bkpt(FMT, ...) ({ 0; })
+#endif
+
+#endif /* !__ASSEMBLY__ */
+#endif /* _ASM_GDB_STUB_H */
diff --git a/include/asm-mn10300/hardirq.h b/include/asm-mn10300/hardirq.h
new file mode 100644
index 000000000000..54d950117674
--- /dev/null
+++ b/include/asm-mn10300/hardirq.h
@@ -0,0 +1,48 @@
+/* MN10300 Hardware IRQ statistics and management
+ *
+ * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Modified by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_HARDIRQ_H
+#define _ASM_HARDIRQ_H
+
+#include <linux/threads.h>
+#include <linux/irq.h>
+#include <asm/exceptions.h>
+
+/* assembly code in softirq.h is sensitive to the offsets of these fields */
+typedef struct {
+        unsigned int    __softirq_pending;
+        unsigned long   idle_timestamp;
+        unsigned int    __nmi_count;    /* arch dependent */
+        unsigned int    __irq_count;    /* arch dependent */
+} ____cacheline_aligned irq_cpustat_t;
+
+#include <linux/irq_cpustat.h>  /* Standard mappings for irq_cpustat_t above */
+
+extern void ack_bad_irq(int irq);
+
+/*
+ * manipulate stubs in the MN10300 CPU Trap/Interrupt Vector table
+ * - these should jump to __common_exception in entry.S unless there's a good
+ *   reason to do otherwise (see trap_preinit() in traps.c)
+ */
+typedef void (*intr_stub_fnx)(struct pt_regs *regs,
+                              enum exception_code intcode);
+
+/*
+ * manipulate pointers in the Exception table (see entry.S)
+ * - these are indexed by decoding the lower 24 bits of the TBR register
+ * - note that the MN103E010 doesn't always trap through the correct vector,
+ *   but does always set the TBR correctly
+ */
+extern asmlinkage void set_excp_vector(enum exception_code code,
+                                       intr_stub_fnx handler);
+
+#endif /* _ASM_HARDIRQ_H */
diff --git a/include/asm-mn10300/highmem.h b/include/asm-mn10300/highmem.h
new file mode 100644
index 000000000000..383c0c42982e
--- /dev/null
+++ b/include/asm-mn10300/highmem.h
@@ -0,0 +1,114 @@
+/* MN10300 Virtual kernel memory mappings for high memory
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ * - Derived from include/asm-i386/highmem.h
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_HIGHMEM_H
+#define _ASM_HIGHMEM_H
+
+#ifdef __KERNEL__
+
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <asm/kmap_types.h>
+#include <asm/pgtable.h>
+
+/* undef for production */
+#undef HIGHMEM_DEBUG
+
+/* declarations for highmem.c */
+extern unsigned long highstart_pfn, highend_pfn;
+
+extern pte_t *kmap_pte;
+extern pgprot_t kmap_prot;
+extern pte_t *pkmap_page_table;
+
+extern void __init kmap_init(void);
+
+/*
+ * Right now we initialize only a single pte table. It can be extended
+ * easily, subsequent pte tables have to be allocated in one physical
+ * chunk of RAM.
+ */
+#define PKMAP_BASE      0xfe000000UL
+#define LAST_PKMAP      1024
+#define LAST_PKMAP_MASK (LAST_PKMAP - 1)
+#define PKMAP_NR(virt)  ((virt - PKMAP_BASE) >> PAGE_SHIFT)
+#define PKMAP_ADDR(nr)  (PKMAP_BASE + ((nr) << PAGE_SHIFT))
+
+extern unsigned long __fastcall kmap_high(struct page *page);
+extern void __fastcall kunmap_high(struct page *page);
+
+static inline unsigned long kmap(struct page *page)
+{
+        if (in_interrupt())
+                BUG();
+        if (page < highmem_start_page)
+                return page_address(page);
+        return kmap_high(page);
+}
+
+static inline void kunmap(struct page *page)
+{
+        if (in_interrupt())
+                BUG();
+        if (page < highmem_start_page)
+                return;
+        kunmap_high(page);
+}
+
+/*
+ * The use of kmap_atomic/kunmap_atomic is discouraged - kmap/kunmap
+ * gives a more generic (and caching) interface. But kmap_atomic can
+ * be used in IRQ contexts, so in some (very limited) cases we need
+ * it.
+ */
+static inline unsigned long kmap_atomic(struct page *page, enum km_type type)
+{
+        enum fixed_addresses idx;
+        unsigned long vaddr;
+
+        if (page < highmem_start_page)
+                return page_address(page);
+
+        idx = type + KM_TYPE_NR * smp_processor_id();
+        vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx);
+#if HIGHMEM_DEBUG
+        if (!pte_none(*(kmap_pte - idx)))
+                BUG();
+#endif
+        set_pte(kmap_pte - idx, mk_pte(page, kmap_prot));
+        __flush_tlb_one(vaddr);
+
+        return vaddr;
+}
+
+static inline void kunmap_atomic(unsigned long vaddr, enum km_type type)
+{
+#if HIGHMEM_DEBUG
+        enum fixed_addresses idx = type + KM_TYPE_NR * smp_processor_id();
+
+        if (vaddr < FIXADDR_START) /* FIXME */
+                return;
+
+        if (vaddr != __fix_to_virt(FIX_KMAP_BEGIN + idx))
+                BUG();
+
+        /*
+         * force other mappings to Oops if they'll try to access
+         * this pte without first remap it
+         */
+        pte_clear(kmap_pte - idx);
+        __flush_tlb_one(vaddr);
+#endif
+}
+
+#endif /* __KERNEL__ */
+
+#endif /* _ASM_HIGHMEM_H */
diff --git a/include/asm-mn10300/hw_irq.h b/include/asm-mn10300/hw_irq.h
new file mode 100644
index 000000000000..70619901098e
--- /dev/null
+++ b/include/asm-mn10300/hw_irq.h
@@ -0,0 +1,14 @@
+/* MN10300 Hardware interrupt definitions
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_HW_IRQ_H
+#define _ASM_HW_IRQ_H
+
+#endif /* _ASM_HW_IRQ_H */
diff --git a/include/asm-mn10300/ide.h b/include/asm-mn10300/ide.h
new file mode 100644
index 000000000000..dc235121ec42
--- /dev/null
+++ b/include/asm-mn10300/ide.h
@@ -0,0 +1,43 @@
+/* MN10300 Arch-specific IDE code
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ * - Derived from include/asm-i386/ide.h
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+
+#ifndef _ASM_IDE_H
+#define _ASM_IDE_H
+
+#ifdef __KERNEL__
+
+#include <asm/intctl-regs.h>
+
+#undef SUPPORT_SLOW_DATA_PORTS
+#define SUPPORT_SLOW_DATA_PORTS 0
+
+#undef SUPPORT_VLB_SYNC
+#define SUPPORT_VLB_SYNC 0
+
+#ifndef MAX_HWIFS
+#define MAX_HWIFS 8
+#endif
+
+/*
+ * some bits needed for parts of the IDE subsystem to compile
+ */
+#define __ide_mm_insw(port, addr, n) \
+        insw((unsigned long) (port), (addr), (n))
+#define __ide_mm_insl(port, addr, n) \
+        insl((unsigned long) (port), (addr), (n))
+#define __ide_mm_outsw(port, addr, n) \
+        outsw((unsigned long) (port), (addr), (n))
+#define __ide_mm_outsl(port, addr, n) \
+        outsl((unsigned long) (port), (addr), (n))
+
+#endif /* __KERNEL__ */
+#endif /* _ASM_IDE_H */
diff --git a/include/asm-mn10300/intctl-regs.h b/include/asm-mn10300/intctl-regs.h
new file mode 100644
index 000000000000..ba544c796c5a
--- /dev/null
+++ b/include/asm-mn10300/intctl-regs.h
@@ -0,0 +1,73 @@
+/* MN10300 On-board interrupt controller registers
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_INTCTL_REGS_H
+#define _ASM_INTCTL_REGS_H
+
+#include <asm/cpu-regs.h>
+
+#ifdef __KERNEL__
+
+/* interrupt controller registers */
+#define GxICR(X)                __SYSREG(0xd4000000 + (X) * 4, u16)     /* group irq ctrl regs */
+
+#define IAGR                    __SYSREG(0xd4000100, u16)       /* intr acceptance group reg */
+#define IAGR_GN                 0x00fc          /* group number register
+                                                 * (documentation _has_ to be wrong)
+                                                 */
+
+#define EXTMD                   __SYSREG(0xd4000200, u16)       /* external pin intr spec reg */
+#define GET_XIRQ_TRIGGER(X) ((EXTMD >> ((X) * 2)) & 3)
+
+#define SET_XIRQ_TRIGGER(X,Y)                   \
+do {                                            \
+        u16 x = EXTMD;                          \
+        x &= ~(3 << ((X) * 2));                 \
+        x |= ((Y) & 3) << ((X) * 2);            \
+        EXTMD = x;                              \
+} while (0)
+
+#define XIRQ_TRIGGER_LOWLEVEL   0
+#define XIRQ_TRIGGER_HILEVEL    1
+#define XIRQ_TRIGGER_NEGEDGE    2
+#define XIRQ_TRIGGER_POSEDGE    3
+
+/* non-maskable interrupt control */
+#define NMIIRQ                  0
+#define NMICR                   GxICR(NMIIRQ)   /* NMI control register */
+#define NMICR_NMIF              0x0001          /* NMI pin interrupt flag */
+#define NMICR_WDIF              0x0002          /* watchdog timer overflow flag */
+#define NMICR_ABUSERR           0x0008          /* async bus error flag */
+
+/* maskable interrupt control */
+#define GxICR_DETECT            0x0001          /* interrupt detect flag */
+#define GxICR_REQUEST           0x0010          /* interrupt request flag */
+#define GxICR_ENABLE            0x0100          /* interrupt enable flag */
+#define GxICR_LEVEL             0x7000          /* interrupt priority level */
+#define GxICR_LEVEL_0           0x0000          /* - level 0 */
+#define GxICR_LEVEL_1           0x1000          /* - level 1 */
+#define GxICR_LEVEL_2           0x2000          /* - level 2 */
+#define GxICR_LEVEL_3           0x3000          /* - level 3 */
+#define GxICR_LEVEL_4           0x4000          /* - level 4 */
+#define GxICR_LEVEL_5           0x5000          /* - level 5 */
+#define GxICR_LEVEL_6           0x6000          /* - level 6 */
+#define GxICR_LEVEL_SHIFT       12
+
+#ifndef __ASSEMBLY__
+extern void set_intr_level(int irq, u16 level);
+extern void set_intr_postackable(int irq);
+#endif
+
+/* external interrupts */
+#define XIRQxICR(X)             GxICR((X))      /* external interrupt control regs */
+
+#endif /* __KERNEL__ */
+
+#endif /* _ASM_INTCTL_REGS_H */
diff --git a/include/asm-mn10300/io.h b/include/asm-mn10300/io.h
new file mode 100644
index 000000000000..b8b6dc878250
--- /dev/null
+++ b/include/asm-mn10300/io.h
@@ -0,0 +1,299 @@
+/* MN10300 I/O port emulation and memory-mapped I/O
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_IO_H
+#define _ASM_IO_H
+
+#include <asm/page.h> /* I/O is all done through memory accesses */
+#include <asm/cpu-regs.h>
+#include <asm/cacheflush.h>
+
+#define mmiowb() do {} while (0)
+
+/*****************************************************************************/
+/*
+ * readX/writeX() are used to access memory mapped devices. On some
+ * architectures the memory mapped IO stuff needs to be accessed
+ * differently. On the x86 architecture, we just read/write the
+ * memory location directly.
+ */
+static inline u8 readb(const volatile void __iomem *addr)
+{
+        return *(const volatile u8 *) addr;
+}
+
+static inline u16 readw(const volatile void __iomem *addr)
+{
+        return *(const volatile u16 *) addr;
+}
+
+static inline u32 readl(const volatile void __iomem *addr)
+{
+        return *(const volatile u32 *) addr;
+}
+
+#define __raw_readb readb
+#define __raw_readw readw
+#define __raw_readl readl
+
+#define readb_relaxed readb
+#define readw_relaxed readw
+#define readl_relaxed readl
+
+static inline void writeb(u8 b, volatile void __iomem *addr)
+{
+        *(volatile u8 *) addr = b;
+}
+
+static inline void writew(u16 b, volatile void __iomem *addr)
+{
+        *(volatile u16 *) addr = b;
+}
+
+static inline void writel(u32 b, volatile void __iomem *addr)
+{
+        *(volatile u32 *) addr = b;
+}
+
+#define __raw_writeb writeb
+#define __raw_writew writew
+#define __raw_writel writel
+
+/*****************************************************************************/
+/*
+ * traditional input/output functions
+ */
+static inline u8 inb_local(unsigned long addr)
+{
+        return readb((volatile void __iomem *) addr);
+}
+
+static inline void outb_local(u8 b, unsigned long addr)
+{
+        return writeb(b, (volatile void __iomem *) addr);
+}
+
+static inline u8 inb(unsigned long addr)
+{
+        return readb((volatile void __iomem *) addr);
+}
+
+static inline u16 inw(unsigned long addr)
+{
+        return readw((volatile void __iomem *) addr);
+}
+
+static inline u32 inl(unsigned long addr)
+{
+        return readl((volatile void __iomem *) addr);
+}
+
+static inline void outb(u8 b, unsigned long addr)
+{
+        return writeb(b, (volatile void __iomem *) addr);
+}
+
+static inline void outw(u16 b, unsigned long addr)
+{
+        return writew(b, (volatile void __iomem *) addr);
+}
+
+static inline void outl(u32 b, unsigned long addr)
+{
+        return writel(b, (volatile void __iomem *) addr);
+}
+
+#define inb_p(addr)     inb(addr)
+#define inw_p(addr)     inw(addr)
+#define inl_p(addr)     inl(addr)
+#define outb_p(x, addr) outb((x), (addr))
+#define outw_p(x, addr) outw((x), (addr))
+#define outl_p(x, addr) outl((x), (addr))
+
+static inline void insb(unsigned long addr, void *buffer, int count)
+{
+        if (count) {
+                u8 *buf = buffer;
+                do {
+                        u8 x = inb(addr);
+                        *buf++ = x;
+                } while (--count);
+        }
+}
+
+static inline void insw(unsigned long addr, void *buffer, int count)
+{
+        if (count) {
+                u16 *buf = buffer;
+                do {
+                        u16 x = inw(addr);
+                        *buf++ = x;
+                } while (--count);
+        }
+}
+
+static inline void insl(unsigned long addr, void *buffer, int count)
+{
+        if (count) {
+                u32 *buf = buffer;
+                do {
+                        u32 x = inl(addr);
+                        *buf++ = x;
+                } while (--count);
+        }
+}
+
+static inline void outsb(unsigned long addr, const void *buffer, int count)
+{
+        if (count) {
+                const u8 *buf = buffer;
+                do {
+                        outb(*buf++, addr);
+                } while (--count);
+        }
+}
+
+static inline void outsw(unsigned long addr, const void *buffer, int count)
+{
+        if (count) {
+                const u16 *buf = buffer;
+                do {
+                        outw(*buf++, addr);
+                } while (--count);
+        }
+}
+
+extern void __outsl(unsigned long addr, const void *buffer, int count);
+static inline void outsl(unsigned long addr, const void *buffer, int count)
+{
+        if ((unsigned long) buffer & 0x3)
+                return __outsl(addr, buffer, count);
+
+        if (count) {
+                const u32 *buf = buffer;
+                do {
+                        outl(*buf++, addr);
+                } while (--count);
+        }
+}
+
+#define ioread8(addr)           readb(addr)
+#define ioread16(addr)          readw(addr)
+#define ioread32(addr)          readl(addr)
+
+#define iowrite8(v, addr)       writeb((v), (addr))
+#define iowrite16(v, addr)      writew((v), (addr))
+#define iowrite32(v, addr)      writel((v), (addr))
+
+#define ioread8_rep(p, dst, count) \
+        insb((unsigned long) (p), (dst), (count))
+#define ioread16_rep(p, dst, count) \
+        insw((unsigned long) (p), (dst), (count))
+#define ioread32_rep(p, dst, count) \
+        insl((unsigned long) (p), (dst), (count))
+
+#define iowrite8_rep(p, src, count) \
+        outsb((unsigned long) (p), (src), (count))
+#define iowrite16_rep(p, src, count) \
+        outsw((unsigned long) (p), (src), (count))
+#define iowrite32_rep(p, src, count) \
+        outsl((unsigned long) (p), (src), (count))
+
+
+#define IO_SPACE_LIMIT 0xffffffff
+
+#ifdef __KERNEL__
+
+#include <linux/vmalloc.h>
+#define __io_virt(x) ((void *) (x))
+
+/* Create a virtual mapping cookie for a PCI BAR (memory or IO) */
+struct pci_dev;
+extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max);
+static inline void pci_iounmap(struct pci_dev *dev, void __iomem *p)
+{
+}
+
+/*
+ * Change virtual addresses to physical addresses and vv.
+ * These are pretty trivial
+ */
+static inline unsigned long virt_to_phys(volatile void *address)
+{
+        return __pa(address);
+}
+
+static inline void *phys_to_virt(unsigned long address)
+{
+        return __va(address);
+}
+
+/*
+ * Change "struct page" to physical address.
+ */
+static inline void *__ioremap(unsigned long offset, unsigned long size,
+                              unsigned long flags)
+{
+        return (void *) offset;
+}
+
+static inline void *ioremap(unsigned long offset, unsigned long size)
+{
+        return (void *) offset;
+}
+
+/*
+ * This one maps high address device memory and turns off caching for that
+ * area.  it's useful if some control registers are in such an area and write
+ * combining or read caching is not desirable:
+ */
+static inline void *ioremap_nocache(unsigned long offset, unsigned long size)
+{
+        return (void *) (offset | 0x20000000);
+}
+
+static inline void iounmap(void *addr)
+{
+}
+
+static inline void __iomem *ioport_map(unsigned long port, unsigned int nr)
+{
+        return (void __iomem *) port;
+}
+
+static inline void ioport_unmap(void __iomem *p)
+{
+}
+
+#define xlate_dev_kmem_ptr(p)   ((void *) (p))
+#define xlate_dev_mem_ptr(p)    ((void *) (p))
+
+/*
+ * PCI bus iomem addresses must be in the region 0x80000000-0x9fffffff
+ */
+static inline unsigned long virt_to_bus(volatile void *address)
+{
+        return ((unsigned long) address) & ~0x20000000;
+}
+
+static inline void *bus_to_virt(unsigned long address)
+{
+        return (void *) address;
+}
+
+#define page_to_bus page_to_phys
+
+#define memset_io(a, b, c)      memset(__io_virt(a), (b), (c))
+#define memcpy_fromio(a, b, c)  memcpy((a), __io_virt(b), (c))
+#define memcpy_toio(a, b, c)    memcpy(__io_virt(a), (b), (c))
+
+#endif /* __KERNEL__ */
+
+#endif /* _ASM_IO_H */
diff --git a/include/asm-mn10300/ioctl.h b/include/asm-mn10300/ioctl.h
new file mode 100644
index 000000000000..b279fe06dfe5
--- /dev/null
+++ b/include/asm-mn10300/ioctl.h
@@ -0,0 +1 @@
+#include <asm-generic/ioctl.h>
diff --git a/include/asm-mn10300/ioctls.h b/include/asm-mn10300/ioctls.h
new file mode 100644
index 000000000000..dcbfb452974f
--- /dev/null
+++ b/include/asm-mn10300/ioctls.h
@@ -0,0 +1,88 @@
+#ifndef _ASM_IOCTLS_H
+#define _ASM_IOCTLS_H
+
+#include <asm/ioctl.h>
+
+/* 0x54 is just a magic number to make these relatively unique ('T') */
+
+#define TCGETS          0x5401
+#define TCSETS          0x5402
+#define TCSETSW         0x5403
+#define TCSETSF         0x5404
+#define TCGETA          0x5405
+#define TCSETA          0x5406
+#define TCSETAW         0x5407
+#define TCSETAF         0x5408
+#define TCSBRK          0x5409
+#define TCXONC          0x540A
+#define TCFLSH          0x540B
+#define TIOCEXCL        0x540C
+#define TIOCNXCL        0x540D
+#define TIOCSCTTY       0x540E
+#define TIOCGPGRP       0x540F
+#define TIOCSPGRP       0x5410
+#define TIOCOUTQ        0x5411
+#define TIOCSTI         0x5412
+#define TIOCGWINSZ      0x5413
+#define TIOCSWINSZ      0x5414
+#define TIOCMGET        0x5415
+#define TIOCMBIS        0x5416
+#define TIOCMBIC        0x5417
+#define TIOCMSET        0x5418
+#define TIOCGSOFTCAR    0x5419
+#define TIOCSSOFTCAR    0x541A
+#define FIONREAD        0x541B
+#define TIOCINQ         FIONREAD
+#define TIOCLINUX       0x541C
+#define TIOCCONS        0x541D
+#define TIOCGSERIAL     0x541E
+#define TIOCSSERIAL     0x541F
+#define TIOCPKT         0x5420
+#define FIONBIO         0x5421
+#define TIOCNOTTY       0x5422
+#define TIOCSETD        0x5423
+#define TIOCGETD        0x5424
+#define TCSBRKP         0x5425  /* Needed for POSIX tcsendbreak() */
+/* #define TIOCTTYGSTRUCT 0x5426 - Former debugging-only ioctl */
+#define TIOCSBRK        0x5427  /* BSD compatibility */
+#define TIOCCBRK        0x5428  /* BSD compatibility */
+#define TIOCGSID        0x5429  /* Return the session ID of FD */
+#define TCGETS2         _IOR('T', 0x2A, struct termios2)
+#define TCSETS2         _IOW('T', 0x2B, struct termios2)
+#define TCSETSW2        _IOW('T', 0x2C, struct termios2)
+#define TCSETSF2        _IOW('T', 0x2D, struct termios2)
+#define TIOCGPTN        _IOR('T', 0x30, unsigned int) /* Get Pty Number
+                                                       * (of pty-mux device) */
+#define TIOCSPTLCK      _IOW('T', 0x31, int)  /* Lock/unlock Pty */
+
+#define FIONCLEX        0x5450
+#define FIOCLEX         0x5451
+#define FIOASYNC        0x5452
+#define TIOCSERCONFIG   0x5453
+#define TIOCSERGWILD    0x5454
+#define TIOCSERSWILD    0x5455
+#define TIOCGLCKTRMIOS  0x5456
+#define TIOCSLCKTRMIOS  0x5457
+#define TIOCSERGSTRUCT  0x5458 /* For debugging only */
+#define TIOCSERGETLSR   0x5459 /* Get line status register */
+#define TIOCSERGETMULTI 0x545A /* Get multiport config  */
+#define TIOCSERSETMULTI 0x545B /* Set multiport config */
+
+#define TIOCMIWAIT      0x545C  /* wait for a change on serial input line(s) */
+#define TIOCGICOUNT     0x545D  /* read serial port inline interrupt counts */
+#define TIOCGHAYESESP   0x545E  /* Get Hayes ESP configuration */
+#define TIOCSHAYESESP   0x545F  /* Set Hayes ESP configuration */
+#define FIOQSIZE        0x5460
+
+/* Used for packet mode */
+#define TIOCPKT_DATA             0
+#define TIOCPKT_FLUSHREAD        1
+#define TIOCPKT_FLUSHWRITE       2
+#define TIOCPKT_STOP             4
+#define TIOCPKT_START            8
+#define TIOCPKT_NOSTOP          16
+#define TIOCPKT_DOSTOP          32
+
+#define TIOCSER_TEMT    0x01    /* Transmitter physically empty */
+
+#endif /* _ASM_IOCTLS_H */
diff --git a/include/asm-mn10300/ipc.h b/include/asm-mn10300/ipc.h
new file mode 100644
index 000000000000..a46e3d9c2a3f
--- /dev/null
+++ b/include/asm-mn10300/ipc.h
@@ -0,0 +1 @@
+#include <asm-generic/ipc.h>
diff --git a/include/asm-mn10300/ipcbuf.h b/include/asm-mn10300/ipcbuf.h
new file mode 100644
index 000000000000..efbbef8d1c69
--- /dev/null
+++ b/include/asm-mn10300/ipcbuf.h
@@ -0,0 +1,29 @@
+#ifndef _ASM_IPCBUF_H_
+#define _ASM_IPCBUF_H
+
+/*
+ * The ipc64_perm structure for MN10300 architecture.
+ * Note extra padding because this structure is passed back and forth
+ * between kernel and user space.
+ *
+ * Pad space is left for:
+ * - 32-bit mode_t and seq
+ * - 2 miscellaneous 32-bit values
+ */
+
+struct ipc64_perm
+{
+        __kernel_key_t          key;
+        __kernel_uid32_t        uid;
+        __kernel_gid32_t        gid;
+        __kernel_uid32_t        cuid;
+        __kernel_gid32_t        cgid;
+        __kernel_mode_t         mode;
+        unsigned short          __pad1;
+        unsigned short          seq;
+        unsigned short          __pad2;
+        unsigned long           __unused1;
+        unsigned long           __unused2;
+};
+
+#endif /* _ASM_IPCBUF_H */
diff --git a/include/asm-mn10300/irq.h b/include/asm-mn10300/irq.h
new file mode 100644
index 000000000000..53b380116901
--- /dev/null
+++ b/include/asm-mn10300/irq.h
@@ -0,0 +1,32 @@
+/* MN10300 Hardware interrupt definitions
+ *
+ * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Modified by David Howells (dhowells@redhat.com)
+ * - Derived from include/asm-i386/irq.h:
+ *   - (C) 1992, 1993 Linus Torvalds, (C) 1997 Ingo Molnar
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_IRQ_H
+#define _ASM_IRQ_H
+
+#include <asm/intctl-regs.h>
+#include <asm/reset-regs.h>
+#include <asm/proc/irq.h>
+
+/* this number is used when no interrupt has been assigned */
+#define NO_IRQ          INT_MAX
+
+/* hardware irq numbers */
+#define NR_IRQS         GxICR_NUM_IRQS
+
+/* external hardware irq numbers */
+#define NR_XIRQS        GxICR_NUM_XIRQS
+
+#define irq_canonicalize(IRQ) (IRQ)
+
+#endif /* _ASM_IRQ_H */
diff --git a/include/asm-mn10300/irq_regs.h b/include/asm-mn10300/irq_regs.h
new file mode 100644
index 000000000000..a848cd232eb4
--- /dev/null
+++ b/include/asm-mn10300/irq_regs.h
@@ -0,0 +1,24 @@
+/* MN10300 IRQ registers pointer definition
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_IRQ_REGS_H
+#define _ASM_IRQ_REGS_H
+
+/*
+ * Per-cpu current frame pointer - the location of the last exception frame on
+ * the stack
+ */
+#define ARCH_HAS_OWN_IRQ_REGS
+
+#ifndef __ASSEMBLY__
+#define get_irq_regs() (__frame)
+#endif
+
+#endif /* _ASM_IRQ_REGS_H */
diff --git a/include/asm-mn10300/kdebug.h b/include/asm-mn10300/kdebug.h
new file mode 100644
index 000000000000..0f47e112190c
--- /dev/null
+++ b/include/asm-mn10300/kdebug.h
@@ -0,0 +1,22 @@
+/* MN10300 In-kernel death knells
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+
+#ifndef _ASM_KDEBUG_H
+#define _ASM_KDEBUG_H
+
+/* Grossly misnamed. */
+enum die_val {
+        DIE_OOPS = 1,
+        DIE_BREAKPOINT,
+        DIE_GPF,
+};
+
+#endif /* _ASM_KDEBUG_H */
diff --git a/include/asm-mn10300/kmap_types.h b/include/asm-mn10300/kmap_types.h
new file mode 100644
index 000000000000..3398f9f35603
--- /dev/null
+++ b/include/asm-mn10300/kmap_types.h
@@ -0,0 +1,31 @@
+/* MN10300 kmap_atomic() slot IDs
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_KMAP_TYPES_H
+#define _ASM_KMAP_TYPES_H
+
+enum km_type {
+        KM_BOUNCE_READ,
+        KM_SKB_SUNRPC_DATA,
+        KM_SKB_DATA_SOFTIRQ,
+        KM_USER0,
+        KM_USER1,
+        KM_BIO_SRC_IRQ,
+        KM_BIO_DST_IRQ,
+        KM_PTE0,
+        KM_PTE1,
+        KM_IRQ0,
+        KM_IRQ1,
+        KM_SOFTIRQ0,
+        KM_SOFTIRQ1,
+        KM_TYPE_NR
+};
+
+#endif /* _ASM_KMAP_TYPES_H */
diff --git a/include/asm-mn10300/kprobes.h b/include/asm-mn10300/kprobes.h
new file mode 100644
index 000000000000..c800b590183a
--- /dev/null
+++ b/include/asm-mn10300/kprobes.h
@@ -0,0 +1,50 @@
+/* MN10300 Kernel Probes support
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by Mark Salter (msalter@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public Licence as published by
+ * the Free Software Foundation; either version 2 of the Licence, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public Licence for more details.
+ *
+ * You should have received a copy of the GNU General Public Licence
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ *
+ */
+#ifndef _ASM_KPROBES_H
+#define _ASM_KPROBES_H
+
+#include <linux/types.h>
+#include <linux/ptrace.h>
+
+struct kprobe;
+
+typedef unsigned char kprobe_opcode_t;
+#define BREAKPOINT_INSTRUCTION  0xff
+#define MAX_INSN_SIZE 8
+#define MAX_STACK_SIZE 128
+
+/* Architecture specific copy of original instruction */
+struct arch_specific_insn {
+        /*  copy of original instruction
+         */
+        kprobe_opcode_t insn[MAX_INSN_SIZE];
+};
+
+extern const int kretprobe_blacklist_size;
+
+extern int kprobe_exceptions_notify(struct notifier_block *self,
+                                    unsigned long val, void *data);
+
+#define flush_insn_slot(p)  do {} while (0)
+
+extern void arch_remove_kprobe(struct kprobe *p);
+
+#endif /* _ASM_KPROBES_H */
diff --git a/include/asm-mn10300/linkage.h b/include/asm-mn10300/linkage.h
new file mode 100644
index 000000000000..29a32e467523
--- /dev/null
+++ b/include/asm-mn10300/linkage.h
@@ -0,0 +1,22 @@
+/* MN10300 Linkage and calling-convention overrides
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_LINKAGE_H
+#define _ASM_LINKAGE_H
+
+/* don't override anything */
+#define asmlinkage
+#define FASTCALL(x) x
+#define fastcall
+
+#define __ALIGN         .align 4,0xcb
+#define __ALIGN_STR     ".align 4,0xcb"
+
+#endif
diff --git a/include/asm-mn10300/local.h b/include/asm-mn10300/local.h
new file mode 100644
index 000000000000..c11c530f74d0
--- /dev/null
+++ b/include/asm-mn10300/local.h
@@ -0,0 +1 @@
+#include <asm-generic/local.h>
diff --git a/include/asm-mn10300/mc146818rtc.h b/include/asm-mn10300/mc146818rtc.h
new file mode 100644
index 000000000000..df6bc6e0e8c6
--- /dev/null
+++ b/include/asm-mn10300/mc146818rtc.h
@@ -0,0 +1 @@
+#include <asm/rtc-regs.h>
diff --git a/include/asm-mn10300/mman.h b/include/asm-mn10300/mman.h
new file mode 100644
index 000000000000..b7986b65addf
--- /dev/null
+++ b/include/asm-mn10300/mman.h
@@ -0,0 +1,28 @@
+/* MN10300 Constants for mmap and co.
+ *
+ * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * - Derived from asm-x86/mman.h
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_MMAN_H
+#define _ASM_MMAN_H
+
+#include <asm-generic/mman.h>
+
+#define MAP_GROWSDOWN   0x0100          /* stack-like segment */
+#define MAP_DENYWRITE   0x0800          /* ETXTBSY */
+#define MAP_EXECUTABLE  0x1000          /* mark it as an executable */
+#define MAP_LOCKED      0x2000          /* pages are locked */
+#define MAP_NORESERVE   0x4000          /* don't check for reservations */
+#define MAP_POPULATE    0x8000          /* populate (prefault) pagetables */
+#define MAP_NONBLOCK    0x10000         /* do not block on IO */
+
+#define MCL_CURRENT     1               /* lock all current mappings */
+#define MCL_FUTURE      2               /* lock all future mappings */
+
+#endif /* _ASM_MMAN_H */
diff --git a/include/asm-mn10300/mmu.h b/include/asm-mn10300/mmu.h
new file mode 100644
index 000000000000..2d2d097e7309
--- /dev/null
+++ b/include/asm-mn10300/mmu.h
@@ -0,0 +1,19 @@
+/* MN10300 Memory management context
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ * - Derived from include/asm-frv/mmu.h
+ */
+
+#ifndef _ASM_MMU_H
+#define _ASM_MMU_H
+
+/*
+ * MMU context
+ */
+typedef struct {
+        unsigned long   tlbpid[NR_CPUS];        /* TLB PID for this process on
+                                                 * each CPU */
+} mm_context_t;
+
+#endif /* _ASM_MMU_H */
diff --git a/include/asm-mn10300/mmu_context.h b/include/asm-mn10300/mmu_context.h
new file mode 100644
index 000000000000..a9e2e34f69b0
--- /dev/null
+++ b/include/asm-mn10300/mmu_context.h
@@ -0,0 +1,138 @@
+/* MN10300 MMU context management
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Modified by David Howells (dhowells@redhat.com)
+ * - Derived from include/asm-m32r/mmu_context.h
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ *
+ *
+ * This implements an algorithm to provide TLB PID mappings to provide
+ * selective access to the TLB for processes, thus reducing the number of TLB
+ * flushes required.
+ *
+ * Note, however, that the M32R algorithm is technically broken as it does not
+ * handle version wrap-around, and could, theoretically, have a problem with a
+ * very long lived program that sleeps long enough for the version number to
+ * wrap all the way around so that its TLB mappings appear valid once again.
+ */
+#ifndef _ASM_MMU_CONTEXT_H
+#define _ASM_MMU_CONTEXT_H
+
+#include <asm/atomic.h>
+#include <asm/pgalloc.h>
+#include <asm/tlbflush.h>
+#include <asm-generic/mm_hooks.h>
+
+#define MMU_CONTEXT_TLBPID_MASK         0x000000ffUL
+#define MMU_CONTEXT_VERSION_MASK        0xffffff00UL
+#define MMU_CONTEXT_FIRST_VERSION       0x00000100UL
+#define MMU_NO_CONTEXT                  0x00000000UL
+
+extern unsigned long mmu_context_cache[NR_CPUS];
+#define mm_context(mm)  (mm->context.tlbpid[smp_processor_id()])
+
+#define enter_lazy_tlb(mm, tsk) do {} while (0)
+
+#ifdef CONFIG_SMP
+#define cpu_ran_vm(cpu, task) \
+        cpu_set((cpu), (task)->cpu_vm_mask)
+#define cpu_maybe_ran_vm(cpu, task) \
+        cpu_test_and_set((cpu), (task)->cpu_vm_mask)
+#else
+#define cpu_ran_vm(cpu, task)           do {} while (0)
+#define cpu_maybe_ran_vm(cpu, task)     true
+#endif /* CONFIG_SMP */
+
+/*
+ * allocate an MMU context
+ */
+static inline unsigned long allocate_mmu_context(struct mm_struct *mm)
+{
+        unsigned long *pmc = &mmu_context_cache[smp_processor_id()];
+        unsigned long mc = ++(*pmc);
+
+        if (!(mc & MMU_CONTEXT_TLBPID_MASK)) {
+                /* we exhausted the TLB PIDs of this version on this CPU, so we
+                 * flush this CPU's TLB in its entirety and start new cycle */
+                flush_tlb_all();
+
+                /* fix the TLB version if needed (we avoid version #0 so as to
+                 * distingush MMU_NO_CONTEXT) */
+                if (!mc)
+                        *pmc = mc = MMU_CONTEXT_FIRST_VERSION;
+        }
+        mm_context(mm) = mc;
+        return mc;
+}
+
+/*
+ * get an MMU context if one is needed
+ */
+static inline unsigned long get_mmu_context(struct mm_struct *mm)
+{
+        unsigned long mc = MMU_NO_CONTEXT, cache;
+
+        if (mm) {
+                cache = mmu_context_cache[smp_processor_id()];
+                mc = mm_context(mm);
+
+                /* if we have an old version of the context, replace it */
+                if ((mc ^ cache) & MMU_CONTEXT_VERSION_MASK)
+                        mc = allocate_mmu_context(mm);
+        }
+        return mc;
+}
+
+/*
+ * initialise the context related info for a new mm_struct instance
+ */
+static inline int init_new_context(struct task_struct *tsk,
+                                   struct mm_struct *mm)
+{
+        int num_cpus = NR_CPUS, i;
+
+        for (i = 0; i < num_cpus; i++)
+                mm->context.tlbpid[i] = MMU_NO_CONTEXT;
+        return 0;
+}
+
+/*
+ * destroy context related info for an mm_struct that is about to be put to
+ * rest
+ */
+#define destroy_context(mm)     do { } while (0)
+
+/*
+ * after we have set current->mm to a new value, this activates the context for
+ * the new mm so we see the new mappings.
+ */
+static inline void activate_context(struct mm_struct *mm, int cpu)
+{
+        PIDR = get_mmu_context(mm) & MMU_CONTEXT_TLBPID_MASK;
+}
+
+/*
+ * change between virtual memory sets
+ */
+static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
+                             struct task_struct *tsk)
+{
+        int cpu = smp_processor_id();
+
+        if (prev != next) {
+                cpu_ran_vm(cpu, next);
+                activate_context(next, cpu);
+                PTBR = (unsigned long) next->pgd;
+        } else if (!cpu_maybe_ran_vm(cpu, next)) {
+                activate_context(next, cpu);
+        }
+}
+
+#define deactivate_mm(tsk, mm)  do {} while (0)
+#define activate_mm(prev, next) switch_mm((prev), (next), NULL)
+
+#endif /* _ASM_MMU_CONTEXT_H */
diff --git a/include/asm-mn10300/module.h b/include/asm-mn10300/module.h
new file mode 100644
index 000000000000..5d7057d01494
--- /dev/null
+++ b/include/asm-mn10300/module.h
@@ -0,0 +1,27 @@
+/* MN10300 Arch-specific module definitions
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by Mark Salter (msalter@redhat.com)
+ * Derived from include/asm-i386/module.h
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_MODULE_H
+#define _ASM_MODULE_H
+
+struct mod_arch_specific {
+};
+
+#define Elf_Shdr        Elf32_Shdr
+#define Elf_Sym         Elf32_Sym
+#define Elf_Ehdr        Elf32_Ehdr
+
+/*
+ * Include the MN10300 architecture version.
+ */
+#define MODULE_ARCH_VERMAGIC __stringify(PROCESSOR_MODEL_NAME) " "
+
+#endif /* _ASM_MODULE_H */
diff --git a/include/asm-mn10300/msgbuf.h b/include/asm-mn10300/msgbuf.h
new file mode 100644
index 000000000000..8b602450cc4a
--- /dev/null
+++ b/include/asm-mn10300/msgbuf.h
@@ -0,0 +1,31 @@
+#ifndef _ASM_MSGBUF_H
+#define _ASM_MSGBUF_H
+
+/*
+ * The msqid64_ds structure for MN10300 architecture.
+ * Note extra padding because this structure is passed back and forth
+ * between kernel and user space.
+ *
+ * Pad space is left for:
+ * - 64-bit time_t to solve y2038 problem
+ * - 2 miscellaneous 32-bit values
+ */
+
+struct msqid64_ds {
+        struct ipc64_perm       msg_perm;
+        __kernel_time_t         msg_stime;      /* last msgsnd time */
+        unsigned long           __unused1;
+        __kernel_time_t         msg_rtime;      /* last msgrcv time */
+        unsigned long           __unused2;
+        __kernel_time_t         msg_ctime;      /* last change time */
+        unsigned long           __unused3;
+        unsigned long           msg_cbytes;     /* current number of bytes on queue */
+        unsigned long           msg_qnum;       /* number of messages in queue */
+        unsigned long           msg_qbytes;     /* max number of bytes on queue */
+        __kernel_pid_t          msg_lspid;      /* pid of last msgsnd */
+        __kernel_pid_t          msg_lrpid;      /* last receive pid */
+        unsigned long           __unused4;
+        unsigned long           __unused5;
+};
+
+#endif /* _ASM_MSGBUF_H */
diff --git a/include/asm-mn10300/mutex.h b/include/asm-mn10300/mutex.h
new file mode 100644
index 000000000000..84f5490c6fb4
--- /dev/null
+++ b/include/asm-mn10300/mutex.h
@@ -0,0 +1,16 @@
+/* MN10300 Mutex fastpath
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ *
+ *
+ * TODO: implement optimized primitives instead, or leave the generic
+ * implementation in place, or pick the atomic_xchg() based generic
+ * implementation. (see asm-generic/mutex-xchg.h for details)
+ */
+#include <asm-generic/mutex-null.h>
diff --git a/include/asm-mn10300/namei.h b/include/asm-mn10300/namei.h
new file mode 100644
index 000000000000..bd9ce94aeb65
--- /dev/null
+++ b/include/asm-mn10300/namei.h
@@ -0,0 +1,22 @@
+/* Emulation stuff
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+
+#ifndef _ASM_NAMEI_H
+#define _ASM_NAMEI_H
+
+/* This dummy routine maybe changed to something useful
+ * for /usr/gnemul/ emulation stuff.
+ * Look at asm-sparc/namei.h for details.
+ */
+
+#define __emul_prefix() NULL
+
+#endif /* _ASM_NAMEI_H */
diff --git a/include/asm-mn10300/nmi.h b/include/asm-mn10300/nmi.h
new file mode 100644
index 000000000000..f3671cbbc117
--- /dev/null
+++ b/include/asm-mn10300/nmi.h
@@ -0,0 +1,14 @@
+/* MN10300 NMI handling
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_NMI_H
+#define _ASM_NMI_H
+
+#endif /* _ASM_NMI_H */
diff --git a/include/asm-mn10300/page.h b/include/asm-mn10300/page.h
new file mode 100644
index 000000000000..124971b9fb9b
--- /dev/null
+++ b/include/asm-mn10300/page.h
@@ -0,0 +1,131 @@
+/* MN10300 Page table definitions
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_PAGE_H
+#define _ASM_PAGE_H
+
+/* PAGE_SHIFT determines the page size */
+#define PAGE_SHIFT      12
+
+#ifndef __ASSEMBLY__
+#define PAGE_SIZE       (1UL << PAGE_SHIFT)
+#define PAGE_MASK       (~(PAGE_SIZE - 1))
+#else
+#define PAGE_SIZE       +(1 << PAGE_SHIFT)      /* unary plus marks an
+                                                 * immediate val not an addr */
+#define PAGE_MASK       +(~(PAGE_SIZE - 1))
+#endif
+
+#ifdef __KERNEL__
+#ifndef __ASSEMBLY__
+
+#define clear_page(page)        memset((void *)(page), 0, PAGE_SIZE)
+#define copy_page(to, from)     memcpy((void *)(to), (void *)(from), PAGE_SIZE)
+
+#define clear_user_page(addr, vaddr, page)      clear_page(addr)
+#define copy_user_page(vto, vfrom, vaddr, to)   copy_page(vto, vfrom)
+
+/*
+ * These are used to make use of C type-checking..
+ */
+typedef struct { unsigned long pte; } pte_t;
+typedef struct { unsigned long pgd; } pgd_t;
+typedef struct { unsigned long pgprot; } pgprot_t;
+typedef struct page *pgtable_t;
+
+#define PTE_MASK        PAGE_MASK
+#define HPAGE_SHIFT     22
+
+#ifdef CONFIG_HUGETLB_PAGE
+#define HPAGE_SIZE              ((1UL) << HPAGE_SHIFT)
+#define HPAGE_MASK              (~(HPAGE_SIZE - 1))
+#define HUGETLB_PAGE_ORDER      (HPAGE_SHIFT - PAGE_SHIFT)
+#endif
+
+#define pte_val(x)      ((x).pte)
+#define pgd_val(x)      ((x).pgd)
+#define pgprot_val(x)   ((x).pgprot)
+
+#define __pte(x)        ((pte_t) { (x) })
+#define __pgd(x)        ((pgd_t) { (x) })
+#define __pgprot(x)     ((pgprot_t) { (x) })
+
+#include <asm-generic/pgtable-nopmd.h>
+
+#endif /* !__ASSEMBLY__ */
+
+/* to align the pointer to the (next) page boundary */
+#define PAGE_ALIGN(addr)        (((addr) + PAGE_SIZE - 1) & PAGE_MASK)
+
+/*
+ * This handles the memory map.. We could make this a config
+ * option, but too many people screw it up, and too few need
+ * it.
+ *
+ * A __PAGE_OFFSET of 0xC0000000 means that the kernel has
+ * a virtual address space of one gigabyte, which limits the
+ * amount of physical memory you can use to about 950MB.
+ */
+
+#ifndef __ASSEMBLY__
+
+/* Pure 2^n version of get_order */
+static inline int get_order(unsigned long size) __attribute__((const));
+static inline int get_order(unsigned long size)
+{
+        int order;
+
+        size = (size - 1) >> (PAGE_SHIFT - 1);
+        order = -1;
+        do {
+                size >>= 1;
+                order++;
+        } while (size);
+        return order;
+}
+
+#endif /* __ASSEMBLY__ */
+
+#include <asm/page_offset.h>
+
+#define __PAGE_OFFSET           (PAGE_OFFSET_RAW)
+#define PAGE_OFFSET             ((unsigned long) __PAGE_OFFSET)
+
+/*
+ * main RAM and kernel working space are coincident at 0x90000000, but to make
+ * life more interesting, there's also an uncached virtual shadow at 0xb0000000
+ * - these mappings are fixed in the MMU
+ */
+#define __pfn_disp              (CONFIG_KERNEL_RAM_BASE_ADDRESS >> PAGE_SHIFT)
+
+#define __pa(x)                 ((unsigned long)(x))
+#define __va(x)                 ((void *)(unsigned long)(x))
+#define pfn_to_kaddr(pfn)       __va((pfn) << PAGE_SHIFT)
+#define pfn_to_page(pfn)        (mem_map + ((pfn) - __pfn_disp))
+#define page_to_pfn(page)       ((unsigned long)((page) - mem_map) + __pfn_disp)
+
+#define pfn_valid(pfn)                                  \
+({                                                      \
+        unsigned long __pfn = (pfn) - __pfn_disp;       \
+        __pfn < max_mapnr;                              \
+})
+
+#define virt_to_page(kaddr)     pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
+#define virt_addr_valid(kaddr)  pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
+#define page_to_phys(page)      (page_to_pfn(page) << PAGE_SHIFT)
+
+#define VM_DATA_DEFAULT_FLAGS \
+        (VM_READ | VM_WRITE | \
+        ((current->personality & READ_IMPLIES_EXEC) ? VM_EXEC : 0) | \
+                 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
+
+#endif /* __KERNEL__ */
+
+#endif /* _ASM_PAGE_H */
diff --git a/include/asm-mn10300/page_offset.h b/include/asm-mn10300/page_offset.h
new file mode 100644
index 000000000000..8eb5b16ad86b
--- /dev/null
+++ b/include/asm-mn10300/page_offset.h
@@ -0,0 +1,11 @@
+/* MN10300 Kernel base address
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ */
+#ifndef _ASM_PAGE_OFFSET_H
+#define _ASM_PAGE_OFFSET_H
+
+#define PAGE_OFFSET_RAW CONFIG_KERNEL_RAM_BASE_ADDRESS
+
+#endif
diff --git a/include/asm-mn10300/param.h b/include/asm-mn10300/param.h
new file mode 100644
index 000000000000..54b883ec3906
--- /dev/null
+++ b/include/asm-mn10300/param.h
@@ -0,0 +1,34 @@
+/* MN10300 Kernel parameters
+ *
+ * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_PARAM_H
+#define _ASM_PARAM_H
+
+#ifdef __KERNEL__
+#define HZ              1000            /* Internal kernel timer frequency */
+#define USER_HZ         100             /* .. some user interfaces are in
+                                         * "ticks" */
+#define CLOCKS_PER_SEC  (USER_HZ)       /* like times() */
+#endif
+
+#ifndef HZ
+#define HZ              100
+#endif
+
+#define EXEC_PAGESIZE   4096
+
+#ifndef NOGROUP
+#define NOGROUP         (-1)
+#endif
+
+#define MAXHOSTNAMELEN  64      /* max length of hostname */
+#define COMMAND_LINE_SIZE 256
+
+#endif /* _ASM_PARAM_H */
diff --git a/include/asm-mn10300/pci.h b/include/asm-mn10300/pci.h
new file mode 100644
index 000000000000..205192c52bb5
--- /dev/null
+++ b/include/asm-mn10300/pci.h
@@ -0,0 +1,133 @@
+/* MN10300 PCI definitions
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_PCI_H
+#define _ASM_PCI_H
+
+#ifdef __KERNEL__
+#include <linux/mm.h>           /* for struct page */
+
+#if 0
+#define __pcbdebug(FMT, ADDR, ...) \
+        printk(KERN_DEBUG "PCIBRIDGE[%08x]: "FMT"\n", \
+               (u32)(ADDR), ##__VA_ARGS__)
+
+#define __pcidebug(FMT, BUS, DEVFN, WHERE,...)          \
+do {                                                    \
+        printk(KERN_DEBUG "PCI[%02x:%02x.%x + %02x]: "FMT"\n",  \
+               (BUS)->number,                                   \
+               PCI_SLOT(DEVFN),                                 \
+               PCI_FUNC(DEVFN),                                 \
+               (u32)(WHERE), ##__VA_ARGS__);                    \
+} while (0)
+
+#else
+#define __pcbdebug(FMT, ADDR, ...)              do {} while (0)
+#define __pcidebug(FMT, BUS, DEVFN, WHERE, ...) do {} while (0)
+#endif
+
+/* Can be used to override the logic in pci_scan_bus for skipping
+ * already-configured bus numbers - to be used for buggy BIOSes or
+ * architectures with incomplete PCI setup by the loader */
+
+#ifdef CONFIG_PCI
+#define pcibios_assign_all_busses()     1
+extern void unit_pci_init(void);
+#else
+#define pcibios_assign_all_busses()     0
+#endif
+
+extern unsigned long pci_mem_start;
+#define PCIBIOS_MIN_IO          0xBE000004
+#define PCIBIOS_MIN_MEM         0xB8000000
+
+void pcibios_set_master(struct pci_dev *dev);
+void pcibios_penalize_isa_irq(int irq);
+
+/* Dynamic DMA mapping stuff.
+ * i386 has everything mapped statically.
+ */
+
+#include <linux/types.h>
+#include <linux/slab.h>
+#include <asm/scatterlist.h>
+#include <linux/string.h>
+#include <linux/mm.h>
+#include <asm/io.h>
+
+struct pci_dev;
+
+/* The PCI address space does equal the physical memory
+ * address space.  The networking and block device layers use
+ * this boolean for bounce buffer decisions.
+ */
+#define PCI_DMA_BUS_IS_PHYS     (1)
+
+
+/* This is always fine. */
+#define pci_dac_dma_supported(pci_dev, mask)    (0)
+
+/*
+ * These macros should be used after a pci_map_sg call has been done
+ * to get bus addresses of each of the SG entries and their lengths.
+ * You should only work with the number of sg entries pci_map_sg
+ * returns.
+ */
+#define sg_dma_address(sg)      ((sg)->dma_address)
+#define sg_dma_len(sg)          ((sg)->length)
+
+/* Return the index of the PCI controller for device. */
+static inline int pci_controller_num(struct pci_dev *dev)
+{
+        return 0;
+}
+
+#define HAVE_PCI_MMAP
+extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
+                               enum pci_mmap_state mmap_state,
+                               int write_combine);
+
+#endif /* __KERNEL__ */
+
+/* implement the pci_ DMA API in terms of the generic device dma_ one */
+#include <asm-generic/pci-dma-compat.h>
+
+/**
+ * pcibios_resource_to_bus - convert resource to PCI bus address
+ * @dev: device which owns this resource
+ * @region: converted bus-centric region (start,end)
+ * @res: resource to convert
+ *
+ * Convert a resource to a PCI device bus address or bus window.
+ */
+extern void pcibios_resource_to_bus(struct pci_dev *dev,
+                                    struct pci_bus_region *region,
+                                    struct resource *res);
+
+extern void pcibios_bus_to_resource(struct pci_dev *dev,
+                                    struct resource *res,
+                                    struct pci_bus_region *region);
+
+static inline struct resource *
+pcibios_select_root(struct pci_dev *pdev, struct resource *res)
+{
+        struct resource *root = NULL;
+
+        if (res->flags & IORESOURCE_IO)
+                root = &ioport_resource;
+        if (res->flags & IORESOURCE_MEM)
+                root = &iomem_resource;
+
+        return root;
+}
+
+#define pcibios_scan_all_fns(a, b)      0
+
+#endif /* _ASM_PCI_H */
diff --git a/include/asm-mn10300/percpu.h b/include/asm-mn10300/percpu.h
new file mode 100644
index 000000000000..06a959d67234
--- /dev/null
+++ b/include/asm-mn10300/percpu.h
@@ -0,0 +1 @@
+#include <asm-generic/percpu.h>
diff --git a/include/asm-mn10300/pgalloc.h b/include/asm-mn10300/pgalloc.h
new file mode 100644
index 000000000000..ec057e1bd4cf
--- /dev/null
+++ b/include/asm-mn10300/pgalloc.h
@@ -0,0 +1,56 @@
+/* MN10300 Page and page table/directory allocation
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_PGALLOC_H
+#define _ASM_PGALLOC_H
+
+#include <asm/processor.h>
+#include <asm/page.h>
+#include <linux/threads.h>
+#include <linux/mm.h>           /* for struct page */
+
+struct mm_struct;
+struct page;
+
+/* attach a page table to a PMD entry */
+#define pmd_populate_kernel(mm, pmd, pte) \
+        set_pmd(pmd, __pmd(__pa(pte) | _PAGE_TABLE))
+
+static inline
+void pmd_populate(struct mm_struct *mm, pmd_t *pmd, struct page *pte)
+{
+        set_pmd(pmd, __pmd((page_to_pfn(pte) << PAGE_SHIFT) | _PAGE_TABLE));
+}
+#define pmd_pgtable(pmd) pmd_page(pmd)
+
+/*
+ * Allocate and free page tables.
+ */
+
+extern pgd_t *pgd_alloc(struct mm_struct *);
+extern void pgd_free(struct mm_struct *, pgd_t *);
+
+extern pte_t *pte_alloc_one_kernel(struct mm_struct *, unsigned long);
+extern struct page *pte_alloc_one(struct mm_struct *, unsigned long);
+
+static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
+{
+        free_page((unsigned long) pte);
+}
+
+static inline void pte_free(struct mm_struct *mm, struct page *pte)
+{
+        __free_page(pte);
+}
+
+
+#define __pte_free_tlb(tlb, pte) tlb_remove_page((tlb), (pte))
+
+#endif /* _ASM_PGALLOC_H */
diff --git a/include/asm-mn10300/pgtable.h b/include/asm-mn10300/pgtable.h
new file mode 100644
index 000000000000..375c4941deda
--- /dev/null
+++ b/include/asm-mn10300/pgtable.h
@@ -0,0 +1,489 @@
+/* MN10300 Page table manipulators and constants
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ *
+ *
+ * The Linux memory management assumes a three-level page table setup. On
+ * the i386, we use that, but "fold" the mid level into the top-level page
+ * table, so that we physically have the same two-level page table as the
+ * i386 mmu expects.
+ *
+ * This file contains the functions and defines necessary to modify and use
+ * the i386 page table tree for the purposes of the MN10300 TLB handler
+ * functions.
+ */
+#ifndef _ASM_PGTABLE_H
+#define _ASM_PGTABLE_H
+
+#include <asm/cpu-regs.h>
+
+#ifndef __ASSEMBLY__
+#include <asm/processor.h>
+#include <asm/cache.h>
+#include <linux/threads.h>
+
+#include <asm/bitops.h>
+
+#include <linux/slab.h>
+#include <linux/list.h>
+#include <linux/spinlock.h>
+
+/*
+ * ZERO_PAGE is a global shared page that is always zero: used
+ * for zero-mapped memory areas etc..
+ */
+#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
+extern unsigned long empty_zero_page[1024];
+extern spinlock_t pgd_lock;
+extern struct page *pgd_list;
+
+extern void pmd_ctor(void *, struct kmem_cache *, unsigned long);
+extern void pgtable_cache_init(void);
+extern void paging_init(void);
+
+#endif /* !__ASSEMBLY__ */
+
+/*
+ * The Linux mn10300 paging architecture only implements both the traditional
+ * 2-level page tables
+ */
+#define PGDIR_SHIFT     22
+#define PTRS_PER_PGD    1024
+#define PTRS_PER_PUD    1       /* we don't really have any PUD physically */
+#define PTRS_PER_PMD    1       /* we don't really have any PMD physically */
+#define PTRS_PER_PTE    1024
+
+#define PGD_SIZE        PAGE_SIZE
+#define PMD_SIZE        (1UL << PMD_SHIFT)
+#define PGDIR_SIZE      (1UL << PGDIR_SHIFT)
+#define PGDIR_MASK      (~(PGDIR_SIZE - 1))
+
+#define USER_PTRS_PER_PGD       (TASK_SIZE / PGDIR_SIZE)
+#define FIRST_USER_ADDRESS      0
+
+#define USER_PGD_PTRS           (PAGE_OFFSET >> PGDIR_SHIFT)
+#define KERNEL_PGD_PTRS         (PTRS_PER_PGD - USER_PGD_PTRS)
+
+#define TWOLEVEL_PGDIR_SHIFT    22
+#define BOOT_USER_PGD_PTRS      (__PAGE_OFFSET >> TWOLEVEL_PGDIR_SHIFT)
+#define BOOT_KERNEL_PGD_PTRS    (1024 - BOOT_USER_PGD_PTRS)
+
+#ifndef __ASSEMBLY__
+extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
+#endif
+
+/*
+ * Unfortunately, due to the way the MMU works on the MN10300, the vmalloc VM
+ * area has to be in the lower half of the virtual address range (the upper
+ * half is not translated through the TLB).
+ *
+ * So in this case, the vmalloc area goes at the bottom of the address map
+ * (leaving a hole at the very bottom to catch addressing errors), and
+ * userspace starts immediately above.
+ *
+ * The vmalloc() routines also leaves a hole of 4kB between each vmalloced
+ * area to catch addressing errors.
+ */
+#define VMALLOC_OFFSET  (8 * 1024 * 1024)
+#define VMALLOC_START   (0x70000000)
+#define VMALLOC_END     (0x7C000000)
+
+#ifndef __ASSEMBLY__
+extern pte_t kernel_vmalloc_ptes[(VMALLOC_END - VMALLOC_START) / PAGE_SIZE];
+#endif
+
+/* IPTEL/DPTEL bit assignments */
+#define _PAGE_BIT_VALID         xPTEL_V_BIT
+#define _PAGE_BIT_ACCESSED      xPTEL_UNUSED1_BIT       /* mustn't be loaded into IPTEL/DPTEL */
+#define _PAGE_BIT_NX            xPTEL_UNUSED2_BIT       /* mustn't be loaded into IPTEL/DPTEL */
+#define _PAGE_BIT_CACHE         xPTEL_C_BIT
+#define _PAGE_BIT_PRESENT       xPTEL_PV_BIT
+#define _PAGE_BIT_DIRTY         xPTEL_D_BIT
+#define _PAGE_BIT_GLOBAL        xPTEL_G_BIT
+
+#define _PAGE_VALID             xPTEL_V
+#define _PAGE_ACCESSED          xPTEL_UNUSED1
+#define _PAGE_NX                xPTEL_UNUSED2           /* no-execute bit */
+#define _PAGE_CACHE             xPTEL_C
+#define _PAGE_PRESENT           xPTEL_PV
+#define _PAGE_DIRTY             xPTEL_D
+#define _PAGE_PROT              xPTEL_PR
+#define _PAGE_PROT_RKNU         xPTEL_PR_ROK
+#define _PAGE_PROT_WKNU         xPTEL_PR_RWK
+#define _PAGE_PROT_RKRU         xPTEL_PR_ROK_ROU
+#define _PAGE_PROT_WKRU         xPTEL_PR_RWK_ROU
+#define _PAGE_PROT_WKWU         xPTEL_PR_RWK_RWU
+#define _PAGE_GLOBAL            xPTEL_G
+#define _PAGE_PSE               xPTEL_PS_4Mb            /* 4MB page */
+
+#define _PAGE_FILE              xPTEL_UNUSED1_BIT       /* set:pagecache unset:swap */
+
+#define __PAGE_PROT_UWAUX       0x040
+#define __PAGE_PROT_USER        0x080
+#define __PAGE_PROT_WRITE       0x100
+
+#define _PAGE_PRESENTV          (_PAGE_PRESENT|_PAGE_VALID)
+#define _PAGE_PROTNONE          0x000   /* If not present */
+
+#ifndef __ASSEMBLY__
+
+#define VMALLOC_VMADDR(x) ((unsigned long)(x))
+
+#define _PAGE_TABLE     (_PAGE_PRESENTV | _PAGE_PROT_WKNU | _PAGE_ACCESSED | _PAGE_DIRTY)
+#define _PAGE_CHG_MASK  (PTE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY)
+
+#define __PAGE_NONE     (_PAGE_PRESENTV | _PAGE_PROT_RKNU | _PAGE_ACCESSED | _PAGE_CACHE)
+#define __PAGE_SHARED   (_PAGE_PRESENTV | _PAGE_PROT_WKWU | _PAGE_ACCESSED | _PAGE_CACHE)
+#define __PAGE_COPY     (_PAGE_PRESENTV | _PAGE_PROT_RKRU | _PAGE_ACCESSED | _PAGE_CACHE)
+#define __PAGE_READONLY (_PAGE_PRESENTV | _PAGE_PROT_RKRU | _PAGE_ACCESSED | _PAGE_CACHE)
+
+#define PAGE_NONE               __pgprot(__PAGE_NONE     | _PAGE_NX)
+#define PAGE_SHARED_NOEXEC      __pgprot(__PAGE_SHARED   | _PAGE_NX)
+#define PAGE_COPY_NOEXEC        __pgprot(__PAGE_COPY     | _PAGE_NX)
+#define PAGE_READONLY_NOEXEC    __pgprot(__PAGE_READONLY | _PAGE_NX)
+#define PAGE_SHARED_EXEC        __pgprot(__PAGE_SHARED)
+#define PAGE_COPY_EXEC          __pgprot(__PAGE_COPY)
+#define PAGE_READONLY_EXEC      __pgprot(__PAGE_READONLY)
+#define PAGE_COPY               PAGE_COPY_NOEXEC
+#define PAGE_READONLY           PAGE_READONLY_NOEXEC
+#define PAGE_SHARED             PAGE_SHARED_EXEC
+
+#define __PAGE_KERNEL_BASE (_PAGE_PRESENTV | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_GLOBAL)
+
+#define __PAGE_KERNEL           (__PAGE_KERNEL_BASE | _PAGE_PROT_WKNU | _PAGE_CACHE | _PAGE_NX)
+#define __PAGE_KERNEL_NOCACHE   (__PAGE_KERNEL_BASE | _PAGE_PROT_WKNU | _PAGE_NX)
+#define __PAGE_KERNEL_EXEC      (__PAGE_KERNEL & ~_PAGE_NX)
+#define __PAGE_KERNEL_RO        (__PAGE_KERNEL_BASE | _PAGE_PROT_RKNU | _PAGE_CACHE | _PAGE_NX)
+#define __PAGE_KERNEL_LARGE     (__PAGE_KERNEL | _PAGE_PSE)
+#define __PAGE_KERNEL_LARGE_EXEC (__PAGE_KERNEL_EXEC | _PAGE_PSE)
+
+#define PAGE_KERNEL             __pgprot(__PAGE_KERNEL)
+#define PAGE_KERNEL_RO          __pgprot(__PAGE_KERNEL_RO)
+#define PAGE_KERNEL_EXEC        __pgprot(__PAGE_KERNEL_EXEC)
+#define PAGE_KERNEL_NOCACHE     __pgprot(__PAGE_KERNEL_NOCACHE)
+#define PAGE_KERNEL_LARGE       __pgprot(__PAGE_KERNEL_LARGE)
+#define PAGE_KERNEL_LARGE_EXEC  __pgprot(__PAGE_KERNEL_LARGE_EXEC)
+
+/*
+ * Whilst the MN10300 can do page protection for execute (given separate data
+ * and insn TLBs), we are not supporting it at the moment. Write permission,
+ * however, always implies read permission (but not execute permission).
+ */
+#define __P000  PAGE_NONE
+#define __P001  PAGE_READONLY_NOEXEC
+#define __P010  PAGE_COPY_NOEXEC
+#define __P011  PAGE_COPY_NOEXEC
+#define __P100  PAGE_READONLY_EXEC
+#define __P101  PAGE_READONLY_EXEC
+#define __P110  PAGE_COPY_EXEC
+#define __P111  PAGE_COPY_EXEC
+
+#define __S000  PAGE_NONE
+#define __S001  PAGE_READONLY_NOEXEC
+#define __S010  PAGE_SHARED_NOEXEC
+#define __S011  PAGE_SHARED_NOEXEC
+#define __S100  PAGE_READONLY_EXEC
+#define __S101  PAGE_READONLY_EXEC
+#define __S110  PAGE_SHARED_EXEC
+#define __S111  PAGE_SHARED_EXEC
+
+/*
+ * Define this to warn about kernel memory accesses that are
+ * done without a 'verify_area(VERIFY_WRITE,..)'
+ */
+#undef TEST_VERIFY_AREA
+
+#define pte_present(x)  (pte_val(x) & _PAGE_VALID)
+#define pte_clear(mm, addr, xp)                         \
+do {                                                    \
+        set_pte_at((mm), (addr), (xp), __pte(0));       \
+} while (0)
+
+#define pmd_none(x)     (!pmd_val(x))
+#define pmd_present(x)  (!pmd_none(x))
+#define pmd_clear(xp)   do { set_pmd(xp, __pmd(0)); } while (0)
+#define pmd_bad(x)      0
+
+
+#define pages_to_mb(x) ((x) >> (20 - PAGE_SHIFT))
+
+#ifndef __ASSEMBLY__
+
+/*
+ * The following only work if pte_present() is true.
+ * Undefined behaviour if not..
+ */
+static inline int pte_user(pte_t pte)   { return pte_val(pte) & __PAGE_PROT_USER; }
+static inline int pte_read(pte_t pte)   { return pte_val(pte) & __PAGE_PROT_USER; }
+static inline int pte_dirty(pte_t pte)  { return pte_val(pte) & _PAGE_DIRTY; }
+static inline int pte_young(pte_t pte)  { return pte_val(pte) & _PAGE_ACCESSED; }
+static inline int pte_write(pte_t pte)  { return pte_val(pte) & __PAGE_PROT_WRITE; }
+
+/*
+ * The following only works if pte_present() is not true.
+ */
+static inline int pte_file(pte_t pte)   { return pte_val(pte) & _PAGE_FILE; }
+
+static inline pte_t pte_rdprotect(pte_t pte)
+{
+        pte_val(pte) &= ~(__PAGE_PROT_USER|__PAGE_PROT_UWAUX); return pte;
+}
+static inline pte_t pte_exprotect(pte_t pte)
+{
+        pte_val(pte) |= _PAGE_NX; return pte;
+}
+
+static inline pte_t pte_wrprotect(pte_t pte)
+{
+        pte_val(pte) &= ~(__PAGE_PROT_WRITE|__PAGE_PROT_UWAUX); return pte;
+}
+
+static inline pte_t pte_mkclean(pte_t pte)      { pte_val(pte) &= ~_PAGE_DIRTY; return pte; }
+static inline pte_t pte_mkold(pte_t pte)        { pte_val(pte) &= ~_PAGE_ACCESSED; return pte; }
+static inline pte_t pte_mkdirty(pte_t pte)      { pte_val(pte) |= _PAGE_DIRTY; return pte; }
+static inline pte_t pte_mkyoung(pte_t pte)      { pte_val(pte) |= _PAGE_ACCESSED; return pte; }
+static inline pte_t pte_mkexec(pte_t pte)       { pte_val(pte) &= ~_PAGE_NX; return pte; }
+
+static inline pte_t pte_mkread(pte_t pte)
+{
+        pte_val(pte) |= __PAGE_PROT_USER;
+        if (pte_write(pte))
+                pte_val(pte) |= __PAGE_PROT_UWAUX;
+        return pte;
+}
+static inline pte_t pte_mkwrite(pte_t pte)
+{
+        pte_val(pte) |= __PAGE_PROT_WRITE;
+        if (pte_val(pte) & __PAGE_PROT_USER)
+                pte_val(pte) |= __PAGE_PROT_UWAUX;
+        return pte;
+}
+
+#define pte_ERROR(e) \
+        printk(KERN_ERR "%s:%d: bad pte %08lx.\n", \
+               __FILE__, __LINE__, pte_val(e))
+#define pgd_ERROR(e) \
+        printk(KERN_ERR "%s:%d: bad pgd %08lx.\n", \
+               __FILE__, __LINE__, pgd_val(e))
+
+/*
+ * The "pgd_xxx()" functions here are trivial for a folded two-level
+ * setup: the pgd is never bad, and a pmd always exists (as it's folded
+ * into the pgd entry)
+ */
+#define pgd_clear(xp)                           do { } while (0)
+
+/*
+ * Certain architectures need to do special things when PTEs
+ * within a page table are directly modified.  Thus, the following
+ * hook is made available.
+ */
+#define set_pte(pteptr, pteval)                 (*(pteptr) = pteval)
+#define set_pte_at(mm, addr, ptep, pteval)      set_pte((ptep), (pteval))
+#define set_pte_atomic(pteptr, pteval)          set_pte((pteptr), (pteval))
+
+/*
+ * (pmds are folded into pgds so this doesn't get actually called,
+ * but the define is needed for a generic inline function.)
+ */
+#define set_pmd(pmdptr, pmdval) (*(pmdptr) = pmdval)
+
+#define ptep_get_and_clear(mm, addr, ptep) \
+        __pte(xchg(&(ptep)->pte, 0))
+#define pte_same(a, b)          (pte_val(a) == pte_val(b))
+#define pte_page(x)             pfn_to_page(pte_pfn(x))
+#define pte_none(x)             (!pte_val(x))
+#define pte_pfn(x)              ((unsigned long) (pte_val(x) >> PAGE_SHIFT))
+#define __pfn_addr(pfn)         ((pfn) << PAGE_SHIFT)
+#define pfn_pte(pfn, prot)      __pte(__pfn_addr(pfn) | pgprot_val(prot))
+#define pfn_pmd(pfn, prot)      __pmd(__pfn_addr(pfn) | pgprot_val(prot))
+
+/*
+ * All present user pages are user-executable:
+ */
+static inline int pte_exec(pte_t pte)
+{
+        return pte_user(pte);
+}
+
+/*
+ * All present pages are kernel-executable:
+ */
+static inline int pte_exec_kernel(pte_t pte)
+{
+        return 1;
+}
+
+/*
+ * Bits 0 and 1 are taken, split up the 29 bits of offset
+ * into this range:
+ */
+#define PTE_FILE_MAX_BITS       29
+
+#define pte_to_pgoff(pte)       (pte_val(pte) >> 2)
+#define pgoff_to_pte(off)       __pte((off) << 2 | _PAGE_FILE)
+
+/* Encode and de-code a swap entry */
+#define __swp_type(x)                   (((x).val >> 2) & 0x3f)
+#define __swp_offset(x)                 ((x).val >> 8)
+#define __swp_entry(type, offset) \
+        ((swp_entry_t) { ((type) << 2) | ((offset) << 8) })
+#define __pte_to_swp_entry(pte)         ((swp_entry_t) { pte_val(pte) })
+#define __swp_entry_to_pte(x)           __pte((x).val)
+
+static inline
+int ptep_test_and_clear_dirty(struct vm_area_struct *vma, unsigned long addr,
+                              pte_t *ptep)
+{
+        if (!pte_dirty(*ptep))
+                return 0;
+        return test_and_clear_bit(_PAGE_BIT_DIRTY, &ptep->pte);
+}
+
+static inline
+int ptep_test_and_clear_young(struct vm_area_struct *vma, unsigned long addr,
+                              pte_t *ptep)
+{
+        if (!pte_young(*ptep))
+                return 0;
+        return test_and_clear_bit(_PAGE_BIT_ACCESSED, &ptep->pte);
+}
+
+static inline
+void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
+{
+        pte_val(*ptep) &= ~(__PAGE_PROT_WRITE|__PAGE_PROT_UWAUX);
+}
+
+static inline void ptep_mkdirty(pte_t *ptep)
+{
+        set_bit(_PAGE_BIT_DIRTY, &ptep->pte);
+}
+
+/*
+ * Macro to mark a page protection value as "uncacheable".  On processors which
+ * do not support it, this is a no-op.
+ */
+#define pgprot_noncached(prot)  __pgprot(pgprot_val(prot) | _PAGE_CACHE)
+
+
+/*
+ * Conversion functions: convert a page and protection to a page entry,
+ * and a page entry and page directory to the page they refer to.
+ */
+
+#define mk_pte(page, pgprot)    pfn_pte(page_to_pfn(page), (pgprot))
+#define mk_pte_huge(entry) \
+        ((entry).pte |= _PAGE_PRESENT | _PAGE_PSE | _PAGE_VALID)
+
+static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
+{
+        pte_val(pte) &= _PAGE_CHG_MASK;
+        pte_val(pte) |= pgprot_val(newprot);
+        return pte;
+}
+
+#define page_pte(page)  page_pte_prot((page), __pgprot(0))
+
+#define pmd_page_kernel(pmd) \
+        ((unsigned long) __va(pmd_val(pmd) & PAGE_MASK))
+
+#define pmd_page(pmd)   pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT)
+
+#define pmd_large(pmd) \
+        ((pmd_val(pmd) & (_PAGE_PSE | _PAGE_PRESENT)) == \
+         (_PAGE_PSE | _PAGE_PRESENT))
+
+/*
+ * the pgd page can be thought of an array like this: pgd_t[PTRS_PER_PGD]
+ *
+ * this macro returns the index of the entry in the pgd page which would
+ * control the given virtual address
+ */
+#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
+
+/*
+ * pgd_offset() returns a (pgd_t *)
+ * pgd_index() is used get the offset into the pgd page's array of pgd_t's;
+ */
+#define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
+
+/*
+ * a shortcut which implies the use of the kernel's pgd, instead
+ * of a process's
+ */
+#define pgd_offset_k(address)   pgd_offset(&init_mm, address)
+
+/*
+ * the pmd page can be thought of an array like this: pmd_t[PTRS_PER_PMD]
+ *
+ * this macro returns the index of the entry in the pmd page which would
+ * control the given virtual address
+ */
+#define pmd_index(address) \
+        (((address) >> PMD_SHIFT) & (PTRS_PER_PMD - 1))
+
+/*
+ * the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE]
+ *
+ * this macro returns the index of the entry in the pte page which would
+ * control the given virtual address
+ */
+#define pte_index(address) \
+        (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
+
+#define pte_offset_kernel(dir, address) \
+        ((pte_t *) pmd_page_kernel(*(dir)) +  pte_index(address))
+
+/*
+ * Make a given kernel text page executable/non-executable.
+ * Returns the previous executability setting of that page (which
+ * is used to restore the previous state). Used by the SMP bootup code.
+ * NOTE: this is an __init function for security reasons.
+ */
+static inline int set_kernel_exec(unsigned long vaddr, int enable)
+{
+        return 0;
+}
+
+#define pte_offset_map(dir, address) \
+        ((pte_t *) page_address(pmd_page(*(dir))) + pte_index(address))
+#define pte_offset_map_nested(dir, address) pte_offset_map(dir, address)
+#define pte_unmap(pte)          do {} while (0)
+#define pte_unmap_nested(pte)   do {} while (0)
+
+/*
+ * The MN10300 has external MMU info in the form of a TLB: this is adapted from
+ * the kernel page tables containing the necessary information by tlb-mn10300.S
+ */
+extern void update_mmu_cache(struct vm_area_struct *vma,
+                             unsigned long address, pte_t pte);
+
+#endif /* !__ASSEMBLY__ */
+
+#define kern_addr_valid(addr)   (1)
+
+#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
+        remap_pfn_range((vma), (vaddr), (pfn), (size), (prot))
+
+#define MK_IOSPACE_PFN(space, pfn)      (pfn)
+#define GET_IOSPACE(pfn)                0
+#define GET_PFN(pfn)                    (pfn)
+
+#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
+#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY
+#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
+#define __HAVE_ARCH_PTEP_SET_WRPROTECT
+#define __HAVE_ARCH_PTEP_MKDIRTY
+#define __HAVE_ARCH_PTE_SAME
+#include <asm-generic/pgtable.h>
+
+#endif /* !__ASSEMBLY__ */
+
+#endif /* _ASM_PGTABLE_H */
diff --git a/include/asm-mn10300/pio-regs.h b/include/asm-mn10300/pio-regs.h
new file mode 100644
index 000000000000..96bc8182d0ba
--- /dev/null
+++ b/include/asm-mn10300/pio-regs.h
@@ -0,0 +1,233 @@
+/* MN10300 On-board I/O port module registers
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_PIO_REGS_H
+#define _ASM_PIO_REGS_H
+
+#include <asm/cpu-regs.h>
+#include <asm/intctl-regs.h>
+
+#ifdef __KERNEL__
+
+/* I/O port 0 */
+#define P0MD                    __SYSREG(0xdb000000, u16)       /* mode reg */
+#define P0MD_0                  0x0003  /* mask */
+#define P0MD_0_IN               0x0000  /* input mode */
+#define P0MD_0_OUT              0x0001  /* output mode */
+#define P0MD_0_TM0IO            0x0002  /* timer 0 I/O mode */
+#define P0MD_0_EYECLK           0x0003  /* test signal output (clock) */
+#define P0MD_1                  0x000c
+#define P0MD_1_IN               0x0000
+#define P0MD_1_OUT              0x0004
+#define P0MD_1_TM1IO            0x0008  /* timer 1 I/O mode */
+#define P0MD_1_EYED             0x000c  /* test signal output (data) */
+#define P0MD_2                  0x0030
+#define P0MD_2_IN               0x0000
+#define P0MD_2_OUT              0x0010
+#define P0MD_2_TM2IO            0x0020  /* timer 2 I/O mode */
+#define P0MD_3                  0x00c0
+#define P0MD_3_IN               0x0000
+#define P0MD_3_OUT              0x0040
+#define P0MD_3_TM3IO            0x0080  /* timer 3 I/O mode */
+#define P0MD_4                  0x0300
+#define P0MD_4_IN               0x0000
+#define P0MD_4_OUT              0x0100
+#define P0MD_4_TM4IO            0x0200  /* timer 4 I/O mode */
+#define P0MD_4_XCTS             0x0300  /* XCTS input for serial port 2 */
+#define P0MD_5                  0x0c00
+#define P0MD_5_IN               0x0000
+#define P0MD_5_OUT              0x0400
+#define P0MD_5_TM5IO            0x0800  /* timer 5 I/O mode */
+#define P0MD_6                  0x3000
+#define P0MD_6_IN               0x0000
+#define P0MD_6_OUT              0x1000
+#define P0MD_6_TM6IOA           0x2000  /* timer 6 I/O mode A */
+#define P0MD_7                  0xc000
+#define P0MD_7_IN               0x0000
+#define P0MD_7_OUT              0x4000
+#define P0MD_7_TM6IOB           0x8000  /* timer 6 I/O mode B */
+
+#define P0IN                    __SYSREG(0xdb000004, u8)        /* in reg */
+#define P0OUT                   __SYSREG(0xdb000008, u8)        /* out reg */
+
+#define P0TMIO                  __SYSREG(0xdb00000c, u8)        /* TM pin I/O control reg */
+#define P0TMIO_TM0_IN           0x00
+#define P0TMIO_TM0_OUT          0x01
+#define P0TMIO_TM1_IN           0x00
+#define P0TMIO_TM1_OUT          0x02
+#define P0TMIO_TM2_IN           0x00
+#define P0TMIO_TM2_OUT          0x04
+#define P0TMIO_TM3_IN           0x00
+#define P0TMIO_TM3_OUT          0x08
+#define P0TMIO_TM4_IN           0x00
+#define P0TMIO_TM4_OUT          0x10
+#define P0TMIO_TM5_IN           0x00
+#define P0TMIO_TM5_OUT          0x20
+#define P0TMIO_TM6A_IN          0x00
+#define P0TMIO_TM6A_OUT         0x40
+#define P0TMIO_TM6B_IN          0x00
+#define P0TMIO_TM6B_OUT         0x80
+
+/* I/O port 1 */
+#define P1MD                    __SYSREG(0xdb000100, u16)       /* mode reg */
+#define P1MD_0                  0x0003  /* mask */
+#define P1MD_0_IN               0x0000  /* input mode */
+#define P1MD_0_OUT              0x0001  /* output mode */
+#define P1MD_0_TM7IO            0x0002  /* timer 7 I/O mode */
+#define P1MD_0_ADTRG            0x0003  /* A/D converter trigger mode */
+#define P1MD_1                  0x000c
+#define P1MD_1_IN               0x0000
+#define P1MD_1_OUT              0x0004
+#define P1MD_1_TM8IO            0x0008  /* timer 8 I/O mode */
+#define P1MD_1_XDMR0            0x000c  /* DMA request input 0 mode */
+#define P1MD_2                  0x0030
+#define P1MD_2_IN               0x0000
+#define P1MD_2_OUT              0x0010
+#define P1MD_2_TM9IO            0x0020  /* timer 9 I/O mode */
+#define P1MD_2_XDMR1            0x0030  /* DMA request input 1 mode */
+#define P1MD_3                  0x00c0
+#define P1MD_3_IN               0x0000
+#define P1MD_3_OUT              0x0040
+#define P1MD_3_TM10IO           0x0080  /* timer 10 I/O mode */
+#define P1MD_3_FRQS0            0x00c0  /* CPU clock multiplier setting input 0 mode */
+#define P1MD_4                  0x0300
+#define P1MD_4_IN               0x0000
+#define P1MD_4_OUT              0x0100
+#define P1MD_4_TM11IO           0x0200  /* timer 11 I/O mode */
+#define P1MD_4_FRQS1            0x0300  /* CPU clock multiplier setting input 1 mode */
+
+#define P1IN                    __SYSREG(0xdb000104, u8)        /* in reg */
+#define P1OUT                   __SYSREG(0xdb000108, u8)        /* out reg */
+#define P1TMIO                  __SYSREG(0xdb00010c, u8)        /* TM pin I/O control reg */
+#define P1TMIO_TM11_IN          0x00
+#define P1TMIO_TM11_OUT         0x01
+#define P1TMIO_TM10_IN          0x00
+#define P1TMIO_TM10_OUT         0x02
+#define P1TMIO_TM9_IN           0x00
+#define P1TMIO_TM9_OUT          0x04
+#define P1TMIO_TM8_IN           0x00
+#define P1TMIO_TM8_OUT          0x08
+#define P1TMIO_TM7_IN           0x00
+#define P1TMIO_TM7_OUT          0x10
+
+/* I/O port 2 */
+#define P2MD                    __SYSREG(0xdb000200, u16)       /* mode reg */
+#define P2MD_0                  0x0003  /* mask */
+#define P2MD_0_IN               0x0000  /* input mode */
+#define P2MD_0_OUT              0x0001  /* output mode */
+#define P2MD_0_BOOTBW           0x0003  /* boot bus width selector mode */
+#define P2MD_1                  0x000c
+#define P2MD_1_IN               0x0000
+#define P2MD_1_OUT              0x0004
+#define P2MD_1_BOOTSEL          0x000c  /* boot device selector mode */
+#define P2MD_2                  0x0030
+#define P2MD_2_IN               0x0000
+#define P2MD_2_OUT              0x0010
+#define P2MD_3                  0x00c0
+#define P2MD_3_IN               0x0000
+#define P2MD_3_OUT              0x0040
+#define P2MD_3_CKIO             0x00c0  /* mode */
+#define P2MD_4                  0x0300
+#define P2MD_4_IN               0x0000
+#define P2MD_4_OUT              0x0100
+#define P2MD_4_CMOD             0x0300  /* mode */
+
+#define P2IN                    __SYSREG(0xdb000204, u8)        /* in reg */
+#define P2OUT                   __SYSREG(0xdb000208, u8)        /* out reg */
+#define P2TMIO                  __SYSREG(0xdb00020c, u8)        /* TM pin I/O control reg */
+
+/* I/O port 3 */
+#define P3MD                    __SYSREG(0xdb000300, u16)       /* mode reg */
+#define P3MD_0                  0x0003  /* mask */
+#define P3MD_0_IN               0x0000  /* input mode */
+#define P3MD_0_OUT              0x0001  /* output mode */
+#define P3MD_0_AFRXD            0x0002  /* AFR interface mode */
+#define P3MD_1                  0x000c
+#define P3MD_1_IN               0x0000
+#define P3MD_1_OUT              0x0004
+#define P3MD_1_AFTXD            0x0008  /* AFR interface mode */
+#define P3MD_2                  0x0030
+#define P3MD_2_IN               0x0000
+#define P3MD_2_OUT              0x0010
+#define P3MD_2_AFSCLK           0x0020  /* AFR interface mode */
+#define P3MD_3                  0x00c0
+#define P3MD_3_IN               0x0000
+#define P3MD_3_OUT              0x0040
+#define P3MD_3_AFFS             0x0080  /* AFR interface mode */
+#define P3MD_4                  0x0300
+#define P3MD_4_IN               0x0000
+#define P3MD_4_OUT              0x0100
+#define P3MD_4_AFEHC            0x0200  /* AFR interface mode */
+
+#define P3IN                    __SYSREG(0xdb000304, u8)        /* in reg */
+#define P3OUT                   __SYSREG(0xdb000308, u8)        /* out reg */
+
+/* I/O port 4 */
+#define P4MD                    __SYSREG(0xdb000400, u16)       /* mode reg */
+#define P4MD_0                  0x0003  /* mask */
+#define P4MD_0_IN               0x0000  /* input mode */
+#define P4MD_0_OUT              0x0001  /* output mode */
+#define P4MD_0_SCL0             0x0002  /* I2C/serial mode */
+#define P4MD_1                  0x000c
+#define P4MD_1_IN               0x0000
+#define P4MD_1_OUT              0x0004
+#define P4MD_1_SDA0             0x0008
+#define P4MD_2                  0x0030
+#define P4MD_2_IN               0x0000
+#define P4MD_2_OUT              0x0010
+#define P4MD_2_SCL1             0x0020
+#define P4MD_3                  0x00c0
+#define P4MD_3_IN               0x0000
+#define P4MD_3_OUT              0x0040
+#define P4MD_3_SDA1             0x0080
+#define P4MD_4                  0x0300
+#define P4MD_4_IN               0x0000
+#define P4MD_4_OUT              0x0100
+#define P4MD_4_SBO0             0x0200
+#define P4MD_5                  0x0c00
+#define P4MD_5_IN               0x0000
+#define P4MD_5_OUT              0x0400
+#define P4MD_5_SBO1             0x0800
+#define P4MD_6                  0x3000
+#define P4MD_6_IN               0x0000
+#define P4MD_6_OUT              0x1000
+#define P4MD_6_SBT0             0x2000
+#define P4MD_7                  0xc000
+#define P4MD_7_IN               0x0000
+#define P4MD_7_OUT              0x4000
+#define P4MD_7_SBT1             0x8000
+
+#define P4IN                    __SYSREG(0xdb000404, u8)        /* in reg */
+#define P4OUT                   __SYSREG(0xdb000408, u8)        /* out reg */
+
+/* I/O port 5 */
+#define P5MD                    __SYSREG(0xdb000500, u16)       /* mode reg */
+#define P5MD_0                  0x0003  /* mask */
+#define P5MD_0_IN               0x0000  /* input mode */
+#define P5MD_0_OUT              0x0001  /* output mode */
+#define P5MD_0_IRTXD            0x0002  /* IrDA mode */
+#define P5MD_0_SOUT             0x0004  /* serial mode */
+#define P5MD_1                  0x000c
+#define P5MD_1_IN               0x0000
+#define P5MD_1_OUT              0x0004
+#define P5MD_1_IRRXDS           0x0008  /* IrDA mode */
+#define P5MD_1_SIN              0x000c  /* serial mode */
+#define P5MD_2                  0x0030
+#define P5MD_2_IN               0x0000
+#define P5MD_2_OUT              0x0010
+#define P5MD_2_IRRXDF           0x0020  /* IrDA mode */
+
+#define P5IN                    __SYSREG(0xdb000504, u8)        /* in reg */
+#define P5OUT                   __SYSREG(0xdb000508, u8)        /* out reg */
+
+
+#endif /* __KERNEL__ */
+
+#endif /* _ASM_PIO_REGS_H */
diff --git a/include/asm-mn10300/poll.h b/include/asm-mn10300/poll.h
new file mode 100644
index 000000000000..c98509d3149e
--- /dev/null
+++ b/include/asm-mn10300/poll.h
@@ -0,0 +1 @@
+#include <asm-generic/poll.h>
diff --git a/include/asm-mn10300/posix_types.h b/include/asm-mn10300/posix_types.h
new file mode 100644
index 000000000000..077567c37798
--- /dev/null
+++ b/include/asm-mn10300/posix_types.h
@@ -0,0 +1,132 @@
+/* MN10300 POSIX types
+ *
+ * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_POSIX_TYPES_H
+#define _ASM_POSIX_TYPES_H
+
+/*
+ * This file is generally used by user-level software, so you need to
+ * be a little careful about namespace pollution etc.  Also, we cannot
+ * assume GCC is being used.
+ */
+
+typedef unsigned long   __kernel_ino_t;
+typedef unsigned short  __kernel_mode_t;
+typedef unsigned short  __kernel_nlink_t;
+typedef long            __kernel_off_t;
+typedef int             __kernel_pid_t;
+typedef unsigned short  __kernel_ipc_pid_t;
+typedef unsigned short  __kernel_uid_t;
+typedef unsigned short  __kernel_gid_t;
+typedef unsigned long   __kernel_size_t;
+typedef long            __kernel_ssize_t;
+typedef int             __kernel_ptrdiff_t;
+typedef long            __kernel_time_t;
+typedef long            __kernel_suseconds_t;
+typedef long            __kernel_clock_t;
+typedef int             __kernel_timer_t;
+typedef int             __kernel_clockid_t;
+typedef int             __kernel_daddr_t;
+typedef char *          __kernel_caddr_t;
+typedef unsigned short  __kernel_uid16_t;
+typedef unsigned short  __kernel_gid16_t;
+typedef unsigned int    __kernel_uid32_t;
+typedef unsigned int    __kernel_gid32_t;
+
+typedef unsigned short  __kernel_old_uid_t;
+typedef unsigned short  __kernel_old_gid_t;
+typedef unsigned short  __kernel_old_dev_t;
+
+#ifdef __GNUC__
+typedef long long       __kernel_loff_t;
+#endif
+
+typedef struct {
+#if defined(__KERNEL__) || defined(__USE_ALL)
+        int     val[2];
+#else /* !defined(__KERNEL__) && !defined(__USE_ALL) */
+        int     __val[2];
+#endif /* !defined(__KERNEL__) && !defined(__USE_ALL) */
+} __kernel_fsid_t;
+
+#if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2)
+
+#undef  __FD_SET
+static inline void __FD_SET(unsigned long __fd, __kernel_fd_set *__fdsetp)
+{
+        unsigned long __tmp = __fd / __NFDBITS;
+        unsigned long __rem = __fd % __NFDBITS;
+        __fdsetp->fds_bits[__tmp] |= (1UL<<__rem);
+}
+
+#undef  __FD_CLR
+static inline void __FD_CLR(unsigned long __fd, __kernel_fd_set *__fdsetp)
+{
+        unsigned long __tmp = __fd / __NFDBITS;
+        unsigned long __rem = __fd % __NFDBITS;
+        __fdsetp->fds_bits[__tmp] &= ~(1UL<<__rem);
+}
+
+
+#undef  __FD_ISSET
+static inline int __FD_ISSET(unsigned long __fd, const __kernel_fd_set *__p)
+{
+        unsigned long __tmp = __fd / __NFDBITS;
+        unsigned long __rem = __fd % __NFDBITS;
+        return (__p->fds_bits[__tmp] & (1UL<<__rem)) != 0;
+}
+
+/*
+ * This will unroll the loop for the normal constant case (8 ints,
+ * for a 256-bit fd_set)
+ */
+#undef  __FD_ZERO
+static inline void __FD_ZERO(__kernel_fd_set *__p)
+{
+        unsigned long *__tmp = __p->fds_bits;
+        int __i;
+
+        if (__builtin_constant_p(__FDSET_LONGS)) {
+                switch (__FDSET_LONGS) {
+                case 16:
+                        __tmp[ 0] = 0; __tmp[ 1] = 0;
+                        __tmp[ 2] = 0; __tmp[ 3] = 0;
+                        __tmp[ 4] = 0; __tmp[ 5] = 0;
+                        __tmp[ 6] = 0; __tmp[ 7] = 0;
+                        __tmp[ 8] = 0; __tmp[ 9] = 0;
+                        __tmp[10] = 0; __tmp[11] = 0;
+                        __tmp[12] = 0; __tmp[13] = 0;
+                        __tmp[14] = 0; __tmp[15] = 0;
+                        return;
+
+                case 8:
+                        __tmp[ 0] = 0; __tmp[ 1] = 0;
+                        __tmp[ 2] = 0; __tmp[ 3] = 0;
+                        __tmp[ 4] = 0; __tmp[ 5] = 0;
+                        __tmp[ 6] = 0; __tmp[ 7] = 0;
+                        return;
+
+                case 4:
+                        __tmp[ 0] = 0; __tmp[ 1] = 0;
+                        __tmp[ 2] = 0; __tmp[ 3] = 0;
+                        return;
+                }
+        }
+        __i = __FDSET_LONGS;
+        while (__i) {
+                __i--;
+                *__tmp = 0;
+                __tmp++;
+        }
+}
+
+#endif /* defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) */
+
+#endif /* _ASM_POSIX_TYPES_H */
diff --git a/include/asm-mn10300/proc-mn103e010/cache.h b/include/asm-mn10300/proc-mn103e010/cache.h
new file mode 100644
index 000000000000..bdc1f9a59b4c
--- /dev/null
+++ b/include/asm-mn10300/proc-mn103e010/cache.h
@@ -0,0 +1,33 @@
+/* MN103E010 Cache specification
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_PROC_CACHE_H
+#define _ASM_PROC_CACHE_H
+
+/* L1 cache */
+
+#define L1_CACHE_NWAYS          4       /* number of ways in caches */
+#define L1_CACHE_NENTRIES       256     /* number of entries in each way */
+#define L1_CACHE_BYTES          16      /* bytes per entry */
+#define L1_CACHE_SHIFT          4       /* shift for bytes per entry */
+#define L1_CACHE_WAYDISP        0x1000  /* displacement of one way from the next */
+
+#define L1_CACHE_TAG_VALID      0x00000001      /* cache tag valid bit */
+#define L1_CACHE_TAG_DIRTY      0x00000008      /* data cache tag dirty bit */
+#define L1_CACHE_TAG_ENTRY      0x00000ff0      /* cache tag entry address mask */
+#define L1_CACHE_TAG_ADDRESS    0xfffff000      /* cache tag line address mask */
+
+/*
+ * specification of the interval between interrupt checking intervals whilst
+ * managing the cache with the interrupts disabled
+ */
+#define MN10300_DCACHE_INV_RANGE_INTR_LOG2_INTERVAL     4
+
+#endif /* _ASM_PROC_CACHE_H */
diff --git a/include/asm-mn10300/proc-mn103e010/clock.h b/include/asm-mn10300/proc-mn103e010/clock.h
new file mode 100644
index 000000000000..caf998350633
--- /dev/null
+++ b/include/asm-mn10300/proc-mn103e010/clock.h
@@ -0,0 +1,18 @@
+/* MN103E010-specific clocks
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_PROC_CLOCK_H
+#define _ASM_PROC_CLOCK_H
+
+#include <asm/unit/clock.h>
+
+#define MN10300_WDCLK           MN10300_IOCLK
+
+#endif /* _ASM_PROC_CLOCK_H */
diff --git a/include/asm-mn10300/proc-mn103e010/irq.h b/include/asm-mn10300/proc-mn103e010/irq.h
new file mode 100644
index 000000000000..aa6ee8f98b1b
--- /dev/null
+++ b/include/asm-mn10300/proc-mn103e010/irq.h
@@ -0,0 +1,34 @@
+/* MN103E010 On-board interrupt controller numbers
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+
+#ifndef _ASM_PROC_IRQ_H
+#define _ASM_PROC_IRQ_H
+
+#ifdef __KERNEL__
+
+#define GxICR_NUM_IRQS          42
+
+#define GxICR_NUM_XIRQS         8
+
+#define XIRQ0           34
+#define XIRQ1           35
+#define XIRQ2           36
+#define XIRQ3           37
+#define XIRQ4           38
+#define XIRQ5           39
+#define XIRQ6           40
+#define XIRQ7           41
+
+#define XIRQ2IRQ(num)   (XIRQ0 + num)
+
+#endif /* __KERNEL__ */
+
+#endif /* _ASM_PROC_IRQ_H */
diff --git a/include/asm-mn10300/proc-mn103e010/proc.h b/include/asm-mn10300/proc-mn103e010/proc.h
new file mode 100644
index 000000000000..22a2b93f70b7
--- /dev/null
+++ b/include/asm-mn10300/proc-mn103e010/proc.h
@@ -0,0 +1,18 @@
+/* MN103E010 Processor description
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+
+#ifndef _ASM_PROC_PROC_H
+#define _ASM_PROC_PROC_H
+
+#define PROCESSOR_VENDOR_NAME   "Matsushita"
+#define PROCESSOR_MODEL_NAME    "mn103e010"
+
+#endif /* _ASM_PROC_PROC_H */
diff --git a/include/asm-mn10300/processor.h b/include/asm-mn10300/processor.h
new file mode 100644
index 000000000000..f1b081f53468
--- /dev/null
+++ b/include/asm-mn10300/processor.h
@@ -0,0 +1,186 @@
+/* MN10300 Processor specifics
+ *
+ * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+
+#ifndef _ASM_PROCESSOR_H
+#define _ASM_PROCESSOR_H
+
+#include <asm/page.h>
+#include <asm/ptrace.h>
+#include <asm/cpu-regs.h>
+#include <linux/threads.h>
+
+/* Forward declaration, a strange C thing */
+struct task_struct;
+struct mm_struct;
+
+/*
+ * Default implementation of macro that returns current
+ * instruction pointer ("program counter").
+ */
+#define current_text_addr()                     \
+({                                              \
+        void *__pc;                             \
+        asm("mov pc,%0" : "=a"(__pc));          \
+        __pc;                                   \
+})
+
+extern void show_registers(struct pt_regs *regs);
+
+/*
+ *  CPU type and hardware bug flags. Kept separately for each CPU.
+ *  Members of this structure are referenced in head.S, so think twice
+ *  before touching them. [mj]
+ */
+
+struct mn10300_cpuinfo {
+        int             type;
+        unsigned long   loops_per_sec;
+        char            hard_math;
+        unsigned long   *pgd_quick;
+        unsigned long   *pte_quick;
+        unsigned long   pgtable_cache_sz;
+};
+
+extern struct mn10300_cpuinfo boot_cpu_data;
+
+#define cpu_data &boot_cpu_data
+#define current_cpu_data boot_cpu_data
+
+extern void identify_cpu(struct mn10300_cpuinfo *);
+extern void print_cpu_info(struct mn10300_cpuinfo *);
+extern void dodgy_tsc(void);
+#define cpu_relax() do {} while (0)
+
+/*
+ * User space process size: 1.75GB (default).
+ */
+#define TASK_SIZE               0x70000000
+
+/*
+ * Where to put the userspace stack by default
+ */
+#define STACK_TOP               0x70000000
+#define STACK_TOP_MAX           STACK_TOP
+
+/* This decides where the kernel will search for a free chunk of vm
+ * space during mmap's.
+ */
+#define TASK_UNMAPPED_BASE      0x30000000
+
+typedef struct {
+        unsigned long   seg;
+} mm_segment_t;
+
+struct fpu_state_struct {
+        unsigned long   fs[32];         /* fpu registers */
+        unsigned long   fpcr;           /* fpu control register */
+};
+
+struct thread_struct {
+        struct pt_regs          *uregs;         /* userspace register frame */
+        unsigned long           pc;             /* kernel PC */
+        unsigned long           sp;             /* kernel SP */
+        unsigned long           a3;             /* kernel FP */
+        unsigned long           wchan;
+        unsigned long           usp;
+        struct pt_regs          *__frame;
+        unsigned long           fpu_flags;
+#define THREAD_USING_FPU        0x00000001      /* T if this task is using the FPU */
+        struct fpu_state_struct fpu_state;
+};
+
+#define INIT_THREAD                             \
+{                                               \
+        .uregs          = init_uregs,           \
+        .pc             = 0,                    \
+        .sp             = 0,                    \
+        .a3             = 0,                    \
+        .wchan          = 0,                    \
+        .__frame        = NULL,                 \
+}
+
+#define INIT_MMAP \
+{ &init_mm, 0, 0, NULL, PAGE_SHARED, VM_READ | VM_WRITE | VM_EXEC, 1, \
+  NULL, NULL }
+
+/*
+ * do necessary setup to start up a newly executed thread
+ * - need to discard the frame stacked by the kernel thread invoking the execve
+ *   syscall (see RESTORE_ALL macro)
+ */
+#define start_thread(regs, new_pc, new_sp) do {         \
+        set_fs(USER_DS);                                \
+        __frame = current->thread.uregs;                \
+        __frame->epsw = EPSW_nSL | EPSW_IE | EPSW_IM;   \
+        __frame->pc = new_pc;                           \
+        __frame->sp = new_sp;                           \
+} while (0)
+
+/* Free all resources held by a thread. */
+extern void release_thread(struct task_struct *);
+
+/* Prepare to copy thread state - unlazy all lazy status */
+extern void prepare_to_copy(struct task_struct *tsk);
+
+/*
+ * create a kernel thread without removing it from tasklists
+ */
+extern int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags);
+
+/*
+ * Return saved PC of a blocked thread.
+ */
+extern unsigned long thread_saved_pc(struct task_struct *tsk);
+
+unsigned long get_wchan(struct task_struct *p);
+
+#define task_pt_regs(task)                                              \
+({                                                                      \
+       struct pt_regs *__regs__;                                        \
+       __regs__ = (struct pt_regs *) (KSTK_TOP(task_stack_page(task)) - 8); \
+       __regs__ - 1;                                                    \
+})
+
+#define KSTK_EIP(task) (task_pt_regs(task)->pc)
+#define KSTK_ESP(task) (task_pt_regs(task)->sp)
+
+#define KSTK_TOP(info)                          \
+({                                              \
+        (unsigned long)(info) + THREAD_SIZE;    \
+})
+
+#define ARCH_HAS_PREFETCH
+#define ARCH_HAS_PREFETCHW
+
+static inline void prefetch(const void *x)
+{
+#ifndef CONFIG_MN10300_CACHE_DISABLED
+#ifdef CONFIG_MN10300_PROC_MN103E010
+        asm volatile ("nop; nop; dcpf (%0)" : : "r"(x));
+#else
+        asm volatile ("dcpf (%0)" : : "r"(x));
+#endif
+#endif
+}
+
+static inline void prefetchw(const void *x)
+{
+#ifndef CONFIG_MN10300_CACHE_DISABLED
+#ifdef CONFIG_MN10300_PROC_MN103E010
+        asm volatile ("nop; nop; dcpf (%0)" : : "r"(x));
+#else
+        asm volatile ("dcpf (%0)" : : "r"(x));
+#endif
+#endif
+}
+
+#endif /* _ASM_PROCESSOR_H */
diff --git a/include/asm-mn10300/ptrace.h b/include/asm-mn10300/ptrace.h
new file mode 100644
index 000000000000..b3684689fcce
--- /dev/null
+++ b/include/asm-mn10300/ptrace.h
@@ -0,0 +1,99 @@
+/* MN10300 Exception frame layout and ptrace constants
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_PTRACE_H
+#define _ASM_PTRACE_H
+
+#define PT_A3           0
+#define PT_A2           1
+#define PT_D3           2
+#define PT_D2           3
+#define PT_MCVF         4
+#define PT_MCRL         5
+#define PT_MCRH         6
+#define PT_MDRQ         7
+#define PT_E1           8
+#define PT_E0           9
+#define PT_E7           10
+#define PT_E6           11
+#define PT_E5           12
+#define PT_E4           13
+#define PT_E3           14
+#define PT_E2           15
+#define PT_SP           16
+#define PT_LAR          17
+#define PT_LIR          18
+#define PT_MDR          19
+#define PT_A1           20
+#define PT_A0           21
+#define PT_D1           22
+#define PT_D0           23
+#define PT_ORIG_D0      24
+#define PT_EPSW         25
+#define PT_PC           26
+#define NR_PTREGS       27
+
+#ifndef __ASSEMBLY__
+/*
+ * This defines the way registers are stored in the event of an exception
+ * - the strange order is due to the MOVM instruction
+ */
+struct pt_regs {
+        unsigned long           a3;             /* syscall arg 3 */
+        unsigned long           a2;             /* syscall arg 4 */
+        unsigned long           d3;             /* syscall arg 5 */
+        unsigned long           d2;             /* syscall arg 6 */
+        unsigned long           mcvf;
+        unsigned long           mcrl;
+        unsigned long           mcrh;
+        unsigned long           mdrq;
+        unsigned long           e1;
+        unsigned long           e0;
+        unsigned long           e7;
+        unsigned long           e6;
+        unsigned long           e5;
+        unsigned long           e4;
+        unsigned long           e3;
+        unsigned long           e2;
+        unsigned long           sp;
+        unsigned long           lar;
+        unsigned long           lir;
+        unsigned long           mdr;
+        unsigned long           a1;
+        unsigned long           a0;             /* syscall arg 1 */
+        unsigned long           d1;             /* syscall arg 2 */
+        unsigned long           d0;             /* syscall ret */
+        struct pt_regs          *next;          /* next frame pointer */
+        unsigned long           orig_d0;        /* syscall number */
+        unsigned long           epsw;
+        unsigned long           pc;
+};
+#endif
+
+extern struct pt_regs *__frame; /* current frame pointer */
+
+/* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */
+#define PTRACE_GETREGS            12
+#define PTRACE_SETREGS            13
+#define PTRACE_GETFPREGS          14
+#define PTRACE_SETFPREGS          15
+
+/* options set using PTRACE_SETOPTIONS */
+#define PTRACE_O_TRACESYSGOOD     0x00000001
+
+#if defined(__KERNEL__) && !defined(__ASSEMBLY__)
+#define user_mode(regs)                 (((regs)->epsw & EPSW_nSL) == EPSW_nSL)
+#define instruction_pointer(regs)       ((regs)->pc)
+extern void show_regs(struct pt_regs *);
+#endif
+
+#define profile_pc(regs) ((regs)->pc)
+
+#endif /* _ASM_PTRACE_H */
diff --git a/include/asm-mn10300/reset-regs.h b/include/asm-mn10300/reset-regs.h
new file mode 100644
index 000000000000..174523d50132
--- /dev/null
+++ b/include/asm-mn10300/reset-regs.h
@@ -0,0 +1,64 @@
+/* MN10300 Reset controller and watchdog timer definitions
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+
+#ifndef _ASM_RESET_REGS_H
+#define _ASM_RESET_REGS_H
+
+#include <asm/cpu-regs.h>
+#include <asm/exceptions.h>
+
+#ifdef __KERNEL__
+
+#ifdef CONFIG_MN10300_WD_TIMER
+#define ARCH_HAS_NMI_WATCHDOG           /* See include/linux/nmi.h */
+#endif
+
+/*
+ * watchdog timer registers
+ */
+#define WDBC                    __SYSREGC(0xc0001000, u8) /* watchdog binary counter reg */
+
+#define WDCTR                   __SYSREG(0xc0001002, u8)  /* watchdog timer control reg */
+#define WDCTR_WDCK              0x07    /* clock source selection */
+#define WDCTR_WDCK_256th        0x00    /* - OSCI/256 */
+#define WDCTR_WDCK_1024th       0x01    /* - OSCI/1024 */
+#define WDCTR_WDCK_2048th       0x02    /* - OSCI/2048 */
+#define WDCTR_WDCK_16384th      0x03    /* - OSCI/16384 */
+#define WDCTR_WDCK_65536th      0x04    /* - OSCI/65536 */
+#define WDCTR_WDRST             0x40    /* binary counter reset */
+#define WDCTR_WDCNE             0x80    /* watchdog timer enable */
+
+#define RSTCTR                  __SYSREG(0xc0001004, u8) /* reset control reg */
+#define RSTCTR_CHIPRST          0x01    /* chip reset */
+#define RSTCTR_DBFRST           0x02    /* double fault reset flag */
+#define RSTCTR_WDTRST           0x04    /* watchdog timer reset flag */
+#define RSTCTR_WDREN            0x08    /* watchdog timer reset enable */
+
+#ifndef __ASSEMBLY__
+
+static inline void mn10300_proc_hard_reset(void)
+{
+        RSTCTR &= ~RSTCTR_CHIPRST;
+        RSTCTR |= RSTCTR_CHIPRST;
+}
+
+extern unsigned int watchdog_alert_counter;
+
+extern void watchdog_go(void);
+extern asmlinkage void watchdog_handler(void);
+extern asmlinkage
+void watchdog_interrupt(struct pt_regs *, enum exception_code);
+
+#endif
+
+#endif /* __KERNEL__ */
+
+#endif /* _ASM_RESET_REGS_H */
diff --git a/include/asm-mn10300/resource.h b/include/asm-mn10300/resource.h
new file mode 100644
index 000000000000..04bc4db8921b
--- /dev/null
+++ b/include/asm-mn10300/resource.h
@@ -0,0 +1 @@
+#include <asm-generic/resource.h>
diff --git a/include/asm-mn10300/rtc-regs.h b/include/asm-mn10300/rtc-regs.h
new file mode 100644
index 000000000000..c42deefaec11
--- /dev/null
+++ b/include/asm-mn10300/rtc-regs.h
@@ -0,0 +1,86 @@
+/* MN10300 on-chip Real-Time Clock registers
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_RTC_REGS_H
+#define _ASM_RTC_REGS_H
+
+#include <asm/intctl-regs.h>
+
+#ifdef __KERNEL__
+
+#define RTSCR                   __SYSREG(0xd8600000, u8) /* RTC seconds count reg */
+#define RTSAR                   __SYSREG(0xd8600001, u8) /* RTC seconds alarm reg */
+#define RTMCR                   __SYSREG(0xd8600002, u8) /* RTC minutes count reg */
+#define RTMAR                   __SYSREG(0xd8600003, u8) /* RTC minutes alarm reg */
+#define RTHCR                   __SYSREG(0xd8600004, u8) /* RTC hours count reg */
+#define RTHAR                   __SYSREG(0xd8600005, u8) /* RTC hours alarm reg */
+#define RTDWCR                  __SYSREG(0xd8600006, u8) /* RTC day of the week count reg */
+#define RTDMCR                  __SYSREG(0xd8600007, u8) /* RTC days count reg */
+#define RTMTCR                  __SYSREG(0xd8600008, u8) /* RTC months count reg */
+#define RTYCR                   __SYSREG(0xd8600009, u8) /* RTC years count reg */
+
+#define RTCRA                   __SYSREG(0xd860000a, u8)/* RTC control reg A */
+#define RTCRA_RS                0x0f    /* periodic timer interrupt cycle setting */
+#define RTCRA_RS_NONE           0x00    /* - off */
+#define RTCRA_RS_3_90625ms      0x01    /* - 3.90625ms  (1/256s) */
+#define RTCRA_RS_7_8125ms       0x02    /* - 7.8125ms   (1/128s) */
+#define RTCRA_RS_122_070us      0x03    /* - 122.070us  (1/8192s) */
+#define RTCRA_RS_244_141us      0x04    /* - 244.141us  (1/4096s) */
+#define RTCRA_RS_488_281us      0x05    /* - 488.281us  (1/2048s) */
+#define RTCRA_RS_976_5625us     0x06    /* - 976.5625us (1/1024s) */
+#define RTCRA_RS_1_953125ms     0x07    /* - 1.953125ms (1/512s) */
+#define RTCRA_RS_3_90624ms      0x08    /* - 3.90624ms  (1/256s) */
+#define RTCRA_RS_7_8125ms_b     0x09    /* - 7.8125ms   (1/128s) */
+#define RTCRA_RS_15_625ms       0x0a    /* - 15.625ms   (1/64s) */
+#define RTCRA_RS_31_25ms        0x0b    /* - 31.25ms    (1/32s) */
+#define RTCRA_RS_62_5ms         0x0c    /* - 62.5ms     (1/16s) */
+#define RTCRA_RS_125ms          0x0d    /* - 125ms      (1/8s) */
+#define RTCRA_RS_250ms          0x0e    /* - 250ms      (1/4s) */
+#define RTCRA_RS_500ms          0x0f    /* - 500ms      (1/2s) */
+#define RTCRA_DVR               0x40    /* divider reset */
+#define RTCRA_UIP               0x80    /* clock update flag */
+
+#define RTCRB                   __SYSREG(0xd860000b, u8) /* RTC control reg B */
+#define RTCRB_DSE               0x01    /* daylight savings time enable */
+#define RTCRB_TM                0x02    /* time format */
+#define RTCRB_TM_12HR           0x00    /* - 12 hour format */
+#define RTCRB_TM_24HR           0x02    /* - 24 hour format */
+#define RTCRB_DM                0x04    /* numeric value format */
+#define RTCRB_DM_BCD            0x00    /* - BCD */
+#define RTCRB_DM_BINARY         0x04    /* - binary */
+#define RTCRB_UIE               0x10    /* update interrupt disable */
+#define RTCRB_AIE               0x20    /* alarm interrupt disable */
+#define RTCRB_PIE               0x40    /* periodic interrupt disable */
+#define RTCRB_SET               0x80    /* clock update enable */
+
+#define RTSRC                   __SYSREG(0xd860000c, u8) /* RTC status reg C */
+#define RTSRC_UF                0x10    /* update end interrupt flag */
+#define RTSRC_AF                0x20    /* alarm interrupt flag */
+#define RTSRC_PF                0x40    /* periodic interrupt flag */
+#define RTSRC_IRQF              0x80    /* interrupt flag */
+
+#define RTIRQ                   32
+#define RTICR                   GxICR(RTIRQ)
+
+/*
+ * MC146818 RTC compatibility defs for the MN10300 on-chip RTC
+ */
+#define RTC_PORT(x)             0xd8600000
+#define RTC_ALWAYS_BCD          1       /* RTC operates in binary mode */
+
+#define CMOS_READ(addr)         __SYSREG(0xd8600000 + (addr), u8)
+#define CMOS_WRITE(val, addr)   \
+        do { __SYSREG(0xd8600000 + (addr), u8) = val; } while (0)
+
+#define RTC_IRQ                 RTIRQ
+
+#endif /* __KERNEL__ */
+
+#endif /* _ASM_RTC_REGS_H */
diff --git a/include/asm-mn10300/rtc.h b/include/asm-mn10300/rtc.h
new file mode 100644
index 000000000000..c295194cc703
--- /dev/null
+++ b/include/asm-mn10300/rtc.h
@@ -0,0 +1,41 @@
+/* MN10300 Real time clock definitions
+ *
+ * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_RTC_H
+#define _ASM_RTC_H
+
+#ifdef CONFIG_MN10300_RTC
+
+#include <linux/init.h>
+
+extern void check_rtc_time(void);
+extern void __init calibrate_clock(void);
+extern unsigned long __init get_initial_rtc_time(void);
+
+#else /* !CONFIG_MN10300_RTC */
+
+static inline void check_rtc_time(void)
+{
+}
+
+static inline void calibrate_clock(void)
+{
+}
+
+static inline unsigned long get_initial_rtc_time(void)
+{
+        return 0;
+}
+
+#endif /* !CONFIG_MN10300_RTC */
+
+#include <asm-generic/rtc.h>
+
+#endif /* _ASM_RTC_H */
diff --git a/include/asm-mn10300/scatterlist.h b/include/asm-mn10300/scatterlist.h
new file mode 100644
index 000000000000..e29d91dbcf2b
--- /dev/null
+++ b/include/asm-mn10300/scatterlist.h
@@ -0,0 +1,46 @@
+/* MN10300 Scatterlist definitions
+ *
+ * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_SCATTERLIST_H
+#define _ASM_SCATTERLIST_H
+
+#include <asm/types.h>
+
+/*
+ * Drivers must set either ->address or (preferred) page and ->offset
+ * to indicate where data must be transferred to/from.
+ *
+ * Using page is recommended since it handles highmem data as well as
+ * low mem. ->address is restricted to data which has a virtual mapping, and
+ * it will go away in the future. Updating to page can be automated very
+ * easily -- something like
+ *
+ * sg->address = some_ptr;
+ *
+ * can be rewritten as
+ *
+ * sg_set_page(virt_to_page(some_ptr));
+ * sg->offset = (unsigned long) some_ptr & ~PAGE_MASK;
+ *
+ * and that's it. There's no excuse for not highmem enabling YOUR driver. /jens
+ */
+struct scatterlist {
+#ifdef CONFIG_DEBUG_SG
+        unsigned long   sg_magic;
+#endif
+        unsigned long   page_link;
+        unsigned int    offset;         /* for highmem, page offset */
+        dma_addr_t      dma_address;
+        unsigned int    length;
+};
+
+#define ISA_DMA_THRESHOLD (0x00ffffff)
+
+#endif /* _ASM_SCATTERLIST_H */
diff --git a/include/asm-mn10300/sections.h b/include/asm-mn10300/sections.h
new file mode 100644
index 000000000000..2b8c5160388f
--- /dev/null
+++ b/include/asm-mn10300/sections.h
@@ -0,0 +1 @@
+#include <asm-generic/sections.h>
diff --git a/include/asm-mn10300/semaphore.h b/include/asm-mn10300/semaphore.h
new file mode 100644
index 000000000000..5a9e1ad0b253
--- /dev/null
+++ b/include/asm-mn10300/semaphore.h
@@ -0,0 +1,169 @@
+/* MN10300 Semaphores
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_SEMAPHORE_H
+#define _ASM_SEMAPHORE_H
+
+#ifndef __ASSEMBLY__
+
+#include <linux/linkage.h>
+#include <linux/wait.h>
+#include <linux/spinlock.h>
+#include <linux/rwsem.h>
+
+#define SEMAPHORE_DEBUG         0
+
+/*
+ * the semaphore definition
+ * - if count is >0 then there are tokens available on the semaphore for down
+ *   to collect
+ * - if count is <=0 then there are no spare tokens, and anyone that wants one
+ *   must wait
+ * - if wait_list is not empty, then there are processes waiting for the
+ *   semaphore
+ */
+struct semaphore {
+        atomic_t                count;          /* it's not really atomic, it's
+                                                 * just that certain modules
+                                                 * expect to be able to access
+                                                 * it directly */
+        spinlock_t              wait_lock;
+        struct list_head        wait_list;
+#if SEMAPHORE_DEBUG
+        unsigned                __magic;
+#endif
+};
+
+#if SEMAPHORE_DEBUG
+# define __SEM_DEBUG_INIT(name) , (long)&(name).__magic
+#else
+# define __SEM_DEBUG_INIT(name)
+#endif
+
+
+#define __SEMAPHORE_INITIALIZER(name, init_count)                       \
+{                                                                       \
+        .count          = ATOMIC_INIT(init_count),                      \
+        .wait_lock      = __SPIN_LOCK_UNLOCKED((name).wait_lock),       \
+        .wait_list      = LIST_HEAD_INIT((name).wait_list)              \
+        __SEM_DEBUG_INIT(name)                                          \
+}
+
+#define __DECLARE_SEMAPHORE_GENERIC(name,count) \
+        struct semaphore name = __SEMAPHORE_INITIALIZER(name, count)
+
+#define DECLARE_MUTEX(name) __DECLARE_SEMAPHORE_GENERIC(name, 1)
+#define DECLARE_MUTEX_LOCKED(name) __DECLARE_SEMAPHORE_GENERIC(name, 0)
+
+static inline void sema_init(struct semaphore *sem, int val)
+{
+        *sem = (struct semaphore) __SEMAPHORE_INITIALIZER(*sem, val);
+}
+
+static inline void init_MUTEX(struct semaphore *sem)
+{
+        sema_init(sem, 1);
+}
+
+static inline void init_MUTEX_LOCKED(struct semaphore *sem)
+{
+        sema_init(sem, 0);
+}
+
+extern void __down(struct semaphore *sem, unsigned long flags);
+extern int  __down_interruptible(struct semaphore *sem, unsigned long flags);
+extern void __up(struct semaphore *sem);
+
+static inline void down(struct semaphore *sem)
+{
+        unsigned long flags;
+        int count;
+
+#if SEMAPHORE_DEBUG
+        CHECK_MAGIC(sem->__magic);
+#endif
+
+        spin_lock_irqsave(&sem->wait_lock, flags);
+        count = atomic_read(&sem->count);
+        if (likely(count > 0)) {
+                atomic_set(&sem->count, count - 1);
+                spin_unlock_irqrestore(&sem->wait_lock, flags);
+        } else {
+                __down(sem, flags);
+        }
+}
+
+static inline int down_interruptible(struct semaphore *sem)
+{
+        unsigned long flags;
+        int count, ret = 0;
+
+#if SEMAPHORE_DEBUG
+        CHECK_MAGIC(sem->__magic);
+#endif
+
+        spin_lock_irqsave(&sem->wait_lock, flags);
+        count = atomic_read(&sem->count);
+        if (likely(count > 0)) {
+                atomic_set(&sem->count, count - 1);
+                spin_unlock_irqrestore(&sem->wait_lock, flags);
+        } else {
+                ret = __down_interruptible(sem, flags);
+        }
+        return ret;
+}
+
+/*
+ * non-blockingly attempt to down() a semaphore.
+ * - returns zero if we acquired it
+ */
+static inline int down_trylock(struct semaphore *sem)
+{
+        unsigned long flags;
+        int count, success = 0;
+
+#if SEMAPHORE_DEBUG
+        CHECK_MAGIC(sem->__magic);
+#endif
+
+        spin_lock_irqsave(&sem->wait_lock, flags);
+        count = atomic_read(&sem->count);
+        if (likely(count > 0)) {
+                atomic_set(&sem->count, count - 1);
+                success = 1;
+        }
+        spin_unlock_irqrestore(&sem->wait_lock, flags);
+        return !success;
+}
+
+static inline void up(struct semaphore *sem)
+{
+        unsigned long flags;
+
+#if SEMAPHORE_DEBUG
+        CHECK_MAGIC(sem->__magic);
+#endif
+
+        spin_lock_irqsave(&sem->wait_lock, flags);
+        if (!list_empty(&sem->wait_list))
+                __up(sem);
+        else
+                atomic_set(&sem->count, atomic_read(&sem->count) + 1);
+        spin_unlock_irqrestore(&sem->wait_lock, flags);
+}
+
+static inline int sem_getcount(struct semaphore *sem)
+{
+        return atomic_read(&sem->count);
+}
+
+#endif /* __ASSEMBLY__ */
+
+#endif
diff --git a/include/asm-mn10300/sembuf.h b/include/asm-mn10300/sembuf.h
new file mode 100644
index 000000000000..301f3f9d8aa9
--- /dev/null
+++ b/include/asm-mn10300/sembuf.h
@@ -0,0 +1,25 @@
+#ifndef _ASM_SEMBUF_H
+#define _ASM_SEMBUF_H
+
+/*
+ * The semid64_ds structure for MN10300 architecture.
+ * Note extra padding because this structure is passed back and forth
+ * between kernel and user space.
+ *
+ * Pad space is left for:
+ * - 64-bit time_t to solve y2038 problem
+ * - 2 miscellaneous 32-bit values
+ */
+
+struct semid64_ds {
+        struct ipc64_perm sem_perm;             /* permissions .. see ipc.h */
+        __kernel_time_t sem_otime;              /* last semop time */
+        unsigned long   __unused1;
+        __kernel_time_t sem_ctime;              /* last change time */
+        unsigned long   __unused2;
+        unsigned long   sem_nsems;              /* no. of semaphores in array */
+        unsigned long   __unused3;
+        unsigned long   __unused4;
+};
+
+#endif /* _ASM_SEMBUF_H */
diff --git a/include/asm-mn10300/serial-regs.h b/include/asm-mn10300/serial-regs.h
new file mode 100644
index 000000000000..6498469e93ac
--- /dev/null
+++ b/include/asm-mn10300/serial-regs.h
@@ -0,0 +1,160 @@
+/* MN10300 on-board serial port module registers
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+
+#ifndef _ASM_SERIAL_REGS_H
+#define _ASM_SERIAL_REGS_H
+
+#include <asm/cpu-regs.h>
+#include <asm/intctl-regs.h>
+
+#ifdef __KERNEL__
+
+/* serial port 0 */
+#define SC0CTR                  __SYSREG(0xd4002000, u16)       /* control reg */
+#define SC01CTR_CK              0x0007  /* clock source select */
+#define SC0CTR_CK_TM8UFLOW_8    0x0000  /* - 1/8 timer 8 underflow (serial port 0 only) */
+#define SC1CTR_CK_TM9UFLOW_8    0x0000  /* - 1/8 timer 9 underflow (serial port 1 only) */
+#define SC01CTR_CK_IOCLK_8      0x0001  /* - 1/8 IOCLK */
+#define SC01CTR_CK_IOCLK_32     0x0002  /* - 1/32 IOCLK */
+#define SC0CTR_CK_TM2UFLOW_2    0x0003  /* - 1/2 timer 2 underflow (serial port 0 only) */
+#define SC1CTR_CK_TM3UFLOW_2    0x0003  /* - 1/2 timer 3 underflow (serial port 1 only) */
+#define SC0CTR_CK_TM0UFLOW_8    0x0004  /* - 1/8 timer 1 underflow (serial port 0 only) */
+#define SC1CTR_CK_TM1UFLOW_8    0x0004  /* - 1/8 timer 2 underflow (serial port 1 only) */
+#define SC0CTR_CK_TM2UFLOW_8    0x0005  /* - 1/8 timer 2 underflow (serial port 0 only) */
+#define SC1CTR_CK_TM3UFLOW_8    0x0005  /* - 1/8 timer 3 underflow (serial port 1 only) */
+#define SC01CTR_CK_EXTERN_8     0x0006  /* - 1/8 external closk */
+#define SC01CTR_CK_EXTERN       0x0007  /* - external closk */
+#define SC01CTR_STB             0x0008  /* stop bit select */
+#define SC01CTR_STB_1BIT        0x0000  /* - 1 stop bit */
+#define SC01CTR_STB_2BIT        0x0008  /* - 2 stop bits */
+#define SC01CTR_PB              0x0070  /* parity bit select */
+#define SC01CTR_PB_NONE         0x0000  /* - no parity */
+#define SC01CTR_PB_FIXED0       0x0040  /* - fixed at 0 */
+#define SC01CTR_PB_FIXED1       0x0050  /* - fixed at 1 */
+#define SC01CTR_PB_EVEN         0x0060  /* - even parity */
+#define SC01CTR_PB_ODD          0x0070  /* - odd parity */
+#define SC01CTR_CLN             0x0080  /* character length */
+#define SC01CTR_CLN_7BIT        0x0000  /* - 7 bit chars */
+#define SC01CTR_CLN_8BIT        0x0080  /* - 8 bit chars */
+#define SC01CTR_TOE             0x0100  /* T input output enable */
+#define SC01CTR_OD              0x0200  /* bit order select */
+#define SC01CTR_OD_LSBFIRST     0x0000  /* - LSB first */
+#define SC01CTR_OD_MSBFIRST     0x0200  /* - MSB first */
+#define SC01CTR_MD              0x0c00  /* mode select */
+#define SC01CTR_MD_STST_SYNC    0x0000  /* - start-stop synchronous */
+#define SC01CTR_MD_CLOCK_SYNC1  0x0400  /* - clock synchronous 1 */
+#define SC01CTR_MD_I2C          0x0800  /* - I2C mode */
+#define SC01CTR_MD_CLOCK_SYNC2  0x0c00  /* - clock synchronous 2 */
+#define SC01CTR_IIC             0x1000  /* I2C mode select */
+#define SC01CTR_BKE             0x2000  /* break transmit enable */
+#define SC01CTR_RXE             0x4000  /* receive enable */
+#define SC01CTR_TXE             0x8000  /* transmit enable */
+
+#define SC0ICR                  __SYSREG(0xd4002004, u8)        /* interrupt control reg */
+#define SC01ICR_DMD             0x80    /* output data mode */
+#define SC01ICR_TD              0x20    /* transmit DMA trigger cause */
+#define SC01ICR_TI              0x10    /* transmit interrupt cause */
+#define SC01ICR_RES             0x04    /* receive error select */
+#define SC01ICR_RI              0x01    /* receive interrupt cause */
+
+#define SC0TXB                  __SYSREG(0xd4002008, u8)        /* transmit buffer reg */
+#define SC0RXB                  __SYSREG(0xd4002009, u8)        /* receive buffer reg */
+
+#define SC0STR                  __SYSREG(0xd400200c, u16)       /* status reg */
+#define SC01STR_OEF             0x0001  /* overrun error found */
+#define SC01STR_PEF             0x0002  /* parity error found */
+#define SC01STR_FEF             0x0004  /* framing error found */
+#define SC01STR_RBF             0x0010  /* receive buffer status */
+#define SC01STR_TBF             0x0020  /* transmit buffer status */
+#define SC01STR_RXF             0x0040  /* receive status */
+#define SC01STR_TXF             0x0080  /* transmit status */
+#define SC01STR_STF             0x0100  /* I2C start sequence found */
+#define SC01STR_SPF             0x0200  /* I2C stop sequence found */
+
+#define SC0RXIRQ                20      /* timer 0 Receive IRQ */
+#define SC0TXIRQ                21      /* timer 0 Transmit IRQ */
+
+#define SC0RXICR                GxICR(SC0RXIRQ) /* serial 0 receive intr ctrl reg */
+#define SC0TXICR                GxICR(SC0TXIRQ) /* serial 0 transmit intr ctrl reg */
+
+/* serial port 1 */
+#define SC1CTR                  __SYSREG(0xd4002010, u16)       /* serial port 1 control */
+#define SC1ICR                  __SYSREG(0xd4002014, u8)        /* interrupt control reg */
+#define SC1TXB                  __SYSREG(0xd4002018, u8)        /* transmit buffer reg */
+#define SC1RXB                  __SYSREG(0xd4002019, u8)        /* receive buffer reg */
+#define SC1STR                  __SYSREG(0xd400201c, u16)       /* status reg */
+
+#define SC1RXIRQ                22      /* timer 1 Receive IRQ */
+#define SC1TXIRQ                23      /* timer 1 Transmit IRQ */
+
+#define SC1RXICR                GxICR(SC1RXIRQ) /* serial 1 receive intr ctrl reg */
+#define SC1TXICR                GxICR(SC1TXIRQ) /* serial 1 transmit intr ctrl reg */
+
+/* serial port 2 */
+#define SC2CTR                  __SYSREG(0xd4002020, u16)       /* control reg */
+#define SC2CTR_CK               0x0003  /* clock source select */
+#define SC2CTR_CK_TM10UFLOW     0x0000  /* - timer 10 underflow */
+#define SC2CTR_CK_TM2UFLOW      0x0001  /* - timer 2 underflow */
+#define SC2CTR_CK_EXTERN        0x0002  /* - external closk */
+#define SC2CTR_CK_TM3UFLOW      0x0003  /* - timer 3 underflow */
+#define SC2CTR_STB              0x0008  /* stop bit select */
+#define SC2CTR_STB_1BIT         0x0000  /* - 1 stop bit */
+#define SC2CTR_STB_2BIT         0x0008  /* - 2 stop bits */
+#define SC2CTR_PB               0x0070  /* parity bit select */
+#define SC2CTR_PB_NONE          0x0000  /* - no parity */
+#define SC2CTR_PB_FIXED0        0x0040  /* - fixed at 0 */
+#define SC2CTR_PB_FIXED1        0x0050  /* - fixed at 1 */
+#define SC2CTR_PB_EVEN          0x0060  /* - even parity */
+#define SC2CTR_PB_ODD           0x0070  /* - odd parity */
+#define SC2CTR_CLN              0x0080  /* character length */
+#define SC2CTR_CLN_7BIT         0x0000  /* - 7 bit chars */
+#define SC2CTR_CLN_8BIT         0x0080  /* - 8 bit chars */
+#define SC2CTR_TWE              0x0100  /* transmit wait enable (enable XCTS control) */
+#define SC2CTR_OD               0x0200  /* bit order select */
+#define SC2CTR_OD_LSBFIRST      0x0000  /* - LSB first */
+#define SC2CTR_OD_MSBFIRST      0x0200  /* - MSB first */
+#define SC2CTR_TWS              0x1000  /* transmit wait select */
+#define SC2CTR_TWS_XCTS_HIGH    0x0000  /* - interrupt TX when XCTS high */
+#define SC2CTR_TWS_XCTS_LOW     0x1000  /* - interrupt TX when XCTS low */
+#define SC2CTR_BKE              0x2000  /* break transmit enable */
+#define SC2CTR_RXE              0x4000  /* receive enable */
+#define SC2CTR_TXE              0x8000  /* transmit enable */
+
+#define SC2ICR                  __SYSREG(0xd4002024, u8)        /* interrupt control reg */
+#define SC2ICR_TD               0x20    /* transmit DMA trigger cause */
+#define SC2ICR_TI               0x10    /* transmit interrupt cause */
+#define SC2ICR_RES              0x04    /* receive error select */
+#define SC2ICR_RI               0x01    /* receive interrupt cause */
+
+#define SC2TXB                  __SYSREG(0xd4002018, u8)        /* transmit buffer reg */
+#define SC2RXB                  __SYSREG(0xd4002019, u8)        /* receive buffer reg */
+#define SC2STR                  __SYSREG(0xd400201c, u8)        /* status reg */
+#define SC2STR_OEF              0x0001  /* overrun error found */
+#define SC2STR_PEF              0x0002  /* parity error found */
+#define SC2STR_FEF              0x0004  /* framing error found */
+#define SC2STR_CTS              0x0008  /* XCTS input pin status (0 means high) */
+#define SC2STR_RBF              0x0010  /* receive buffer status */
+#define SC2STR_TBF              0x0020  /* transmit buffer status */
+#define SC2STR_RXF              0x0040  /* receive status */
+#define SC2STR_TXF              0x0080  /* transmit status */
+
+#define SC2TIM                  __SYSREG(0xd400202d, u8)        /* status reg */
+
+#define SC2RXIRQ                24      /* serial 2 Receive IRQ */
+#define SC2TXIRQ                25      /* serial 2 Transmit IRQ */
+
+#define SC2RXICR                GxICR(SC2RXIRQ) /* serial 2 receive intr ctrl reg */
+#define SC2TXICR                GxICR(SC2TXIRQ) /* serial 2 transmit intr ctrl reg */
+
+
+#endif /* __KERNEL__ */
+
+#endif /* _ASM_SERIAL_REGS_H */
diff --git a/include/asm-mn10300/serial.h b/include/asm-mn10300/serial.h
new file mode 100644
index 000000000000..99785a9deadb
--- /dev/null
+++ b/include/asm-mn10300/serial.h
@@ -0,0 +1,36 @@
+/* Standard UART definitions
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+
+/*
+ * The ASB2305 has an 18.432 MHz clock the UART
+ */
+#define BASE_BAUD       (18432000 / 16)
+
+/* Standard COM flags (except for COM4, because of the 8514 problem) */
+#ifdef CONFIG_SERIAL_DETECT_IRQ
+#define STD_COM_FLAGS   (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST | ASYNC_AUTO_IRQ)
+#define STD_COM4_FLAGS  (ASYNC_BOOT_AUTOCONF | ASYNC_AUTO_IRQ)
+#else
+#define STD_COM_FLAGS   (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
+#define STD_COM4_FLAGS  ASYNC_BOOT_AUTOCONF
+#endif
+
+#ifdef CONFIG_SERIAL_MANY_PORTS
+#define FOURPORT_FLAGS  ASYNC_FOURPORT
+#define ACCENT_FLAGS    0
+#define BOCA_FLAGS      0
+#define HUB6_FLAGS      0
+#define RS_TABLE_SIZE   64
+#else
+#define RS_TABLE_SIZE
+#endif
+
+#include <asm/unit/serial.h>
diff --git a/include/asm-mn10300/setup.h b/include/asm-mn10300/setup.h
new file mode 100644
index 000000000000..08356c832283
--- /dev/null
+++ b/include/asm-mn10300/setup.h
@@ -0,0 +1,17 @@
+/* MN10300 Setup declarations
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_SETUP_H
+#define _ASM_SETUP_H
+
+extern void __init unit_setup(void);
+extern void __init unit_init_IRQ(void);
+
+#endif /* _ASM_SETUP_H */
diff --git a/include/asm-mn10300/shmbuf.h b/include/asm-mn10300/shmbuf.h
new file mode 100644
index 000000000000..8f300cc35d6c
--- /dev/null
+++ b/include/asm-mn10300/shmbuf.h
@@ -0,0 +1,42 @@
+#ifndef _ASM_SHMBUF_H
+#define _ASM_SHMBUF_H
+
+/*
+ * The shmid64_ds structure for MN10300 architecture.
+ * Note extra padding because this structure is passed back and forth
+ * between kernel and user space.
+ *
+ * Pad space is left for:
+ * - 64-bit time_t to solve y2038 problem
+ * - 2 miscellaneous 32-bit values
+ */
+
+struct shmid64_ds {
+        struct ipc64_perm       shm_perm;       /* operation perms */
+        size_t                  shm_segsz;      /* size of segment (bytes) */
+        __kernel_time_t         shm_atime;      /* last attach time */
+        unsigned long           __unused1;
+        __kernel_time_t         shm_dtime;      /* last detach time */
+        unsigned long           __unused2;
+        __kernel_time_t         shm_ctime;      /* last change time */
+        unsigned long           __unused3;
+        __kernel_pid_t          shm_cpid;       /* pid of creator */
+        __kernel_pid_t          shm_lpid;       /* pid of last operator */
+        unsigned long           shm_nattch;     /* no. of current attaches */
+        unsigned long           __unused4;
+        unsigned long           __unused5;
+};
+
+struct shminfo64 {
+        unsigned long   shmmax;
+        unsigned long   shmmin;
+        unsigned long   shmmni;
+        unsigned long   shmseg;
+        unsigned long   shmall;
+        unsigned long   __unused1;
+        unsigned long   __unused2;
+        unsigned long   __unused3;
+        unsigned long   __unused4;
+};
+
+#endif /* _ASM_SHMBUF_H */
diff --git a/include/asm-mn10300/shmparam.h b/include/asm-mn10300/shmparam.h
new file mode 100644
index 000000000000..ab666ed1a070
--- /dev/null
+++ b/include/asm-mn10300/shmparam.h
@@ -0,0 +1,6 @@
+#ifndef _ASM_SHMPARAM_H
+#define _ASM_SHMPARAM_H
+
+#define SHMLBA PAGE_SIZE                 /* attach addr a multiple of this */
+
+#endif /* _ASM_SHMPARAM_H */
diff --git a/include/asm-mn10300/sigcontext.h b/include/asm-mn10300/sigcontext.h
new file mode 100644
index 000000000000..4de3afff4ad7
--- /dev/null
+++ b/include/asm-mn10300/sigcontext.h
@@ -0,0 +1,52 @@
+/* MN10300 Userspace signal context
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_SIGCONTEXT_H
+#define _ASM_SIGCONTEXT_H
+
+struct fpucontext {
+        /* Regular FPU environment */
+        unsigned long   fs[32];         /* fpu registers */
+        unsigned long   fpcr;           /* fpu control register */
+};
+
+struct sigcontext {
+        unsigned long   d0;
+        unsigned long   d1;
+        unsigned long   d2;
+        unsigned long   d3;
+        unsigned long   a0;
+        unsigned long   a1;
+        unsigned long   a2;
+        unsigned long   a3;
+        unsigned long   e0;
+        unsigned long   e1;
+        unsigned long   e2;
+        unsigned long   e3;
+        unsigned long   e4;
+        unsigned long   e5;
+        unsigned long   e6;
+        unsigned long   e7;
+        unsigned long   lar;
+        unsigned long   lir;
+        unsigned long   mdr;
+        unsigned long   mcvf;
+        unsigned long   mcrl;
+        unsigned long   mcrh;
+        unsigned long   mdrq;
+        unsigned long   sp;
+        unsigned long   epsw;
+        unsigned long   pc;
+        struct fpucontext *fpucontext;
+        unsigned long   oldmask;
+};
+
+
+#endif /* _ASM_SIGCONTEXT_H */
diff --git a/include/asm-mn10300/siginfo.h b/include/asm-mn10300/siginfo.h
new file mode 100644
index 000000000000..0815d29d82e5
--- /dev/null
+++ b/include/asm-mn10300/siginfo.h
@@ -0,0 +1 @@
+#include <asm-generic/siginfo.h>
diff --git a/include/asm-mn10300/signal.h b/include/asm-mn10300/signal.h
new file mode 100644
index 000000000000..e98817cec5f7
--- /dev/null
+++ b/include/asm-mn10300/signal.h
@@ -0,0 +1,171 @@
+/* MN10300 Signal definitions
+ *
+ * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_SIGNAL_H
+#define _ASM_SIGNAL_H
+
+#include <linux/types.h>
+
+/* Avoid too many header ordering problems.  */
+struct siginfo;
+
+#ifdef __KERNEL__
+/* Most things should be clean enough to redefine this at will, if care
+   is taken to make libc match.  */
+
+#define _NSIG           64
+#define _NSIG_BPW       32
+#define _NSIG_WORDS     (_NSIG / _NSIG_BPW)
+
+typedef unsigned long old_sigset_t;             /* at least 32 bits */
+
+typedef struct {
+        unsigned long   sig[_NSIG_WORDS];
+} sigset_t;
+
+#else
+/* Here we must cater to libcs that poke about in kernel headers.  */
+
+#define NSIG            32
+typedef unsigned long sigset_t;
+
+#endif /* __KERNEL__ */
+
+#define SIGHUP           1
+#define SIGINT           2
+#define SIGQUIT          3
+#define SIGILL           4
+#define SIGTRAP          5
+#define SIGABRT          6
+#define SIGIOT           6
+#define SIGBUS           7
+#define SIGFPE           8
+#define SIGKILL          9
+#define SIGUSR1         10
+#define SIGSEGV         11
+#define SIGUSR2         12
+#define SIGPIPE         13
+#define SIGALRM         14
+#define SIGTERM         15
+#define SIGSTKFLT       16
+#define SIGCHLD         17
+#define SIGCONT         18
+#define SIGSTOP         19
+#define SIGTSTP         20
+#define SIGTTIN         21
+#define SIGTTOU         22
+#define SIGURG          23
+#define SIGXCPU         24
+#define SIGXFSZ         25
+#define SIGVTALRM       26
+#define SIGPROF         27
+#define SIGWINCH        28
+#define SIGIO           29
+#define SIGPOLL         SIGIO
+/*
+#define SIGLOST         29
+*/
+#define SIGPWR          30
+#define SIGSYS          31
+#define SIGUNUSED       31
+
+/* These should not be considered constants from userland.  */
+#define SIGRTMIN        32
+#define SIGRTMAX        (_NSIG-1)
+
+/*
+ * SA_FLAGS values:
+ *
+ * SA_ONSTACK indicates that a registered stack_t will be used.
+ * SA_RESTART flag to get restarting signals (which were the default long ago)
+ * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
+ * SA_RESETHAND clears the handler when the signal is delivered.
+ * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
+ * SA_NODEFER prevents the current signal from being masked in the handler.
+ *
+ * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
+ * Unix names RESETHAND and NODEFER respectively.
+ */
+#define SA_NOCLDSTOP    0x00000001U
+#define SA_NOCLDWAIT    0x00000002U
+#define SA_SIGINFO      0x00000004U
+#define SA_ONSTACK      0x08000000U
+#define SA_RESTART      0x10000000U
+#define SA_NODEFER      0x40000000U
+#define SA_RESETHAND    0x80000000U
+
+#define SA_NOMASK       SA_NODEFER
+#define SA_ONESHOT      SA_RESETHAND
+
+#define SA_RESTORER     0x04000000
+
+/*
+ * sigaltstack controls
+ */
+#define SS_ONSTACK      1
+#define SS_DISABLE      2
+
+#define MINSIGSTKSZ     2048
+#define SIGSTKSZ        8192
+
+#include <asm-generic/signal.h>
+
+#ifdef __KERNEL__
+struct old_sigaction {
+        __sighandler_t sa_handler;
+        old_sigset_t sa_mask;
+        unsigned long sa_flags;
+        __sigrestore_t sa_restorer;
+};
+
+struct sigaction {
+        __sighandler_t sa_handler;
+        unsigned long sa_flags;
+        __sigrestore_t sa_restorer;
+        sigset_t sa_mask;               /* mask last for extensibility */
+};
+
+struct k_sigaction {
+        struct sigaction sa;
+};
+#else
+/* Here we must cater to libcs that poke about in kernel headers.  */
+
+struct sigaction {
+        union {
+          __sighandler_t _sa_handler;
+          void (*_sa_sigaction)(int, struct siginfo *, void *);
+        } _u;
+        sigset_t sa_mask;
+        unsigned long sa_flags;
+        void (*sa_restorer)(void);
+};
+
+#define sa_handler      _u._sa_handler
+#define sa_sigaction    _u._sa_sigaction
+
+#endif /* __KERNEL__ */
+
+typedef struct sigaltstack {
+        void __user     *ss_sp;
+        int             ss_flags;
+        size_t          ss_size;
+} stack_t;
+
+#ifdef __KERNEL__
+#include <asm/sigcontext.h>
+
+
+struct pt_regs;
+#define ptrace_signal_deliver(regs, cookie) do { } while (0)
+
+#endif /* __KERNEL__ */
+
+#endif /* _ASM_SIGNAL_H */
diff --git a/include/asm-mn10300/smp.h b/include/asm-mn10300/smp.h
new file mode 100644
index 000000000000..4eb8c61b7dab
--- /dev/null
+++ b/include/asm-mn10300/smp.h
@@ -0,0 +1,18 @@
+/* MN10300 SMP support
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_SMP_H
+#define _ASM_SMP_H
+
+#ifdef CONFIG_SMP
+#error SMP not yet supported for MN10300
+#endif
+
+#endif
diff --git a/include/asm-mn10300/socket.h b/include/asm-mn10300/socket.h
new file mode 100644
index 000000000000..99ca648b94c5
--- /dev/null
+++ b/include/asm-mn10300/socket.h
@@ -0,0 +1,55 @@
+#ifndef _ASM_SOCKET_H
+#define _ASM_SOCKET_H
+
+#include <asm/sockios.h>
+
+/* For setsockopt(2) */
+#define SOL_SOCKET      1
+
+#define SO_DEBUG        1
+#define SO_REUSEADDR    2
+#define SO_TYPE         3
+#define SO_ERROR        4
+#define SO_DONTROUTE    5
+#define SO_BROADCAST    6
+#define SO_SNDBUF       7
+#define SO_RCVBUF       8
+#define SO_SNDBUFFORCE  32
+#define SO_RCVBUFFORCE  33
+#define SO_KEEPALIVE    9
+#define SO_OOBINLINE    10
+#define SO_NO_CHECK     11
+#define SO_PRIORITY     12
+#define SO_LINGER       13
+#define SO_BSDCOMPAT    14
+/* To add :#define SO_REUSEPORT 15 */
+#define SO_PASSCRED     16
+#define SO_PEERCRED     17
+#define SO_RCVLOWAT     18
+#define SO_SNDLOWAT     19
+#define SO_RCVTIMEO     20
+#define SO_SNDTIMEO     21
+
+/* Security levels - as per NRL IPv6 - don't actually do anything */
+#define SO_SECURITY_AUTHENTICATION              22
+#define SO_SECURITY_ENCRYPTION_TRANSPORT        23
+#define SO_SECURITY_ENCRYPTION_NETWORK          24
+
+#define SO_BINDTODEVICE 25
+
+/* Socket filtering */
+#define SO_ATTACH_FILTER        26
+#define SO_DETACH_FILTER        27
+
+#define SO_PEERNAME             28
+#define SO_TIMESTAMP            29
+#define SCM_TIMESTAMP           SO_TIMESTAMP
+
+#define SO_ACCEPTCONN           30
+
+#define SO_PEERSEC              31
+#define SO_PASSSEC              34
+#define SO_TIMESTAMPNS          35
+#define SCM_TIMESTAMPNS         SO_TIMESTAMPNS
+
+#endif /* _ASM_SOCKET_H */
diff --git a/include/asm-mn10300/sockios.h b/include/asm-mn10300/sockios.h
new file mode 100644
index 000000000000..b03043a1c564
--- /dev/null
+++ b/include/asm-mn10300/sockios.h
@@ -0,0 +1,13 @@
+#ifndef _ASM_SOCKIOS_H
+#define _ASM_SOCKIOS_H
+
+/* Socket-level I/O control calls. */
+#define FIOSETOWN       0x8901
+#define SIOCSPGRP       0x8902
+#define FIOGETOWN       0x8903
+#define SIOCGPGRP       0x8904
+#define SIOCATMARK      0x8905
+#define SIOCGSTAMP      0x8906          /* Get stamp */
+#define SIOCGSTAMPNS    0x8907          /* Get stamp (timespec) */
+
+#endif /* _ASM_SOCKIOS_H */
diff --git a/include/asm-mn10300/spinlock.h b/include/asm-mn10300/spinlock.h
new file mode 100644
index 000000000000..4bf9c8b169e0
--- /dev/null
+++ b/include/asm-mn10300/spinlock.h
@@ -0,0 +1,16 @@
+/* MN10300 spinlock support
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_SPINLOCK_H
+#define _ASM_SPINLOCK_H
+
+#error SMP spinlocks not implemented for MN10300
+
+#endif /* _ASM_SPINLOCK_H */
diff --git a/include/asm-mn10300/stat.h b/include/asm-mn10300/stat.h
new file mode 100644
index 000000000000..63ff8371cf2c
--- /dev/null
+++ b/include/asm-mn10300/stat.h
@@ -0,0 +1,78 @@
+#ifndef _ASM_STAT_H
+#define _ASM_STAT_H
+
+struct __old_kernel_stat {
+        unsigned short st_dev;
+        unsigned short st_ino;
+        unsigned short st_mode;
+        unsigned short st_nlink;
+        unsigned short st_uid;
+        unsigned short st_gid;
+        unsigned short st_rdev;
+        unsigned long  st_size;
+        unsigned long  st_atime;
+        unsigned long  st_mtime;
+        unsigned long  st_ctime;
+};
+
+struct stat {
+        unsigned long  st_dev;
+        unsigned long  st_ino;
+        unsigned short st_mode;
+        unsigned short st_nlink;
+        unsigned short st_uid;
+        unsigned short st_gid;
+        unsigned long  st_rdev;
+        unsigned long  st_size;
+        unsigned long  st_blksize;
+        unsigned long  st_blocks;
+        unsigned long  st_atime;
+        unsigned long  st_atime_nsec;
+        unsigned long  st_mtime;
+        unsigned long  st_mtime_nsec;
+        unsigned long  st_ctime;
+        unsigned long  st_ctime_nsec;
+        unsigned long  __unused4;
+        unsigned long  __unused5;
+};
+
+/* This matches struct stat64 in glibc2.1, hence the absolutely
+ * insane amounts of padding around dev_t's.
+ */
+struct stat64 {
+        unsigned long long      st_dev;
+        unsigned char   __pad0[4];
+
+#define STAT64_HAS_BROKEN_ST_INO        1
+        unsigned long   __st_ino;
+
+        unsigned int    st_mode;
+        unsigned int    st_nlink;
+
+        unsigned long   st_uid;
+        unsigned long   st_gid;
+
+        unsigned long long      st_rdev;
+        unsigned char   __pad3[4];
+
+        long long       st_size;
+        unsigned long   st_blksize;
+
+        unsigned long   st_blocks;      /* Number 512-byte blocks allocated. */
+        unsigned long   __pad4;         /* future possible st_blocks high bits */
+
+        unsigned long   st_atime;
+        unsigned long   st_atime_nsec;
+
+        unsigned long   st_mtime;
+        unsigned int    st_mtime_nsec;
+
+        unsigned long   st_ctime;
+        unsigned long   st_ctime_nsec;
+
+        unsigned long long      st_ino;
+};
+
+#define STAT_HAVE_NSEC 1
+
+#endif /* _ASM_STAT_H */
diff --git a/include/asm-mn10300/statfs.h b/include/asm-mn10300/statfs.h
new file mode 100644
index 000000000000..0b91fe198c20
--- /dev/null
+++ b/include/asm-mn10300/statfs.h
@@ -0,0 +1 @@
+#include <asm-generic/statfs.h>
diff --git a/include/asm-mn10300/string.h b/include/asm-mn10300/string.h
new file mode 100644
index 000000000000..47dbd4346c32
--- /dev/null
+++ b/include/asm-mn10300/string.h
@@ -0,0 +1,32 @@
+/* MN10300 Optimised string functions
+ *
+ * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Modified by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_STRING_H
+#define _ASM_STRING_H
+
+#define __HAVE_ARCH_MEMSET
+#define __HAVE_ARCH_MEMCPY
+#define __HAVE_ARCH_MEMMOVE
+
+extern void *memset(void *dest, int ch, size_t count);
+extern void *memcpy(void *dest, const void *src, size_t count);
+extern void *memmove(void *dest, const void *src, size_t count);
+
+
+extern void __struct_cpy_bug(void);
+#define struct_cpy(x, y)                        \
+({                                              \
+        if (sizeof(*(x)) != sizeof(*(y)))       \
+                __struct_cpy_bug;               \
+        memcpy(x, y, sizeof(*(x)));             \
+})
+
+#endif /* _ASM_STRING_H */
diff --git a/include/asm-mn10300/system.h b/include/asm-mn10300/system.h
new file mode 100644
index 000000000000..8214fb7e7fe4
--- /dev/null
+++ b/include/asm-mn10300/system.h
@@ -0,0 +1,237 @@
+/* MN10300 System definitions
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_SYSTEM_H
+#define _ASM_SYSTEM_H
+
+#include <asm/cpu-regs.h>
+
+#ifdef __KERNEL__
+#ifndef __ASSEMBLY__
+
+#include <linux/kernel.h>
+
+struct task_struct;
+struct thread_struct;
+
+extern asmlinkage
+struct task_struct *__switch_to(struct thread_struct *prev,
+                                struct thread_struct *next,
+                                struct task_struct *prev_task);
+
+/* context switching is now performed out-of-line in switch_to.S */
+#define switch_to(prev, next, last)                                     \
+do {                                                                    \
+        current->thread.wchan = (u_long) __builtin_return_address(0);   \
+        (last) = __switch_to(&(prev)->thread, &(next)->thread, (prev)); \
+        mb();                                                           \
+        current->thread.wchan = 0;                                      \
+} while (0)
+
+#define arch_align_stack(x) (x)
+
+#define nop() asm volatile ("nop")
+
+#endif /* !__ASSEMBLY__ */
+
+/*
+ * Force strict CPU ordering.
+ * And yes, this is required on UP too when we're talking
+ * to devices.
+ *
+ * For now, "wmb()" doesn't actually do anything, as all
+ * Intel CPU's follow what Intel calls a *Processor Order*,
+ * in which all writes are seen in the program order even
+ * outside the CPU.
+ *
+ * I expect future Intel CPU's to have a weaker ordering,
+ * but I'd also expect them to finally get their act together
+ * and add some real memory barriers if so.
+ *
+ * Some non intel clones support out of order store. wmb() ceases to be a
+ * nop for these.
+ */
+
+#define mb()    asm volatile ("": : :"memory")
+#define rmb()   mb()
+#define wmb()   asm volatile ("": : :"memory")
+
+#ifdef CONFIG_SMP
+#define smp_mb()        mb()
+#define smp_rmb()       rmb()
+#define smp_wmb()       wmb()
+#else
+#define smp_mb()        barrier()
+#define smp_rmb()       barrier()
+#define smp_wmb()       barrier()
+#endif
+
+#define set_mb(var, value)  do { var = value;  mb(); } while (0)
+#define set_wmb(var, value) do { var = value; wmb(); } while (0)
+
+#define read_barrier_depends()          do {} while (0)
+#define smp_read_barrier_depends()      do {} while (0)
+
+/*****************************************************************************/
+/*
+ * interrupt control
+ * - "disabled": run in IM1/2
+ *   - level 0 - GDB stub
+ *   - level 1 - virtual serial DMA (if present)
+ *   - level 5 - normal interrupt priority
+ *   - level 6 - timer interrupt
+ * - "enabled":  run in IM7
+ */
+#ifdef CONFIG_MN10300_TTYSM
+#define MN10300_CLI_LEVEL       EPSW_IM_2
+#else
+#define MN10300_CLI_LEVEL       EPSW_IM_1
+#endif
+
+#define local_save_flags(x)                     \
+do {                                            \
+        typecheck(unsigned long, x);            \
+        asm volatile(                           \
+                "       mov epsw,%0     \n"     \
+                : "=d"(x)                       \
+                );                              \
+} while (0)
+
+#define local_irq_disable()                                             \
+do {                                                                    \
+        asm volatile(                                                   \
+                "       and %0,epsw     \n"                             \
+                "       or %1,epsw      \n"                             \
+                "       nop             \n"                             \
+                "       nop             \n"                             \
+                "       nop             \n"                             \
+                :                                                       \
+                : "i"(~EPSW_IM), "i"(EPSW_IE | MN10300_CLI_LEVEL)       \
+                );                                                      \
+} while (0)
+
+#define local_irq_save(x)                       \
+do {                                            \
+        local_save_flags(x);                    \
+        local_irq_disable();                    \
+} while (0)
+
+/*
+ * we make sure local_irq_enable() doesn't cause priority inversion
+ */
+#ifndef __ASSEMBLY__
+
+extern unsigned long __mn10300_irq_enabled_epsw;
+
+#endif
+
+#define local_irq_enable()                                              \
+do {                                                                    \
+        unsigned long tmp;                                              \
+                                                                        \
+        asm volatile(                                                   \
+                "       mov     epsw,%0         \n"                     \
+                "       and     %1,%0           \n"                     \
+                "       or      %2,%0           \n"                     \
+                "       mov     %0,epsw         \n"                     \
+                : "=&d"(tmp)                                            \
+                : "i"(~EPSW_IM), "r"(__mn10300_irq_enabled_epsw)        \
+                );                                                      \
+} while (0)
+
+#define local_irq_restore(x)                    \
+do {                                            \
+        typecheck(unsigned long, x);            \
+        asm volatile(                           \
+                "       mov %0,epsw     \n"     \
+                "       nop             \n"     \
+                "       nop             \n"     \
+                "       nop             \n"     \
+                :                               \
+                : "d"(x)                        \
+                : "memory", "cc"                \
+                );                              \
+} while (0)
+
+#define irqs_disabled()                         \
+({                                              \
+        unsigned long flags;                    \
+        local_save_flags(flags);                \
+        (flags & EPSW_IM) <= MN10300_CLI_LEVEL; \
+})
+
+/* hook to save power by halting the CPU
+ * - called from the idle loop
+ * - must reenable interrupts (which takes three instruction cycles to complete)
+ */
+#define safe_halt()                                                     \
+do {                                                                    \
+        asm volatile("  or      %0,epsw \n"                             \
+                     "  nop             \n"                             \
+                     "  nop             \n"                             \
+                     "  bset    %2,(%1) \n"                             \
+                     :                                                  \
+                     : "i"(EPSW_IE|EPSW_IM), "n"(&CPUM), "i"(CPUM_SLEEP)\
+                     : "cc"                                             \
+                     );                                                 \
+} while (0)
+
+#define STI     or EPSW_IE|EPSW_IM,epsw
+#define CLI     and ~EPSW_IM,epsw; or EPSW_IE|MN10300_CLI_LEVEL,epsw; nop; nop; nop
+
+/*****************************************************************************/
+/*
+ * MN10300 doesn't actually have an exchange instruction
+ */
+#ifndef __ASSEMBLY__
+
+struct __xchg_dummy { unsigned long a[100]; };
+#define __xg(x) ((struct __xchg_dummy *)(x))
+
+static inline
+unsigned long __xchg(volatile unsigned long *m, unsigned long val)
+{
+        unsigned long retval;
+        unsigned long flags;
+
+        local_irq_save(flags);
+        retval = *m;
+        *m = val;
+        local_irq_restore(flags);
+        return retval;
+}
+
+#define xchg(ptr, v)                                            \
+        ((__typeof__(*(ptr))) __xchg((unsigned long *)(ptr),    \
+                                     (unsigned long)(v)))
+
+static inline unsigned long __cmpxchg(volatile unsigned long *m,
+                                      unsigned long old, unsigned long new)
+{
+        unsigned long retval;
+        unsigned long flags;
+
+        local_irq_save(flags);
+        retval = *m;
+        if (retval == old)
+                *m = new;
+        local_irq_restore(flags);
+        return retval;
+}
+
+#define cmpxchg(ptr, o, n)                                      \
+        ((__typeof__(*(ptr))) __cmpxchg((unsigned long *)(ptr), \
+                                        (unsigned long)(o),     \
+                                        (unsigned long)(n)))
+
+#endif /* !__ASSEMBLY__ */
+
+#endif /* __KERNEL__ */
+#endif /* _ASM_SYSTEM_H */
diff --git a/include/asm-mn10300/termbits.h b/include/asm-mn10300/termbits.h
new file mode 100644
index 000000000000..eb2b0dc1f696
--- /dev/null
+++ b/include/asm-mn10300/termbits.h
@@ -0,0 +1,200 @@
+#ifndef _ASM_TERMBITS_H
+#define _ASM_TERMBITS_H
+
+#include <linux/posix_types.h>
+
+typedef unsigned char   cc_t;
+typedef unsigned int    speed_t;
+typedef unsigned int    tcflag_t;
+
+#define NCCS 19
+struct termios {
+        tcflag_t c_iflag;               /* input mode flags */
+        tcflag_t c_oflag;               /* output mode flags */
+        tcflag_t c_cflag;               /* control mode flags */
+        tcflag_t c_lflag;               /* local mode flags */
+        cc_t c_line;                    /* line discipline */
+        cc_t c_cc[NCCS];                /* control characters */
+};
+
+struct termios2 {
+        tcflag_t c_iflag;               /* input mode flags */
+        tcflag_t c_oflag;               /* output mode flags */
+        tcflag_t c_cflag;               /* control mode flags */
+        tcflag_t c_lflag;               /* local mode flags */
+        cc_t c_line;                    /* line discipline */
+        cc_t c_cc[NCCS];                /* control characters */
+        speed_t c_ispeed;               /* input speed */
+        speed_t c_ospeed;               /* output speed */
+};
+
+struct ktermios {
+        tcflag_t c_iflag;               /* input mode flags */
+        tcflag_t c_oflag;               /* output mode flags */
+        tcflag_t c_cflag;               /* control mode flags */
+        tcflag_t c_lflag;               /* local mode flags */
+        cc_t c_line;                    /* line discipline */
+        cc_t c_cc[NCCS];                /* control characters */
+        speed_t c_ispeed;               /* input speed */
+        speed_t c_ospeed;               /* output speed */
+};
+
+/* c_cc characters */
+#define VINTR 0
+#define VQUIT 1
+#define VERASE 2
+#define VKILL 3
+#define VEOF 4
+#define VTIME 5
+#define VMIN 6
+#define VSWTC 7
+#define VSTART 8
+#define VSTOP 9
+#define VSUSP 10
+#define VEOL 11
+#define VREPRINT 12
+#define VDISCARD 13
+#define VWERASE 14
+#define VLNEXT 15
+#define VEOL2 16
+
+
+/* c_iflag bits */
+#define IGNBRK  0000001
+#define BRKINT  0000002
+#define IGNPAR  0000004
+#define PARMRK  0000010
+#define INPCK   0000020
+#define ISTRIP  0000040
+#define INLCR   0000100
+#define IGNCR   0000200
+#define ICRNL   0000400
+#define IUCLC   0001000
+#define IXON    0002000
+#define IXANY   0004000
+#define IXOFF   0010000
+#define IMAXBEL 0020000
+#define IUTF8   0040000
+
+/* c_oflag bits */
+#define OPOST   0000001
+#define OLCUC   0000002
+#define ONLCR   0000004
+#define OCRNL   0000010
+#define ONOCR   0000020
+#define ONLRET  0000040
+#define OFILL   0000100
+#define OFDEL   0000200
+#define NLDLY   0000400
+#define   NL0   0000000
+#define   NL1   0000400
+#define CRDLY   0003000
+#define   CR0   0000000
+#define   CR1   0001000
+#define   CR2   0002000
+#define   CR3   0003000
+#define TABDLY  0014000
+#define   TAB0  0000000
+#define   TAB1  0004000
+#define   TAB2  0010000
+#define   TAB3  0014000
+#define   XTABS 0014000
+#define BSDLY   0020000
+#define   BS0   0000000
+#define   BS1   0020000
+#define VTDLY   0040000
+#define   VT0   0000000
+#define   VT1   0040000
+#define FFDLY   0100000
+#define   FF0   0000000
+#define   FF1   0100000
+
+/* c_cflag bit meaning */
+#define CBAUD   0010017
+#define  B0     0000000         /* hang up */
+#define  B50    0000001
+#define  B75    0000002
+#define  B110   0000003
+#define  B134   0000004
+#define  B150   0000005
+#define  B200   0000006
+#define  B300   0000007
+#define  B600   0000010
+#define  B1200  0000011
+#define  B1800  0000012
+#define  B2400  0000013
+#define  B4800  0000014
+#define  B9600  0000015
+#define  B19200 0000016
+#define  B38400 0000017
+#define EXTA B19200
+#define EXTB B38400
+#define CSIZE   0000060
+#define   CS5   0000000
+#define   CS6   0000020
+#define   CS7   0000040
+#define   CS8   0000060
+#define CSTOPB  0000100
+#define CREAD   0000200
+#define PARENB  0000400
+#define PARODD  0001000
+#define HUPCL   0002000
+#define CLOCAL  0004000
+#define CBAUDEX 0010000
+#define   BOTHER  0010000
+#define    B57600 0010001
+#define   B115200 0010002
+#define   B230400 0010003
+#define   B460800 0010004
+#define   B500000 0010005
+#define   B576000 0010006
+#define   B921600 0010007
+#define  B1000000 0010010
+#define  B1152000 0010011
+#define  B1500000 0010012
+#define  B2000000 0010013
+#define  B2500000 0010014
+#define  B3000000 0010015
+#define  B3500000 0010016
+#define  B4000000 0010017
+#define CIBAUD    002003600000  /* input baud rate (not used) */
+#define CTVB      004000000000          /* VisioBraille Terminal flow control */
+#define CMSPAR    010000000000          /* mark or space (stick) parity */
+#define CRTSCTS   020000000000          /* flow control */
+
+#define IBSHIFT   16            /* Shift from CBAUD to CIBAUD */
+
+/* c_lflag bits */
+#define ISIG    0000001
+#define ICANON  0000002
+#define XCASE   0000004
+#define ECHO    0000010
+#define ECHOE   0000020
+#define ECHOK   0000040
+#define ECHONL  0000100
+#define NOFLSH  0000200
+#define TOSTOP  0000400
+#define ECHOCTL 0001000
+#define ECHOPRT 0002000
+#define ECHOKE  0004000
+#define FLUSHO  0010000
+#define PENDIN  0040000
+#define IEXTEN  0100000
+
+/* tcflow() and TCXONC use these */
+#define TCOOFF          0
+#define TCOON           1
+#define TCIOFF          2
+#define TCION           3
+
+/* tcflush() and TCFLSH use these */
+#define TCIFLUSH        0
+#define TCOFLUSH        1
+#define TCIOFLUSH       2
+
+/* tcsetattr uses these */
+#define TCSANOW         0
+#define TCSADRAIN       1
+#define TCSAFLUSH       2
+
+#endif /* _ASM_TERMBITS_H */
diff --git a/include/asm-mn10300/termios.h b/include/asm-mn10300/termios.h
new file mode 100644
index 000000000000..dd7cf617e118
--- /dev/null
+++ b/include/asm-mn10300/termios.h
@@ -0,0 +1,92 @@
+#ifndef _ASM_TERMIOS_H
+#define _ASM_TERMIOS_H
+
+#include <asm/termbits.h>
+#include <asm/ioctls.h>
+
+struct winsize {
+        unsigned short ws_row;
+        unsigned short ws_col;
+        unsigned short ws_xpixel;
+        unsigned short ws_ypixel;
+};
+
+#define NCC 8
+struct termio {
+        unsigned short c_iflag;         /* input mode flags */
+        unsigned short c_oflag;         /* output mode flags */
+        unsigned short c_cflag;         /* control mode flags */
+        unsigned short c_lflag;         /* local mode flags */
+        unsigned char c_line;           /* line discipline */
+        unsigned char c_cc[NCC];        /* control characters */
+};
+
+#ifdef __KERNEL__
+/*      intr=^C         quit=^|         erase=del       kill=^U
+        eof=^D          vtime=\0        vmin=\1         sxtc=\0
+        start=^Q        stop=^S         susp=^Z         eol=\0
+        reprint=^R      discard=^U      werase=^W       lnext=^V
+        eol2=\0
+*/
+#define INIT_C_CC "\003\034\177\025\004\0\1\0\021\023\032\0\022\017\027\026\0"
+#endif
+
+/* modem lines */
+#define TIOCM_LE        0x001
+#define TIOCM_DTR       0x002
+#define TIOCM_RTS       0x004
+#define TIOCM_ST        0x008
+#define TIOCM_SR        0x010
+#define TIOCM_CTS       0x020
+#define TIOCM_CAR       0x040
+#define TIOCM_RNG       0x080
+#define TIOCM_DSR       0x100
+#define TIOCM_CD        TIOCM_CAR
+#define TIOCM_RI        TIOCM_RNG
+#define TIOCM_OUT1      0x2000
+#define TIOCM_OUT2      0x4000
+#define TIOCM_LOOP      0x8000
+
+#define TIOCM_MODEM_BITS       TIOCM_OUT2      /* IRDA support */
+
+/*
+ * Translate a "termio" structure into a "termios". Ugh.
+ */
+#define SET_LOW_TERMIOS_BITS(termios, termio, x) { \
+        unsigned short __tmp; \
+        get_user(__tmp, &(termio)->x); \
+        *(unsigned short *) &(termios)->x = __tmp; \
+}
+
+#define user_termio_to_kernel_termios(termios, termio) \
+({ \
+        SET_LOW_TERMIOS_BITS(termios, termio, c_iflag); \
+        SET_LOW_TERMIOS_BITS(termios, termio, c_oflag); \
+        SET_LOW_TERMIOS_BITS(termios, termio, c_cflag); \
+        SET_LOW_TERMIOS_BITS(termios, termio, c_lflag); \
+        copy_from_user((termios)->c_cc, (termio)->c_cc, NCC); \
+})
+
+/*
+ * Translate a "termios" structure into a "termio". Ugh.
+ */
+#define kernel_termios_to_user_termio(termio, termios) \
+({ \
+        put_user((termios)->c_iflag, &(termio)->c_iflag); \
+        put_user((termios)->c_oflag, &(termio)->c_oflag); \
+        put_user((termios)->c_cflag, &(termio)->c_cflag); \
+        put_user((termios)->c_lflag, &(termio)->c_lflag); \
+        put_user((termios)->c_line,  &(termio)->c_line); \
+        copy_to_user((termio)->c_cc, (termios)->c_cc, NCC); \
+})
+
+#define user_termios_to_kernel_termios(k, u) \
+        copy_from_user(k, u, sizeof(struct termios2))
+#define kernel_termios_to_user_termios(u, k) \
+        copy_to_user(u, k, sizeof(struct termios2))
+#define user_termios_to_kernel_termios_1(k, u) \
+        copy_from_user(k, u, sizeof(struct termios))
+#define kernel_termios_to_user_termios_1(u, k) \
+        copy_to_user(u, k, sizeof(struct termios))
+
+#endif  /* _ASM_TERMIOS_H */
diff --git a/include/asm-mn10300/thread_info.h b/include/asm-mn10300/thread_info.h
new file mode 100644
index 000000000000..e397e7192785
--- /dev/null
+++ b/include/asm-mn10300/thread_info.h
@@ -0,0 +1,168 @@
+/* MN10300 Low-level thread information
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+
+#ifndef _ASM_THREAD_INFO_H
+#define _ASM_THREAD_INFO_H
+
+#ifdef __KERNEL__
+
+#include <asm/page.h>
+
+#ifndef __ASSEMBLY__
+#include <asm/processor.h>
+#endif
+
+#define PREEMPT_ACTIVE          0x10000000
+
+#ifdef CONFIG_4KSTACKS
+#define THREAD_SIZE             (4096)
+#else
+#define THREAD_SIZE             (8192)
+#endif
+
+#define STACK_WARN              (THREAD_SIZE / 8)
+
+/*
+ * low level task data that entry.S needs immediate access to
+ * - this struct should fit entirely inside of one cache line
+ * - this struct shares the supervisor stack pages
+ * - if the contents of this structure are changed, the assembly constants
+ *   must also be changed
+ */
+#ifndef __ASSEMBLY__
+
+struct thread_info {
+        struct task_struct      *task;          /* main task structure */
+        struct exec_domain      *exec_domain;   /* execution domain */
+        unsigned long           flags;          /* low level flags */
+        __u32                   cpu;            /* current CPU */
+        __s32                   preempt_count;  /* 0 => preemptable, <0 => BUG */
+
+        mm_segment_t            addr_limit;     /* thread address space:
+                                                   0-0xBFFFFFFF for user-thead
+                                                   0-0xFFFFFFFF for kernel-thread
+                                                */
+        struct restart_block    restart_block;
+
+        __u8                    supervisor_stack[0];
+};
+
+#else /* !__ASSEMBLY__ */
+
+#ifndef __ASM_OFFSETS_H__
+#include <asm/asm-offsets.h>
+#endif
+
+#endif
+
+/*
+ * macros/functions for gaining access to the thread information structure
+ *
+ * preempt_count needs to be 1 initially, until the scheduler is functional.
+ */
+#ifndef __ASSEMBLY__
+
+#define INIT_THREAD_INFO(tsk)                   \
+{                                               \
+        .task           = &tsk,                 \
+        .exec_domain    = &default_exec_domain, \
+        .flags          = 0,                    \
+        .cpu            = 0,                    \
+        .preempt_count  = 1,                    \
+        .addr_limit     = KERNEL_DS,            \
+        .restart_block = {                      \
+                .fn = do_no_restart_syscall,    \
+        },                                      \
+}
+
+#define init_thread_info        (init_thread_union.thread_info)
+#define init_stack              (init_thread_union.stack)
+#define init_uregs                                                      \
+        ((struct pt_regs *)                                             \
+         ((unsigned long) init_stack + THREAD_SIZE - sizeof(struct pt_regs)))
+
+extern struct thread_info *__current_ti;
+
+/* how to get the thread information struct from C */
+static inline __attribute__((const))
+struct thread_info *current_thread_info(void)
+{
+        struct thread_info *ti;
+        asm("mov sp,%0\n"
+            "and %1,%0\n"
+            : "=d" (ti)
+            : "i" (~(THREAD_SIZE - 1))
+            : "cc");
+        return ti;
+}
+
+/* how to get the current stack pointer from C */
+static inline unsigned long current_stack_pointer(void)
+{
+        unsigned long sp;
+        asm("mov sp,%0; ":"=r" (sp));
+        return sp;
+}
+
+/* thread information allocation */
+#ifdef CONFIG_DEBUG_STACK_USAGE
+#define alloc_thread_info(tsk) kzalloc(THREAD_SIZE, GFP_KERNEL)
+#else
+#define alloc_thread_info(tsk) kmalloc(THREAD_SIZE, GFP_KERNEL)
+#endif
+
+#define free_thread_info(ti)    kfree((ti))
+#define get_thread_info(ti)     get_task_struct((ti)->task)
+#define put_thread_info(ti)     put_task_struct((ti)->task)
+
+#else /* !__ASSEMBLY__ */
+
+#ifndef __VMLINUX_LDS__
+/* how to get the thread information struct from ASM */
+.macro GET_THREAD_INFO reg
+        mov     sp,\reg
+        and     -THREAD_SIZE,\reg
+.endm
+#endif
+#endif
+
+/*
+ * thread information flags
+ * - these are process state flags that various assembly files may need to
+ *   access
+ * - pending work-to-be-done flags are in LSW
+ * - other flags in MSW
+ */
+#define TIF_SYSCALL_TRACE       0       /* syscall trace active */
+#define TIF_NOTIFY_RESUME       1       /* resumption notification requested */
+#define TIF_SIGPENDING          2       /* signal pending */
+#define TIF_NEED_RESCHED        3       /* rescheduling necessary */
+#define TIF_SINGLESTEP          4       /* restore singlestep on return to user mode */
+#define TIF_RESTORE_SIGMASK     5       /* restore signal mask in do_signal() */
+#define TIF_POLLING_NRFLAG      16      /* true if poll_idle() is polling TIF_NEED_RESCHED */
+#define TIF_MEMDIE              17      /* OOM killer killed process */
+#define TIF_FREEZE              18      /* freezing for suspend */
+
+#define _TIF_SYSCALL_TRACE      +(1 << TIF_SYSCALL_TRACE)
+#define _TIF_NOTIFY_RESUME      +(1 << TIF_NOTIFY_RESUME)
+#define _TIF_SIGPENDING         +(1 << TIF_SIGPENDING)
+#define _TIF_NEED_RESCHED       +(1 << TIF_NEED_RESCHED)
+#define _TIF_SINGLESTEP         +(1 << TIF_SINGLESTEP)
+#define _TIF_RESTORE_SIGMASK    +(1 << TIF_RESTORE_SIGMASK)
+#define _TIF_POLLING_NRFLAG     +(1 << TIF_POLLING_NRFLAG)
+#define _TIF_FREEZE             +(1 << TIF_FREEZE)
+
+#define _TIF_WORK_MASK          0x0000FFFE      /* work to do on interrupt/exception return */
+#define _TIF_ALLWORK_MASK       0x0000FFFF      /* work to do on any return to u-space */
+
+#endif /* __KERNEL__ */
+
+#endif /* _ASM_THREAD_INFO_H */
diff --git a/include/asm-mn10300/timer-regs.h b/include/asm-mn10300/timer-regs.h
new file mode 100644
index 000000000000..1d883b7f94ab
--- /dev/null
+++ b/include/asm-mn10300/timer-regs.h
@@ -0,0 +1,293 @@
+/* AM33v2 on-board timer module registers
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+
+#ifndef _ASM_TIMER_REGS_H
+#define _ASM_TIMER_REGS_H
+
+#include <asm/cpu-regs.h>
+#include <asm/intctl-regs.h>
+
+#ifdef __KERNEL__
+
+/* timer prescalar control */
+#define TMPSCNT                 __SYSREG(0xd4003071, u8) /* timer prescaler control */
+#define TMPSCNT_ENABLE          0x80    /* timer prescaler enable */
+#define TMPSCNT_DISABLE         0x00    /* timer prescaler disable */
+
+/* 8 bit timers */
+#define TM0MD                   __SYSREG(0xd4003000, u8) /* timer 0 mode register */
+#define TM0MD_SRC               0x07    /* timer source */
+#define TM0MD_SRC_IOCLK         0x00    /* - IOCLK */
+#define TM0MD_SRC_IOCLK_8       0x01    /* - 1/8 IOCLK */
+#define TM0MD_SRC_IOCLK_32      0x02    /* - 1/32 IOCLK */
+#define TM0MD_SRC_TM2IO         0x03    /* - TM2IO pin input */
+#define TM0MD_SRC_TM1UFLOW      0x05    /* - timer 1 underflow */
+#define TM0MD_SRC_TM2UFLOW      0x06    /* - timer 2 underflow */
+#define TM0MD_SRC_TM0IO         0x07    /* - TM0IO pin input */
+#define TM0MD_INIT_COUNTER      0x40    /* initialize TMnBC = TMnBR */
+#define TM0MD_COUNT_ENABLE      0x80    /* timer count enable */
+
+#define TM1MD                   __SYSREG(0xd4003001, u8) /* timer 1 mode register */
+#define TM1MD_SRC               0x07    /* timer source */
+#define TM1MD_SRC_IOCLK         0x00    /* - IOCLK */
+#define TM1MD_SRC_IOCLK_8       0x01    /* - 1/8 IOCLK */
+#define TM1MD_SRC_IOCLK_32      0x02    /* - 1/32 IOCLK */
+#define TM1MD_SRC_TM0CASCADE    0x03    /* - cascade with timer 0 */
+#define TM1MD_SRC_TM0UFLOW      0x04    /* - timer 0 underflow */
+#define TM1MD_SRC_TM2UFLOW      0x06    /* - timer 2 underflow */
+#define TM1MD_SRC_TM1IO         0x07    /* - TM1IO pin input */
+#define TM1MD_INIT_COUNTER      0x40    /* initialize TMnBC = TMnBR */
+#define TM1MD_COUNT_ENABLE      0x80    /* timer count enable */
+
+#define TM2MD                   __SYSREG(0xd4003002, u8) /* timer 2 mode register */
+#define TM2MD_SRC               0x07    /* timer source */
+#define TM2MD_SRC_IOCLK         0x00    /* - IOCLK */
+#define TM2MD_SRC_IOCLK_8       0x01    /* - 1/8 IOCLK */
+#define TM2MD_SRC_IOCLK_32      0x02    /* - 1/32 IOCLK */
+#define TM2MD_SRC_TM1CASCADE    0x03    /* - cascade with timer 1 */
+#define TM2MD_SRC_TM0UFLOW      0x04    /* - timer 0 underflow */
+#define TM2MD_SRC_TM1UFLOW      0x05    /* - timer 1 underflow */
+#define TM2MD_SRC_TM2IO         0x07    /* - TM2IO pin input */
+#define TM2MD_INIT_COUNTER      0x40    /* initialize TMnBC = TMnBR */
+#define TM2MD_COUNT_ENABLE      0x80    /* timer count enable */
+
+#define TM3MD                   __SYSREG(0xd4003003, u8) /* timer 3 mode register */
+#define TM3MD_SRC               0x07    /* timer source */
+#define TM3MD_SRC_IOCLK         0x00    /* - IOCLK */
+#define TM3MD_SRC_IOCLK_8       0x01    /* - 1/8 IOCLK */
+#define TM3MD_SRC_IOCLK_32      0x02    /* - 1/32 IOCLK */
+#define TM3MD_SRC_TM1CASCADE    0x03    /* - cascade with timer 2 */
+#define TM3MD_SRC_TM0UFLOW      0x04    /* - timer 0 underflow */
+#define TM3MD_SRC_TM1UFLOW      0x05    /* - timer 1 underflow */
+#define TM3MD_SRC_TM2UFLOW      0x06    /* - timer 2 underflow */
+#define TM3MD_SRC_TM3IO         0x07    /* - TM3IO pin input */
+#define TM3MD_INIT_COUNTER      0x40    /* initialize TMnBC = TMnBR */
+#define TM3MD_COUNT_ENABLE      0x80    /* timer count enable */
+
+#define TM01MD                  __SYSREG(0xd4003000, u16)  /* timer 0:1 mode register */
+
+#define TM0BR                   __SYSREG(0xd4003010, u8)   /* timer 0 base register */
+#define TM1BR                   __SYSREG(0xd4003011, u8)   /* timer 1 base register */
+#define TM2BR                   __SYSREG(0xd4003012, u8)   /* timer 2 base register */
+#define TM3BR                   __SYSREG(0xd4003013, u8)   /* timer 3 base register */
+#define TM01BR                  __SYSREG(0xd4003010, u16)  /* timer 0:1 base register */
+
+#define TM0BC                   __SYSREGC(0xd4003020, u8)  /* timer 0 binary counter */
+#define TM1BC                   __SYSREGC(0xd4003021, u8)  /* timer 1 binary counter */
+#define TM2BC                   __SYSREGC(0xd4003022, u8)  /* timer 2 binary counter */
+#define TM3BC                   __SYSREGC(0xd4003023, u8)  /* timer 3 binary counter */
+#define TM01BC                  __SYSREGC(0xd4003020, u16) /* timer 0:1 binary counter */
+
+#define TM0IRQ                  2       /* timer 0 IRQ */
+#define TM1IRQ                  3       /* timer 1 IRQ */
+#define TM2IRQ                  4       /* timer 2 IRQ */
+#define TM3IRQ                  5       /* timer 3 IRQ */
+
+#define TM0ICR                  GxICR(TM0IRQ)   /* timer 0 uflow intr ctrl reg */
+#define TM1ICR                  GxICR(TM1IRQ)   /* timer 1 uflow intr ctrl reg */
+#define TM2ICR                  GxICR(TM2IRQ)   /* timer 2 uflow intr ctrl reg */
+#define TM3ICR                  GxICR(TM3IRQ)   /* timer 3 uflow intr ctrl reg */
+
+/* 16-bit timers 4,5 & 7-11 */
+#define TM4MD                   __SYSREG(0xd4003080, u8)   /* timer 4 mode register */
+#define TM4MD_SRC               0x07    /* timer source */
+#define TM4MD_SRC_IOCLK         0x00    /* - IOCLK */
+#define TM4MD_SRC_IOCLK_8       0x01    /* - 1/8 IOCLK */
+#define TM4MD_SRC_IOCLK_32      0x02    /* - 1/32 IOCLK */
+#define TM4MD_SRC_TM0UFLOW      0x04    /* - timer 0 underflow */
+#define TM4MD_SRC_TM1UFLOW      0x05    /* - timer 1 underflow */
+#define TM4MD_SRC_TM2UFLOW      0x06    /* - timer 2 underflow */
+#define TM4MD_SRC_TM4IO         0x07    /* - TM4IO pin input */
+#define TM4MD_INIT_COUNTER      0x40    /* initialize TMnBC = TMnBR */
+#define TM4MD_COUNT_ENABLE      0x80    /* timer count enable */
+
+#define TM5MD                   __SYSREG(0xd4003082, u8)   /* timer 5 mode register */
+#define TM5MD_SRC               0x07    /* timer source */
+#define TM5MD_SRC_IOCLK         0x00    /* - IOCLK */
+#define TM5MD_SRC_IOCLK_8       0x01    /* - 1/8 IOCLK */
+#define TM5MD_SRC_IOCLK_32      0x02    /* - 1/32 IOCLK */
+#define TM5MD_SRC_TM4CASCADE    0x03    /* - cascade with timer 4 */
+#define TM5MD_SRC_TM0UFLOW      0x04    /* - timer 0 underflow */
+#define TM5MD_SRC_TM1UFLOW      0x05    /* - timer 1 underflow */
+#define TM5MD_SRC_TM2UFLOW      0x06    /* - timer 2 underflow */
+#define TM5MD_SRC_TM5IO         0x07    /* - TM5IO pin input */
+#define TM5MD_INIT_COUNTER      0x40    /* initialize TMnBC = TMnBR */
+#define TM5MD_COUNT_ENABLE      0x80    /* timer count enable */
+
+#define TM7MD                   __SYSREG(0xd4003086, u8)   /* timer 7 mode register */
+#define TM7MD_SRC               0x07    /* timer source */
+#define TM7MD_SRC_IOCLK         0x00    /* - IOCLK */
+#define TM7MD_SRC_IOCLK_8       0x01    /* - 1/8 IOCLK */
+#define TM7MD_SRC_IOCLK_32      0x02    /* - 1/32 IOCLK */
+#define TM7MD_SRC_TM0UFLOW      0x04    /* - timer 0 underflow */
+#define TM7MD_SRC_TM1UFLOW      0x05    /* - timer 1 underflow */
+#define TM7MD_SRC_TM2UFLOW      0x06    /* - timer 2 underflow */
+#define TM7MD_SRC_TM7IO         0x07    /* - TM7IO pin input */
+#define TM7MD_INIT_COUNTER      0x40    /* initialize TMnBC = TMnBR */
+#define TM7MD_COUNT_ENABLE      0x80    /* timer count enable */
+
+#define TM8MD                   __SYSREG(0xd4003088, u8)   /* timer 8 mode register */
+#define TM8MD_SRC               0x07    /* timer source */
+#define TM8MD_SRC_IOCLK         0x00    /* - IOCLK */
+#define TM8MD_SRC_IOCLK_8       0x01    /* - 1/8 IOCLK */
+#define TM8MD_SRC_IOCLK_32      0x02    /* - 1/32 IOCLK */
+#define TM8MD_SRC_TM7CASCADE    0x03    /* - cascade with timer 7 */
+#define TM8MD_SRC_TM0UFLOW      0x04    /* - timer 0 underflow */
+#define TM8MD_SRC_TM1UFLOW      0x05    /* - timer 1 underflow */
+#define TM8MD_SRC_TM2UFLOW      0x06    /* - timer 2 underflow */
+#define TM8MD_SRC_TM8IO         0x07    /* - TM8IO pin input */
+#define TM8MD_INIT_COUNTER      0x40    /* initialize TMnBC = TMnBR */
+#define TM8MD_COUNT_ENABLE      0x80    /* timer count enable */
+
+#define TM9MD                   __SYSREG(0xd400308a, u8)   /* timer 9 mode register */
+#define TM9MD_SRC               0x07    /* timer source */
+#define TM9MD_SRC_IOCLK         0x00    /* - IOCLK */
+#define TM9MD_SRC_IOCLK_8       0x01    /* - 1/8 IOCLK */
+#define TM9MD_SRC_IOCLK_32      0x02    /* - 1/32 IOCLK */
+#define TM9MD_SRC_TM8CASCADE    0x03    /* - cascade with timer 8 */
+#define TM9MD_SRC_TM0UFLOW      0x04    /* - timer 0 underflow */
+#define TM9MD_SRC_TM1UFLOW      0x05    /* - timer 1 underflow */
+#define TM9MD_SRC_TM2UFLOW      0x06    /* - timer 2 underflow */
+#define TM9MD_SRC_TM9IO         0x07    /* - TM9IO pin input */
+#define TM9MD_INIT_COUNTER      0x40    /* initialize TMnBC = TMnBR */
+#define TM9MD_COUNT_ENABLE      0x80    /* timer count enable */
+
+#define TM10MD                  __SYSREG(0xd400308c, u8)   /* timer 10 mode register */
+#define TM10MD_SRC              0x07    /* timer source */
+#define TM10MD_SRC_IOCLK        0x00    /* - IOCLK */
+#define TM10MD_SRC_IOCLK_8      0x01    /* - 1/8 IOCLK */
+#define TM10MD_SRC_IOCLK_32     0x02    /* - 1/32 IOCLK */
+#define TM10MD_SRC_TM9CASCADE   0x03    /* - cascade with timer 9 */
+#define TM10MD_SRC_TM0UFLOW     0x04    /* - timer 0 underflow */
+#define TM10MD_SRC_TM1UFLOW     0x05    /* - timer 1 underflow */
+#define TM10MD_SRC_TM2UFLOW     0x06    /* - timer 2 underflow */
+#define TM10MD_SRC_TM10IO       0x07    /* - TM10IO pin input */
+#define TM10MD_INIT_COUNTER     0x40    /* initialize TMnBC = TMnBR */
+#define TM10MD_COUNT_ENABLE     0x80    /* timer count enable */
+
+#define TM11MD                  __SYSREG(0xd400308e, u8)   /* timer 11 mode register */
+#define TM11MD_SRC              0x07    /* timer source */
+#define TM11MD_SRC_IOCLK        0x00    /* - IOCLK */
+#define TM11MD_SRC_IOCLK_8      0x01    /* - 1/8 IOCLK */
+#define TM11MD_SRC_IOCLK_32     0x02    /* - 1/32 IOCLK */
+#define TM11MD_SRC_TM7CASCADE   0x03    /* - cascade with timer 7 */
+#define TM11MD_SRC_TM0UFLOW     0x04    /* - timer 0 underflow */
+#define TM11MD_SRC_TM1UFLOW     0x05    /* - timer 1 underflow */
+#define TM11MD_SRC_TM2UFLOW     0x06    /* - timer 2 underflow */
+#define TM11MD_SRC_TM11IO       0x07    /* - TM11IO pin input */
+#define TM11MD_INIT_COUNTER     0x40    /* initialize TMnBC = TMnBR */
+#define TM11MD_COUNT_ENABLE     0x80    /* timer count enable */
+
+#define TM4BR                   __SYSREG(0xd4003090, u16)  /* timer 4 base register */
+#define TM5BR                   __SYSREG(0xd4003092, u16)  /* timer 5 base register */
+#define TM7BR                   __SYSREG(0xd4003096, u16)  /* timer 7 base register */
+#define TM8BR                   __SYSREG(0xd4003098, u16)  /* timer 8 base register */
+#define TM9BR                   __SYSREG(0xd400309a, u16)  /* timer 9 base register */
+#define TM10BR                  __SYSREG(0xd400309c, u16)  /* timer 10 base register */
+#define TM11BR                  __SYSREG(0xd400309e, u16)  /* timer 11 base register */
+#define TM45BR                  __SYSREG(0xd4003090, u32)  /* timer 4:5 base register */
+
+#define TM4BC                   __SYSREG(0xd40030a0, u16)  /* timer 4 binary counter */
+#define TM5BC                   __SYSREG(0xd40030a2, u16)  /* timer 5 binary counter */
+#define TM45BC                  __SYSREG(0xd40030a0, u32)  /* timer 4:5 binary counter */
+
+#define TM7BC                   __SYSREG(0xd40030a6, u16)  /* timer 7 binary counter */
+#define TM8BC                   __SYSREG(0xd40030a8, u16)  /* timer 8 binary counter */
+#define TM9BC                   __SYSREG(0xd40030aa, u16)  /* timer 9 binary counter */
+#define TM10BC                  __SYSREG(0xd40030ac, u16)  /* timer 10 binary counter */
+#define TM11BC                  __SYSREG(0xd40030ae, u16)  /* timer 11 binary counter */
+
+#define TM4IRQ                  6       /* timer 4 IRQ */
+#define TM5IRQ                  7       /* timer 5 IRQ */
+#define TM7IRQ                  11      /* timer 7 IRQ */
+#define TM8IRQ                  12      /* timer 8 IRQ */
+#define TM9IRQ                  13      /* timer 9 IRQ */
+#define TM10IRQ                 14      /* timer 10 IRQ */
+#define TM11IRQ                 15      /* timer 11 IRQ */
+
+#define TM4ICR                  GxICR(TM4IRQ)   /* timer 4 uflow intr ctrl reg */
+#define TM5ICR                  GxICR(TM5IRQ)   /* timer 5 uflow intr ctrl reg */
+#define TM7ICR                  GxICR(TM7IRQ)   /* timer 7 uflow intr ctrl reg */
+#define TM8ICR                  GxICR(TM8IRQ)   /* timer 8 uflow intr ctrl reg */
+#define TM9ICR                  GxICR(TM9IRQ)   /* timer 9 uflow intr ctrl reg */
+#define TM10ICR                 GxICR(TM10IRQ)  /* timer 10 uflow intr ctrl reg */
+#define TM11ICR                 GxICR(TM11IRQ)  /* timer 11 uflow intr ctrl reg */
+
+/* 16-bit timer 6 */
+#define TM6MD                   __SYSREG(0xd4003084, u16)  /* timer6 mode register */
+#define TM6MD_SRC               0x0007  /* timer source */
+#define TM6MD_SRC_IOCLK         0x0000  /* - IOCLK */
+#define TM6MD_SRC_IOCLK_8       0x0001  /* - 1/8 IOCLK */
+#define TM6MD_SRC_IOCLK_32      0x0002  /* - 1/32 IOCLK */
+#define TM6MD_SRC_TM0UFLOW      0x0004  /* - timer 0 underflow */
+#define TM6MD_SRC_TM1UFLOW      0x0005  /* - timer 1 underflow */
+#define TM6MD_SRC_TM6IOB_BOTH   0x0006  /* - TM6IOB pin input (both edges) */
+#define TM6MD_SRC_TM6IOB_SINGLE 0x0007  /* - TM6IOB pin input (single edge) */
+#define TM6MD_CLR_ENABLE        0x0010  /* clear count enable */
+#define TM6MD_ONESHOT_ENABLE    0x0040  /* oneshot count */
+#define TM6MD_TRIG_ENABLE       0x0080  /* TM6IOB pin trigger enable */
+#define TM6MD_PWM               0x3800  /* PWM output mode */
+#define TM6MD_PWM_DIS           0x0000  /* - disabled */
+#define TM6MD_PWM_10BIT         0x1000  /* - 10 bits mode */
+#define TM6MD_PWM_11BIT         0x1800  /* - 11 bits mode */
+#define TM6MD_PWM_12BIT         0x3000  /* - 12 bits mode */
+#define TM6MD_PWM_14BIT         0x3800  /* - 14 bits mode */
+#define TM6MD_INIT_COUNTER      0x4000  /* initialize TMnBC to zero */
+#define TM6MD_COUNT_ENABLE      0x8000  /* timer count enable */
+
+#define TM6MDA                  __SYSREG(0xd40030b4, u8)   /* timer6 cmp/cap A mode reg */
+#define TM6MDA_OUT              0x07    /* output select */
+#define TM6MDA_OUT_SETA_RESETB  0x00    /* - set at match A, reset at match B */
+#define TM6MDA_OUT_SETA_RESETOV 0x01    /* - set at match A, reset at overflow */
+#define TM6MDA_OUT_SETA         0x02    /* - set at match A */
+#define TM6MDA_OUT_RESETA       0x03    /* - reset at match A */
+#define TM6MDA_OUT_TOGGLE       0x04    /* - toggle on match A */
+#define TM6MDA_MODE             0xc0    /* compare A register mode */
+#define TM6MDA_MODE_CMP_SINGLE  0x00    /* - compare, single buffer mode */
+#define TM6MDA_MODE_CMP_DOUBLE  0x40    /* - compare, double buffer mode */
+#define TM6MDA_MODE_CAP_S_EDGE  0x80    /* - capture, single edge mode */
+#define TM6MDA_MODE_CAP_D_EDGE  0xc0    /* - capture, double edge mode */
+#define TM6MDA_EDGE             0x20    /* compare A edge select */
+#define TM6MDA_EDGE_FALLING     0x00    /* capture on falling edge */
+#define TM6MDA_EDGE_RISING      0x20    /* capture on rising edge */
+#define TM6MDA_CAPTURE_ENABLE   0x10    /* capture enable */
+
+#define TM6MDB                  __SYSREG(0xd40030b5, u8)   /* timer6 cmp/cap B mode reg */
+#define TM6MDB_OUT              0x07    /* output select */
+#define TM6MDB_OUT_SETB_RESETA  0x00    /* - set at match B, reset at match A */
+#define TM6MDB_OUT_SETB_RESETOV 0x01    /* - set at match B */
+#define TM6MDB_OUT_RESETB       0x03    /* - reset at match B */
+#define TM6MDB_OUT_TOGGLE       0x04    /* - toggle on match B */
+#define TM6MDB_MODE             0xc0    /* compare B register mode */
+#define TM6MDB_MODE_CMP_SINGLE  0x00    /* - compare, single buffer mode */
+#define TM6MDB_MODE_CMP_DOUBLE  0x40    /* - compare, double buffer mode */
+#define TM6MDB_MODE_CAP_S_EDGE  0x80    /* - capture, single edge mode */
+#define TM6MDB_MODE_CAP_D_EDGE  0xc0    /* - capture, double edge mode */
+#define TM6MDB_EDGE             0x20    /* compare B edge select */
+#define TM6MDB_EDGE_FALLING     0x00    /* capture on falling edge */
+#define TM6MDB_EDGE_RISING      0x20    /* capture on rising edge */
+#define TM6MDB_CAPTURE_ENABLE   0x10    /* capture enable */
+
+#define TM6CA                   __SYSREG(0xd40030c4, u16)   /* timer6 cmp/capture reg A */
+#define TM6CB                   __SYSREG(0xd40030d4, u16)   /* timer6 cmp/capture reg B */
+#define TM6BC                   __SYSREG(0xd40030a4, u16)   /* timer6 binary counter */
+
+#define TM6IRQ                  6       /* timer 6 IRQ */
+#define TM6AIRQ                 9       /* timer 6A IRQ */
+#define TM6BIRQ                 10      /* timer 6B IRQ */
+
+#define TM6ICR                  GxICR(TM6IRQ)   /* timer 6 uflow intr ctrl reg */
+#define TM6AICR                 GxICR(TM6AIRQ)  /* timer 6A intr control reg */
+#define TM6BICR                 GxICR(TM6BIRQ)  /* timer 6B intr control reg */
+
+#endif /* __KERNEL__ */
+
+#endif /* _ASM_TIMER_REGS_H */
diff --git a/include/asm-mn10300/timex.h b/include/asm-mn10300/timex.h
new file mode 100644
index 000000000000..3944277dab67
--- /dev/null
+++ b/include/asm-mn10300/timex.h
@@ -0,0 +1,33 @@
+/* MN10300 Architecture time management specifications
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_TIMEX_H
+#define _ASM_TIMEX_H
+
+#include <asm/hardirq.h>
+#include <asm/unit/timex.h>
+
+#define TICK_SIZE (tick_nsec / 1000)
+
+#define CLOCK_TICK_RATE 1193180 /* Underlying HZ - this should probably be set
+                                 * to something appropriate, but what? */
+
+extern cycles_t cacheflush_time;
+
+#ifdef __KERNEL__
+
+static inline cycles_t get_cycles(void)
+{
+        return read_timestamp_counter();
+}
+
+#endif /* __KERNEL__ */
+
+#endif /* _ASM_TIMEX_H */
diff --git a/include/asm-mn10300/tlb.h b/include/asm-mn10300/tlb.h
new file mode 100644
index 000000000000..65d232b96613
--- /dev/null
+++ b/include/asm-mn10300/tlb.h
@@ -0,0 +1,34 @@
+/* MN10300 TLB definitions
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+
+#ifndef _ASM_TLB_H
+#define _ASM_TLB_H
+
+#include <asm/tlbflush.h>
+
+extern void check_pgt_cache(void);
+
+/*
+ * we don't need any special per-pte or per-vma handling...
+ */
+#define tlb_start_vma(tlb, vma)                         do { } while (0)
+#define tlb_end_vma(tlb, vma)                           do { } while (0)
+#define __tlb_remove_tlb_entry(tlb, ptep, address)      do { } while (0)
+
+/*
+ * .. because we flush the whole mm when it fills up
+ */
+#define tlb_flush(tlb)  flush_tlb_mm((tlb)->mm)
+
+/* for now, just use the generic stuff */
+#include <asm-generic/tlb.h>
+
+#endif /* _ASM_TLB_H */
diff --git a/include/asm-mn10300/tlbflush.h b/include/asm-mn10300/tlbflush.h
new file mode 100644
index 000000000000..e0239865abcb
--- /dev/null
+++ b/include/asm-mn10300/tlbflush.h
@@ -0,0 +1,80 @@
+/* MN10300 TLB flushing functions
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_TLBFLUSH_H
+#define _ASM_TLBFLUSH_H
+
+#include <asm/processor.h>
+
+#define __flush_tlb()                                           \
+do {                                                            \
+        int w;                                                  \
+        __asm__ __volatile__                                    \
+                ("      mov %1,%0               \n"             \
+                 "      or %2,%0                \n"             \
+                 "      mov %0,%1               \n"             \
+                 : "=d"(w)                                      \
+                 : "m"(MMUCTR), "i"(MMUCTR_IIV|MMUCTR_DIV)      \
+                 : "memory"                                     \
+                 );                                             \
+} while (0)
+
+#define __flush_tlb_all() __flush_tlb()
+#define __flush_tlb_one(addr) __flush_tlb()
+
+
+/*
+ * TLB flushing:
+ *
+ *  - flush_tlb() flushes the current mm struct TLBs
+ *  - flush_tlb_all() flushes all processes TLBs
+ *  - flush_tlb_mm(mm) flushes the specified mm context TLB's
+ *  - flush_tlb_page(vma, vmaddr) flushes one page
+ *  - flush_tlb_range(mm, start, end) flushes a range of pages
+ *  - flush_tlb_pgtables(mm, start, end) flushes a range of page tables
+ */
+#define flush_tlb_all()                         \
+do {                                            \
+        preempt_disable();                      \
+        __flush_tlb_all();                      \
+        preempt_enable();                       \
+} while (0)
+
+#define flush_tlb_mm(mm)                        \
+do {                                            \
+        preempt_disable();                      \
+        __flush_tlb_all();                      \
+        preempt_enable();                       \
+} while (0)
+
+#define flush_tlb_range(vma, start, end)                        \
+do {                                                            \
+        unsigned long __s __attribute__((unused)) = (start);    \
+        unsigned long __e __attribute__((unused)) = (end);      \
+        preempt_disable();                                      \
+        __flush_tlb_all();                                      \
+        preempt_enable();                                       \
+} while (0)
+
+
+#define __flush_tlb_global()                    flush_tlb_all()
+#define flush_tlb()                             flush_tlb_all()
+#define flush_tlb_kernel_range(start, end)                      \
+do {                                                            \
+        unsigned long __s __attribute__((unused)) = (start);    \
+        unsigned long __e __attribute__((unused)) = (end);      \
+        flush_tlb_all();                                        \
+} while (0)
+
+extern void flush_tlb_page(struct vm_area_struct *vma, unsigned long addr);
+
+#define flush_tlb_pgtables(mm, start, end)      do {} while (0)
+
+#endif /* _ASM_TLBFLUSH_H */
diff --git a/include/asm-mn10300/topology.h b/include/asm-mn10300/topology.h
new file mode 100644
index 000000000000..5428f333a02c
--- /dev/null
+++ b/include/asm-mn10300/topology.h
@@ -0,0 +1 @@
+#include <asm-generic/topology.h>
diff --git a/include/asm-mn10300/types.h b/include/asm-mn10300/types.h
new file mode 100644
index 000000000000..d40ea7628bfc
--- /dev/null
+++ b/include/asm-mn10300/types.h
@@ -0,0 +1,67 @@
+/* MN10300 Basic type definitions
+ *
+ * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_TYPES_H
+#define _ASM_TYPES_H
+
+#ifndef __ASSEMBLY__
+
+typedef unsigned short umode_t;
+
+/*
+ * __xx is ok: it doesn't pollute the POSIX namespace. Use these in the
+ * header files exported to user space
+ */
+
+typedef __signed__ char __s8;
+typedef unsigned char __u8;
+
+typedef __signed__ short __s16;
+typedef unsigned short __u16;
+
+typedef __signed__ int __s32;
+typedef unsigned int __u32;
+
+#if defined(__GNUC__) && !defined(__STRICT_ANSI__)
+typedef __signed__ long long __s64;
+typedef unsigned long long __u64;
+#endif
+
+#endif /* __ASSEMBLY__ */
+
+/*
+ * These aren't exported outside the kernel to avoid name space clashes
+ */
+#ifdef __KERNEL__
+
+#define BITS_PER_LONG 32
+
+#ifndef __ASSEMBLY__
+
+typedef signed char s8;
+typedef unsigned char u8;
+
+typedef signed short s16;
+typedef unsigned short u16;
+
+typedef signed int s32;
+typedef unsigned int u32;
+
+typedef signed long long s64;
+typedef unsigned long long u64;
+
+/* Dma addresses are 32-bits wide.  */
+typedef u32 dma_addr_t;
+
+#endif /* __ASSEMBLY__ */
+
+#endif /* __KERNEL__ */
+
+#endif /* _ASM_TYPES_H */
diff --git a/include/asm-mn10300/uaccess.h b/include/asm-mn10300/uaccess.h
new file mode 100644
index 000000000000..46b9b647f3c3
--- /dev/null
+++ b/include/asm-mn10300/uaccess.h
@@ -0,0 +1,490 @@
+/* MN10300 userspace access functions
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_UACCESS_H
+#define _ASM_UACCESS_H
+
+/*
+ * User space memory access functions
+ */
+#include <linux/sched.h>
+#include <asm/page.h>
+#include <asm/pgtable.h>
+#include <asm/errno.h>
+
+#define VERIFY_READ 0
+#define VERIFY_WRITE 1
+
+/*
+ * The fs value determines whether argument validity checking should be
+ * performed or not.  If get_fs() == USER_DS, checking is performed, with
+ * get_fs() == KERNEL_DS, checking is bypassed.
+ *
+ * For historical reasons, these macros are grossly misnamed.
+ */
+
+#define MAKE_MM_SEG(s)  ((mm_segment_t) { (s) })
+
+#define KERNEL_XDS      MAKE_MM_SEG(0xBFFFFFFF)
+#define KERNEL_DS       MAKE_MM_SEG(0x9FFFFFFF)
+#define USER_DS         MAKE_MM_SEG(TASK_SIZE)
+
+#define get_ds()        (KERNEL_DS)
+#define get_fs()        (current_thread_info()->addr_limit)
+#define set_fs(x)       (current_thread_info()->addr_limit = (x))
+#define __kernel_ds_p() (current_thread_info()->addr_limit.seg == 0x9FFFFFFF)
+
+#define segment_eq(a, b) ((a).seg == (b).seg)
+
+#define __addr_ok(addr) \
+        ((unsigned long)(addr) < (current_thread_info()->addr_limit.seg))
+
+/*
+ * check that a range of addresses falls within the current address limit
+ */
+static inline int ___range_ok(unsigned long addr, unsigned int size)
+{
+        int flag = 1, tmp;
+
+        asm("   add     %3,%1   \n"     /* set C-flag if addr + size > 4Gb */
+            "   bcs     0f      \n"
+            "   cmp     %4,%1   \n"     /* jump if addr+size>limit (error) */
+            "   bhi     0f      \n"
+            "   clr     %0      \n"     /* mark okay */
+            "0:                 \n"
+            : "=r"(flag), "=&r"(tmp)
+            : "1"(addr), "ir"(size),
+              "r"(current_thread_info()->addr_limit.seg), "0"(flag)
+            : "cc"
+            );
+
+        return flag;
+}
+
+#define __range_ok(addr, size) ___range_ok((unsigned long)(addr), (u32)(size))
+
+#define access_ok(type, addr, size) (__range_ok((addr), (size)) == 0)
+#define __access_ok(addr, size)     (__range_ok((addr), (size)) == 0)
+
+static inline int verify_area(int type, const void *addr, unsigned long size)
+{
+        return access_ok(type, addr, size) ? 0 : -EFAULT;
+}
+
+
+/*
+ * The exception table consists of pairs of addresses: the first is the
+ * address of an instruction that is allowed to fault, and the second is
+ * the address at which the program should continue.  No registers are
+ * modified, so it is entirely up to the continuation code to figure out
+ * what to do.
+ *
+ * All the routines below use bits of fixup code that are out of line
+ * with the main instruction path.  This means when everything is well,
+ * we don't even have to jump over them.  Further, they do not intrude
+ * on our cache or tlb entries.
+ */
+
+struct exception_table_entry
+{
+        unsigned long insn, fixup;
+};
+
+/* Returns 0 if exception not found and fixup otherwise.  */
+extern int fixup_exception(struct pt_regs *regs);
+
+#define put_user(x, ptr) __put_user_check((x), (ptr), sizeof(*(ptr)))
+#define get_user(x, ptr) __get_user_check((x), (ptr), sizeof(*(ptr)))
+
+/*
+ * The "__xxx" versions do not do address space checking, useful when
+ * doing multiple accesses to the same area (the user has to do the
+ * checks by hand with "access_ok()")
+ */
+#define __put_user(x, ptr) __put_user_nocheck((x), (ptr), sizeof(*(ptr)))
+#define __get_user(x, ptr) __get_user_nocheck((x), (ptr), sizeof(*(ptr)))
+
+/*
+ * The "xxx_ret" versions return constant specified in third argument, if
+ * something bad happens. These macros can be optimized for the
+ * case of just returning from the function xxx_ret is used.
+ */
+
+#define put_user_ret(x, ptr, ret) \
+        ({ if (put_user((x), (ptr)))    return (ret); })
+#define get_user_ret(x, ptr, ret) \
+        ({ if (get_user((x), (ptr)))    return (ret); })
+#define __put_user_ret(x, ptr, ret) \
+        ({ if (__put_user((x), (ptr)))  return (ret); })
+#define __get_user_ret(x, ptr, ret) \
+        ({ if (__get_user((x), (ptr)))  return (ret); })
+
+struct __large_struct { unsigned long buf[100]; };
+#define __m(x) (*(struct __large_struct *)(x))
+
+#define __get_user_nocheck(x, ptr, size)        \
+({                                              \
+        __typeof(*(ptr)) __gu_val;              \
+        unsigned long __gu_addr;                \
+        int __gu_err;                           \
+        __gu_addr = (unsigned long) (ptr);      \
+        switch (size) {                         \
+        case 1:  __get_user_asm("bu"); break;   \
+        case 2:  __get_user_asm("hu"); break;   \
+        case 4:  __get_user_asm(""  ); break;   \
+        default: __get_user_unknown(); break;   \
+        }                                       \
+        x = (__typeof__(*(ptr))) __gu_val;      \
+        __gu_err;                               \
+})
+
+#define __get_user_check(x, ptr, size)                  \
+({                                                      \
+        __typeof__(*(ptr)) __gu_val;                    \
+        unsigned long __gu_addr;                        \
+        int __gu_err;                                   \
+        __gu_addr = (unsigned long) (ptr);              \
+        if (likely(__access_ok(__gu_addr,size))) {      \
+                switch (size) {                         \
+                case 1:  __get_user_asm("bu"); break;   \
+                case 2:  __get_user_asm("hu"); break;   \
+                case 4:  __get_user_asm(""  ); break;   \
+                default: __get_user_unknown(); break;   \
+                }                                       \
+        }                                               \
+        else {                                          \
+                __gu_err = -EFAULT;                     \
+                __gu_val = 0;                           \
+        }                                               \
+        x = (__typeof__(*(ptr))) __gu_val;              \
+        __gu_err;                                       \
+})
+
+#define __get_user_asm(INSN)                                    \
+({                                                              \
+        asm volatile(                                   \
+                "1:\n"                                          \
+                "       mov"INSN"       %2,%1\n"                \
+                "       mov             0,%0\n"                 \
+                "2:\n"                                          \
+                "       .section        .fixup,\"ax\"\n"        \
+                "3:\n\t"                                        \
+                "       mov             %3,%0\n"                \
+                "       jmp             2b\n"                   \
+                "       .previous\n"                            \
+                "       .section        __ex_table,\"a\"\n"     \
+                "       .balign         4\n"                    \
+                "       .long           1b, 3b\n"               \
+                "       .previous"                              \
+                : "=&r" (__gu_err), "=&r" (__gu_val)            \
+                : "m" (__m(__gu_addr)), "i" (-EFAULT));         \
+})
+
+extern int __get_user_unknown(void);
+
+#define __put_user_nocheck(x, ptr, size)                        \
+({                                                              \
+        union {                                                 \
+                __typeof__(*(ptr)) val;                         \
+                u32 bits[2];                                    \
+        } __pu_val;                                             \
+        unsigned long __pu_addr;                                \
+        int __pu_err;                                           \
+        __pu_val.val = (x);                                     \
+        __pu_addr = (unsigned long) (ptr);                      \
+        switch (size) {                                         \
+        case 1:  __put_user_asm("bu"); break;                   \
+        case 2:  __put_user_asm("hu"); break;                   \
+        case 4:  __put_user_asm(""  ); break;                   \
+        case 8:  __put_user_asm8();    break;                   \
+        default: __pu_err = __put_user_unknown(); break;        \
+        }                                                       \
+        __pu_err;                                               \
+})
+
+#define __put_user_check(x, ptr, size)                                  \
+({                                                                      \
+        union {                                                         \
+                __typeof__(*(ptr)) val;                                 \
+                u32 bits[2];                                            \
+        } __pu_val;                                                     \
+        unsigned long __pu_addr;                                        \
+        int __pu_err;                                                   \
+        __pu_val.val = (x);                                             \
+        __pu_addr = (unsigned long) (ptr);                              \
+        if (likely(__access_ok(__pu_addr, size))) {                     \
+                switch (size) {                                         \
+                case 1:  __put_user_asm("bu"); break;                   \
+                case 2:  __put_user_asm("hu"); break;                   \
+                case 4:  __put_user_asm(""  ); break;                   \
+                case 8:  __put_user_asm8();    break;                   \
+                default: __pu_err = __put_user_unknown(); break;        \
+                }                                                       \
+        }                                                               \
+        else {                                                          \
+                __pu_err = -EFAULT;                                     \
+        }                                                               \
+        __pu_err;                                                       \
+})
+
+#define __put_user_asm(INSN)                                    \
+({                                                              \
+        asm volatile(                                           \
+                "1:\n"                                          \
+                "       mov"INSN"       %1,%2\n"                \
+                "       mov             0,%0\n"                 \
+                "2:\n"                                          \
+                "       .section        .fixup,\"ax\"\n"        \
+                "3:\n"                                          \
+                "       mov             %3,%0\n"                \
+                "       jmp             2b\n"                   \
+                "       .previous\n"                            \
+                "       .section        __ex_table,\"a\"\n"     \
+                "       .balign         4\n"                    \
+                "       .long           1b, 3b\n"               \
+                "       .previous"                              \
+                : "=&r" (__pu_err)                              \
+                : "r" (__pu_val.val), "m" (__m(__pu_addr)),     \
+                  "i" (-EFAULT)                                 \
+                );                                              \
+})
+
+#define __put_user_asm8()                                               \
+({                                                                      \
+        asm volatile(                                                   \
+                "1:     mov             %1,%3           \n"             \
+                "2:     mov             %2,%4           \n"             \
+                "       mov             0,%0            \n"             \
+                "3:                                     \n"             \
+                "       .section        .fixup,\"ax\"   \n"             \
+                "4:                                     \n"             \
+                "       mov             %5,%0           \n"             \
+                "       jmp             2b              \n"             \
+                "       .previous                       \n"             \
+                "       .section        __ex_table,\"a\"\n"             \
+                "       .balign         4               \n"             \
+                "       .long           1b, 4b          \n"             \
+                "       .long           2b, 4b          \n"             \
+                "       .previous                       \n"             \
+                : "=&r" (__pu_err)                                      \
+                : "r" (__pu_val.bits[0]), "r" (__pu_val.bits[1]),       \
+                  "m" (__m(__pu_addr)), "m" (__m(__pu_addr+4)),         \
+                  "i" (-EFAULT)                                         \
+                );                                                      \
+})
+
+extern int __put_user_unknown(void);
+
+
+/*
+ * Copy To/From Userspace
+ */
+/* Generic arbitrary sized copy.  */
+#define __copy_user(to, from, size)                                     \
+do {                                                                    \
+        if (size) {                                                     \
+                void *__to = to;                                        \
+                const void *__from = from;                              \
+                int w;                                                  \
+                asm volatile(                                           \
+                        "0:     movbu   (%0),%3;\n"                     \
+                        "1:     movbu   %3,(%1);\n"                     \
+                        "       inc     %0;\n"                          \
+                        "       inc     %1;\n"                          \
+                        "       add     -1,%2;\n"                       \
+                        "       bne     0b;\n"                          \
+                        "2:\n"                                          \
+                        "       .section .fixup,\"ax\"\n"               \
+                        "3:     jmp     2b\n"                           \
+                        "       .previous\n"                            \
+                        "       .section __ex_table,\"a\"\n"            \
+                        "       .balign 4\n"                            \
+                        "       .long   0b,3b\n"                        \
+                        "       .long   1b,3b\n"                        \
+                        "       .previous\n"                            \
+                        : "=a"(__from), "=a"(__to), "=r"(size), "=&r"(w)\
+                        : "0"(__from), "1"(__to), "2"(size)             \
+                        : "memory");                                    \
+        }                                                               \
+} while (0)
+
+#define __copy_user_zeroing(to, from, size)                             \
+do {                                                                    \
+        if (size) {                                                     \
+                void *__to = to;                                        \
+                const void *__from = from;                              \
+                int w;                                                  \
+                asm volatile(                                           \
+                        "0:     movbu   (%0),%3;\n"                     \
+                        "1:     movbu   %3,(%1);\n"                     \
+                        "       inc     %0;\n"                          \
+                        "       inc     %1;\n"                          \
+                        "       add     -1,%2;\n"                       \
+                        "       bne     0b;\n"                          \
+                        "2:\n"                                          \
+                        "       .section .fixup,\"ax\"\n"               \
+                        "3:\n"                                          \
+                        "       mov     %2,%0\n"                        \
+                        "       clr     %3\n"                           \
+                        "4:     movbu   %3,(%1);\n"                     \
+                        "       inc     %1;\n"                          \
+                        "       add     -1,%2;\n"                       \
+                        "       bne     4b;\n"                          \
+                        "       mov     %0,%2\n"                        \
+                        "       jmp     2b\n"                           \
+                        "       .previous\n"                            \
+                        "       .section __ex_table,\"a\"\n"            \
+                        "       .balign 4\n"                            \
+                        "       .long   0b,3b\n"                        \
+                        "       .long   1b,3b\n"                        \
+                        "       .previous\n"                            \
+                        : "=a"(__from), "=a"(__to), "=r"(size), "=&r"(w)\
+                        : "0"(__from), "1"(__to), "2"(size)             \
+                        : "memory");                                    \
+        }                                                               \
+} while (0)
+
+/* We let the __ versions of copy_from/to_user inline, because they're often
+ * used in fast paths and have only a small space overhead.
+ */
+static inline
+unsigned long __generic_copy_from_user_nocheck(void *to, const void *from,
+                                               unsigned long n)
+{
+        __copy_user_zeroing(to, from, n);
+        return n;
+}
+
+static inline
+unsigned long __generic_copy_to_user_nocheck(void *to, const void *from,
+                                             unsigned long n)
+{
+        __copy_user(to, from, n);
+        return n;
+}
+
+
+#if 0
+#error don't use - these macros don't increment to & from pointers
+/* Optimize just a little bit when we know the size of the move. */
+#define __constant_copy_user(to, from, size)    \
+do {                                            \
+        asm volatile(                           \
+                "       mov %0,a0;\n"           \
+                "0:     movbu (%1),d3;\n"       \
+                "1:     movbu d3,(%2);\n"       \
+                "       add -1,a0;\n"           \
+                "       bne 0b;\n"              \
+                "2:;"                           \
+                ".section .fixup,\"ax\"\n"      \
+                "3:     jmp 2b\n"               \
+                ".previous\n"                   \
+                ".section __ex_table,\"a\"\n"   \
+                "       .balign 4\n"            \
+                "       .long 0b,3b\n"          \
+                "       .long 1b,3b\n"          \
+                ".previous"                     \
+                :                               \
+                : "d"(size), "d"(to), "d"(from) \
+                : "d3", "a0");                  \
+} while (0)
+
+/* Optimize just a little bit when we know the size of the move. */
+#define __constant_copy_user_zeroing(to, from, size)    \
+do {                                                    \
+        asm volatile(                                   \
+                "       mov %0,a0;\n"                   \
+                "0:     movbu (%1),d3;\n"               \
+                "1:     movbu d3,(%2);\n"               \
+                "       add -1,a0;\n"                   \
+                "       bne 0b;\n"                      \
+                "2:;"                                   \
+                ".section .fixup,\"ax\"\n"              \
+                "3:     jmp 2b\n"                       \
+                ".previous\n"                           \
+                ".section __ex_table,\"a\"\n"           \
+                "       .balign 4\n"                    \
+                "       .long 0b,3b\n"                  \
+                "       .long 1b,3b\n"                  \
+                ".previous"                             \
+                :                                       \
+                : "d"(size), "d"(to), "d"(from)         \
+                : "d3", "a0");                          \
+} while (0)
+
+static inline
+unsigned long __constant_copy_to_user(void *to, const void *from,
+                                      unsigned long n)
+{
+        if (access_ok(VERIFY_WRITE, to, n))
+                __constant_copy_user(to, from, n);
+        return n;
+}
+
+static inline
+unsigned long __constant_copy_from_user(void *to, const void *from,
+                                        unsigned long n)
+{
+        if (access_ok(VERIFY_READ, from, n))
+                __constant_copy_user_zeroing(to, from, n);
+        return n;
+}
+
+static inline
+unsigned long __constant_copy_to_user_nocheck(void *to, const void *from,
+                                              unsigned long n)
+{
+        __constant_copy_user(to, from, n);
+        return n;
+}
+
+static inline
+unsigned long __constant_copy_from_user_nocheck(void *to, const void *from,
+                                                unsigned long n)
+{
+        __constant_copy_user_zeroing(to, from, n);
+        return n;
+}
+#endif
+
+extern unsigned long __generic_copy_to_user(void __user *, const void *,
+                                            unsigned long);
+extern unsigned long __generic_copy_from_user(void *, const void __user *,
+                                              unsigned long);
+
+#define __copy_to_user_inatomic(to, from, n) \
+        __generic_copy_to_user_nocheck((to), (from), (n))
+#define __copy_from_user_inatomic(to, from, n) \
+        __generic_copy_from_user_nocheck((to), (from), (n))
+
+#define __copy_to_user(to, from, n)                     \
+({                                                      \
+        might_sleep();                                  \
+        __copy_to_user_inatomic((to), (from), (n));     \
+})
+
+#define __copy_from_user(to, from, n)                   \
+({                                                      \
+        might_sleep();                                  \
+        __copy_from_user_inatomic((to), (from), (n));   \
+})
+
+
+#define copy_to_user(to, from, n)   __generic_copy_to_user((to), (from), (n))
+#define copy_from_user(to, from, n) __generic_copy_from_user((to), (from), (n))
+
+extern long strncpy_from_user(char *dst, const char __user *src, long count);
+extern long __strncpy_from_user(char *dst, const char __user *src, long count);
+extern long strnlen_user(const char __user *str, long n);
+#define strlen_user(str) strnlen_user(str, ~0UL >> 1)
+extern unsigned long clear_user(void __user *mem, unsigned long len);
+extern unsigned long __clear_user(void __user *mem, unsigned long len);
+
+#endif /* _ASM_UACCESS_H */
diff --git a/include/asm-mn10300/ucontext.h b/include/asm-mn10300/ucontext.h
new file mode 100644
index 000000000000..fcab5c1d8e18
--- /dev/null
+++ b/include/asm-mn10300/ucontext.h
@@ -0,0 +1,22 @@
+/* MN10300 User context
+ *
+ * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_UCONTEXT_H
+#define _ASM_UCONTEXT_H
+
+struct ucontext {
+        unsigned long     uc_flags;
+        struct ucontext  *uc_link;
+        stack_t           uc_stack;
+        struct sigcontext uc_mcontext;
+        sigset_t          uc_sigmask;   /* mask last for extensibility */
+};
+
+#endif /* _ASM_UCONTEXT_H */
diff --git a/include/asm-mn10300/unaligned.h b/include/asm-mn10300/unaligned.h
new file mode 100644
index 000000000000..cad3afbd035f
--- /dev/null
+++ b/include/asm-mn10300/unaligned.h
@@ -0,0 +1,136 @@
+/* MN10300 Unaligned memory access handling
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_UNALIGNED_H
+#define _ASM_UNALIGNED_H
+
+#include <asm/types.h>
+
+#if 0
+extern int __bug_unaligned_x(void *ptr);
+
+/*
+ * What is the most efficient way of loading/storing an unaligned value?
+ *
+ * That is the subject of this file.  Efficiency here is defined as
+ * minimum code size with minimum register usage for the common cases.
+ * It is currently not believed that long longs are common, so we
+ * trade efficiency for the chars, shorts and longs against the long
+ * longs.
+ *
+ * Current stats with gcc 2.7.2.2 for these functions:
+ *
+ *      ptrsize get:    code    regs    put:    code    regs
+ *      1               1       1               1       2
+ *      2               3       2               3       2
+ *      4               7       3               7       3
+ *      8               20      6               16      6
+ *
+ * gcc 2.95.1 seems to code differently:
+ *
+ *      ptrsize get:    code    regs    put:    code    regs
+ *      1               1       1               1       2
+ *      2               3       2               3       2
+ *      4               7       4               7       4
+ *      8               19      8               15      6
+ *
+ * which may or may not be more efficient (depending upon whether
+ * you can afford the extra registers).  Hopefully the gcc 2.95
+ * is inteligent enough to decide if it is better to use the
+ * extra register, but evidence so far seems to suggest otherwise.
+ *
+ * Unfortunately, gcc is not able to optimise the high word
+ * out of long long >> 32, or the low word from long long << 32
+ */
+
+#define __get_unaligned_2(__p)                                  \
+        (__p[0] | __p[1] << 8)
+
+#define __get_unaligned_4(__p)                                  \
+        (__p[0] | __p[1] << 8 | __p[2] << 16 | __p[3] << 24)
+
+#define get_unaligned(ptr)                                      \
+({                                                              \
+        unsigned int __v1, __v2;                                \
+        __typeof__(*(ptr)) __v;                                 \
+        __u8 *__p = (__u8 *)(ptr);                              \
+                                                                \
+        switch (sizeof(*(ptr))) {                               \
+        case 1: __v = *(ptr);                   break;          \
+        case 2: __v = __get_unaligned_2(__p);   break;          \
+        case 4: __v = __get_unaligned_4(__p);   break;          \
+        case 8:                                                 \
+                __v2 = __get_unaligned_4((__p+4));              \
+                __v1 = __get_unaligned_4(__p);                  \
+                __v = ((unsigned long long)__v2 << 32 | __v1);  \
+                break;                                          \
+        default: __v = __bug_unaligned_x(__p);  break;          \
+        }                                                       \
+        __v;                                                    \
+})
+
+
+static inline void __put_unaligned_2(__u32 __v, register __u8 *__p)
+{
+        *__p++ = __v;
+        *__p++ = __v >> 8;
+}
+
+static inline void __put_unaligned_4(__u32 __v, register __u8 *__p)
+{
+        __put_unaligned_2(__v >> 16, __p + 2);
+        __put_unaligned_2(__v, __p);
+}
+
+static inline void __put_unaligned_8(const unsigned long long __v, __u8 *__p)
+{
+        /*
+         * tradeoff: 8 bytes of stack for all unaligned puts (2
+         * instructions), or an extra register in the long long
+         * case - go for the extra register.
+         */
+        __put_unaligned_4(__v >> 32, __p + 4);
+        __put_unaligned_4(__v, __p);
+}
+
+/*
+ * Try to store an unaligned value as efficiently as possible.
+ */
+#define put_unaligned(val, ptr)                                         \
+        ({                                                              \
+                switch (sizeof(*(ptr))) {                               \
+                case 1:                                                 \
+                        *(ptr) = (val);                                 \
+                        break;                                          \
+                case 2:                                                 \
+                        __put_unaligned_2((val), (__u8 *)(ptr));        \
+                        break;                                          \
+                case 4:                                                 \
+                        __put_unaligned_4((val), (__u8 *)(ptr));        \
+                        break;                                          \
+                case 8:                                                 \
+                        __put_unaligned_8((val), (__u8 *)(ptr));        \
+                        break;                                          \
+                default:                                                \
+                        __bug_unaligned_x(ptr);                         \
+                        break;                                          \
+                }                                                       \
+                (void) 0;                                               \
+        })
+
+
+#else
+
+#define get_unaligned(ptr) (*(ptr))
+#define put_unaligned(val, ptr) ({ *(ptr) = (val); (void) 0; })
+
+#endif
+
+#endif
diff --git a/include/asm-mn10300/unistd.h b/include/asm-mn10300/unistd.h
new file mode 100644
index 000000000000..3721aa9e195d
--- /dev/null
+++ b/include/asm-mn10300/unistd.h
@@ -0,0 +1,384 @@
+/* MN10300 System call number list
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_UNISTD_H
+#define _ASM_UNISTD_H
+
+#define __NR_restart_syscall      0
+#define __NR_exit                 1
+#define __NR_fork                 2
+#define __NR_read                 3
+#define __NR_write                4
+#define __NR_open                 5
+#define __NR_close                6
+#define __NR_waitpid              7
+#define __NR_creat                8
+#define __NR_link                 9
+#define __NR_unlink              10
+#define __NR_execve              11
+#define __NR_chdir               12
+#define __NR_time                13
+#define __NR_mknod               14
+#define __NR_chmod               15
+#define __NR_lchown              16
+#define __NR_break               17
+#define __NR_oldstat             18
+#define __NR_lseek               19
+#define __NR_getpid              20
+#define __NR_mount               21
+#define __NR_umount              22
+#define __NR_setuid              23
+#define __NR_getuid              24
+#define __NR_stime               25
+#define __NR_ptrace              26
+#define __NR_alarm               27
+#define __NR_oldfstat            28
+#define __NR_pause               29
+#define __NR_utime               30
+#define __NR_stty                31
+#define __NR_gtty                32
+#define __NR_access              33
+#define __NR_nice                34
+#define __NR_ftime               35
+#define __NR_sync                36
+#define __NR_kill                37
+#define __NR_rename              38
+#define __NR_mkdir               39
+#define __NR_rmdir               40
+#define __NR_dup                 41
+#define __NR_pipe                42
+#define __NR_times               43
+#define __NR_prof                44
+#define __NR_brk                 45
+#define __NR_setgid              46
+#define __NR_getgid              47
+#define __NR_signal              48
+#define __NR_geteuid             49
+#define __NR_getegid             50
+#define __NR_acct                51
+#define __NR_umount2             52
+#define __NR_lock                53
+#define __NR_ioctl               54
+#define __NR_fcntl               55
+#define __NR_mpx                 56
+#define __NR_setpgid             57
+#define __NR_ulimit              58
+#define __NR_oldolduname         59
+#define __NR_umask               60
+#define __NR_chroot              61
+#define __NR_ustat               62
+#define __NR_dup2                63
+#define __NR_getppid             64
+#define __NR_getpgrp             65
+#define __NR_setsid              66
+#define __NR_sigaction           67
+#define __NR_sgetmask            68
+#define __NR_ssetmask            69
+#define __NR_setreuid            70
+#define __NR_setregid            71
+#define __NR_sigsuspend          72
+#define __NR_sigpending          73
+#define __NR_sethostname         74
+#define __NR_setrlimit           75
+#define __NR_getrlimit           76     /* Back compatible 2Gig limited rlimit */
+#define __NR_getrusage           77
+#define __NR_gettimeofday        78
+#define __NR_settimeofday        79
+#define __NR_getgroups           80
+#define __NR_setgroups           81
+#define __NR_select              82
+#define __NR_symlink             83
+#define __NR_oldlstat            84
+#define __NR_readlink            85
+#define __NR_uselib              86
+#define __NR_swapon              87
+#define __NR_reboot              88
+#define __NR_readdir             89
+#define __NR_mmap                90
+#define __NR_munmap              91
+#define __NR_truncate            92
+#define __NR_ftruncate           93
+#define __NR_fchmod              94
+#define __NR_fchown              95
+#define __NR_getpriority         96
+#define __NR_setpriority         97
+#define __NR_profil              98
+#define __NR_statfs              99
+#define __NR_fstatfs            100
+#define __NR_ioperm             101
+#define __NR_socketcall         102
+#define __NR_syslog             103
+#define __NR_setitimer          104
+#define __NR_getitimer          105
+#define __NR_stat               106
+#define __NR_lstat              107
+#define __NR_fstat              108
+#define __NR_olduname           109
+#define __NR_iopl               110
+#define __NR_vhangup            111
+#define __NR_idle               112
+#define __NR_vm86old            113
+#define __NR_wait4              114
+#define __NR_swapoff            115
+#define __NR_sysinfo            116
+#define __NR_ipc                117
+#define __NR_fsync              118
+#define __NR_sigreturn          119
+#define __NR_clone              120
+#define __NR_setdomainname      121
+#define __NR_uname              122
+#define __NR_modify_ldt         123
+#define __NR_adjtimex           124
+#define __NR_mprotect           125
+#define __NR_sigprocmask        126
+#define __NR_create_module      127
+#define __NR_init_module        128
+#define __NR_delete_module      129
+#define __NR_get_kernel_syms    130
+#define __NR_quotactl           131
+#define __NR_getpgid            132
+#define __NR_fchdir             133
+#define __NR_bdflush            134
+#define __NR_sysfs              135
+#define __NR_personality        136
+#define __NR_afs_syscall        137 /* Syscall for Andrew File System */
+#define __NR_setfsuid           138
+#define __NR_setfsgid           139
+#define __NR__llseek            140
+#define __NR_getdents           141
+#define __NR__newselect         142
+#define __NR_flock              143
+#define __NR_msync              144
+#define __NR_readv              145
+#define __NR_writev             146
+#define __NR_getsid             147
+#define __NR_fdatasync          148
+#define __NR__sysctl            149
+#define __NR_mlock              150
+#define __NR_munlock            151
+#define __NR_mlockall           152
+#define __NR_munlockall         153
+#define __NR_sched_setparam             154
+#define __NR_sched_getparam             155
+#define __NR_sched_setscheduler         156
+#define __NR_sched_getscheduler         157
+#define __NR_sched_yield                158
+#define __NR_sched_get_priority_max     159
+#define __NR_sched_get_priority_min     160
+#define __NR_sched_rr_get_interval      161
+#define __NR_nanosleep          162
+#define __NR_mremap             163
+#define __NR_setresuid          164
+#define __NR_getresuid          165
+#define __NR_vm86               166
+#define __NR_query_module       167
+#define __NR_poll               168
+#define __NR_nfsservctl         169
+#define __NR_setresgid          170
+#define __NR_getresgid          171
+#define __NR_prctl              172
+#define __NR_rt_sigreturn       173
+#define __NR_rt_sigaction       174
+#define __NR_rt_sigprocmask     175
+#define __NR_rt_sigpending      176
+#define __NR_rt_sigtimedwait    177
+#define __NR_rt_sigqueueinfo    178
+#define __NR_rt_sigsuspend      179
+#define __NR_pread64            180
+#define __NR_pwrite64           181
+#define __NR_chown              182
+#define __NR_getcwd             183
+#define __NR_capget             184
+#define __NR_capset             185
+#define __NR_sigaltstack        186
+#define __NR_sendfile           187
+#define __NR_getpmsg            188     /* some people actually want streams */
+#define __NR_putpmsg            189     /* some people actually want streams */
+#define __NR_vfork              190
+#define __NR_ugetrlimit         191     /* SuS compliant getrlimit */
+#define __NR_mmap2              192
+#define __NR_truncate64         193
+#define __NR_ftruncate64        194
+#define __NR_stat64             195
+#define __NR_lstat64            196
+#define __NR_fstat64            197
+#define __NR_lchown32           198
+#define __NR_getuid32           199
+#define __NR_getgid32           200
+#define __NR_geteuid32          201
+#define __NR_getegid32          202
+#define __NR_setreuid32         203
+#define __NR_setregid32         204
+#define __NR_getgroups32        205
+#define __NR_setgroups32        206
+#define __NR_fchown32           207
+#define __NR_setresuid32        208
+#define __NR_getresuid32        209
+#define __NR_setresgid32        210
+#define __NR_getresgid32        211
+#define __NR_chown32            212
+#define __NR_setuid32           213
+#define __NR_setgid32           214
+#define __NR_setfsuid32         215
+#define __NR_setfsgid32         216
+#define __NR_pivot_root         217
+#define __NR_mincore            218
+#define __NR_madvise            219
+#define __NR_madvise1           219     /* delete when C lib stub is removed */
+#define __NR_getdents64         220
+#define __NR_fcntl64            221
+/* 223 is unused */
+#define __NR_gettid             224
+#define __NR_readahead          225
+#define __NR_setxattr           226
+#define __NR_lsetxattr          227
+#define __NR_fsetxattr          228
+#define __NR_getxattr           229
+#define __NR_lgetxattr          230
+#define __NR_fgetxattr          231
+#define __NR_listxattr          232
+#define __NR_llistxattr         233
+#define __NR_flistxattr         234
+#define __NR_removexattr        235
+#define __NR_lremovexattr       236
+#define __NR_fremovexattr       237
+#define __NR_tkill              238
+#define __NR_sendfile64         239
+#define __NR_futex              240
+#define __NR_sched_setaffinity  241
+#define __NR_sched_getaffinity  242
+#define __NR_set_thread_area    243
+#define __NR_get_thread_area    244
+#define __NR_io_setup           245
+#define __NR_io_destroy         246
+#define __NR_io_getevents       247
+#define __NR_io_submit          248
+#define __NR_io_cancel          249
+#define __NR_fadvise64          250
+
+#define __NR_exit_group         252
+#define __NR_lookup_dcookie     253
+#define __NR_epoll_create       254
+#define __NR_epoll_ctl          255
+#define __NR_epoll_wait         256
+#define __NR_remap_file_pages   257
+#define __NR_set_tid_address    258
+#define __NR_timer_create       259
+#define __NR_timer_settime      (__NR_timer_create+1)
+#define __NR_timer_gettime      (__NR_timer_create+2)
+#define __NR_timer_getoverrun   (__NR_timer_create+3)
+#define __NR_timer_delete       (__NR_timer_create+4)
+#define __NR_clock_settime      (__NR_timer_create+5)
+#define __NR_clock_gettime      (__NR_timer_create+6)
+#define __NR_clock_getres       (__NR_timer_create+7)
+#define __NR_clock_nanosleep    (__NR_timer_create+8)
+#define __NR_statfs64           268
+#define __NR_fstatfs64          269
+#define __NR_tgkill             270
+#define __NR_utimes             271
+#define __NR_fadvise64_64       272
+#define __NR_vserver            273
+#define __NR_mbind              274
+#define __NR_get_mempolicy      275
+#define __NR_set_mempolicy      276
+#define __NR_mq_open            277
+#define __NR_mq_unlink          (__NR_mq_open+1)
+#define __NR_mq_timedsend       (__NR_mq_open+2)
+#define __NR_mq_timedreceive    (__NR_mq_open+3)
+#define __NR_mq_notify          (__NR_mq_open+4)
+#define __NR_mq_getsetattr      (__NR_mq_open+5)
+#define __NR_kexec_load         283
+#define __NR_waitid             284
+#define __NR_add_key            286
+#define __NR_request_key        287
+#define __NR_keyctl             288
+#define __NR_cacheflush         289
+#define __NR_ioprio_set         290
+#define __NR_ioprio_get         291
+#define __NR_inotify_init       292
+#define __NR_inotify_add_watch  293
+#define __NR_inotify_rm_watch   294
+#define __NR_migrate_pages      295
+#define __NR_openat             296
+#define __NR_mkdirat            297
+#define __NR_mknodat            298
+#define __NR_fchownat           299
+#define __NR_futimesat          300
+#define __NR_fstatat64          301
+#define __NR_unlinkat           302
+#define __NR_renameat           303
+#define __NR_linkat             304
+#define __NR_symlinkat          305
+#define __NR_readlinkat         306
+#define __NR_fchmodat           307
+#define __NR_faccessat          308
+#define __NR_pselect6           309
+#define __NR_ppoll              310
+#define __NR_unshare            311
+#define __NR_set_robust_list    312
+#define __NR_get_robust_list    313
+#define __NR_splice             314
+#define __NR_sync_file_range    315
+#define __NR_tee                316
+#define __NR_vmsplice           317
+#define __NR_move_pages         318
+#define __NR_getcpu             319
+#define __NR_epoll_pwait        320
+#define __NR_utimensat          321
+#define __NR_signalfd           322
+#define __NR_timerfd_create     323
+#define __NR_eventfd            324
+#define __NR_fallocate          325
+#define __NR_timerfd_settime    326
+#define __NR_timerfd_gettime    327
+
+#ifdef __KERNEL__
+
+#define NR_syscalls 326
+
+/*
+ * specify the deprecated syscalls we want to support on this arch
+ */
+#define __ARCH_WANT_IPC_PARSE_VERSION
+#define __ARCH_WANT_OLD_READDIR
+#define __ARCH_WANT_OLD_STAT
+#define __ARCH_WANT_STAT64
+#define __ARCH_WANT_SYS_ALARM
+#define __ARCH_WANT_SYS_GETHOSTNAME
+#define __ARCH_WANT_SYS_PAUSE
+#define __ARCH_WANT_SYS_SGETMASK
+#define __ARCH_WANT_SYS_SIGNAL
+#define __ARCH_WANT_SYS_TIME
+#define __ARCH_WANT_SYS_UTIME
+#define __ARCH_WANT_SYS_WAITPID
+#define __ARCH_WANT_SYS_SOCKETCALL
+#define __ARCH_WANT_SYS_FADVISE64
+#define __ARCH_WANT_SYS_GETPGRP
+#define __ARCH_WANT_SYS_LLSEEK
+#define __ARCH_WANT_SYS_NICE
+#define __ARCH_WANT_SYS_OLD_GETRLIMIT
+#define __ARCH_WANT_SYS_OLDUMOUNT
+#define __ARCH_WANT_SYS_SIGPENDING
+#define __ARCH_WANT_SYS_SIGPROCMASK
+#define __ARCH_WANT_SYS_RT_SIGACTION
+#define __ARCH_WANT_SYS_RT_SIGSUSPEND
+
+/*
+ * "Conditional" syscalls
+ *
+ * What we want is __attribute__((weak,alias("sys_ni_syscall"))),
+ * but it doesn't work on all toolchains, so we just do it by hand
+ */
+#ifndef cond_syscall
+#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall");
+#endif
+
+#endif /* __KERNEL__ */
+#endif /* _ASM_UNISTD_H */
diff --git a/include/asm-mn10300/unit-asb2303/clock.h b/include/asm-mn10300/unit-asb2303/clock.h
new file mode 100644
index 000000000000..8b450e920af1
--- /dev/null
+++ b/include/asm-mn10300/unit-asb2303/clock.h
@@ -0,0 +1,45 @@
+/* ASB2303-specific clocks
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+
+#ifndef _ASM_UNIT_CLOCK_H
+#define _ASM_UNIT_CLOCK_H
+
+#ifndef __ASSEMBLY__
+
+#ifdef CONFIG_MN10300_RTC
+
+extern unsigned long mn10300_ioclk;     /* IOCLK (crystal speed) in HZ */
+extern unsigned long mn10300_iobclk;
+extern unsigned long mn10300_tsc_per_HZ;
+
+#define MN10300_IOCLK           ((unsigned long)mn10300_ioclk)
+/* If this processors has a another clock, uncomment the below. */
+/* #define MN10300_IOBCLK       ((unsigned long)mn10300_iobclk) */
+
+#else /* !CONFIG_MN10300_RTC */
+
+#define MN10300_IOCLK           33333333UL
+/* #define MN10300_IOBCLK       66666666UL */
+
+#endif /* !CONFIG_MN10300_RTC */
+
+#define MN10300_JCCLK           MN10300_IOCLK
+#define MN10300_TSCCLK          MN10300_IOCLK
+
+#ifdef CONFIG_MN10300_RTC
+#define MN10300_TSC_PER_HZ      ((unsigned long)mn10300_tsc_per_HZ)
+#else /* !CONFIG_MN10300_RTC */
+#define MN10300_TSC_PER_HZ      (MN10300_TSCCLK/HZ)
+#endif /* !CONFIG_MN10300_RTC */
+
+#endif /* !__ASSEMBLY__ */
+
+#endif /* _ASM_UNIT_CLOCK_H */
diff --git a/include/asm-mn10300/unit-asb2303/leds.h b/include/asm-mn10300/unit-asb2303/leds.h
new file mode 100644
index 000000000000..3a7543ea7b5c
--- /dev/null
+++ b/include/asm-mn10300/unit-asb2303/leds.h
@@ -0,0 +1,43 @@
+/* ASB2303-specific LEDs
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+
+#ifndef _ASM_UNIT_LEDS_H
+#define _ASM_UNIT_LEDS_H
+
+#include <asm/pio-regs.h>
+#include <asm/cpu-regs.h>
+#include <asm/exceptions.h>
+
+#define ASB2303_GPIO0DEF        __SYSREG(0xDB000000, u32)
+#define ASB2303_7SEGLEDS        __SYSREG(0xDB000008, u32)
+
+/*
+ * use the 7-segment LEDs to indicate states
+ */
+
+/* flip the 7-segment LEDs between "G" and "-" */
+#define mn10300_set_gdbleds(ONOFF)                      \
+do {                                                    \
+        ASB2303_7SEGLEDS = (ONOFF) ? 0x85 : 0x7f;       \
+} while (0)
+
+/* indicate double-fault by displaying "d" on the LEDs */
+#define mn10300_set_dbfleds                     \
+        mov     0x43,d0                 ;       \
+        movbu   d0,(ASB2303_7SEGLEDS)
+
+#ifndef __ASSEMBLY__
+extern void peripheral_leds_display_exception(enum exception_code code);
+extern void peripheral_leds_led_chase(void);
+extern void debug_to_serial(const char *p, int n);
+#endif /* __ASSEMBLY__ */
+
+#endif /* _ASM_UNIT_LEDS_H */
diff --git a/include/asm-mn10300/unit-asb2303/serial.h b/include/asm-mn10300/unit-asb2303/serial.h
new file mode 100644
index 000000000000..0d55cf5896ac
--- /dev/null
+++ b/include/asm-mn10300/unit-asb2303/serial.h
@@ -0,0 +1,136 @@
+/* ASB2303-specific 8250 serial ports
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+
+#ifndef _ASM_UNIT_SERIAL_H
+#define _ASM_UNIT_SERIAL_H
+
+#include <asm/cpu-regs.h>
+#include <asm/proc/irq.h>
+#include <linux/serial_reg.h>
+
+#define SERIAL_PORT0_BASE_ADDRESS       0xA6FB0000
+#define SERIAL_PORT1_BASE_ADDRESS       0xA6FC0000
+
+#define SERIAL_IRQ      XIRQ0   /* Dual serial (PC16552)        (Hi) */
+
+/*
+ * dispose of the /dev/ttyS0 and /dev/ttyS1 serial ports
+ */
+#ifndef CONFIG_GDBSTUB_ON_TTYSx
+
+#define SERIAL_PORT_DFNS                                                \
+        {                                                               \
+        .baud_base              = BASE_BAUD,                            \
+        .irq                    = SERIAL_IRQ,                           \
+        .flags                  = STD_COM_FLAGS,                        \
+        .iomem_base             = (u8 *) SERIAL_PORT0_BASE_ADDRESS,     \
+        .iomem_reg_shift        = 2,                                    \
+        .io_type                = SERIAL_IO_MEM,                        \
+        },                                                              \
+        {                                                               \
+        .baud_base              = BASE_BAUD,                            \
+        .irq                    = SERIAL_IRQ,                           \
+        .flags                  = STD_COM_FLAGS,                        \
+        .iomem_base             = (u8 *) SERIAL_PORT1_BASE_ADDRESS,     \
+        .iomem_reg_shift        = 2,                                    \
+        .io_type                = SERIAL_IO_MEM,                        \
+        },
+
+#ifndef __ASSEMBLY__
+
+static inline void __debug_to_serial(const char *p, int n)
+{
+}
+
+#endif /* !__ASSEMBLY__ */
+
+#else /* CONFIG_GDBSTUB_ON_TTYSx */
+
+#define SERIAL_PORT_DFNS /* both stolen by gdb-stub because they share an IRQ */
+
+#if defined(CONFIG_GDBSTUB_ON_TTYS0)
+#define GDBPORT_SERIAL_RX       __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_RX  * 4, u8)
+#define GDBPORT_SERIAL_TX       __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_TX  * 4, u8)
+#define GDBPORT_SERIAL_DLL      __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_DLL * 4, u8)
+#define GDBPORT_SERIAL_DLM      __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_DLM * 4, u8)
+#define GDBPORT_SERIAL_IER      __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_IER * 4, u8)
+#define GDBPORT_SERIAL_IIR      __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_IIR * 4, u8)
+#define GDBPORT_SERIAL_FCR      __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_FCR * 4, u8)
+#define GDBPORT_SERIAL_LCR      __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_LCR * 4, u8)
+#define GDBPORT_SERIAL_MCR      __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_MCR * 4, u8)
+#define GDBPORT_SERIAL_LSR      __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_LSR * 4, u8)
+#define GDBPORT_SERIAL_MSR      __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_MSR * 4, u8)
+#define GDBPORT_SERIAL_SCR      __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_SCR * 4, u8)
+#define GDBPORT_SERIAL_IRQ      SERIAL_IRQ
+
+#elif defined(CONFIG_GDBSTUB_ON_TTYS1)
+#define GDBPORT_SERIAL_RX       __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_RX  * 4, u8)
+#define GDBPORT_SERIAL_TX       __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_TX  * 4, u8)
+#define GDBPORT_SERIAL_DLL      __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_DLL * 4, u8)
+#define GDBPORT_SERIAL_DLM      __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_DLM * 4, u8)
+#define GDBPORT_SERIAL_IER      __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_IER * 4, u8)
+#define GDBPORT_SERIAL_IIR      __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_IIR * 4, u8)
+#define GDBPORT_SERIAL_FCR      __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_FCR * 4, u8)
+#define GDBPORT_SERIAL_LCR      __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_LCR * 4, u8)
+#define GDBPORT_SERIAL_MCR      __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_MCR * 4, u8)
+#define GDBPORT_SERIAL_LSR      __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_LSR * 4, u8)
+#define GDBPORT_SERIAL_MSR      __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_MSR * 4, u8)
+#define GDBPORT_SERIAL_SCR      __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_SCR * 4, u8)
+#define GDBPORT_SERIAL_IRQ      SERIAL_IRQ
+#endif
+
+#ifndef __ASSEMBLY__
+
+#define LSR_WAIT_FOR(STATE)                                     \
+do {                                                            \
+        while (!(GDBPORT_SERIAL_LSR & UART_LSR_##STATE)) {}     \
+} while (0)
+#define FLOWCTL_WAIT_FOR(LINE)                                  \
+do {                                                            \
+        while (!(GDBPORT_SERIAL_MSR & UART_MSR_##LINE)) {}      \
+} while (0)
+#define FLOWCTL_CLEAR(LINE)                     \
+do {                                            \
+        GDBPORT_SERIAL_MCR &= ~UART_MCR_##LINE; \
+} while (0)
+#define FLOWCTL_SET(LINE)                       \
+do {                                            \
+        GDBPORT_SERIAL_MCR |= UART_MCR_##LINE;  \
+} while (0)
+#define FLOWCTL_QUERY(LINE)     ({ GDBPORT_SERIAL_MSR & UART_MSR_##LINE; })
+
+static inline void __debug_to_serial(const char *p, int n)
+{
+        char ch;
+
+        FLOWCTL_SET(DTR);
+
+        for (; n > 0; n--) {
+                LSR_WAIT_FOR(THRE);
+                FLOWCTL_WAIT_FOR(CTS);
+
+                ch = *p++;
+                if (ch == 0x0a) {
+                        GDBPORT_SERIAL_TX = 0x0d;
+                        LSR_WAIT_FOR(THRE);
+                        FLOWCTL_WAIT_FOR(CTS);
+                }
+                GDBPORT_SERIAL_TX = ch;
+        }
+
+        FLOWCTL_CLEAR(DTR);
+}
+
+#endif /* !__ASSEMBLY__ */
+
+#endif /* CONFIG_GDBSTUB_ON_TTYSx */
+
+#endif /* _ASM_UNIT_SERIAL_H */
diff --git a/include/asm-mn10300/unit-asb2303/smc91111.h b/include/asm-mn10300/unit-asb2303/smc91111.h
new file mode 100644
index 000000000000..dd456e9c513f
--- /dev/null
+++ b/include/asm-mn10300/unit-asb2303/smc91111.h
@@ -0,0 +1,50 @@
+/* Support for the SMC91C111 NIC on an ASB2303
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_UNIT_SMC91111_H
+#define _ASM_UNIT_SMC91111_H
+
+#include <asm/intctl-regs.h>
+
+#define SMC91111_BASE           0xAA000300UL
+#define SMC91111_BASE_END       0xAA000400UL
+#define SMC91111_IRQ            XIRQ3
+
+#define SMC_CAN_USE_8BIT        0
+#define SMC_CAN_USE_16BIT       1
+#define SMC_CAN_USE_32BIT       0
+#define SMC_NOWAIT              1
+#define SMC_IRQ_FLAGS           (0)
+
+#if SMC_CAN_USE_8BIT
+#define SMC_inb(a, r)           inb((unsigned long) ((a) + (r)))
+#define SMC_outb(v, a, r)       outb(v, (unsigned long) ((a) + (r)))
+#endif
+
+#if SMC_CAN_USE_16BIT
+#define SMC_inw(a, r)           inw((unsigned long) ((a) + (r)))
+#define SMC_outw(v, a, r)       outw(v, (unsigned long) ((a) + (r)))
+#define SMC_insw(a, r, p, l)    insw((unsigned long) ((a) + (r)), (p), (l))
+#define SMC_outsw(a, r, p, l)   outsw((unsigned long) ((a) + (r)), (p), (l))
+#endif
+
+#if SMC_CAN_USE_32BIT
+#define SMC_inl(a, r)           inl((unsigned long) ((a) + (r)))
+#define SMC_outl(v, a, r)       outl(v, (unsigned long) ((a) + (r)))
+#define SMC_insl(a, r, p, l)    insl((unsigned long) ((a) + (r)), (p), (l))
+#define SMC_outsl(a, r, p, l)   outsl((unsigned long) ((a) + (r)), (p), (l))
+#endif
+
+#define RPC_LSA_DEFAULT         RPC_LED_100_10
+#define RPC_LSB_DEFAULT         RPC_LED_TX_RX
+
+#define set_irq_type(irq, type)
+
+#endif /*  _ASM_UNIT_SMC91111_H */
diff --git a/include/asm-mn10300/unit-asb2303/timex.h b/include/asm-mn10300/unit-asb2303/timex.h
new file mode 100644
index 000000000000..7e54b0cfdd03
--- /dev/null
+++ b/include/asm-mn10300/unit-asb2303/timex.h
@@ -0,0 +1,135 @@
+/* ASB2303-specific timer specifcations
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_UNIT_TIMEX_H
+#define _ASM_UNIT_TIMEX_H
+
+#ifndef __ASSEMBLY__
+#include <linux/irq.h>
+#endif /* __ASSEMBLY__ */
+
+#include <asm/timer-regs.h>
+#include <asm/unit/clock.h>
+
+/*
+ * jiffies counter specifications
+ */
+
+#define TMJCBR_MAX              0xffff
+#define TMJCBC                  TM01BC
+
+#define TMJCMD                  TM01MD
+#define TMJCBR                  TM01BR
+#define TMJCIRQ                 TM1IRQ
+#define TMJCICR                 TM1ICR
+#define TMJCICR_LEVEL           GxICR_LEVEL_5
+
+#ifndef __ASSEMBLY__
+
+static inline void startup_jiffies_counter(void)
+{
+        unsigned rate;
+        u16 md, t16;
+
+        /* use as little prescaling as possible to avoid losing accuracy */
+        md = TM0MD_SRC_IOCLK;
+        rate = MN10300_JCCLK / HZ;
+
+        if (rate > TMJCBR_MAX) {
+                md = TM0MD_SRC_IOCLK_8;
+                rate = MN10300_JCCLK / 8 / HZ;
+
+                if (rate > TMJCBR_MAX) {
+                        md = TM0MD_SRC_IOCLK_32;
+                        rate = MN10300_JCCLK / 32 / HZ;
+
+                        if (rate > TMJCBR_MAX)
+                                BUG();
+                }
+        }
+
+        TMJCBR = rate - 1;
+        t16 = TMJCBR;
+
+        TMJCMD =
+                md |
+                TM1MD_SRC_TM0CASCADE << 8 |
+                TM0MD_INIT_COUNTER |
+                TM1MD_INIT_COUNTER << 8;
+
+        TMJCMD =
+                md |
+                TM1MD_SRC_TM0CASCADE << 8 |
+                TM0MD_COUNT_ENABLE |
+                TM1MD_COUNT_ENABLE << 8;
+
+        t16 = TMJCMD;
+
+        TMJCICR |= GxICR_ENABLE | GxICR_DETECT | GxICR_REQUEST;
+        t16 = TMJCICR;
+}
+
+static inline void shutdown_jiffies_counter(void)
+{
+}
+
+#endif /* !__ASSEMBLY__ */
+
+
+/*
+ * timestamp counter specifications
+ */
+
+#define TMTSCBR_MAX             0xffffffff
+#define TMTSCBC                 TM45BC
+
+#ifndef __ASSEMBLY__
+
+static inline void startup_timestamp_counter(void)
+{
+        /* set up timer 4 & 5 cascaded as a 32-bit counter to count real time
+         * - count down from 4Gig-1 to 0 and wrap at IOCLK rate
+         */
+        TM45BR = TMTSCBR_MAX;
+
+        TM4MD = TM4MD_SRC_IOCLK;
+        TM4MD |= TM4MD_INIT_COUNTER;
+        TM4MD &= ~TM4MD_INIT_COUNTER;
+        TM4ICR = 0;
+
+        TM5MD = TM5MD_SRC_TM4CASCADE;
+        TM5MD |= TM5MD_INIT_COUNTER;
+        TM5MD &= ~TM5MD_INIT_COUNTER;
+        TM5ICR = 0;
+
+        TM5MD |= TM5MD_COUNT_ENABLE;
+        TM4MD |= TM4MD_COUNT_ENABLE;
+}
+
+static inline void shutdown_timestamp_counter(void)
+{
+        TM4MD = 0;
+        TM5MD = 0;
+}
+
+/*
+ * we use a cascaded pair of 16-bit down-counting timers to count I/O
+ * clock cycles for the purposes of time keeping
+ */
+typedef unsigned long cycles_t;
+
+static inline cycles_t read_timestamp_counter(void)
+{
+        return (cycles_t)TMTSCBC;
+}
+
+#endif /* !__ASSEMBLY__ */
+
+#endif /* _ASM_UNIT_TIMEX_H */
diff --git a/include/asm-mn10300/unit-asb2305/clock.h b/include/asm-mn10300/unit-asb2305/clock.h
new file mode 100644
index 000000000000..7d514841ffda
--- /dev/null
+++ b/include/asm-mn10300/unit-asb2305/clock.h
@@ -0,0 +1,45 @@
+/* ASB2305-specific clocks
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+
+#ifndef _ASM_UNIT_CLOCK_H
+#define _ASM_UNIT_CLOCK_H
+
+#ifndef __ASSEMBLY__
+
+#ifdef CONFIG_MN10300_RTC
+
+extern unsigned long mn10300_ioclk;     /* IOCLK (crystal speed) in HZ */
+extern unsigned long mn10300_iobclk;
+extern unsigned long mn10300_tsc_per_HZ;
+
+#define MN10300_IOCLK           ((unsigned long)mn10300_ioclk)
+/* If this processors has a another clock, uncomment the below. */
+/* #define MN10300_IOBCLK       ((unsigned long)mn10300_iobclk) */
+
+#else /* !CONFIG_MN10300_RTC */
+
+#define MN10300_IOCLK           33333333UL
+/* #define MN10300_IOBCLK       66666666UL */
+
+#endif /* !CONFIG_MN10300_RTC */
+
+#define MN10300_JCCLK           MN10300_IOCLK
+#define MN10300_TSCCLK          MN10300_IOCLK
+
+#ifdef CONFIG_MN10300_RTC
+#define MN10300_TSC_PER_HZ      ((unsigned long)mn10300_tsc_per_HZ)
+#else /* !CONFIG_MN10300_RTC */
+#define MN10300_TSC_PER_HZ      (MN10300_TSCCLK/HZ)
+#endif /* !CONFIG_MN10300_RTC */
+
+#endif /* !__ASSEMBLY__ */
+
+#endif /* _ASM_UNIT_CLOCK_H */
diff --git a/include/asm-mn10300/unit-asb2305/leds.h b/include/asm-mn10300/unit-asb2305/leds.h
new file mode 100644
index 000000000000..bc471f617fd1
--- /dev/null
+++ b/include/asm-mn10300/unit-asb2305/leds.h
@@ -0,0 +1,51 @@
+/* ASB2305-specific LEDs
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+
+#ifndef _ASM_UNIT_LEDS_H
+#define _ASM_UNIT_LEDS_H
+
+#include <asm/pio-regs.h>
+#include <asm/cpu-regs.h>
+#include <asm/exceptions.h>
+
+#define ASB2305_7SEGLEDS        __SYSREG(0xA6F90000, u32)
+
+/* perform a hard reset by driving PIO06 low */
+#define mn10300_unit_hard_reset()               \
+do {                                            \
+        P0OUT &= 0xbf;                          \
+        P0MD = (P0MD & P0MD_6) | P0MD_6_OUT;    \
+} while (0)
+
+/*
+ * use the 7-segment LEDs to indicate states
+ */
+/* indicate double-fault by displaying "db-f" on the LEDs */
+#define mn10300_set_dbfleds                     \
+        mov     0x43077f1d,d0           ;       \
+        mov     d0,(ASB2305_7SEGLEDS)
+
+/* flip the 7-segment LEDs between "Gdb-" and "----" */
+#define mn10300_set_gdbleds(ONOFF)                              \
+do {                                                            \
+        ASB2305_7SEGLEDS = (ONOFF) ? 0x8543077f : 0x7f7f7f7f;   \
+} while (0)
+
+#ifndef __ASSEMBLY__
+extern void peripheral_leds_display_exception(enum exception_code);
+extern void peripheral_leds_led_chase(void);
+extern void peripheral_leds7x4_display_dec(unsigned int, unsigned int);
+extern void peripheral_leds7x4_display_hex(unsigned int, unsigned int);
+extern void peripheral_leds7x4_display_minssecs(unsigned int, unsigned int);
+extern void peripheral_leds7x4_display_rtc(void);
+#endif /* __ASSEMBLY__ */
+
+#endif /* _ASM_UNIT_LEDS_H */
diff --git a/include/asm-mn10300/unit-asb2305/serial.h b/include/asm-mn10300/unit-asb2305/serial.h
new file mode 100644
index 000000000000..73d31d67bb71
--- /dev/null
+++ b/include/asm-mn10300/unit-asb2305/serial.h
@@ -0,0 +1,120 @@
+/* ASB2305-specific 8250 serial ports
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_UNIT_SERIAL_H
+#define _ASM_UNIT_SERIAL_H
+
+#include <asm/cpu/cpu-regs.h>
+#include <asm/proc/irq.h>
+#include <linux/serial_reg.h>
+
+#define SERIAL_PORT0_BASE_ADDRESS       0xA6FB0000
+#define ASB2305_DEBUG_MCR       __SYSREG(0xA6FB0000 + UART_MCR * 2, u8)
+
+#define SERIAL_IRQ      XIRQ0   /* Dual serial (PC16552)        (Hi) */
+
+/*
+ * dispose of the /dev/ttyS0 serial port
+ */
+#ifndef CONFIG_GDBSTUB_ON_TTYSx
+
+#define SERIAL_PORT_DFNS                                                \
+        {                                                               \
+        .baud_base              = BASE_BAUD,                            \
+        .irq                    = SERIAL_IRQ,                           \
+        .flags                  = STD_COM_FLAGS,                        \
+        .iomem_base             = (u8 *) SERIAL_PORT0_BASE_ADDRESS,     \
+        .iomem_reg_shift        = 2,                                    \
+        .io_type                = SERIAL_IO_MEM,                        \
+        },
+
+#ifndef __ASSEMBLY__
+
+static inline void __debug_to_serial(const char *p, int n)
+{
+}
+
+#endif /* !__ASSEMBLY__ */
+
+#else /* CONFIG_GDBSTUB_ON_TTYSx */
+
+#define SERIAL_PORT_DFNS /* stolen by gdb-stub */
+
+#if defined(CONFIG_GDBSTUB_ON_TTYS0)
+#define GDBPORT_SERIAL_RX       __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_RX  * 4, u8)
+#define GDBPORT_SERIAL_TX       __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_TX  * 4, u8)
+#define GDBPORT_SERIAL_DLL      __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_DLL * 4, u8)
+#define GDBPORT_SERIAL_DLM      __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_DLM * 4, u8)
+#define GDBPORT_SERIAL_IER      __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_IER * 4, u8)
+#define GDBPORT_SERIAL_IIR      __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_IIR * 4, u8)
+#define GDBPORT_SERIAL_FCR      __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_FCR * 4, u8)
+#define GDBPORT_SERIAL_LCR      __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_LCR * 4, u8)
+#define GDBPORT_SERIAL_MCR      __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_MCR * 4, u8)
+#define GDBPORT_SERIAL_LSR      __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_LSR * 4, u8)
+#define GDBPORT_SERIAL_MSR      __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_MSR * 4, u8)
+#define GDBPORT_SERIAL_SCR      __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_SCR * 4, u8)
+#define GDBPORT_SERIAL_IRQ      SERIAL_IRQ
+
+#elif defined(CONFIG_GDBSTUB_ON_TTYS1)
+#error The ASB2305 doesnt have a /dev/ttyS1
+#endif
+
+#ifndef __ASSEMBLY__
+
+#define TTYS0_TX        __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_TX  * 4, u8)
+#define TTYS0_MCR       __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_MCR * 4, u8)
+#define TTYS0_LSR       __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_LSR * 4, u8)
+#define TTYS0_MSR       __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_MSR * 4, u8)
+
+#define LSR_WAIT_FOR(STATE)                             \
+do {                                                    \
+        while (!(TTYS0_LSR & UART_LSR_##STATE)) {}      \
+} while (0)
+#define FLOWCTL_WAIT_FOR(LINE)                          \
+do {                                                    \
+        while (!(TTYS0_MSR & UART_MSR_##LINE)) {}       \
+} while (0)
+#define FLOWCTL_CLEAR(LINE)                     \
+do {                                            \
+        TTYS0_MCR &= ~UART_MCR_##LINE;          \
+} while (0)
+#define FLOWCTL_SET(LINE)                       \
+do {                                            \
+        TTYS0_MCR |= UART_MCR_##LINE;           \
+} while (0)
+#define FLOWCTL_QUERY(LINE)     ({ TTYS0_MSR & UART_MSR_##LINE; })
+
+static inline void __debug_to_serial(const char *p, int n)
+{
+        char ch;
+
+        FLOWCTL_SET(DTR);
+
+        for (; n > 0; n--) {
+                LSR_WAIT_FOR(THRE);
+                FLOWCTL_WAIT_FOR(CTS);
+
+                ch = *p++;
+                if (ch == 0x0a) {
+                        TTYS0_TX = 0x0d;
+                        LSR_WAIT_FOR(THRE);
+                        FLOWCTL_WAIT_FOR(CTS);
+                }
+                TTYS0_TX = ch;
+        }
+
+        FLOWCTL_CLEAR(DTR);
+}
+
+#endif /* !__ASSEMBLY__ */
+
+#endif /* CONFIG_GDBSTUB_ON_TTYSx */
+
+#endif /* _ASM_UNIT_SERIAL_H */
diff --git a/include/asm-mn10300/unit-asb2305/timex.h b/include/asm-mn10300/unit-asb2305/timex.h
new file mode 100644
index 000000000000..10e1bfe34463
--- /dev/null
+++ b/include/asm-mn10300/unit-asb2305/timex.h
@@ -0,0 +1,135 @@
+/* ASB2305 timer specifcations
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_UNIT_TIMEX_H
+#define _ASM_UNIT_TIMEX_H
+
+#ifndef __ASSEMBLY__
+#include <linux/irq.h>
+#endif /* __ASSEMBLY__ */
+
+#include <asm/cpu/timer-regs.h>
+#include <asm/unit/clock.h>
+
+/*
+ * jiffies counter specifications
+ */
+
+#define TMJCBR_MAX              0xffff
+#define TMJCBC                  TM01BC
+
+#define TMJCMD                  TM01MD
+#define TMJCBR                  TM01BR
+#define TMJCIRQ                 TM1IRQ
+#define TMJCICR                 TM1ICR
+#define TMJCICR_LEVEL           GxICR_LEVEL_5
+
+#ifndef __ASSEMBLY__
+
+static inline void startup_jiffies_counter(void)
+{
+        unsigned rate;
+        u16 md, t16;
+
+        /* use as little prescaling as possible to avoid losing accuracy */
+        md = TM0MD_SRC_IOCLK;
+        rate = MN10300_JCCLK / HZ;
+
+        if (rate > TMJCBR_MAX) {
+                md = TM0MD_SRC_IOCLK_8;
+                rate = MN10300_JCCLK / 8 / HZ;
+
+                if (rate > TMJCBR_MAX) {
+                        md = TM0MD_SRC_IOCLK_32;
+                        rate = MN10300_JCCLK / 32 / HZ;
+
+                        if (rate > TMJCBR_MAX)
+                                BUG();
+                }
+        }
+
+        TMJCBR = rate - 1;
+        t16 = TMJCBR;
+
+        TMJCMD =
+                md |
+                TM1MD_SRC_TM0CASCADE << 8 |
+                TM0MD_INIT_COUNTER |
+                TM1MD_INIT_COUNTER << 8;
+
+        TMJCMD =
+                md |
+                TM1MD_SRC_TM0CASCADE << 8 |
+                TM0MD_COUNT_ENABLE |
+                TM1MD_COUNT_ENABLE << 8;
+
+        t16 = TMJCMD;
+
+        TMJCICR |= GxICR_ENABLE | GxICR_DETECT | GxICR_REQUEST;
+        t16 = TMJCICR;
+}
+
+static inline void shutdown_jiffies_counter(void)
+{
+}
+
+#endif /* !__ASSEMBLY__ */
+
+
+/*
+ * timestamp counter specifications
+ */
+
+#define TMTSCBR_MAX             0xffffffff
+#define TMTSCBC                 TM45BC
+
+#ifndef __ASSEMBLY__
+
+static inline void startup_timestamp_counter(void)
+{
+        /* set up timer 4 & 5 cascaded as a 32-bit counter to count real time
+         * - count down from 4Gig-1 to 0 and wrap at IOCLK rate
+         */
+        TM45BR = TMTSCBR_MAX;
+
+        TM4MD = TM4MD_SRC_IOCLK;
+        TM4MD |= TM4MD_INIT_COUNTER;
+        TM4MD &= ~TM4MD_INIT_COUNTER;
+        TM4ICR = 0;
+
+        TM5MD = TM5MD_SRC_TM4CASCADE;
+        TM5MD |= TM5MD_INIT_COUNTER;
+        TM5MD &= ~TM5MD_INIT_COUNTER;
+        TM5ICR = 0;
+
+        TM5MD |= TM5MD_COUNT_ENABLE;
+        TM4MD |= TM4MD_COUNT_ENABLE;
+}
+
+static inline void shutdown_timestamp_counter(void)
+{
+        TM4MD = 0;
+        TM5MD = 0;
+}
+
+/*
+ * we use a cascaded pair of 16-bit down-counting timers to count I/O
+ * clock cycles for the purposes of time keeping
+ */
+typedef unsigned long cycles_t;
+
+static inline cycles_t read_timestamp_counter(void)
+{
+        return (cycles_t) TMTSCBC;
+}
+
+#endif /* !__ASSEMBLY__ */
+
+#endif /* _ASM_UNIT_TIMEX_H */
diff --git a/include/asm-mn10300/user.h b/include/asm-mn10300/user.h
new file mode 100644
index 000000000000..e1193908b78c
--- /dev/null
+++ b/include/asm-mn10300/user.h
@@ -0,0 +1,53 @@
+/* MN10300 User process data
+ *
+ * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _ASM_USER_H
+#define _ASM_USER_H
+
+#include <asm/page.h>
+#include <linux/ptrace.h>
+
+#ifndef __ASSEMBLY__
+/*
+ * When the kernel dumps core, it starts by dumping the user struct - this will
+ * be used by gdb to figure out where the data and stack segments are within
+ * the file, and what virtual addresses to use.
+ */
+struct user {
+        /* We start with the registers, to mimic the way that "memory" is
+         * returned from the ptrace(3,...) function.
+         */
+        struct pt_regs regs;            /* Where the registers are actually stored */
+
+        /* The rest of this junk is to help gdb figure out what goes where */
+        unsigned long int u_tsize;      /* Text segment size (pages). */
+        unsigned long int u_dsize;      /* Data segment size (pages). */
+        unsigned long int u_ssize;      /* Stack segment size (pages). */
+        unsigned long start_code;       /* Starting virtual address of text. */
+        unsigned long start_stack;      /* Starting virtual address of stack area.
+                                           This is actually the bottom of the stack,
+                                           the top of the stack is always found in the
+                                           esp register.  */
+        long int signal;                /* Signal that caused the core dump. */
+        int reserved;                   /* No longer used */
+        struct user_pt_regs *u_ar0;     /* Used by gdb to help find the values for */
+
+        /* the registers */
+        unsigned long magic;            /* To uniquely identify a core file */
+        char u_comm[32];                /* User command that was responsible */
+};
+#endif
+
+#define NBPG PAGE_SIZE
+#define UPAGES 1
+#define HOST_TEXT_START_ADDR    +(u.start_code)
+#define HOST_STACK_END_ADDR     +(u.start_stack + u.u_ssize * NBPG)
+
+#endif /* _ASM_USER_H */
diff --git a/include/asm-mn10300/vga.h b/include/asm-mn10300/vga.h
new file mode 100644
index 000000000000..0163e50a3459
--- /dev/null
+++ b/include/asm-mn10300/vga.h
@@ -0,0 +1,17 @@
+/* MN10300 VGA register definitions
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+
+#ifndef _ASM_VGA_H
+#define _ASM_VGA_H
+
+
+
+#endif /* _ASM_VGA_H */
diff --git a/include/asm-mn10300/xor.h b/include/asm-mn10300/xor.h
new file mode 100644
index 000000000000..c82eb12a5b18
--- /dev/null
+++ b/include/asm-mn10300/xor.h
@@ -0,0 +1 @@
+#include <asm-generic/xor.h>
diff --git a/include/linux/elf-em.h b/include/linux/elf-em.h
index 5834e843a946..18bea78fe47b 100644
--- a/include/linux/elf-em.h
+++ b/include/linux/elf-em.h
@@ -31,6 +31,7 @@
 #define EM_V850         87      /* NEC v850 */
 #define EM_M32R         88      /* Renesas M32R */
 #define EM_H8_300       46      /* Renesas H8/300,300H,H8S */
+#define EM_MN10300      89      /* Panasonic/MEI MN10300, AM33 */
 #define EM_BLACKFIN     106     /* ADI Blackfin Processor */
 #define EM_FRV          0x5441  /* Fujitsu FR-V */
 #define EM_AVR32        0x18ad  /* Atmel AVR32 */
@@ -47,6 +48,8 @@
 #define EM_CYGNUS_M32R  0x9041
 /* This is the old interim value for S/390 architecture */
 #define EM_S390_OLD     0xA390
+/* Also Panasonic/MEI MN10300, AM33 */
+#define EM_CYGNUS_MN10300 0xbeef
 
 
 #endif /* _LINUX_ELF_EM_H */
diff --git a/include/linux/kernel.h b/include/linux/kernel.h
index 568042290c0b..3344185dd3b2 100644
--- a/include/linux/kernel.h
+++ b/include/linux/kernel.h
@@ -222,6 +222,7 @@ extern int panic_on_unrecovered_nmi;
 extern int tainted;
 extern const char *print_tainted(void);
 extern void add_taint(unsigned);
+extern int root_mountflags;
 
 /* Values used for system_state */
 extern enum system_states {