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authorTakashi Iwai <tiwai@suse.de>2009-05-04 10:05:23 -0400
committerTakashi Iwai <tiwai@suse.de>2009-05-04 10:05:23 -0400
commit8560b9321f9050968f393ce1ec67e47c1a0bd5cf (patch)
tree658ebb20e4fd5dee840f27103b59da367ff473b1 /include
parent72e31981a4e91f84c5b5e8994f5d25b1cf22b6cf (diff)
parent6574612fbb34c63117581e68f2231ddce027e41e (diff)
Merge branch 'fix/asoc' into topic/asoc
Diffstat (limited to 'include')
-rw-r--r--include/acpi/acpi_bus.h1
-rw-r--r--include/acpi/processor.h1
-rw-r--r--include/asm-arm/.gitignore2
-rw-r--r--include/asm-frv/Kbuild5
-rw-r--r--include/asm-frv/atomic.h198
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-rw-r--r--include/asm-frv/bitops.h412
-rw-r--r--include/asm-frv/bug.h53
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-rw-r--r--include/asm-frv/busctl-regs.h41
-rw-r--r--include/asm-frv/byteorder.h6
-rw-r--r--include/asm-frv/cache.h23
-rw-r--r--include/asm-frv/cacheflush.h104
-rw-r--r--include/asm-frv/checksum.h180
-rw-r--r--include/asm-frv/cpu-irqs.h81
-rw-r--r--include/asm-frv/cpumask.h6
-rw-r--r--include/asm-frv/cputime.h6
-rw-r--r--include/asm-frv/current.h30
-rw-r--r--include/asm-frv/delay.h50
-rw-r--r--include/asm-frv/device.h7
-rw-r--r--include/asm-frv/div64.h1
-rw-r--r--include/asm-frv/dm9000.h37
-rw-r--r--include/asm-frv/dma-mapping.h174
-rw-r--r--include/asm-frv/dma.h125
-rw-r--r--include/asm-frv/elf.h142
-rw-r--r--include/asm-frv/emergency-restart.h6
-rw-r--r--include/asm-frv/errno.h7
-rw-r--r--include/asm-frv/fb.h12
-rw-r--r--include/asm-frv/fcntl.h1
-rw-r--r--include/asm-frv/fpu.h11
-rw-r--r--include/asm-frv/ftrace.h1
-rw-r--r--include/asm-frv/futex.h19
-rw-r--r--include/asm-frv/gdb-stub.h140
-rw-r--r--include/asm-frv/gpio-regs.h116
-rw-r--r--include/asm-frv/hardirq.h35
-rw-r--r--include/asm-frv/highmem.h182
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-rw-r--r--include/asm-frv/mb86943a.h42
-rw-r--r--include/asm-frv/mb93091-fpga-irqs.h42
-rw-r--r--include/asm-frv/mb93093-fpga-irqs.h29
-rw-r--r--include/asm-frv/mb93493-irqs.h50
-rw-r--r--include/asm-frv/mb93493-regs.h281
-rw-r--r--include/asm-frv/mc146818rtc.h16
-rw-r--r--include/asm-frv/mem-layout.h86
-rw-r--r--include/asm-frv/mman.h18
-rw-r--r--include/asm-frv/mmu.h41
-rw-r--r--include/asm-frv/mmu_context.h50
-rw-r--r--include/asm-frv/module.h28
-rw-r--r--include/asm-frv/msgbuf.h32
-rw-r--r--include/asm-frv/mutex.h9
-rw-r--r--include/asm-frv/page.h78
-rw-r--r--include/asm-frv/param.h22
-rw-r--r--include/asm-frv/pci.h118
-rw-r--r--include/asm-frv/percpu.h6
-rw-r--r--include/asm-frv/pgalloc.h69
-rw-r--r--include/asm-frv/pgtable.h551
-rw-r--r--include/asm-frv/poll.h12
-rw-r--r--include/asm-frv/posix_types.h62
-rw-r--r--include/asm-frv/processor.h153
-rw-r--r--include/asm-frv/ptrace.h83
-rw-r--r--include/asm-frv/registers.h232
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-rw-r--r--include/asm-frv/segment.h45
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-rw-r--r--include/asm-frv/serial.h18
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-rw-r--r--include/asm-frv/shmbuf.h43
-rw-r--r--include/asm-frv/shmparam.h7
-rw-r--r--include/asm-frv/sigcontext.h26
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-rw-r--r--include/asm-frv/signal.h161
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-rw-r--r--include/asm-h8300/timer.h25
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-rw-r--r--include/asm-m32r/atomic.h318
-rw-r--r--include/asm-m32r/auxvec.h4
-rw-r--r--include/asm-m32r/bitops.h275
-rw-r--r--include/asm-m32r/bug.h4
-rw-r--r--include/asm-m32r/bugs.h19
-rw-r--r--include/asm-m32r/byteorder.h10
-rw-r--r--include/asm-m32r/cache.h8
-rw-r--r--include/asm-m32r/cachectl.h26
-rw-r--r--include/asm-m32r/cacheflush.h69
-rw-r--r--include/asm-m32r/checksum.h204
-rw-r--r--include/asm-m32r/cputime.h6
-rw-r--r--include/asm-m32r/current.h15
-rw-r--r--include/asm-m32r/delay.h26
-rw-r--r--include/asm-m32r/device.h7
-rw-r--r--include/asm-m32r/div64.h1
-rw-r--r--include/asm-m32r/dma.h12
-rw-r--r--include/asm-m32r/elf.h134
-rw-r--r--include/asm-m32r/emergency-restart.h6
-rw-r--r--include/asm-m32r/errno.h6
-rw-r--r--include/asm-m32r/fb.h19
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-rw-r--r--include/asm-m32r/flat.h146
-rw-r--r--include/asm-m32r/ftrace.h1
-rw-r--r--include/asm-m32r/futex.h6
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-rw-r--r--include/asm-m32r/ioctl.h1
-rw-r--r--include/asm-m32r/ioctls.h87
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-rw-r--r--include/asm-m32r/irq.h90
-rw-r--r--include/asm-m32r/irq_regs.h1
-rw-r--r--include/asm-m32r/kdebug.h1
-rw-r--r--include/asm-m32r/kmap_types.h29
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-rw-r--r--include/asm-m32r/local.h366
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-rw-r--r--include/asm-m32r/m32104ut/m32104ut_pld.h161
-rw-r--r--include/asm-m32r/m32700ut/m32700ut_lan.h103
-rw-r--r--include/asm-m32r/m32700ut/m32700ut_lcd.h55
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-rw-r--r--include/asm-m32r/m32r_mp_fpga.h313
-rw-r--r--include/asm-m32r/mappi2/mappi2_pld.h150
-rw-r--r--include/asm-m32r/mappi3/mappi3_pld.h142
-rw-r--r--include/asm-m32r/mc146818rtc.h29
-rw-r--r--include/asm-m32r/mman.h17
-rw-r--r--include/asm-m32r/mmu.h21
-rw-r--r--include/asm-m32r/mmu_context.h164
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-rw-r--r--include/asm-m32r/opsput/opsput_lan.h52
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-rw-r--r--include/asm-m32r/pgalloc.h76
-rw-r--r--include/asm-m32r/pgtable-2level.h78
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-rw-r--r--include/asm-m32r/posix_types.h118
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-rw-r--r--include/asm-m32r/ptrace.h148
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-rw-r--r--include/linux/bio.h110
-rw-r--r--include/linux/bitops.h19
-rw-r--r--include/linux/blkdev.h3
-rw-r--r--include/linux/buffer_head.h3
-rw-r--r--include/linux/capability.h23
-rw-r--r--include/linux/clocksource.h37
-rw-r--r--include/linux/debug_locks.h8
-rw-r--r--include/linux/device-mapper.h1
-rw-r--r--include/linux/device.h1
-rw-r--r--include/linux/dynamic_debug.h2
-rw-r--r--include/linux/fb.h8
-rw-r--r--include/linux/fiemap.h2
-rw-r--r--include/linux/fs.h69
-rw-r--r--include/linux/fsl_devices.h8
-rw-r--r--include/linux/ftrace.h31
-rw-r--r--include/linux/genhd.h1
-rw-r--r--include/linux/i2c.h2
-rw-r--r--include/linux/ide.h151
-rw-r--r--include/linux/init.h13
-rw-r--r--include/linux/init_task.h13
-rw-r--r--include/linux/ipmi.h2
-rw-r--r--include/linux/ipmi_msgdefs.h8
-rw-r--r--include/linux/irq.h14
-rw-r--r--include/linux/jbd.h3
-rw-r--r--include/linux/jbd2.h3
-rw-r--r--include/linux/kernel.h9
-rw-r--r--include/linux/kmod.h2
-rw-r--r--include/linux/kvm.h2
-rw-r--r--include/linux/libata.h8
-rw-r--r--include/linux/memcontrol.h2
-rw-r--r--include/linux/mfd/pcf50633/core.h2
-rw-r--r--include/linux/mfd/pcf50633/mbc.h1
-rw-r--r--include/linux/pci_ids.h2
-rw-r--r--include/linux/pci_regs.h1
-rw-r--r--include/linux/pda_power.h2
-rw-r--r--include/linux/percpu-defs.h84
-rw-r--r--include/linux/percpu.h96
-rw-r--r--include/linux/phy.h6
-rw-r--r--include/linux/pipe_fs_i.h5
-rw-r--r--include/linux/pktcdvd.h1
-rw-r--r--include/linux/platform_device.h42
-rw-r--r--include/linux/rcutree.h3
-rw-r--r--include/linux/reiserfs_fs_sb.h2
-rw-r--r--include/linux/rotary_encoder.h13
-rw-r--r--include/linux/sched.h3
-rw-r--r--include/linux/seccomp.h2
-rw-r--r--include/linux/section-names.h6
-rw-r--r--include/linux/serial_max3100.h52
-rw-r--r--include/linux/sht15.h24
-rw-r--r--include/linux/slow-work.h2
-rw-r--r--include/linux/spi/ad7879.h35
-rw-r--r--include/linux/spi/ads7846.h1
-rw-r--r--include/linux/spi/spi.h7
-rw-r--r--include/linux/splice.h12
-rw-r--r--include/linux/stringify.h4
-rw-r--r--include/linux/suspend.h36
-rw-r--r--include/linux/syscalls.h4
-rw-r--r--include/linux/usb.h9
-rw-r--r--include/linux/usb/musb.h5
-rw-r--r--include/linux/usb/serial.h7
-rw-r--r--include/net/netfilter/nf_conntrack_expect.h5
-rw-r--r--include/net/netfilter/nf_nat.h1
-rw-r--r--include/net/udp.h2
-rw-r--r--include/scsi/scsi_scan.h11
-rw-r--r--include/sound/jack.h2
-rw-r--r--include/sound/pcm.h3
-rw-r--r--include/sound/pxa2xx-lib.h15
-rw-r--r--include/trace/syscall.h35
-rw-r--r--include/video/cyblafb.h175
425 files changed, 862 insertions, 27724 deletions
diff --git a/include/acpi/acpi_bus.h b/include/acpi/acpi_bus.h
index a2228511d4be..c34b11022908 100644
--- a/include/acpi/acpi_bus.h
+++ b/include/acpi/acpi_bus.h
@@ -270,7 +270,6 @@ struct acpi_device {
270 struct list_head children; 270 struct list_head children;
271 struct list_head node; 271 struct list_head node;
272 struct list_head wakeup_list; 272 struct list_head wakeup_list;
273 struct list_head g_list;
274 struct acpi_device_status status; 273 struct acpi_device_status status;
275 struct acpi_device_flags flags; 274 struct acpi_device_flags flags;
276 struct acpi_device_pnp pnp; 275 struct acpi_device_pnp pnp;
diff --git a/include/acpi/processor.h b/include/acpi/processor.h
index b09c4fde9725..4927c063347c 100644
--- a/include/acpi/processor.h
+++ b/include/acpi/processor.h
@@ -84,7 +84,6 @@ struct acpi_processor_power {
84 struct acpi_processor_cx *state; 84 struct acpi_processor_cx *state;
85 unsigned long bm_check_timestamp; 85 unsigned long bm_check_timestamp;
86 u32 default_state; 86 u32 default_state;
87 u32 bm_activity;
88 int count; 87 int count;
89 struct acpi_processor_cx states[ACPI_PROCESSOR_MAX_POWER]; 88 struct acpi_processor_cx states[ACPI_PROCESSOR_MAX_POWER];
90 int timer_broadcast_on_state; 89 int timer_broadcast_on_state;
diff --git a/include/asm-arm/.gitignore b/include/asm-arm/.gitignore
deleted file mode 100644
index e02c15d158fc..000000000000
--- a/include/asm-arm/.gitignore
+++ /dev/null
@@ -1,2 +0,0 @@
1arch
2mach-types.h
diff --git a/include/asm-frv/Kbuild b/include/asm-frv/Kbuild
deleted file mode 100644
index 0f8956def738..000000000000
--- a/include/asm-frv/Kbuild
+++ /dev/null
@@ -1,5 +0,0 @@
1include include/asm-generic/Kbuild.asm
2
3header-y += registers.h
4
5unifdef-y += termios.h
diff --git a/include/asm-frv/atomic.h b/include/asm-frv/atomic.h
deleted file mode 100644
index 296c35cfb207..000000000000
--- a/include/asm-frv/atomic.h
+++ /dev/null
@@ -1,198 +0,0 @@
1/* atomic.h: atomic operation emulation for FR-V
2 *
3 * For an explanation of how atomic ops work in this arch, see:
4 * Documentation/frv/atomic-ops.txt
5 *
6 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
7 * Written by David Howells (dhowells@redhat.com)
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version
12 * 2 of the License, or (at your option) any later version.
13 */
14#ifndef _ASM_ATOMIC_H
15#define _ASM_ATOMIC_H
16
17#include <linux/types.h>
18#include <asm/spr-regs.h>
19#include <asm/system.h>
20
21#ifdef CONFIG_SMP
22#error not SMP safe
23#endif
24
25/*
26 * Atomic operations that C can't guarantee us. Useful for
27 * resource counting etc..
28 *
29 * We do not have SMP systems, so we don't have to deal with that.
30 */
31
32/* Atomic operations are already serializing */
33#define smp_mb__before_atomic_dec() barrier()
34#define smp_mb__after_atomic_dec() barrier()
35#define smp_mb__before_atomic_inc() barrier()
36#define smp_mb__after_atomic_inc() barrier()
37
38#define ATOMIC_INIT(i) { (i) }
39#define atomic_read(v) ((v)->counter)
40#define atomic_set(v, i) (((v)->counter) = (i))
41
42#ifndef CONFIG_FRV_OUTOFLINE_ATOMIC_OPS
43static inline int atomic_add_return(int i, atomic_t *v)
44{
45 unsigned long val;
46
47 asm("0: \n"
48 " orcc gr0,gr0,gr0,icc3 \n" /* set ICC3.Z */
49 " ckeq icc3,cc7 \n"
50 " ld.p %M0,%1 \n" /* LD.P/ORCR must be atomic */
51 " orcr cc7,cc7,cc3 \n" /* set CC3 to true */
52 " add%I2 %1,%2,%1 \n"
53 " cst.p %1,%M0 ,cc3,#1 \n"
54 " corcc gr29,gr29,gr0 ,cc3,#1 \n" /* clear ICC3.Z if store happens */
55 " beq icc3,#0,0b \n"
56 : "+U"(v->counter), "=&r"(val)
57 : "NPr"(i)
58 : "memory", "cc7", "cc3", "icc3"
59 );
60
61 return val;
62}
63
64static inline int atomic_sub_return(int i, atomic_t *v)
65{
66 unsigned long val;
67
68 asm("0: \n"
69 " orcc gr0,gr0,gr0,icc3 \n" /* set ICC3.Z */
70 " ckeq icc3,cc7 \n"
71 " ld.p %M0,%1 \n" /* LD.P/ORCR must be atomic */
72 " orcr cc7,cc7,cc3 \n" /* set CC3 to true */
73 " sub%I2 %1,%2,%1 \n"
74 " cst.p %1,%M0 ,cc3,#1 \n"
75 " corcc gr29,gr29,gr0 ,cc3,#1 \n" /* clear ICC3.Z if store happens */
76 " beq icc3,#0,0b \n"
77 : "+U"(v->counter), "=&r"(val)
78 : "NPr"(i)
79 : "memory", "cc7", "cc3", "icc3"
80 );
81
82 return val;
83}
84
85#else
86
87extern int atomic_add_return(int i, atomic_t *v);
88extern int atomic_sub_return(int i, atomic_t *v);
89
90#endif
91
92static inline int atomic_add_negative(int i, atomic_t *v)
93{
94 return atomic_add_return(i, v) < 0;
95}
96
97static inline void atomic_add(int i, atomic_t *v)
98{
99 atomic_add_return(i, v);
100}
101
102static inline void atomic_sub(int i, atomic_t *v)
103{
104 atomic_sub_return(i, v);
105}
106
107static inline void atomic_inc(atomic_t *v)
108{
109 atomic_add_return(1, v);
110}
111
112static inline void atomic_dec(atomic_t *v)
113{
114 atomic_sub_return(1, v);
115}
116
117#define atomic_dec_return(v) atomic_sub_return(1, (v))
118#define atomic_inc_return(v) atomic_add_return(1, (v))
119
120#define atomic_sub_and_test(i,v) (atomic_sub_return((i), (v)) == 0)
121#define atomic_dec_and_test(v) (atomic_sub_return(1, (v)) == 0)
122#define atomic_inc_and_test(v) (atomic_add_return(1, (v)) == 0)
123
124/*****************************************************************************/
125/*
126 * exchange value with memory
127 */
128#ifndef CONFIG_FRV_OUTOFLINE_ATOMIC_OPS
129
130#define xchg(ptr, x) \
131({ \
132 __typeof__(ptr) __xg_ptr = (ptr); \
133 __typeof__(*(ptr)) __xg_orig; \
134 \
135 switch (sizeof(__xg_orig)) { \
136 case 4: \
137 asm volatile( \
138 "swap%I0 %M0,%1" \
139 : "+m"(*__xg_ptr), "=r"(__xg_orig) \
140 : "1"(x) \
141 : "memory" \
142 ); \
143 break; \
144 \
145 default: \
146 __xg_orig = (__typeof__(__xg_orig))0; \
147 asm volatile("break"); \
148 break; \
149 } \
150 \
151 __xg_orig; \
152})
153
154#else
155
156extern uint32_t __xchg_32(uint32_t i, volatile void *v);
157
158#define xchg(ptr, x) \
159({ \
160 __typeof__(ptr) __xg_ptr = (ptr); \
161 __typeof__(*(ptr)) __xg_orig; \
162 \
163 switch (sizeof(__xg_orig)) { \
164 case 4: __xg_orig = (__typeof__(*(ptr))) __xchg_32((uint32_t) x, __xg_ptr); break; \
165 default: \
166 __xg_orig = (__typeof__(__xg_orig))0; \
167 asm volatile("break"); \
168 break; \
169 } \
170 __xg_orig; \
171})
172
173#endif
174
175#define tas(ptr) (xchg((ptr), 1))
176
177#define atomic_cmpxchg(v, old, new) (cmpxchg(&((v)->counter), old, new))
178#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
179
180static __inline__ int atomic_add_unless(atomic_t *v, int a, int u)
181{
182 int c, old;
183 c = atomic_read(v);
184 for (;;) {
185 if (unlikely(c == (u)))
186 break;
187 old = atomic_cmpxchg((v), c, c + (a));
188 if (likely(old == c))
189 break;
190 c = old;
191 }
192 return c != (u);
193}
194
195#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
196
197#include <asm-generic/atomic.h>
198#endif /* _ASM_ATOMIC_H */
diff --git a/include/asm-frv/auxvec.h b/include/asm-frv/auxvec.h
deleted file mode 100644
index 07710778fa10..000000000000
--- a/include/asm-frv/auxvec.h
+++ /dev/null
@@ -1,4 +0,0 @@
1#ifndef __FRV_AUXVEC_H
2#define __FRV_AUXVEC_H
3
4#endif
diff --git a/include/asm-frv/ax88796.h b/include/asm-frv/ax88796.h
deleted file mode 100644
index 637e980393c5..000000000000
--- a/include/asm-frv/ax88796.h
+++ /dev/null
@@ -1,22 +0,0 @@
1/* ax88796.h: access points to the driver for the AX88796 NE2000 clone
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_AX88796_H
13#define _ASM_AX88796_H
14
15#include <asm/mb-regs.h>
16
17#define AX88796_IOADDR (__region_CS1 + 0x200)
18#define AX88796_IRQ IRQ_CPU_EXTERNAL7
19#define AX88796_FULL_DUPLEX 0 /* force full duplex */
20#define AX88796_BUS_INFO "CS1#+0x200" /* bus info for ethtool */
21
22#endif /* _ASM_AX88796_H */
diff --git a/include/asm-frv/bitops.h b/include/asm-frv/bitops.h
deleted file mode 100644
index 287f6f697ce2..000000000000
--- a/include/asm-frv/bitops.h
+++ /dev/null
@@ -1,412 +0,0 @@
1/* bitops.h: bit operations for the Fujitsu FR-V CPUs
2 *
3 * For an explanation of how atomic ops work in this arch, see:
4 * Documentation/frv/atomic-ops.txt
5 *
6 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
7 * Written by David Howells (dhowells@redhat.com)
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version
12 * 2 of the License, or (at your option) any later version.
13 */
14#ifndef _ASM_BITOPS_H
15#define _ASM_BITOPS_H
16
17#include <linux/compiler.h>
18#include <asm/byteorder.h>
19
20#ifdef __KERNEL__
21
22#ifndef _LINUX_BITOPS_H
23#error only <linux/bitops.h> can be included directly
24#endif
25
26#include <asm-generic/bitops/ffz.h>
27
28/*
29 * clear_bit() doesn't provide any barrier for the compiler.
30 */
31#define smp_mb__before_clear_bit() barrier()
32#define smp_mb__after_clear_bit() barrier()
33
34#ifndef CONFIG_FRV_OUTOFLINE_ATOMIC_OPS
35static inline
36unsigned long atomic_test_and_ANDNOT_mask(unsigned long mask, volatile unsigned long *v)
37{
38 unsigned long old, tmp;
39
40 asm volatile(
41 "0: \n"
42 " orcc gr0,gr0,gr0,icc3 \n" /* set ICC3.Z */
43 " ckeq icc3,cc7 \n"
44 " ld.p %M0,%1 \n" /* LD.P/ORCR are atomic */
45 " orcr cc7,cc7,cc3 \n" /* set CC3 to true */
46 " and%I3 %1,%3,%2 \n"
47 " cst.p %2,%M0 ,cc3,#1 \n" /* if store happens... */
48 " corcc gr29,gr29,gr0 ,cc3,#1 \n" /* ... clear ICC3.Z */
49 " beq icc3,#0,0b \n"
50 : "+U"(*v), "=&r"(old), "=r"(tmp)
51 : "NPr"(~mask)
52 : "memory", "cc7", "cc3", "icc3"
53 );
54
55 return old;
56}
57
58static inline
59unsigned long atomic_test_and_OR_mask(unsigned long mask, volatile unsigned long *v)
60{
61 unsigned long old, tmp;
62
63 asm volatile(
64 "0: \n"
65 " orcc gr0,gr0,gr0,icc3 \n" /* set ICC3.Z */
66 " ckeq icc3,cc7 \n"
67 " ld.p %M0,%1 \n" /* LD.P/ORCR are atomic */
68 " orcr cc7,cc7,cc3 \n" /* set CC3 to true */
69 " or%I3 %1,%3,%2 \n"
70 " cst.p %2,%M0 ,cc3,#1 \n" /* if store happens... */
71 " corcc gr29,gr29,gr0 ,cc3,#1 \n" /* ... clear ICC3.Z */
72 " beq icc3,#0,0b \n"
73 : "+U"(*v), "=&r"(old), "=r"(tmp)
74 : "NPr"(mask)
75 : "memory", "cc7", "cc3", "icc3"
76 );
77
78 return old;
79}
80
81static inline
82unsigned long atomic_test_and_XOR_mask(unsigned long mask, volatile unsigned long *v)
83{
84 unsigned long old, tmp;
85
86 asm volatile(
87 "0: \n"
88 " orcc gr0,gr0,gr0,icc3 \n" /* set ICC3.Z */
89 " ckeq icc3,cc7 \n"
90 " ld.p %M0,%1 \n" /* LD.P/ORCR are atomic */
91 " orcr cc7,cc7,cc3 \n" /* set CC3 to true */
92 " xor%I3 %1,%3,%2 \n"
93 " cst.p %2,%M0 ,cc3,#1 \n" /* if store happens... */
94 " corcc gr29,gr29,gr0 ,cc3,#1 \n" /* ... clear ICC3.Z */
95 " beq icc3,#0,0b \n"
96 : "+U"(*v), "=&r"(old), "=r"(tmp)
97 : "NPr"(mask)
98 : "memory", "cc7", "cc3", "icc3"
99 );
100
101 return old;
102}
103
104#else
105
106extern unsigned long atomic_test_and_ANDNOT_mask(unsigned long mask, volatile unsigned long *v);
107extern unsigned long atomic_test_and_OR_mask(unsigned long mask, volatile unsigned long *v);
108extern unsigned long atomic_test_and_XOR_mask(unsigned long mask, volatile unsigned long *v);
109
110#endif
111
112#define atomic_clear_mask(mask, v) atomic_test_and_ANDNOT_mask((mask), (v))
113#define atomic_set_mask(mask, v) atomic_test_and_OR_mask((mask), (v))
114
115static inline int test_and_clear_bit(int nr, volatile void *addr)
116{
117 volatile unsigned long *ptr = addr;
118 unsigned long mask = 1UL << (nr & 31);
119 ptr += nr >> 5;
120 return (atomic_test_and_ANDNOT_mask(mask, ptr) & mask) != 0;
121}
122
123static inline int test_and_set_bit(int nr, volatile void *addr)
124{
125 volatile unsigned long *ptr = addr;
126 unsigned long mask = 1UL << (nr & 31);
127 ptr += nr >> 5;
128 return (atomic_test_and_OR_mask(mask, ptr) & mask) != 0;
129}
130
131static inline int test_and_change_bit(int nr, volatile void *addr)
132{
133 volatile unsigned long *ptr = addr;
134 unsigned long mask = 1UL << (nr & 31);
135 ptr += nr >> 5;
136 return (atomic_test_and_XOR_mask(mask, ptr) & mask) != 0;
137}
138
139static inline void clear_bit(int nr, volatile void *addr)
140{
141 test_and_clear_bit(nr, addr);
142}
143
144static inline void set_bit(int nr, volatile void *addr)
145{
146 test_and_set_bit(nr, addr);
147}
148
149static inline void change_bit(int nr, volatile void * addr)
150{
151 test_and_change_bit(nr, addr);
152}
153
154static inline void __clear_bit(int nr, volatile void * addr)
155{
156 volatile unsigned long *a = addr;
157 int mask;
158
159 a += nr >> 5;
160 mask = 1 << (nr & 31);
161 *a &= ~mask;
162}
163
164static inline void __set_bit(int nr, volatile void * addr)
165{
166 volatile unsigned long *a = addr;
167 int mask;
168
169 a += nr >> 5;
170 mask = 1 << (nr & 31);
171 *a |= mask;
172}
173
174static inline void __change_bit(int nr, volatile void *addr)
175{
176 volatile unsigned long *a = addr;
177 int mask;
178
179 a += nr >> 5;
180 mask = 1 << (nr & 31);
181 *a ^= mask;
182}
183
184static inline int __test_and_clear_bit(int nr, volatile void * addr)
185{
186 volatile unsigned long *a = addr;
187 int mask, retval;
188
189 a += nr >> 5;
190 mask = 1 << (nr & 31);
191 retval = (mask & *a) != 0;
192 *a &= ~mask;
193 return retval;
194}
195
196static inline int __test_and_set_bit(int nr, volatile void * addr)
197{
198 volatile unsigned long *a = addr;
199 int mask, retval;
200
201 a += nr >> 5;
202 mask = 1 << (nr & 31);
203 retval = (mask & *a) != 0;
204 *a |= mask;
205 return retval;
206}
207
208static inline int __test_and_change_bit(int nr, volatile void * addr)
209{
210 volatile unsigned long *a = addr;
211 int mask, retval;
212
213 a += nr >> 5;
214 mask = 1 << (nr & 31);
215 retval = (mask & *a) != 0;
216 *a ^= mask;
217 return retval;
218}
219
220/*
221 * This routine doesn't need to be atomic.
222 */
223static inline int __constant_test_bit(int nr, const volatile void * addr)
224{
225 return ((1UL << (nr & 31)) & (((const volatile unsigned int *) addr)[nr >> 5])) != 0;
226}
227
228static inline int __test_bit(int nr, const volatile void * addr)
229{
230 int * a = (int *) addr;
231 int mask;
232
233 a += nr >> 5;
234 mask = 1 << (nr & 0x1f);
235 return ((mask & *a) != 0);
236}
237
238#define test_bit(nr,addr) \
239(__builtin_constant_p(nr) ? \
240 __constant_test_bit((nr),(addr)) : \
241 __test_bit((nr),(addr)))
242
243#include <asm-generic/bitops/find.h>
244
245/**
246 * fls - find last bit set
247 * @x: the word to search
248 *
249 * This is defined the same way as ffs:
250 * - return 32..1 to indicate bit 31..0 most significant bit set
251 * - return 0 to indicate no bits set
252 */
253#define fls(x) \
254({ \
255 int bit; \
256 \
257 asm(" subcc %1,gr0,gr0,icc0 \n" \
258 " ckne icc0,cc4 \n" \
259 " cscan.p %1,gr0,%0 ,cc4,#1 \n" \
260 " csub %0,%0,%0 ,cc4,#0 \n" \
261 " csub %2,%0,%0 ,cc4,#1 \n" \
262 : "=&r"(bit) \
263 : "r"(x), "r"(32) \
264 : "icc0", "cc4" \
265 ); \
266 \
267 bit; \
268})
269
270/**
271 * fls64 - find last bit set in a 64-bit value
272 * @n: the value to search
273 *
274 * This is defined the same way as ffs:
275 * - return 64..1 to indicate bit 63..0 most significant bit set
276 * - return 0 to indicate no bits set
277 */
278static inline __attribute__((const))
279int fls64(u64 n)
280{
281 union {
282 u64 ll;
283 struct { u32 h, l; };
284 } _;
285 int bit, x, y;
286
287 _.ll = n;
288
289 asm(" subcc.p %3,gr0,gr0,icc0 \n"
290 " subcc %4,gr0,gr0,icc1 \n"
291 " ckne icc0,cc4 \n"
292 " ckne icc1,cc5 \n"
293 " norcr cc4,cc5,cc6 \n"
294 " csub.p %0,%0,%0 ,cc6,1 \n"
295 " orcr cc5,cc4,cc4 \n"
296 " andcr cc4,cc5,cc4 \n"
297 " cscan.p %3,gr0,%0 ,cc4,0 \n"
298 " setlos #64,%1 \n"
299 " cscan.p %4,gr0,%0 ,cc4,1 \n"
300 " setlos #32,%2 \n"
301 " csub.p %1,%0,%0 ,cc4,0 \n"
302 " csub %2,%0,%0 ,cc4,1 \n"
303 : "=&r"(bit), "=r"(x), "=r"(y)
304 : "0r"(_.h), "r"(_.l)
305 : "icc0", "icc1", "cc4", "cc5", "cc6"
306 );
307 return bit;
308
309}
310
311/**
312 * ffs - find first bit set
313 * @x: the word to search
314 *
315 * - return 32..1 to indicate bit 31..0 most least significant bit set
316 * - return 0 to indicate no bits set
317 */
318static inline __attribute__((const))
319int ffs(int x)
320{
321 /* Note: (x & -x) gives us a mask that is the least significant
322 * (rightmost) 1-bit of the value in x.
323 */
324 return fls(x & -x);
325}
326
327/**
328 * __ffs - find first bit set
329 * @x: the word to search
330 *
331 * - return 31..0 to indicate bit 31..0 most least significant bit set
332 * - if no bits are set in x, the result is undefined
333 */
334static inline __attribute__((const))
335int __ffs(unsigned long x)
336{
337 int bit;
338 asm("scan %1,gr0,%0" : "=r"(bit) : "r"(x & -x));
339 return 31 - bit;
340}
341
342/**
343 * __fls - find last (most-significant) set bit in a long word
344 * @word: the word to search
345 *
346 * Undefined if no set bit exists, so code should check against 0 first.
347 */
348static inline unsigned long __fls(unsigned long word)
349{
350 unsigned long bit;
351 asm("scan %1,gr0,%0" : "=r"(bit) : "r"(word));
352 return bit;
353}
354
355/*
356 * special slimline version of fls() for calculating ilog2_u32()
357 * - note: no protection against n == 0
358 */
359#define ARCH_HAS_ILOG2_U32
360static inline __attribute__((const))
361int __ilog2_u32(u32 n)
362{
363 int bit;
364 asm("scan %1,gr0,%0" : "=r"(bit) : "r"(n));
365 return 31 - bit;
366}
367
368/*
369 * special slimline version of fls64() for calculating ilog2_u64()
370 * - note: no protection against n == 0
371 */
372#define ARCH_HAS_ILOG2_U64
373static inline __attribute__((const))
374int __ilog2_u64(u64 n)
375{
376 union {
377 u64 ll;
378 struct { u32 h, l; };
379 } _;
380 int bit, x, y;
381
382 _.ll = n;
383
384 asm(" subcc %3,gr0,gr0,icc0 \n"
385 " ckeq icc0,cc4 \n"
386 " cscan.p %3,gr0,%0 ,cc4,0 \n"
387 " setlos #63,%1 \n"
388 " cscan.p %4,gr0,%0 ,cc4,1 \n"
389 " setlos #31,%2 \n"
390 " csub.p %1,%0,%0 ,cc4,0 \n"
391 " csub %2,%0,%0 ,cc4,1 \n"
392 : "=&r"(bit), "=r"(x), "=r"(y)
393 : "0r"(_.h), "r"(_.l)
394 : "icc0", "cc4"
395 );
396 return bit;
397}
398
399#include <asm-generic/bitops/sched.h>
400#include <asm-generic/bitops/hweight.h>
401#include <asm-generic/bitops/lock.h>
402
403#include <asm-generic/bitops/ext2-non-atomic.h>
404
405#define ext2_set_bit_atomic(lock,nr,addr) test_and_set_bit ((nr) ^ 0x18, (addr))
406#define ext2_clear_bit_atomic(lock,nr,addr) test_and_clear_bit((nr) ^ 0x18, (addr))
407
408#include <asm-generic/bitops/minix-le.h>
409
410#endif /* __KERNEL__ */
411
412#endif /* _ASM_BITOPS_H */
diff --git a/include/asm-frv/bug.h b/include/asm-frv/bug.h
deleted file mode 100644
index 6b1b44d71028..000000000000
--- a/include/asm-frv/bug.h
+++ /dev/null
@@ -1,53 +0,0 @@
1/* bug.h: FRV bug trapping
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11#ifndef _ASM_BUG_H
12#define _ASM_BUG_H
13
14#include <linux/linkage.h>
15
16#ifdef CONFIG_BUG
17/*
18 * Tell the user there is some problem.
19 */
20extern asmlinkage void __debug_bug_trap(int signr);
21
22#ifdef CONFIG_NO_KERNEL_MSG
23#define _debug_bug_printk()
24#else
25extern void __debug_bug_printk(const char *file, unsigned line);
26#define _debug_bug_printk() __debug_bug_printk(__FILE__, __LINE__)
27#endif
28
29#define _debug_bug_trap(signr) \
30do { \
31 __debug_bug_trap(signr); \
32 asm volatile("nop"); \
33} while(0)
34
35#define HAVE_ARCH_BUG
36#define BUG() \
37do { \
38 _debug_bug_printk(); \
39 _debug_bug_trap(6 /*SIGABRT*/); \
40} while (0)
41
42#ifdef CONFIG_GDBSTUB
43#define HAVE_ARCH_KGDB_RAISE
44#define kgdb_raise(signr) do { _debug_bug_trap(signr); } while(0)
45
46#define HAVE_ARCH_KGDB_BAD_PAGE
47#define kgdb_bad_page(page) do { kgdb_raise(SIGABRT); } while(0)
48#endif
49#endif
50
51#include <asm-generic/bug.h>
52
53#endif
diff --git a/include/asm-frv/bugs.h b/include/asm-frv/bugs.h
deleted file mode 100644
index f2382be2b46c..000000000000
--- a/include/asm-frv/bugs.h
+++ /dev/null
@@ -1,14 +0,0 @@
1/* bugs.h: arch bug checking entry
2 *
3 * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12static inline void check_bugs(void)
13{
14}
diff --git a/include/asm-frv/busctl-regs.h b/include/asm-frv/busctl-regs.h
deleted file mode 100644
index bb0ff4816e27..000000000000
--- a/include/asm-frv/busctl-regs.h
+++ /dev/null
@@ -1,41 +0,0 @@
1/* busctl-regs.h: FR400-series CPU bus controller registers
2 *
3 * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_BUSCTL_REGS_H
13#define _ASM_BUSCTL_REGS_H
14
15/* bus controller registers */
16#define __get_LGCR() ({ *(volatile unsigned long *)(0xfe000010); })
17#define __get_LMAICR() ({ *(volatile unsigned long *)(0xfe000030); })
18#define __get_LEMBR() ({ *(volatile unsigned long *)(0xfe000040); })
19#define __get_LEMAM() ({ *(volatile unsigned long *)(0xfe000048); })
20#define __get_LCR(R) ({ *(volatile unsigned long *)(0xfe000100 + 8*(R)); })
21#define __get_LSBR(R) ({ *(volatile unsigned long *)(0xfe000c00 + 8*(R)); })
22#define __get_LSAM(R) ({ *(volatile unsigned long *)(0xfe000d00 + 8*(R)); })
23
24#define __set_LGCR(V) do { *(volatile unsigned long *)(0xfe000010) = (V); } while(0)
25#define __set_LMAICR(V) do { *(volatile unsigned long *)(0xfe000030) = (V); } while(0)
26#define __set_LEMBR(V) do { *(volatile unsigned long *)(0xfe000040) = (V); } while(0)
27#define __set_LEMAM(V) do { *(volatile unsigned long *)(0xfe000048) = (V); } while(0)
28#define __set_LCR(R,V) do { *(volatile unsigned long *)(0xfe000100 + 8*(R)) = (V); } while(0)
29#define __set_LSBR(R,V) do { *(volatile unsigned long *)(0xfe000c00 + 8*(R)) = (V); } while(0)
30#define __set_LSAM(R,V) do { *(volatile unsigned long *)(0xfe000d00 + 8*(R)) = (V); } while(0)
31
32/* FR401 SDRAM controller registers */
33#define __get_DBR(R) ({ *(volatile unsigned long *)(0xfe000e00 + 8*(R)); })
34#define __get_DAM(R) ({ *(volatile unsigned long *)(0xfe000f00 + 8*(R)); })
35
36/* FR551 SDRAM controller registers */
37#define __get_DARS(R) ({ *(volatile unsigned long *)(0xfeff0100 + 8*(R)); })
38#define __get_DAMK(R) ({ *(volatile unsigned long *)(0xfeff0110 + 8*(R)); })
39
40
41#endif /* _ASM_BUSCTL_REGS_H */
diff --git a/include/asm-frv/byteorder.h b/include/asm-frv/byteorder.h
deleted file mode 100644
index f29b7593e088..000000000000
--- a/include/asm-frv/byteorder.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef _ASM_BYTEORDER_H
2#define _ASM_BYTEORDER_H
3
4#include <linux/byteorder/big_endian.h>
5
6#endif /* _ASM_BYTEORDER_H */
diff --git a/include/asm-frv/cache.h b/include/asm-frv/cache.h
deleted file mode 100644
index 2797163b8f4f..000000000000
--- a/include/asm-frv/cache.h
+++ /dev/null
@@ -1,23 +0,0 @@
1/* cache.h: FRV cache definitions
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef __ASM_CACHE_H
13#define __ASM_CACHE_H
14
15
16/* bytes per L1 cache line */
17#define L1_CACHE_SHIFT (CONFIG_FRV_L1_CACHE_SHIFT)
18#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
19
20#define __cacheline_aligned __attribute__((aligned(L1_CACHE_BYTES)))
21#define ____cacheline_aligned __attribute__((aligned(L1_CACHE_BYTES)))
22
23#endif
diff --git a/include/asm-frv/cacheflush.h b/include/asm-frv/cacheflush.h
deleted file mode 100644
index 432a69e7f3d4..000000000000
--- a/include/asm-frv/cacheflush.h
+++ /dev/null
@@ -1,104 +0,0 @@
1/* cacheflush.h: FRV cache flushing routines
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_CACHEFLUSH_H
13#define _ASM_CACHEFLUSH_H
14
15/* Keep includes the same across arches. */
16#include <linux/mm.h>
17
18/*
19 * virtually-indexed cache management (our cache is physically indexed)
20 */
21#define flush_cache_all() do {} while(0)
22#define flush_cache_mm(mm) do {} while(0)
23#define flush_cache_dup_mm(mm) do {} while(0)
24#define flush_cache_range(mm, start, end) do {} while(0)
25#define flush_cache_page(vma, vmaddr, pfn) do {} while(0)
26#define flush_cache_vmap(start, end) do {} while(0)
27#define flush_cache_vunmap(start, end) do {} while(0)
28#define flush_dcache_mmap_lock(mapping) do {} while(0)
29#define flush_dcache_mmap_unlock(mapping) do {} while(0)
30
31/*
32 * physically-indexed cache management
33 * - see arch/frv/lib/cache.S
34 */
35extern void frv_dcache_writeback(unsigned long start, unsigned long size);
36extern void frv_cache_invalidate(unsigned long start, unsigned long size);
37extern void frv_icache_invalidate(unsigned long start, unsigned long size);
38extern void frv_cache_wback_inv(unsigned long start, unsigned long size);
39
40static inline void __flush_cache_all(void)
41{
42 asm volatile(" dcef @(gr0,gr0),#1 \n"
43 " icei @(gr0,gr0),#1 \n"
44 " membar \n"
45 : : : "memory"
46 );
47}
48
49/* dcache/icache coherency... */
50#ifdef CONFIG_MMU
51extern void flush_dcache_page(struct page *page);
52#else
53static inline void flush_dcache_page(struct page *page)
54{
55 unsigned long addr = page_to_phys(page);
56 frv_dcache_writeback(addr, addr + PAGE_SIZE);
57}
58#endif
59
60static inline void flush_page_to_ram(struct page *page)
61{
62 flush_dcache_page(page);
63}
64
65static inline void flush_icache(void)
66{
67 __flush_cache_all();
68}
69
70static inline void flush_icache_range(unsigned long start, unsigned long end)
71{
72 frv_cache_wback_inv(start, end);
73}
74
75#ifdef CONFIG_MMU
76extern void flush_icache_user_range(struct vm_area_struct *vma, struct page *page,
77 unsigned long start, unsigned long len);
78#else
79static inline void flush_icache_user_range(struct vm_area_struct *vma, struct page *page,
80 unsigned long start, unsigned long len)
81{
82 frv_cache_wback_inv(start, start + len);
83}
84#endif
85
86static inline void flush_icache_page(struct vm_area_struct *vma, struct page *page)
87{
88 flush_icache_user_range(vma, page, page_to_phys(page), PAGE_SIZE);
89}
90
91/*
92 * permit ptrace to access another process's address space through the icache
93 * and the dcache
94 */
95#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
96do { \
97 memcpy((dst), (src), (len)); \
98 flush_icache_user_range((vma), (page), (vaddr), (len)); \
99} while(0)
100
101#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
102 memcpy((dst), (src), (len))
103
104#endif /* _ASM_CACHEFLUSH_H */
diff --git a/include/asm-frv/checksum.h b/include/asm-frv/checksum.h
deleted file mode 100644
index 269da09ff637..000000000000
--- a/include/asm-frv/checksum.h
+++ /dev/null
@@ -1,180 +0,0 @@
1/* checksum.h: FRV checksumming
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_CHECKSUM_H
13#define _ASM_CHECKSUM_H
14
15#include <linux/in6.h>
16
17/*
18 * computes the checksum of a memory block at buff, length len,
19 * and adds in "sum" (32-bit)
20 *
21 * returns a 32-bit number suitable for feeding into itself
22 * or csum_tcpudp_magic
23 *
24 * this function must be called with even lengths, except
25 * for the last fragment, which may be odd
26 *
27 * it's best to have buff aligned on a 32-bit boundary
28 */
29__wsum csum_partial(const void *buff, int len, __wsum sum);
30
31/*
32 * the same as csum_partial, but copies from src while it
33 * checksums
34 *
35 * here even more important to align src and dst on a 32-bit (or even
36 * better 64-bit) boundary
37 */
38__wsum csum_partial_copy_nocheck(const void *src, void *dst, int len, __wsum sum);
39
40/*
41 * the same as csum_partial_copy, but copies from user space.
42 *
43 * here even more important to align src and dst on a 32-bit (or even
44 * better 64-bit) boundary
45 */
46extern __wsum csum_partial_copy_from_user(const void __user *src, void *dst,
47 int len, __wsum sum, int *csum_err);
48
49/*
50 * This is a version of ip_compute_csum() optimized for IP headers,
51 * which always checksum on 4 octet boundaries.
52 *
53 */
54static inline
55__sum16 ip_fast_csum(const void *iph, unsigned int ihl)
56{
57 unsigned int tmp, inc, sum = 0;
58
59 asm(" addcc gr0,gr0,gr0,icc0\n" /* clear icc0.C */
60 " subi %1,#4,%1 \n"
61 "0: \n"
62 " ldu.p @(%1,%3),%4 \n"
63 " subicc %2,#1,%2,icc1 \n"
64 " addxcc.p %4,%0,%0,icc0 \n"
65 " bhi icc1,#2,0b \n"
66
67 /* fold the 33-bit result into 16-bits */
68 " addxcc gr0,%0,%0,icc0 \n"
69 " srli %0,#16,%1 \n"
70 " sethi #0,%0 \n"
71 " add %1,%0,%0 \n"
72 " srli %0,#16,%1 \n"
73 " add %1,%0,%0 \n"
74
75 : "=r" (sum), "=r" (iph), "=r" (ihl), "=r" (inc), "=&r"(tmp)
76 : "0" (sum), "1" (iph), "2" (ihl), "3" (4),
77 "m"(*(volatile struct { int _[100]; } *)iph)
78 : "icc0", "icc1", "memory"
79 );
80
81 return (__force __sum16)~sum;
82}
83
84/*
85 * Fold a partial checksum
86 */
87static inline __sum16 csum_fold(__wsum sum)
88{
89 unsigned int tmp;
90
91 asm(" srli %0,#16,%1 \n"
92 " sethi #0,%0 \n"
93 " add %1,%0,%0 \n"
94 " srli %0,#16,%1 \n"
95 " add %1,%0,%0 \n"
96 : "=r"(sum), "=&r"(tmp)
97 : "0"(sum)
98 );
99
100 return (__force __sum16)~sum;
101}
102
103/*
104 * computes the checksum of the TCP/UDP pseudo-header
105 * returns a 16-bit checksum, already complemented
106 */
107static inline __wsum
108csum_tcpudp_nofold(__be32 saddr, __be32 daddr, unsigned short len,
109 unsigned short proto, __wsum sum)
110{
111 asm(" addcc %1,%0,%0,icc0 \n"
112 " addxcc %2,%0,%0,icc0 \n"
113 " addxcc %3,%0,%0,icc0 \n"
114 " addxcc gr0,%0,%0,icc0 \n"
115 : "=r" (sum)
116 : "r" (daddr), "r" (saddr), "r" (len + proto), "0"(sum)
117 : "icc0"
118 );
119 return sum;
120}
121
122static inline __sum16
123csum_tcpudp_magic(__be32 saddr, __be32 daddr, unsigned short len,
124 unsigned short proto, __wsum sum)
125{
126 return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum));
127}
128
129/*
130 * this routine is used for miscellaneous IP-like checksums, mainly
131 * in icmp.c
132 */
133extern __sum16 ip_compute_csum(const void *buff, int len);
134
135#define _HAVE_ARCH_IPV6_CSUM
136static inline __sum16
137csum_ipv6_magic(const struct in6_addr *saddr, const struct in6_addr *daddr,
138 __u32 len, unsigned short proto, __wsum sum)
139{
140 unsigned long tmp, tmp2;
141
142 asm(" addcc %2,%0,%0,icc0 \n"
143
144 /* add up the source addr */
145 " ldi @(%3,0),%1 \n"
146 " addxcc %1,%0,%0,icc0 \n"
147 " ldi @(%3,4),%2 \n"
148 " addxcc %2,%0,%0,icc0 \n"
149 " ldi @(%3,8),%1 \n"
150 " addxcc %1,%0,%0,icc0 \n"
151 " ldi @(%3,12),%2 \n"
152 " addxcc %2,%0,%0,icc0 \n"
153
154 /* add up the dest addr */
155 " ldi @(%4,0),%1 \n"
156 " addxcc %1,%0,%0,icc0 \n"
157 " ldi @(%4,4),%2 \n"
158 " addxcc %2,%0,%0,icc0 \n"
159 " ldi @(%4,8),%1 \n"
160 " addxcc %1,%0,%0,icc0 \n"
161 " ldi @(%4,12),%2 \n"
162 " addxcc %2,%0,%0,icc0 \n"
163
164 /* fold the 33-bit result into 16-bits */
165 " addxcc gr0,%0,%0,icc0 \n"
166 " srli %0,#16,%1 \n"
167 " sethi #0,%0 \n"
168 " add %1,%0,%0 \n"
169 " srli %0,#16,%1 \n"
170 " add %1,%0,%0 \n"
171
172 : "=r" (sum), "=&r" (tmp), "=r" (tmp2)
173 : "r" (saddr), "r" (daddr), "0" (sum), "2" (len + proto)
174 : "icc0"
175 );
176
177 return (__force __sum16)~sum;
178}
179
180#endif /* _ASM_CHECKSUM_H */
diff --git a/include/asm-frv/cpu-irqs.h b/include/asm-frv/cpu-irqs.h
deleted file mode 100644
index 478f3498fcfe..000000000000
--- a/include/asm-frv/cpu-irqs.h
+++ /dev/null
@@ -1,81 +0,0 @@
1/* cpu-irqs.h: on-CPU peripheral irqs
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_CPU_IRQS_H
13#define _ASM_CPU_IRQS_H
14
15#ifndef __ASSEMBLY__
16
17/* IRQ to level mappings */
18#define IRQ_GDBSTUB_LEVEL 15
19#define IRQ_UART_LEVEL 13
20
21#ifdef CONFIG_GDBSTUB_UART0
22#define IRQ_UART0_LEVEL IRQ_GDBSTUB_LEVEL
23#else
24#define IRQ_UART0_LEVEL IRQ_UART_LEVEL
25#endif
26
27#ifdef CONFIG_GDBSTUB_UART1
28#define IRQ_UART1_LEVEL IRQ_GDBSTUB_LEVEL
29#else
30#define IRQ_UART1_LEVEL IRQ_UART_LEVEL
31#endif
32
33#define IRQ_DMA0_LEVEL 14
34#define IRQ_DMA1_LEVEL 14
35#define IRQ_DMA2_LEVEL 14
36#define IRQ_DMA3_LEVEL 14
37#define IRQ_DMA4_LEVEL 14
38#define IRQ_DMA5_LEVEL 14
39#define IRQ_DMA6_LEVEL 14
40#define IRQ_DMA7_LEVEL 14
41
42#define IRQ_TIMER0_LEVEL 12
43#define IRQ_TIMER1_LEVEL 11
44#define IRQ_TIMER2_LEVEL 10
45
46#define IRQ_XIRQ0_LEVEL 1
47#define IRQ_XIRQ1_LEVEL 2
48#define IRQ_XIRQ2_LEVEL 3
49#define IRQ_XIRQ3_LEVEL 4
50#define IRQ_XIRQ4_LEVEL 5
51#define IRQ_XIRQ5_LEVEL 6
52#define IRQ_XIRQ6_LEVEL 7
53#define IRQ_XIRQ7_LEVEL 8
54
55/* IRQ IDs presented to drivers */
56#define IRQ_CPU__UNUSED IRQ_BASE_CPU
57#define IRQ_CPU_UART0 (IRQ_BASE_CPU + IRQ_UART0_LEVEL)
58#define IRQ_CPU_UART1 (IRQ_BASE_CPU + IRQ_UART1_LEVEL)
59#define IRQ_CPU_TIMER0 (IRQ_BASE_CPU + IRQ_TIMER0_LEVEL)
60#define IRQ_CPU_TIMER1 (IRQ_BASE_CPU + IRQ_TIMER1_LEVEL)
61#define IRQ_CPU_TIMER2 (IRQ_BASE_CPU + IRQ_TIMER2_LEVEL)
62#define IRQ_CPU_DMA0 (IRQ_BASE_CPU + IRQ_DMA0_LEVEL)
63#define IRQ_CPU_DMA1 (IRQ_BASE_CPU + IRQ_DMA1_LEVEL)
64#define IRQ_CPU_DMA2 (IRQ_BASE_CPU + IRQ_DMA2_LEVEL)
65#define IRQ_CPU_DMA3 (IRQ_BASE_CPU + IRQ_DMA3_LEVEL)
66#define IRQ_CPU_DMA4 (IRQ_BASE_CPU + IRQ_DMA4_LEVEL)
67#define IRQ_CPU_DMA5 (IRQ_BASE_CPU + IRQ_DMA5_LEVEL)
68#define IRQ_CPU_DMA6 (IRQ_BASE_CPU + IRQ_DMA6_LEVEL)
69#define IRQ_CPU_DMA7 (IRQ_BASE_CPU + IRQ_DMA7_LEVEL)
70#define IRQ_CPU_EXTERNAL0 (IRQ_BASE_CPU + IRQ_XIRQ0_LEVEL)
71#define IRQ_CPU_EXTERNAL1 (IRQ_BASE_CPU + IRQ_XIRQ1_LEVEL)
72#define IRQ_CPU_EXTERNAL2 (IRQ_BASE_CPU + IRQ_XIRQ2_LEVEL)
73#define IRQ_CPU_EXTERNAL3 (IRQ_BASE_CPU + IRQ_XIRQ3_LEVEL)
74#define IRQ_CPU_EXTERNAL4 (IRQ_BASE_CPU + IRQ_XIRQ4_LEVEL)
75#define IRQ_CPU_EXTERNAL5 (IRQ_BASE_CPU + IRQ_XIRQ5_LEVEL)
76#define IRQ_CPU_EXTERNAL6 (IRQ_BASE_CPU + IRQ_XIRQ6_LEVEL)
77#define IRQ_CPU_EXTERNAL7 (IRQ_BASE_CPU + IRQ_XIRQ7_LEVEL)
78
79#endif /* !__ASSEMBLY__ */
80
81#endif /* _ASM_CPU_IRQS_H */
diff --git a/include/asm-frv/cpumask.h b/include/asm-frv/cpumask.h
deleted file mode 100644
index d999c20c84d2..000000000000
--- a/include/asm-frv/cpumask.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef _ASM_CPUMASK_H
2#define _ASM_CPUMASK_H
3
4#include <asm-generic/cpumask.h>
5
6#endif /* _ASM_CPUMASK_H */
diff --git a/include/asm-frv/cputime.h b/include/asm-frv/cputime.h
deleted file mode 100644
index f6c373ad2b80..000000000000
--- a/include/asm-frv/cputime.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef _ASM_CPUTIME_H
2#define _ASM_CPUTIME_H
3
4#include <asm-generic/cputime.h>
5
6#endif /* _ASM_CPUTIME_H */
diff --git a/include/asm-frv/current.h b/include/asm-frv/current.h
deleted file mode 100644
index 86b027491b08..000000000000
--- a/include/asm-frv/current.h
+++ /dev/null
@@ -1,30 +0,0 @@
1/* current.h: FRV current task pointer
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_CURRENT_H
13#define _ASM_CURRENT_H
14
15#ifndef __ASSEMBLY__
16
17/*
18 * dedicate GR29 to keeping the current task pointer
19 */
20register struct task_struct *current asm("gr29");
21
22#define get_current() current
23
24#else
25
26#define CURRENT gr29
27
28#endif
29
30#endif /* _ASM_CURRENT_H */
diff --git a/include/asm-frv/delay.h b/include/asm-frv/delay.h
deleted file mode 100644
index 597b4ebf03b4..000000000000
--- a/include/asm-frv/delay.h
+++ /dev/null
@@ -1,50 +0,0 @@
1/* delay.h: FRV delay code
2 *
3 * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_DELAY_H
13#define _ASM_DELAY_H
14
15#include <asm/param.h>
16#include <asm/timer-regs.h>
17
18/*
19 * delay loop - runs at __core_clock_speed_HZ / 2 [there are 2 insns in the loop]
20 */
21extern unsigned long __delay_loops_MHz;
22
23static inline void __delay(unsigned long loops)
24{
25 asm volatile("1: subicc %0,#1,%0,icc0 \n"
26 " bnc icc0,#2,1b \n"
27 : "=r" (loops)
28 : "0" (loops)
29 : "icc0"
30 );
31}
32
33/*
34 * Use only for very small delays ( < 1 msec). Should probably use a
35 * lookup table, really, as the multiplications take much too long with
36 * short delays. This is a "reasonable" implementation, though (and the
37 * first constant multiplications gets optimized away if the delay is
38 * a constant)
39 */
40
41extern unsigned long loops_per_jiffy;
42
43static inline void udelay(unsigned long usecs)
44{
45 __delay(usecs * __delay_loops_MHz);
46}
47
48#define ndelay(n) udelay((n) * 5)
49
50#endif /* _ASM_DELAY_H */
diff --git a/include/asm-frv/device.h b/include/asm-frv/device.h
deleted file mode 100644
index d8f9872b0e2d..000000000000
--- a/include/asm-frv/device.h
+++ /dev/null
@@ -1,7 +0,0 @@
1/*
2 * Arch specific extensions to struct device
3 *
4 * This file is released under the GPLv2
5 */
6#include <asm-generic/device.h>
7
diff --git a/include/asm-frv/div64.h b/include/asm-frv/div64.h
deleted file mode 100644
index 6cd978cefb28..000000000000
--- a/include/asm-frv/div64.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/div64.h>
diff --git a/include/asm-frv/dm9000.h b/include/asm-frv/dm9000.h
deleted file mode 100644
index f6f48fd9ec6e..000000000000
--- a/include/asm-frv/dm9000.h
+++ /dev/null
@@ -1,37 +0,0 @@
1/* dm9000.h: Davicom DM9000 adapter configuration
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_DM9000_H
13#define _ASM_DM9000_H
14
15#include <asm/mb-regs.h>
16
17#define DM9000_ARCH_IOBASE (__region_CS6 + 0x300)
18#define DM9000_ARCH_IRQ IRQ_CPU_EXTERNAL3 /* XIRQ #3 (shared with FPGA) */
19#undef DM9000_ARCH_IRQ_ACTLOW /* IRQ pin active high */
20#define DM9000_ARCH_BUS_INFO "CS6#+0x300" /* bus info for ethtool */
21
22#undef __is_PCI_IO
23#define __is_PCI_IO(addr) 0 /* not PCI */
24
25#undef inl
26#define inl(addr) \
27({ \
28 unsigned long __ioaddr = (unsigned long) addr; \
29 uint32_t x = readl(__ioaddr); \
30 ((x & 0xff) << 24) | ((x & 0xff00) << 8) | ((x >> 8) & 0xff00) | ((x >> 24) & 0xff); \
31})
32
33#undef insl
34#define insl(a,b,l) __insl(a,b,l,0) /* don't byte-swap */
35
36
37#endif /* _ASM_DM9000_H */
diff --git a/include/asm-frv/dma-mapping.h b/include/asm-frv/dma-mapping.h
deleted file mode 100644
index b2898877c07b..000000000000
--- a/include/asm-frv/dma-mapping.h
+++ /dev/null
@@ -1,174 +0,0 @@
1#ifndef _ASM_DMA_MAPPING_H
2#define _ASM_DMA_MAPPING_H
3
4#include <linux/device.h>
5#include <asm/cache.h>
6#include <asm/cacheflush.h>
7#include <asm/scatterlist.h>
8#include <asm/io.h>
9
10#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
11#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
12
13extern unsigned long __nongprelbss dma_coherent_mem_start;
14extern unsigned long __nongprelbss dma_coherent_mem_end;
15
16void *dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle, gfp_t gfp);
17void dma_free_coherent(struct device *dev, size_t size, void *vaddr, dma_addr_t dma_handle);
18
19/*
20 * Map a single buffer of the indicated size for DMA in streaming mode.
21 * The 32-bit bus address to use is returned.
22 *
23 * Once the device is given the dma address, the device owns this memory
24 * until either pci_unmap_single or pci_dma_sync_single is performed.
25 */
26extern dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size,
27 enum dma_data_direction direction);
28
29/*
30 * Unmap a single streaming mode DMA translation. The dma_addr and size
31 * must match what was provided for in a previous pci_map_single call. All
32 * other usages are undefined.
33 *
34 * After this call, reads by the cpu to the buffer are guarenteed to see
35 * whatever the device wrote there.
36 */
37static inline
38void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
39 enum dma_data_direction direction)
40{
41 BUG_ON(direction == DMA_NONE);
42}
43
44/*
45 * Map a set of buffers described by scatterlist in streaming
46 * mode for DMA. This is the scather-gather version of the
47 * above pci_map_single interface. Here the scatter gather list
48 * elements are each tagged with the appropriate dma address
49 * and length. They are obtained via sg_dma_{address,length}(SG).
50 *
51 * NOTE: An implementation may be able to use a smaller number of
52 * DMA address/length pairs than there are SG table elements.
53 * (for example via virtual mapping capabilities)
54 * The routine returns the number of addr/length pairs actually
55 * used, at most nents.
56 *
57 * Device ownership issues as mentioned above for pci_map_single are
58 * the same here.
59 */
60extern int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
61 enum dma_data_direction direction);
62
63/*
64 * Unmap a set of streaming mode DMA translations.
65 * Again, cpu read rules concerning calls here are the same as for
66 * pci_unmap_single() above.
67 */
68static inline
69void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
70 enum dma_data_direction direction)
71{
72 BUG_ON(direction == DMA_NONE);
73}
74
75extern
76dma_addr_t dma_map_page(struct device *dev, struct page *page, unsigned long offset,
77 size_t size, enum dma_data_direction direction);
78
79static inline
80void dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,
81 enum dma_data_direction direction)
82{
83 BUG_ON(direction == DMA_NONE);
84}
85
86
87static inline
88void dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, size_t size,
89 enum dma_data_direction direction)
90{
91}
92
93static inline
94void dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle, size_t size,
95 enum dma_data_direction direction)
96{
97 flush_write_buffers();
98}
99
100static inline
101void dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle,
102 unsigned long offset, size_t size,
103 enum dma_data_direction direction)
104{
105}
106
107static inline
108void dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle,
109 unsigned long offset, size_t size,
110 enum dma_data_direction direction)
111{
112 flush_write_buffers();
113}
114
115static inline
116void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems,
117 enum dma_data_direction direction)
118{
119}
120
121static inline
122void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems,
123 enum dma_data_direction direction)
124{
125 flush_write_buffers();
126}
127
128static inline
129int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
130{
131 return 0;
132}
133
134static inline
135int dma_supported(struct device *dev, u64 mask)
136{
137 /*
138 * we fall back to GFP_DMA when the mask isn't all 1s,
139 * so we can't guarantee allocations that must be
140 * within a tighter range than GFP_DMA..
141 */
142 if (mask < 0x00ffffff)
143 return 0;
144
145 return 1;
146}
147
148static inline
149int dma_set_mask(struct device *dev, u64 mask)
150{
151 if (!dev->dma_mask || !dma_supported(dev, mask))
152 return -EIO;
153
154 *dev->dma_mask = mask;
155
156 return 0;
157}
158
159static inline
160int dma_get_cache_alignment(void)
161{
162 return 1 << L1_CACHE_SHIFT;
163}
164
165#define dma_is_consistent(d, h) (1)
166
167static inline
168void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
169 enum dma_data_direction direction)
170{
171 flush_write_buffers();
172}
173
174#endif /* _ASM_DMA_MAPPING_H */
diff --git a/include/asm-frv/dma.h b/include/asm-frv/dma.h
deleted file mode 100644
index 683c47d48a5b..000000000000
--- a/include/asm-frv/dma.h
+++ /dev/null
@@ -1,125 +0,0 @@
1/* dma.h: FRV DMA controller management
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_DMA_H
13#define _ASM_DMA_H
14
15//#define DMA_DEBUG 1
16
17#include <linux/interrupt.h>
18
19#undef MAX_DMA_CHANNELS /* don't use kernel/dma.c */
20
21/* under 2.4 this is actually needed by the new bootmem allocator */
22#define MAX_DMA_ADDRESS PAGE_OFFSET
23
24/*
25 * FRV DMA controller management
26 */
27typedef irqreturn_t (*dma_irq_handler_t)(int dmachan, unsigned long cstr, void *data);
28
29extern void frv_dma_init(void);
30
31extern int frv_dma_open(const char *devname,
32 unsigned long dmamask,
33 int dmacap,
34 dma_irq_handler_t handler,
35 unsigned long irq_flags,
36 void *data);
37
38/* channels required */
39#define FRV_DMA_MASK_ANY ULONG_MAX /* any channel */
40
41/* capabilities required */
42#define FRV_DMA_CAP_DREQ 0x01 /* DMA request pin */
43#define FRV_DMA_CAP_DACK 0x02 /* DMA ACK pin */
44#define FRV_DMA_CAP_DONE 0x04 /* DMA done pin */
45
46extern void frv_dma_close(int dma);
47
48extern void frv_dma_config(int dma, unsigned long ccfr, unsigned long cctr, unsigned long apr);
49
50extern void frv_dma_start(int dma,
51 unsigned long sba, unsigned long dba,
52 unsigned long pix, unsigned long six, unsigned long bcl);
53
54extern void frv_dma_restart_circular(int dma, unsigned long six);
55
56extern void frv_dma_stop(int dma);
57
58extern int is_frv_dma_interrupting(int dma);
59
60extern void frv_dma_dump(int dma);
61
62extern void frv_dma_status_clear(int dma);
63
64#define FRV_DMA_NCHANS 8
65#define FRV_DMA_4CHANS 4
66#define FRV_DMA_8CHANS 8
67
68#define DMAC_CCFRx 0x00 /* channel configuration reg */
69#define DMAC_CCFRx_CM_SHIFT 16
70#define DMAC_CCFRx_CM_DA 0x00000000
71#define DMAC_CCFRx_CM_SCA 0x00010000
72#define DMAC_CCFRx_CM_DCA 0x00020000
73#define DMAC_CCFRx_CM_2D 0x00030000
74#define DMAC_CCFRx_ATS_SHIFT 8
75#define DMAC_CCFRx_RS_INTERN 0x00000000
76#define DMAC_CCFRx_RS_EXTERN 0x00000001
77#define DMAC_CCFRx_RS_SHIFT 0
78
79#define DMAC_CSTRx 0x08 /* channel status reg */
80#define DMAC_CSTRx_FS 0x0000003f
81#define DMAC_CSTRx_NE 0x00000100
82#define DMAC_CSTRx_FED 0x00000200
83#define DMAC_CSTRx_WER 0x00000800
84#define DMAC_CSTRx_RER 0x00001000
85#define DMAC_CSTRx_CE 0x00002000
86#define DMAC_CSTRx_INT 0x00800000
87#define DMAC_CSTRx_BUSY 0x80000000
88
89#define DMAC_CCTRx 0x10 /* channel control reg */
90#define DMAC_CCTRx_DSIZ_1 0x00000000
91#define DMAC_CCTRx_DSIZ_2 0x00000001
92#define DMAC_CCTRx_DSIZ_4 0x00000002
93#define DMAC_CCTRx_DSIZ_32 0x00000005
94#define DMAC_CCTRx_DAU_HOLD 0x00000000
95#define DMAC_CCTRx_DAU_INC 0x00000010
96#define DMAC_CCTRx_DAU_DEC 0x00000020
97#define DMAC_CCTRx_SSIZ_1 0x00000000
98#define DMAC_CCTRx_SSIZ_2 0x00000100
99#define DMAC_CCTRx_SSIZ_4 0x00000200
100#define DMAC_CCTRx_SSIZ_32 0x00000500
101#define DMAC_CCTRx_SAU_HOLD 0x00000000
102#define DMAC_CCTRx_SAU_INC 0x00001000
103#define DMAC_CCTRx_SAU_DEC 0x00002000
104#define DMAC_CCTRx_FC 0x08000000
105#define DMAC_CCTRx_ICE 0x10000000
106#define DMAC_CCTRx_IE 0x40000000
107#define DMAC_CCTRx_ACT 0x80000000
108
109#define DMAC_SBAx 0x18 /* source base address reg */
110#define DMAC_DBAx 0x20 /* data base address reg */
111#define DMAC_PIXx 0x28 /* primary index reg */
112#define DMAC_SIXx 0x30 /* secondary index reg */
113#define DMAC_BCLx 0x38 /* byte count limit reg */
114#define DMAC_APRx 0x40 /* alternate pointer reg */
115
116/*
117 * required for PCI + MODULES
118 */
119#ifdef CONFIG_PCI
120extern int isa_dma_bridge_buggy;
121#else
122#define isa_dma_bridge_buggy (0)
123#endif
124
125#endif /* _ASM_DMA_H */
diff --git a/include/asm-frv/elf.h b/include/asm-frv/elf.h
deleted file mode 100644
index 7279ec07d62e..000000000000
--- a/include/asm-frv/elf.h
+++ /dev/null
@@ -1,142 +0,0 @@
1/* elf.h: FR-V ELF definitions
2 *
3 * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 * - Derived from include/asm-m68knommu/elf.h
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12#ifndef __ASM_ELF_H
13#define __ASM_ELF_H
14
15#include <asm/ptrace.h>
16#include <asm/user.h>
17
18struct elf32_hdr;
19
20/*
21 * ELF header e_flags defines.
22 */
23#define EF_FRV_GPR_MASK 0x00000003 /* mask for # of gprs */
24#define EF_FRV_GPR32 0x00000001 /* Only uses GR on 32-register */
25#define EF_FRV_GPR64 0x00000002 /* Only uses GR on 64-register */
26#define EF_FRV_FPR_MASK 0x0000000c /* mask for # of fprs */
27#define EF_FRV_FPR32 0x00000004 /* Only uses FR on 32-register */
28#define EF_FRV_FPR64 0x00000008 /* Only uses FR on 64-register */
29#define EF_FRV_FPR_NONE 0x0000000C /* Uses software floating-point */
30#define EF_FRV_DWORD_MASK 0x00000030 /* mask for dword support */
31#define EF_FRV_DWORD_YES 0x00000010 /* Assumes stack aligned to 8-byte boundaries. */
32#define EF_FRV_DWORD_NO 0x00000020 /* Assumes stack aligned to 4-byte boundaries. */
33#define EF_FRV_DOUBLE 0x00000040 /* Uses double instructions. */
34#define EF_FRV_MEDIA 0x00000080 /* Uses media instructions. */
35#define EF_FRV_PIC 0x00000100 /* Uses position independent code. */
36#define EF_FRV_NON_PIC_RELOCS 0x00000200 /* Does not use position Independent code. */
37#define EF_FRV_MULADD 0x00000400 /* -mmuladd */
38#define EF_FRV_BIGPIC 0x00000800 /* -fPIC */
39#define EF_FRV_LIBPIC 0x00001000 /* -mlibrary-pic */
40#define EF_FRV_G0 0x00002000 /* -G 0, no small data ptr */
41#define EF_FRV_NOPACK 0x00004000 /* -mnopack */
42#define EF_FRV_FDPIC 0x00008000 /* -mfdpic */
43#define EF_FRV_CPU_MASK 0xff000000 /* specific cpu bits */
44#define EF_FRV_CPU_GENERIC 0x00000000 /* Set CPU type is FR-V */
45#define EF_FRV_CPU_FR500 0x01000000 /* Set CPU type is FR500 */
46#define EF_FRV_CPU_FR300 0x02000000 /* Set CPU type is FR300 */
47#define EF_FRV_CPU_SIMPLE 0x03000000 /* SIMPLE */
48#define EF_FRV_CPU_TOMCAT 0x04000000 /* Tomcat, FR500 prototype */
49#define EF_FRV_CPU_FR400 0x05000000 /* Set CPU type is FR400 */
50#define EF_FRV_CPU_FR550 0x06000000 /* Set CPU type is FR550 */
51#define EF_FRV_CPU_FR405 0x07000000 /* Set CPU type is FR405 */
52#define EF_FRV_CPU_FR450 0x08000000 /* Set CPU type is FR450 */
53
54/*
55 * FR-V ELF relocation types
56 */
57
58
59/*
60 * ELF register definitions..
61 */
62typedef unsigned long elf_greg_t;
63
64#define ELF_NGREG (sizeof(struct pt_regs) / sizeof(elf_greg_t))
65typedef elf_greg_t elf_gregset_t[ELF_NGREG];
66
67typedef struct user_fpmedia_regs elf_fpregset_t;
68
69/*
70 * This is used to ensure we don't load something for the wrong architecture.
71 */
72extern int elf_check_arch(const struct elf32_hdr *hdr);
73
74#define elf_check_fdpic(x) ((x)->e_flags & EF_FRV_FDPIC && !((x)->e_flags & EF_FRV_NON_PIC_RELOCS))
75#define elf_check_const_displacement(x) ((x)->e_flags & EF_FRV_PIC)
76
77/*
78 * These are used to set parameters in the core dumps.
79 */
80#define ELF_CLASS ELFCLASS32
81#define ELF_DATA ELFDATA2MSB
82#define ELF_ARCH EM_FRV
83
84#define ELF_PLAT_INIT(_r) \
85do { \
86 __kernel_frame0_ptr->gr16 = 0; \
87 __kernel_frame0_ptr->gr17 = 0; \
88 __kernel_frame0_ptr->gr18 = 0; \
89 __kernel_frame0_ptr->gr19 = 0; \
90 __kernel_frame0_ptr->gr20 = 0; \
91 __kernel_frame0_ptr->gr21 = 0; \
92 __kernel_frame0_ptr->gr22 = 0; \
93 __kernel_frame0_ptr->gr23 = 0; \
94 __kernel_frame0_ptr->gr24 = 0; \
95 __kernel_frame0_ptr->gr25 = 0; \
96 __kernel_frame0_ptr->gr26 = 0; \
97 __kernel_frame0_ptr->gr27 = 0; \
98 __kernel_frame0_ptr->gr29 = 0; \
99} while(0)
100
101#define ELF_FDPIC_PLAT_INIT(_regs, _exec_map_addr, _interp_map_addr, _dynamic_addr) \
102do { \
103 __kernel_frame0_ptr->gr16 = _exec_map_addr; \
104 __kernel_frame0_ptr->gr17 = _interp_map_addr; \
105 __kernel_frame0_ptr->gr18 = _dynamic_addr; \
106 __kernel_frame0_ptr->gr19 = 0; \
107 __kernel_frame0_ptr->gr20 = 0; \
108 __kernel_frame0_ptr->gr21 = 0; \
109 __kernel_frame0_ptr->gr22 = 0; \
110 __kernel_frame0_ptr->gr23 = 0; \
111 __kernel_frame0_ptr->gr24 = 0; \
112 __kernel_frame0_ptr->gr25 = 0; \
113 __kernel_frame0_ptr->gr26 = 0; \
114 __kernel_frame0_ptr->gr27 = 0; \
115 __kernel_frame0_ptr->gr29 = 0; \
116} while(0)
117
118#define USE_ELF_CORE_DUMP
119#define ELF_FDPIC_CORE_EFLAGS EF_FRV_FDPIC
120#define ELF_EXEC_PAGESIZE 16384
121
122/* This is the location that an ET_DYN program is loaded if exec'ed. Typical
123 use of this is to invoke "./ld.so someprog" to test out a new version of
124 the loader. We need to make sure that it is out of the way of the program
125 that it will "exec", and that there is sufficient room for the brk. */
126
127#define ELF_ET_DYN_BASE 0x08000000UL
128
129/* This yields a mask that user programs can use to figure out what
130 instruction set this cpu supports. */
131
132#define ELF_HWCAP (0)
133
134/* This yields a string that ld.so will use to load implementation
135 specific libraries for optimization. This is more specific in
136 intent than poking at uname or /proc/cpuinfo. */
137
138#define ELF_PLATFORM (NULL)
139
140#define SET_PERSONALITY(ex) set_personality(PER_LINUX)
141
142#endif
diff --git a/include/asm-frv/emergency-restart.h b/include/asm-frv/emergency-restart.h
deleted file mode 100644
index 108d8c48e42e..000000000000
--- a/include/asm-frv/emergency-restart.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef _ASM_EMERGENCY_RESTART_H
2#define _ASM_EMERGENCY_RESTART_H
3
4#include <asm-generic/emergency-restart.h>
5
6#endif /* _ASM_EMERGENCY_RESTART_H */
diff --git a/include/asm-frv/errno.h b/include/asm-frv/errno.h
deleted file mode 100644
index d010795ceefe..000000000000
--- a/include/asm-frv/errno.h
+++ /dev/null
@@ -1,7 +0,0 @@
1#ifndef _ASM_ERRNO_H
2#define _ASM_ERRNO_H
3
4#include <asm-generic/errno.h>
5
6#endif /* _ASM_ERRNO_H */
7
diff --git a/include/asm-frv/fb.h b/include/asm-frv/fb.h
deleted file mode 100644
index c7df38030992..000000000000
--- a/include/asm-frv/fb.h
+++ /dev/null
@@ -1,12 +0,0 @@
1#ifndef _ASM_FB_H_
2#define _ASM_FB_H_
3#include <linux/fb.h>
4
5#define fb_pgprotect(...) do {} while (0)
6
7static inline int fb_is_primary_device(struct fb_info *info)
8{
9 return 0;
10}
11
12#endif /* _ASM_FB_H_ */
diff --git a/include/asm-frv/fcntl.h b/include/asm-frv/fcntl.h
deleted file mode 100644
index 46ab12db5739..000000000000
--- a/include/asm-frv/fcntl.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/fcntl.h>
diff --git a/include/asm-frv/fpu.h b/include/asm-frv/fpu.h
deleted file mode 100644
index d73c60b56641..000000000000
--- a/include/asm-frv/fpu.h
+++ /dev/null
@@ -1,11 +0,0 @@
1#ifndef __ASM_FPU_H
2#define __ASM_FPU_H
3
4
5/*
6 * MAX floating point unit state size (FSAVE/FRESTORE)
7 */
8
9#define kernel_fpu_end() do { asm volatile("bar":::"memory"); preempt_enable(); } while(0)
10
11#endif /* __ASM_FPU_H */
diff --git a/include/asm-frv/ftrace.h b/include/asm-frv/ftrace.h
deleted file mode 100644
index 40a8c178f10d..000000000000
--- a/include/asm-frv/ftrace.h
+++ /dev/null
@@ -1 +0,0 @@
1/* empty */
diff --git a/include/asm-frv/futex.h b/include/asm-frv/futex.h
deleted file mode 100644
index 08b3d1da3583..000000000000
--- a/include/asm-frv/futex.h
+++ /dev/null
@@ -1,19 +0,0 @@
1#ifndef _ASM_FUTEX_H
2#define _ASM_FUTEX_H
3
4#ifdef __KERNEL__
5
6#include <linux/futex.h>
7#include <asm/errno.h>
8#include <asm/uaccess.h>
9
10extern int futex_atomic_op_inuser(int encoded_op, int __user *uaddr);
11
12static inline int
13futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval)
14{
15 return -ENOSYS;
16}
17
18#endif
19#endif
diff --git a/include/asm-frv/gdb-stub.h b/include/asm-frv/gdb-stub.h
deleted file mode 100644
index 24f9738670bd..000000000000
--- a/include/asm-frv/gdb-stub.h
+++ /dev/null
@@ -1,140 +0,0 @@
1/* gdb-stub.h: FRV GDB stub
2 *
3 * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 * - Derived from asm-mips/gdb-stub.h (c) 1995 Andreas Busse
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12#ifndef __ASM_GDB_STUB_H
13#define __ASM_GDB_STUB_H
14
15#undef GDBSTUB_DEBUG_PROTOCOL
16
17#include <asm/ptrace.h>
18
19/*
20 * important register numbers in GDB protocol
21 * - GR0, GR1, GR2, GR3, GR4, GR5, GR6, GR7,
22 * - GR8, GR9, GR10, GR11, GR12, GR13, GR14, GR15,
23 * - GR16, GR17, GR18, GR19, GR20, GR21, GR22, GR23,
24 * - GR24, GR25, GR26, GR27, GR28, GR29, GR30, GR31,
25 * - GR32, GR33, GR34, GR35, GR36, GR37, GR38, GR39,
26 * - GR40, GR41, GR42, GR43, GR44, GR45, GR46, GR47,
27 * - GR48, GR49, GR50, GR51, GR52, GR53, GR54, GR55,
28 * - GR56, GR57, GR58, GR59, GR60, GR61, GR62, GR63,
29 * - FR0, FR1, FR2, FR3, FR4, FR5, FR6, FR7,
30 * - FR8, FR9, FR10, FR11, FR12, FR13, FR14, FR15,
31 * - FR16, FR17, FR18, FR19, FR20, FR21, FR22, FR23,
32 * - FR24, FR25, FR26, FR27, FR28, FR29, FR30, FR31,
33 * - FR32, FR33, FR34, FR35, FR36, FR37, FR38, FR39,
34 * - FR40, FR41, FR42, FR43, FR44, FR45, FR46, FR47,
35 * - FR48, FR49, FR50, FR51, FR52, FR53, FR54, FR55,
36 * - FR56, FR57, FR58, FR59, FR60, FR61, FR62, FR63,
37 * - PC, PSR, CCR, CCCR,
38 * - _X132, _X133, _X134
39 * - TBR, BRR, DBAR0, DBAR1, DBAR2, DBAR3,
40 * - SCR0, SCR1, SCR2, SCR3,
41 * - LR, LCR,
42 * - IACC0H, IACC0L,
43 * - FSR0,
44 * - ACC0, ACC1, ACC2, ACC3, ACC4, ACC5, ACC6, ACC7,
45 * - ACCG0123, ACCG4567,
46 * - MSR0, MSR1,
47 * - GNER0, GNER1,
48 * - FNER0, FNER1,
49 */
50#define GDB_REG_GR(N) (N)
51#define GDB_REG_FR(N) (64+(N))
52#define GDB_REG_PC 128
53#define GDB_REG_PSR 129
54#define GDB_REG_CCR 130
55#define GDB_REG_CCCR 131
56#define GDB_REG_TBR 135
57#define GDB_REG_BRR 136
58#define GDB_REG_DBAR(N) (137+(N))
59#define GDB_REG_SCR(N) (141+(N))
60#define GDB_REG_LR 145
61#define GDB_REG_LCR 146
62#define GDB_REG_FSR0 149
63#define GDB_REG_ACC(N) (150+(N))
64#define GDB_REG_ACCG(N) (158+(N)/4)
65#define GDB_REG_MSR(N) (160+(N))
66#define GDB_REG_GNER(N) (162+(N))
67#define GDB_REG_FNER(N) (164+(N))
68
69#define GDB_REG_SP GDB_REG_GR(1)
70#define GDB_REG_FP GDB_REG_GR(2)
71
72#ifndef _LANGUAGE_ASSEMBLY
73
74/*
75 * Prototypes
76 */
77extern void show_registers_only(struct pt_regs *regs);
78
79extern void gdbstub_init(void);
80extern void gdbstub(int type);
81extern void gdbstub_exit(int status);
82
83extern void gdbstub_io_init(void);
84extern void gdbstub_set_baud(unsigned baud);
85extern int gdbstub_rx_char(unsigned char *_ch, int nonblock);
86extern void gdbstub_tx_char(unsigned char ch);
87extern void gdbstub_tx_flush(void);
88extern void gdbstub_do_rx(void);
89
90extern asmlinkage void __debug_stub_init_break(void);
91extern asmlinkage void __break_hijack_kernel_event(void);
92extern asmlinkage void __break_hijack_kernel_event_breaks_here(void);
93extern asmlinkage void start_kernel(void);
94
95extern asmlinkage void gdbstub_rx_handler(void);
96extern asmlinkage void gdbstub_rx_irq(void);
97extern asmlinkage void gdbstub_intercept(void);
98
99extern uint32_t __entry_usertrap_table[];
100extern uint32_t __entry_kerneltrap_table[];
101
102extern volatile u8 gdbstub_rx_buffer[PAGE_SIZE];
103extern volatile u32 gdbstub_rx_inp;
104extern volatile u32 gdbstub_rx_outp;
105extern volatile u8 gdbstub_rx_overflow;
106extern u8 gdbstub_rx_unget;
107
108extern void gdbstub_printk(const char *fmt, ...);
109extern void debug_to_serial(const char *p, int n);
110extern void console_set_baud(unsigned baud);
111
112#ifdef GDBSTUB_DEBUG_PROTOCOL
113#define gdbstub_proto(FMT,...) gdbstub_printk(FMT,##__VA_ARGS__)
114#else
115#define gdbstub_proto(FMT,...) ({ 0; })
116#endif
117
118/*
119 * we dedicate GR31 to keeping a pointer to the gdbstub exception frame
120 * - gr31 is destroyed on entry to the gdbstub if !MMU
121 * - gr31 is saved in scr3 on entry to the gdbstub if in !MMU
122 */
123register struct frv_frame0 *__debug_frame0 asm("gr31");
124
125#define __debug_frame (&__debug_frame0->regs)
126#define __debug_user_context (&__debug_frame0->uc)
127#define __debug_regs (&__debug_frame0->debug)
128#define __debug_reg(X) ((unsigned long *) ((unsigned long) &__debug_frame0 + (X)))
129
130struct frv_debug_status {
131 unsigned long bpsr;
132 unsigned long dcr;
133 unsigned long brr;
134 unsigned long nmar;
135};
136
137extern struct frv_debug_status __debug_status;
138
139#endif /* _LANGUAGE_ASSEMBLY */
140#endif /* __ASM_GDB_STUB_H */
diff --git a/include/asm-frv/gpio-regs.h b/include/asm-frv/gpio-regs.h
deleted file mode 100644
index 9edf5d5d4d3f..000000000000
--- a/include/asm-frv/gpio-regs.h
+++ /dev/null
@@ -1,116 +0,0 @@
1/* gpio-regs.h: on-chip general purpose I/O registers
2 *
3 * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_GPIO_REGS
13#define _ASM_GPIO_REGS
14
15#define __reg(ADDR) (*(volatile unsigned long *)(ADDR))
16
17#define __get_PDR() ({ __reg(0xfeff0400); })
18#define __set_PDR(V) do { __reg(0xfeff0400) = (V); mb(); } while(0)
19
20#define __get_GPDR() ({ __reg(0xfeff0408); })
21#define __set_GPDR(V) do { __reg(0xfeff0408) = (V); mb(); } while(0)
22
23#define __get_SIR() ({ __reg(0xfeff0410); })
24#define __set_SIR(V) do { __reg(0xfeff0410) = (V); mb(); } while(0)
25
26#define __get_SOR() ({ __reg(0xfeff0418); })
27#define __set_SOR(V) do { __reg(0xfeff0418) = (V); mb(); } while(0)
28
29#define __set_PDSR(V) do { __reg(0xfeff0420) = (V); mb(); } while(0)
30
31#define __set_PDCR(V) do { __reg(0xfeff0428) = (V); mb(); } while(0)
32
33#define __get_RSTR() ({ __reg(0xfeff0500); })
34#define __set_RSTR(V) do { __reg(0xfeff0500) = (V); mb(); } while(0)
35
36
37
38/* PDR definitions */
39#define PDR_GPIO_DATA(X) (1 << (X))
40
41/* GPDR definitions */
42#define GPDR_INPUT 0
43#define GPDR_OUTPUT 1
44#define GPDR_DREQ0_BIT 0x00001000
45#define GPDR_DREQ1_BIT 0x00008000
46#define GPDR_DREQ2_BIT 0x00040000
47#define GPDR_DREQ3_BIT 0x00080000
48#define GPDR_DREQ4_BIT 0x00004000
49#define GPDR_DREQ5_BIT 0x00020000
50#define GPDR_DREQ6_BIT 0x00100000
51#define GPDR_DREQ7_BIT 0x00200000
52#define GPDR_DACK0_BIT 0x00002000
53#define GPDR_DACK1_BIT 0x00010000
54#define GPDR_DACK2_BIT 0x00100000
55#define GPDR_DACK3_BIT 0x00200000
56#define GPDR_DONE0_BIT 0x00004000
57#define GPDR_DONE1_BIT 0x00020000
58#define GPDR_GPIO_DIR(X,D) ((D) << (X))
59
60/* SIR definitions */
61#define SIR_GPIO_INPUT 0
62#define SIR_DREQ7_INPUT 0x00200000
63#define SIR_DREQ6_INPUT 0x00100000
64#define SIR_DREQ3_INPUT 0x00080000
65#define SIR_DREQ2_INPUT 0x00040000
66#define SIR_DREQ5_INPUT 0x00020000
67#define SIR_DREQ1_INPUT 0x00008000
68#define SIR_DREQ4_INPUT 0x00004000
69#define SIR_DREQ0_INPUT 0x00001000
70#define SIR_RXD1_INPUT 0x00000400
71#define SIR_CTS0_INPUT 0x00000100
72#define SIR_RXD0_INPUT 0x00000040
73#define SIR_GATE1_INPUT 0x00000020
74#define SIR_GATE0_INPUT 0x00000010
75#define SIR_IRQ3_INPUT 0x00000008
76#define SIR_IRQ2_INPUT 0x00000004
77#define SIR_IRQ1_INPUT 0x00000002
78#define SIR_IRQ0_INPUT 0x00000001
79#define SIR_DREQ_BITS (SIR_DREQ0_INPUT | SIR_DREQ1_INPUT | \
80 SIR_DREQ2_INPUT | SIR_DREQ3_INPUT | \
81 SIR_DREQ4_INPUT | SIR_DREQ5_INPUT | \
82 SIR_DREQ6_INPUT | SIR_DREQ7_INPUT)
83
84/* SOR definitions */
85#define SOR_GPIO_OUTPUT 0
86#define SOR_DACK3_OUTPUT 0x00200000
87#define SOR_DACK2_OUTPUT 0x00100000
88#define SOR_DONE1_OUTPUT 0x00020000
89#define SOR_DACK1_OUTPUT 0x00010000
90#define SOR_DONE0_OUTPUT 0x00004000
91#define SOR_DACK0_OUTPUT 0x00002000
92#define SOR_TXD1_OUTPUT 0x00000800
93#define SOR_RTS0_OUTPUT 0x00000200
94#define SOR_TXD0_OUTPUT 0x00000080
95#define SOR_TOUT1_OUTPUT 0x00000020
96#define SOR_TOUT0_OUTPUT 0x00000010
97#define SOR_DONE_BITS (SOR_DONE0_OUTPUT | SOR_DONE1_OUTPUT)
98#define SOR_DACK_BITS (SOR_DACK0_OUTPUT | SOR_DACK1_OUTPUT | \
99 SOR_DACK2_OUTPUT | SOR_DACK3_OUTPUT)
100
101/* PDSR definitions */
102#define PDSR_UNCHANGED 0
103#define PDSR_SET_BIT(X) (1 << (X))
104
105/* PDCR definitions */
106#define PDCR_UNCHANGED 0
107#define PDCR_CLEAR_BIT(X) (1 << (X))
108
109/* RSTR definitions */
110/* Read Only */
111#define RSTR_POWERON 0x00000400
112#define RSTR_SOFTRESET_STATUS 0x00000100
113/* Write Only */
114#define RSTR_SOFTRESET 0x00000001
115
116#endif /* _ASM_GPIO_REGS */
diff --git a/include/asm-frv/hardirq.h b/include/asm-frv/hardirq.h
deleted file mode 100644
index fc47515822a2..000000000000
--- a/include/asm-frv/hardirq.h
+++ /dev/null
@@ -1,35 +0,0 @@
1/* hardirq.h: FRV hardware IRQ management
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef __ASM_HARDIRQ_H
13#define __ASM_HARDIRQ_H
14
15#include <linux/threads.h>
16#include <linux/irq.h>
17
18typedef struct {
19 unsigned int __softirq_pending;
20 unsigned long idle_timestamp;
21} ____cacheline_aligned irq_cpustat_t;
22
23#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
24
25#ifdef CONFIG_SMP
26#error SMP not available on FR-V
27#endif /* CONFIG_SMP */
28
29extern atomic_t irq_err_count;
30static inline void ack_bad_irq(int irq)
31{
32 atomic_inc(&irq_err_count);
33}
34
35#endif
diff --git a/include/asm-frv/highmem.h b/include/asm-frv/highmem.h
deleted file mode 100644
index 68e4677fb9e7..000000000000
--- a/include/asm-frv/highmem.h
+++ /dev/null
@@ -1,182 +0,0 @@
1/* highmem.h: virtual kernel memory mappings for high memory
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 * - Derived from include/asm-i386/highmem.h
6 *
7 * See Documentation/frv/mmu-layout.txt for more information.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version
12 * 2 of the License, or (at your option) any later version.
13 */
14
15#ifndef _ASM_HIGHMEM_H
16#define _ASM_HIGHMEM_H
17
18#ifdef __KERNEL__
19
20#include <linux/init.h>
21#include <linux/highmem.h>
22#include <asm/mem-layout.h>
23#include <asm/spr-regs.h>
24#include <asm/mb-regs.h>
25
26#define NR_TLB_LINES 64 /* number of lines in the TLB */
27
28#ifndef __ASSEMBLY__
29
30#include <linux/interrupt.h>
31#include <asm/kmap_types.h>
32#include <asm/pgtable.h>
33
34#ifdef CONFIG_DEBUG_HIGHMEM
35#define HIGHMEM_DEBUG 1
36#else
37#define HIGHMEM_DEBUG 0
38#endif
39
40/* declarations for highmem.c */
41extern unsigned long highstart_pfn, highend_pfn;
42
43#define kmap_prot PAGE_KERNEL
44#define kmap_pte ______kmap_pte_in_TLB
45extern pte_t *pkmap_page_table;
46
47#define flush_cache_kmaps() do { } while (0)
48
49/*
50 * Right now we initialize only a single pte table. It can be extended
51 * easily, subsequent pte tables have to be allocated in one physical
52 * chunk of RAM.
53 */
54#define LAST_PKMAP PTRS_PER_PTE
55#define LAST_PKMAP_MASK (LAST_PKMAP - 1)
56#define PKMAP_NR(virt) ((virt - PKMAP_BASE) >> PAGE_SHIFT)
57#define PKMAP_ADDR(nr) (PKMAP_BASE + ((nr) << PAGE_SHIFT))
58
59extern void *kmap_high(struct page *page);
60extern void kunmap_high(struct page *page);
61
62extern void *kmap(struct page *page);
63extern void kunmap(struct page *page);
64
65extern struct page *kmap_atomic_to_page(void *ptr);
66
67#endif /* !__ASSEMBLY__ */
68
69/*
70 * The use of kmap_atomic/kunmap_atomic is discouraged - kmap/kunmap
71 * gives a more generic (and caching) interface. But kmap_atomic can
72 * be used in IRQ contexts, so in some (very limited) cases we need
73 * it.
74 */
75#define KMAP_ATOMIC_CACHE_DAMR 8
76
77#ifndef __ASSEMBLY__
78
79#define __kmap_atomic_primary(type, paddr, ampr) \
80({ \
81 unsigned long damlr, dampr; \
82 \
83 dampr = paddr | xAMPRx_L | xAMPRx_M | xAMPRx_S | xAMPRx_SS_16Kb | xAMPRx_V; \
84 \
85 if (type != __KM_CACHE) \
86 asm volatile("movgs %0,dampr"#ampr :: "r"(dampr) : "memory"); \
87 else \
88 asm volatile("movgs %0,iampr"#ampr"\n" \
89 "movgs %0,dampr"#ampr"\n" \
90 :: "r"(dampr) : "memory" \
91 ); \
92 \
93 asm("movsg damlr"#ampr",%0" : "=r"(damlr)); \
94 \
95 /*printk("DAMR"#ampr": PRIM sl=%d L=%08lx P=%08lx\n", type, damlr, dampr);*/ \
96 \
97 (void *) damlr; \
98})
99
100#define __kmap_atomic_secondary(slot, paddr) \
101({ \
102 unsigned long damlr = KMAP_ATOMIC_SECONDARY_FRAME + (slot) * PAGE_SIZE; \
103 unsigned long dampr = paddr | xAMPRx_L | xAMPRx_M | xAMPRx_S | xAMPRx_SS_16Kb | xAMPRx_V; \
104 \
105 asm volatile("movgs %0,tplr \n" \
106 "movgs %1,tppr \n" \
107 "tlbpr %0,gr0,#2,#1" \
108 : : "r"(damlr), "r"(dampr) : "memory"); \
109 \
110 /*printk("TLB: SECN sl=%d L=%08lx P=%08lx\n", slot, damlr, dampr);*/ \
111 \
112 (void *) damlr; \
113})
114
115static inline void *kmap_atomic(struct page *page, enum km_type type)
116{
117 unsigned long paddr;
118
119 pagefault_disable();
120 debug_kmap_atomic(type);
121 paddr = page_to_phys(page);
122
123 switch (type) {
124 case 0: return __kmap_atomic_primary(0, paddr, 2);
125 case 1: return __kmap_atomic_primary(1, paddr, 3);
126 case 2: return __kmap_atomic_primary(2, paddr, 4);
127 case 3: return __kmap_atomic_primary(3, paddr, 5);
128 case 4: return __kmap_atomic_primary(4, paddr, 6);
129 case 5: return __kmap_atomic_primary(5, paddr, 7);
130 case 6: return __kmap_atomic_primary(6, paddr, 8);
131 case 7: return __kmap_atomic_primary(7, paddr, 9);
132 case 8: return __kmap_atomic_primary(8, paddr, 10);
133
134 case 9 ... 9 + NR_TLB_LINES - 1:
135 return __kmap_atomic_secondary(type - 9, paddr);
136
137 default:
138 BUG();
139 return NULL;
140 }
141}
142
143#define __kunmap_atomic_primary(type, ampr) \
144do { \
145 asm volatile("movgs gr0,dampr"#ampr"\n" ::: "memory"); \
146 if (type == __KM_CACHE) \
147 asm volatile("movgs gr0,iampr"#ampr"\n" ::: "memory"); \
148} while(0)
149
150#define __kunmap_atomic_secondary(slot, vaddr) \
151do { \
152 asm volatile("tlbpr %0,gr0,#4,#1" : : "r"(vaddr) : "memory"); \
153} while(0)
154
155static inline void kunmap_atomic(void *kvaddr, enum km_type type)
156{
157 switch (type) {
158 case 0: __kunmap_atomic_primary(0, 2); break;
159 case 1: __kunmap_atomic_primary(1, 3); break;
160 case 2: __kunmap_atomic_primary(2, 4); break;
161 case 3: __kunmap_atomic_primary(3, 5); break;
162 case 4: __kunmap_atomic_primary(4, 6); break;
163 case 5: __kunmap_atomic_primary(5, 7); break;
164 case 6: __kunmap_atomic_primary(6, 8); break;
165 case 7: __kunmap_atomic_primary(7, 9); break;
166 case 8: __kunmap_atomic_primary(8, 10); break;
167
168 case 9 ... 9 + NR_TLB_LINES - 1:
169 __kunmap_atomic_secondary(type - 9, kvaddr);
170 break;
171
172 default:
173 BUG();
174 }
175 pagefault_enable();
176}
177
178#endif /* !__ASSEMBLY__ */
179
180#endif /* __KERNEL__ */
181
182#endif /* _ASM_HIGHMEM_H */
diff --git a/include/asm-frv/hw_irq.h b/include/asm-frv/hw_irq.h
deleted file mode 100644
index 522ad37923d8..000000000000
--- a/include/asm-frv/hw_irq.h
+++ /dev/null
@@ -1,16 +0,0 @@
1/* hw_irq.h: FR-V specific h/w IRQ stuff
2 *
3 * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_HW_IRQ_H
13#define _ASM_HW_IRQ_H
14
15
16#endif /* _ASM_HW_IRQ_H */
diff --git a/include/asm-frv/init.h b/include/asm-frv/init.h
deleted file mode 100644
index 8b15838de216..000000000000
--- a/include/asm-frv/init.h
+++ /dev/null
@@ -1,12 +0,0 @@
1#ifndef _ASM_INIT_H
2#define _ASM_INIT_H
3
4#define __init __attribute__ ((__section__ (".text.init")))
5#define __initdata __attribute__ ((__section__ (".data.init")))
6/* For assembly routines */
7#define __INIT .section ".text.init",#alloc,#execinstr
8#define __FINIT .previous
9#define __INITDATA .section ".data.init",#alloc,#write
10
11#endif
12
diff --git a/include/asm-frv/io.h b/include/asm-frv/io.h
deleted file mode 100644
index ca7475e73b5e..000000000000
--- a/include/asm-frv/io.h
+++ /dev/null
@@ -1,392 +0,0 @@
1/* io.h: FRV I/O operations
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 *
11 * This gets interesting when talking to the PCI bus - the CPU is in big endian
12 * mode, the PCI bus is little endian and the hardware in the middle can do
13 * byte swapping
14 */
15#ifndef _ASM_IO_H
16#define _ASM_IO_H
17
18#ifdef __KERNEL__
19
20#include <linux/types.h>
21#include <asm/virtconvert.h>
22#include <asm/string.h>
23#include <asm/mb-regs.h>
24#include <linux/delay.h>
25
26/*
27 * swap functions are sometimes needed to interface little-endian hardware
28 */
29
30static inline unsigned short _swapw(unsigned short v)
31{
32 return ((v << 8) | (v >> 8));
33}
34
35static inline unsigned long _swapl(unsigned long v)
36{
37 return ((v << 24) | ((v & 0xff00) << 8) | ((v & 0xff0000) >> 8) | (v >> 24));
38}
39
40//#define __iormb() asm volatile("membar")
41//#define __iowmb() asm volatile("membar")
42
43#define __raw_readb __builtin_read8
44#define __raw_readw __builtin_read16
45#define __raw_readl __builtin_read32
46
47#define __raw_writeb(datum, addr) __builtin_write8(addr, datum)
48#define __raw_writew(datum, addr) __builtin_write16(addr, datum)
49#define __raw_writel(datum, addr) __builtin_write32(addr, datum)
50
51static inline void io_outsb(unsigned int addr, const void *buf, int len)
52{
53 unsigned long __ioaddr = (unsigned long) addr;
54 const uint8_t *bp = buf;
55
56 while (len--)
57 __builtin_write8((volatile void __iomem *) __ioaddr, *bp++);
58}
59
60static inline void io_outsw(unsigned int addr, const void *buf, int len)
61{
62 unsigned long __ioaddr = (unsigned long) addr;
63 const uint16_t *bp = buf;
64
65 while (len--)
66 __builtin_write16((volatile void __iomem *) __ioaddr, (*bp++));
67}
68
69extern void __outsl_ns(unsigned int addr, const void *buf, int len);
70extern void __outsl_sw(unsigned int addr, const void *buf, int len);
71static inline void __outsl(unsigned int addr, const void *buf, int len, int swap)
72{
73 unsigned long __ioaddr = (unsigned long) addr;
74
75 if (!swap)
76 __outsl_ns(__ioaddr, buf, len);
77 else
78 __outsl_sw(__ioaddr, buf, len);
79}
80
81static inline void io_insb(unsigned long addr, void *buf, int len)
82{
83 uint8_t *bp = buf;
84
85 while (len--)
86 *bp++ = __builtin_read8((volatile void __iomem *) addr);
87}
88
89static inline void io_insw(unsigned long addr, void *buf, int len)
90{
91 uint16_t *bp = buf;
92
93 while (len--)
94 *bp++ = __builtin_read16((volatile void __iomem *) addr);
95}
96
97extern void __insl_ns(unsigned long addr, void *buf, int len);
98extern void __insl_sw(unsigned long addr, void *buf, int len);
99static inline void __insl(unsigned long addr, void *buf, int len, int swap)
100{
101 if (!swap)
102 __insl_ns(addr, buf, len);
103 else
104 __insl_sw(addr, buf, len);
105}
106
107#define mmiowb() mb()
108
109/*
110 * make the short names macros so specific devices
111 * can override them as required
112 */
113
114static inline void memset_io(volatile void __iomem *addr, unsigned char val, int count)
115{
116 memset((void __force *) addr, val, count);
117}
118
119static inline void memcpy_fromio(void *dst, const volatile void __iomem *src, int count)
120{
121 memcpy(dst, (void __force *) src, count);
122}
123
124static inline void memcpy_toio(volatile void __iomem *dst, const void *src, int count)
125{
126 memcpy((void __force *) dst, src, count);
127}
128
129static inline uint8_t inb(unsigned long addr)
130{
131 return __builtin_read8((void __iomem *)addr);
132}
133
134static inline uint16_t inw(unsigned long addr)
135{
136 uint16_t ret = __builtin_read16((void __iomem *)addr);
137
138 if (__is_PCI_IO(addr))
139 ret = _swapw(ret);
140
141 return ret;
142}
143
144static inline uint32_t inl(unsigned long addr)
145{
146 uint32_t ret = __builtin_read32((void __iomem *)addr);
147
148 if (__is_PCI_IO(addr))
149 ret = _swapl(ret);
150
151 return ret;
152}
153
154static inline void outb(uint8_t datum, unsigned long addr)
155{
156 __builtin_write8((void __iomem *)addr, datum);
157}
158
159static inline void outw(uint16_t datum, unsigned long addr)
160{
161 if (__is_PCI_IO(addr))
162 datum = _swapw(datum);
163 __builtin_write16((void __iomem *)addr, datum);
164}
165
166static inline void outl(uint32_t datum, unsigned long addr)
167{
168 if (__is_PCI_IO(addr))
169 datum = _swapl(datum);
170 __builtin_write32((void __iomem *)addr, datum);
171}
172
173#define inb_p(addr) inb(addr)
174#define inw_p(addr) inw(addr)
175#define inl_p(addr) inl(addr)
176#define outb_p(x,addr) outb(x,addr)
177#define outw_p(x,addr) outw(x,addr)
178#define outl_p(x,addr) outl(x,addr)
179
180#define outsb(a,b,l) io_outsb(a,b,l)
181#define outsw(a,b,l) io_outsw(a,b,l)
182#define outsl(a,b,l) __outsl(a,b,l,0)
183
184#define insb(a,b,l) io_insb(a,b,l)
185#define insw(a,b,l) io_insw(a,b,l)
186#define insl(a,b,l) __insl(a,b,l,0)
187
188#define IO_SPACE_LIMIT 0xffffffff
189
190static inline uint8_t readb(const volatile void __iomem *addr)
191{
192 return __builtin_read8((__force void volatile __iomem *) addr);
193}
194
195static inline uint16_t readw(const volatile void __iomem *addr)
196{
197 uint16_t ret = __builtin_read16((__force void volatile __iomem *)addr);
198
199 if (__is_PCI_MEM(addr))
200 ret = _swapw(ret);
201 return ret;
202}
203
204static inline uint32_t readl(const volatile void __iomem *addr)
205{
206 uint32_t ret = __builtin_read32((__force void volatile __iomem *)addr);
207
208 if (__is_PCI_MEM(addr))
209 ret = _swapl(ret);
210
211 return ret;
212}
213
214#define readb_relaxed readb
215#define readw_relaxed readw
216#define readl_relaxed readl
217
218static inline void writeb(uint8_t datum, volatile void __iomem *addr)
219{
220 __builtin_write8(addr, datum);
221 if (__is_PCI_MEM(addr))
222 __flush_PCI_writes();
223}
224
225static inline void writew(uint16_t datum, volatile void __iomem *addr)
226{
227 if (__is_PCI_MEM(addr))
228 datum = _swapw(datum);
229
230 __builtin_write16(addr, datum);
231 if (__is_PCI_MEM(addr))
232 __flush_PCI_writes();
233}
234
235static inline void writel(uint32_t datum, volatile void __iomem *addr)
236{
237 if (__is_PCI_MEM(addr))
238 datum = _swapl(datum);
239
240 __builtin_write32(addr, datum);
241 if (__is_PCI_MEM(addr))
242 __flush_PCI_writes();
243}
244
245
246/* Values for nocacheflag and cmode */
247#define IOMAP_FULL_CACHING 0
248#define IOMAP_NOCACHE_SER 1
249#define IOMAP_NOCACHE_NONSER 2
250#define IOMAP_WRITETHROUGH 3
251
252extern void __iomem *__ioremap(unsigned long physaddr, unsigned long size, int cacheflag);
253
254static inline void __iomem *ioremap(unsigned long physaddr, unsigned long size)
255{
256 return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
257}
258
259static inline void __iomem *ioremap_nocache(unsigned long physaddr, unsigned long size)
260{
261 return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
262}
263
264static inline void __iomem *ioremap_writethrough(unsigned long physaddr, unsigned long size)
265{
266 return __ioremap(physaddr, size, IOMAP_WRITETHROUGH);
267}
268
269static inline void __iomem *ioremap_fullcache(unsigned long physaddr, unsigned long size)
270{
271 return __ioremap(physaddr, size, IOMAP_FULL_CACHING);
272}
273
274#define ioremap_wc ioremap_nocache
275
276extern void iounmap(void volatile __iomem *addr);
277
278static inline void __iomem *ioport_map(unsigned long port, unsigned int nr)
279{
280 return (void __iomem *) port;
281}
282
283static inline void ioport_unmap(void __iomem *p)
284{
285}
286
287static inline void flush_write_buffers(void)
288{
289 __asm__ __volatile__ ("membar" : : :"memory");
290}
291
292/*
293 * do appropriate I/O accesses for token type
294 */
295static inline unsigned int ioread8(void __iomem *p)
296{
297 return __builtin_read8(p);
298}
299
300static inline unsigned int ioread16(void __iomem *p)
301{
302 uint16_t ret = __builtin_read16(p);
303 if (__is_PCI_addr(p))
304 ret = _swapw(ret);
305 return ret;
306}
307
308static inline unsigned int ioread32(void __iomem *p)
309{
310 uint32_t ret = __builtin_read32(p);
311 if (__is_PCI_addr(p))
312 ret = _swapl(ret);
313 return ret;
314}
315
316static inline void iowrite8(u8 val, void __iomem *p)
317{
318 __builtin_write8(p, val);
319 if (__is_PCI_MEM(p))
320 __flush_PCI_writes();
321}
322
323static inline void iowrite16(u16 val, void __iomem *p)
324{
325 if (__is_PCI_addr(p))
326 val = _swapw(val);
327 __builtin_write16(p, val);
328 if (__is_PCI_MEM(p))
329 __flush_PCI_writes();
330}
331
332static inline void iowrite32(u32 val, void __iomem *p)
333{
334 if (__is_PCI_addr(p))
335 val = _swapl(val);
336 __builtin_write32(p, val);
337 if (__is_PCI_MEM(p))
338 __flush_PCI_writes();
339}
340
341static inline void ioread8_rep(void __iomem *p, void *dst, unsigned long count)
342{
343 io_insb((unsigned long) p, dst, count);
344}
345
346static inline void ioread16_rep(void __iomem *p, void *dst, unsigned long count)
347{
348 io_insw((unsigned long) p, dst, count);
349}
350
351static inline void ioread32_rep(void __iomem *p, void *dst, unsigned long count)
352{
353 __insl_ns((unsigned long) p, dst, count);
354}
355
356static inline void iowrite8_rep(void __iomem *p, const void *src, unsigned long count)
357{
358 io_outsb((unsigned long) p, src, count);
359}
360
361static inline void iowrite16_rep(void __iomem *p, const void *src, unsigned long count)
362{
363 io_outsw((unsigned long) p, src, count);
364}
365
366static inline void iowrite32_rep(void __iomem *p, const void *src, unsigned long count)
367{
368 __outsl_ns((unsigned long) p, src, count);
369}
370
371/* Create a virtual mapping cookie for a PCI BAR (memory or IO) */
372struct pci_dev;
373extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max);
374static inline void pci_iounmap(struct pci_dev *dev, void __iomem *p)
375{
376}
377
378
379/*
380 * Convert a physical pointer to a virtual kernel pointer for /dev/mem
381 * access
382 */
383#define xlate_dev_mem_ptr(p) __va(p)
384
385/*
386 * Convert a virtual cached pointer to an uncached pointer
387 */
388#define xlate_dev_kmem_ptr(p) p
389
390#endif /* __KERNEL__ */
391
392#endif /* _ASM_IO_H */
diff --git a/include/asm-frv/ioctl.h b/include/asm-frv/ioctl.h
deleted file mode 100644
index b279fe06dfe5..000000000000
--- a/include/asm-frv/ioctl.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/ioctl.h>
diff --git a/include/asm-frv/ioctls.h b/include/asm-frv/ioctls.h
deleted file mode 100644
index d0c30e31fbda..000000000000
--- a/include/asm-frv/ioctls.h
+++ /dev/null
@@ -1,86 +0,0 @@
1#ifndef __ASM_IOCTLS_H__
2#define __ASM_IOCTLS_H__
3
4#include <asm/ioctl.h>
5
6/* 0x54 is just a magic number to make these relatively unique ('T') */
7
8#define TCGETS 0x5401
9#define TCSETS 0x5402
10#define TCSETSW 0x5403
11#define TCSETSF 0x5404
12#define TCGETA 0x5405
13#define TCSETA 0x5406
14#define TCSETAW 0x5407
15#define TCSETAF 0x5408
16#define TCSBRK 0x5409
17#define TCXONC 0x540A
18#define TCFLSH 0x540B
19#define TIOCEXCL 0x540C
20#define TIOCNXCL 0x540D
21#define TIOCSCTTY 0x540E
22#define TIOCGPGRP 0x540F
23#define TIOCSPGRP 0x5410
24#define TIOCOUTQ 0x5411
25#define TIOCSTI 0x5412
26#define TIOCGWINSZ 0x5413
27#define TIOCSWINSZ 0x5414
28#define TIOCMGET 0x5415
29#define TIOCMBIS 0x5416
30#define TIOCMBIC 0x5417
31#define TIOCMSET 0x5418
32#define TIOCGSOFTCAR 0x5419
33#define TIOCSSOFTCAR 0x541A
34#define FIONREAD 0x541B
35#define TIOCINQ FIONREAD
36#define TIOCLINUX 0x541C
37#define TIOCCONS 0x541D
38#define TIOCGSERIAL 0x541E
39#define TIOCSSERIAL 0x541F
40#define TIOCPKT 0x5420
41#define FIONBIO 0x5421
42#define TIOCNOTTY 0x5422
43#define TIOCSETD 0x5423
44#define TIOCGETD 0x5424
45#define TCSBRKP 0x5425 /* Needed for POSIX tcsendbreak() */
46#define TIOCTTYGSTRUCT 0x5426 /* For debugging only */
47#define TIOCSBRK 0x5427 /* BSD compatibility */
48#define TIOCCBRK 0x5428 /* BSD compatibility */
49#define TIOCGSID 0x5429 /* Return the session ID of FD */
50#define TCGETS2 _IOR('T',0x2A, struct termios2)
51#define TCSETS2 _IOW('T',0x2B, struct termios2)
52#define TCSETSW2 _IOW('T',0x2C, struct termios2)
53#define TCSETSF2 _IOW('T',0x2D, struct termios2)
54#define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */
55#define TIOCSPTLCK _IOW('T',0x31, int) /* Lock/unlock Pty */
56
57#define FIONCLEX 0x5450 /* these numbers need to be adjusted. */
58#define FIOCLEX 0x5451
59#define FIOASYNC 0x5452
60#define TIOCSERCONFIG 0x5453
61#define TIOCSERGWILD 0x5454
62#define TIOCSERSWILD 0x5455
63#define TIOCGLCKTRMIOS 0x5456
64#define TIOCSLCKTRMIOS 0x5457
65#define TIOCSERGSTRUCT 0x5458 /* For debugging only */
66#define TIOCSERGETLSR 0x5459 /* Get line status register */
67#define TIOCSERGETMULTI 0x545A /* Get multiport config */
68#define TIOCSERSETMULTI 0x545B /* Set multiport config */
69
70#define TIOCMIWAIT 0x545C /* wait for a change on serial input line(s) */
71#define TIOCGICOUNT 0x545D /* read serial port inline interrupt counts */
72#define FIOQSIZE 0x545E
73
74/* Used for packet mode */
75#define TIOCPKT_DATA 0
76#define TIOCPKT_FLUSHREAD 1
77#define TIOCPKT_FLUSHWRITE 2
78#define TIOCPKT_STOP 4
79#define TIOCPKT_START 8
80#define TIOCPKT_NOSTOP 16
81#define TIOCPKT_DOSTOP 32
82
83#define TIOCSER_TEMT 0x01 /* Transmitter physically empty */
84
85#endif /* __ASM_IOCTLS_H__ */
86
diff --git a/include/asm-frv/ipcbuf.h b/include/asm-frv/ipcbuf.h
deleted file mode 100644
index b546f67e455f..000000000000
--- a/include/asm-frv/ipcbuf.h
+++ /dev/null
@@ -1,30 +0,0 @@
1#ifndef __ASM_IPCBUF_H__
2#define __ASM_IPCBUF_H__
3
4/*
5 * The user_ipc_perm structure for FR-V architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 32-bit mode_t and seq
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct ipc64_perm
15{
16 __kernel_key_t key;
17 __kernel_uid32_t uid;
18 __kernel_gid32_t gid;
19 __kernel_uid32_t cuid;
20 __kernel_gid32_t cgid;
21 __kernel_mode_t mode;
22 unsigned short __pad1;
23 unsigned short seq;
24 unsigned short __pad2;
25 unsigned long __unused1;
26 unsigned long __unused2;
27};
28
29#endif /* __ASM_IPCBUF_H__ */
30
diff --git a/include/asm-frv/irc-regs.h b/include/asm-frv/irc-regs.h
deleted file mode 100644
index afa30aeacc82..000000000000
--- a/include/asm-frv/irc-regs.h
+++ /dev/null
@@ -1,53 +0,0 @@
1/* irc-regs.h: on-chip interrupt controller registers
2 *
3 * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_IRC_REGS
13#define _ASM_IRC_REGS
14
15#define __reg(ADDR) (*(volatile unsigned long *)(ADDR))
16
17#define __get_TM0() ({ __reg(0xfeff9800); })
18#define __get_TM1() ({ __reg(0xfeff9808); })
19#define __set_TM1(V) do { __reg(0xfeff9808) = (V); mb(); } while(0)
20
21#define __set_TM1x(XI,V) \
22do { \
23 int shift = (XI) * 2 + 16; \
24 unsigned long tm1 = __reg(0xfeff9808); \
25 tm1 &= ~(0x3 << shift); \
26 tm1 |= (V) << shift; \
27 __reg(0xfeff9808) = tm1; \
28 mb(); \
29} while(0)
30
31#define __get_RS(C) ({ (__reg(0xfeff9810) >> ((C)+16)) & 1; })
32
33#define __clr_RC(C) do { __reg(0xfeff9818) = 1 << ((C)+16); mb(); } while(0)
34
35#define __get_MASK(C) ({ (__reg(0xfeff9820) >> ((C)+16)) & 1; })
36#define __set_MASK(C) do { __reg(0xfeff9820) |= 1 << ((C)+16); mb(); } while(0)
37#define __clr_MASK(C) do { __reg(0xfeff9820) &= ~(1 << ((C)+16)); mb(); } while(0)
38
39#define __get_MASK_all() __get_MASK(0)
40#define __set_MASK_all() __set_MASK(0)
41#define __clr_MASK_all() __clr_MASK(0)
42
43#define __get_IRL() ({ (__reg(0xfeff9828) >> 16) & 0xf; })
44#define __clr_IRL() do { __reg(0xfeff9828) = 0x100000; mb(); } while(0)
45
46#define __get_IRR(N) ({ __reg(0xfeff9840 + (N) * 8); })
47#define __set_IRR(N,V) do { __reg(0xfeff9840 + (N) * 8) = (V); } while(0)
48
49#define __get_IITMR(N) ({ __reg(0xfeff9880 + (N) * 8); })
50#define __set_IITMR(N,V) do { __reg(0xfeff9880 + (N) * 8) = (V); } while(0)
51
52
53#endif /* _ASM_IRC_REGS */
diff --git a/include/asm-frv/irq.h b/include/asm-frv/irq.h
deleted file mode 100644
index 3a66ebd754bd..000000000000
--- a/include/asm-frv/irq.h
+++ /dev/null
@@ -1,30 +0,0 @@
1/* irq.h: FRV IRQ definitions
2 *
3 * Copyright (C) 2006 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_IRQ_H_
13#define _ASM_IRQ_H_
14
15#define NR_IRQS 48
16#define IRQ_BASE_CPU (0 * 16)
17#define IRQ_BASE_FPGA (1 * 16)
18#define IRQ_BASE_MB93493 (2 * 16)
19
20/* probe returns a 32-bit IRQ mask:-/ */
21#define MIN_PROBE_IRQ (NR_IRQS - 32)
22
23#ifndef __ASSEMBLY__
24static inline int irq_canonicalize(int irq)
25{
26 return irq;
27}
28#endif
29
30#endif /* _ASM_IRQ_H_ */
diff --git a/include/asm-frv/irq_regs.h b/include/asm-frv/irq_regs.h
deleted file mode 100644
index d22e83289ad1..000000000000
--- a/include/asm-frv/irq_regs.h
+++ /dev/null
@@ -1,27 +0,0 @@
1/* FRV per-CPU frame pointer holder
2 *
3 * Copyright (C) 2006 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_IRQ_REGS_H
13#define _ASM_IRQ_REGS_H
14
15/*
16 * Per-cpu current frame pointer - the location of the last exception frame on
17 * the stack
18 * - on FRV, GR28 is dedicated to keeping a pointer to the current exception
19 * frame
20 */
21#define ARCH_HAS_OWN_IRQ_REGS
22
23#ifndef __ASSEMBLY__
24#define get_irq_regs() (__frame)
25#endif
26
27#endif /* _ASM_IRQ_REGS_H */
diff --git a/include/asm-frv/kdebug.h b/include/asm-frv/kdebug.h
deleted file mode 100644
index 6ece1b037665..000000000000
--- a/include/asm-frv/kdebug.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/kdebug.h>
diff --git a/include/asm-frv/kmap_types.h b/include/asm-frv/kmap_types.h
deleted file mode 100644
index f8e16b2a5804..000000000000
--- a/include/asm-frv/kmap_types.h
+++ /dev/null
@@ -1,29 +0,0 @@
1
2#ifndef _ASM_KMAP_TYPES_H
3#define _ASM_KMAP_TYPES_H
4
5enum km_type {
6 /* arch specific kmaps - change the numbers attached to these at your peril */
7 __KM_CACHE, /* cache flush page attachment point */
8 __KM_PGD, /* current page directory */
9 __KM_ITLB_PTD, /* current instruction TLB miss page table lookup */
10 __KM_DTLB_PTD, /* current data TLB miss page table lookup */
11
12 /* general kmaps */
13 KM_BOUNCE_READ,
14 KM_SKB_SUNRPC_DATA,
15 KM_SKB_DATA_SOFTIRQ,
16 KM_USER0,
17 KM_USER1,
18 KM_BIO_SRC_IRQ,
19 KM_BIO_DST_IRQ,
20 KM_PTE0,
21 KM_PTE1,
22 KM_IRQ0,
23 KM_IRQ1,
24 KM_SOFTIRQ0,
25 KM_SOFTIRQ1,
26 KM_TYPE_NR
27};
28
29#endif
diff --git a/include/asm-frv/linkage.h b/include/asm-frv/linkage.h
deleted file mode 100644
index 636c1bced7d4..000000000000
--- a/include/asm-frv/linkage.h
+++ /dev/null
@@ -1,7 +0,0 @@
1#ifndef __ASM_LINKAGE_H
2#define __ASM_LINKAGE_H
3
4#define __ALIGN .align 4
5#define __ALIGN_STR ".align 4"
6
7#endif
diff --git a/include/asm-frv/local.h b/include/asm-frv/local.h
deleted file mode 100644
index c27bdf04630e..000000000000
--- a/include/asm-frv/local.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef _ASM_LOCAL_H
2#define _ASM_LOCAL_H
3
4#include <asm-generic/local.h>
5
6#endif /* _ASM_LOCAL_H */
diff --git a/include/asm-frv/math-emu.h b/include/asm-frv/math-emu.h
deleted file mode 100644
index 0c8f731b2180..000000000000
--- a/include/asm-frv/math-emu.h
+++ /dev/null
@@ -1,301 +0,0 @@
1#ifndef _ASM_MATH_EMU_H
2#define _ASM_MATH_EMU_H
3
4#include <asm/setup.h>
5#include <linux/linkage.h>
6
7/* Status Register bits */
8
9/* accrued exception bits */
10#define FPSR_AEXC_INEX 3
11#define FPSR_AEXC_DZ 4
12#define FPSR_AEXC_UNFL 5
13#define FPSR_AEXC_OVFL 6
14#define FPSR_AEXC_IOP 7
15
16/* exception status bits */
17#define FPSR_EXC_INEX1 8
18#define FPSR_EXC_INEX2 9
19#define FPSR_EXC_DZ 10
20#define FPSR_EXC_UNFL 11
21#define FPSR_EXC_OVFL 12
22#define FPSR_EXC_OPERR 13
23#define FPSR_EXC_SNAN 14
24#define FPSR_EXC_BSUN 15
25
26/* quotient byte, assumes big-endian, of course */
27#define FPSR_QUOTIENT(fpsr) (*((signed char *) &(fpsr) + 1))
28
29/* condition code bits */
30#define FPSR_CC_NAN 24
31#define FPSR_CC_INF 25
32#define FPSR_CC_Z 26
33#define FPSR_CC_NEG 27
34
35
36/* Control register bits */
37
38/* rounding mode */
39#define FPCR_ROUND_RN 0 /* round to nearest/even */
40#define FPCR_ROUND_RZ 1 /* round to zero */
41#define FPCR_ROUND_RM 2 /* minus infinity */
42#define FPCR_ROUND_RP 3 /* plus infinity */
43
44/* rounding precision */
45#define FPCR_PRECISION_X 0 /* long double */
46#define FPCR_PRECISION_S 1 /* double */
47#define FPCR_PRECISION_D 2 /* float */
48
49
50/* Flags to select the debugging output */
51#define PDECODE 0
52#define PEXECUTE 1
53#define PCONV 2
54#define PNORM 3
55#define PREGISTER 4
56#define PINSTR 5
57#define PUNIMPL 6
58#define PMOVEM 7
59
60#define PMDECODE (1<<PDECODE)
61#define PMEXECUTE (1<<PEXECUTE)
62#define PMCONV (1<<PCONV)
63#define PMNORM (1<<PNORM)
64#define PMREGISTER (1<<PREGISTER)
65#define PMINSTR (1<<PINSTR)
66#define PMUNIMPL (1<<PUNIMPL)
67#define PMMOVEM (1<<PMOVEM)
68
69#ifndef __ASSEMBLY__
70
71#include <linux/kernel.h>
72#include <linux/sched.h>
73
74union fp_mant64 {
75 unsigned long long m64;
76 unsigned long m32[2];
77};
78
79union fp_mant128 {
80 unsigned long long m64[2];
81 unsigned long m32[4];
82};
83
84/* internal representation of extended fp numbers */
85struct fp_ext {
86 unsigned char lowmant;
87 unsigned char sign;
88 unsigned short exp;
89 union fp_mant64 mant;
90};
91
92/* C representation of FPU registers */
93/* NOTE: if you change this, you have to change the assembler offsets
94 below and the size in <asm/fpu.h>, too */
95struct fp_data {
96 struct fp_ext fpreg[8];
97 unsigned int fpcr;
98 unsigned int fpsr;
99 unsigned int fpiar;
100 unsigned short prec;
101 unsigned short rnd;
102 struct fp_ext temp[2];
103};
104
105#if FPU_EMU_DEBUG
106extern unsigned int fp_debugprint;
107
108#define dprint(bit, fmt, args...) ({ \
109 if (fp_debugprint & (1 << (bit))) \
110 printk(fmt, ## args); \
111})
112#else
113#define dprint(bit, fmt, args...)
114#endif
115
116#define uprint(str) ({ \
117 static int __count = 3; \
118 \
119 if (__count > 0) { \
120 printk("You just hit an unimplemented " \
121 "fpu instruction (%s)\n", str); \
122 printk("Please report this to ....\n"); \
123 __count--; \
124 } \
125})
126
127#define FPDATA ((struct fp_data *)current->thread.fp)
128
129#else /* __ASSEMBLY__ */
130
131#define FPDATA %a2
132
133/* offsets from the base register to the floating point data in the task struct */
134#define FPD_FPREG (TASK_THREAD+THREAD_FPREG+0)
135#define FPD_FPCR (TASK_THREAD+THREAD_FPREG+96)
136#define FPD_FPSR (TASK_THREAD+THREAD_FPREG+100)
137#define FPD_FPIAR (TASK_THREAD+THREAD_FPREG+104)
138#define FPD_PREC (TASK_THREAD+THREAD_FPREG+108)
139#define FPD_RND (TASK_THREAD+THREAD_FPREG+110)
140#define FPD_TEMPFP1 (TASK_THREAD+THREAD_FPREG+112)
141#define FPD_TEMPFP2 (TASK_THREAD+THREAD_FPREG+124)
142#define FPD_SIZEOF (TASK_THREAD+THREAD_FPREG+136)
143
144/* offsets on the stack to access saved registers,
145 * these are only used during instruction decoding
146 * where we always know how deep we're on the stack.
147 */
148#define FPS_DO (PT_D0)
149#define FPS_D1 (PT_D1)
150#define FPS_D2 (PT_D2)
151#define FPS_A0 (PT_A0)
152#define FPS_A1 (PT_A1)
153#define FPS_A2 (PT_A2)
154#define FPS_SR (PT_SR)
155#define FPS_PC (PT_PC)
156#define FPS_EA (PT_PC+6)
157#define FPS_PC2 (PT_PC+10)
158
159.macro fp_get_fp_reg
160 lea (FPD_FPREG,FPDATA,%d0.w*4),%a0
161 lea (%a0,%d0.w*8),%a0
162.endm
163
164/* Macros used to get/put the current program counter.
165 * 020/030 use a different stack frame then 040/060, for the
166 * 040/060 the return pc points already to the next location,
167 * so this only needs to be modified for jump instructions.
168 */
169.macro fp_get_pc dest
170 move.l (FPS_PC+4,%sp),\dest
171.endm
172
173.macro fp_put_pc src,jump=0
174 move.l \src,(FPS_PC+4,%sp)
175.endm
176
177.macro fp_get_instr_data f,s,dest,label
178 getuser \f,%sp@(FPS_PC+4)@(0),\dest,\label,%sp@(FPS_PC+4)
179 addq.l #\s,%sp@(FPS_PC+4)
180.endm
181
182.macro fp_get_instr_word dest,label,addr
183 fp_get_instr_data w,2,\dest,\label,\addr
184.endm
185
186.macro fp_get_instr_long dest,label,addr
187 fp_get_instr_data l,4,\dest,\label,\addr
188.endm
189
190/* These macros are used to read from/write to user space
191 * on error we jump to the fixup section, load the fault
192 * address into %a0 and jump to the exit.
193 * (derived from <asm/uaccess.h>)
194 */
195.macro getuser size,src,dest,label,addr
196| printf ,"[\size<%08x]",1,\addr
197.Lu1\@: moves\size \src,\dest
198
199 .section .fixup,"ax"
200 .even
201.Lu2\@: move.l \addr,%a0
202 jra \label
203 .previous
204
205 .section __ex_table,"a"
206 .align 4
207 .long .Lu1\@,.Lu2\@
208 .previous
209.endm
210
211.macro putuser size,src,dest,label,addr
212| printf ,"[\size>%08x]",1,\addr
213.Lu1\@: moves\size \src,\dest
214.Lu2\@:
215
216 .section .fixup,"ax"
217 .even
218.Lu3\@: move.l \addr,%a0
219 jra \label
220 .previous
221
222 .section __ex_table,"a"
223 .align 4
224 .long .Lu1\@,.Lu3\@
225 .long .Lu2\@,.Lu3\@
226 .previous
227.endm
228
229
230.macro movestack nr,arg1,arg2,arg3,arg4,arg5
231 .if \nr
232 movestack (\nr-1),\arg2,\arg3,\arg4,\arg5
233 move.l \arg1,-(%sp)
234 .endif
235.endm
236
237.macro printf bit=-1,string,nr=0,arg1,arg2,arg3,arg4,arg5
238#ifdef FPU_EMU_DEBUG
239 .data
240.Lpdata\@:
241 .string "\string"
242 .previous
243
244 movem.l %d0/%d1/%a0/%a1,-(%sp)
245 .if \bit+1
246#if 0
247 moveq #\bit,%d0
248 andw #7,%d0
249 btst %d0,fp_debugprint+((31-\bit)/8)
250#else
251 btst #\bit,fp_debugprint+((31-\bit)/8)
252#endif
253 jeq .Lpskip\@
254 .endif
255 movestack \nr,\arg1,\arg2,\arg3,\arg4,\arg5
256 pea .Lpdata\@
257 jsr printk
258 lea ((\nr+1)*4,%sp),%sp
259.Lpskip\@:
260 movem.l (%sp)+,%d0/%d1/%a0/%a1
261#endif
262.endm
263
264.macro printx bit,fp
265#ifdef FPU_EMU_DEBUG
266 movem.l %d0/%a0,-(%sp)
267 lea \fp,%a0
268#if 0
269 moveq #'+',%d0
270 tst.w (%a0)
271 jeq .Lx1\@
272 moveq #'-',%d0
273.Lx1\@: printf \bit," %c",1,%d0
274 move.l (4,%a0),%d0
275 bclr #31,%d0
276 jne .Lx2\@
277 printf \bit,"0."
278 jra .Lx3\@
279.Lx2\@: printf \bit,"1."
280.Lx3\@: printf \bit,"%08x%08x",2,%d0,%a0@(8)
281 move.w (2,%a0),%d0
282 ext.l %d0
283 printf \bit,"E%04x",1,%d0
284#else
285 printf \bit," %08x%08x%08x",3,%a0@,%a0@(4),%a0@(8)
286#endif
287 movem.l (%sp)+,%d0/%a0
288#endif
289.endm
290
291.macro debug instr,args
292#ifdef FPU_EMU_DEBUG
293 \instr \args
294#endif
295.endm
296
297
298#endif /* __ASSEMBLY__ */
299
300#endif /* _ASM_FRV_MATH_EMU_H */
301
diff --git a/include/asm-frv/mb-regs.h b/include/asm-frv/mb-regs.h
deleted file mode 100644
index 219e5f926f18..000000000000
--- a/include/asm-frv/mb-regs.h
+++ /dev/null
@@ -1,200 +0,0 @@
1/* mb-regs.h: motherboard registers
2 *
3 * Copyright (C) 2003, 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_MB_REGS_H
13#define _ASM_MB_REGS_H
14
15#include <asm/cpu-irqs.h>
16#include <asm/sections.h>
17#include <asm/mem-layout.h>
18
19#ifndef __ASSEMBLY__
20/* gcc builtins, annotated */
21
22unsigned long __builtin_read8(volatile void __iomem *);
23unsigned long __builtin_read16(volatile void __iomem *);
24unsigned long __builtin_read32(volatile void __iomem *);
25void __builtin_write8(volatile void __iomem *, unsigned char);
26void __builtin_write16(volatile void __iomem *, unsigned short);
27void __builtin_write32(volatile void __iomem *, unsigned long);
28#endif
29
30#define __region_IO KERNEL_IO_START /* the region from 0xe0000000 to 0xffffffff has suitable
31 * protection laid over the top for use in memory-mapped
32 * I/O
33 */
34
35#define __region_CS0 0xff000000 /* Boot ROMs area */
36
37#ifdef CONFIG_MB93091_VDK
38/*
39 * VDK motherboard and CPU card specific stuff
40 */
41
42#include <asm/mb93091-fpga-irqs.h>
43
44#define IRQ_CPU_MB93493_0 IRQ_CPU_EXTERNAL0
45#define IRQ_CPU_MB93493_1 IRQ_CPU_EXTERNAL1
46
47#define __region_CS2 0xe0000000 /* SLBUS/PCI I/O space */
48#define __region_CS2_M 0x0fffffff /* mask */
49#define __region_CS2_C 0x00000000 /* control */
50#define __region_CS5 0xf0000000 /* MB93493 CSC area (DAV daughter board) */
51#define __region_CS5_M 0x00ffffff
52#define __region_CS5_C 0x00010000
53#define __region_CS7 0xf1000000 /* CB70 CPU-card PCMCIA port I/O space */
54#define __region_CS7_M 0x00ffffff
55#define __region_CS7_C 0x00410701
56#define __region_CS1 0xfc000000 /* SLBUS/PCI bridge control registers */
57#define __region_CS1_M 0x000fffff
58#define __region_CS1_C 0x00000000
59#define __region_CS6 0xfc100000 /* CB70 CPU-card DM9000 LAN I/O space */
60#define __region_CS6_M 0x000fffff
61#define __region_CS6_C 0x00400707
62#define __region_CS3 0xfc200000 /* MB93493 CSR area (DAV daughter board) */
63#define __region_CS3_M 0x000fffff
64#define __region_CS3_C 0xc8100000
65#define __region_CS4 0xfd000000 /* CB70 CPU-card extra flash space */
66#define __region_CS4_M 0x00ffffff
67#define __region_CS4_C 0x00000f07
68
69#define __region_PCI_IO (__region_CS2 + 0x04000000UL)
70#define __region_PCI_MEM (__region_CS2 + 0x08000000UL)
71#define __flush_PCI_writes() \
72do { \
73 __builtin_write8((volatile void __iomem *) __region_PCI_MEM, 0); \
74} while(0)
75
76#define __is_PCI_IO(addr) \
77 (((unsigned long)(addr) >> 24) - (__region_PCI_IO >> 24) < (0x04000000UL >> 24))
78
79#define __is_PCI_MEM(addr) \
80 ((unsigned long)(addr) - __region_PCI_MEM < 0x08000000UL)
81
82#define __is_PCI_addr(addr) \
83 ((unsigned long)(addr) - __region_PCI_IO < 0x0c000000UL)
84
85#define __get_CLKSW() ({ *(volatile unsigned long *)(__region_CS2 + 0x0130000cUL) & 0xffUL; })
86#define __get_CLKIN() (__get_CLKSW() * 125U * 100000U / 24U)
87
88#ifndef __ASSEMBLY__
89extern int __nongprelbss mb93090_mb00_detected;
90#endif
91
92#define __addr_LEDS() (__region_CS2 + 0x01200004UL)
93#ifdef CONFIG_MB93090_MB00
94#define __set_LEDS(X) \
95do { \
96 if (mb93090_mb00_detected) \
97 __builtin_write32((void __iomem *) __addr_LEDS(), ~(X)); \
98} while (0)
99#else
100#define __set_LEDS(X)
101#endif
102
103#define __addr_LCD() (__region_CS2 + 0x01200008UL)
104#define __get_LCD(B) __builtin_read32((volatile void __iomem *) (B))
105#define __set_LCD(B,X) __builtin_write32((volatile void __iomem *) (B), (X))
106
107#define LCD_D 0x000000ff /* LCD data bus */
108#define LCD_RW 0x00000100 /* LCD R/W signal */
109#define LCD_RS 0x00000200 /* LCD Register Select */
110#define LCD_E 0x00000400 /* LCD Start Enable Signal */
111
112#define LCD_CMD_CLEAR (LCD_E|0x001)
113#define LCD_CMD_HOME (LCD_E|0x002)
114#define LCD_CMD_CURSOR_INC (LCD_E|0x004)
115#define LCD_CMD_SCROLL_INC (LCD_E|0x005)
116#define LCD_CMD_CURSOR_DEC (LCD_E|0x006)
117#define LCD_CMD_SCROLL_DEC (LCD_E|0x007)
118#define LCD_CMD_OFF (LCD_E|0x008)
119#define LCD_CMD_ON(CRSR,BLINK) (LCD_E|0x00c|(CRSR<<1)|BLINK)
120#define LCD_CMD_CURSOR_MOVE_L (LCD_E|0x010)
121#define LCD_CMD_CURSOR_MOVE_R (LCD_E|0x014)
122#define LCD_CMD_DISPLAY_SHIFT_L (LCD_E|0x018)
123#define LCD_CMD_DISPLAY_SHIFT_R (LCD_E|0x01c)
124#define LCD_CMD_FUNCSET(DL,N,F) (LCD_E|0x020|(DL<<4)|(N<<3)|(F<<2))
125#define LCD_CMD_SET_CG_ADDR(X) (LCD_E|0x040|X)
126#define LCD_CMD_SET_DD_ADDR(X) (LCD_E|0x080|X)
127#define LCD_CMD_READ_BUSY (LCD_E|LCD_RW)
128#define LCD_DATA_WRITE(X) (LCD_E|LCD_RS|(X))
129#define LCD_DATA_READ (LCD_E|LCD_RS|LCD_RW)
130
131#else
132/*
133 * PDK unit specific stuff
134 */
135
136#include <asm/mb93093-fpga-irqs.h>
137
138#define IRQ_CPU_MB93493_0 IRQ_CPU_EXTERNAL0
139#define IRQ_CPU_MB93493_1 IRQ_CPU_EXTERNAL1
140
141#define __region_CS5 0xf0000000 /* MB93493 CSC area (DAV daughter board) */
142#define __region_CS5_M 0x00ffffff /* mask */
143#define __region_CS5_C 0x00010000 /* control */
144#define __region_CS2 0x20000000 /* FPGA registers */
145#define __region_CS2_M 0x000fffff
146#define __region_CS2_C 0x00000000
147#define __region_CS1 0xfc100000 /* LAN registers */
148#define __region_CS1_M 0x000fffff
149#define __region_CS1_C 0x00010404
150#define __region_CS3 0xfc200000 /* MB93493 CSR area (DAV daughter board) */
151#define __region_CS3_M 0x000fffff
152#define __region_CS3_C 0xc8000000
153#define __region_CS4 0xfd000000 /* extra ROMs area */
154#define __region_CS4_M 0x00ffffff
155#define __region_CS4_C 0x00000f07
156
157#define __region_CS6 0xfe000000 /* not used - hide behind CPU resource I/O regs */
158#define __region_CS6_M 0x000fffff
159#define __region_CS6_C 0x00000f07
160#define __region_CS7 0xfe000000 /* not used - hide behind CPU resource I/O regs */
161#define __region_CS7_M 0x000fffff
162#define __region_CS7_C 0x00000f07
163
164#define __is_PCI_IO(addr) 0 /* no PCI */
165#define __is_PCI_MEM(addr) 0
166#define __is_PCI_addr(addr) 0
167#define __region_PCI_IO 0
168#define __region_PCI_MEM 0
169#define __flush_PCI_writes() do { } while(0)
170
171#define __get_CLKSW() 0UL
172#define __get_CLKIN() 66000000UL
173
174#define __addr_LEDS() (__region_CS2 + 0x00000023UL)
175#define __set_LEDS(X) __builtin_write8((volatile void __iomem *) __addr_LEDS(), (X))
176
177#define __addr_FPGATR() (__region_CS2 + 0x00000030UL)
178#define __set_FPGATR(X) __builtin_write32((volatile void __iomem *) __addr_FPGATR(), (X))
179#define __get_FPGATR() __builtin_read32((volatile void __iomem *) __addr_FPGATR())
180
181#define MB93093_FPGA_FPGATR_AUDIO_CLK 0x00000003
182
183#define __set_FPGATR_AUDIO_CLK(V) \
184 __set_FPGATR((__get_FPGATR() & ~MB93093_FPGA_FPGATR_AUDIO_CLK) | (V))
185
186#define MB93093_FPGA_FPGATR_AUDIO_CLK_OFF 0x0
187#define MB93093_FPGA_FPGATR_AUDIO_CLK_11MHz 0x1
188#define MB93093_FPGA_FPGATR_AUDIO_CLK_12MHz 0x2
189#define MB93093_FPGA_FPGATR_AUDIO_CLK_02MHz 0x3
190
191#define MB93093_FPGA_SWR_PUSHSWMASK (0x1F<<26)
192#define MB93093_FPGA_SWR_PUSHSW4 (1<<29)
193
194#define __addr_FPGA_SWR ((volatile void __iomem *)(__region_CS2 + 0x28UL))
195#define __get_FPGA_PUSHSW1_5() (__builtin_read32(__addr_FPGA_SWR) & MB93093_FPGA_SWR_PUSHSWMASK)
196
197
198#endif
199
200#endif /* _ASM_MB_REGS_H */
diff --git a/include/asm-frv/mb86943a.h b/include/asm-frv/mb86943a.h
deleted file mode 100644
index e87ef924bfb4..000000000000
--- a/include/asm-frv/mb86943a.h
+++ /dev/null
@@ -1,42 +0,0 @@
1/* mb86943a.h: MB86943 SPARClite <-> PCI bridge registers
2 *
3 * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_MB86943A_H
13#define _ASM_MB86943A_H
14
15#include <asm/mb-regs.h>
16
17#define __reg_MB86943_sl_ctl *(volatile uint32_t *) (__region_CS1 + 0x00)
18
19#define MB86943_SL_CTL_BUS_WIDTH_64 0x00000001
20#define MB86943_SL_CTL_AS_HOST 0x00000002
21#define MB86943_SL_CTL_DRCT_MASTER_SWAP 0x00000004
22#define MB86943_SL_CTL_DRCT_SLAVE_SWAP 0x00000008
23#define MB86943_SL_CTL_PCI_CONFIG_SWAP 0x00000010
24#define MB86943_SL_CTL_ECS0_ENABLE 0x00000020
25#define MB86943_SL_CTL_ECS1_ENABLE 0x00000040
26#define MB86943_SL_CTL_ECS2_ENABLE 0x00000080
27
28#define __reg_MB86943_ecs_ctl(N) *(volatile uint32_t *) (__region_CS1 + 0x08 + (0x08*(N)))
29#define __reg_MB86943_ecs_range(N) *(volatile uint32_t *) (__region_CS1 + 0x20 + (0x10*(N)))
30#define __reg_MB86943_ecs_base(N) *(volatile uint32_t *) (__region_CS1 + 0x28 + (0x10*(N)))
31
32#define __reg_MB86943_sl_pci_io_range *(volatile uint32_t *) (__region_CS1 + 0x50)
33#define __reg_MB86943_sl_pci_io_base *(volatile uint32_t *) (__region_CS1 + 0x58)
34#define __reg_MB86943_sl_pci_mem_range *(volatile uint32_t *) (__region_CS1 + 0x60)
35#define __reg_MB86943_sl_pci_mem_base *(volatile uint32_t *) (__region_CS1 + 0x68)
36#define __reg_MB86943_pci_sl_io_base *(volatile uint32_t *) (__region_CS1 + 0x70)
37#define __reg_MB86943_pci_sl_mem_base *(volatile uint32_t *) (__region_CS1 + 0x78)
38
39#define __reg_MB86943_pci_arbiter *(volatile uint32_t *) (__region_CS2 + 0x01300014)
40#define MB86943_PCIARB_EN 0x00000001
41
42#endif /* _ASM_MB86943A_H */
diff --git a/include/asm-frv/mb93091-fpga-irqs.h b/include/asm-frv/mb93091-fpga-irqs.h
deleted file mode 100644
index 19778c5ba9d6..000000000000
--- a/include/asm-frv/mb93091-fpga-irqs.h
+++ /dev/null
@@ -1,42 +0,0 @@
1/* mb93091-fpga-irqs.h: MB93091 CPU board FPGA IRQs
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_MB93091_FPGA_IRQS_H
13#define _ASM_MB93091_FPGA_IRQS_H
14
15#include <asm/irq.h>
16
17#ifndef __ASSEMBLY__
18
19/* IRQ IDs presented to drivers */
20enum {
21 IRQ_FPGA__UNUSED = IRQ_BASE_FPGA,
22 IRQ_FPGA_SYSINT_BUS_EXPANSION_1,
23 IRQ_FPGA_SL_BUS_EXPANSION_2,
24 IRQ_FPGA_PCI_INTD,
25 IRQ_FPGA_PCI_INTC,
26 IRQ_FPGA_PCI_INTB,
27 IRQ_FPGA_PCI_INTA,
28 IRQ_FPGA_SL_BUS_EXPANSION_7,
29 IRQ_FPGA_SYSINT_BUS_EXPANSION_8,
30 IRQ_FPGA_SL_BUS_EXPANSION_9,
31 IRQ_FPGA_MB86943_PCI_INTA,
32 IRQ_FPGA_MB86943_SLBUS_SIDE,
33 IRQ_FPGA_RTL8029_INTA,
34 IRQ_FPGA_SYSINT_BUS_EXPANSION_13,
35 IRQ_FPGA_SL_BUS_EXPANSION_14,
36 IRQ_FPGA_NMI,
37};
38
39
40#endif /* !__ASSEMBLY__ */
41
42#endif /* _ASM_MB93091_FPGA_IRQS_H */
diff --git a/include/asm-frv/mb93093-fpga-irqs.h b/include/asm-frv/mb93093-fpga-irqs.h
deleted file mode 100644
index 590266b1a6d3..000000000000
--- a/include/asm-frv/mb93093-fpga-irqs.h
+++ /dev/null
@@ -1,29 +0,0 @@
1/* mb93093-fpga-irqs.h: MB93093 CPU board FPGA IRQs
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_MB93093_FPGA_IRQS_H
13#define _ASM_MB93093_FPGA_IRQS_H
14
15#include <asm/irq.h>
16
17#ifndef __ASSEMBLY__
18
19/* IRQ IDs presented to drivers */
20enum {
21 IRQ_FPGA_PUSH_BUTTON_SW1_5 = IRQ_BASE_FPGA + 8,
22 IRQ_FPGA_ROCKER_C_SW8 = IRQ_BASE_FPGA + 9,
23 IRQ_FPGA_ROCKER_C_SW9 = IRQ_BASE_FPGA + 10,
24};
25
26
27#endif /* !__ASSEMBLY__ */
28
29#endif /* _ASM_MB93093_FPGA_IRQS_H */
diff --git a/include/asm-frv/mb93493-irqs.h b/include/asm-frv/mb93493-irqs.h
deleted file mode 100644
index 82c7aeddd333..000000000000
--- a/include/asm-frv/mb93493-irqs.h
+++ /dev/null
@@ -1,50 +0,0 @@
1/* mb93493-irqs.h: MB93493 companion chip IRQs
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_MB93493_IRQS_H
13#define _ASM_MB93493_IRQS_H
14
15#include <asm/irq.h>
16
17#ifndef __ASSEMBLY__
18
19/* IRQ IDs presented to drivers */
20enum {
21 IRQ_MB93493_VDC = IRQ_BASE_MB93493 + 0,
22 IRQ_MB93493_VCC = IRQ_BASE_MB93493 + 1,
23 IRQ_MB93493_AUDIO_OUT = IRQ_BASE_MB93493 + 2,
24 IRQ_MB93493_I2C_0 = IRQ_BASE_MB93493 + 3,
25 IRQ_MB93493_I2C_1 = IRQ_BASE_MB93493 + 4,
26 IRQ_MB93493_USB = IRQ_BASE_MB93493 + 5,
27 IRQ_MB93493_LOCAL_BUS = IRQ_BASE_MB93493 + 7,
28 IRQ_MB93493_PCMCIA = IRQ_BASE_MB93493 + 8,
29 IRQ_MB93493_GPIO = IRQ_BASE_MB93493 + 9,
30 IRQ_MB93493_AUDIO_IN = IRQ_BASE_MB93493 + 10,
31};
32
33/* IRQ multiplexor mappings */
34#define ROUTE_VIA_IRQ0 0 /* route IRQ by way of CPU external IRQ 0 */
35#define ROUTE_VIA_IRQ1 1 /* route IRQ by way of CPU external IRQ 1 */
36
37#define IRQ_MB93493_VDC_ROUTE ROUTE_VIA_IRQ0
38#define IRQ_MB93493_VCC_ROUTE ROUTE_VIA_IRQ1
39#define IRQ_MB93493_AUDIO_OUT_ROUTE ROUTE_VIA_IRQ1
40#define IRQ_MB93493_I2C_0_ROUTE ROUTE_VIA_IRQ1
41#define IRQ_MB93493_I2C_1_ROUTE ROUTE_VIA_IRQ1
42#define IRQ_MB93493_USB_ROUTE ROUTE_VIA_IRQ1
43#define IRQ_MB93493_LOCAL_BUS_ROUTE ROUTE_VIA_IRQ1
44#define IRQ_MB93493_PCMCIA_ROUTE ROUTE_VIA_IRQ1
45#define IRQ_MB93493_GPIO_ROUTE ROUTE_VIA_IRQ1
46#define IRQ_MB93493_AUDIO_IN_ROUTE ROUTE_VIA_IRQ1
47
48#endif /* !__ASSEMBLY__ */
49
50#endif /* _ASM_MB93493_IRQS_H */
diff --git a/include/asm-frv/mb93493-regs.h b/include/asm-frv/mb93493-regs.h
deleted file mode 100644
index 8a1f6aac8cf1..000000000000
--- a/include/asm-frv/mb93493-regs.h
+++ /dev/null
@@ -1,281 +0,0 @@
1/* mb93493-regs.h: MB93493 companion chip registers
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_MB93493_REGS_H
13#define _ASM_MB93493_REGS_H
14
15#include <asm/mb-regs.h>
16#include <asm/mb93493-irqs.h>
17
18#define __addr_MB93493(X) ((volatile unsigned long *)(__region_CS3 + (X)))
19#define __get_MB93493(X) ({ *(volatile unsigned long *)(__region_CS3 + (X)); })
20
21#define __set_MB93493(X,V) \
22do { \
23 *(volatile unsigned long *)(__region_CS3 + (X)) = (V); mb(); \
24} while(0)
25
26#define __get_MB93493_STSR(X) __get_MB93493(0x3c0 + (X) * 4)
27#define __set_MB93493_STSR(X,V) __set_MB93493(0x3c0 + (X) * 4, (V))
28#define MB93493_STSR_EN
29
30#define __addr_MB93493_IQSR(X) __addr_MB93493(0x3d0 + (X) * 4)
31#define __get_MB93493_IQSR(X) __get_MB93493(0x3d0 + (X) * 4)
32#define __set_MB93493_IQSR(X,V) __set_MB93493(0x3d0 + (X) * 4, (V))
33
34#define __get_MB93493_DQSR(X) __get_MB93493(0x3e0 + (X) * 4)
35#define __set_MB93493_DQSR(X,V) __set_MB93493(0x3e0 + (X) * 4, (V))
36
37#define __get_MB93493_LBSER() __get_MB93493(0x3f0)
38#define __set_MB93493_LBSER(V) __set_MB93493(0x3f0, (V))
39
40#define MB93493_LBSER_VDC 0x00010000
41#define MB93493_LBSER_VCC 0x00020000
42#define MB93493_LBSER_AUDIO 0x00040000
43#define MB93493_LBSER_I2C_0 0x00080000
44#define MB93493_LBSER_I2C_1 0x00100000
45#define MB93493_LBSER_USB 0x00200000
46#define MB93493_LBSER_GPIO 0x00800000
47#define MB93493_LBSER_PCMCIA 0x01000000
48
49#define __get_MB93493_LBSR() __get_MB93493(0x3fc)
50#define __set_MB93493_LBSR(V) __set_MB93493(0x3fc, (V))
51
52/*
53 * video display controller
54 */
55#define __get_MB93493_VDC(X) __get_MB93493(MB93493_VDC_##X)
56#define __set_MB93493_VDC(X,V) __set_MB93493(MB93493_VDC_##X, (V))
57
58#define MB93493_VDC_RCURSOR 0x140 /* cursor position */
59#define MB93493_VDC_RCT1 0x144 /* cursor colour 1 */
60#define MB93493_VDC_RCT2 0x148 /* cursor colour 2 */
61#define MB93493_VDC_RHDC 0x150 /* horizontal display period */
62#define MB93493_VDC_RH_MARGINS 0x154 /* horizontal margin sizes */
63#define MB93493_VDC_RVDC 0x158 /* vertical display period */
64#define MB93493_VDC_RV_MARGINS 0x15c /* vertical margin sizes */
65#define MB93493_VDC_RC 0x170 /* VDC control */
66#define MB93493_VDC_RCLOCK 0x174 /* clock divider, DMA req delay */
67#define MB93493_VDC_RBLACK 0x178 /* black insert sizes */
68#define MB93493_VDC_RS 0x17c /* VDC status */
69
70#define __addr_MB93493_VDC_BCI(X) ({ (volatile unsigned long *)(__region_CS3 + 0x000 + (X)); })
71#define __addr_MB93493_VDC_TPO(X) (__region_CS3 + 0x1c0 + (X))
72
73#define VDC_TPO_WIDTH 32
74
75#define VDC_RC_DSR 0x00000080 /* VDC master reset */
76
77#define VDC_RS_IT 0x00060000 /* interrupt indicators */
78#define VDC_RS_IT_UNDERFLOW 0x00040000 /* - underflow event */
79#define VDC_RS_IT_VSYNC 0x00020000 /* - VSYNC event */
80#define VDC_RS_DFI 0x00010000 /* current interlace field number */
81#define VDC_RS_DFI_TOP 0x00000000 /* - top field */
82#define VDC_RS_DFI_BOTTOM 0x00010000 /* - bottom field */
83#define VDC_RS_DCSR 0x00000010 /* cursor state */
84#define VDC_RS_DCM 0x00000003 /* display mode */
85#define VDC_RS_DCM_DISABLED 0x00000000 /* - display disabled */
86#define VDC_RS_DCM_STOPPED 0x00000001 /* - VDC stopped */
87#define VDC_RS_DCM_FREERUNNING 0x00000002 /* - VDC free-running */
88#define VDC_RS_DCM_TRANSFERRING 0x00000003 /* - data being transferred to VDC */
89
90/*
91 * video capture controller
92 */
93#define __get_MB93493_VCC(X) __get_MB93493(MB93493_VCC_##X)
94#define __set_MB93493_VCC(X,V) __set_MB93493(MB93493_VCC_##X, (V))
95
96#define MB93493_VCC_RREDUCT 0x104 /* reduction rate */
97#define MB93493_VCC_RHY 0x108 /* horizontal brightness filter coefficients */
98#define MB93493_VCC_RHC 0x10c /* horizontal colour-difference filter coefficients */
99#define MB93493_VCC_RHSIZE 0x110 /* horizontal cycle sizes */
100#define MB93493_VCC_RHBC 0x114 /* horizontal back porch size */
101#define MB93493_VCC_RVCC 0x118 /* vertical capture period */
102#define MB93493_VCC_RVBC 0x11c /* vertical back porch period */
103#define MB93493_VCC_RV 0x120 /* vertical filter coefficients */
104#define MB93493_VCC_RDTS 0x128 /* DMA transfer size */
105#define MB93493_VCC_RDTS_4B 0x01000000 /* 4-byte transfer */
106#define MB93493_VCC_RDTS_32B 0x03000000 /* 32-byte transfer */
107#define MB93493_VCC_RDTS_SHIFT 24
108#define MB93493_VCC_RCC 0x130 /* VCC control */
109#define MB93493_VCC_RIS 0x134 /* VCC interrupt status */
110
111#define __addr_MB93493_VCC_TPI(X) (__region_CS3 + 0x180 + (X))
112
113#define VCC_RHSIZE_RHCC 0x000007ff
114#define VCC_RHSIZE_RHCC_SHIFT 0
115#define VCC_RHSIZE_RHTCC 0x0fff0000
116#define VCC_RHSIZE_RHTCC_SHIFT 16
117
118#define VCC_RVBC_RVBC 0x00003f00
119#define VCC_RVBC_RVBC_SHIFT 8
120
121#define VCC_RREDUCT_RHR 0x07ff0000
122#define VCC_RREDUCT_RHR_SHIFT 16
123#define VCC_RREDUCT_RVR 0x000007ff
124#define VCC_RREDUCT_RVR_SHIFT 0
125
126#define VCC_RCC_CE 0x00000001 /* VCC enable */
127#define VCC_RCC_CS 0x00000002 /* request video capture start */
128#define VCC_RCC_CPF 0x0000000c /* pixel format */
129#define VCC_RCC_CPF_YCBCR_16 0x00000000 /* - YCbCr 4:2:2 16-bit format */
130#define VCC_RCC_CPF_RGB 0x00000004 /* - RGB 4:4:4 format */
131#define VCC_RCC_CPF_YCBCR_24 0x00000008 /* - YCbCr 4:2:2 24-bit format */
132#define VCC_RCC_CPF_BT656 0x0000000c /* - ITU R-BT.656 format */
133#define VCC_RCC_CPF_SHIFT 2
134#define VCC_RCC_CSR 0x00000080 /* request reset */
135#define VCC_RCC_HSIP 0x00000100 /* HSYNC polarity */
136#define VCC_RCC_HSIP_LOACT 0x00000000 /* - low active */
137#define VCC_RCC_HSIP_HIACT 0x00000100 /* - high active */
138#define VCC_RCC_VSIP 0x00000200 /* VSYNC polarity */
139#define VCC_RCC_VSIP_LOACT 0x00000000 /* - low active */
140#define VCC_RCC_VSIP_HIACT 0x00000200 /* - high active */
141#define VCC_RCC_CIE 0x00000800 /* interrupt enable */
142#define VCC_RCC_CFP 0x00001000 /* RGB pixel packing */
143#define VCC_RCC_CFP_4TO3 0x00000000 /* - pack 4 pixels into 3 words */
144#define VCC_RCC_CFP_1TO1 0x00001000 /* - pack 1 pixel into 1 words */
145#define VCC_RCC_CSM 0x00006000 /* interlace specification */
146#define VCC_RCC_CSM_ONEPASS 0x00002000 /* - non-interlaced */
147#define VCC_RCC_CSM_INTERLACE 0x00004000 /* - interlaced */
148#define VCC_RCC_CSM_SHIFT 13
149#define VCC_RCC_ES 0x00008000 /* capture start polarity */
150#define VCC_RCC_ES_NEG 0x00000000 /* - negative edge */
151#define VCC_RCC_ES_POS 0x00008000 /* - positive edge */
152#define VCC_RCC_IFI 0x00080000 /* inferlace field evaluation reverse */
153#define VCC_RCC_FDTS 0x00300000 /* interlace field start */
154#define VCC_RCC_FDTS_3_8 0x00000000 /* - 3/8 of horizontal entire cycle */
155#define VCC_RCC_FDTS_1_4 0x00100000 /* - 1/4 of horizontal entire cycle */
156#define VCC_RCC_FDTS_7_16 0x00200000 /* - 7/16 of horizontal entire cycle */
157#define VCC_RCC_FDTS_SHIFT 20
158#define VCC_RCC_MOV 0x00400000 /* test bit - always set to 1 */
159#define VCC_RCC_STP 0x00800000 /* request video capture stop */
160#define VCC_RCC_TO 0x01000000 /* input during top-field only */
161
162#define VCC_RIS_VSYNC 0x01000000 /* VSYNC interrupt */
163#define VCC_RIS_OV 0x02000000 /* overflow interrupt */
164#define VCC_RIS_BOTTOM 0x08000000 /* interlace bottom field */
165#define VCC_RIS_STARTED 0x10000000 /* capture started */
166
167/*
168 * I2C
169 */
170#define MB93493_I2C_BSR 0x340 /* bus status */
171#define MB93493_I2C_BCR 0x344 /* bus control */
172#define MB93493_I2C_CCR 0x348 /* clock control */
173#define MB93493_I2C_ADR 0x34c /* address */
174#define MB93493_I2C_DTR 0x350 /* data */
175#define MB93493_I2C_BC2R 0x35c /* bus control 2 */
176
177#define __addr_MB93493_I2C(port,X) (__region_CS3 + MB93493_I2C_##X + ((port)*0x20))
178#define __get_MB93493_I2C(port,X) __get_MB93493(MB93493_I2C_##X + ((port)*0x20))
179#define __set_MB93493_I2C(port,X,V) __set_MB93493(MB93493_I2C_##X + ((port)*0x20), (V))
180
181#define I2C_BSR_BB (1 << 7)
182
183/*
184 * audio controller (I2S) registers
185 */
186#define __get_MB93493_I2S(X) __get_MB93493(MB93493_I2S_##X)
187#define __set_MB93493_I2S(X,V) __set_MB93493(MB93493_I2S_##X, (V))
188
189#define MB93493_I2S_ALDR 0x300 /* L-channel data */
190#define MB93493_I2S_ARDR 0x304 /* R-channel data */
191#define MB93493_I2S_APDR 0x308 /* 16-bit packed data */
192#define MB93493_I2S_AISTR 0x310 /* status */
193#define MB93493_I2S_AICR 0x314 /* control */
194
195#define __addr_MB93493_I2S_ALDR(X) (__region_CS3 + MB93493_I2S_ALDR + (X))
196#define __addr_MB93493_I2S_ARDR(X) (__region_CS3 + MB93493_I2S_ARDR + (X))
197#define __addr_MB93493_I2S_APDR(X) (__region_CS3 + MB93493_I2S_APDR + (X))
198#define __addr_MB93493_I2S_ADR(X) (__region_CS3 + 0x320 + (X))
199
200#define I2S_AISTR_OTST 0x00000003 /* status of output data transfer */
201#define I2S_AISTR_OTR 0x00000010 /* output transfer request pending */
202#define I2S_AISTR_OUR 0x00000020 /* output FIFO underrun detected */
203#define I2S_AISTR_OOR 0x00000040 /* output FIFO overrun detected */
204#define I2S_AISTR_ODS 0x00000100 /* output DMA transfer size */
205#define I2S_AISTR_ODE 0x00000400 /* output DMA transfer request enable */
206#define I2S_AISTR_OTRIE 0x00001000 /* output transfer request interrupt enable */
207#define I2S_AISTR_OURIE 0x00002000 /* output FIFO underrun interrupt enable */
208#define I2S_AISTR_OORIE 0x00004000 /* output FIFO overrun interrupt enable */
209#define I2S_AISTR__OUT_MASK 0x00007570
210#define I2S_AISTR_ITST 0x00030000 /* status of input data transfer */
211#define I2S_AISTR_ITST_SHIFT 16
212#define I2S_AISTR_ITR 0x00100000 /* input transfer request pending */
213#define I2S_AISTR_IUR 0x00200000 /* input FIFO underrun detected */
214#define I2S_AISTR_IOR 0x00400000 /* input FIFO overrun detected */
215#define I2S_AISTR_IDS 0x01000000 /* input DMA transfer size */
216#define I2S_AISTR_IDE 0x04000000 /* input DMA transfer request enable */
217#define I2S_AISTR_ITRIE 0x10000000 /* input transfer request interrupt enable */
218#define I2S_AISTR_IURIE 0x20000000 /* input FIFO underrun interrupt enable */
219#define I2S_AISTR_IORIE 0x40000000 /* input FIFO overrun interrupt enable */
220#define I2S_AISTR__IN_MASK 0x75700000
221
222#define I2S_AICR_MI 0x00000001 /* mono input requested */
223#define I2S_AICR_AMI 0x00000002 /* relation between LRCKI/FS1 and SDI */
224#define I2S_AICR_LRI 0x00000004 /* function of LRCKI pin */
225#define I2S_AICR_SDMI 0x00000070 /* format of input audio data */
226#define I2S_AICR_SDMI_SHIFT 4
227#define I2S_AICR_CLI 0x00000080 /* input FIFO clearing control */
228#define I2S_AICR_IM 0x00000300 /* input state control */
229#define I2S_AICR_IM_SHIFT 8
230#define I2S_AICR__IN_MASK 0x000003f7
231#define I2S_AICR_MO 0x00001000 /* mono output requested */
232#define I2S_AICR_AMO 0x00002000 /* relation between LRCKO/FS0 and SDO */
233#define I2S_AICR_AMO_SHIFT 13
234#define I2S_AICR_LRO 0x00004000 /* function of LRCKO pin */
235#define I2S_AICR_SDMO 0x00070000 /* format of output audio data */
236#define I2S_AICR_SDMO_SHIFT 16
237#define I2S_AICR_CLO 0x00080000 /* output FIFO clearing control */
238#define I2S_AICR_OM 0x00100000 /* output state control */
239#define I2S_AICR__OUT_MASK 0x001f7000
240#define I2S_AICR_DIV 0x03000000 /* frequency division rate */
241#define I2S_AICR_DIV_SHIFT 24
242#define I2S_AICR_FL 0x20000000 /* frame length */
243#define I2S_AICR_FS 0x40000000 /* frame sync method */
244#define I2S_AICR_ME 0x80000000 /* master enable */
245
246/*
247 * PCMCIA
248 */
249#define __addr_MB93493_PCMCIA(X) ((volatile unsigned long *)(__region_CS5 + (X)))
250
251/*
252 * GPIO
253 */
254#define __get_MB93493_GPIO_PDR(X) __get_MB93493(0x380 + (X) * 0xc0)
255#define __set_MB93493_GPIO_PDR(X,V) __set_MB93493(0x380 + (X) * 0xc0, (V))
256
257#define __get_MB93493_GPIO_GPDR(X) __get_MB93493(0x384 + (X) * 0xc0)
258#define __set_MB93493_GPIO_GPDR(X,V) __set_MB93493(0x384 + (X) * 0xc0, (V))
259
260#define __get_MB93493_GPIO_SIR(X) __get_MB93493(0x388 + (X) * 0xc0)
261#define __set_MB93493_GPIO_SIR(X,V) __set_MB93493(0x388 + (X) * 0xc0, (V))
262
263#define __get_MB93493_GPIO_SOR(X) __get_MB93493(0x38c + (X) * 0xc0)
264#define __set_MB93493_GPIO_SOR(X,V) __set_MB93493(0x38c + (X) * 0xc0, (V))
265
266#define __get_MB93493_GPIO_PDSR(X) __get_MB93493(0x390 + (X) * 0xc0)
267#define __set_MB93493_GPIO_PDSR(X,V) __set_MB93493(0x390 + (X) * 0xc0, (V))
268
269#define __get_MB93493_GPIO_PDCR(X) __get_MB93493(0x394 + (X) * 0xc0)
270#define __set_MB93493_GPIO_PDCR(X,V) __set_MB93493(0x394 + (X) * 0xc0, (V))
271
272#define __get_MB93493_GPIO_INTST(X) __get_MB93493(0x398 + (X) * 0xc0)
273#define __set_MB93493_GPIO_INTST(X,V) __set_MB93493(0x398 + (X) * 0xc0, (V))
274
275#define __get_MB93493_GPIO_IEHL(X) __get_MB93493(0x39c + (X) * 0xc0)
276#define __set_MB93493_GPIO_IEHL(X,V) __set_MB93493(0x39c + (X) * 0xc0, (V))
277
278#define __get_MB93493_GPIO_IELH(X) __get_MB93493(0x3a0 + (X) * 0xc0)
279#define __set_MB93493_GPIO_IELH(X,V) __set_MB93493(0x3a0 + (X) * 0xc0, (V))
280
281#endif /* _ASM_MB93493_REGS_H */
diff --git a/include/asm-frv/mc146818rtc.h b/include/asm-frv/mc146818rtc.h
deleted file mode 100644
index 90dfb7a633d1..000000000000
--- a/include/asm-frv/mc146818rtc.h
+++ /dev/null
@@ -1,16 +0,0 @@
1/* mc146818rtc.h: RTC defs
2 *
3 * Copyright (C) 2005 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_MC146818RTC_H
13#define _ASM_MC146818RTC_H
14
15
16#endif /* _ASM_MC146818RTC_H */
diff --git a/include/asm-frv/mem-layout.h b/include/asm-frv/mem-layout.h
deleted file mode 100644
index 2947764fc0e0..000000000000
--- a/include/asm-frv/mem-layout.h
+++ /dev/null
@@ -1,86 +0,0 @@
1/* mem-layout.h: memory layout
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_MEM_LAYOUT_H
13#define _ASM_MEM_LAYOUT_H
14
15#ifndef __ASSEMBLY__
16#define __UL(X) ((unsigned long) (X))
17#else
18#define __UL(X) (X)
19#endif
20
21/*
22 * PAGE_SHIFT determines the page size
23 */
24#define PAGE_SHIFT 14
25
26#ifndef __ASSEMBLY__
27#define PAGE_SIZE (1UL << PAGE_SHIFT)
28#else
29#define PAGE_SIZE (1 << PAGE_SHIFT)
30#endif
31
32#define PAGE_MASK (~(PAGE_SIZE-1))
33
34/*
35 * the slab must be aligned such that load- and store-double instructions don't
36 * fault if used
37 */
38#define ARCH_KMALLOC_MINALIGN 8
39#define ARCH_SLAB_MINALIGN 8
40
41/*****************************************************************************/
42/*
43 * virtual memory layout from kernel's point of view
44 */
45#define PAGE_OFFSET ((unsigned long) &__page_offset)
46
47#ifdef CONFIG_MMU
48
49/* see Documentation/frv/mmu-layout.txt */
50#define KERNEL_LOWMEM_START __UL(0xc0000000)
51#define KERNEL_LOWMEM_END __UL(0xd0000000)
52#define VMALLOC_START __UL(0xd0000000)
53#define VMALLOC_END __UL(0xd8000000)
54#define PKMAP_BASE __UL(0xd8000000)
55#define PKMAP_END __UL(0xdc000000)
56#define KMAP_ATOMIC_SECONDARY_FRAME __UL(0xdc000000)
57#define KMAP_ATOMIC_PRIMARY_FRAME __UL(0xdd000000)
58
59#endif
60
61#define KERNEL_IO_START __UL(0xe0000000)
62
63
64/*****************************************************************************/
65/*
66 * memory layout from userspace's point of view
67 */
68#define BRK_BASE __UL(2 * 1024 * 1024 + PAGE_SIZE)
69#define STACK_TOP __UL(2 * 1024 * 1024)
70#define STACK_TOP_MAX __UL(0xc0000000)
71
72/* userspace process size */
73#ifdef CONFIG_MMU
74#define TASK_SIZE (PAGE_OFFSET)
75#else
76#define TASK_SIZE __UL(0xFFFFFFFFUL)
77#endif
78
79/* base of area at which unspecified mmaps will start */
80#ifdef CONFIG_BINFMT_ELF_FDPIC
81#define TASK_UNMAPPED_BASE __UL(16 * 1024 * 1024)
82#else
83#define TASK_UNMAPPED_BASE __UL(TASK_SIZE / 3)
84#endif
85
86#endif /* _ASM_MEM_LAYOUT_H */
diff --git a/include/asm-frv/mman.h b/include/asm-frv/mman.h
deleted file mode 100644
index b4371e928683..000000000000
--- a/include/asm-frv/mman.h
+++ /dev/null
@@ -1,18 +0,0 @@
1#ifndef __ASM_MMAN_H__
2#define __ASM_MMAN_H__
3
4#include <asm-generic/mman.h>
5
6#define MAP_GROWSDOWN 0x0100 /* stack-like segment */
7#define MAP_DENYWRITE 0x0800 /* ETXTBSY */
8#define MAP_EXECUTABLE 0x1000 /* mark it as an executable */
9#define MAP_LOCKED 0x2000 /* pages are locked */
10#define MAP_NORESERVE 0x4000 /* don't check for reservations */
11#define MAP_POPULATE 0x8000 /* populate (prefault) pagetables */
12#define MAP_NONBLOCK 0x10000 /* do not block on IO */
13
14#define MCL_CURRENT 1 /* lock all current mappings */
15#define MCL_FUTURE 2 /* lock all future mappings */
16
17#endif /* __ASM_MMAN_H__ */
18
diff --git a/include/asm-frv/mmu.h b/include/asm-frv/mmu.h
deleted file mode 100644
index 86ca0e86e7d2..000000000000
--- a/include/asm-frv/mmu.h
+++ /dev/null
@@ -1,41 +0,0 @@
1/* mmu.h: memory management context for FR-V with or without MMU support
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11#ifndef _ASM_MMU_H
12#define _ASM_MMU_H
13
14typedef struct {
15#ifdef CONFIG_MMU
16 struct list_head id_link; /* link in list of context ID owners */
17 unsigned short id; /* MMU context ID */
18 unsigned short id_busy; /* true if ID is in CXNR */
19 unsigned long itlb_cached_pge; /* [SCR0] PGE cached for insn TLB handler */
20 unsigned long itlb_ptd_mapping; /* [DAMR4] PTD mapping for itlb cached PGE */
21 unsigned long dtlb_cached_pge; /* [SCR1] PGE cached for data TLB handler */
22 unsigned long dtlb_ptd_mapping; /* [DAMR5] PTD mapping for dtlb cached PGE */
23
24#else
25 unsigned long end_brk;
26
27#endif
28
29#ifdef CONFIG_BINFMT_ELF_FDPIC
30 unsigned long exec_fdpic_loadmap;
31 unsigned long interp_fdpic_loadmap;
32#endif
33
34} mm_context_t;
35
36#ifdef CONFIG_MMU
37extern int __nongpreldata cxn_pinned;
38extern int cxn_pin_by_pid(pid_t pid);
39#endif
40
41#endif /* _ASM_MMU_H */
diff --git a/include/asm-frv/mmu_context.h b/include/asm-frv/mmu_context.h
deleted file mode 100644
index c7daa395156a..000000000000
--- a/include/asm-frv/mmu_context.h
+++ /dev/null
@@ -1,50 +0,0 @@
1/* mmu_context.h: MMU context management routines
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_MMU_CONTEXT_H
13#define _ASM_MMU_CONTEXT_H
14
15#include <asm/setup.h>
16#include <asm/page.h>
17#include <asm/pgalloc.h>
18#include <asm-generic/mm_hooks.h>
19
20static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
21{
22}
23
24#ifdef CONFIG_MMU
25extern int init_new_context(struct task_struct *tsk, struct mm_struct *mm);
26extern void change_mm_context(mm_context_t *old, mm_context_t *ctx, pgd_t *_pgd);
27extern void destroy_context(struct mm_struct *mm);
28
29#else
30#define init_new_context(tsk, mm) ({ 0; })
31#define change_mm_context(old, ctx, _pml4) do {} while(0)
32#define destroy_context(mm) do {} while(0)
33#endif
34
35#define switch_mm(prev, next, tsk) \
36do { \
37 if (prev != next) \
38 change_mm_context(&prev->context, &next->context, next->pgd); \
39} while(0)
40
41#define activate_mm(prev, next) \
42do { \
43 change_mm_context(&prev->context, &next->context, next->pgd); \
44} while(0)
45
46#define deactivate_mm(tsk, mm) \
47do { \
48} while(0)
49
50#endif
diff --git a/include/asm-frv/module.h b/include/asm-frv/module.h
deleted file mode 100644
index 3d5c6360289a..000000000000
--- a/include/asm-frv/module.h
+++ /dev/null
@@ -1,28 +0,0 @@
1/* module.h: FRV module stuff
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11#ifndef _ASM_MODULE_H
12#define _ASM_MODULE_H
13
14struct mod_arch_specific
15{
16};
17
18#define Elf_Shdr Elf32_Shdr
19#define Elf_Sym Elf32_Sym
20#define Elf_Ehdr Elf32_Ehdr
21
22/*
23 * Include the architecture version.
24 */
25#define MODULE_ARCH_VERMAGIC __stringify(PROCESSOR_MODEL_NAME) " "
26
27#endif /* _ASM_MODULE_H */
28
diff --git a/include/asm-frv/msgbuf.h b/include/asm-frv/msgbuf.h
deleted file mode 100644
index 97ceb55a06fb..000000000000
--- a/include/asm-frv/msgbuf.h
+++ /dev/null
@@ -1,32 +0,0 @@
1#ifndef _ASM_MSGBUF_H
2#define _ASM_MSGBUF_H
3
4/*
5 * The msqid64_ds structure for FR-V architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct msqid64_ds {
15 struct ipc64_perm msg_perm;
16 __kernel_time_t msg_stime; /* last msgsnd time */
17 unsigned long __unused1;
18 __kernel_time_t msg_rtime; /* last msgrcv time */
19 unsigned long __unused2;
20 __kernel_time_t msg_ctime; /* last change time */
21 unsigned long __unused3;
22 unsigned long msg_cbytes; /* current number of bytes on queue */
23 unsigned long msg_qnum; /* number of messages in queue */
24 unsigned long msg_qbytes; /* max number of bytes on queue */
25 __kernel_pid_t msg_lspid; /* pid of last msgsnd */
26 __kernel_pid_t msg_lrpid; /* last receive pid */
27 unsigned long __unused4;
28 unsigned long __unused5;
29};
30
31#endif /* _ASM_MSGBUF_H */
32
diff --git a/include/asm-frv/mutex.h b/include/asm-frv/mutex.h
deleted file mode 100644
index 458c1f7fbc18..000000000000
--- a/include/asm-frv/mutex.h
+++ /dev/null
@@ -1,9 +0,0 @@
1/*
2 * Pull in the generic implementation for the mutex fastpath.
3 *
4 * TODO: implement optimized primitives instead, or leave the generic
5 * implementation in place, or pick the atomic_xchg() based generic
6 * implementation. (see asm-generic/mutex-xchg.h for details)
7 */
8
9#include <asm-generic/mutex-dec.h>
diff --git a/include/asm-frv/page.h b/include/asm-frv/page.h
deleted file mode 100644
index bd9c220094c7..000000000000
--- a/include/asm-frv/page.h
+++ /dev/null
@@ -1,78 +0,0 @@
1#ifndef _ASM_PAGE_H
2#define _ASM_PAGE_H
3
4#include <asm/virtconvert.h>
5#include <asm/mem-layout.h>
6#include <asm/sections.h>
7#include <asm/setup.h>
8
9#ifndef __ASSEMBLY__
10
11#define get_user_page(vaddr) __get_free_page(GFP_KERNEL)
12#define free_user_page(page, addr) free_page(addr)
13
14#define clear_page(pgaddr) memset((pgaddr), 0, PAGE_SIZE)
15#define copy_page(to,from) memcpy((to), (from), PAGE_SIZE)
16
17#define clear_user_page(pgaddr, vaddr, page) memset((pgaddr), 0, PAGE_SIZE)
18#define copy_user_page(vto, vfrom, vaddr, topg) memcpy((vto), (vfrom), PAGE_SIZE)
19
20/*
21 * These are used to make use of C type-checking..
22 */
23typedef struct { unsigned long pte; } pte_t;
24typedef struct { unsigned long ste[64];} pmd_t;
25typedef struct { pmd_t pue[1]; } pud_t;
26typedef struct { pud_t pge[1]; } pgd_t;
27typedef struct { unsigned long pgprot; } pgprot_t;
28typedef struct page *pgtable_t;
29
30#define pte_val(x) ((x).pte)
31#define pmd_val(x) ((x).ste[0])
32#define pud_val(x) ((x).pue[0])
33#define pgd_val(x) ((x).pge[0])
34#define pgprot_val(x) ((x).pgprot)
35
36#define __pte(x) ((pte_t) { (x) } )
37#define __pmd(x) ((pmd_t) { (x) } )
38#define __pud(x) ((pud_t) { (x) } )
39#define __pgd(x) ((pgd_t) { (x) } )
40#define __pgprot(x) ((pgprot_t) { (x) } )
41#define PTE_MASK PAGE_MASK
42
43#define devmem_is_allowed(pfn) 1
44
45#define __pa(vaddr) virt_to_phys((void *) (unsigned long) (vaddr))
46#define __va(paddr) phys_to_virt((unsigned long) (paddr))
47
48#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT)
49
50extern unsigned long max_low_pfn;
51extern unsigned long min_low_pfn;
52extern unsigned long max_pfn;
53
54#ifdef CONFIG_MMU
55#define pfn_valid(pfn) ((pfn) < max_mapnr)
56#else
57#define ARCH_PFN_OFFSET (PAGE_OFFSET >> PAGE_SHIFT)
58#define pfn_valid(pfn) ((pfn) >= min_low_pfn && (pfn) < max_low_pfn)
59
60#endif
61
62#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
63#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
64
65
66#ifdef CONFIG_MMU
67#define VM_DATA_DEFAULT_FLAGS \
68 (VM_READ | VM_WRITE | \
69 ((current->personality & READ_IMPLIES_EXEC) ? VM_EXEC : 0 ) | \
70 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
71#endif
72
73#endif /* __ASSEMBLY__ */
74
75#include <asm-generic/memory_model.h>
76#include <asm-generic/page.h>
77
78#endif /* _ASM_PAGE_H */
diff --git a/include/asm-frv/param.h b/include/asm-frv/param.h
deleted file mode 100644
index 6859dd503ed3..000000000000
--- a/include/asm-frv/param.h
+++ /dev/null
@@ -1,22 +0,0 @@
1#ifndef _ASM_PARAM_H
2#define _ASM_PARAM_H
3
4#ifdef __KERNEL__
5#define HZ CONFIG_HZ /* Internal kernel timer frequency */
6#define USER_HZ 100 /* .. some user interfaces are in "ticks" */
7#define CLOCKS_PER_SEC (USER_HZ) /* like times() */
8#endif
9
10#ifndef HZ
11#define HZ 100
12#endif
13
14#define EXEC_PAGESIZE 16384
15
16#ifndef NOGROUP
17#define NOGROUP (-1)
18#endif
19
20#define MAXHOSTNAMELEN 64 /* max length of hostname */
21
22#endif /* _ASM_PARAM_H */
diff --git a/include/asm-frv/pci.h b/include/asm-frv/pci.h
deleted file mode 100644
index 585d9b49949a..000000000000
--- a/include/asm-frv/pci.h
+++ /dev/null
@@ -1,118 +0,0 @@
1/* pci.h: FR-V specific PCI declarations
2 *
3 * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 * - Derived from include/asm-m68k/pci.h
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13#ifndef ASM_PCI_H
14#define ASM_PCI_H
15
16#include <linux/mm.h>
17#include <asm/scatterlist.h>
18#include <asm-generic/pci-dma-compat.h>
19#include <asm-generic/pci.h>
20
21struct pci_dev;
22
23#define pcibios_assign_all_busses() 0
24
25extern void pcibios_set_master(struct pci_dev *dev);
26
27extern void pcibios_penalize_isa_irq(int irq);
28
29#ifdef CONFIG_MMU
30extern void *consistent_alloc(gfp_t gfp, size_t size, dma_addr_t *dma_handle);
31extern void consistent_free(void *vaddr);
32extern void consistent_sync(void *vaddr, size_t size, int direction);
33extern void consistent_sync_page(struct page *page, unsigned long offset,
34 size_t size, int direction);
35#endif
36
37extern void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size,
38 dma_addr_t *dma_handle);
39
40extern void pci_free_consistent(struct pci_dev *hwdev, size_t size,
41 void *vaddr, dma_addr_t dma_handle);
42
43/* Return the index of the PCI controller for device PDEV. */
44#define pci_controller_num(PDEV) (0)
45
46/* The PCI address space does equal the physical memory
47 * address space. The networking and block device layers use
48 * this boolean for bounce buffer decisions.
49 */
50#define PCI_DMA_BUS_IS_PHYS (1)
51
52/* pci_unmap_{page,single} is a nop so... */
53#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
54#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)
55#define pci_unmap_addr(PTR, ADDR_NAME) (0)
56#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
57#define pci_unmap_len(PTR, LEN_NAME) (0)
58#define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)
59
60#ifdef CONFIG_PCI
61static inline void pci_dma_burst_advice(struct pci_dev *pdev,
62 enum pci_dma_burst_strategy *strat,
63 unsigned long *strategy_parameter)
64{
65 *strat = PCI_DMA_BURST_INFINITY;
66 *strategy_parameter = ~0UL;
67}
68#endif
69
70/*
71 * These are pretty much arbitary with the CoMEM implementation.
72 * We have the whole address space to ourselves.
73 */
74#define PCIBIOS_MIN_IO 0x100
75#define PCIBIOS_MIN_MEM 0x00010000
76
77/* Make physical memory consistent for a single
78 * streaming mode DMA translation after a transfer.
79 *
80 * If you perform a pci_map_single() but wish to interrogate the
81 * buffer using the cpu, yet do not wish to teardown the PCI dma
82 * mapping, you must call this function before doing so. At the
83 * next point you give the PCI dma address back to the card, the
84 * device again owns the buffer.
85 */
86static inline void pci_dma_sync_single(struct pci_dev *hwdev,
87 dma_addr_t dma_handle,
88 size_t size, int direction)
89{
90 if (direction == PCI_DMA_NONE)
91 BUG();
92
93 frv_cache_wback_inv((unsigned long)bus_to_virt(dma_handle),
94 (unsigned long)bus_to_virt(dma_handle) + size);
95}
96
97/* Make physical memory consistent for a set of streaming
98 * mode DMA translations after a transfer.
99 *
100 * The same as pci_dma_sync_single but for a scatter-gather list,
101 * same rules and usage.
102 */
103static inline void pci_dma_sync_sg(struct pci_dev *hwdev,
104 struct scatterlist *sg,
105 int nelems, int direction)
106{
107 int i;
108
109 if (direction == PCI_DMA_NONE)
110 BUG();
111
112 for (i = 0; i < nelems; i++)
113 frv_cache_wback_inv(sg_dma_address(&sg[i]),
114 sg_dma_address(&sg[i])+sg_dma_len(&sg[i]));
115}
116
117
118#endif
diff --git a/include/asm-frv/percpu.h b/include/asm-frv/percpu.h
deleted file mode 100644
index 2cad3f874ded..000000000000
--- a/include/asm-frv/percpu.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __ASM_PERCPU_H
2#define __ASM_PERCPU_H
3
4#include <asm-generic/percpu.h>
5
6#endif /* __ASM_PERCPU_H */
diff --git a/include/asm-frv/pgalloc.h b/include/asm-frv/pgalloc.h
deleted file mode 100644
index 971e6addb009..000000000000
--- a/include/asm-frv/pgalloc.h
+++ /dev/null
@@ -1,69 +0,0 @@
1/* pgalloc.h: Page allocation routines for FRV
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 *
11 * Derived from:
12 * include/asm-m68knommu/pgalloc.h
13 * include/asm-i386/pgalloc.h
14 */
15#ifndef _ASM_PGALLOC_H
16#define _ASM_PGALLOC_H
17
18#include <asm/setup.h>
19#include <asm/virtconvert.h>
20
21#ifdef CONFIG_MMU
22
23#define pmd_populate_kernel(mm, pmd, pte) __set_pmd(pmd, __pa(pte) | _PAGE_TABLE)
24#define pmd_populate(MM, PMD, PAGE) \
25do { \
26 __set_pmd((PMD), page_to_pfn(PAGE) << PAGE_SHIFT | _PAGE_TABLE); \
27} while(0)
28#define pmd_pgtable(pmd) pmd_page(pmd)
29
30/*
31 * Allocate and free page tables.
32 */
33
34extern pgd_t *pgd_alloc(struct mm_struct *);
35extern void pgd_free(struct mm_struct *mm, pgd_t *);
36
37extern pte_t *pte_alloc_one_kernel(struct mm_struct *, unsigned long);
38
39extern pgtable_t pte_alloc_one(struct mm_struct *, unsigned long);
40
41static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
42{
43 free_page((unsigned long)pte);
44}
45
46static inline void pte_free(struct mm_struct *mm, pgtable_t pte)
47{
48 pgtable_page_dtor(pte);
49 __free_page(pte);
50}
51
52#define __pte_free_tlb(tlb,pte) \
53do { \
54 pgtable_page_dtor(pte); \
55 tlb_remove_page((tlb),(pte)); \
56} while (0)
57
58/*
59 * allocating and freeing a pmd is trivial: the 1-entry pmd is
60 * inside the pgd, so has no extra memory associated with it.
61 * (In the PAE case we free the pmds as part of the pgd.)
62 */
63#define pmd_alloc_one(mm, addr) ({ BUG(); ((pmd_t *) 2); })
64#define pmd_free(mm, x) do { } while (0)
65#define __pmd_free_tlb(tlb,x) do { } while (0)
66
67#endif /* CONFIG_MMU */
68
69#endif /* _ASM_PGALLOC_H */
diff --git a/include/asm-frv/pgtable.h b/include/asm-frv/pgtable.h
deleted file mode 100644
index e16fdb1f4f4f..000000000000
--- a/include/asm-frv/pgtable.h
+++ /dev/null
@@ -1,551 +0,0 @@
1/* pgtable.h: FR-V page table mangling
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 *
11 * Derived from:
12 * include/asm-m68knommu/pgtable.h
13 * include/asm-i386/pgtable.h
14 */
15
16#ifndef _ASM_PGTABLE_H
17#define _ASM_PGTABLE_H
18
19#include <asm/mem-layout.h>
20#include <asm/setup.h>
21#include <asm/processor.h>
22
23#ifndef __ASSEMBLY__
24#include <linux/threads.h>
25#include <linux/slab.h>
26#include <linux/list.h>
27#include <linux/spinlock.h>
28#include <linux/sched.h>
29struct vm_area_struct;
30#endif
31
32#ifndef __ASSEMBLY__
33#if defined(CONFIG_HIGHPTE)
34typedef unsigned long pte_addr_t;
35#else
36typedef pte_t *pte_addr_t;
37#endif
38#endif
39
40/*****************************************************************************/
41/*
42 * MMU-less operation case first
43 */
44#ifndef CONFIG_MMU
45
46#define pgd_present(pgd) (1) /* pages are always present on NO_MM */
47#define pgd_none(pgd) (0)
48#define pgd_bad(pgd) (0)
49#define pgd_clear(pgdp)
50#define kern_addr_valid(addr) (1)
51#define pmd_offset(a, b) ((void *) 0)
52
53#define PAGE_NONE __pgprot(0) /* these mean nothing to NO_MM */
54#define PAGE_SHARED __pgprot(0) /* these mean nothing to NO_MM */
55#define PAGE_COPY __pgprot(0) /* these mean nothing to NO_MM */
56#define PAGE_READONLY __pgprot(0) /* these mean nothing to NO_MM */
57#define PAGE_KERNEL __pgprot(0) /* these mean nothing to NO_MM */
58
59#define __swp_type(x) (0)
60#define __swp_offset(x) (0)
61#define __swp_entry(typ,off) ((swp_entry_t) { ((typ) | ((off) << 7)) })
62#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
63#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
64
65#ifndef __ASSEMBLY__
66static inline int pte_file(pte_t pte) { return 0; }
67#endif
68
69#define ZERO_PAGE(vaddr) ({ BUG(); NULL; })
70
71#define swapper_pg_dir ((pgd_t *) NULL)
72
73#define pgtable_cache_init() do {} while (0)
74#define arch_enter_lazy_mmu_mode() do {} while (0)
75#define arch_leave_lazy_mmu_mode() do {} while (0)
76#define arch_enter_lazy_cpu_mode() do {} while (0)
77#define arch_leave_lazy_cpu_mode() do {} while (0)
78
79#else /* !CONFIG_MMU */
80/*****************************************************************************/
81/*
82 * then MMU operation
83 */
84
85/*
86 * ZERO_PAGE is a global shared page that is always zero: used
87 * for zero-mapped memory areas etc..
88 */
89#ifndef __ASSEMBLY__
90extern unsigned long empty_zero_page;
91#define ZERO_PAGE(vaddr) virt_to_page(empty_zero_page)
92#endif
93
94/*
95 * we use 2-level page tables, folding the PMD (mid-level table) into the PGE (top-level entry)
96 * [see Documentation/frv/mmu-layout.txt]
97 *
98 * Page Directory:
99 * - Size: 16KB
100 * - 64 PGEs per PGD
101 * - Each PGE holds 1 PUD and covers 64MB
102 *
103 * Page Upper Directory:
104 * - Size: 256B
105 * - 1 PUE per PUD
106 * - Each PUE holds 1 PMD and covers 64MB
107 *
108 * Page Mid-Level Directory
109 * - Size: 256B
110 * - 1 PME per PMD
111 * - Each PME holds 64 STEs, all of which point to separate chunks of the same Page Table
112 * - All STEs are instantiated at the same time
113 *
114 * Page Table
115 * - Size: 16KB
116 * - 4096 PTEs per PT
117 * - Each Linux PT is subdivided into 64 FR451 PT's, each of which holds 64 entries
118 *
119 * Pages
120 * - Size: 4KB
121 *
122 * total PTEs
123 * = 1 PML4E * 64 PGEs * 1 PUEs * 1 PMEs * 4096 PTEs
124 * = 1 PML4E * 64 PGEs * 64 STEs * 64 PTEs/FR451-PT
125 * = 262144 (or 256 * 1024)
126 */
127#define PGDIR_SHIFT 26
128#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
129#define PGDIR_MASK (~(PGDIR_SIZE - 1))
130#define PTRS_PER_PGD 64
131
132#define PUD_SHIFT 26
133#define PTRS_PER_PUD 1
134#define PUD_SIZE (1UL << PUD_SHIFT)
135#define PUD_MASK (~(PUD_SIZE - 1))
136#define PUE_SIZE 256
137
138#define PMD_SHIFT 26
139#define PMD_SIZE (1UL << PMD_SHIFT)
140#define PMD_MASK (~(PMD_SIZE - 1))
141#define PTRS_PER_PMD 1
142#define PME_SIZE 256
143
144#define __frv_PT_SIZE 256
145
146#define PTRS_PER_PTE 4096
147
148#define USER_PGDS_IN_LAST_PML4 (TASK_SIZE / PGDIR_SIZE)
149#define FIRST_USER_ADDRESS 0
150
151#define USER_PGD_PTRS (PAGE_OFFSET >> PGDIR_SHIFT)
152#define KERNEL_PGD_PTRS (PTRS_PER_PGD - USER_PGD_PTRS)
153
154#define TWOLEVEL_PGDIR_SHIFT 26
155#define BOOT_USER_PGD_PTRS (__PAGE_OFFSET >> TWOLEVEL_PGDIR_SHIFT)
156#define BOOT_KERNEL_PGD_PTRS (PTRS_PER_PGD - BOOT_USER_PGD_PTRS)
157
158#ifndef __ASSEMBLY__
159
160extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
161
162#define pte_ERROR(e) \
163 printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, (e).pte)
164#define pmd_ERROR(e) \
165 printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e))
166#define pud_ERROR(e) \
167 printk("%s:%d: bad pud %08lx.\n", __FILE__, __LINE__, pmd_val(pud_val(e)))
168#define pgd_ERROR(e) \
169 printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pmd_val(pud_val(pgd_val(e))))
170
171/*
172 * Certain architectures need to do special things when PTEs
173 * within a page table are directly modified. Thus, the following
174 * hook is made available.
175 */
176#define set_pte(pteptr, pteval) \
177do { \
178 *(pteptr) = (pteval); \
179 asm volatile("dcf %M0" :: "U"(*pteptr)); \
180} while(0)
181#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
182
183/*
184 * pgd_offset() returns a (pgd_t *)
185 * pgd_index() is used get the offset into the pgd page's array of pgd_t's;
186 */
187#define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
188
189/*
190 * a shortcut which implies the use of the kernel's pgd, instead
191 * of a process's
192 */
193#define pgd_offset_k(address) pgd_offset(&init_mm, address)
194
195/*
196 * The "pgd_xxx()" functions here are trivial for a folded two-level
197 * setup: the pud is never bad, and a pud always exists (as it's folded
198 * into the pgd entry)
199 */
200static inline int pgd_none(pgd_t pgd) { return 0; }
201static inline int pgd_bad(pgd_t pgd) { return 0; }
202static inline int pgd_present(pgd_t pgd) { return 1; }
203static inline void pgd_clear(pgd_t *pgd) { }
204
205#define pgd_populate(mm, pgd, pud) do { } while (0)
206/*
207 * (puds are folded into pgds so this doesn't get actually called,
208 * but the define is needed for a generic inline function.)
209 */
210#define set_pgd(pgdptr, pgdval) \
211do { \
212 memcpy((pgdptr), &(pgdval), sizeof(pgd_t)); \
213 asm volatile("dcf %M0" :: "U"(*(pgdptr))); \
214} while(0)
215
216static inline pud_t *pud_offset(pgd_t *pgd, unsigned long address)
217{
218 return (pud_t *) pgd;
219}
220
221#define pgd_page(pgd) (pud_page((pud_t){ pgd }))
222#define pgd_page_vaddr(pgd) (pud_page_vaddr((pud_t){ pgd }))
223
224/*
225 * allocating and freeing a pud is trivial: the 1-entry pud is
226 * inside the pgd, so has no extra memory associated with it.
227 */
228#define pud_alloc_one(mm, address) NULL
229#define pud_free(mm, x) do { } while (0)
230#define __pud_free_tlb(tlb, x) do { } while (0)
231
232/*
233 * The "pud_xxx()" functions here are trivial for a folded two-level
234 * setup: the pmd is never bad, and a pmd always exists (as it's folded
235 * into the pud entry)
236 */
237static inline int pud_none(pud_t pud) { return 0; }
238static inline int pud_bad(pud_t pud) { return 0; }
239static inline int pud_present(pud_t pud) { return 1; }
240static inline void pud_clear(pud_t *pud) { }
241
242#define pud_populate(mm, pmd, pte) do { } while (0)
243
244/*
245 * (pmds are folded into puds so this doesn't get actually called,
246 * but the define is needed for a generic inline function.)
247 */
248#define set_pud(pudptr, pudval) set_pmd((pmd_t *)(pudptr), (pmd_t) { pudval })
249
250#define pud_page(pud) (pmd_page((pmd_t){ pud }))
251#define pud_page_vaddr(pud) (pmd_page_vaddr((pmd_t){ pud }))
252
253/*
254 * (pmds are folded into pgds so this doesn't get actually called,
255 * but the define is needed for a generic inline function.)
256 */
257extern void __set_pmd(pmd_t *pmdptr, unsigned long __pmd);
258
259#define set_pmd(pmdptr, pmdval) \
260do { \
261 __set_pmd((pmdptr), (pmdval).ste[0]); \
262} while(0)
263
264#define __pmd_index(address) 0
265
266static inline pmd_t *pmd_offset(pud_t *dir, unsigned long address)
267{
268 return (pmd_t *) dir + __pmd_index(address);
269}
270
271#define pte_same(a, b) ((a).pte == (b).pte)
272#define pte_page(x) (mem_map + ((unsigned long)(((x).pte >> PAGE_SHIFT))))
273#define pte_none(x) (!(x).pte)
274#define pte_pfn(x) ((unsigned long)(((x).pte >> PAGE_SHIFT)))
275#define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
276#define pfn_pmd(pfn, prot) __pmd(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
277
278#define VMALLOC_VMADDR(x) ((unsigned long) (x))
279
280#endif /* !__ASSEMBLY__ */
281
282/*
283 * control flags in AMPR registers and TLB entries
284 */
285#define _PAGE_BIT_PRESENT xAMPRx_V_BIT
286#define _PAGE_BIT_WP DAMPRx_WP_BIT
287#define _PAGE_BIT_NOCACHE xAMPRx_C_BIT
288#define _PAGE_BIT_SUPER xAMPRx_S_BIT
289#define _PAGE_BIT_ACCESSED xAMPRx_RESERVED8_BIT
290#define _PAGE_BIT_DIRTY xAMPRx_M_BIT
291#define _PAGE_BIT_NOTGLOBAL xAMPRx_NG_BIT
292
293#define _PAGE_PRESENT xAMPRx_V
294#define _PAGE_WP DAMPRx_WP
295#define _PAGE_NOCACHE xAMPRx_C
296#define _PAGE_SUPER xAMPRx_S
297#define _PAGE_ACCESSED xAMPRx_RESERVED8 /* accessed if set */
298#define _PAGE_DIRTY xAMPRx_M
299#define _PAGE_NOTGLOBAL xAMPRx_NG
300
301#define _PAGE_RESERVED_MASK (xAMPRx_RESERVED8 | xAMPRx_RESERVED13)
302
303#define _PAGE_FILE 0x002 /* set:pagecache unset:swap */
304#define _PAGE_PROTNONE 0x000 /* If not present */
305
306#define _PAGE_CHG_MASK (PTE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY)
307
308#define __PGPROT_BASE \
309 (_PAGE_PRESENT | xAMPRx_SS_16Kb | xAMPRx_D | _PAGE_NOTGLOBAL | _PAGE_ACCESSED)
310
311#define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_ACCESSED)
312#define PAGE_SHARED __pgprot(__PGPROT_BASE)
313#define PAGE_COPY __pgprot(__PGPROT_BASE | _PAGE_WP)
314#define PAGE_READONLY __pgprot(__PGPROT_BASE | _PAGE_WP)
315
316#define __PAGE_KERNEL (__PGPROT_BASE | _PAGE_SUPER | _PAGE_DIRTY)
317#define __PAGE_KERNEL_NOCACHE (__PGPROT_BASE | _PAGE_SUPER | _PAGE_DIRTY | _PAGE_NOCACHE)
318#define __PAGE_KERNEL_RO (__PGPROT_BASE | _PAGE_SUPER | _PAGE_DIRTY | _PAGE_WP)
319
320#define MAKE_GLOBAL(x) __pgprot((x) & ~_PAGE_NOTGLOBAL)
321
322#define PAGE_KERNEL MAKE_GLOBAL(__PAGE_KERNEL)
323#define PAGE_KERNEL_RO MAKE_GLOBAL(__PAGE_KERNEL_RO)
324#define PAGE_KERNEL_NOCACHE MAKE_GLOBAL(__PAGE_KERNEL_NOCACHE)
325
326#define _PAGE_TABLE (_PAGE_PRESENT | xAMPRx_SS_16Kb)
327
328#ifndef __ASSEMBLY__
329
330/*
331 * The FR451 can do execute protection by virtue of having separate TLB miss handlers for
332 * instruction access and for data access. However, we don't have enough reserved bits to say
333 * "execute only", so we don't bother. If you can read it, you can execute it and vice versa.
334 */
335#define __P000 PAGE_NONE
336#define __P001 PAGE_READONLY
337#define __P010 PAGE_COPY
338#define __P011 PAGE_COPY
339#define __P100 PAGE_READONLY
340#define __P101 PAGE_READONLY
341#define __P110 PAGE_COPY
342#define __P111 PAGE_COPY
343
344#define __S000 PAGE_NONE
345#define __S001 PAGE_READONLY
346#define __S010 PAGE_SHARED
347#define __S011 PAGE_SHARED
348#define __S100 PAGE_READONLY
349#define __S101 PAGE_READONLY
350#define __S110 PAGE_SHARED
351#define __S111 PAGE_SHARED
352
353/*
354 * Define this to warn about kernel memory accesses that are
355 * done without a 'access_ok(VERIFY_WRITE,..)'
356 */
357#undef TEST_ACCESS_OK
358
359#define pte_present(x) (pte_val(x) & _PAGE_PRESENT)
360#define pte_clear(mm,addr,xp) do { set_pte_at(mm, addr, xp, __pte(0)); } while (0)
361
362#define pmd_none(x) (!pmd_val(x))
363#define pmd_present(x) (pmd_val(x) & _PAGE_PRESENT)
364#define pmd_bad(x) (pmd_val(x) & xAMPRx_SS)
365#define pmd_clear(xp) do { __set_pmd(xp, 0); } while(0)
366
367#define pmd_page_vaddr(pmd) \
368 ((unsigned long) __va(pmd_val(pmd) & PAGE_MASK))
369
370#ifndef CONFIG_DISCONTIGMEM
371#define pmd_page(pmd) (pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT))
372#endif
373
374#define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT))
375
376/*
377 * The following only work if pte_present() is true.
378 * Undefined behaviour if not..
379 */
380static inline int pte_dirty(pte_t pte) { return (pte).pte & _PAGE_DIRTY; }
381static inline int pte_young(pte_t pte) { return (pte).pte & _PAGE_ACCESSED; }
382static inline int pte_write(pte_t pte) { return !((pte).pte & _PAGE_WP); }
383static inline int pte_special(pte_t pte) { return 0; }
384
385static inline pte_t pte_mkclean(pte_t pte) { (pte).pte &= ~_PAGE_DIRTY; return pte; }
386static inline pte_t pte_mkold(pte_t pte) { (pte).pte &= ~_PAGE_ACCESSED; return pte; }
387static inline pte_t pte_wrprotect(pte_t pte) { (pte).pte |= _PAGE_WP; return pte; }
388static inline pte_t pte_mkdirty(pte_t pte) { (pte).pte |= _PAGE_DIRTY; return pte; }
389static inline pte_t pte_mkyoung(pte_t pte) { (pte).pte |= _PAGE_ACCESSED; return pte; }
390static inline pte_t pte_mkwrite(pte_t pte) { (pte).pte &= ~_PAGE_WP; return pte; }
391static inline pte_t pte_mkspecial(pte_t pte) { return pte; }
392
393static inline int ptep_test_and_clear_young(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep)
394{
395 int i = test_and_clear_bit(_PAGE_BIT_ACCESSED, ptep);
396 asm volatile("dcf %M0" :: "U"(*ptep));
397 return i;
398}
399
400static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
401{
402 unsigned long x = xchg(&ptep->pte, 0);
403 asm volatile("dcf %M0" :: "U"(*ptep));
404 return __pte(x);
405}
406
407static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
408{
409 set_bit(_PAGE_BIT_WP, ptep);
410 asm volatile("dcf %M0" :: "U"(*ptep));
411}
412
413/*
414 * Macro to mark a page protection value as "uncacheable"
415 */
416#define pgprot_noncached(prot) (__pgprot(pgprot_val(prot) | _PAGE_NOCACHE))
417
418/*
419 * Conversion functions: convert a page and protection to a page entry,
420 * and a page entry and page directory to the page they refer to.
421 */
422
423#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
424#define mk_pte_huge(entry) ((entry).pte_low |= _PAGE_PRESENT | _PAGE_PSE)
425
426/* This takes a physical page address that is used by the remapping functions */
427#define mk_pte_phys(physpage, pgprot) pfn_pte((physpage) >> PAGE_SHIFT, pgprot)
428
429static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
430{
431 pte.pte &= _PAGE_CHG_MASK;
432 pte.pte |= pgprot_val(newprot);
433 return pte;
434}
435
436/* to find an entry in a page-table-directory. */
437#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
438#define pgd_index_k(addr) pgd_index(addr)
439
440/* Find an entry in the bottom-level page table.. */
441#define __pte_index(address) (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
442
443/*
444 * the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE]
445 *
446 * this macro returns the index of the entry in the pte page which would
447 * control the given virtual address
448 */
449#define pte_index(address) \
450 (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
451#define pte_offset_kernel(dir, address) \
452 ((pte_t *) pmd_page_vaddr(*(dir)) + pte_index(address))
453
454#if defined(CONFIG_HIGHPTE)
455#define pte_offset_map(dir, address) \
456 ((pte_t *)kmap_atomic(pmd_page(*(dir)),KM_PTE0) + pte_index(address))
457#define pte_offset_map_nested(dir, address) \
458 ((pte_t *)kmap_atomic(pmd_page(*(dir)),KM_PTE1) + pte_index(address))
459#define pte_unmap(pte) kunmap_atomic(pte, KM_PTE0)
460#define pte_unmap_nested(pte) kunmap_atomic((pte), KM_PTE1)
461#else
462#define pte_offset_map(dir, address) \
463 ((pte_t *)page_address(pmd_page(*(dir))) + pte_index(address))
464#define pte_offset_map_nested(dir, address) pte_offset_map((dir), (address))
465#define pte_unmap(pte) do { } while (0)
466#define pte_unmap_nested(pte) do { } while (0)
467#endif
468
469/*
470 * Handle swap and file entries
471 * - the PTE is encoded in the following format:
472 * bit 0: Must be 0 (!_PAGE_PRESENT)
473 * bit 1: Type: 0 for swap, 1 for file (_PAGE_FILE)
474 * bits 2-7: Swap type
475 * bits 8-31: Swap offset
476 * bits 2-31: File pgoff
477 */
478#define __swp_type(x) (((x).val >> 2) & 0x1f)
479#define __swp_offset(x) ((x).val >> 8)
480#define __swp_entry(type, offset) ((swp_entry_t) { ((type) << 2) | ((offset) << 8) })
481#define __pte_to_swp_entry(_pte) ((swp_entry_t) { (_pte).pte })
482#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
483
484static inline int pte_file(pte_t pte)
485{
486 return pte.pte & _PAGE_FILE;
487}
488
489#define PTE_FILE_MAX_BITS 29
490
491#define pte_to_pgoff(PTE) ((PTE).pte >> 2)
492#define pgoff_to_pte(off) __pte((off) << 2 | _PAGE_FILE)
493
494/* Needs to be defined here and not in linux/mm.h, as it is arch dependent */
495#define PageSkip(page) (0)
496#define kern_addr_valid(addr) (1)
497
498#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
499 remap_pfn_range(vma, vaddr, pfn, size, prot)
500
501#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
502#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
503#define __HAVE_ARCH_PTEP_SET_WRPROTECT
504#define __HAVE_ARCH_PTE_SAME
505#include <asm-generic/pgtable.h>
506
507/*
508 * preload information about a newly instantiated PTE into the SCR0/SCR1 PGE cache
509 */
510static inline void update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t pte)
511{
512 struct mm_struct *mm;
513 unsigned long ampr;
514
515 mm = current->mm;
516 if (mm) {
517 pgd_t *pge = pgd_offset(mm, address);
518 pud_t *pue = pud_offset(pge, address);
519 pmd_t *pme = pmd_offset(pue, address);
520
521 ampr = pme->ste[0] & 0xffffff00;
522 ampr |= xAMPRx_L | xAMPRx_SS_16Kb | xAMPRx_S | xAMPRx_C |
523 xAMPRx_V;
524 } else {
525 address = ULONG_MAX;
526 ampr = 0;
527 }
528
529 asm volatile("movgs %0,scr0\n"
530 "movgs %0,scr1\n"
531 "movgs %1,dampr4\n"
532 "movgs %1,dampr5\n"
533 :
534 : "r"(address), "r"(ampr)
535 );
536}
537
538#ifdef CONFIG_PROC_FS
539extern char *proc_pid_status_frv_cxnr(struct mm_struct *mm, char *buffer);
540#endif
541
542extern void __init pgtable_cache_init(void);
543
544#endif /* !__ASSEMBLY__ */
545#endif /* !CONFIG_MMU */
546
547#ifndef __ASSEMBLY__
548extern void __init paging_init(void);
549#endif /* !__ASSEMBLY__ */
550
551#endif /* _ASM_PGTABLE_H */
diff --git a/include/asm-frv/poll.h b/include/asm-frv/poll.h
deleted file mode 100644
index 0d01479ccc56..000000000000
--- a/include/asm-frv/poll.h
+++ /dev/null
@@ -1,12 +0,0 @@
1#ifndef _ASM_POLL_H
2#define _ASM_POLL_H
3
4#define POLLWRNORM POLLOUT
5#define POLLWRBAND 256
6
7#include <asm-generic/poll.h>
8
9#undef POLLREMOVE
10
11#endif
12
diff --git a/include/asm-frv/posix_types.h b/include/asm-frv/posix_types.h
deleted file mode 100644
index a9f1f5be0632..000000000000
--- a/include/asm-frv/posix_types.h
+++ /dev/null
@@ -1,62 +0,0 @@
1#ifndef _ASM_POSIX_TYPES_H
2#define _ASM_POSIX_TYPES_H
3
4/*
5 * This file is generally used by user-level software, so you need to
6 * be a little careful about namespace pollution etc. Also, we cannot
7 * assume GCC is being used.
8 */
9
10typedef unsigned long __kernel_ino_t;
11typedef unsigned short __kernel_mode_t;
12typedef unsigned short __kernel_nlink_t;
13typedef long __kernel_off_t;
14typedef int __kernel_pid_t;
15typedef unsigned short __kernel_ipc_pid_t;
16typedef unsigned short __kernel_uid_t;
17typedef unsigned short __kernel_gid_t;
18typedef unsigned int __kernel_size_t;
19typedef int __kernel_ssize_t;
20typedef int __kernel_ptrdiff_t;
21typedef long __kernel_time_t;
22typedef long __kernel_suseconds_t;
23typedef long __kernel_clock_t;
24typedef int __kernel_timer_t;
25typedef int __kernel_clockid_t;
26typedef int __kernel_daddr_t;
27typedef char * __kernel_caddr_t;
28typedef unsigned short __kernel_uid16_t;
29typedef unsigned short __kernel_gid16_t;
30typedef unsigned int __kernel_uid32_t;
31typedef unsigned int __kernel_gid32_t;
32
33typedef unsigned short __kernel_old_uid_t;
34typedef unsigned short __kernel_old_gid_t;
35typedef unsigned short __kernel_old_dev_t;
36
37#ifdef __GNUC__
38typedef long long __kernel_loff_t;
39#endif
40
41typedef struct {
42 int val[2];
43} __kernel_fsid_t;
44
45#if defined(__KERNEL__)
46
47#undef __FD_SET
48#define __FD_SET(d, set) ((set)->fds_bits[__FDELT(d)] |= __FDMASK(d))
49
50#undef __FD_CLR
51#define __FD_CLR(d, set) ((set)->fds_bits[__FDELT(d)] &= ~__FDMASK(d))
52
53#undef __FD_ISSET
54#define __FD_ISSET(d, set) (!!((set)->fds_bits[__FDELT(d)] & __FDMASK(d)))
55
56#undef __FD_ZERO
57#define __FD_ZERO(fdsetp) (memset (fdsetp, 0, sizeof(*(fd_set *)fdsetp)))
58
59#endif /* defined(__KERNEL__) */
60
61#endif
62
diff --git a/include/asm-frv/processor.h b/include/asm-frv/processor.h
deleted file mode 100644
index 3744f2e47f48..000000000000
--- a/include/asm-frv/processor.h
+++ /dev/null
@@ -1,153 +0,0 @@
1/* processor.h: FRV processor definitions
2 *
3 * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_PROCESSOR_H
13#define _ASM_PROCESSOR_H
14
15#include <asm/mem-layout.h>
16
17#ifndef __ASSEMBLY__
18/*
19 * Default implementation of macro that returns current
20 * instruction pointer ("program counter").
21 */
22#define current_text_addr() ({ __label__ _l; _l: &&_l;})
23
24#include <linux/compiler.h>
25#include <linux/linkage.h>
26#include <asm/sections.h>
27#include <asm/segment.h>
28#include <asm/fpu.h>
29#include <asm/registers.h>
30#include <asm/ptrace.h>
31#include <asm/current.h>
32#include <asm/cache.h>
33
34/* Forward declaration, a strange C thing */
35struct task_struct;
36
37/*
38 * CPU type and hardware bug flags. Kept separately for each CPU.
39 */
40struct cpuinfo_frv {
41#ifdef CONFIG_MMU
42 unsigned long *pgd_quick;
43 unsigned long *pte_quick;
44 unsigned long pgtable_cache_sz;
45#endif
46} __cacheline_aligned;
47
48extern struct cpuinfo_frv __nongprelbss boot_cpu_data;
49
50#define cpu_data (&boot_cpu_data)
51#define current_cpu_data boot_cpu_data
52
53/*
54 * Bus types
55 */
56#define EISA_bus 0
57#define MCA_bus 0
58
59struct thread_struct {
60 struct pt_regs *frame; /* [GR28] exception frame ptr for this thread */
61 struct task_struct *curr; /* [GR29] current pointer for this thread */
62 unsigned long sp; /* [GR1 ] kernel stack pointer */
63 unsigned long fp; /* [GR2 ] kernel frame pointer */
64 unsigned long lr; /* link register */
65 unsigned long pc; /* program counter */
66 unsigned long gr[12]; /* [GR16-GR27] */
67 unsigned long sched_lr; /* LR from schedule() */
68
69 union {
70 struct pt_regs *frame0; /* top (user) stack frame */
71 struct user_context *user; /* userspace context */
72 };
73} __attribute__((aligned(8)));
74
75extern struct pt_regs *__kernel_frame0_ptr;
76extern struct task_struct *__kernel_current_task;
77
78#endif
79
80#ifndef __ASSEMBLY__
81#define INIT_THREAD_FRAME0 \
82 ((struct pt_regs *) \
83 (sizeof(init_stack) + (unsigned long) init_stack - sizeof(struct user_context)))
84
85#define INIT_THREAD { \
86 NULL, \
87 (struct task_struct *) init_stack, \
88 0, 0, 0, 0, \
89 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, \
90 0, \
91 { INIT_THREAD_FRAME0 }, \
92}
93
94/*
95 * do necessary setup to start up a newly executed thread.
96 * - need to discard the frame stacked by init() invoking the execve syscall
97 */
98#define start_thread(_regs, _pc, _usp) \
99do { \
100 set_fs(USER_DS); /* reads from user space */ \
101 __frame = __kernel_frame0_ptr; \
102 __frame->pc = (_pc); \
103 __frame->psr &= ~PSR_S; \
104 __frame->sp = (_usp); \
105} while(0)
106
107extern void prepare_to_copy(struct task_struct *tsk);
108
109/* Free all resources held by a thread. */
110static inline void release_thread(struct task_struct *dead_task)
111{
112}
113
114extern asmlinkage int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
115extern asmlinkage void save_user_regs(struct user_context *target);
116extern asmlinkage void *restore_user_regs(const struct user_context *target, ...);
117
118#define copy_segments(tsk, mm) do { } while (0)
119#define release_segments(mm) do { } while (0)
120#define forget_segments() do { } while (0)
121
122/*
123 * Free current thread data structures etc..
124 */
125static inline void exit_thread(void)
126{
127}
128
129/*
130 * Return saved PC of a blocked thread.
131 */
132extern unsigned long thread_saved_pc(struct task_struct *tsk);
133
134unsigned long get_wchan(struct task_struct *p);
135
136#define KSTK_EIP(tsk) ((tsk)->thread.frame0->pc)
137#define KSTK_ESP(tsk) ((tsk)->thread.frame0->sp)
138
139/* Allocation and freeing of basic task resources. */
140extern struct task_struct *alloc_task_struct(void);
141extern void free_task_struct(struct task_struct *p);
142
143#define cpu_relax() barrier()
144
145/* data cache prefetch */
146#define ARCH_HAS_PREFETCH
147static inline void prefetch(const void *x)
148{
149 asm volatile("dcpl %0,gr0,#0" : : "r"(x));
150}
151
152#endif /* __ASSEMBLY__ */
153#endif /* _ASM_PROCESSOR_H */
diff --git a/include/asm-frv/ptrace.h b/include/asm-frv/ptrace.h
deleted file mode 100644
index cf6934012b64..000000000000
--- a/include/asm-frv/ptrace.h
+++ /dev/null
@@ -1,83 +0,0 @@
1/* ptrace.h: ptrace() relevant definitions
2 *
3 * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11#ifndef _ASM_PTRACE_H
12#define _ASM_PTRACE_H
13
14#include <asm/registers.h>
15#ifdef __KERNEL__
16#include <asm/irq_regs.h>
17
18#define in_syscall(regs) (((regs)->tbr & TBR_TT) == TBR_TT_TRAP0)
19#endif
20
21
22#define PT_PSR 0
23#define PT_ISR 1
24#define PT_CCR 2
25#define PT_CCCR 3
26#define PT_LR 4
27#define PT_LCR 5
28#define PT_PC 6
29
30#define PT__STATUS 7 /* exception status */
31#define PT_SYSCALLNO 8 /* syscall number or -1 */
32#define PT_ORIG_GR8 9 /* saved GR8 for signal handling */
33#define PT_GNER0 10
34#define PT_GNER1 11
35#define PT_IACC0H 12
36#define PT_IACC0L 13
37
38#define PT_GR(j) ( 14 + (j)) /* GRj for 0<=j<=63 */
39#define PT_FR(j) ( 78 + (j)) /* FRj for 0<=j<=63 */
40#define PT_FNER(j) (142 + (j)) /* FNERj for 0<=j<=1 */
41#define PT_MSR(j) (144 + (j)) /* MSRj for 0<=j<=2 */
42#define PT_ACC(j) (146 + (j)) /* ACCj for 0<=j<=7 */
43#define PT_ACCG(jklm) (154 + (jklm)) /* ACCGjklm for 0<=jklm<=1 (reads four regs per slot) */
44#define PT_FSR(j) (156 + (j)) /* FSRj for 0<=j<=0 */
45#define PT__GPEND 78
46#define PT__END 157
47
48#define PT_TBR PT_GR(0)
49#define PT_SP PT_GR(1)
50#define PT_FP PT_GR(2)
51#define PT_PREV_FRAME PT_GR(28) /* previous exception frame pointer (old gr28 value) */
52#define PT_CURR_TASK PT_GR(29) /* current task */
53
54
55/* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */
56#define PTRACE_GETREGS 12
57#define PTRACE_SETREGS 13
58#define PTRACE_GETFPREGS 14
59#define PTRACE_SETFPREGS 15
60#define PTRACE_GETFDPIC 31 /* get the ELF fdpic loadmap address */
61
62#define PTRACE_GETFDPIC_EXEC 0 /* [addr] request the executable loadmap */
63#define PTRACE_GETFDPIC_INTERP 1 /* [addr] request the interpreter loadmap */
64
65#ifdef __KERNEL__
66#ifndef __ASSEMBLY__
67
68/*
69 * we dedicate GR28 to keeping a pointer to the current exception frame
70 * - gr28 is destroyed on entry to the kernel from userspace
71 */
72register struct pt_regs *__frame asm("gr28");
73
74#define user_mode(regs) (!((regs)->psr & PSR_S))
75#define instruction_pointer(regs) ((regs)->pc)
76
77extern unsigned long user_stack(const struct pt_regs *);
78extern void show_regs(struct pt_regs *);
79#define profile_pc(regs) ((regs)->pc)
80#endif
81
82#endif /* !__ASSEMBLY__ */
83#endif /* _ASM_PTRACE_H */
diff --git a/include/asm-frv/registers.h b/include/asm-frv/registers.h
deleted file mode 100644
index 9666119fcf6e..000000000000
--- a/include/asm-frv/registers.h
+++ /dev/null
@@ -1,232 +0,0 @@
1/* registers.h: register frame declarations
2 *
3 * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12/*
13 * notes:
14 *
15 * (1) that the members of all these structures are carefully aligned to permit
16 * usage of STD/STDF instructions
17 *
18 * (2) if you change these structures, you must change the code in
19 * arch/frvnommu/kernel/{break.S,entry.S,switch_to.S,gdb-stub.c}
20 *
21 *
22 * the kernel stack space block looks like this:
23 *
24 * +0x2000 +----------------------
25 * | union {
26 * | struct frv_frame0 {
27 * | struct user_context {
28 * | struct user_int_regs
29 * | struct user_fpmedia_regs
30 * | }
31 * | struct frv_debug_regs
32 * | }
33 * | struct pt_regs [user exception]
34 * | }
35 * +---------------------- <-- __kernel_frame0_ptr (maybe GR28)
36 * |
37 * | kernel stack
38 * |
39 * |......................
40 * | struct pt_regs [kernel exception]
41 * |...................... <-- __kernel_frame0_ptr (maybe GR28)
42 * |
43 * | kernel stack
44 * |
45 * |...................... <-- stack pointer (GR1)
46 * |
47 * | unused stack space
48 * |
49 * +----------------------
50 * | struct thread_info
51 * +0x0000 +---------------------- <-- __current_thread_info (GR15);
52 *
53 * note that GR28 points to the current exception frame
54 */
55
56#ifndef _ASM_REGISTERS_H
57#define _ASM_REGISTERS_H
58
59#ifndef __ASSEMBLY__
60#define __OFFSET(X,N) ((X)+(N)*4)
61#define __OFFSETC(X,N) xxxxxxxxxxxxxxxxxxxxxxxx
62#else
63#define __OFFSET(X,N) ((X)+(N)*4)
64#define __OFFSETC(X,N) ((X)+(N))
65#endif
66
67/*****************************************************************************/
68/*
69 * Exception/Interrupt frame
70 * - held on kernel stack
71 * - 8-byte aligned on stack (old SP is saved in frame)
72 * - GR0 is fixed 0, so we don't save it
73 */
74#ifndef __ASSEMBLY__
75
76struct pt_regs {
77 unsigned long psr; /* Processor Status Register */
78 unsigned long isr; /* Integer Status Register */
79 unsigned long ccr; /* Condition Code Register */
80 unsigned long cccr; /* Condition Code for Conditional Insns Register */
81 unsigned long lr; /* Link Register */
82 unsigned long lcr; /* Loop Count Register */
83 unsigned long pc; /* Program Counter Register */
84 unsigned long __status; /* exception status */
85 unsigned long syscallno; /* syscall number or -1 */
86 unsigned long orig_gr8; /* original syscall arg #1 */
87 unsigned long gner0;
88 unsigned long gner1;
89 unsigned long long iacc0;
90 unsigned long tbr; /* GR0 is fixed zero, so we use this for TBR */
91 unsigned long sp; /* GR1: USP/KSP */
92 unsigned long fp; /* GR2: FP */
93 unsigned long gr3;
94 unsigned long gr4;
95 unsigned long gr5;
96 unsigned long gr6;
97 unsigned long gr7; /* syscall number */
98 unsigned long gr8; /* 1st syscall param; syscall return */
99 unsigned long gr9; /* 2nd syscall param */
100 unsigned long gr10; /* 3rd syscall param */
101 unsigned long gr11; /* 4th syscall param */
102 unsigned long gr12; /* 5th syscall param */
103 unsigned long gr13; /* 6th syscall param */
104 unsigned long gr14;
105 unsigned long gr15;
106 unsigned long gr16; /* GP pointer */
107 unsigned long gr17; /* small data */
108 unsigned long gr18; /* PIC/PID */
109 unsigned long gr19;
110 unsigned long gr20;
111 unsigned long gr21;
112 unsigned long gr22;
113 unsigned long gr23;
114 unsigned long gr24;
115 unsigned long gr25;
116 unsigned long gr26;
117 unsigned long gr27;
118 struct pt_regs *next_frame; /* GR28 - next exception frame */
119 unsigned long gr29; /* GR29 - OS reserved */
120 unsigned long gr30; /* GR30 - OS reserved */
121 unsigned long gr31; /* GR31 - OS reserved */
122} __attribute__((aligned(8)));
123
124#endif
125
126#define REG__STATUS_STEP 0x00000001 /* - reenable single stepping on return */
127#define REG__STATUS_STEPPED 0x00000002 /* - single step caused exception */
128#define REG__STATUS_BROKE 0x00000004 /* - BREAK insn caused exception */
129#define REG__STATUS_SYSC_ENTRY 0x40000000 /* - T on syscall entry (ptrace.c only) */
130#define REG__STATUS_SYSC_EXIT 0x80000000 /* - T on syscall exit (ptrace.c only) */
131
132#define REG_GR(R) __OFFSET(REG_GR0, (R))
133
134#define REG_SP REG_GR(1)
135#define REG_FP REG_GR(2)
136#define REG_PREV_FRAME REG_GR(28) /* previous exception frame pointer (old gr28 value) */
137#define REG_CURR_TASK REG_GR(29) /* current task */
138
139/*****************************************************************************/
140/*
141 * debugging registers
142 */
143#ifndef __ASSEMBLY__
144
145struct frv_debug_regs
146{
147 unsigned long dcr;
148 unsigned long ibar[4] __attribute__((aligned(8)));
149 unsigned long dbar[4] __attribute__((aligned(8)));
150 unsigned long dbdr[4][4] __attribute__((aligned(8)));
151 unsigned long dbmr[4][4] __attribute__((aligned(8)));
152} __attribute__((aligned(8)));
153
154#endif
155
156/*****************************************************************************/
157/*
158 * userspace registers
159 */
160#ifndef __ASSEMBLY__
161
162struct user_int_regs
163{
164 /* integer registers
165 * - up to gr[31] mirror pt_regs
166 * - total size must be multiple of 8 bytes
167 */
168 unsigned long psr; /* Processor Status Register */
169 unsigned long isr; /* Integer Status Register */
170 unsigned long ccr; /* Condition Code Register */
171 unsigned long cccr; /* Condition Code for Conditional Insns Register */
172 unsigned long lr; /* Link Register */
173 unsigned long lcr; /* Loop Count Register */
174 unsigned long pc; /* Program Counter Register */
175 unsigned long __status; /* exception status */
176 unsigned long syscallno; /* syscall number or -1 */
177 unsigned long orig_gr8; /* original syscall arg #1 */
178 unsigned long gner[2];
179 unsigned long long iacc[1];
180
181 union {
182 unsigned long tbr;
183 unsigned long gr[64];
184 };
185};
186
187struct user_fpmedia_regs
188{
189 /* FP/Media registers */
190 unsigned long fr[64];
191 unsigned long fner[2];
192 unsigned long msr[2];
193 unsigned long acc[8];
194 unsigned char accg[8];
195 unsigned long fsr[1];
196};
197
198struct user_context
199{
200 struct user_int_regs i;
201 struct user_fpmedia_regs f;
202
203 /* we provide a context extension so that we can save the regs for CPUs that
204 * implement many more of Fujitsu's lavish register spec
205 */
206 void *extension;
207} __attribute__((aligned(8)));
208
209struct frv_frame0 {
210 union {
211 struct pt_regs regs;
212 struct user_context uc;
213 };
214
215 struct frv_debug_regs debug;
216
217} __attribute__((aligned(32)));
218
219#endif
220
221#define __INT_GR(R) __OFFSET(__INT_GR0, (R))
222
223#define __FPMEDIA_FR(R) __OFFSET(__FPMEDIA_FR0, (R))
224#define __FPMEDIA_FNER(R) __OFFSET(__FPMEDIA_FNER0, (R))
225#define __FPMEDIA_MSR(R) __OFFSET(__FPMEDIA_MSR0, (R))
226#define __FPMEDIA_ACC(R) __OFFSET(__FPMEDIA_ACC0, (R))
227#define __FPMEDIA_ACCG(R) __OFFSETC(__FPMEDIA_ACCG0, (R))
228#define __FPMEDIA_FSR(R) __OFFSET(__FPMEDIA_FSR0, (R))
229
230#define __THREAD_GR(R) __OFFSET(__THREAD_GR16, (R) - 16)
231
232#endif /* _ASM_REGISTERS_H */
diff --git a/include/asm-frv/resource.h b/include/asm-frv/resource.h
deleted file mode 100644
index 5fc60548fd02..000000000000
--- a/include/asm-frv/resource.h
+++ /dev/null
@@ -1,7 +0,0 @@
1#ifndef _ASM_RESOURCE_H
2#define _ASM_RESOURCE_H
3
4#include <asm-generic/resource.h>
5
6#endif /* _ASM_RESOURCE_H */
7
diff --git a/include/asm-frv/scatterlist.h b/include/asm-frv/scatterlist.h
deleted file mode 100644
index 4bca8a28546c..000000000000
--- a/include/asm-frv/scatterlist.h
+++ /dev/null
@@ -1,46 +0,0 @@
1#ifndef _ASM_SCATTERLIST_H
2#define _ASM_SCATTERLIST_H
3
4#include <asm/types.h>
5
6/*
7 * Drivers must set either ->address or (preferred) page and ->offset
8 * to indicate where data must be transferred to/from.
9 *
10 * Using page is recommended since it handles highmem data as well as
11 * low mem. ->address is restricted to data which has a virtual mapping, and
12 * it will go away in the future. Updating to page can be automated very
13 * easily -- something like
14 *
15 * sg->address = some_ptr;
16 *
17 * can be rewritten as
18 *
19 * sg_set_buf(sg, some_ptr, length);
20 *
21 * and that's it. There's no excuse for not highmem enabling YOUR driver. /jens
22 */
23struct scatterlist {
24#ifdef CONFIG_DEBUG_SG
25 unsigned long sg_magic;
26#endif
27 unsigned long page_link;
28 unsigned int offset; /* for highmem, page offset */
29
30 dma_addr_t dma_address;
31 unsigned int length;
32};
33
34/*
35 * These macros should be used after a pci_map_sg call has been done
36 * to get bus addresses of each of the SG entries and their lengths.
37 * You should only work with the number of sg entries pci_map_sg
38 * returns, or alternatively stop on the first sg_dma_len(sg) which
39 * is 0.
40 */
41#define sg_dma_address(sg) ((sg)->dma_address)
42#define sg_dma_len(sg) ((sg)->length)
43
44#define ISA_DMA_THRESHOLD (0xffffffffUL)
45
46#endif /* !_ASM_SCATTERLIST_H */
diff --git a/include/asm-frv/sections.h b/include/asm-frv/sections.h
deleted file mode 100644
index 17d0fb171bba..000000000000
--- a/include/asm-frv/sections.h
+++ /dev/null
@@ -1,46 +0,0 @@
1/* sections.h: linkage layout variables
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_SECTIONS_H
13#define _ASM_SECTIONS_H
14
15#ifndef __ASSEMBLY__
16
17#include <linux/types.h>
18#include <asm-generic/sections.h>
19
20#ifdef __KERNEL__
21
22/*
23 * we don't want to put variables in the GP-REL section if they're not used very much - that would
24 * be waste since GP-REL addressing is limited to GP16+/-2048
25 */
26#define __nongpreldata __attribute__((section(".data")))
27#define __nongprelbss __attribute__((section(".bss")))
28
29/*
30 * linker symbols
31 */
32extern const void __kernel_image_start, __kernel_image_end, __page_offset;
33
34extern unsigned long __nongprelbss memory_start;
35extern unsigned long __nongprelbss memory_end;
36extern unsigned long __nongprelbss rom_length;
37
38/* determine if we're running from ROM */
39static inline int is_in_rom(unsigned long addr)
40{
41 return 0; /* default case: not in ROM */
42}
43
44#endif
45#endif
46#endif /* _ASM_SECTIONS_H */
diff --git a/include/asm-frv/segment.h b/include/asm-frv/segment.h
deleted file mode 100644
index e3616a6f941d..000000000000
--- a/include/asm-frv/segment.h
+++ /dev/null
@@ -1,45 +0,0 @@
1/* segment.h: MMU segment settings
2 *
3 * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_SEGMENT_H
13#define _ASM_SEGMENT_H
14
15
16#ifndef __ASSEMBLY__
17
18typedef struct {
19 unsigned long seg;
20} mm_segment_t;
21
22#define MAKE_MM_SEG(s) ((mm_segment_t) { (s) })
23
24#define KERNEL_DS MAKE_MM_SEG(0xdfffffffUL)
25
26#ifdef CONFIG_MMU
27#define USER_DS MAKE_MM_SEG(TASK_SIZE - 1)
28#else
29#define USER_DS KERNEL_DS
30#endif
31
32#define get_ds() (KERNEL_DS)
33#define get_fs() (__current_thread_info->addr_limit)
34#define segment_eq(a,b) ((a).seg == (b).seg)
35#define __kernel_ds_p() segment_eq(get_fs(), KERNEL_DS)
36#define get_addr_limit() (get_fs().seg)
37
38#define set_fs(_x) \
39do { \
40 __current_thread_info->addr_limit = (_x); \
41} while(0)
42
43
44#endif /* __ASSEMBLY__ */
45#endif /* _ASM_SEGMENT_H */
diff --git a/include/asm-frv/sembuf.h b/include/asm-frv/sembuf.h
deleted file mode 100644
index 164b12786d6d..000000000000
--- a/include/asm-frv/sembuf.h
+++ /dev/null
@@ -1,26 +0,0 @@
1#ifndef _ASM_SEMBUF_H
2#define _ASM_SEMBUF_H
3
4/*
5 * The semid64_ds structure for FR-V architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct semid64_ds {
15 struct ipc64_perm sem_perm; /* permissions .. see ipc.h */
16 __kernel_time_t sem_otime; /* last semop time */
17 unsigned long __unused1;
18 __kernel_time_t sem_ctime; /* last change time */
19 unsigned long __unused2;
20 unsigned long sem_nsems; /* no. of semaphores in array */
21 unsigned long __unused3;
22 unsigned long __unused4;
23};
24
25#endif /* _ASM_SEMBUF_H */
26
diff --git a/include/asm-frv/serial-regs.h b/include/asm-frv/serial-regs.h
deleted file mode 100644
index e1286bda00eb..000000000000
--- a/include/asm-frv/serial-regs.h
+++ /dev/null
@@ -1,44 +0,0 @@
1/* serial-regs.h: serial port registers
2 *
3 * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_SERIAL_REGS_H
13#define _ASM_SERIAL_REGS_H
14
15#include <linux/serial_reg.h>
16#include <asm/irc-regs.h>
17
18#define SERIAL_ICLK 33333333 /* the target serial input clock */
19#define UART0_BASE 0xfeff9c00
20#define UART1_BASE 0xfeff9c40
21
22#define __get_UART0(R) ({ __reg(UART0_BASE + (R) * 8) >> 24; })
23#define __get_UART1(R) ({ __reg(UART1_BASE + (R) * 8) >> 24; })
24#define __set_UART0(R,V) do { __reg(UART0_BASE + (R) * 8) = (V) << 24; } while(0)
25#define __set_UART1(R,V) do { __reg(UART1_BASE + (R) * 8) = (V) << 24; } while(0)
26
27#define __get_UART0_LSR() ({ __get_UART0(UART_LSR); })
28#define __get_UART1_LSR() ({ __get_UART1(UART_LSR); })
29
30#define __set_UART0_IER(V) __set_UART0(UART_IER,(V))
31#define __set_UART1_IER(V) __set_UART1(UART_IER,(V))
32
33/* serial prescaler select register */
34#define __get_UCPSR() ({ *(volatile unsigned long *)(0xfeff9c90); })
35#define __set_UCPSR(V) do { *(volatile unsigned long *)(0xfeff9c90) = (V); } while(0)
36#define UCPSR_SELECT0 0x07000000
37#define UCPSR_SELECT1 0x38000000
38
39/* serial prescaler base value register */
40#define __get_UCPVR() ({ *(volatile unsigned long *)(0xfeff9c98); mb(); })
41#define __set_UCPVR(V) do { *(volatile unsigned long *)(0xfeff9c98) = (V) << 24; mb(); } while(0)
42
43
44#endif /* _ASM_SERIAL_REGS_H */
diff --git a/include/asm-frv/serial.h b/include/asm-frv/serial.h
deleted file mode 100644
index dbb825998689..000000000000
--- a/include/asm-frv/serial.h
+++ /dev/null
@@ -1,18 +0,0 @@
1/*
2 * serial.h
3 *
4 * Copyright (C) 2003 Develer S.r.l. (http://www.develer.com/)
5 * Author: Bernardo Innocenti <bernie@codewiz.org>
6 *
7 * Based on linux/include/asm-i386/serial.h
8 */
9#include <asm/serial-regs.h>
10
11/*
12 * the base baud is derived from the clock speed and so is variable
13 */
14#define BASE_BAUD 0
15
16#define STD_COM_FLAGS ASYNC_BOOT_AUTOCONF
17
18#define SERIAL_PORT_DFNS
diff --git a/include/asm-frv/setup.h b/include/asm-frv/setup.h
deleted file mode 100644
index afd787ceede6..000000000000
--- a/include/asm-frv/setup.h
+++ /dev/null
@@ -1,31 +0,0 @@
1/* setup.h: setup stuff
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_SETUP_H
13#define _ASM_SETUP_H
14
15#define COMMAND_LINE_SIZE 512
16
17#ifdef __KERNEL__
18
19#include <linux/init.h>
20
21#ifndef __ASSEMBLY__
22
23#ifdef CONFIG_MMU
24extern unsigned long __initdata num_mappedpages;
25#endif
26
27#endif /* !__ASSEMBLY__ */
28
29#endif /* __KERNEL__ */
30
31#endif /* _ASM_SETUP_H */
diff --git a/include/asm-frv/shmbuf.h b/include/asm-frv/shmbuf.h
deleted file mode 100644
index 4c6e711a4779..000000000000
--- a/include/asm-frv/shmbuf.h
+++ /dev/null
@@ -1,43 +0,0 @@
1#ifndef _ASM_SHMBUF_H
2#define _ASM_SHMBUF_H
3
4/*
5 * The shmid64_ds structure for FR-V architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct shmid64_ds {
15 struct ipc64_perm shm_perm; /* operation perms */
16 size_t shm_segsz; /* size of segment (bytes) */
17 __kernel_time_t shm_atime; /* last attach time */
18 unsigned long __unused1;
19 __kernel_time_t shm_dtime; /* last detach time */
20 unsigned long __unused2;
21 __kernel_time_t shm_ctime; /* last change time */
22 unsigned long __unused3;
23 __kernel_pid_t shm_cpid; /* pid of creator */
24 __kernel_pid_t shm_lpid; /* pid of last operator */
25 unsigned long shm_nattch; /* no. of current attaches */
26 unsigned long __unused4;
27 unsigned long __unused5;
28};
29
30struct shminfo64 {
31 unsigned long shmmax;
32 unsigned long shmmin;
33 unsigned long shmmni;
34 unsigned long shmseg;
35 unsigned long shmall;
36 unsigned long __unused1;
37 unsigned long __unused2;
38 unsigned long __unused3;
39 unsigned long __unused4;
40};
41
42#endif /* _ASM_SHMBUF_H */
43
diff --git a/include/asm-frv/shmparam.h b/include/asm-frv/shmparam.h
deleted file mode 100644
index ab711009cfaa..000000000000
--- a/include/asm-frv/shmparam.h
+++ /dev/null
@@ -1,7 +0,0 @@
1#ifndef _ASM_SHMPARAM_H
2#define _ASM_SHMPARAM_H
3
4#define SHMLBA PAGE_SIZE /* attach addr a multiple of this */
5
6#endif /* _ASM_SHMPARAM_H */
7
diff --git a/include/asm-frv/sigcontext.h b/include/asm-frv/sigcontext.h
deleted file mode 100644
index 3b263f3cc96f..000000000000
--- a/include/asm-frv/sigcontext.h
+++ /dev/null
@@ -1,26 +0,0 @@
1/* sigcontext.h: FRV signal context
2 *
3 * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11#ifndef _ASM_SIGCONTEXT_H
12#define _ASM_SIGCONTEXT_H
13
14#include <asm/registers.h>
15
16/*
17 * Signal context structure - contains all info to do with the state
18 * before the signal handler was invoked. Note: only add new entries
19 * to the end of the structure.
20 */
21struct sigcontext {
22 struct user_context sc_context;
23 unsigned long sc_oldmask; /* old sigmask */
24} __attribute__((aligned(8)));
25
26#endif
diff --git a/include/asm-frv/siginfo.h b/include/asm-frv/siginfo.h
deleted file mode 100644
index d3fd1ca45653..000000000000
--- a/include/asm-frv/siginfo.h
+++ /dev/null
@@ -1,12 +0,0 @@
1#ifndef _ASM_SIGINFO_H
2#define _ASM_SIGINFO_H
3
4#include <linux/types.h>
5#include <asm-generic/siginfo.h>
6
7#define FPE_MDAOVF (__SI_FAULT|9) /* media overflow */
8#undef NSIGFPE
9#define NSIGFPE 9
10
11#endif
12
diff --git a/include/asm-frv/signal.h b/include/asm-frv/signal.h
deleted file mode 100644
index 2079197d483d..000000000000
--- a/include/asm-frv/signal.h
+++ /dev/null
@@ -1,161 +0,0 @@
1#ifndef _ASM_SIGNAL_H
2#define _ASM_SIGNAL_H
3
4#include <linux/types.h>
5
6/* Avoid too many header ordering problems. */
7struct siginfo;
8
9#ifdef __KERNEL__
10/* Most things should be clean enough to redefine this at will, if care
11 is taken to make libc match. */
12
13#define _NSIG 64
14#define _NSIG_BPW 32
15#define _NSIG_WORDS (_NSIG / _NSIG_BPW)
16
17typedef unsigned long old_sigset_t; /* at least 32 bits */
18
19typedef struct {
20 unsigned long sig[_NSIG_WORDS];
21} sigset_t;
22
23#else
24/* Here we must cater to libcs that poke about in kernel headers. */
25
26#define NSIG 32
27typedef unsigned long sigset_t;
28
29#endif /* __KERNEL__ */
30
31#define SIGHUP 1
32#define SIGINT 2
33#define SIGQUIT 3
34#define SIGILL 4
35#define SIGTRAP 5
36#define SIGABRT 6
37#define SIGIOT 6
38#define SIGBUS 7
39#define SIGFPE 8
40#define SIGKILL 9
41#define SIGUSR1 10
42#define SIGSEGV 11
43#define SIGUSR2 12
44#define SIGPIPE 13
45#define SIGALRM 14
46#define SIGTERM 15
47#define SIGSTKFLT 16
48#define SIGCHLD 17
49#define SIGCONT 18
50#define SIGSTOP 19
51#define SIGTSTP 20
52#define SIGTTIN 21
53#define SIGTTOU 22
54#define SIGURG 23
55#define SIGXCPU 24
56#define SIGXFSZ 25
57#define SIGVTALRM 26
58#define SIGPROF 27
59#define SIGWINCH 28
60#define SIGIO 29
61#define SIGPOLL SIGIO
62/*
63#define SIGLOST 29
64*/
65#define SIGPWR 30
66#define SIGSYS 31
67#define SIGUNUSED 31
68
69/* These should not be considered constants from userland. */
70#define SIGRTMIN 32
71#define SIGRTMAX (_NSIG-1)
72
73/*
74 * SA_FLAGS values:
75 *
76 * SA_ONSTACK indicates that a registered stack_t will be used.
77 * SA_RESTART flag to get restarting signals (which were the default long ago)
78 * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
79 * SA_RESETHAND clears the handler when the signal is delivered.
80 * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
81 * SA_NODEFER prevents the current signal from being masked in the handler.
82 *
83 * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
84 * Unix names RESETHAND and NODEFER respectively.
85 */
86#define SA_NOCLDSTOP 0x00000001
87#define SA_NOCLDWAIT 0x00000002 /* not supported yet */
88#define SA_SIGINFO 0x00000004
89#define SA_ONSTACK 0x08000000
90#define SA_RESTART 0x10000000
91#define SA_NODEFER 0x40000000
92#define SA_RESETHAND 0x80000000
93
94#define SA_NOMASK SA_NODEFER
95#define SA_ONESHOT SA_RESETHAND
96
97#define SA_RESTORER 0x04000000
98
99/*
100 * sigaltstack controls
101 */
102#define SS_ONSTACK 1
103#define SS_DISABLE 2
104
105#define MINSIGSTKSZ 2048
106#define SIGSTKSZ 8192
107
108#include <asm-generic/signal.h>
109
110#ifdef __KERNEL__
111struct old_sigaction {
112 __sighandler_t sa_handler;
113 old_sigset_t sa_mask;
114 unsigned long sa_flags;
115 __sigrestore_t sa_restorer;
116};
117
118struct sigaction {
119 __sighandler_t sa_handler;
120 unsigned long sa_flags;
121 __sigrestore_t sa_restorer;
122 sigset_t sa_mask; /* mask last for extensibility */
123};
124
125struct k_sigaction {
126 struct sigaction sa;
127};
128#else
129/* Here we must cater to libcs that poke about in kernel headers. */
130
131struct sigaction {
132 union {
133 __sighandler_t _sa_handler;
134 void (*_sa_sigaction)(int, struct siginfo *, void *);
135 } _u;
136 sigset_t sa_mask;
137 unsigned long sa_flags;
138 void (*sa_restorer)(void);
139};
140
141#define sa_handler _u._sa_handler
142#define sa_sigaction _u._sa_sigaction
143
144#endif /* __KERNEL__ */
145
146typedef struct sigaltstack {
147 void __user *ss_sp;
148 int ss_flags;
149 size_t ss_size;
150} stack_t;
151
152#define ptrace_signal_deliver(regs, cookie) do { } while (0)
153
154#ifdef __KERNEL__
155
156#include <asm/sigcontext.h>
157#undef __HAVE_ARCH_SIG_BITOPS
158
159#endif /* __KERNEL__ */
160
161#endif /* _ASM_SIGNAL_H */
diff --git a/include/asm-frv/smp.h b/include/asm-frv/smp.h
deleted file mode 100644
index 38349ec8b61b..000000000000
--- a/include/asm-frv/smp.h
+++ /dev/null
@@ -1,9 +0,0 @@
1#ifndef __ASM_SMP_H
2#define __ASM_SMP_H
3
4
5#ifdef CONFIG_SMP
6#error SMP not supported
7#endif
8
9#endif
diff --git a/include/asm-frv/socket.h b/include/asm-frv/socket.h
deleted file mode 100644
index 57c3d4054e8b..000000000000
--- a/include/asm-frv/socket.h
+++ /dev/null
@@ -1,61 +0,0 @@
1#ifndef _ASM_SOCKET_H
2#define _ASM_SOCKET_H
3
4#include <asm/sockios.h>
5
6/* For setsockopt(2) */
7#define SOL_SOCKET 1
8
9#define SO_DEBUG 1
10#define SO_REUSEADDR 2
11#define SO_TYPE 3
12#define SO_ERROR 4
13#define SO_DONTROUTE 5
14#define SO_BROADCAST 6
15#define SO_SNDBUF 7
16#define SO_RCVBUF 8
17#define SO_SNDBUFFORCE 32
18#define SO_RCVBUFFORCE 33
19#define SO_KEEPALIVE 9
20#define SO_OOBINLINE 10
21#define SO_NO_CHECK 11
22#define SO_PRIORITY 12
23#define SO_LINGER 13
24#define SO_BSDCOMPAT 14
25/* To add :#define SO_REUSEPORT 15 */
26#define SO_PASSCRED 16
27#define SO_PEERCRED 17
28#define SO_RCVLOWAT 18
29#define SO_SNDLOWAT 19
30#define SO_RCVTIMEO 20
31#define SO_SNDTIMEO 21
32
33/* Security levels - as per NRL IPv6 - don't actually do anything */
34#define SO_SECURITY_AUTHENTICATION 22
35#define SO_SECURITY_ENCRYPTION_TRANSPORT 23
36#define SO_SECURITY_ENCRYPTION_NETWORK 24
37
38#define SO_BINDTODEVICE 25
39
40/* Socket filtering */
41#define SO_ATTACH_FILTER 26
42#define SO_DETACH_FILTER 27
43
44#define SO_PEERNAME 28
45#define SO_TIMESTAMP 29
46#define SCM_TIMESTAMP SO_TIMESTAMP
47
48#define SO_ACCEPTCONN 30
49
50#define SO_PEERSEC 31
51#define SO_PASSSEC 34
52#define SO_TIMESTAMPNS 35
53#define SCM_TIMESTAMPNS SO_TIMESTAMPNS
54
55#define SO_MARK 36
56
57#define SO_TIMESTAMPING 37
58#define SCM_TIMESTAMPING SO_TIMESTAMPING
59
60#endif /* _ASM_SOCKET_H */
61
diff --git a/include/asm-frv/sockios.h b/include/asm-frv/sockios.h
deleted file mode 100644
index 5dbdd13e6de3..000000000000
--- a/include/asm-frv/sockios.h
+++ /dev/null
@@ -1,14 +0,0 @@
1#ifndef _ASM_SOCKIOS__
2#define _ASM_SOCKIOS__
3
4/* Socket-level I/O control calls. */
5#define FIOSETOWN 0x8901
6#define SIOCSPGRP 0x8902
7#define FIOGETOWN 0x8903
8#define SIOCGPGRP 0x8904
9#define SIOCATMARK 0x8905
10#define SIOCGSTAMP 0x8906 /* Get stamp (timeval) */
11#define SIOCGSTAMPNS 0x8907 /* Get stamp (timespec) */
12
13#endif /* _ASM_SOCKIOS__ */
14
diff --git a/include/asm-frv/spinlock.h b/include/asm-frv/spinlock.h
deleted file mode 100644
index fe385f45d1fd..000000000000
--- a/include/asm-frv/spinlock.h
+++ /dev/null
@@ -1,17 +0,0 @@
1/* spinlock.h: spinlocks for FR-V
2 *
3 * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_SPINLOCK_H
13#define _ASM_SPINLOCK_H
14
15#error no spinlocks for FR-V yet
16
17#endif /* _ASM_SPINLOCK_H */
diff --git a/include/asm-frv/spr-regs.h b/include/asm-frv/spr-regs.h
deleted file mode 100644
index 01e6af5e99b8..000000000000
--- a/include/asm-frv/spr-regs.h
+++ /dev/null
@@ -1,416 +0,0 @@
1/* spr-regs.h: special-purpose registers on the FRV
2 *
3 * Copyright (C) 2003, 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_SPR_REGS_H
13#define _ASM_SPR_REGS_H
14
15/*
16 * PSR - Processor Status Register
17 */
18#define PSR_ET 0x00000001 /* enable interrupts/exceptions flag */
19#define PSR_PS 0x00000002 /* previous supervisor mode flag */
20#define PSR_S 0x00000004 /* supervisor mode flag */
21#define PSR_PIL 0x00000078 /* processor external interrupt level */
22#define PSR_PIL_0 0x00000000 /* - no interrupt in progress */
23#define PSR_PIL_13 0x00000068 /* - debugging only */
24#define PSR_PIL_14 0x00000070 /* - debugging in progress */
25#define PSR_PIL_15 0x00000078 /* - NMI in progress */
26#define PSR_EM 0x00000080 /* enable media operation */
27#define PSR_EF 0x00000100 /* enable FPU operation */
28#define PSR_BE 0x00001000 /* endianness mode */
29#define PSR_BE_LE 0x00000000 /* - little endian mode */
30#define PSR_BE_BE 0x00001000 /* - big endian mode */
31#define PSR_CM 0x00002000 /* conditional mode */
32#define PSR_NEM 0x00004000 /* non-excepting mode */
33#define PSR_ICE 0x00010000 /* in-circuit emulation mode */
34#define PSR_VERSION_SHIFT 24 /* CPU silicon ID */
35#define PSR_IMPLE_SHIFT 28 /* CPU core ID */
36
37#define PSR_VERSION(psr) (((psr) >> PSR_VERSION_SHIFT) & 0xf)
38#define PSR_IMPLE(psr) (((psr) >> PSR_IMPLE_SHIFT) & 0xf)
39
40#define PSR_IMPLE_FR401 0x2
41#define PSR_VERSION_FR401_MB93401 0x0
42#define PSR_VERSION_FR401_MB93401A 0x1
43#define PSR_VERSION_FR401_MB93403 0x2
44
45#define PSR_IMPLE_FR405 0x4
46#define PSR_VERSION_FR405_MB93405 0x0
47
48#define PSR_IMPLE_FR451 0x5
49#define PSR_VERSION_FR451_MB93451 0x0
50
51#define PSR_IMPLE_FR501 0x1
52#define PSR_VERSION_FR501_MB93501 0x1
53#define PSR_VERSION_FR501_MB93501A 0x2
54
55#define PSR_IMPLE_FR551 0x3
56#define PSR_VERSION_FR551_MB93555 0x1
57
58#define __get_PSR() ({ unsigned long x; asm volatile("movsg psr,%0" : "=r"(x)); x; })
59#define __set_PSR(V) do { asm volatile("movgs %0,psr" : : "r"(V)); } while(0)
60
61/*
62 * TBR - Trap Base Register
63 */
64#define TBR_TT 0x00000ff0
65#define TBR_TT_INSTR_MMU_MISS (0x01 << 4)
66#define TBR_TT_INSTR_ACC_ERROR (0x02 << 4)
67#define TBR_TT_INSTR_ACC_EXCEP (0x03 << 4)
68#define TBR_TT_PRIV_INSTR (0x06 << 4)
69#define TBR_TT_ILLEGAL_INSTR (0x07 << 4)
70#define TBR_TT_FP_EXCEPTION (0x0d << 4)
71#define TBR_TT_MP_EXCEPTION (0x0e << 4)
72#define TBR_TT_DATA_ACC_ERROR (0x11 << 4)
73#define TBR_TT_DATA_MMU_MISS (0x12 << 4)
74#define TBR_TT_DATA_ACC_EXCEP (0x13 << 4)
75#define TBR_TT_DATA_STR_ERROR (0x14 << 4)
76#define TBR_TT_DIVISION_EXCEP (0x17 << 4)
77#define TBR_TT_COMMIT_EXCEP (0x19 << 4)
78#define TBR_TT_INSTR_TLB_MISS (0x1a << 4)
79#define TBR_TT_DATA_TLB_MISS (0x1b << 4)
80#define TBR_TT_DATA_DAT_EXCEP (0x1d << 4)
81#define TBR_TT_DECREMENT_TIMER (0x1f << 4)
82#define TBR_TT_COMPOUND_EXCEP (0x20 << 4)
83#define TBR_TT_INTERRUPT_1 (0x21 << 4)
84#define TBR_TT_INTERRUPT_2 (0x22 << 4)
85#define TBR_TT_INTERRUPT_3 (0x23 << 4)
86#define TBR_TT_INTERRUPT_4 (0x24 << 4)
87#define TBR_TT_INTERRUPT_5 (0x25 << 4)
88#define TBR_TT_INTERRUPT_6 (0x26 << 4)
89#define TBR_TT_INTERRUPT_7 (0x27 << 4)
90#define TBR_TT_INTERRUPT_8 (0x28 << 4)
91#define TBR_TT_INTERRUPT_9 (0x29 << 4)
92#define TBR_TT_INTERRUPT_10 (0x2a << 4)
93#define TBR_TT_INTERRUPT_11 (0x2b << 4)
94#define TBR_TT_INTERRUPT_12 (0x2c << 4)
95#define TBR_TT_INTERRUPT_13 (0x2d << 4)
96#define TBR_TT_INTERRUPT_14 (0x2e << 4)
97#define TBR_TT_INTERRUPT_15 (0x2f << 4)
98#define TBR_TT_TRAP0 (0x80 << 4)
99#define TBR_TT_TRAP1 (0x81 << 4)
100#define TBR_TT_TRAP2 (0x82 << 4)
101#define TBR_TT_TRAP3 (0x83 << 4)
102#define TBR_TT_TRAP120 (0xf8 << 4)
103#define TBR_TT_TRAP121 (0xf9 << 4)
104#define TBR_TT_TRAP122 (0xfa << 4)
105#define TBR_TT_TRAP123 (0xfb << 4)
106#define TBR_TT_TRAP124 (0xfc << 4)
107#define TBR_TT_TRAP125 (0xfd << 4)
108#define TBR_TT_TRAP126 (0xfe << 4)
109#define TBR_TT_BREAK (0xff << 4)
110
111#define TBR_TT_ATOMIC_CMPXCHG32 TBR_TT_TRAP120
112#define TBR_TT_ATOMIC_XCHG32 TBR_TT_TRAP121
113#define TBR_TT_ATOMIC_XOR TBR_TT_TRAP122
114#define TBR_TT_ATOMIC_OR TBR_TT_TRAP123
115#define TBR_TT_ATOMIC_AND TBR_TT_TRAP124
116#define TBR_TT_ATOMIC_SUB TBR_TT_TRAP125
117#define TBR_TT_ATOMIC_ADD TBR_TT_TRAP126
118
119#define __get_TBR() ({ unsigned long x; asm volatile("movsg tbr,%0" : "=r"(x)); x; })
120
121/*
122 * HSR0 - Hardware Status Register 0
123 */
124#define HSR0_PDM 0x00000007 /* power down mode */
125#define HSR0_PDM_NORMAL 0x00000000 /* - normal mode */
126#define HSR0_PDM_CORE_SLEEP 0x00000001 /* - CPU core sleep mode */
127#define HSR0_PDM_BUS_SLEEP 0x00000003 /* - bus sleep mode */
128#define HSR0_PDM_PLL_RUN 0x00000005 /* - PLL run */
129#define HSR0_PDM_PLL_STOP 0x00000007 /* - PLL stop */
130#define HSR0_GRLE 0x00000040 /* GR lower register set enable */
131#define HSR0_GRHE 0x00000080 /* GR higher register set enable */
132#define HSR0_FRLE 0x00000100 /* FR lower register set enable */
133#define HSR0_FRHE 0x00000200 /* FR higher register set enable */
134#define HSR0_GRN 0x00000400 /* GR quantity */
135#define HSR0_GRN_64 0x00000000 /* - 64 GR registers */
136#define HSR0_GRN_32 0x00000400 /* - 32 GR registers */
137#define HSR0_FRN 0x00000800 /* FR quantity */
138#define HSR0_FRN_64 0x00000000 /* - 64 FR registers */
139#define HSR0_FRN_32 0x00000800 /* - 32 FR registers */
140#define HSR0_SA 0x00001000 /* start address (RAMBOOT#) */
141#define HSR0_ETMI 0x00008000 /* enable TIMERI (64-bit up timer) */
142#define HSR0_ETMD 0x00004000 /* enable TIMERD (32-bit down timer) */
143#define HSR0_PEDAT 0x00010000 /* previous DAT mode */
144#define HSR0_XEDAT 0x00020000 /* exception DAT mode */
145#define HSR0_EDAT 0x00080000 /* enable DAT mode */
146#define HSR0_RME 0x00400000 /* enable RAM mode */
147#define HSR0_EMEM 0x00800000 /* enable MMU_Miss mask */
148#define HSR0_EXMMU 0x01000000 /* enable extended MMU mode */
149#define HSR0_EDMMU 0x02000000 /* enable data MMU */
150#define HSR0_EIMMU 0x04000000 /* enable instruction MMU */
151#define HSR0_CBM 0x08000000 /* copy back mode */
152#define HSR0_CBM_WRITE_THRU 0x00000000 /* - write through */
153#define HSR0_CBM_COPY_BACK 0x08000000 /* - copy back */
154#define HSR0_NWA 0x10000000 /* no write allocate */
155#define HSR0_DCE 0x40000000 /* data cache enable */
156#define HSR0_ICE 0x80000000 /* instruction cache enable */
157
158#define __get_HSR(R) ({ unsigned long x; asm volatile("movsg hsr"#R",%0" : "=r"(x)); x; })
159#define __set_HSR(R,V) do { asm volatile("movgs %0,hsr"#R : : "r"(V)); } while(0)
160
161/*
162 * CCR - Condition Codes Register
163 */
164#define CCR_FCC0 0x0000000f /* FP/Media condition 0 (fcc0 reg) */
165#define CCR_FCC1 0x000000f0 /* FP/Media condition 1 (fcc1 reg) */
166#define CCR_FCC2 0x00000f00 /* FP/Media condition 2 (fcc2 reg) */
167#define CCR_FCC3 0x0000f000 /* FP/Media condition 3 (fcc3 reg) */
168#define CCR_ICC0 0x000f0000 /* Integer condition 0 (icc0 reg) */
169#define CCR_ICC0_C 0x00010000 /* - Carry flag */
170#define CCR_ICC0_V 0x00020000 /* - Overflow flag */
171#define CCR_ICC0_Z 0x00040000 /* - Zero flag */
172#define CCR_ICC0_N 0x00080000 /* - Negative flag */
173#define CCR_ICC1 0x00f00000 /* Integer condition 1 (icc1 reg) */
174#define CCR_ICC2 0x0f000000 /* Integer condition 2 (icc2 reg) */
175#define CCR_ICC3 0xf0000000 /* Integer condition 3 (icc3 reg) */
176
177/*
178 * CCCR - Condition Codes for Conditional Instructions Register
179 */
180#define CCCR_CC0 0x00000003 /* condition 0 (cc0 reg) */
181#define CCCR_CC0_FALSE 0x00000002 /* - condition is false */
182#define CCCR_CC0_TRUE 0x00000003 /* - condition is true */
183#define CCCR_CC1 0x0000000c /* condition 1 (cc1 reg) */
184#define CCCR_CC2 0x00000030 /* condition 2 (cc2 reg) */
185#define CCCR_CC3 0x000000c0 /* condition 3 (cc3 reg) */
186#define CCCR_CC4 0x00000300 /* condition 4 (cc4 reg) */
187#define CCCR_CC5 0x00000c00 /* condition 5 (cc5 reg) */
188#define CCCR_CC6 0x00003000 /* condition 6 (cc6 reg) */
189#define CCCR_CC7 0x0000c000 /* condition 7 (cc7 reg) */
190
191/*
192 * ISR - Integer Status Register
193 */
194#define ISR_EMAM 0x00000001 /* memory misaligned access handling */
195#define ISR_EMAM_EXCEPTION 0x00000000 /* - generate exception */
196#define ISR_EMAM_FUDGE 0x00000001 /* - mask out invalid address bits */
197#define ISR_AEXC 0x00000004 /* accrued [overflow] exception */
198#define ISR_DTT 0x00000018 /* division type trap */
199#define ISR_DTT_IGNORE 0x00000000 /* - ignore division error */
200#define ISR_DTT_DIVBYZERO 0x00000008 /* - generate exception */
201#define ISR_DTT_OVERFLOW 0x00000010 /* - record overflow */
202#define ISR_EDE 0x00000020 /* enable division exception */
203#define ISR_PLI 0x20000000 /* pre-load instruction information */
204#define ISR_QI 0x80000000 /* quad data implementation information */
205
206/*
207 * EPCR0 - Exception PC Register
208 */
209#define EPCR0_V 0x00000001 /* register content validity indicator */
210#define EPCR0_PC 0xfffffffc /* faulting instruction address */
211
212/*
213 * ESR0/14/15 - Exception Status Register
214 */
215#define ESRx_VALID 0x00000001 /* register content validity indicator */
216#define ESRx_EC 0x0000003e /* exception type */
217#define ESRx_EC_DATA_STORE 0x00000000 /* - data_store_error */
218#define ESRx_EC_INSN_ACCESS 0x00000006 /* - instruction_access_error */
219#define ESRx_EC_PRIV_INSN 0x00000008 /* - privileged_instruction */
220#define ESRx_EC_ILL_INSN 0x0000000a /* - illegal_instruction */
221#define ESRx_EC_MP_EXCEP 0x0000001c /* - mp_exception */
222#define ESRx_EC_DATA_ACCESS 0x00000020 /* - data_access_error */
223#define ESRx_EC_DIVISION 0x00000026 /* - division_exception */
224#define ESRx_EC_ITLB_MISS 0x00000034 /* - instruction_access_TLB_miss */
225#define ESRx_EC_DTLB_MISS 0x00000036 /* - data_access_TLB_miss */
226#define ESRx_EC_DATA_ACCESS_DAT 0x0000003a /* - data_access_DAT_exception */
227
228#define ESR0_IAEC 0x00000100 /* info for instruction-access-exception */
229#define ESR0_IAEC_RESV 0x00000000 /* - reserved */
230#define ESR0_IAEC_PROT_VIOL 0x00000100 /* - protection violation */
231
232#define ESR0_ATXC 0x00f00000 /* address translation exception code */
233#define ESR0_ATXC_MMU_MISS 0x00000000 /* - MMU miss exception and more (?) */
234#define ESR0_ATXC_MULTI_DAT 0x00800000 /* - multiple DAT entry hit */
235#define ESR0_ATXC_MULTI_SAT 0x00900000 /* - multiple SAT entry hit */
236#define ESR0_ATXC_AMRTLB_MISS 0x00a00000 /* - MMU/TLB miss exception */
237#define ESR0_ATXC_PRIV_EXCEP 0x00c00000 /* - privilege protection fault */
238#define ESR0_ATXC_WP_EXCEP 0x00d00000 /* - write protection fault */
239
240#define ESR0_EAV 0x00000800 /* true if EAR0 register valid */
241#define ESR15_EAV 0x00000800 /* true if EAR15 register valid */
242
243/*
244 * ESFR1 - Exception Status Valid Flag Register
245 */
246#define ESFR1_ESR0 0x00000001 /* true if ESR0 is valid */
247#define ESFR1_ESR14 0x00004000 /* true if ESR14 is valid */
248#define ESFR1_ESR15 0x00008000 /* true if ESR15 is valid */
249
250/*
251 * MSR - Media Status Register
252 */
253#define MSR0_AOVF 0x00000001 /* overflow exception accrued */
254#define MSRx_OVF 0x00000002 /* overflow exception detected */
255#define MSRx_SIE 0x0000003c /* last SIMD instruction exception detected */
256#define MSRx_SIE_NONE 0x00000000 /* - none detected */
257#define MSRx_SIE_FRkHI_ACCk 0x00000020 /* - exception at FRkHI or ACCk */
258#define MSRx_SIE_FRkLO_ACCk1 0x00000010 /* - exception at FRkLO or ACCk+1 */
259#define MSRx_SIE_FRk1HI_ACCk2 0x00000008 /* - exception at FRk+1HI or ACCk+2 */
260#define MSRx_SIE_FRk1LO_ACCk3 0x00000004 /* - exception at FRk+1LO or ACCk+3 */
261#define MSR0_MTT 0x00007000 /* type of last media trap detected */
262#define MSR0_MTT_NONE 0x00000000 /* - none detected */
263#define MSR0_MTT_OVERFLOW 0x00001000 /* - overflow detected */
264#define MSR0_HI 0x00c00000 /* hardware implementation */
265#define MSR0_HI_ROUNDING 0x00000000 /* - rounding mode */
266#define MSR0_HI_NONROUNDING 0x00c00000 /* - non-rounding mode */
267#define MSR0_EMCI 0x01000000 /* enable media custom instructions */
268#define MSR0_SRDAV 0x10000000 /* select rounding mode of MAVEH */
269#define MSR0_SRDAV_RDAV 0x00000000 /* - controlled by MSR.RDAV */
270#define MSR0_SRDAV_RD 0x10000000 /* - controlled by MSR.RD */
271#define MSR0_RDAV 0x20000000 /* rounding mode of MAVEH */
272#define MSR0_RDAV_NEAREST_MI 0x00000000 /* - round to nearest minus */
273#define MSR0_RDAV_NEAREST_PL 0x20000000 /* - round to nearest plus */
274#define MSR0_RD 0xc0000000 /* rounding mode */
275#define MSR0_RD_NEAREST 0x00000000 /* - nearest */
276#define MSR0_RD_ZERO 0x40000000 /* - zero */
277#define MSR0_RD_POS_INF 0x80000000 /* - postive infinity */
278#define MSR0_RD_NEG_INF 0xc0000000 /* - negative infinity */
279
280/*
281 * IAMPR0-7 - Instruction Address Mapping Register
282 * DAMPR0-7 - Data Address Mapping Register
283 */
284#define xAMPRx_V 0x00000001 /* register content validity indicator */
285#define DAMPRx_WP 0x00000002 /* write protect */
286#define DAMPRx_WP_RW 0x00000000 /* - read/write */
287#define DAMPRx_WP_RO 0x00000002 /* - read-only */
288#define xAMPRx_C 0x00000004 /* cached/uncached */
289#define xAMPRx_C_CACHED 0x00000000 /* - cached */
290#define xAMPRx_C_UNCACHED 0x00000004 /* - uncached */
291#define xAMPRx_S 0x00000008 /* supervisor only */
292#define xAMPRx_S_USER 0x00000000 /* - userspace can access */
293#define xAMPRx_S_KERNEL 0x00000008 /* - kernel only */
294#define xAMPRx_SS 0x000000f0 /* segment size */
295#define xAMPRx_SS_16Kb 0x00000000 /* - 16 kilobytes */
296#define xAMPRx_SS_64Kb 0x00000010 /* - 64 kilobytes */
297#define xAMPRx_SS_256Kb 0x00000020 /* - 256 kilobytes */
298#define xAMPRx_SS_1Mb 0x00000030 /* - 1 megabyte */
299#define xAMPRx_SS_2Mb 0x00000040 /* - 2 megabytes */
300#define xAMPRx_SS_4Mb 0x00000050 /* - 4 megabytes */
301#define xAMPRx_SS_8Mb 0x00000060 /* - 8 megabytes */
302#define xAMPRx_SS_16Mb 0x00000070 /* - 16 megabytes */
303#define xAMPRx_SS_32Mb 0x00000080 /* - 32 megabytes */
304#define xAMPRx_SS_64Mb 0x00000090 /* - 64 megabytes */
305#define xAMPRx_SS_128Mb 0x000000a0 /* - 128 megabytes */
306#define xAMPRx_SS_256Mb 0x000000b0 /* - 256 megabytes */
307#define xAMPRx_SS_512Mb 0x000000c0 /* - 512 megabytes */
308#define xAMPRx_RESERVED8 0x00000100 /* reserved bit */
309#define xAMPRx_NG 0x00000200 /* non-global */
310#define xAMPRx_L 0x00000400 /* locked */
311#define xAMPRx_M 0x00000800 /* modified */
312#define xAMPRx_D 0x00001000 /* DAT entry */
313#define xAMPRx_RESERVED13 0x00002000 /* reserved bit */
314#define xAMPRx_PPFN 0xfff00000 /* physical page frame number */
315
316#define xAMPRx_V_BIT 0
317#define DAMPRx_WP_BIT 1
318#define xAMPRx_C_BIT 2
319#define xAMPRx_S_BIT 3
320#define xAMPRx_RESERVED8_BIT 8
321#define xAMPRx_NG_BIT 9
322#define xAMPRx_L_BIT 10
323#define xAMPRx_M_BIT 11
324#define xAMPRx_D_BIT 12
325#define xAMPRx_RESERVED13_BIT 13
326
327#define __get_IAMPR(R) ({ unsigned long x; asm volatile("movsg iampr"#R",%0" : "=r"(x)); x; })
328#define __get_DAMPR(R) ({ unsigned long x; asm volatile("movsg dampr"#R",%0" : "=r"(x)); x; })
329
330#define __get_IAMLR(R) ({ unsigned long x; asm volatile("movsg iamlr"#R",%0" : "=r"(x)); x; })
331#define __get_DAMLR(R) ({ unsigned long x; asm volatile("movsg damlr"#R",%0" : "=r"(x)); x; })
332
333#define __set_IAMPR(R,V) do { asm volatile("movgs %0,iampr"#R : : "r"(V)); } while(0)
334#define __set_DAMPR(R,V) do { asm volatile("movgs %0,dampr"#R : : "r"(V)); } while(0)
335
336#define __set_IAMLR(R,V) do { asm volatile("movgs %0,iamlr"#R : : "r"(V)); } while(0)
337#define __set_DAMLR(R,V) do { asm volatile("movgs %0,damlr"#R : : "r"(V)); } while(0)
338
339#define save_dampr(R, _dampr) \
340do { \
341 asm volatile("movsg dampr"R",%0" : "=r"(_dampr)); \
342} while(0)
343
344#define restore_dampr(R, _dampr) \
345do { \
346 asm volatile("movgs %0,dampr"R :: "r"(_dampr)); \
347} while(0)
348
349/*
350 * AMCR - Address Mapping Control Register
351 */
352#define AMCR_IAMRN 0x000000ff /* quantity of IAMPR registers */
353#define AMCR_DAMRN 0x0000ff00 /* quantity of DAMPR registers */
354
355/*
356 * TTBR - Address Translation Table Base Register
357 */
358#define __get_TTBR() ({ unsigned long x; asm volatile("movsg ttbr,%0" : "=r"(x)); x; })
359
360/*
361 * TPXR - TLB Probe Extend Register
362 */
363#define TPXR_E 0x00000001
364#define TPXR_LMAX_SHIFT 20
365#define TPXR_LMAX_SMASK 0xf
366#define TPXR_WMAX_SHIFT 24
367#define TPXR_WMAX_SMASK 0xf
368#define TPXR_WAY_SHIFT 28
369#define TPXR_WAY_SMASK 0xf
370
371/*
372 * DCR - Debug Control Register
373 */
374#define DCR_IBCE3 0x00000001 /* break on conditional insn pointed to by IBAR3 */
375#define DCR_IBE3 0x00000002 /* break on insn pointed to by IBAR3 */
376#define DCR_IBCE1 0x00000004 /* break on conditional insn pointed to by IBAR2 */
377#define DCR_IBE1 0x00000008 /* break on insn pointed to by IBAR2 */
378#define DCR_IBCE2 0x00000010 /* break on conditional insn pointed to by IBAR1 */
379#define DCR_IBE2 0x00000020 /* break on insn pointed to by IBAR1 */
380#define DCR_IBCE0 0x00000040 /* break on conditional insn pointed to by IBAR0 */
381#define DCR_IBE0 0x00000080 /* break on insn pointed to by IBAR0 */
382
383#define DCR_DDBE1 0x00004000 /* use DBDR1x when checking DBAR1 */
384#define DCR_DWBE1 0x00008000 /* break on store to address in DBAR1/DBMR1x */
385#define DCR_DRBE1 0x00010000 /* break on load from address in DBAR1/DBMR1x */
386#define DCR_DDBE0 0x00020000 /* use DBDR0x when checking DBAR0 */
387#define DCR_DWBE0 0x00040000 /* break on store to address in DBAR0/DBMR0x */
388#define DCR_DRBE0 0x00080000 /* break on load from address in DBAR0/DBMR0x */
389
390#define DCR_EIM 0x0c000000 /* external interrupt disable */
391#define DCR_IBM 0x10000000 /* instruction break disable */
392#define DCR_SE 0x20000000 /* single step enable */
393#define DCR_EBE 0x40000000 /* exception break enable */
394
395/*
396 * BRR - Break Interrupt Request Register
397 */
398#define BRR_ST 0x00000001 /* single-step detected */
399#define BRR_SB 0x00000002 /* break instruction detected */
400#define BRR_BB 0x00000004 /* branch with hint detected */
401#define BRR_CBB 0x00000008 /* branch to LR detected */
402#define BRR_IBx 0x000000f0 /* hardware breakpoint detected */
403#define BRR_DBx 0x00000f00 /* hardware watchpoint detected */
404#define BRR_DBNEx 0x0000f000 /* ? */
405#define BRR_EBTT 0x00ff0000 /* trap type of exception break */
406#define BRR_TB 0x10000000 /* external break request detected */
407#define BRR_CB 0x20000000 /* ICE break command detected */
408#define BRR_EB 0x40000000 /* exception break detected */
409
410/*
411 * BPSR - Break PSR Save Register
412 */
413#define BPSR_BET 0x00000001 /* former PSR.ET */
414#define BPSR_BS 0x00001000 /* former PSR.S */
415
416#endif /* _ASM_SPR_REGS_H */
diff --git a/include/asm-frv/stat.h b/include/asm-frv/stat.h
deleted file mode 100644
index ce56de9b37ba..000000000000
--- a/include/asm-frv/stat.h
+++ /dev/null
@@ -1,100 +0,0 @@
1#ifndef _ASM_STAT_H
2#define _ASM_STAT_H
3
4struct __old_kernel_stat {
5 unsigned short st_dev;
6 unsigned short st_ino;
7 unsigned short st_mode;
8 unsigned short st_nlink;
9 unsigned short st_uid;
10 unsigned short st_gid;
11 unsigned short st_rdev;
12 unsigned long st_size;
13 unsigned long st_atime;
14 unsigned long st_mtime;
15 unsigned long st_ctime;
16};
17
18/* This matches struct stat in uClibc/glibc. */
19struct stat {
20 unsigned char __pad1[6];
21 unsigned short st_dev;
22
23 unsigned long __pad2;
24 unsigned long st_ino;
25
26 unsigned short __pad3;
27 unsigned short st_mode;
28 unsigned short __pad4;
29 unsigned short st_nlink;
30
31 unsigned short __pad5;
32 unsigned short st_uid;
33 unsigned short __pad6;
34 unsigned short st_gid;
35
36 unsigned char __pad7[6];
37 unsigned short st_rdev;
38
39 unsigned long __pad8;
40 unsigned long st_size;
41
42 unsigned long __pad9; /* align 64-bit st_blocks to 2-word */
43 unsigned long st_blksize;
44
45 unsigned long __pad10; /* future possible st_blocks high bits */
46 unsigned long st_blocks; /* Number 512-byte blocks allocated. */
47
48 unsigned long __unused1;
49 unsigned long st_atime;
50
51 unsigned long __unused2;
52 unsigned long st_mtime;
53
54 unsigned long __unused3;
55 unsigned long st_ctime;
56
57 unsigned long long __unused4;
58};
59
60/* This matches struct stat64 in uClibc/glibc. The layout is exactly
61 the same as that of struct stat above, with 64-bit types taking up
62 space that was formerly used by padding. stat syscalls are still
63 different from stat64, though, in that the former tests for
64 overflow. */
65struct stat64 {
66 unsigned char __pad1[6];
67 unsigned short st_dev;
68
69 unsigned long long st_ino;
70
71 unsigned int st_mode;
72 unsigned int st_nlink;
73
74 unsigned long st_uid;
75 unsigned long st_gid;
76
77 unsigned char __pad2[6];
78 unsigned short st_rdev;
79
80 long long st_size;
81
82 unsigned long __pad3; /* align 64-bit st_blocks to 2-word */
83 unsigned long st_blksize;
84
85 unsigned long __pad4; /* future possible st_blocks high bits */
86 unsigned long st_blocks; /* Number 512-byte blocks allocated. */
87
88 unsigned long st_atime_nsec;
89 unsigned long st_atime;
90
91 unsigned int st_mtime_nsec;
92 unsigned long st_mtime;
93
94 unsigned long st_ctime_nsec;
95 unsigned long st_ctime;
96
97 unsigned long long __unused4;
98};
99
100#endif /* _ASM_STAT_H */
diff --git a/include/asm-frv/statfs.h b/include/asm-frv/statfs.h
deleted file mode 100644
index 741f586045ba..000000000000
--- a/include/asm-frv/statfs.h
+++ /dev/null
@@ -1,7 +0,0 @@
1#ifndef _ASM_STATFS_H
2#define _ASM_STATFS_H
3
4#include <asm-generic/statfs.h>
5
6#endif /* _ASM_STATFS_H */
7
diff --git a/include/asm-frv/string.h b/include/asm-frv/string.h
deleted file mode 100644
index 5ed310f64b7e..000000000000
--- a/include/asm-frv/string.h
+++ /dev/null
@@ -1,51 +0,0 @@
1/* string.h: FRV string handling
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_STRING_H_
13#define _ASM_STRING_H_
14
15#ifdef __KERNEL__ /* only set these up for kernel code */
16
17#define __HAVE_ARCH_MEMSET 1
18#define __HAVE_ARCH_MEMCPY 1
19
20extern void *memset(void *, int, __kernel_size_t);
21extern void *memcpy(void *, const void *, __kernel_size_t);
22
23#else /* KERNEL */
24
25/*
26 * let user libraries deal with these,
27 * IMHO the kernel has no place defining these functions for user apps
28 */
29
30#define __HAVE_ARCH_STRCPY 1
31#define __HAVE_ARCH_STRNCPY 1
32#define __HAVE_ARCH_STRCAT 1
33#define __HAVE_ARCH_STRNCAT 1
34#define __HAVE_ARCH_STRCMP 1
35#define __HAVE_ARCH_STRNCMP 1
36#define __HAVE_ARCH_STRNICMP 1
37#define __HAVE_ARCH_STRCHR 1
38#define __HAVE_ARCH_STRRCHR 1
39#define __HAVE_ARCH_STRSTR 1
40#define __HAVE_ARCH_STRLEN 1
41#define __HAVE_ARCH_STRNLEN 1
42#define __HAVE_ARCH_MEMSET 1
43#define __HAVE_ARCH_MEMCPY 1
44#define __HAVE_ARCH_MEMMOVE 1
45#define __HAVE_ARCH_MEMSCAN 1
46#define __HAVE_ARCH_MEMCMP 1
47#define __HAVE_ARCH_MEMCHR 1
48#define __HAVE_ARCH_STRTOK 1
49
50#endif /* KERNEL */
51#endif /* _ASM_STRING_H_ */
diff --git a/include/asm-frv/suspend.h b/include/asm-frv/suspend.h
deleted file mode 100644
index 5fa7b5a6ee40..000000000000
--- a/include/asm-frv/suspend.h
+++ /dev/null
@@ -1,20 +0,0 @@
1/* suspend.h: suspension stuff
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_SUSPEND_H
13#define _ASM_SUSPEND_H
14
15static inline int arch_prepare_suspend(void)
16{
17 return 0;
18}
19
20#endif /* _ASM_SUSPEND_H */
diff --git a/include/asm-frv/swab.h b/include/asm-frv/swab.h
deleted file mode 100644
index f305834b4799..000000000000
--- a/include/asm-frv/swab.h
+++ /dev/null
@@ -1,10 +0,0 @@
1#ifndef _ASM_SWAB_H
2#define _ASM_SWAB_H
3
4#include <linux/types.h>
5
6#if defined(__GNUC__) && !defined(__STRICT_ANSI__) || defined(__KERNEL__)
7# define __SWAB_64_THRU_32__
8#endif
9
10#endif /* _ASM_SWAB_H */
diff --git a/include/asm-frv/system.h b/include/asm-frv/system.h
deleted file mode 100644
index 7742ec000cc4..000000000000
--- a/include/asm-frv/system.h
+++ /dev/null
@@ -1,301 +0,0 @@
1/* system.h: FR-V CPU control definitions
2 *
3 * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_SYSTEM_H
13#define _ASM_SYSTEM_H
14
15#include <linux/types.h>
16#include <linux/linkage.h>
17#include <linux/kernel.h>
18
19struct thread_struct;
20
21/*
22 * switch_to(prev, next) should switch from task `prev' to `next'
23 * `prev' will never be the same as `next'.
24 * The `mb' is to tell GCC not to cache `current' across this call.
25 */
26extern asmlinkage
27struct task_struct *__switch_to(struct thread_struct *prev_thread,
28 struct thread_struct *next_thread,
29 struct task_struct *prev);
30
31#define switch_to(prev, next, last) \
32do { \
33 (prev)->thread.sched_lr = \
34 (unsigned long) __builtin_return_address(0); \
35 (last) = __switch_to(&(prev)->thread, &(next)->thread, (prev)); \
36 mb(); \
37} while(0)
38
39/*
40 * interrupt flag manipulation
41 * - use virtual interrupt management since touching the PSR is slow
42 * - ICC2.Z: T if interrupts virtually disabled
43 * - ICC2.C: F if interrupts really disabled
44 * - if Z==1 upon interrupt:
45 * - C is set to 0
46 * - interrupts are really disabled
47 * - entry.S returns immediately
48 * - uses TIHI (TRAP if Z==0 && C==0) #2 to really reenable interrupts
49 * - if taken, the trap:
50 * - sets ICC2.C
51 * - enables interrupts
52 */
53#define local_irq_disable() \
54do { \
55 /* set Z flag, but don't change the C flag */ \
56 asm volatile(" andcc gr0,gr0,gr0,icc2 \n" \
57 : \
58 : \
59 : "memory", "icc2" \
60 ); \
61} while(0)
62
63#define local_irq_enable() \
64do { \
65 /* clear Z flag and then test the C flag */ \
66 asm volatile(" oricc gr0,#1,gr0,icc2 \n" \
67 " tihi icc2,gr0,#2 \n" \
68 : \
69 : \
70 : "memory", "icc2" \
71 ); \
72} while(0)
73
74#define local_save_flags(flags) \
75do { \
76 typecheck(unsigned long, flags); \
77 asm volatile("movsg ccr,%0" \
78 : "=r"(flags) \
79 : \
80 : "memory"); \
81 \
82 /* shift ICC2.Z to bit 0 */ \
83 flags >>= 26; \
84 \
85 /* make flags 1 if interrupts disabled, 0 otherwise */ \
86 flags &= 1UL; \
87} while(0)
88
89#define irqs_disabled() \
90 ({unsigned long flags; local_save_flags(flags); !!flags; })
91
92#define local_irq_save(flags) \
93do { \
94 typecheck(unsigned long, flags); \
95 local_save_flags(flags); \
96 local_irq_disable(); \
97} while(0)
98
99#define local_irq_restore(flags) \
100do { \
101 typecheck(unsigned long, flags); \
102 \
103 /* load the Z flag by turning 1 if disabled into 0 if disabled \
104 * and thus setting the Z flag but not the C flag */ \
105 asm volatile(" xoricc %0,#1,gr0,icc2 \n" \
106 /* then test Z=0 and C=0 */ \
107 " tihi icc2,gr0,#2 \n" \
108 : \
109 : "r"(flags) \
110 : "memory", "icc2" \
111 ); \
112 \
113} while(0)
114
115/*
116 * real interrupt flag manipulation
117 */
118#define __local_irq_disable() \
119do { \
120 unsigned long psr; \
121 asm volatile(" movsg psr,%0 \n" \
122 " andi %0,%2,%0 \n" \
123 " ori %0,%1,%0 \n" \
124 " movgs %0,psr \n" \
125 : "=r"(psr) \
126 : "i" (PSR_PIL_14), "i" (~PSR_PIL) \
127 : "memory"); \
128} while(0)
129
130#define __local_irq_enable() \
131do { \
132 unsigned long psr; \
133 asm volatile(" movsg psr,%0 \n" \
134 " andi %0,%1,%0 \n" \
135 " movgs %0,psr \n" \
136 : "=r"(psr) \
137 : "i" (~PSR_PIL) \
138 : "memory"); \
139} while(0)
140
141#define __local_save_flags(flags) \
142do { \
143 typecheck(unsigned long, flags); \
144 asm("movsg psr,%0" \
145 : "=r"(flags) \
146 : \
147 : "memory"); \
148} while(0)
149
150#define __local_irq_save(flags) \
151do { \
152 unsigned long npsr; \
153 typecheck(unsigned long, flags); \
154 asm volatile(" movsg psr,%0 \n" \
155 " andi %0,%3,%1 \n" \
156 " ori %1,%2,%1 \n" \
157 " movgs %1,psr \n" \
158 : "=r"(flags), "=r"(npsr) \
159 : "i" (PSR_PIL_14), "i" (~PSR_PIL) \
160 : "memory"); \
161} while(0)
162
163#define __local_irq_restore(flags) \
164do { \
165 typecheck(unsigned long, flags); \
166 asm volatile(" movgs %0,psr \n" \
167 : \
168 : "r" (flags) \
169 : "memory"); \
170} while(0)
171
172#define __irqs_disabled() \
173 ((__get_PSR() & PSR_PIL) >= PSR_PIL_14)
174
175/*
176 * Force strict CPU ordering.
177 */
178#define nop() asm volatile ("nop"::)
179#define mb() asm volatile ("membar" : : :"memory")
180#define rmb() asm volatile ("membar" : : :"memory")
181#define wmb() asm volatile ("membar" : : :"memory")
182#define read_barrier_depends() do { } while (0)
183
184#ifdef CONFIG_SMP
185#define smp_mb() mb()
186#define smp_rmb() rmb()
187#define smp_wmb() wmb()
188#define smp_read_barrier_depends() read_barrier_depends()
189#define set_mb(var, value) \
190 do { xchg(&var, (value)); } while (0)
191#else
192#define smp_mb() barrier()
193#define smp_rmb() barrier()
194#define smp_wmb() barrier()
195#define smp_read_barrier_depends() do {} while(0)
196#define set_mb(var, value) \
197 do { var = (value); barrier(); } while (0)
198#endif
199
200extern void die_if_kernel(const char *, ...) __attribute__((format(printf, 1, 2)));
201extern void free_initmem(void);
202
203#define arch_align_stack(x) (x)
204
205/*****************************************************************************/
206/*
207 * compare and conditionally exchange value with memory
208 * - if (*ptr == test) then orig = *ptr; *ptr = test;
209 * - if (*ptr != test) then orig = *ptr;
210 */
211#ifndef CONFIG_FRV_OUTOFLINE_ATOMIC_OPS
212
213#define cmpxchg(ptr, test, new) \
214({ \
215 __typeof__(ptr) __xg_ptr = (ptr); \
216 __typeof__(*(ptr)) __xg_orig, __xg_tmp; \
217 __typeof__(*(ptr)) __xg_test = (test); \
218 __typeof__(*(ptr)) __xg_new = (new); \
219 \
220 switch (sizeof(__xg_orig)) { \
221 case 4: \
222 asm volatile( \
223 "0: \n" \
224 " orcc gr0,gr0,gr0,icc3 \n" \
225 " ckeq icc3,cc7 \n" \
226 " ld.p %M0,%1 \n" \
227 " orcr cc7,cc7,cc3 \n" \
228 " sub%I4cc %1,%4,%2,icc0 \n" \
229 " bne icc0,#0,1f \n" \
230 " cst.p %3,%M0 ,cc3,#1 \n" \
231 " corcc gr29,gr29,gr0 ,cc3,#1 \n" \
232 " beq icc3,#0,0b \n" \
233 "1: \n" \
234 : "+U"(*__xg_ptr), "=&r"(__xg_orig), "=&r"(__xg_tmp) \
235 : "r"(__xg_new), "NPr"(__xg_test) \
236 : "memory", "cc7", "cc3", "icc3", "icc0" \
237 ); \
238 break; \
239 \
240 default: \
241 __xg_orig = (__typeof__(__xg_orig))0; \
242 asm volatile("break"); \
243 break; \
244 } \
245 \
246 __xg_orig; \
247})
248
249#else
250
251extern uint32_t __cmpxchg_32(uint32_t *v, uint32_t test, uint32_t new);
252
253#define cmpxchg(ptr, test, new) \
254({ \
255 __typeof__(ptr) __xg_ptr = (ptr); \
256 __typeof__(*(ptr)) __xg_orig; \
257 __typeof__(*(ptr)) __xg_test = (test); \
258 __typeof__(*(ptr)) __xg_new = (new); \
259 \
260 switch (sizeof(__xg_orig)) { \
261 case 4: __xg_orig = (__force __typeof__(*ptr)) \
262 __cmpxchg_32((__force uint32_t *)__xg_ptr, \
263 (__force uint32_t)__xg_test, \
264 (__force uint32_t)__xg_new); break; \
265 default: \
266 __xg_orig = (__typeof__(__xg_orig))0; \
267 asm volatile("break"); \
268 break; \
269 } \
270 \
271 __xg_orig; \
272})
273
274#endif
275
276#include <asm-generic/cmpxchg-local.h>
277
278static inline unsigned long __cmpxchg_local(volatile void *ptr,
279 unsigned long old,
280 unsigned long new, int size)
281{
282 switch (size) {
283 case 4:
284 return cmpxchg((unsigned long *)ptr, old, new);
285 default:
286 return __cmpxchg_local_generic(ptr, old, new, size);
287 }
288
289 return old;
290}
291
292/*
293 * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
294 * them available.
295 */
296#define cmpxchg_local(ptr, o, n) \
297 ((__typeof__(*(ptr)))__cmpxchg_local((ptr), (unsigned long)(o), \
298 (unsigned long)(n), sizeof(*(ptr))))
299#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
300
301#endif /* _ASM_SYSTEM_H */
diff --git a/include/asm-frv/termbits.h b/include/asm-frv/termbits.h
deleted file mode 100644
index 5568492b5086..000000000000
--- a/include/asm-frv/termbits.h
+++ /dev/null
@@ -1,202 +0,0 @@
1#ifndef _ASM_TERMBITS_H__
2#define _ASM_TERMBITS_H__
3
4#include <linux/posix_types.h>
5
6typedef unsigned char cc_t;
7typedef unsigned int speed_t;
8typedef unsigned int tcflag_t;
9
10#define NCCS 19
11struct termios {
12 tcflag_t c_iflag; /* input mode flags */
13 tcflag_t c_oflag; /* output mode flags */
14 tcflag_t c_cflag; /* control mode flags */
15 tcflag_t c_lflag; /* local mode flags */
16 cc_t c_line; /* line discipline */
17 cc_t c_cc[NCCS]; /* control characters */
18};
19
20struct termios2 {
21 tcflag_t c_iflag; /* input mode flags */
22 tcflag_t c_oflag; /* output mode flags */
23 tcflag_t c_cflag; /* control mode flags */
24 tcflag_t c_lflag; /* local mode flags */
25 cc_t c_line; /* line discipline */
26 cc_t c_cc[NCCS]; /* control characters */
27 speed_t c_ispeed; /* input speed */
28 speed_t c_ospeed; /* output speed */
29};
30
31struct ktermios {
32 tcflag_t c_iflag; /* input mode flags */
33 tcflag_t c_oflag; /* output mode flags */
34 tcflag_t c_cflag; /* control mode flags */
35 tcflag_t c_lflag; /* local mode flags */
36 cc_t c_line; /* line discipline */
37 cc_t c_cc[NCCS]; /* control characters */
38 speed_t c_ispeed; /* input speed */
39 speed_t c_ospeed; /* output speed */
40};
41
42/* c_cc characters */
43#define VINTR 0
44#define VQUIT 1
45#define VERASE 2
46#define VKILL 3
47#define VEOF 4
48#define VTIME 5
49#define VMIN 6
50#define VSWTC 7
51#define VSTART 8
52#define VSTOP 9
53#define VSUSP 10
54#define VEOL 11
55#define VREPRINT 12
56#define VDISCARD 13
57#define VWERASE 14
58#define VLNEXT 15
59#define VEOL2 16
60
61
62/* c_iflag bits */
63#define IGNBRK 0000001
64#define BRKINT 0000002
65#define IGNPAR 0000004
66#define PARMRK 0000010
67#define INPCK 0000020
68#define ISTRIP 0000040
69#define INLCR 0000100
70#define IGNCR 0000200
71#define ICRNL 0000400
72#define IUCLC 0001000
73#define IXON 0002000
74#define IXANY 0004000
75#define IXOFF 0010000
76#define IMAXBEL 0020000
77#define IUTF8 0040000
78
79/* c_oflag bits */
80#define OPOST 0000001
81#define OLCUC 0000002
82#define ONLCR 0000004
83#define OCRNL 0000010
84#define ONOCR 0000020
85#define ONLRET 0000040
86#define OFILL 0000100
87#define OFDEL 0000200
88#define NLDLY 0000400
89#define NL0 0000000
90#define NL1 0000400
91#define CRDLY 0003000
92#define CR0 0000000
93#define CR1 0001000
94#define CR2 0002000
95#define CR3 0003000
96#define TABDLY 0014000
97#define TAB0 0000000
98#define TAB1 0004000
99#define TAB2 0010000
100#define TAB3 0014000
101#define XTABS 0014000
102#define BSDLY 0020000
103#define BS0 0000000
104#define BS1 0020000
105#define VTDLY 0040000
106#define VT0 0000000
107#define VT1 0040000
108#define FFDLY 0100000
109#define FF0 0000000
110#define FF1 0100000
111
112/* c_cflag bit meaning */
113#define CBAUD 0010017
114#define B0 0000000 /* hang up */
115#define B50 0000001
116#define B75 0000002
117#define B110 0000003
118#define B134 0000004
119#define B150 0000005
120#define B200 0000006
121#define B300 0000007
122#define B600 0000010
123#define B1200 0000011
124#define B1800 0000012
125#define B2400 0000013
126#define B4800 0000014
127#define B9600 0000015
128#define B19200 0000016
129#define B38400 0000017
130#define EXTA B19200
131#define EXTB B38400
132#define CSIZE 0000060
133#define CS5 0000000
134#define CS6 0000020
135#define CS7 0000040
136#define CS8 0000060
137#define CSTOPB 0000100
138#define CREAD 0000200
139#define PARENB 0000400
140#define PARODD 0001000
141#define HUPCL 0002000
142#define CLOCAL 0004000
143#define CBAUDEX 0010000
144#define BOTHER 0010000
145#define B57600 0010001
146#define B115200 0010002
147#define B230400 0010003
148#define B460800 0010004
149#define B500000 0010005
150#define B576000 0010006
151#define B921600 0010007
152#define B1000000 0010010
153#define B1152000 0010011
154#define B1500000 0010012
155#define B2000000 0010013
156#define B2500000 0010014
157#define B3000000 0010015
158#define B3500000 0010016
159#define B4000000 0010017
160#define CIBAUD 002003600000 /* Input baud rate */
161#define CTVB 004000000000 /* VisioBraille Terminal flow control */
162#define CMSPAR 010000000000 /* mark or space (stick) parity */
163#define CRTSCTS 020000000000 /* flow control */
164
165#define IBSHIFT 16 /* Shift from CBAUD to CIBAUD */
166
167/* c_lflag bits */
168#define ISIG 0000001
169#define ICANON 0000002
170#define XCASE 0000004
171#define ECHO 0000010
172#define ECHOE 0000020
173#define ECHOK 0000040
174#define ECHONL 0000100
175#define NOFLSH 0000200
176#define TOSTOP 0000400
177#define ECHOCTL 0001000
178#define ECHOPRT 0002000
179#define ECHOKE 0004000
180#define FLUSHO 0010000
181#define PENDIN 0040000
182#define IEXTEN 0100000
183
184
185/* tcflow() and TCXONC use these */
186#define TCOOFF 0
187#define TCOON 1
188#define TCIOFF 2
189#define TCION 3
190
191/* tcflush() and TCFLSH use these */
192#define TCIFLUSH 0
193#define TCOFLUSH 1
194#define TCIOFLUSH 2
195
196/* tcsetattr uses these */
197#define TCSANOW 0
198#define TCSADRAIN 1
199#define TCSAFLUSH 2
200
201#endif /* _ASM_TERMBITS_H__ */
202
diff --git a/include/asm-frv/termios.h b/include/asm-frv/termios.h
deleted file mode 100644
index a62fb5872375..000000000000
--- a/include/asm-frv/termios.h
+++ /dev/null
@@ -1,58 +0,0 @@
1#ifndef _ASM_TERMIOS_H
2#define _ASM_TERMIOS_H
3
4#include <asm/termbits.h>
5#include <asm/ioctls.h>
6
7struct winsize {
8 unsigned short ws_row;
9 unsigned short ws_col;
10 unsigned short ws_xpixel;
11 unsigned short ws_ypixel;
12};
13
14#define NCC 8
15struct termio {
16 unsigned short c_iflag; /* input mode flags */
17 unsigned short c_oflag; /* output mode flags */
18 unsigned short c_cflag; /* control mode flags */
19 unsigned short c_lflag; /* local mode flags */
20 unsigned char c_line; /* line discipline */
21 unsigned char c_cc[NCC]; /* control characters */
22};
23
24#ifdef __KERNEL__
25/* intr=^C quit=^| erase=del kill=^U
26 eof=^D vtime=\0 vmin=\1 sxtc=\0
27 start=^Q stop=^S susp=^Z eol=\0
28 reprint=^R discard=^U werase=^W lnext=^V
29 eol2=\0
30*/
31#define INIT_C_CC "\003\034\177\025\004\0\1\0\021\023\032\0\022\017\027\026\0"
32#endif
33
34/* modem lines */
35#define TIOCM_LE 0x001
36#define TIOCM_DTR 0x002
37#define TIOCM_RTS 0x004
38#define TIOCM_ST 0x008
39#define TIOCM_SR 0x010
40#define TIOCM_CTS 0x020
41#define TIOCM_CAR 0x040
42#define TIOCM_RNG 0x080
43#define TIOCM_DSR 0x100
44#define TIOCM_CD TIOCM_CAR
45#define TIOCM_RI TIOCM_RNG
46#define TIOCM_OUT1 0x2000
47#define TIOCM_OUT2 0x4000
48#define TIOCM_LOOP 0x8000
49
50#define TIOCM_MODEM_BITS TIOCM_OUT2 /* IRDA support */
51
52/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */
53
54#ifdef __KERNEL__
55#include <asm-generic/termios.h>
56#endif
57
58#endif /* _ASM_TERMIOS_H */
diff --git a/include/asm-frv/thread_info.h b/include/asm-frv/thread_info.h
deleted file mode 100644
index b7ac6bf2844c..000000000000
--- a/include/asm-frv/thread_info.h
+++ /dev/null
@@ -1,144 +0,0 @@
1/* thread_info.h: description
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 * Derived from include/asm-i386/thread_info.h
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13#ifndef _ASM_THREAD_INFO_H
14#define _ASM_THREAD_INFO_H
15
16#ifdef __KERNEL__
17
18#ifndef __ASSEMBLY__
19#include <asm/processor.h>
20#endif
21
22#define THREAD_SIZE 8192
23
24/*
25 * low level task data that entry.S needs immediate access to
26 * - this struct should fit entirely inside of one cache line
27 * - this struct shares the supervisor stack pages
28 * - if the contents of this structure are changed, the assembly constants must also be changed
29 */
30#ifndef __ASSEMBLY__
31
32struct thread_info {
33 struct task_struct *task; /* main task structure */
34 struct exec_domain *exec_domain; /* execution domain */
35 unsigned long flags; /* low level flags */
36 unsigned long status; /* thread-synchronous flags */
37 __u32 cpu; /* current CPU */
38 int preempt_count; /* 0 => preemptable, <0 => BUG */
39
40 mm_segment_t addr_limit; /* thread address space:
41 0-0xBFFFFFFF for user-thead
42 0-0xFFFFFFFF for kernel-thread
43 */
44 struct restart_block restart_block;
45
46 __u8 supervisor_stack[0];
47};
48
49#else /* !__ASSEMBLY__ */
50
51#include <asm/asm-offsets.h>
52
53#endif
54
55#define PREEMPT_ACTIVE 0x10000000
56
57/*
58 * macros/functions for gaining access to the thread information structure
59 *
60 * preempt_count needs to be 1 initially, until the scheduler is functional.
61 */
62#ifndef __ASSEMBLY__
63
64#define INIT_THREAD_INFO(tsk) \
65{ \
66 .task = &tsk, \
67 .exec_domain = &default_exec_domain, \
68 .flags = 0, \
69 .cpu = 0, \
70 .preempt_count = 1, \
71 .addr_limit = KERNEL_DS, \
72 .restart_block = { \
73 .fn = do_no_restart_syscall, \
74 }, \
75}
76
77#define init_thread_info (init_thread_union.thread_info)
78#define init_stack (init_thread_union.stack)
79
80/* how to get the thread information struct from C */
81register struct thread_info *__current_thread_info asm("gr15");
82
83#define current_thread_info() ({ __current_thread_info; })
84
85#define __HAVE_ARCH_THREAD_INFO_ALLOCATOR
86
87/* thread information allocation */
88#ifdef CONFIG_DEBUG_STACK_USAGE
89#define alloc_thread_info(tsk) \
90 ({ \
91 struct thread_info *ret; \
92 \
93 ret = kzalloc(THREAD_SIZE, GFP_KERNEL); \
94 \
95 ret; \
96 })
97#else
98#define alloc_thread_info(tsk) kmalloc(THREAD_SIZE, GFP_KERNEL)
99#endif
100
101#define free_thread_info(info) kfree(info)
102
103#endif /* __ASSEMBLY__ */
104
105/*
106 * thread information flags
107 * - these are process state flags that various assembly files may need to access
108 * - pending work-to-be-done flags are in LSW
109 * - other flags in MSW
110 */
111#define TIF_SYSCALL_TRACE 0 /* syscall trace active */
112#define TIF_SIGPENDING 1 /* signal pending */
113#define TIF_NEED_RESCHED 2 /* rescheduling necessary */
114#define TIF_SINGLESTEP 3 /* restore singlestep on return to user mode */
115#define TIF_IRET 4 /* return with iret */
116#define TIF_RESTORE_SIGMASK 5 /* restore signal mask in do_signal() */
117#define TIF_POLLING_NRFLAG 16 /* true if poll_idle() is polling TIF_NEED_RESCHED */
118#define TIF_MEMDIE 17 /* OOM killer killed process */
119#define TIF_FREEZE 18 /* freezing for suspend */
120
121#define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE)
122#define _TIF_SIGPENDING (1 << TIF_SIGPENDING)
123#define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED)
124#define _TIF_SINGLESTEP (1 << TIF_SINGLESTEP)
125#define _TIF_IRET (1 << TIF_IRET)
126#define _TIF_RESTORE_SIGMASK (1 << TIF_RESTORE_SIGMASK)
127#define _TIF_POLLING_NRFLAG (1 << TIF_POLLING_NRFLAG)
128#define _TIF_FREEZE (1 << TIF_FREEZE)
129
130#define _TIF_WORK_MASK 0x0000FFFE /* work to do on interrupt/exception return */
131#define _TIF_ALLWORK_MASK 0x0000FFFF /* work to do on any return to u-space */
132
133/*
134 * Thread-synchronous status.
135 *
136 * This is different from the flags in that nobody else
137 * ever touches our thread-synchronous status, so we don't
138 * have to worry about atomic accesses.
139 */
140#define TS_USEDFPM 0x0001 /* FPU/Media was used by this task this quantum (SMP) */
141
142#endif /* __KERNEL__ */
143
144#endif /* _ASM_THREAD_INFO_H */
diff --git a/include/asm-frv/timer-regs.h b/include/asm-frv/timer-regs.h
deleted file mode 100644
index 6c5a871ce5e9..000000000000
--- a/include/asm-frv/timer-regs.h
+++ /dev/null
@@ -1,106 +0,0 @@
1/* timer-regs.h: hardware timer register definitions
2 *
3 * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_TIMER_REGS_H
13#define _ASM_TIMER_REGS_H
14
15#include <asm/sections.h>
16
17extern unsigned long __nongprelbss __clkin_clock_speed_HZ;
18extern unsigned long __nongprelbss __ext_bus_clock_speed_HZ;
19extern unsigned long __nongprelbss __res_bus_clock_speed_HZ;
20extern unsigned long __nongprelbss __sdram_clock_speed_HZ;
21extern unsigned long __nongprelbss __core_bus_clock_speed_HZ;
22extern unsigned long __nongprelbss __core_clock_speed_HZ;
23extern unsigned long __nongprelbss __dsu_clock_speed_HZ;
24extern unsigned long __nongprelbss __serial_clock_speed_HZ;
25
26#define __get_CLKC() ({ *(volatile unsigned long *)(0xfeff9a00); })
27
28static inline void __set_CLKC(unsigned long v)
29{
30 int tmp;
31
32 asm volatile(" st%I0.p %2,%M0 \n"
33 " setlos %3,%1 \n"
34 " membar \n"
35 "0: \n"
36 " subicc %1,#1,%1,icc0 \n"
37 " bnc icc0,#1,0b \n"
38 : "=m"(*(volatile unsigned long *) 0xfeff9a00), "=r"(tmp)
39 : "r"(v), "i"(256)
40 : "icc0");
41}
42
43#define __get_TCTR() ({ *(volatile unsigned long *)(0xfeff9418); })
44#define __get_TPRV() ({ *(volatile unsigned long *)(0xfeff9420); })
45#define __get_TPRCKSL() ({ *(volatile unsigned long *)(0xfeff9428); })
46#define __get_TCSR(T) ({ *(volatile unsigned long *)(0xfeff9400 + 8 * (T)); })
47#define __get_TxCKSL(T) ({ *(volatile unsigned long *)(0xfeff9430 + 8 * (T)); })
48
49#define __get_TCSR_DATA(T) ({ __get_TCSR(T) >> 24; })
50
51#define __set_TCTR(V) do { *(volatile unsigned long *)(0xfeff9418) = (V); mb(); } while(0)
52#define __set_TPRV(V) do { *(volatile unsigned long *)(0xfeff9420) = (V) << 24; mb(); } while(0)
53#define __set_TPRCKSL(V) do { *(volatile unsigned long *)(0xfeff9428) = (V); mb(); } while(0)
54#define __set_TCSR(T,V) \
55do { *(volatile unsigned long *)(0xfeff9400 + 8 * (T)) = (V); mb(); } while(0)
56
57#define __set_TxCKSL(T,V) \
58do { *(volatile unsigned long *)(0xfeff9430 + 8 * (T)) = (V); mb(); } while(0)
59
60#define __set_TCSR_DATA(T,V) __set_TCSR(T, (V) << 24)
61#define __set_TxCKSL_DATA(T,V) __set_TxCKSL(T, TxCKSL_EIGHT | __TxCKSL_SELECT((V)))
62
63/* clock control register */
64#define CLKC_CMODE 0x0f000000
65#define CLKC_SLPL 0x000f0000
66#define CLKC_P0 0x00000100
67#define CLKC_CM 0x00000003
68
69#define CLKC_CMODE_s 24
70
71/* timer control register - non-readback mode */
72#define TCTR_MODE_0 0x00000000
73#define TCTR_MODE_2 0x04000000
74#define TCTR_MODE_4 0x08000000
75#define TCTR_MODE_5 0x0a000000
76#define TCTR_RL_LATCH 0x00000000
77#define TCTR_RL_RW_LOW8 0x10000000
78#define TCTR_RL_RW_HIGH8 0x20000000
79#define TCTR_RL_RW_LH8 0x30000000
80#define TCTR_SC_CTR0 0x00000000
81#define TCTR_SC_CTR1 0x40000000
82#define TCTR_SC_CTR2 0x80000000
83
84/* timer control register - readback mode */
85#define TCTR_CNT0 0x02000000
86#define TCTR_CNT1 0x04000000
87#define TCTR_CNT2 0x08000000
88#define TCTR_NSTATUS 0x10000000
89#define TCTR_NCOUNT 0x20000000
90#define TCTR_SC_READBACK 0xc0000000
91
92/* timer control status registers - non-readback mode */
93#define TCSRx_DATA 0xff000000
94
95/* timer control status registers - readback mode */
96#define TCSRx_OUTPUT 0x80000000
97#define TCSRx_NULLCOUNT 0x40000000
98#define TCSRx_RL 0x30000000
99#define TCSRx_MODE 0x07000000
100
101/* timer clock select registers */
102#define TxCKSL_SELECT 0x0f000000
103#define __TxCKSL_SELECT(X) ((X) << 24)
104#define TxCKSL_EIGHT 0xf0000000
105
106#endif /* _ASM_TIMER_REGS_H */
diff --git a/include/asm-frv/timex.h b/include/asm-frv/timex.h
deleted file mode 100644
index a89bddefdacf..000000000000
--- a/include/asm-frv/timex.h
+++ /dev/null
@@ -1,20 +0,0 @@
1/* timex.h: FR-V architecture timex specifications
2 */
3#ifndef _ASM_TIMEX_H
4#define _ASM_TIMEX_H
5
6#define CLOCK_TICK_RATE 1193180 /* Underlying HZ */
7#define CLOCK_TICK_FACTOR 20 /* Factor of both 1000000 and CLOCK_TICK_RATE */
8
9typedef unsigned long cycles_t;
10
11static inline cycles_t get_cycles(void)
12{
13 return 0;
14}
15
16#define vxtime_lock() do {} while (0)
17#define vxtime_unlock() do {} while (0)
18
19#endif
20
diff --git a/include/asm-frv/tlb.h b/include/asm-frv/tlb.h
deleted file mode 100644
index cd458eb6d75e..000000000000
--- a/include/asm-frv/tlb.h
+++ /dev/null
@@ -1,27 +0,0 @@
1#ifndef _ASM_TLB_H
2#define _ASM_TLB_H
3
4#include <asm/tlbflush.h>
5
6#ifdef CONFIG_MMU
7extern void check_pgt_cache(void);
8#else
9#define check_pgt_cache() do {} while(0)
10#endif
11
12/*
13 * we don't need any special per-pte or per-vma handling...
14 */
15#define tlb_start_vma(tlb, vma) do { } while (0)
16#define tlb_end_vma(tlb, vma) do { } while (0)
17#define __tlb_remove_tlb_entry(tlb, ptep, address) do { } while (0)
18
19/*
20 * .. because we flush the whole mm when it fills up
21 */
22#define tlb_flush(tlb) flush_tlb_mm((tlb)->mm)
23
24#include <asm-generic/tlb.h>
25
26#endif /* _ASM_TLB_H */
27
diff --git a/include/asm-frv/tlbflush.h b/include/asm-frv/tlbflush.h
deleted file mode 100644
index 7ac5eafc5d98..000000000000
--- a/include/asm-frv/tlbflush.h
+++ /dev/null
@@ -1,73 +0,0 @@
1/* tlbflush.h: TLB flushing functions
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_TLBFLUSH_H
13#define _ASM_TLBFLUSH_H
14
15#include <linux/mm.h>
16#include <asm/processor.h>
17
18#ifdef CONFIG_MMU
19
20#ifndef __ASSEMBLY__
21extern void asmlinkage __flush_tlb_all(void);
22extern void asmlinkage __flush_tlb_mm(unsigned long contextid);
23extern void asmlinkage __flush_tlb_page(unsigned long contextid, unsigned long start);
24extern void asmlinkage __flush_tlb_range(unsigned long contextid,
25 unsigned long start, unsigned long end);
26#endif /* !__ASSEMBLY__ */
27
28#define flush_tlb_all() \
29do { \
30 preempt_disable(); \
31 __flush_tlb_all(); \
32 preempt_enable(); \
33} while(0)
34
35#define flush_tlb_mm(mm) \
36do { \
37 preempt_disable(); \
38 __flush_tlb_mm((mm)->context.id); \
39 preempt_enable(); \
40} while(0)
41
42#define flush_tlb_range(vma,start,end) \
43do { \
44 preempt_disable(); \
45 __flush_tlb_range((vma)->vm_mm->context.id, start, end); \
46 preempt_enable(); \
47} while(0)
48
49#define flush_tlb_page(vma,addr) \
50do { \
51 preempt_disable(); \
52 __flush_tlb_page((vma)->vm_mm->context.id, addr); \
53 preempt_enable(); \
54} while(0)
55
56
57#define __flush_tlb_global() flush_tlb_all()
58#define flush_tlb() flush_tlb_all()
59#define flush_tlb_kernel_range(start, end) flush_tlb_all()
60
61#else
62
63#define flush_tlb() BUG()
64#define flush_tlb_all() BUG()
65#define flush_tlb_mm(mm) BUG()
66#define flush_tlb_page(vma,addr) BUG()
67#define flush_tlb_range(mm,start,end) BUG()
68#define flush_tlb_kernel_range(start, end) BUG()
69
70#endif
71
72
73#endif /* _ASM_TLBFLUSH_H */
diff --git a/include/asm-frv/topology.h b/include/asm-frv/topology.h
deleted file mode 100644
index 942724352705..000000000000
--- a/include/asm-frv/topology.h
+++ /dev/null
@@ -1,12 +0,0 @@
1#ifndef _ASM_TOPOLOGY_H
2#define _ASM_TOPOLOGY_H
3
4#ifdef CONFIG_NUMA
5
6#error NUMA not supported yet
7
8#endif /* CONFIG_NUMA */
9
10#include <asm-generic/topology.h>
11
12#endif /* _ASM_TOPOLOGY_H */
diff --git a/include/asm-frv/types.h b/include/asm-frv/types.h
deleted file mode 100644
index 613bf1e962f0..000000000000
--- a/include/asm-frv/types.h
+++ /dev/null
@@ -1,40 +0,0 @@
1/* types.h: FRV types
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_TYPES_H
13#define _ASM_TYPES_H
14
15#include <asm-generic/int-ll64.h>
16
17#ifndef __ASSEMBLY__
18
19typedef unsigned short umode_t;
20
21#endif /* __ASSEMBLY__ */
22
23/*
24 * These aren't exported outside the kernel to avoid name space clashes
25 */
26#ifdef __KERNEL__
27
28#define BITS_PER_LONG 32
29
30#ifndef __ASSEMBLY__
31
32/* Dma addresses are 32-bits wide. */
33
34typedef u32 dma_addr_t;
35
36#endif /* __ASSEMBLY__ */
37
38#endif /* __KERNEL__ */
39
40#endif /* _ASM_TYPES_H */
diff --git a/include/asm-frv/uaccess.h b/include/asm-frv/uaccess.h
deleted file mode 100644
index 53650c958f41..000000000000
--- a/include/asm-frv/uaccess.h
+++ /dev/null
@@ -1,321 +0,0 @@
1/* uaccess.h: userspace accessor functions
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_UACCESS_H
13#define _ASM_UACCESS_H
14
15/*
16 * User space memory access functions
17 */
18#include <linux/sched.h>
19#include <linux/mm.h>
20#include <asm/segment.h>
21#include <asm/sections.h>
22
23#define HAVE_ARCH_UNMAPPED_AREA /* we decide where to put mmaps */
24
25#define __ptr(x) ((unsigned long __force *)(x))
26
27#define VERIFY_READ 0
28#define VERIFY_WRITE 1
29
30#define __addr_ok(addr) ((unsigned long)(addr) < get_addr_limit())
31
32/*
33 * check that a range of addresses falls within the current address limit
34 */
35static inline int ___range_ok(unsigned long addr, unsigned long size)
36{
37#ifdef CONFIG_MMU
38 int flag = -EFAULT, tmp;
39
40 asm volatile (
41 " addcc %3,%2,%1,icc0 \n" /* set C-flag if addr+size>4GB */
42 " subcc.p %1,%4,gr0,icc1 \n" /* jump if addr+size>limit */
43 " bc icc0,#0,0f \n"
44 " bhi icc1,#0,0f \n"
45 " setlos #0,%0 \n" /* mark okay */
46 "0: \n"
47 : "=r"(flag), "=&r"(tmp)
48 : "r"(addr), "r"(size), "r"(get_addr_limit()), "0"(flag)
49 );
50
51 return flag;
52
53#else
54
55 if (addr < memory_start ||
56 addr > memory_end ||
57 size > memory_end - memory_start ||
58 addr + size > memory_end)
59 return -EFAULT;
60
61 return 0;
62#endif
63}
64
65#define __range_ok(addr,size) ___range_ok((unsigned long) (addr), (unsigned long) (size))
66
67#define access_ok(type,addr,size) (__range_ok((void __user *)(addr), (size)) == 0)
68#define __access_ok(addr,size) (__range_ok((addr), (size)) == 0)
69
70/*
71 * The exception table consists of pairs of addresses: the first is the
72 * address of an instruction that is allowed to fault, and the second is
73 * the address at which the program should continue. No registers are
74 * modified, so it is entirely up to the continuation code to figure out
75 * what to do.
76 *
77 * All the routines below use bits of fixup code that are out of line
78 * with the main instruction path. This means when everything is well,
79 * we don't even have to jump over them. Further, they do not intrude
80 * on our cache or tlb entries.
81 */
82struct exception_table_entry
83{
84 unsigned long insn, fixup;
85};
86
87/* Returns 0 if exception not found and fixup otherwise. */
88extern unsigned long search_exception_table(unsigned long);
89
90
91/*
92 * These are the main single-value transfer routines. They automatically
93 * use the right size if we just have the right pointer type.
94 */
95#define __put_user(x, ptr) \
96({ \
97 int __pu_err = 0; \
98 \
99 typeof(*(ptr)) __pu_val = (x); \
100 __chk_user_ptr(ptr); \
101 \
102 switch (sizeof (*(ptr))) { \
103 case 1: \
104 __put_user_asm(__pu_err, __pu_val, ptr, "b", "r"); \
105 break; \
106 case 2: \
107 __put_user_asm(__pu_err, __pu_val, ptr, "h", "r"); \
108 break; \
109 case 4: \
110 __put_user_asm(__pu_err, __pu_val, ptr, "", "r"); \
111 break; \
112 case 8: \
113 __put_user_asm(__pu_err, __pu_val, ptr, "d", "e"); \
114 break; \
115 default: \
116 __pu_err = __put_user_bad(); \
117 break; \
118 } \
119 __pu_err; \
120})
121
122#define put_user(x, ptr) \
123({ \
124 typeof(*(ptr)) __user *_p = (ptr); \
125 int _e; \
126 \
127 _e = __range_ok(_p, sizeof(*_p)); \
128 if (_e == 0) \
129 _e = __put_user((x), _p); \
130 _e; \
131})
132
133extern int __put_user_bad(void);
134
135/*
136 * Tell gcc we read from memory instead of writing: this is because
137 * we do not write to any memory gcc knows about, so there are no
138 * aliasing issues.
139 */
140
141#ifdef CONFIG_MMU
142
143#define __put_user_asm(err,x,ptr,dsize,constraint) \
144do { \
145 asm volatile("1: st"dsize"%I1 %2,%M1 \n" \
146 "2: \n" \
147 ".subsection 2 \n" \
148 "3: setlos %3,%0 \n" \
149 " bra 2b \n" \
150 ".previous \n" \
151 ".section __ex_table,\"a\" \n" \
152 " .balign 8 \n" \
153 " .long 1b,3b \n" \
154 ".previous" \
155 : "=r" (err) \
156 : "m" (*__ptr(ptr)), constraint (x), "i"(-EFAULT), "0"(err) \
157 : "memory"); \
158} while (0)
159
160#else
161
162#define __put_user_asm(err,x,ptr,bwl,con) \
163do { \
164 asm(" st"bwl"%I0 %1,%M0 \n" \
165 " membar \n" \
166 : \
167 : "m" (*__ptr(ptr)), con (x) \
168 : "memory"); \
169} while (0)
170
171#endif
172
173/*****************************************************************************/
174/*
175 *
176 */
177#define __get_user(x, ptr) \
178({ \
179 int __gu_err = 0; \
180 __chk_user_ptr(ptr); \
181 \
182 switch (sizeof(*(ptr))) { \
183 case 1: { \
184 unsigned char __gu_val; \
185 __get_user_asm(__gu_err, __gu_val, ptr, "ub", "=r"); \
186 (x) = *(__force __typeof__(*(ptr)) *) &__gu_val; \
187 break; \
188 } \
189 case 2: { \
190 unsigned short __gu_val; \
191 __get_user_asm(__gu_err, __gu_val, ptr, "uh", "=r"); \
192 (x) = *(__force __typeof__(*(ptr)) *) &__gu_val; \
193 break; \
194 } \
195 case 4: { \
196 unsigned int __gu_val; \
197 __get_user_asm(__gu_err, __gu_val, ptr, "", "=r"); \
198 (x) = *(__force __typeof__(*(ptr)) *) &__gu_val; \
199 break; \
200 } \
201 case 8: { \
202 unsigned long long __gu_val; \
203 __get_user_asm(__gu_err, __gu_val, ptr, "d", "=e"); \
204 (x) = *(__force __typeof__(*(ptr)) *) &__gu_val; \
205 break; \
206 } \
207 default: \
208 __gu_err = __get_user_bad(); \
209 break; \
210 } \
211 __gu_err; \
212})
213
214#define get_user(x, ptr) \
215({ \
216 const typeof(*(ptr)) __user *_p = (ptr);\
217 int _e; \
218 \
219 _e = __range_ok(_p, sizeof(*_p)); \
220 if (likely(_e == 0)) \
221 _e = __get_user((x), _p); \
222 else \
223 (x) = (typeof(x)) 0; \
224 _e; \
225})
226
227extern int __get_user_bad(void);
228
229#ifdef CONFIG_MMU
230
231#define __get_user_asm(err,x,ptr,dtype,constraint) \
232do { \
233 asm("1: ld"dtype"%I2 %M2,%1 \n" \
234 "2: \n" \
235 ".subsection 2 \n" \
236 "3: setlos %3,%0 \n" \
237 " setlos #0,%1 \n" \
238 " bra 2b \n" \
239 ".previous \n" \
240 ".section __ex_table,\"a\" \n" \
241 " .balign 8 \n" \
242 " .long 1b,3b \n" \
243 ".previous" \
244 : "=r" (err), constraint (x) \
245 : "m" (*__ptr(ptr)), "i"(-EFAULT), "0"(err) \
246 ); \
247} while(0)
248
249#else
250
251#define __get_user_asm(err,x,ptr,bwl,con) \
252 asm(" ld"bwl"%I1 %M1,%0 \n" \
253 " membar \n" \
254 : con(x) \
255 : "m" (*__ptr(ptr)))
256
257#endif
258
259/*****************************************************************************/
260/*
261 *
262 */
263#define ____force(x) (__force void *)(void __user *)(x)
264#ifdef CONFIG_MMU
265extern long __memset_user(void *dst, unsigned long count);
266extern long __memcpy_user(void *dst, const void *src, unsigned long count);
267
268#define clear_user(dst,count) __memset_user(____force(dst), (count))
269#define __copy_from_user_inatomic(to, from, n) __memcpy_user((to), ____force(from), (n))
270#define __copy_to_user_inatomic(to, from, n) __memcpy_user(____force(to), (from), (n))
271
272#else
273
274#define clear_user(dst,count) (memset(____force(dst), 0, (count)), 0)
275#define __copy_from_user_inatomic(to, from, n) (memcpy((to), ____force(from), (n)), 0)
276#define __copy_to_user_inatomic(to, from, n) (memcpy(____force(to), (from), (n)), 0)
277
278#endif
279
280#define __clear_user clear_user
281
282static inline unsigned long __must_check
283__copy_to_user(void __user *to, const void *from, unsigned long n)
284{
285 might_sleep();
286 return __copy_to_user_inatomic(to, from, n);
287}
288
289static inline unsigned long
290__copy_from_user(void *to, const void __user *from, unsigned long n)
291{
292 might_sleep();
293 return __copy_from_user_inatomic(to, from, n);
294}
295
296static inline long copy_from_user(void *to, const void __user *from, unsigned long n)
297{
298 unsigned long ret = n;
299
300 if (likely(__access_ok(from, n)))
301 ret = __copy_from_user(to, from, n);
302
303 if (unlikely(ret != 0))
304 memset(to + (n - ret), 0, ret);
305
306 return ret;
307}
308
309static inline long copy_to_user(void __user *to, const void *from, unsigned long n)
310{
311 return likely(__access_ok(to, n)) ? __copy_to_user(to, from, n) : n;
312}
313
314extern long strncpy_from_user(char *dst, const char __user *src, long count);
315extern long strnlen_user(const char __user *src, long count);
316
317#define strlen_user(str) strnlen_user(str, 32767)
318
319extern unsigned long search_exception_table(unsigned long addr);
320
321#endif /* _ASM_UACCESS_H */
diff --git a/include/asm-frv/ucontext.h b/include/asm-frv/ucontext.h
deleted file mode 100644
index 8d8c0c948007..000000000000
--- a/include/asm-frv/ucontext.h
+++ /dev/null
@@ -1,12 +0,0 @@
1#ifndef _ASM_UCONTEXT_H
2#define _ASM_UCONTEXT_H
3
4struct ucontext {
5 unsigned long uc_flags;
6 struct ucontext *uc_link;
7 stack_t uc_stack;
8 struct sigcontext uc_mcontext;
9 sigset_t uc_sigmask; /* mask last for extensibility */
10};
11
12#endif
diff --git a/include/asm-frv/unaligned.h b/include/asm-frv/unaligned.h
deleted file mode 100644
index 6c61c05b2e0c..000000000000
--- a/include/asm-frv/unaligned.h
+++ /dev/null
@@ -1,22 +0,0 @@
1/* unaligned.h: unaligned access handler
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_UNALIGNED_H
13#define _ASM_UNALIGNED_H
14
15#include <linux/unaligned/le_byteshift.h>
16#include <linux/unaligned/be_struct.h>
17#include <linux/unaligned/generic.h>
18
19#define get_unaligned __get_unaligned_be
20#define put_unaligned __put_unaligned_be
21
22#endif /* _ASM_UNALIGNED_H */
diff --git a/include/asm-frv/unistd.h b/include/asm-frv/unistd.h
deleted file mode 100644
index edcfaf5f0414..000000000000
--- a/include/asm-frv/unistd.h
+++ /dev/null
@@ -1,382 +0,0 @@
1#ifndef _ASM_UNISTD_H_
2#define _ASM_UNISTD_H_
3
4/*
5 * This file contains the system call numbers.
6 */
7
8#define __NR_restart_syscall 0
9#define __NR_exit 1
10#define __NR_fork 2
11#define __NR_read 3
12#define __NR_write 4
13#define __NR_open 5
14#define __NR_close 6
15#define __NR_waitpid 7
16#define __NR_creat 8
17#define __NR_link 9
18#define __NR_unlink 10
19#define __NR_execve 11
20#define __NR_chdir 12
21#define __NR_time 13
22#define __NR_mknod 14
23#define __NR_chmod 15
24#define __NR_lchown 16
25#define __NR_break 17
26#define __NR_oldstat 18
27#define __NR_lseek 19
28#define __NR_getpid 20
29#define __NR_mount 21
30#define __NR_umount 22
31#define __NR_setuid 23
32#define __NR_getuid 24
33#define __NR_stime 25
34#define __NR_ptrace 26
35#define __NR_alarm 27
36#define __NR_oldfstat 28
37#define __NR_pause 29
38#define __NR_utime 30
39#define __NR_stty 31
40#define __NR_gtty 32
41#define __NR_access 33
42#define __NR_nice 34
43#define __NR_ftime 35
44#define __NR_sync 36
45#define __NR_kill 37
46#define __NR_rename 38
47#define __NR_mkdir 39
48#define __NR_rmdir 40
49#define __NR_dup 41
50#define __NR_pipe 42
51#define __NR_times 43
52#define __NR_prof 44
53#define __NR_brk 45
54#define __NR_setgid 46
55#define __NR_getgid 47
56#define __NR_signal 48
57#define __NR_geteuid 49
58#define __NR_getegid 50
59#define __NR_acct 51
60#define __NR_umount2 52
61#define __NR_lock 53
62#define __NR_ioctl 54
63#define __NR_fcntl 55
64#define __NR_mpx 56
65#define __NR_setpgid 57
66#define __NR_ulimit 58
67// #define __NR_oldolduname /* 59 */ obsolete
68#define __NR_umask 60
69#define __NR_chroot 61
70#define __NR_ustat 62
71#define __NR_dup2 63
72#define __NR_getppid 64
73#define __NR_getpgrp 65
74#define __NR_setsid 66
75#define __NR_sigaction 67
76#define __NR_sgetmask 68
77#define __NR_ssetmask 69
78#define __NR_setreuid 70
79#define __NR_setregid 71
80#define __NR_sigsuspend 72
81#define __NR_sigpending 73
82#define __NR_sethostname 74
83#define __NR_setrlimit 75
84#define __NR_getrlimit 76 /* Back compatible 2Gig limited rlimit */
85#define __NR_getrusage 77
86#define __NR_gettimeofday 78
87#define __NR_settimeofday 79
88#define __NR_getgroups 80
89#define __NR_setgroups 81
90#define __NR_select 82
91#define __NR_symlink 83
92#define __NR_oldlstat 84
93#define __NR_readlink 85
94#define __NR_uselib 86
95#define __NR_swapon 87
96#define __NR_reboot 88
97#define __NR_readdir 89
98// #define __NR_mmap 90 /* obsolete - not implemented */
99#define __NR_munmap 91
100#define __NR_truncate 92
101#define __NR_ftruncate 93
102#define __NR_fchmod 94
103#define __NR_fchown 95
104#define __NR_getpriority 96
105#define __NR_setpriority 97
106// #define __NR_profil /* 98 */ obsolete
107#define __NR_statfs 99
108#define __NR_fstatfs 100
109// #define __NR_ioperm /* 101 */ not supported
110#define __NR_socketcall 102
111#define __NR_syslog 103
112#define __NR_setitimer 104
113#define __NR_getitimer 105
114#define __NR_stat 106
115#define __NR_lstat 107
116#define __NR_fstat 108
117// #define __NR_olduname /* 109 */ obsolete
118// #define __NR_iopl /* 110 */ not supported
119#define __NR_vhangup 111
120// #define __NR_idle /* 112 */ Obsolete
121// #define __NR_vm86old /* 113 */ not supported
122#define __NR_wait4 114
123#define __NR_swapoff 115
124#define __NR_sysinfo 116
125#define __NR_ipc 117
126#define __NR_fsync 118
127#define __NR_sigreturn 119
128#define __NR_clone 120
129#define __NR_setdomainname 121
130#define __NR_uname 122
131// #define __NR_modify_ldt /* 123 */ not supported
132#define __NR_cacheflush 123
133#define __NR_adjtimex 124
134#define __NR_mprotect 125
135#define __NR_sigprocmask 126
136#define __NR_create_module 127
137#define __NR_init_module 128
138#define __NR_delete_module 129
139#define __NR_get_kernel_syms 130
140#define __NR_quotactl 131
141#define __NR_getpgid 132
142#define __NR_fchdir 133
143#define __NR_bdflush 134
144#define __NR_sysfs 135
145#define __NR_personality 136
146#define __NR_afs_syscall 137 /* Syscall for Andrew File System */
147#define __NR_setfsuid 138
148#define __NR_setfsgid 139
149#define __NR__llseek 140
150#define __NR_getdents 141
151#define __NR__newselect 142
152#define __NR_flock 143
153#define __NR_msync 144
154#define __NR_readv 145
155#define __NR_writev 146
156#define __NR_getsid 147
157#define __NR_fdatasync 148
158#define __NR__sysctl 149
159#define __NR_mlock 150
160#define __NR_munlock 151
161#define __NR_mlockall 152
162#define __NR_munlockall 153
163#define __NR_sched_setparam 154
164#define __NR_sched_getparam 155
165#define __NR_sched_setscheduler 156
166#define __NR_sched_getscheduler 157
167#define __NR_sched_yield 158
168#define __NR_sched_get_priority_max 159
169#define __NR_sched_get_priority_min 160
170#define __NR_sched_rr_get_interval 161
171#define __NR_nanosleep 162
172#define __NR_mremap 163
173#define __NR_setresuid 164
174#define __NR_getresuid 165
175// #define __NR_vm86 /* 166 */ not supported
176#define __NR_query_module 167
177#define __NR_poll 168
178#define __NR_nfsservctl 169
179#define __NR_setresgid 170
180#define __NR_getresgid 171
181#define __NR_prctl 172
182#define __NR_rt_sigreturn 173
183#define __NR_rt_sigaction 174
184#define __NR_rt_sigprocmask 175
185#define __NR_rt_sigpending 176
186#define __NR_rt_sigtimedwait 177
187#define __NR_rt_sigqueueinfo 178
188#define __NR_rt_sigsuspend 179
189#define __NR_pread64 180
190#define __NR_pwrite64 181
191#define __NR_chown 182
192#define __NR_getcwd 183
193#define __NR_capget 184
194#define __NR_capset 185
195#define __NR_sigaltstack 186
196#define __NR_sendfile 187
197#define __NR_getpmsg 188 /* some people actually want streams */
198#define __NR_putpmsg 189 /* some people actually want streams */
199#define __NR_vfork 190
200#define __NR_ugetrlimit 191 /* SuS compliant getrlimit */
201#define __NR_mmap2 192
202#define __NR_truncate64 193
203#define __NR_ftruncate64 194
204#define __NR_stat64 195
205#define __NR_lstat64 196
206#define __NR_fstat64 197
207#define __NR_lchown32 198
208#define __NR_getuid32 199
209#define __NR_getgid32 200
210#define __NR_geteuid32 201
211#define __NR_getegid32 202
212#define __NR_setreuid32 203
213#define __NR_setregid32 204
214#define __NR_getgroups32 205
215#define __NR_setgroups32 206
216#define __NR_fchown32 207
217#define __NR_setresuid32 208
218#define __NR_getresuid32 209
219#define __NR_setresgid32 210
220#define __NR_getresgid32 211
221#define __NR_chown32 212
222#define __NR_setuid32 213
223#define __NR_setgid32 214
224#define __NR_setfsuid32 215
225#define __NR_setfsgid32 216
226#define __NR_pivot_root 217
227#define __NR_mincore 218
228#define __NR_madvise 219
229
230#define __NR_getdents64 220
231#define __NR_fcntl64 221
232#define __NR_security 223 /* syscall for security modules */
233#define __NR_gettid 224
234#define __NR_readahead 225
235#define __NR_setxattr 226
236#define __NR_lsetxattr 227
237#define __NR_fsetxattr 228
238#define __NR_getxattr 229
239#define __NR_lgetxattr 230
240#define __NR_fgetxattr 231
241#define __NR_listxattr 232
242#define __NR_llistxattr 233
243#define __NR_flistxattr 234
244#define __NR_removexattr 235
245#define __NR_lremovexattr 236
246#define __NR_fremovexattr 237
247#define __NR_tkill 238
248#define __NR_sendfile64 239
249#define __NR_futex 240
250#define __NR_sched_setaffinity 241
251#define __NR_sched_getaffinity 242
252#define __NR_set_thread_area 243
253#define __NR_get_thread_area 244
254#define __NR_io_setup 245
255#define __NR_io_destroy 246
256#define __NR_io_getevents 247
257#define __NR_io_submit 248
258#define __NR_io_cancel 249
259#define __NR_fadvise64 250
260
261#define __NR_exit_group 252
262#define __NR_lookup_dcookie 253
263#define __NR_epoll_create 254
264#define __NR_epoll_ctl 255
265#define __NR_epoll_wait 256
266#define __NR_remap_file_pages 257
267#define __NR_set_tid_address 258
268#define __NR_timer_create 259
269#define __NR_timer_settime (__NR_timer_create+1)
270#define __NR_timer_gettime (__NR_timer_create+2)
271#define __NR_timer_getoverrun (__NR_timer_create+3)
272#define __NR_timer_delete (__NR_timer_create+4)
273#define __NR_clock_settime (__NR_timer_create+5)
274#define __NR_clock_gettime (__NR_timer_create+6)
275#define __NR_clock_getres (__NR_timer_create+7)
276#define __NR_clock_nanosleep (__NR_timer_create+8)
277#define __NR_statfs64 268
278#define __NR_fstatfs64 269
279#define __NR_tgkill 270
280#define __NR_utimes 271
281#define __NR_fadvise64_64 272
282#define __NR_vserver 273
283#define __NR_mbind 274
284#define __NR_get_mempolicy 275
285#define __NR_set_mempolicy 276
286#define __NR_mq_open 277
287#define __NR_mq_unlink (__NR_mq_open+1)
288#define __NR_mq_timedsend (__NR_mq_open+2)
289#define __NR_mq_timedreceive (__NR_mq_open+3)
290#define __NR_mq_notify (__NR_mq_open+4)
291#define __NR_mq_getsetattr (__NR_mq_open+5)
292#define __NR_kexec_load 283
293#define __NR_waitid 284
294/* #define __NR_sys_setaltroot 285 */
295#define __NR_add_key 286
296#define __NR_request_key 287
297#define __NR_keyctl 288
298#define __NR_ioprio_set 289
299#define __NR_ioprio_get 290
300#define __NR_inotify_init 291
301#define __NR_inotify_add_watch 292
302#define __NR_inotify_rm_watch 293
303#define __NR_migrate_pages 294
304#define __NR_openat 295
305#define __NR_mkdirat 296
306#define __NR_mknodat 297
307#define __NR_fchownat 298
308#define __NR_futimesat 299
309#define __NR_fstatat64 300
310#define __NR_unlinkat 301
311#define __NR_renameat 302
312#define __NR_linkat 303
313#define __NR_symlinkat 304
314#define __NR_readlinkat 305
315#define __NR_fchmodat 306
316#define __NR_faccessat 307
317#define __NR_pselect6 308
318#define __NR_ppoll 309
319#define __NR_unshare 310
320#define __NR_set_robust_list 311
321#define __NR_get_robust_list 312
322#define __NR_splice 313
323#define __NR_sync_file_range 314
324#define __NR_tee 315
325#define __NR_vmsplice 316
326#define __NR_move_pages 317
327#define __NR_getcpu 318
328#define __NR_epoll_pwait 319
329#define __NR_utimensat 320
330#define __NR_signalfd 321
331#define __NR_timerfd_create 322
332#define __NR_eventfd 323
333#define __NR_fallocate 324
334#define __NR_timerfd_settime 325
335#define __NR_timerfd_gettime 326
336#define __NR_signalfd4 327
337#define __NR_eventfd2 328
338#define __NR_epoll_create1 329
339#define __NR_dup3 330
340#define __NR_pipe2 331
341#define __NR_inotify_init1 332
342
343#ifdef __KERNEL__
344
345#define NR_syscalls 333
346
347#define __ARCH_WANT_IPC_PARSE_VERSION
348/* #define __ARCH_WANT_OLD_READDIR */
349#define __ARCH_WANT_OLD_STAT
350#define __ARCH_WANT_STAT64
351#define __ARCH_WANT_SYS_ALARM
352/* #define __ARCH_WANT_SYS_GETHOSTNAME */
353#define __ARCH_WANT_SYS_PAUSE
354/* #define __ARCH_WANT_SYS_SGETMASK */
355/* #define __ARCH_WANT_SYS_SIGNAL */
356#define __ARCH_WANT_SYS_TIME
357#define __ARCH_WANT_SYS_UTIME
358#define __ARCH_WANT_SYS_WAITPID
359#define __ARCH_WANT_SYS_SOCKETCALL
360#define __ARCH_WANT_SYS_FADVISE64
361#define __ARCH_WANT_SYS_GETPGRP
362#define __ARCH_WANT_SYS_LLSEEK
363#define __ARCH_WANT_SYS_NICE
364/* #define __ARCH_WANT_SYS_OLD_GETRLIMIT */
365#define __ARCH_WANT_SYS_OLDUMOUNT
366/* #define __ARCH_WANT_SYS_SIGPENDING */
367#define __ARCH_WANT_SYS_SIGPROCMASK
368#define __ARCH_WANT_SYS_RT_SIGACTION
369#define __ARCH_WANT_SYS_RT_SIGSUSPEND
370
371/*
372 * "Conditional" syscalls
373 *
374 * What we want is __attribute__((weak,alias("sys_ni_syscall"))),
375 * but it doesn't work on all toolchains, so we just do it by hand
376 */
377#ifndef cond_syscall
378#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall")
379#endif
380
381#endif /* __KERNEL__ */
382#endif /* _ASM_UNISTD_H_ */
diff --git a/include/asm-frv/user.h b/include/asm-frv/user.h
deleted file mode 100644
index 82fa8fab64ae..000000000000
--- a/include/asm-frv/user.h
+++ /dev/null
@@ -1,80 +0,0 @@
1/* user.h: FR-V core file format stuff
2 *
3 * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11#ifndef _ASM_USER_H
12#define _ASM_USER_H
13
14#include <asm/page.h>
15#include <asm/registers.h>
16
17/* Core file format: The core file is written in such a way that gdb
18 * can understand it and provide useful information to the user (under
19 * linux we use the 'trad-core' bfd). There are quite a number of
20 * obstacles to being able to view the contents of the floating point
21 * registers, and until these are solved you will not be able to view
22 * the contents of them. Actually, you can read in the core file and
23 * look at the contents of the user struct to find out what the
24 * floating point registers contain.
25 *
26 * The actual file contents are as follows:
27 * UPAGE:
28 * 1 page consisting of a user struct that tells gdb what is present
29 * in the file. Directly after this is a copy of the task_struct,
30 * which is currently not used by gdb, but it may come in useful at
31 * some point. All of the registers are stored as part of the
32 * upage. The upage should always be only one page.
33 *
34 * DATA:
35 * The data area is stored. We use current->end_text to
36 * current->brk to pick up all of the user variables, plus any
37 * memory that may have been malloced. No attempt is made to
38 * determine if a page is demand-zero or if a page is totally
39 * unused, we just cover the entire range. All of the addresses are
40 * rounded in such a way that an integral number of pages is
41 * written.
42 *
43 * STACK:
44 * We need the stack information in order to get a meaningful
45 * backtrace. We need to write the data from (esp) to
46 * current->start_stack, so we round each of these off in order to
47 * be able to write an integer number of pages. The minimum core
48 * file size is 3 pages, or 12288 bytes.
49 */
50
51/* When the kernel dumps core, it starts by dumping the user struct -
52 * this will be used by gdb to figure out where the data and stack segments
53 * are within the file, and what virtual addresses to use.
54 */
55struct user {
56 /* We start with the registers, to mimic the way that "memory" is returned
57 * from the ptrace(3,...) function. */
58 struct user_context regs;
59
60 /* The rest of this junk is to help gdb figure out what goes where */
61 unsigned long u_tsize; /* Text segment size (pages). */
62 unsigned long u_dsize; /* Data segment size (pages). */
63 unsigned long u_ssize; /* Stack segment size (pages). */
64 unsigned long start_code; /* Starting virtual address of text. */
65 unsigned long start_stack; /* Starting virtual address of stack area.
66 * This is actually the bottom of the stack,
67 * the top of the stack is always found in the
68 * esp register. */
69 long int signal; /* Signal that caused the core dump. */
70
71 unsigned long magic; /* To uniquely identify a core file */
72 char u_comm[32]; /* User command that was responsible */
73};
74
75#define NBPG PAGE_SIZE
76#define UPAGES 1
77#define HOST_TEXT_START_ADDR (u.start_code)
78#define HOST_STACK_END_ADDR (u.start_stack + u.u_ssize * NBPG)
79
80#endif
diff --git a/include/asm-frv/vga.h b/include/asm-frv/vga.h
deleted file mode 100644
index a702c800a229..000000000000
--- a/include/asm-frv/vga.h
+++ /dev/null
@@ -1,17 +0,0 @@
1/* vga.h: VGA register stuff
2 *
3 * Copyright (C) 2006 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_VGA_H
13#define _ASM_VGA_H
14
15
16
17#endif /* _ASM_VGA_H */
diff --git a/include/asm-frv/virtconvert.h b/include/asm-frv/virtconvert.h
deleted file mode 100644
index 59788fa2a813..000000000000
--- a/include/asm-frv/virtconvert.h
+++ /dev/null
@@ -1,41 +0,0 @@
1/* virtconvert.h: virtual/physical/page address convertion
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11#ifndef _ASM_VIRTCONVERT_H
12#define _ASM_VIRTCONVERT_H
13
14/*
15 * Macros used for converting between virtual and physical mappings.
16 */
17
18#ifdef __KERNEL__
19
20#include <asm/setup.h>
21
22#ifdef CONFIG_MMU
23
24#define phys_to_virt(vaddr) ((void *) ((unsigned long)(vaddr) + PAGE_OFFSET))
25#define virt_to_phys(vaddr) ((unsigned long) (vaddr) - PAGE_OFFSET)
26
27#else
28
29#define phys_to_virt(vaddr) ((void *) (vaddr))
30#define virt_to_phys(vaddr) ((unsigned long) (vaddr))
31
32#endif
33
34#define virt_to_bus virt_to_phys
35#define bus_to_virt phys_to_virt
36
37#define __page_address(page) (PAGE_OFFSET + (((page) - mem_map) << PAGE_SHIFT))
38#define page_to_phys(page) virt_to_phys((void *)__page_address(page))
39
40#endif
41#endif
diff --git a/include/asm-frv/xor.h b/include/asm-frv/xor.h
deleted file mode 100644
index c82eb12a5b18..000000000000
--- a/include/asm-frv/xor.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/xor.h>
diff --git a/include/asm-generic/bug.h b/include/asm-generic/bug.h
index 37b82cb96c89..e727fe0d1451 100644
--- a/include/asm-generic/bug.h
+++ b/include/asm-generic/bug.h
@@ -88,7 +88,7 @@ extern void warn_slowpath(const char *file, const int line,
88 88
89#else /* !CONFIG_BUG */ 89#else /* !CONFIG_BUG */
90#ifndef HAVE_ARCH_BUG 90#ifndef HAVE_ARCH_BUG
91#define BUG() 91#define BUG() do {} while(0)
92#endif 92#endif
93 93
94#ifndef HAVE_ARCH_BUG_ON 94#ifndef HAVE_ARCH_BUG_ON
diff --git a/include/asm-generic/percpu.h b/include/asm-generic/percpu.h
index 00f45ff081a6..d7d50d7ee51e 100644
--- a/include/asm-generic/percpu.h
+++ b/include/asm-generic/percpu.h
@@ -1,13 +1,9 @@
1#ifndef _ASM_GENERIC_PERCPU_H_ 1#ifndef _ASM_GENERIC_PERCPU_H_
2#define _ASM_GENERIC_PERCPU_H_ 2#define _ASM_GENERIC_PERCPU_H_
3
3#include <linux/compiler.h> 4#include <linux/compiler.h>
4#include <linux/threads.h> 5#include <linux/threads.h>
5 6#include <linux/percpu-defs.h>
6/*
7 * Determine the real variable name from the name visible in the
8 * kernel sources.
9 */
10#define per_cpu_var(var) per_cpu__##var
11 7
12#ifdef CONFIG_SMP 8#ifdef CONFIG_SMP
13 9
@@ -73,63 +69,32 @@ extern void setup_per_cpu_areas(void);
73 69
74#endif /* SMP */ 70#endif /* SMP */
75 71
76#ifndef PER_CPU_ATTRIBUTES 72#ifndef PER_CPU_BASE_SECTION
77#define PER_CPU_ATTRIBUTES 73#ifdef CONFIG_SMP
74#define PER_CPU_BASE_SECTION ".data.percpu"
75#else
76#define PER_CPU_BASE_SECTION ".data"
78#endif 77#endif
79
80#define DECLARE_PER_CPU(type, name) extern PER_CPU_ATTRIBUTES \
81 __typeof__(type) per_cpu_var(name)
82
83/*
84 * Optional methods for optimized non-lvalue per-cpu variable access.
85 *
86 * @var can be a percpu variable or a field of it and its size should
87 * equal char, int or long. percpu_read() evaluates to a lvalue and
88 * all others to void.
89 *
90 * These operations are guaranteed to be atomic w.r.t. preemption.
91 * The generic versions use plain get/put_cpu_var(). Archs are
92 * encouraged to implement single-instruction alternatives which don't
93 * require preemption protection.
94 */
95#ifndef percpu_read
96# define percpu_read(var) \
97 ({ \
98 typeof(per_cpu_var(var)) __tmp_var__; \
99 __tmp_var__ = get_cpu_var(var); \
100 put_cpu_var(var); \
101 __tmp_var__; \
102 })
103#endif 78#endif
104 79
105#define __percpu_generic_to_op(var, val, op) \ 80#ifdef CONFIG_SMP
106do { \
107 get_cpu_var(var) op val; \
108 put_cpu_var(var); \
109} while (0)
110
111#ifndef percpu_write
112# define percpu_write(var, val) __percpu_generic_to_op(var, (val), =)
113#endif
114 81
115#ifndef percpu_add 82#ifdef MODULE
116# define percpu_add(var, val) __percpu_generic_to_op(var, (val), +=) 83#define PER_CPU_SHARED_ALIGNED_SECTION ""
84#else
85#define PER_CPU_SHARED_ALIGNED_SECTION ".shared_aligned"
117#endif 86#endif
87#define PER_CPU_FIRST_SECTION ".first"
118 88
119#ifndef percpu_sub 89#else
120# define percpu_sub(var, val) __percpu_generic_to_op(var, (val), -=)
121#endif
122 90
123#ifndef percpu_and 91#define PER_CPU_SHARED_ALIGNED_SECTION ""
124# define percpu_and(var, val) __percpu_generic_to_op(var, (val), &=) 92#define PER_CPU_FIRST_SECTION ""
125#endif
126 93
127#ifndef percpu_or
128# define percpu_or(var, val) __percpu_generic_to_op(var, (val), |=)
129#endif 94#endif
130 95
131#ifndef percpu_xor 96#ifndef PER_CPU_ATTRIBUTES
132# define percpu_xor(var, val) __percpu_generic_to_op(var, (val), ^=) 97#define PER_CPU_ATTRIBUTES
133#endif 98#endif
134 99
135#endif /* _ASM_GENERIC_PERCPU_H_ */ 100#endif /* _ASM_GENERIC_PERCPU_H_ */
diff --git a/include/asm-generic/siginfo.h b/include/asm-generic/siginfo.h
index 35752dadd6df..c840719a8c59 100644
--- a/include/asm-generic/siginfo.h
+++ b/include/asm-generic/siginfo.h
@@ -201,7 +201,7 @@ typedef struct siginfo {
201#define TRAP_TRACE (__SI_FAULT|2) /* process trace trap */ 201#define TRAP_TRACE (__SI_FAULT|2) /* process trace trap */
202#define TRAP_BRANCH (__SI_FAULT|3) /* process taken branch trap */ 202#define TRAP_BRANCH (__SI_FAULT|3) /* process taken branch trap */
203#define TRAP_HWBKPT (__SI_FAULT|4) /* hardware breakpoint/watchpoint */ 203#define TRAP_HWBKPT (__SI_FAULT|4) /* hardware breakpoint/watchpoint */
204#define NSIGTRAP 2 204#define NSIGTRAP 4
205 205
206/* 206/*
207 * SIGCHLD si_codes 207 * SIGCHLD si_codes
diff --git a/include/asm-generic/vmlinux.lds.h b/include/asm-generic/vmlinux.lds.h
index 7fa660fd449c..89853bcd27a6 100644
--- a/include/asm-generic/vmlinux.lds.h
+++ b/include/asm-generic/vmlinux.lds.h
@@ -1,3 +1,5 @@
1#include <linux/section-names.h>
2
1#ifndef LOAD_OFFSET 3#ifndef LOAD_OFFSET
2#define LOAD_OFFSET 0 4#define LOAD_OFFSET 0
3#endif 5#endif
@@ -88,7 +90,6 @@
88/* .data section */ 90/* .data section */
89#define DATA_DATA \ 91#define DATA_DATA \
90 *(.data) \ 92 *(.data) \
91 *(.data.init.refok) \
92 *(.ref.data) \ 93 *(.ref.data) \
93 DEV_KEEP(init.data) \ 94 DEV_KEEP(init.data) \
94 DEV_KEEP(exit.data) \ 95 DEV_KEEP(exit.data) \
@@ -287,8 +288,6 @@
287 *(.text.hot) \ 288 *(.text.hot) \
288 *(.text) \ 289 *(.text) \
289 *(.ref.text) \ 290 *(.ref.text) \
290 *(.text.init.refok) \
291 *(.exit.text.refok) \
292 DEV_KEEP(init.text) \ 291 DEV_KEEP(init.text) \
293 DEV_KEEP(exit.text) \ 292 DEV_KEEP(exit.text) \
294 CPU_KEEP(init.text) \ 293 CPU_KEEP(init.text) \
@@ -331,7 +330,7 @@
331#endif 330#endif
332 331
333/* Section used for early init (in .S files) */ 332/* Section used for early init (in .S files) */
334#define HEAD_TEXT *(.head.text) 333#define HEAD_TEXT *(HEAD_TEXT_SECTION)
335 334
336/* init and exit section handling */ 335/* init and exit section handling */
337#define INIT_DATA \ 336#define INIT_DATA \
diff --git a/include/asm-h8300/timer.h b/include/asm-h8300/timer.h
deleted file mode 100644
index def80464d38f..000000000000
--- a/include/asm-h8300/timer.h
+++ /dev/null
@@ -1,25 +0,0 @@
1#ifndef __H8300_TIMER_H
2#define __H8300_TIMER_H
3
4void h8300_timer_tick(void);
5void h8300_timer_setup(void);
6void h8300_gettod(unsigned int *year, unsigned int *mon, unsigned int *day,
7 unsigned int *hour, unsigned int *min, unsigned int *sec);
8
9#define TIMER_FREQ (CONFIG_CPU_CLOCK*10000) /* Timer input freq. */
10
11#define calc_param(cnt, div, rate, limit) \
12do { \
13 cnt = TIMER_FREQ / HZ; \
14 for (div = 0; div < ARRAY_SIZE(divide_rate); div++) { \
15 if (rate[div] == 0) \
16 continue; \
17 if ((cnt / rate[div]) > limit) \
18 break; \
19 } \
20 if (div == ARRAY_SIZE(divide_rate)) \
21 panic("Timer counter overflow"); \
22 cnt /= divide_rate[div]; \
23} while(0)
24
25#endif
diff --git a/include/asm-m32r/Kbuild b/include/asm-m32r/Kbuild
deleted file mode 100644
index c68e1680da01..000000000000
--- a/include/asm-m32r/Kbuild
+++ /dev/null
@@ -1 +0,0 @@
1include include/asm-generic/Kbuild.asm
diff --git a/include/asm-m32r/addrspace.h b/include/asm-m32r/addrspace.h
deleted file mode 100644
index 81782c122da4..000000000000
--- a/include/asm-m32r/addrspace.h
+++ /dev/null
@@ -1,57 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2001 by Hiroyuki Kondo
7 *
8 * Defitions for the address spaces of the M32R CPUs.
9 */
10#ifndef __ASM_M32R_ADDRSPACE_H
11#define __ASM_M32R_ADDRSPACE_H
12
13/*
14 * Memory segments (32bit kernel mode addresses)
15 */
16#define KUSEG 0x00000000
17#define KSEG0 0x80000000
18#define KSEG1 0xa0000000
19#define KSEG2 0xc0000000
20#define KSEG3 0xe0000000
21
22#define K0BASE KSEG0
23
24/*
25 * Returns the kernel segment base of a given address
26 */
27#ifndef __ASSEMBLY__
28#define KSEGX(a) (((unsigned long)(a)) & 0xe0000000)
29#else
30#define KSEGX(a) ((a) & 0xe0000000)
31#endif
32
33/*
34 * Returns the physical address of a KSEG0/KSEG1 address
35 */
36#ifndef __ASSEMBLY__
37#define PHYSADDR(a) (((unsigned long)(a)) & 0x1fffffff)
38#else
39#define PHYSADDR(a) ((a) & 0x1fffffff)
40#endif
41
42/*
43 * Map an address to a certain kernel segment
44 */
45#ifndef __ASSEMBLY__
46#define KSEG0ADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | KSEG0))
47#define KSEG1ADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | KSEG1))
48#define KSEG2ADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | KSEG2))
49#define KSEG3ADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | KSEG3))
50#else
51#define KSEG0ADDR(a) (((a) & 0x1fffffff) | KSEG0)
52#define KSEG1ADDR(a) (((a) & 0x1fffffff) | KSEG1)
53#define KSEG2ADDR(a) (((a) & 0x1fffffff) | KSEG2)
54#define KSEG3ADDR(a) (((a) & 0x1fffffff) | KSEG3)
55#endif
56
57#endif /* __ASM_M32R_ADDRSPACE_H */
diff --git a/include/asm-m32r/assembler.h b/include/asm-m32r/assembler.h
deleted file mode 100644
index 26351539b5ff..000000000000
--- a/include/asm-m32r/assembler.h
+++ /dev/null
@@ -1,229 +0,0 @@
1#ifndef _ASM_M32R_ASSEMBLER_H
2#define _ASM_M32R_ASSEMBLER_H
3
4/*
5 * linux/asm-m32r/assembler.h
6 *
7 * Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org>
8 *
9 * This file contains M32R architecture specific macro definitions.
10 */
11
12
13#ifndef __STR
14#ifdef __ASSEMBLY__
15#define __STR(x) x
16#else
17#define __STR(x) #x
18#endif
19#endif /* __STR */
20
21#ifdef CONFIG_SMP
22#define M32R_LOCK __STR(lock)
23#define M32R_UNLOCK __STR(unlock)
24#else
25#define M32R_LOCK __STR(ld)
26#define M32R_UNLOCK __STR(st)
27#endif
28
29#ifdef __ASSEMBLY__
30#undef ENTRY
31#define ENTRY(name) ENTRY_M name
32 .macro ENTRY_M name
33 .global \name
34 ALIGN
35\name:
36 .endm
37#endif
38
39
40/**
41 * LDIMM - load immediate value
42 * STI - enable interruption
43 * CLI - disable interruption
44 */
45
46#ifdef __ASSEMBLY__
47
48#define LDIMM(reg,x) LDIMM reg x
49 .macro LDIMM reg x
50 seth \reg, #high(\x)
51 or3 \reg, \reg, #low(\x)
52 .endm
53
54#if !(defined(CONFIG_CHIP_M32102) || defined(CONFIG_CHIP_M32104))
55#define ENABLE_INTERRUPTS(reg) ENABLE_INTERRUPTS reg
56 .macro ENABLE_INTERRUPTS reg
57 setpsw #0x40 -> nop
58 ; WORKAROUND: "-> nop" is a workaround for the M32700(TS1).
59 .endm
60
61#define DISABLE_INTERRUPTS(reg) DISABLE_INTERRUPTS reg
62 .macro DISABLE_INTERRUPTS reg
63 clrpsw #0x40 -> nop
64 ; WORKAROUND: "-> nop" is a workaround for the M32700(TS1).
65 .endm
66#else /* CONFIG_CHIP_M32102 || CONFIG_CHIP_M32104 */
67#define ENABLE_INTERRUPTS(reg) ENABLE_INTERRUPTS reg
68 .macro ENABLE_INTERRUPTS reg
69 mvfc \reg, psw
70 or3 \reg, \reg, #0x0040
71 mvtc \reg, psw
72 .endm
73
74#define DISABLE_INTERRUPTS(reg) DISABLE_INTERRUPTS reg
75 .macro DISABLE_INTERRUPTS reg
76 mvfc \reg, psw
77 and3 \reg, \reg, #0xffbf
78 mvtc \reg, psw
79 .endm
80#endif /* CONFIG_CHIP_M32102 */
81
82 .macro SAVE_ALL
83 push r0 ; orig_r0
84 push sp ; spi (r15)
85 push lr ; r14
86 push r13
87 mvfc r13, cr3 ; spu
88 push r13
89 mvfc r13, bbpc
90 push r13
91 mvfc r13, bbpsw
92 push r13
93 mvfc r13, bpc
94 push r13
95 mvfc r13, psw
96 push r13
97#if defined(CONFIG_ISA_M32R2) && defined(CONFIG_ISA_DSP_LEVEL2)
98 mvfaclo r13, a1
99 push r13
100 mvfachi r13, a1
101 push r13
102 mvfaclo r13, a0
103 push r13
104 mvfachi r13, a0
105 push r13
106#elif defined(CONFIG_ISA_M32R2) || defined(CONFIG_ISA_M32R)
107 mvfaclo r13
108 push r13
109 mvfachi r13
110 push r13
111 ldi r13, #0
112 push r13 ; dummy push acc1h
113 push r13 ; dummy push acc1l
114#else
115#error unknown isa configuration
116#endif
117 ldi r13, #-1
118 push r13 ; syscall_nr (default: -1)
119 push r12
120 push r11
121 push r10
122 push r9
123 push r8
124 push r7
125 push r3
126 push r2
127 push r1
128 push r0
129 addi sp, #-4 ; room for implicit pt_regs parameter
130 push r6
131 push r5
132 push r4
133 .endm
134
135 .macro RESTORE_ALL
136 pop r4
137 pop r5
138 pop r6
139 addi sp, #4
140 pop r0
141 pop r1
142 pop r2
143 pop r3
144 pop r7
145 pop r8
146 pop r9
147 pop r10
148 pop r11
149 pop r12
150 addi r15, #4 ; Skip syscall number
151#if defined(CONFIG_ISA_M32R2) && defined(CONFIG_ISA_DSP_LEVEL2)
152 pop r13
153 mvtachi r13, a0
154 pop r13
155 mvtaclo r13, a0
156 pop r13
157 mvtachi r13, a1
158 pop r13
159 mvtaclo r13, a1
160#elif defined(CONFIG_ISA_M32R2) || defined(CONFIG_ISA_M32R)
161 pop r13 ; dummy pop acc1h
162 pop r13 ; dummy pop acc1l
163 pop r13
164 mvtachi r13
165 pop r13
166 mvtaclo r13
167#else
168#error unknown isa configuration
169#endif
170 pop r14
171 mvtc r14, psw
172 pop r14
173 mvtc r14, bpc
174 addi sp, #8 ; Skip bbpsw, bbpc
175 pop r14
176 mvtc r14, cr3 ; spu
177 pop r13
178 pop lr ; r14
179 pop sp ; spi (r15)
180 addi sp, #4 ; Skip orig_r0
181 .fillinsn
1821: rte
183 .section .fixup,"ax"
1842: bl do_exit
185 .previous
186 .section __ex_table,"a"
187 ALIGN
188 .long 1b, 2b
189 .previous
190 .endm
191
192#define GET_CURRENT(reg) get_current reg
193 .macro get_current reg
194 ldi \reg, #-8192
195 and \reg, sp
196 .endm
197
198#if !(defined(CONFIG_CHIP_M32102) || defined(CONFIG_CHIP_M32104))
199 .macro SWITCH_TO_KERNEL_STACK
200 ; switch to kernel stack (spi)
201 clrpsw #0x80 -> nop
202 .endm
203#else /* CONFIG_CHIP_M32102 || CONFIG_CHIP_M32104 */
204 .macro SWITCH_TO_KERNEL_STACK
205 push r0 ; save r0 for working
206 mvfc r0, psw
207 and3 r0, r0, #0x00ff7f
208 mvtc r0, psw
209 slli r0, #16
210 bltz r0, 1f ; check BSM-bit
211;
212 ;; called from kernel context: previous stack = spi
213 pop r0 ; retrieve r0
214 bra 2f
215 .fillinsn
2161:
217 ;; called from user context: previous stack = spu
218 mvfc r0, cr3 ; spu
219 addi r0, #4
220 mvtc r0, cr3 ; spu
221 ld r0, @(-4,r0) ; retrieve r0
222 .fillinsn
2232:
224 .endm
225#endif /* CONFIG_CHIP_M32102 || CONFIG_CHIP_M32104 */
226
227#endif /* __ASSEMBLY__ */
228
229#endif /* _ASM_M32R_ASSEMBLER_H */
diff --git a/include/asm-m32r/atomic.h b/include/asm-m32r/atomic.h
deleted file mode 100644
index 2eed30f84080..000000000000
--- a/include/asm-m32r/atomic.h
+++ /dev/null
@@ -1,318 +0,0 @@
1#ifndef _ASM_M32R_ATOMIC_H
2#define _ASM_M32R_ATOMIC_H
3
4/*
5 * linux/include/asm-m32r/atomic.h
6 *
7 * M32R version:
8 * Copyright (C) 2001, 2002 Hitoshi Yamamoto
9 * Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org>
10 */
11
12#include <linux/types.h>
13#include <asm/assembler.h>
14#include <asm/system.h>
15
16/*
17 * Atomic operations that C can't guarantee us. Useful for
18 * resource counting etc..
19 */
20
21#define ATOMIC_INIT(i) { (i) }
22
23/**
24 * atomic_read - read atomic variable
25 * @v: pointer of type atomic_t
26 *
27 * Atomically reads the value of @v.
28 */
29#define atomic_read(v) ((v)->counter)
30
31/**
32 * atomic_set - set atomic variable
33 * @v: pointer of type atomic_t
34 * @i: required value
35 *
36 * Atomically sets the value of @v to @i.
37 */
38#define atomic_set(v,i) (((v)->counter) = (i))
39
40/**
41 * atomic_add_return - add integer to atomic variable and return it
42 * @i: integer value to add
43 * @v: pointer of type atomic_t
44 *
45 * Atomically adds @i to @v and return (@i + @v).
46 */
47static __inline__ int atomic_add_return(int i, atomic_t *v)
48{
49 unsigned long flags;
50 int result;
51
52 local_irq_save(flags);
53 __asm__ __volatile__ (
54 "# atomic_add_return \n\t"
55 DCACHE_CLEAR("%0", "r4", "%1")
56 M32R_LOCK" %0, @%1; \n\t"
57 "add %0, %2; \n\t"
58 M32R_UNLOCK" %0, @%1; \n\t"
59 : "=&r" (result)
60 : "r" (&v->counter), "r" (i)
61 : "memory"
62#ifdef CONFIG_CHIP_M32700_TS1
63 , "r4"
64#endif /* CONFIG_CHIP_M32700_TS1 */
65 );
66 local_irq_restore(flags);
67
68 return result;
69}
70
71/**
72 * atomic_sub_return - subtract integer from atomic variable and return it
73 * @i: integer value to subtract
74 * @v: pointer of type atomic_t
75 *
76 * Atomically subtracts @i from @v and return (@v - @i).
77 */
78static __inline__ int atomic_sub_return(int i, atomic_t *v)
79{
80 unsigned long flags;
81 int result;
82
83 local_irq_save(flags);
84 __asm__ __volatile__ (
85 "# atomic_sub_return \n\t"
86 DCACHE_CLEAR("%0", "r4", "%1")
87 M32R_LOCK" %0, @%1; \n\t"
88 "sub %0, %2; \n\t"
89 M32R_UNLOCK" %0, @%1; \n\t"
90 : "=&r" (result)
91 : "r" (&v->counter), "r" (i)
92 : "memory"
93#ifdef CONFIG_CHIP_M32700_TS1
94 , "r4"
95#endif /* CONFIG_CHIP_M32700_TS1 */
96 );
97 local_irq_restore(flags);
98
99 return result;
100}
101
102/**
103 * atomic_add - add integer to atomic variable
104 * @i: integer value to add
105 * @v: pointer of type atomic_t
106 *
107 * Atomically adds @i to @v.
108 */
109#define atomic_add(i,v) ((void) atomic_add_return((i), (v)))
110
111/**
112 * atomic_sub - subtract the atomic variable
113 * @i: integer value to subtract
114 * @v: pointer of type atomic_t
115 *
116 * Atomically subtracts @i from @v.
117 */
118#define atomic_sub(i,v) ((void) atomic_sub_return((i), (v)))
119
120/**
121 * atomic_sub_and_test - subtract value from variable and test result
122 * @i: integer value to subtract
123 * @v: pointer of type atomic_t
124 *
125 * Atomically subtracts @i from @v and returns
126 * true if the result is zero, or false for all
127 * other cases.
128 */
129#define atomic_sub_and_test(i,v) (atomic_sub_return((i), (v)) == 0)
130
131/**
132 * atomic_inc_return - increment atomic variable and return it
133 * @v: pointer of type atomic_t
134 *
135 * Atomically increments @v by 1 and returns the result.
136 */
137static __inline__ int atomic_inc_return(atomic_t *v)
138{
139 unsigned long flags;
140 int result;
141
142 local_irq_save(flags);
143 __asm__ __volatile__ (
144 "# atomic_inc_return \n\t"
145 DCACHE_CLEAR("%0", "r4", "%1")
146 M32R_LOCK" %0, @%1; \n\t"
147 "addi %0, #1; \n\t"
148 M32R_UNLOCK" %0, @%1; \n\t"
149 : "=&r" (result)
150 : "r" (&v->counter)
151 : "memory"
152#ifdef CONFIG_CHIP_M32700_TS1
153 , "r4"
154#endif /* CONFIG_CHIP_M32700_TS1 */
155 );
156 local_irq_restore(flags);
157
158 return result;
159}
160
161/**
162 * atomic_dec_return - decrement atomic variable and return it
163 * @v: pointer of type atomic_t
164 *
165 * Atomically decrements @v by 1 and returns the result.
166 */
167static __inline__ int atomic_dec_return(atomic_t *v)
168{
169 unsigned long flags;
170 int result;
171
172 local_irq_save(flags);
173 __asm__ __volatile__ (
174 "# atomic_dec_return \n\t"
175 DCACHE_CLEAR("%0", "r4", "%1")
176 M32R_LOCK" %0, @%1; \n\t"
177 "addi %0, #-1; \n\t"
178 M32R_UNLOCK" %0, @%1; \n\t"
179 : "=&r" (result)
180 : "r" (&v->counter)
181 : "memory"
182#ifdef CONFIG_CHIP_M32700_TS1
183 , "r4"
184#endif /* CONFIG_CHIP_M32700_TS1 */
185 );
186 local_irq_restore(flags);
187
188 return result;
189}
190
191/**
192 * atomic_inc - increment atomic variable
193 * @v: pointer of type atomic_t
194 *
195 * Atomically increments @v by 1.
196 */
197#define atomic_inc(v) ((void)atomic_inc_return(v))
198
199/**
200 * atomic_dec - decrement atomic variable
201 * @v: pointer of type atomic_t
202 *
203 * Atomically decrements @v by 1.
204 */
205#define atomic_dec(v) ((void)atomic_dec_return(v))
206
207/**
208 * atomic_inc_and_test - increment and test
209 * @v: pointer of type atomic_t
210 *
211 * Atomically increments @v by 1
212 * and returns true if the result is zero, or false for all
213 * other cases.
214 */
215#define atomic_inc_and_test(v) (atomic_inc_return(v) == 0)
216
217/**
218 * atomic_dec_and_test - decrement and test
219 * @v: pointer of type atomic_t
220 *
221 * Atomically decrements @v by 1 and
222 * returns true if the result is 0, or false for all
223 * other cases.
224 */
225#define atomic_dec_and_test(v) (atomic_dec_return(v) == 0)
226
227/**
228 * atomic_add_negative - add and test if negative
229 * @v: pointer of type atomic_t
230 * @i: integer value to add
231 *
232 * Atomically adds @i to @v and returns true
233 * if the result is negative, or false when
234 * result is greater than or equal to zero.
235 */
236#define atomic_add_negative(i,v) (atomic_add_return((i), (v)) < 0)
237
238#define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n)))
239#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
240
241/**
242 * atomic_add_unless - add unless the number is a given value
243 * @v: pointer of type atomic_t
244 * @a: the amount to add to v...
245 * @u: ...unless v is equal to u.
246 *
247 * Atomically adds @a to @v, so long as it was not @u.
248 * Returns non-zero if @v was not @u, and zero otherwise.
249 */
250static __inline__ int atomic_add_unless(atomic_t *v, int a, int u)
251{
252 int c, old;
253 c = atomic_read(v);
254 for (;;) {
255 if (unlikely(c == (u)))
256 break;
257 old = atomic_cmpxchg((v), c, c + (a));
258 if (likely(old == c))
259 break;
260 c = old;
261 }
262 return c != (u);
263}
264
265#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
266
267static __inline__ void atomic_clear_mask(unsigned long mask, atomic_t *addr)
268{
269 unsigned long flags;
270 unsigned long tmp;
271
272 local_irq_save(flags);
273 __asm__ __volatile__ (
274 "# atomic_clear_mask \n\t"
275 DCACHE_CLEAR("%0", "r5", "%1")
276 M32R_LOCK" %0, @%1; \n\t"
277 "and %0, %2; \n\t"
278 M32R_UNLOCK" %0, @%1; \n\t"
279 : "=&r" (tmp)
280 : "r" (addr), "r" (~mask)
281 : "memory"
282#ifdef CONFIG_CHIP_M32700_TS1
283 , "r5"
284#endif /* CONFIG_CHIP_M32700_TS1 */
285 );
286 local_irq_restore(flags);
287}
288
289static __inline__ void atomic_set_mask(unsigned long mask, atomic_t *addr)
290{
291 unsigned long flags;
292 unsigned long tmp;
293
294 local_irq_save(flags);
295 __asm__ __volatile__ (
296 "# atomic_set_mask \n\t"
297 DCACHE_CLEAR("%0", "r5", "%1")
298 M32R_LOCK" %0, @%1; \n\t"
299 "or %0, %2; \n\t"
300 M32R_UNLOCK" %0, @%1; \n\t"
301 : "=&r" (tmp)
302 : "r" (addr), "r" (mask)
303 : "memory"
304#ifdef CONFIG_CHIP_M32700_TS1
305 , "r5"
306#endif /* CONFIG_CHIP_M32700_TS1 */
307 );
308 local_irq_restore(flags);
309}
310
311/* Atomic operations are already serializing on m32r */
312#define smp_mb__before_atomic_dec() barrier()
313#define smp_mb__after_atomic_dec() barrier()
314#define smp_mb__before_atomic_inc() barrier()
315#define smp_mb__after_atomic_inc() barrier()
316
317#include <asm-generic/atomic.h>
318#endif /* _ASM_M32R_ATOMIC_H */
diff --git a/include/asm-m32r/auxvec.h b/include/asm-m32r/auxvec.h
deleted file mode 100644
index f76dcc860fae..000000000000
--- a/include/asm-m32r/auxvec.h
+++ /dev/null
@@ -1,4 +0,0 @@
1#ifndef _ASM_M32R__AUXVEC_H
2#define _ASM_M32R__AUXVEC_H
3
4#endif /* _ASM_M32R__AUXVEC_H */
diff --git a/include/asm-m32r/bitops.h b/include/asm-m32r/bitops.h
deleted file mode 100644
index aaddf0d57603..000000000000
--- a/include/asm-m32r/bitops.h
+++ /dev/null
@@ -1,275 +0,0 @@
1#ifndef _ASM_M32R_BITOPS_H
2#define _ASM_M32R_BITOPS_H
3
4/*
5 * linux/include/asm-m32r/bitops.h
6 *
7 * Copyright 1992, Linus Torvalds.
8 *
9 * M32R version:
10 * Copyright (C) 2001, 2002 Hitoshi Yamamoto
11 * Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org>
12 */
13
14#ifndef _LINUX_BITOPS_H
15#error only <linux/bitops.h> can be included directly
16#endif
17
18#include <linux/compiler.h>
19#include <asm/assembler.h>
20#include <asm/system.h>
21#include <asm/byteorder.h>
22#include <asm/types.h>
23
24/*
25 * These have to be done with inline assembly: that way the bit-setting
26 * is guaranteed to be atomic. All bit operations return 0 if the bit
27 * was cleared before the operation and != 0 if it was not.
28 *
29 * bit 0 is the LSB of addr; bit 32 is the LSB of (addr+1).
30 */
31
32/**
33 * set_bit - Atomically set a bit in memory
34 * @nr: the bit to set
35 * @addr: the address to start counting from
36 *
37 * This function is atomic and may not be reordered. See __set_bit()
38 * if you do not require the atomic guarantees.
39 * Note that @nr may be almost arbitrarily large; this function is not
40 * restricted to acting on a single-word quantity.
41 */
42static __inline__ void set_bit(int nr, volatile void * addr)
43{
44 __u32 mask;
45 volatile __u32 *a = addr;
46 unsigned long flags;
47 unsigned long tmp;
48
49 a += (nr >> 5);
50 mask = (1 << (nr & 0x1F));
51
52 local_irq_save(flags);
53 __asm__ __volatile__ (
54 DCACHE_CLEAR("%0", "r6", "%1")
55 M32R_LOCK" %0, @%1; \n\t"
56 "or %0, %2; \n\t"
57 M32R_UNLOCK" %0, @%1; \n\t"
58 : "=&r" (tmp)
59 : "r" (a), "r" (mask)
60 : "memory"
61#ifdef CONFIG_CHIP_M32700_TS1
62 , "r6"
63#endif /* CONFIG_CHIP_M32700_TS1 */
64 );
65 local_irq_restore(flags);
66}
67
68/**
69 * clear_bit - Clears a bit in memory
70 * @nr: Bit to clear
71 * @addr: Address to start counting from
72 *
73 * clear_bit() is atomic and may not be reordered. However, it does
74 * not contain a memory barrier, so if it is used for locking purposes,
75 * you should call smp_mb__before_clear_bit() and/or smp_mb__after_clear_bit()
76 * in order to ensure changes are visible on other processors.
77 */
78static __inline__ void clear_bit(int nr, volatile void * addr)
79{
80 __u32 mask;
81 volatile __u32 *a = addr;
82 unsigned long flags;
83 unsigned long tmp;
84
85 a += (nr >> 5);
86 mask = (1 << (nr & 0x1F));
87
88 local_irq_save(flags);
89
90 __asm__ __volatile__ (
91 DCACHE_CLEAR("%0", "r6", "%1")
92 M32R_LOCK" %0, @%1; \n\t"
93 "and %0, %2; \n\t"
94 M32R_UNLOCK" %0, @%1; \n\t"
95 : "=&r" (tmp)
96 : "r" (a), "r" (~mask)
97 : "memory"
98#ifdef CONFIG_CHIP_M32700_TS1
99 , "r6"
100#endif /* CONFIG_CHIP_M32700_TS1 */
101 );
102 local_irq_restore(flags);
103}
104
105#define smp_mb__before_clear_bit() barrier()
106#define smp_mb__after_clear_bit() barrier()
107
108/**
109 * change_bit - Toggle a bit in memory
110 * @nr: Bit to clear
111 * @addr: Address to start counting from
112 *
113 * change_bit() is atomic and may not be reordered.
114 * Note that @nr may be almost arbitrarily large; this function is not
115 * restricted to acting on a single-word quantity.
116 */
117static __inline__ void change_bit(int nr, volatile void * addr)
118{
119 __u32 mask;
120 volatile __u32 *a = addr;
121 unsigned long flags;
122 unsigned long tmp;
123
124 a += (nr >> 5);
125 mask = (1 << (nr & 0x1F));
126
127 local_irq_save(flags);
128 __asm__ __volatile__ (
129 DCACHE_CLEAR("%0", "r6", "%1")
130 M32R_LOCK" %0, @%1; \n\t"
131 "xor %0, %2; \n\t"
132 M32R_UNLOCK" %0, @%1; \n\t"
133 : "=&r" (tmp)
134 : "r" (a), "r" (mask)
135 : "memory"
136#ifdef CONFIG_CHIP_M32700_TS1
137 , "r6"
138#endif /* CONFIG_CHIP_M32700_TS1 */
139 );
140 local_irq_restore(flags);
141}
142
143/**
144 * test_and_set_bit - Set a bit and return its old value
145 * @nr: Bit to set
146 * @addr: Address to count from
147 *
148 * This operation is atomic and cannot be reordered.
149 * It also implies a memory barrier.
150 */
151static __inline__ int test_and_set_bit(int nr, volatile void * addr)
152{
153 __u32 mask, oldbit;
154 volatile __u32 *a = addr;
155 unsigned long flags;
156 unsigned long tmp;
157
158 a += (nr >> 5);
159 mask = (1 << (nr & 0x1F));
160
161 local_irq_save(flags);
162 __asm__ __volatile__ (
163 DCACHE_CLEAR("%0", "%1", "%2")
164 M32R_LOCK" %0, @%2; \n\t"
165 "mv %1, %0; \n\t"
166 "and %0, %3; \n\t"
167 "or %1, %3; \n\t"
168 M32R_UNLOCK" %1, @%2; \n\t"
169 : "=&r" (oldbit), "=&r" (tmp)
170 : "r" (a), "r" (mask)
171 : "memory"
172 );
173 local_irq_restore(flags);
174
175 return (oldbit != 0);
176}
177
178/**
179 * test_and_clear_bit - Clear a bit and return its old value
180 * @nr: Bit to set
181 * @addr: Address to count from
182 *
183 * This operation is atomic and cannot be reordered.
184 * It also implies a memory barrier.
185 */
186static __inline__ int test_and_clear_bit(int nr, volatile void * addr)
187{
188 __u32 mask, oldbit;
189 volatile __u32 *a = addr;
190 unsigned long flags;
191 unsigned long tmp;
192
193 a += (nr >> 5);
194 mask = (1 << (nr & 0x1F));
195
196 local_irq_save(flags);
197
198 __asm__ __volatile__ (
199 DCACHE_CLEAR("%0", "%1", "%3")
200 M32R_LOCK" %0, @%3; \n\t"
201 "mv %1, %0; \n\t"
202 "and %0, %2; \n\t"
203 "not %2, %2; \n\t"
204 "and %1, %2; \n\t"
205 M32R_UNLOCK" %1, @%3; \n\t"
206 : "=&r" (oldbit), "=&r" (tmp), "+r" (mask)
207 : "r" (a)
208 : "memory"
209 );
210 local_irq_restore(flags);
211
212 return (oldbit != 0);
213}
214
215/**
216 * test_and_change_bit - Change a bit and return its old value
217 * @nr: Bit to set
218 * @addr: Address to count from
219 *
220 * This operation is atomic and cannot be reordered.
221 * It also implies a memory barrier.
222 */
223static __inline__ int test_and_change_bit(int nr, volatile void * addr)
224{
225 __u32 mask, oldbit;
226 volatile __u32 *a = addr;
227 unsigned long flags;
228 unsigned long tmp;
229
230 a += (nr >> 5);
231 mask = (1 << (nr & 0x1F));
232
233 local_irq_save(flags);
234 __asm__ __volatile__ (
235 DCACHE_CLEAR("%0", "%1", "%2")
236 M32R_LOCK" %0, @%2; \n\t"
237 "mv %1, %0; \n\t"
238 "and %0, %3; \n\t"
239 "xor %1, %3; \n\t"
240 M32R_UNLOCK" %1, @%2; \n\t"
241 : "=&r" (oldbit), "=&r" (tmp)
242 : "r" (a), "r" (mask)
243 : "memory"
244 );
245 local_irq_restore(flags);
246
247 return (oldbit != 0);
248}
249
250#include <asm-generic/bitops/non-atomic.h>
251#include <asm-generic/bitops/ffz.h>
252#include <asm-generic/bitops/__ffs.h>
253#include <asm-generic/bitops/fls.h>
254#include <asm-generic/bitops/__fls.h>
255#include <asm-generic/bitops/fls64.h>
256
257#ifdef __KERNEL__
258
259#include <asm-generic/bitops/sched.h>
260#include <asm-generic/bitops/find.h>
261#include <asm-generic/bitops/ffs.h>
262#include <asm-generic/bitops/hweight.h>
263#include <asm-generic/bitops/lock.h>
264
265#endif /* __KERNEL__ */
266
267#ifdef __KERNEL__
268
269#include <asm-generic/bitops/ext2-non-atomic.h>
270#include <asm-generic/bitops/ext2-atomic.h>
271#include <asm-generic/bitops/minix.h>
272
273#endif /* __KERNEL__ */
274
275#endif /* _ASM_M32R_BITOPS_H */
diff --git a/include/asm-m32r/bug.h b/include/asm-m32r/bug.h
deleted file mode 100644
index 4cc0462c15b8..000000000000
--- a/include/asm-m32r/bug.h
+++ /dev/null
@@ -1,4 +0,0 @@
1#ifndef _M32R_BUG_H
2#define _M32R_BUG_H
3#include <asm-generic/bug.h>
4#endif
diff --git a/include/asm-m32r/bugs.h b/include/asm-m32r/bugs.h
deleted file mode 100644
index f77214eff136..000000000000
--- a/include/asm-m32r/bugs.h
+++ /dev/null
@@ -1,19 +0,0 @@
1#ifndef _ASM_M32R_BUGS_H
2#define _ASM_M32R_BUGS_H
3
4/*
5 * This is included by init/main.c to check for architecture-dependent bugs.
6 *
7 * Needs:
8 * void check_bugs(void);
9 */
10#include <asm/processor.h>
11
12static void __init check_bugs(void)
13{
14 extern unsigned long loops_per_jiffy;
15
16 current_cpu_data.loops_per_jiffy = loops_per_jiffy;
17}
18
19#endif /* _ASM_M32R_BUGS_H */
diff --git a/include/asm-m32r/byteorder.h b/include/asm-m32r/byteorder.h
deleted file mode 100644
index 21855d8b028b..000000000000
--- a/include/asm-m32r/byteorder.h
+++ /dev/null
@@ -1,10 +0,0 @@
1#ifndef _ASM_M32R_BYTEORDER_H
2#define _ASM_M32R_BYTEORDER_H
3
4#if defined(__LITTLE_ENDIAN__)
5# include <linux/byteorder/little_endian.h>
6#else
7# include <linux/byteorder/big_endian.h>
8#endif
9
10#endif /* _ASM_M32R_BYTEORDER_H */
diff --git a/include/asm-m32r/cache.h b/include/asm-m32r/cache.h
deleted file mode 100644
index 40b3ee98193d..000000000000
--- a/include/asm-m32r/cache.h
+++ /dev/null
@@ -1,8 +0,0 @@
1#ifndef _ASM_M32R_CACHE_H
2#define _ASM_M32R_CACHE_H
3
4/* L1 cache line size */
5#define L1_CACHE_SHIFT 4
6#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
7
8#endif /* _ASM_M32R_CACHE_H */
diff --git a/include/asm-m32r/cachectl.h b/include/asm-m32r/cachectl.h
deleted file mode 100644
index 2aab8f6fff41..000000000000
--- a/include/asm-m32r/cachectl.h
+++ /dev/null
@@ -1,26 +0,0 @@
1/*
2 * cachectl.h -- defines for M32R cache control system calls
3 *
4 * Copyright (C) 2003 by Kazuhiro Inaoka
5 */
6#ifndef __ASM_M32R_CACHECTL
7#define __ASM_M32R_CACHECTL
8
9/*
10 * Options for cacheflush system call
11 *
12 * cacheflush() is currently fluch_cache_all().
13 */
14#define ICACHE (1<<0) /* flush instruction cache */
15#define DCACHE (1<<1) /* writeback and flush data cache */
16#define BCACHE (ICACHE|DCACHE) /* flush both caches */
17
18/*
19 * Caching modes for the cachectl(2) call
20 *
21 * cachectl(2) is currently not supported and returns ENOSYS.
22 */
23#define CACHEABLE 0 /* make pages cacheable */
24#define UNCACHEABLE 1 /* make pages uncacheable */
25
26#endif /* __ASM_M32R_CACHECTL */
diff --git a/include/asm-m32r/cacheflush.h b/include/asm-m32r/cacheflush.h
deleted file mode 100644
index 78587c958146..000000000000
--- a/include/asm-m32r/cacheflush.h
+++ /dev/null
@@ -1,69 +0,0 @@
1#ifndef _ASM_M32R_CACHEFLUSH_H
2#define _ASM_M32R_CACHEFLUSH_H
3
4#include <linux/mm.h>
5
6extern void _flush_cache_all(void);
7extern void _flush_cache_copyback_all(void);
8
9#if defined(CONFIG_CHIP_M32700) || defined(CONFIG_CHIP_OPSP) || defined(CONFIG_CHIP_M32104)
10#define flush_cache_all() do { } while (0)
11#define flush_cache_mm(mm) do { } while (0)
12#define flush_cache_dup_mm(mm) do { } while (0)
13#define flush_cache_range(vma, start, end) do { } while (0)
14#define flush_cache_page(vma, vmaddr, pfn) do { } while (0)
15#define flush_dcache_page(page) do { } while (0)
16#define flush_dcache_mmap_lock(mapping) do { } while (0)
17#define flush_dcache_mmap_unlock(mapping) do { } while (0)
18#ifndef CONFIG_SMP
19#define flush_icache_range(start, end) _flush_cache_copyback_all()
20#define flush_icache_page(vma,pg) _flush_cache_copyback_all()
21#define flush_icache_user_range(vma,pg,adr,len) _flush_cache_copyback_all()
22#define flush_cache_sigtramp(addr) _flush_cache_copyback_all()
23#else /* CONFIG_SMP */
24extern void smp_flush_cache_all(void);
25#define flush_icache_range(start, end) smp_flush_cache_all()
26#define flush_icache_page(vma,pg) smp_flush_cache_all()
27#define flush_icache_user_range(vma,pg,adr,len) smp_flush_cache_all()
28#define flush_cache_sigtramp(addr) _flush_cache_copyback_all()
29#endif /* CONFIG_SMP */
30#elif defined(CONFIG_CHIP_M32102)
31#define flush_cache_all() do { } while (0)
32#define flush_cache_mm(mm) do { } while (0)
33#define flush_cache_dup_mm(mm) do { } while (0)
34#define flush_cache_range(vma, start, end) do { } while (0)
35#define flush_cache_page(vma, vmaddr, pfn) do { } while (0)
36#define flush_dcache_page(page) do { } while (0)
37#define flush_dcache_mmap_lock(mapping) do { } while (0)
38#define flush_dcache_mmap_unlock(mapping) do { } while (0)
39#define flush_icache_range(start, end) _flush_cache_all()
40#define flush_icache_page(vma,pg) _flush_cache_all()
41#define flush_icache_user_range(vma,pg,adr,len) _flush_cache_all()
42#define flush_cache_sigtramp(addr) _flush_cache_all()
43#else
44#define flush_cache_all() do { } while (0)
45#define flush_cache_mm(mm) do { } while (0)
46#define flush_cache_dup_mm(mm) do { } while (0)
47#define flush_cache_range(vma, start, end) do { } while (0)
48#define flush_cache_page(vma, vmaddr, pfn) do { } while (0)
49#define flush_dcache_page(page) do { } while (0)
50#define flush_dcache_mmap_lock(mapping) do { } while (0)
51#define flush_dcache_mmap_unlock(mapping) do { } while (0)
52#define flush_icache_range(start, end) do { } while (0)
53#define flush_icache_page(vma,pg) do { } while (0)
54#define flush_icache_user_range(vma,pg,adr,len) do { } while (0)
55#define flush_cache_sigtramp(addr) do { } while (0)
56#endif /* CONFIG_CHIP_* */
57
58#define flush_cache_vmap(start, end) do { } while (0)
59#define flush_cache_vunmap(start, end) do { } while (0)
60
61#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
62do { \
63 memcpy(dst, src, len); \
64 flush_icache_user_range(vma, page, vaddr, len); \
65} while (0)
66#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
67 memcpy(dst, src, len)
68
69#endif /* _ASM_M32R_CACHEFLUSH_H */
diff --git a/include/asm-m32r/checksum.h b/include/asm-m32r/checksum.h
deleted file mode 100644
index a7a7c4f44abe..000000000000
--- a/include/asm-m32r/checksum.h
+++ /dev/null
@@ -1,204 +0,0 @@
1#ifdef __KERNEL__
2#ifndef _ASM_M32R_CHECKSUM_H
3#define _ASM_M32R_CHECKSUM_H
4
5/*
6 * include/asm-m32r/checksum.h
7 *
8 * IP/TCP/UDP checksum routines
9 *
10 * This file is subject to the terms and conditions of the GNU General Public
11 * License. See the file "COPYING" in the main directory of this archive
12 * for more details.
13 *
14 * Some code taken from mips and parisc architecture.
15 *
16 * Copyright (C) 2001, 2002 Hiroyuki Kondo, Hirokazu Takata
17 * Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org>
18 */
19
20#include <linux/in6.h>
21
22/*
23 * computes the checksum of a memory block at buff, length len,
24 * and adds in "sum" (32-bit)
25 *
26 * returns a 32-bit number suitable for feeding into itself
27 * or csum_tcpudp_magic
28 *
29 * this function must be called with even lengths, except
30 * for the last fragment, which may be odd
31 *
32 * it's best to have buff aligned on a 32-bit boundary
33 */
34asmlinkage __wsum csum_partial(const void *buff, int len, __wsum sum);
35
36/*
37 * The same as csum_partial, but copies from src while it checksums.
38 *
39 * Here even more important to align src and dst on a 32-bit (or even
40 * better 64-bit) boundary
41 */
42extern __wsum csum_partial_copy_nocheck(const void *src, void *dst,
43 int len, __wsum sum);
44
45/*
46 * This is a new version of the above that records errors it finds in *errp,
47 * but continues and zeros thre rest of the buffer.
48 */
49extern __wsum csum_partial_copy_from_user(const void __user *src, void *dst,
50 int len, __wsum sum,
51 int *err_ptr);
52
53/*
54 * Fold a partial checksum
55 */
56
57static inline __sum16 csum_fold(__wsum sum)
58{
59 unsigned long tmpreg;
60 __asm__(
61 " sll3 %1, %0, #16 \n"
62 " cmp %0, %0 \n"
63 " addx %0, %1 \n"
64 " ldi %1, #0 \n"
65 " srli %0, #16 \n"
66 " addx %0, %1 \n"
67 " xor3 %0, %0, #0x0000ffff \n"
68 : "=r" (sum), "=&r" (tmpreg)
69 : "0" (sum)
70 : "cbit"
71 );
72 return (__force __sum16)sum;
73}
74
75/*
76 * This is a version of ip_compute_csum() optimized for IP headers,
77 * which always checksum on 4 octet boundaries.
78 */
79static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl)
80{
81 unsigned long tmpreg0, tmpreg1;
82 __wsum sum;
83
84 __asm__ __volatile__(
85 " ld %0, @%1+ \n"
86 " addi %2, #-4 \n"
87 "# bgez %2, 2f \n"
88 " cmp %0, %0 \n"
89 " ld %3, @%1+ \n"
90 " ld %4, @%1+ \n"
91 " addx %0, %3 \n"
92 " ld %3, @%1+ \n"
93 " addx %0, %4 \n"
94 " addx %0, %3 \n"
95 " .fillinsn\n"
96 "1: \n"
97 " ld %4, @%1+ \n"
98 " addi %2, #-1 \n"
99 " addx %0, %4 \n"
100 " bgtz %2, 1b \n"
101 "\n"
102 " ldi %3, #0 \n"
103 " addx %0, %3 \n"
104 " .fillinsn\n"
105 "2: \n"
106 /* Since the input registers which are loaded with iph and ihl
107 are modified, we must also specify them as outputs, or gcc
108 will assume they contain their original values. */
109 : "=&r" (sum), "=r" (iph), "=r" (ihl), "=&r" (tmpreg0), "=&r" (tmpreg1)
110 : "1" (iph), "2" (ihl)
111 : "cbit", "memory");
112
113 return csum_fold(sum);
114}
115
116static inline __wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr,
117 unsigned short len,
118 unsigned short proto,
119 __wsum sum)
120{
121#if defined(__LITTLE_ENDIAN)
122 unsigned long len_proto = (proto + len) << 8;
123#else
124 unsigned long len_proto = proto + len;
125#endif
126 unsigned long tmpreg;
127
128 __asm__(
129 " cmp %0, %0 \n"
130 " addx %0, %2 \n"
131 " addx %0, %3 \n"
132 " addx %0, %4 \n"
133 " ldi %1, #0 \n"
134 " addx %0, %1 \n"
135 : "=r" (sum), "=&r" (tmpreg)
136 : "r" (daddr), "r" (saddr), "r" (len_proto), "0" (sum)
137 : "cbit"
138 );
139
140 return sum;
141}
142
143/*
144 * computes the checksum of the TCP/UDP pseudo-header
145 * returns a 16-bit checksum, already complemented
146 */
147static inline __sum16 csum_tcpudp_magic(__be32 saddr, __be32 daddr,
148 unsigned short len,
149 unsigned short proto,
150 __wsum sum)
151{
152 return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum));
153}
154
155/*
156 * this routine is used for miscellaneous IP-like checksums, mainly
157 * in icmp.c
158 */
159
160static inline __sum16 ip_compute_csum(const void *buff, int len)
161{
162 return csum_fold (csum_partial(buff, len, 0));
163}
164
165#define _HAVE_ARCH_IPV6_CSUM
166static inline __sum16 csum_ipv6_magic(const struct in6_addr *saddr,
167 const struct in6_addr *daddr,
168 __u32 len, unsigned short proto,
169 __wsum sum)
170{
171 unsigned long tmpreg0, tmpreg1, tmpreg2, tmpreg3;
172 __asm__(
173 " ld %1, @(%5) \n"
174 " ld %2, @(4,%5) \n"
175 " ld %3, @(8,%5) \n"
176 " ld %4, @(12,%5) \n"
177 " add %0, %1 \n"
178 " addx %0, %2 \n"
179 " addx %0, %3 \n"
180 " addx %0, %4 \n"
181 " ld %1, @(%6) \n"
182 " ld %2, @(4,%6) \n"
183 " ld %3, @(8,%6) \n"
184 " ld %4, @(12,%6) \n"
185 " addx %0, %1 \n"
186 " addx %0, %2 \n"
187 " addx %0, %3 \n"
188 " addx %0, %4 \n"
189 " addx %0, %7 \n"
190 " addx %0, %8 \n"
191 " ldi %1, #0 \n"
192 " addx %0, %1 \n"
193 : "=&r" (sum), "=&r" (tmpreg0), "=&r" (tmpreg1),
194 "=&r" (tmpreg2), "=&r" (tmpreg3)
195 : "r" (saddr), "r" (daddr),
196 "r" (htonl(len)), "r" (htonl(proto)), "0" (sum)
197 : "cbit"
198 );
199
200 return csum_fold(sum);
201}
202
203#endif /* _ASM_M32R_CHECKSUM_H */
204#endif /* __KERNEL__ */
diff --git a/include/asm-m32r/cputime.h b/include/asm-m32r/cputime.h
deleted file mode 100644
index 0a47550df2b7..000000000000
--- a/include/asm-m32r/cputime.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __M32R_CPUTIME_H
2#define __M32R_CPUTIME_H
3
4#include <asm-generic/cputime.h>
5
6#endif /* __M32R_CPUTIME_H */
diff --git a/include/asm-m32r/current.h b/include/asm-m32r/current.h
deleted file mode 100644
index 7859d864f2c2..000000000000
--- a/include/asm-m32r/current.h
+++ /dev/null
@@ -1,15 +0,0 @@
1#ifndef _ASM_M32R_CURRENT_H
2#define _ASM_M32R_CURRENT_H
3
4#include <linux/thread_info.h>
5
6struct task_struct;
7
8static __inline__ struct task_struct *get_current(void)
9{
10 return current_thread_info()->task;
11}
12
13#define current (get_current())
14
15#endif /* _ASM_M32R_CURRENT_H */
diff --git a/include/asm-m32r/delay.h b/include/asm-m32r/delay.h
deleted file mode 100644
index 9dd9e999ea69..000000000000
--- a/include/asm-m32r/delay.h
+++ /dev/null
@@ -1,26 +0,0 @@
1#ifndef _ASM_M32R_DELAY_H
2#define _ASM_M32R_DELAY_H
3
4/*
5 * Copyright (C) 1993 Linus Torvalds
6 *
7 * Delay routines calling functions in arch/m32r/lib/delay.c
8 */
9
10extern void __bad_udelay(void);
11extern void __bad_ndelay(void);
12
13extern void __udelay(unsigned long usecs);
14extern void __ndelay(unsigned long nsecs);
15extern void __const_udelay(unsigned long xloops);
16extern void __delay(unsigned long loops);
17
18#define udelay(n) (__builtin_constant_p(n) ? \
19 ((n) > 20000 ? __bad_udelay() : __const_udelay((n) * 0x10c7ul)) : \
20 __udelay(n))
21
22#define ndelay(n) (__builtin_constant_p(n) ? \
23 ((n) > 20000 ? __bad_ndelay() : __const_udelay((n) * 5ul)) : \
24 __ndelay(n))
25
26#endif /* _ASM_M32R_DELAY_H */
diff --git a/include/asm-m32r/device.h b/include/asm-m32r/device.h
deleted file mode 100644
index d8f9872b0e2d..000000000000
--- a/include/asm-m32r/device.h
+++ /dev/null
@@ -1,7 +0,0 @@
1/*
2 * Arch specific extensions to struct device
3 *
4 * This file is released under the GPLv2
5 */
6#include <asm-generic/device.h>
7
diff --git a/include/asm-m32r/div64.h b/include/asm-m32r/div64.h
deleted file mode 100644
index 6cd978cefb28..000000000000
--- a/include/asm-m32r/div64.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/div64.h>
diff --git a/include/asm-m32r/dma.h b/include/asm-m32r/dma.h
deleted file mode 100644
index 52f6a22dd232..000000000000
--- a/include/asm-m32r/dma.h
+++ /dev/null
@@ -1,12 +0,0 @@
1#ifndef _ASM_M32R_DMA_H
2#define _ASM_M32R_DMA_H
3
4#include <asm/io.h>
5
6/*
7 * The maximum address that we can perform a DMA transfer
8 * to on this platform
9 */
10#define MAX_DMA_ADDRESS (PAGE_OFFSET+0x20000000)
11
12#endif /* _ASM_M32R_DMA_H */
diff --git a/include/asm-m32r/elf.h b/include/asm-m32r/elf.h
deleted file mode 100644
index 0cc34c94bf2b..000000000000
--- a/include/asm-m32r/elf.h
+++ /dev/null
@@ -1,134 +0,0 @@
1#ifndef _ASM_M32R__ELF_H
2#define _ASM_M32R__ELF_H
3
4/*
5 * ELF-specific definitions.
6 *
7 * Copyright (C) 1999-2004, Renesas Technology Corp.
8 * Hirokazu Takata <takata at linux-m32r.org>
9 */
10
11#include <asm/ptrace.h>
12#include <asm/user.h>
13#include <asm/page.h>
14
15/* M32R relocation types */
16#define R_M32R_NONE 0
17#define R_M32R_16 1
18#define R_M32R_32 2
19#define R_M32R_24 3
20#define R_M32R_10_PCREL 4
21#define R_M32R_18_PCREL 5
22#define R_M32R_26_PCREL 6
23#define R_M32R_HI16_ULO 7
24#define R_M32R_HI16_SLO 8
25#define R_M32R_LO16 9
26#define R_M32R_SDA16 10
27#define R_M32R_GNU_VTINHERIT 11
28#define R_M32R_GNU_VTENTRY 12
29
30#define R_M32R_16_RELA 33
31#define R_M32R_32_RELA 34
32#define R_M32R_24_RELA 35
33#define R_M32R_10_PCREL_RELA 36
34#define R_M32R_18_PCREL_RELA 37
35#define R_M32R_26_PCREL_RELA 38
36#define R_M32R_HI16_ULO_RELA 39
37#define R_M32R_HI16_SLO_RELA 40
38#define R_M32R_LO16_RELA 41
39#define R_M32R_SDA16_RELA 42
40#define R_M32R_RELA_GNU_VTINHERIT 43
41#define R_M32R_RELA_GNU_VTENTRY 44
42
43#define R_M32R_GOT24 48
44#define R_M32R_26_PLTREL 49
45#define R_M32R_COPY 50
46#define R_M32R_GLOB_DAT 51
47#define R_M32R_JMP_SLOT 52
48#define R_M32R_RELATIVE 53
49#define R_M32R_GOTOFF 54
50#define R_M32R_GOTPC24 55
51#define R_M32R_GOT16_HI_ULO 56
52#define R_M32R_GOT16_HI_SLO 57
53#define R_M32R_GOT16_LO 58
54#define R_M32R_GOTPC_HI_ULO 59
55#define R_M32R_GOTPC_HI_SLO 60
56#define R_M32R_GOTPC_LO 61
57#define R_M32R_GOTOFF_HI_ULO 62
58#define R_M32R_GOTOFF_HI_SLO 63
59#define R_M32R_GOTOFF_LO 64
60
61#define R_M32R_NUM 256
62
63/*
64 * ELF register definitions..
65 */
66#define ELF_NGREG (sizeof (struct pt_regs) / sizeof(elf_greg_t))
67
68typedef unsigned long elf_greg_t;
69typedef elf_greg_t elf_gregset_t[ELF_NGREG];
70
71/* We have no FP mumumu. */
72typedef double elf_fpreg_t;
73typedef elf_fpreg_t elf_fpregset_t;
74
75/*
76 * This is used to ensure we don't load something for the wrong architecture.
77 */
78#define elf_check_arch(x) \
79 (((x)->e_machine == EM_M32R) || ((x)->e_machine == EM_CYGNUS_M32R))
80
81/*
82 * These are used to set parameters in the core dumps.
83 */
84#define ELF_CLASS ELFCLASS32
85#if defined(__LITTLE_ENDIAN)
86#define ELF_DATA ELFDATA2LSB
87#elif defined(__BIG_ENDIAN)
88#define ELF_DATA ELFDATA2MSB
89#else
90#error no endian defined
91#endif
92#define ELF_ARCH EM_M32R
93
94/* r0 is set by ld.so to a pointer to a function which might be
95 * registered using 'atexit'. This provides a mean for the dynamic
96 * linker to call DT_FINI functions for shared libraries that have
97 * been loaded before the code runs.
98 *
99 * So that we can use the same startup file with static executables,
100 * we start programs with a value of 0 to indicate that there is no
101 * such function.
102 */
103#define ELF_PLAT_INIT(_r, load_addr) (_r)->r0 = 0
104
105#define USE_ELF_CORE_DUMP
106#define ELF_EXEC_PAGESIZE PAGE_SIZE
107
108/*
109 * This is the location that an ET_DYN program is loaded if exec'ed.
110 * Typical use of this is to invoke "./ld.so someprog" to test out a
111 * new version of the loader. We need to make sure that it is out of
112 * the way of the program that it will "exec", and that there is
113 * sufficient room for the brk.
114 */
115#define ELF_ET_DYN_BASE (TASK_SIZE / 3 * 2)
116
117/* regs is struct pt_regs, pr_reg is elf_gregset_t (which is
118 now struct_user_regs, they are different) */
119
120#define ELF_CORE_COPY_REGS(pr_reg, regs) \
121 memcpy((char *)pr_reg, (char *)regs, sizeof (struct pt_regs));
122
123/* This yields a mask that user programs can use to figure out what
124 instruction set this CPU supports. */
125#define ELF_HWCAP (0)
126
127/* This yields a string that ld.so will use to load implementation
128 specific libraries for optimization. This is more specific in
129 intent than poking at uname or /proc/cpuinfo. */
130#define ELF_PLATFORM (NULL)
131
132#define SET_PERSONALITY(ex) set_personality(PER_LINUX)
133
134#endif /* _ASM_M32R__ELF_H */
diff --git a/include/asm-m32r/emergency-restart.h b/include/asm-m32r/emergency-restart.h
deleted file mode 100644
index 108d8c48e42e..000000000000
--- a/include/asm-m32r/emergency-restart.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef _ASM_EMERGENCY_RESTART_H
2#define _ASM_EMERGENCY_RESTART_H
3
4#include <asm-generic/emergency-restart.h>
5
6#endif /* _ASM_EMERGENCY_RESTART_H */
diff --git a/include/asm-m32r/errno.h b/include/asm-m32r/errno.h
deleted file mode 100644
index 777149262aad..000000000000
--- a/include/asm-m32r/errno.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef _ASM_M32R_ERRNO_H
2#define _ASM_M32R_ERRNO_H
3
4#include <asm-generic/errno.h>
5
6#endif /* _ASM_M32R_ERRNO_H */
diff --git a/include/asm-m32r/fb.h b/include/asm-m32r/fb.h
deleted file mode 100644
index d92e99cd8c8a..000000000000
--- a/include/asm-m32r/fb.h
+++ /dev/null
@@ -1,19 +0,0 @@
1#ifndef _ASM_FB_H_
2#define _ASM_FB_H_
3
4#include <linux/fb.h>
5#include <linux/fs.h>
6#include <asm/page.h>
7
8static inline void fb_pgprotect(struct file *file, struct vm_area_struct *vma,
9 unsigned long off)
10{
11 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
12}
13
14static inline int fb_is_primary_device(struct fb_info *info)
15{
16 return 0;
17}
18
19#endif /* _ASM_FB_H_ */
diff --git a/include/asm-m32r/fcntl.h b/include/asm-m32r/fcntl.h
deleted file mode 100644
index 46ab12db5739..000000000000
--- a/include/asm-m32r/fcntl.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/fcntl.h>
diff --git a/include/asm-m32r/flat.h b/include/asm-m32r/flat.h
deleted file mode 100644
index d851cf0c4aa5..000000000000
--- a/include/asm-m32r/flat.h
+++ /dev/null
@@ -1,146 +0,0 @@
1/*
2 * include/asm-m32r/flat.h
3 *
4 * uClinux flat-format executables
5 *
6 * Copyright (C) 2004 Kazuhiro Inaoka
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive for
10 * more details.
11 */
12#ifndef __ASM_M32R_FLAT_H
13#define __ASM_M32R_FLAT_H
14
15#define flat_stack_align(sp) (*sp += (*sp & 3 ? (4 - (*sp & 3)): 0))
16#define flat_argvp_envp_on_stack() 0
17#define flat_old_ram_flag(flags) (flags)
18#define flat_set_persistent(relval, p) 0
19#define flat_reloc_valid(reloc, size) \
20 (((reloc) - textlen_for_m32r_lo16_data) <= (size))
21#define flat_get_addr_from_rp(rp, relval, flags, persistent) \
22 m32r_flat_get_addr_from_rp(rp, relval, (text_len) )
23
24#define flat_put_addr_at_rp(rp, addr, relval) \
25 m32r_flat_put_addr_at_rp(rp, addr, relval)
26
27/* Convert a relocation entry into an address. */
28static inline unsigned long
29flat_get_relocate_addr (unsigned long relval)
30{
31 return relval & 0x00ffffff; /* Mask out top 8-bits */
32}
33
34#define flat_m32r_get_reloc_type(relval) ((relval) >> 24)
35
36#define M32R_SETH_OPCODE 0xd0c00000 /* SETH instruction code */
37
38#define FLAT_M32R_32 0x00 /* 32bits reloc */
39#define FLAT_M32R_24 0x01 /* unsigned 24bits reloc */
40#define FLAT_M32R_16 0x02 /* 16bits reloc */
41#define FLAT_M32R_LO16 0x03 /* signed low 16bits reloc (low()) */
42#define FLAT_M32R_LO16_DATA 0x04 /* signed low 16bits reloc (low())
43 for a symbol in .data section */
44 /* High 16bits of an address used
45 when the lower 16bbits are treated
46 as unsigned.
47 To create SETH instruction only.
48 0x1X: X means a number of register.
49 0x10 - 0x3F are reserved. */
50#define FLAT_M32R_HI16_ULO 0x10 /* reloc for SETH Rn,#high(imm16) */
51 /* High 16bits of an address used
52 when the lower 16bbits are treated
53 as signed.
54 To create SETH instruction only.
55 0x2X: X means a number of register.
56 0x20 - 0x4F are reserved. */
57#define FLAT_M32R_HI16_SLO 0x20 /* reloc for SETH Rn,#shigh(imm16) */
58
59static unsigned long textlen_for_m32r_lo16_data = 0;
60
61static inline unsigned long m32r_flat_get_addr_from_rp (unsigned long *rp,
62 unsigned long relval,
63 unsigned long textlen)
64{
65 unsigned int reloc = flat_m32r_get_reloc_type (relval);
66 textlen_for_m32r_lo16_data = 0;
67 if (reloc & 0xf0) {
68 unsigned long addr = htonl(*rp);
69 switch (reloc & 0xf0)
70 {
71 case FLAT_M32R_HI16_ULO:
72 case FLAT_M32R_HI16_SLO:
73 if (addr == 0) {
74 /* put "seth Rn,#0x0" instead of 0 (addr). */
75 *rp = (M32R_SETH_OPCODE | ((reloc & 0x0f)<<24));
76 }
77 return addr;
78 default:
79 break;
80 }
81 } else {
82 switch (reloc)
83 {
84 case FLAT_M32R_LO16:
85 return htonl(*rp) & 0xFFFF;
86 case FLAT_M32R_LO16_DATA:
87 /* FIXME: The return value will decrease by textlen
88 at m32r_flat_put_addr_at_rp () */
89 textlen_for_m32r_lo16_data = textlen;
90 return (htonl(*rp) & 0xFFFF) + textlen;
91 case FLAT_M32R_16:
92 return htons(*(unsigned short *)rp) & 0xFFFF;
93 case FLAT_M32R_24:
94 return htonl(*rp) & 0xFFFFFF;
95 case FLAT_M32R_32:
96 return htonl(*rp);
97 default:
98 break;
99 }
100 }
101 return ~0; /* bogus value */
102}
103
104static inline void m32r_flat_put_addr_at_rp (unsigned long *rp,
105 unsigned long addr,
106 unsigned long relval)
107{
108 unsigned int reloc = flat_m32r_get_reloc_type (relval);
109 if (reloc & 0xf0) {
110 unsigned long Rn = reloc & 0x0f; /* get a number of register */
111 Rn <<= 24; /* 0x0R000000 */
112 reloc &= 0xf0;
113 switch (reloc)
114 {
115 case FLAT_M32R_HI16_ULO: /* To create SETH Rn,#high(imm16) */
116 *rp = (M32R_SETH_OPCODE | Rn
117 | ((addr >> 16) & 0xFFFF));
118 break;
119 case FLAT_M32R_HI16_SLO: /* To create SETH Rn,#shigh(imm16) */
120 *rp = (M32R_SETH_OPCODE | Rn
121 | (((addr >> 16) + ((addr & 0x8000) ? 1 : 0))
122 & 0xFFFF));
123 break;
124 }
125 } else {
126 switch (reloc) {
127 case FLAT_M32R_LO16_DATA:
128 addr -= textlen_for_m32r_lo16_data;
129 textlen_for_m32r_lo16_data = 0;
130 case FLAT_M32R_LO16:
131 *rp = (htonl(*rp) & 0xFFFF0000) | (addr & 0xFFFF);
132 break;
133 case FLAT_M32R_16:
134 *(unsigned short *)rp = addr & 0xFFFF;
135 break;
136 case FLAT_M32R_24:
137 *rp = (htonl(*rp) & 0xFF000000) | (addr & 0xFFFFFF);
138 break;
139 case FLAT_M32R_32:
140 *rp = addr;
141 break;
142 }
143 }
144}
145
146#endif /* __ASM_M32R_FLAT_H */
diff --git a/include/asm-m32r/ftrace.h b/include/asm-m32r/ftrace.h
deleted file mode 100644
index 40a8c178f10d..000000000000
--- a/include/asm-m32r/ftrace.h
+++ /dev/null
@@ -1 +0,0 @@
1/* empty */
diff --git a/include/asm-m32r/futex.h b/include/asm-m32r/futex.h
deleted file mode 100644
index 6a332a9f099c..000000000000
--- a/include/asm-m32r/futex.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef _ASM_FUTEX_H
2#define _ASM_FUTEX_H
3
4#include <asm-generic/futex.h>
5
6#endif
diff --git a/include/asm-m32r/hardirq.h b/include/asm-m32r/hardirq.h
deleted file mode 100644
index cb8aa762f235..000000000000
--- a/include/asm-m32r/hardirq.h
+++ /dev/null
@@ -1,36 +0,0 @@
1#ifdef __KERNEL__
2#ifndef __ASM_HARDIRQ_H
3#define __ASM_HARDIRQ_H
4
5#include <linux/threads.h>
6#include <linux/irq.h>
7
8typedef struct {
9 unsigned int __softirq_pending;
10} ____cacheline_aligned irq_cpustat_t;
11
12#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
13
14#if NR_IRQS > 256
15#define HARDIRQ_BITS 9
16#else
17#define HARDIRQ_BITS 8
18#endif
19
20/*
21 * The hardirq mask has to be large enough to have
22 * space for potentially all IRQ sources in the system
23 * nesting on a single CPU:
24 */
25#if (1 << HARDIRQ_BITS) < NR_IRQS
26# error HARDIRQ_BITS is too low!
27#endif
28
29static inline void ack_bad_irq(int irq)
30{
31 printk(KERN_CRIT "unexpected IRQ trap at vector %02x\n", irq);
32 BUG();
33}
34
35#endif /* __ASM_HARDIRQ_H */
36#endif /* __KERNEL__ */
diff --git a/include/asm-m32r/hw_irq.h b/include/asm-m32r/hw_irq.h
deleted file mode 100644
index 7138537cda03..000000000000
--- a/include/asm-m32r/hw_irq.h
+++ /dev/null
@@ -1,4 +0,0 @@
1#ifndef _ASM_M32R_HW_IRQ_H
2#define _ASM_M32R_HW_IRQ_H
3
4#endif /* _ASM_M32R_HW_IRQ_H */
diff --git a/include/asm-m32r/io.h b/include/asm-m32r/io.h
deleted file mode 100644
index d06933bd6318..000000000000
--- a/include/asm-m32r/io.h
+++ /dev/null
@@ -1,200 +0,0 @@
1#ifndef _ASM_M32R_IO_H
2#define _ASM_M32R_IO_H
3
4#include <linux/string.h>
5#include <linux/compiler.h>
6#include <asm/page.h> /* __va */
7
8#ifdef __KERNEL__
9
10#define IO_SPACE_LIMIT 0xFFFFFFFF
11
12/**
13 * virt_to_phys - map virtual addresses to physical
14 * @address: address to remap
15 *
16 * The returned physical address is the physical (CPU) mapping for
17 * the memory address given. It is only valid to use this function on
18 * addresses directly mapped or allocated via kmalloc.
19 *
20 * This function does not give bus mappings for DMA transfers. In
21 * almost all conceivable cases a device driver should not be using
22 * this function
23 */
24
25static inline unsigned long virt_to_phys(volatile void * address)
26{
27 return __pa(address);
28}
29
30/**
31 * phys_to_virt - map physical address to virtual
32 * @address: address to remap
33 *
34 * The returned virtual address is a current CPU mapping for
35 * the memory address given. It is only valid to use this function on
36 * addresses that have a kernel mapping
37 *
38 * This function does not handle bus mappings for DMA transfers. In
39 * almost all conceivable cases a device driver should not be using
40 * this function
41 */
42
43static inline void *phys_to_virt(unsigned long address)
44{
45 return __va(address);
46}
47
48extern void __iomem *
49__ioremap(unsigned long offset, unsigned long size, unsigned long flags);
50
51/**
52 * ioremap - map bus memory into CPU space
53 * @offset: bus address of the memory
54 * @size: size of the resource to map
55 *
56 * ioremap performs a platform specific sequence of operations to
57 * make bus memory CPU accessible via the readb/readw/readl/writeb/
58 * writew/writel functions and the other mmio helpers. The returned
59 * address is not guaranteed to be usable directly as a virtual
60 * address.
61 */
62
63static inline void __iomem *ioremap(unsigned long offset, unsigned long size)
64{
65 return __ioremap(offset, size, 0);
66}
67
68extern void iounmap(volatile void __iomem *addr);
69#define ioremap_nocache(off,size) ioremap(off,size)
70
71/*
72 * IO bus memory addresses are also 1:1 with the physical address
73 */
74#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT)
75#define page_to_bus page_to_phys
76#define virt_to_bus virt_to_phys
77
78extern unsigned char _inb(unsigned long);
79extern unsigned short _inw(unsigned long);
80extern unsigned long _inl(unsigned long);
81extern unsigned char _inb_p(unsigned long);
82extern unsigned short _inw_p(unsigned long);
83extern unsigned long _inl_p(unsigned long);
84extern void _outb(unsigned char, unsigned long);
85extern void _outw(unsigned short, unsigned long);
86extern void _outl(unsigned long, unsigned long);
87extern void _outb_p(unsigned char, unsigned long);
88extern void _outw_p(unsigned short, unsigned long);
89extern void _outl_p(unsigned long, unsigned long);
90extern void _insb(unsigned int, void *, unsigned long);
91extern void _insw(unsigned int, void *, unsigned long);
92extern void _insl(unsigned int, void *, unsigned long);
93extern void _outsb(unsigned int, const void *, unsigned long);
94extern void _outsw(unsigned int, const void *, unsigned long);
95extern void _outsl(unsigned int, const void *, unsigned long);
96
97static inline unsigned char _readb(unsigned long addr)
98{
99 return *(volatile unsigned char __force *)addr;
100}
101
102static inline unsigned short _readw(unsigned long addr)
103{
104 return *(volatile unsigned short __force *)addr;
105}
106
107static inline unsigned long _readl(unsigned long addr)
108{
109 return *(volatile unsigned long __force *)addr;
110}
111
112static inline void _writeb(unsigned char b, unsigned long addr)
113{
114 *(volatile unsigned char __force *)addr = b;
115}
116
117static inline void _writew(unsigned short w, unsigned long addr)
118{
119 *(volatile unsigned short __force *)addr = w;
120}
121
122static inline void _writel(unsigned long l, unsigned long addr)
123{
124 *(volatile unsigned long __force *)addr = l;
125}
126
127#define inb _inb
128#define inw _inw
129#define inl _inl
130#define outb _outb
131#define outw _outw
132#define outl _outl
133
134#define inb_p _inb_p
135#define inw_p _inw_p
136#define inl_p _inl_p
137#define outb_p _outb_p
138#define outw_p _outw_p
139#define outl_p _outl_p
140
141#define insb _insb
142#define insw _insw
143#define insl _insl
144#define outsb _outsb
145#define outsw _outsw
146#define outsl _outsl
147
148#define readb(addr) _readb((unsigned long)(addr))
149#define readw(addr) _readw((unsigned long)(addr))
150#define readl(addr) _readl((unsigned long)(addr))
151#define __raw_readb readb
152#define __raw_readw readw
153#define __raw_readl readl
154#define readb_relaxed readb
155#define readw_relaxed readw
156#define readl_relaxed readl
157
158#define writeb(val, addr) _writeb((val), (unsigned long)(addr))
159#define writew(val, addr) _writew((val), (unsigned long)(addr))
160#define writel(val, addr) _writel((val), (unsigned long)(addr))
161#define __raw_writeb writeb
162#define __raw_writew writew
163#define __raw_writel writel
164
165#define mmiowb()
166
167#define flush_write_buffers() do { } while (0) /* M32R_FIXME */
168
169static inline void
170memset_io(volatile void __iomem *addr, unsigned char val, int count)
171{
172 memset((void __force *) addr, val, count);
173}
174
175static inline void
176memcpy_fromio(void *dst, volatile void __iomem *src, int count)
177{
178 memcpy(dst, (void __force *) src, count);
179}
180
181static inline void
182memcpy_toio(volatile void __iomem *dst, const void *src, int count)
183{
184 memcpy((void __force *) dst, src, count);
185}
186
187/*
188 * Convert a physical pointer to a virtual kernel pointer for /dev/mem
189 * access
190 */
191#define xlate_dev_mem_ptr(p) __va(p)
192
193/*
194 * Convert a virtual cached pointer to an uncached pointer
195 */
196#define xlate_dev_kmem_ptr(p) p
197
198#endif /* __KERNEL__ */
199
200#endif /* _ASM_M32R_IO_H */
diff --git a/include/asm-m32r/ioctl.h b/include/asm-m32r/ioctl.h
deleted file mode 100644
index b279fe06dfe5..000000000000
--- a/include/asm-m32r/ioctl.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/ioctl.h>
diff --git a/include/asm-m32r/ioctls.h b/include/asm-m32r/ioctls.h
deleted file mode 100644
index b9f54bb5d7cf..000000000000
--- a/include/asm-m32r/ioctls.h
+++ /dev/null
@@ -1,87 +0,0 @@
1#ifndef __ARCH_M32R_IOCTLS_H__
2#define __ARCH_M32R_IOCTLS_H__
3
4#include <asm/ioctl.h>
5
6/* 0x54 is just a magic number to make these relatively unique ('T') */
7
8#define TCGETS 0x5401
9#define TCSETS 0x5402 /* Clashes with SNDCTL_TMR_START sound ioctl */
10#define TCSETSW 0x5403
11#define TCSETSF 0x5404
12#define TCGETA 0x5405
13#define TCSETA 0x5406
14#define TCSETAW 0x5407
15#define TCSETAF 0x5408
16#define TCSBRK 0x5409
17#define TCXONC 0x540A
18#define TCFLSH 0x540B
19#define TIOCEXCL 0x540C
20#define TIOCNXCL 0x540D
21#define TIOCSCTTY 0x540E
22#define TIOCGPGRP 0x540F
23#define TIOCSPGRP 0x5410
24#define TIOCOUTQ 0x5411
25#define TIOCSTI 0x5412
26#define TIOCGWINSZ 0x5413
27#define TIOCSWINSZ 0x5414
28#define TIOCMGET 0x5415
29#define TIOCMBIS 0x5416
30#define TIOCMBIC 0x5417
31#define TIOCMSET 0x5418
32#define TIOCGSOFTCAR 0x5419
33#define TIOCSSOFTCAR 0x541A
34#define FIONREAD 0x541B
35#define TIOCINQ FIONREAD
36#define TIOCLINUX 0x541C
37#define TIOCCONS 0x541D
38#define TIOCGSERIAL 0x541E
39#define TIOCSSERIAL 0x541F
40#define TIOCPKT 0x5420
41#define FIONBIO 0x5421
42#define TIOCNOTTY 0x5422
43#define TIOCSETD 0x5423
44#define TIOCGETD 0x5424
45#define TCSBRKP 0x5425 /* Needed for POSIX tcsendbreak() */
46/* #define TIOCTTYGSTRUCT 0x5426 - Former debugging-only ioctl */
47#define TIOCSBRK 0x5427 /* BSD compatibility */
48#define TIOCCBRK 0x5428 /* BSD compatibility */
49#define TIOCGSID 0x5429 /* Return the session ID of FD */
50#define TCGETS2 _IOR('T',0x2A, struct termios2)
51#define TCSETS2 _IOW('T',0x2B, struct termios2)
52#define TCSETSW2 _IOW('T',0x2C, struct termios2)
53#define TCSETSF2 _IOW('T',0x2D, struct termios2)
54#define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */
55#define TIOCSPTLCK _IOW('T',0x31, int) /* Lock/unlock Pty */
56
57#define FIONCLEX 0x5450
58#define FIOCLEX 0x5451
59#define FIOASYNC 0x5452
60#define TIOCSERCONFIG 0x5453
61#define TIOCSERGWILD 0x5454
62#define TIOCSERSWILD 0x5455
63#define TIOCGLCKTRMIOS 0x5456
64#define TIOCSLCKTRMIOS 0x5457
65#define TIOCSERGSTRUCT 0x5458 /* For debugging only */
66#define TIOCSERGETLSR 0x5459 /* Get line status register */
67#define TIOCSERGETMULTI 0x545A /* Get multiport config */
68#define TIOCSERSETMULTI 0x545B /* Set multiport config */
69
70#define TIOCMIWAIT 0x545C /* wait for a change on serial input line(s) */
71#define TIOCGICOUNT 0x545D /* read serial port inline interrupt counts */
72#define TIOCGHAYESESP 0x545E /* Get Hayes ESP configuration */
73#define TIOCSHAYESESP 0x545F /* Set Hayes ESP configuration */
74#define FIOQSIZE 0x5460
75
76/* Used for packet mode */
77#define TIOCPKT_DATA 0
78#define TIOCPKT_FLUSHREAD 1
79#define TIOCPKT_FLUSHWRITE 2
80#define TIOCPKT_STOP 4
81#define TIOCPKT_START 8
82#define TIOCPKT_NOSTOP 16
83#define TIOCPKT_DOSTOP 32
84
85#define TIOCSER_TEMT 0x01 /* Transmitter physically empty */
86
87#endif /* __ARCH_M32R_IOCTLS_H__ */
diff --git a/include/asm-m32r/ipcbuf.h b/include/asm-m32r/ipcbuf.h
deleted file mode 100644
index 8d2d7c8ffdb0..000000000000
--- a/include/asm-m32r/ipcbuf.h
+++ /dev/null
@@ -1,29 +0,0 @@
1#ifndef _ASM_M32R_IPCBUF_H
2#define _ASM_M32R_IPCBUF_H
3
4/*
5 * The ipc64_perm structure for m32r architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 32-bit mode_t and seq
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct ipc64_perm
15{
16 __kernel_key_t key;
17 __kernel_uid32_t uid;
18 __kernel_gid32_t gid;
19 __kernel_uid32_t cuid;
20 __kernel_gid32_t cgid;
21 __kernel_mode_t mode;
22 unsigned short __pad1;
23 unsigned short seq;
24 unsigned short __pad2;
25 unsigned long __unused1;
26 unsigned long __unused2;
27};
28
29#endif /* _ASM_M32R_IPCBUF_H */
diff --git a/include/asm-m32r/irq.h b/include/asm-m32r/irq.h
deleted file mode 100644
index 242028b4d86a..000000000000
--- a/include/asm-m32r/irq.h
+++ /dev/null
@@ -1,90 +0,0 @@
1#ifdef __KERNEL__
2#ifndef _ASM_M32R_IRQ_H
3#define _ASM_M32R_IRQ_H
4
5
6#if defined(CONFIG_PLAT_USRV)
7/*
8 * IRQ definitions for M32700UT
9 * M32700 Chip: 64 interrupts
10 * ICU of M32700UT-on-board PLD: 32 interrupts cascaded to INT1# chip pin
11 */
12#define M32700UT_NUM_CPU_IRQ (64)
13#define M32700UT_NUM_PLD_IRQ (32)
14#define M32700UT_IRQ_BASE 0
15#define M32700UT_CPU_IRQ_BASE M32700UT_IRQ_BASE
16#define M32700UT_PLD_IRQ_BASE (M32700UT_CPU_IRQ_BASE + M32700UT_NUM_CPU_IRQ)
17
18#define NR_IRQS (M32700UT_NUM_CPU_IRQ + M32700UT_NUM_PLD_IRQ)
19#elif defined(CONFIG_PLAT_M32700UT)
20/*
21 * IRQ definitions for M32700UT(Rev.C) + M32R-LAN
22 * M32700 Chip: 64 interrupts
23 * ICU of M32700UT-on-board PLD: 32 interrupts cascaded to INT1# chip pin
24 * ICU of M32R-LCD-on-board PLD: 32 interrupts cascaded to INT2# chip pin
25 * ICU of M32R-LAN-on-board PLD: 32 interrupts cascaded to INT0# chip pin
26 */
27#define M32700UT_NUM_CPU_IRQ (64)
28#define M32700UT_NUM_PLD_IRQ (32)
29#define M32700UT_NUM_LCD_PLD_IRQ (32)
30#define M32700UT_NUM_LAN_PLD_IRQ (32)
31#define M32700UT_IRQ_BASE 0
32#define M32700UT_CPU_IRQ_BASE (M32700UT_IRQ_BASE)
33#define M32700UT_PLD_IRQ_BASE \
34 (M32700UT_CPU_IRQ_BASE + M32700UT_NUM_CPU_IRQ)
35#define M32700UT_LCD_PLD_IRQ_BASE \
36 (M32700UT_PLD_IRQ_BASE + M32700UT_NUM_PLD_IRQ)
37#define M32700UT_LAN_PLD_IRQ_BASE \
38 (M32700UT_LCD_PLD_IRQ_BASE + M32700UT_NUM_LCD_PLD_IRQ)
39
40#define NR_IRQS \
41 (M32700UT_NUM_CPU_IRQ + M32700UT_NUM_PLD_IRQ \
42 + M32700UT_NUM_LCD_PLD_IRQ + M32700UT_NUM_LAN_PLD_IRQ)
43#elif defined(CONFIG_PLAT_OPSPUT)
44/*
45 * IRQ definitions for OPSPUT + M32R-LAN
46 * OPSP Chip: 64 interrupts
47 * ICU of OPSPUT-on-board PLD: 32 interrupts cascaded to INT1# chip pin
48 * ICU of M32R-LCD-on-board PLD: 32 interrupts cascaded to INT2# chip pin
49 * ICU of M32R-LAN-on-board PLD: 32 interrupts cascaded to INT0# chip pin
50 */
51#define OPSPUT_NUM_CPU_IRQ (64)
52#define OPSPUT_NUM_PLD_IRQ (32)
53#define OPSPUT_NUM_LCD_PLD_IRQ (32)
54#define OPSPUT_NUM_LAN_PLD_IRQ (32)
55#define OPSPUT_IRQ_BASE 0
56#define OPSPUT_CPU_IRQ_BASE (OPSPUT_IRQ_BASE)
57#define OPSPUT_PLD_IRQ_BASE \
58 (OPSPUT_CPU_IRQ_BASE + OPSPUT_NUM_CPU_IRQ)
59#define OPSPUT_LCD_PLD_IRQ_BASE \
60 (OPSPUT_PLD_IRQ_BASE + OPSPUT_NUM_PLD_IRQ)
61#define OPSPUT_LAN_PLD_IRQ_BASE \
62 (OPSPUT_LCD_PLD_IRQ_BASE + OPSPUT_NUM_LCD_PLD_IRQ)
63
64#define NR_IRQS \
65 (OPSPUT_NUM_CPU_IRQ + OPSPUT_NUM_PLD_IRQ \
66 + OPSPUT_NUM_LCD_PLD_IRQ + OPSPUT_NUM_LAN_PLD_IRQ)
67
68#elif defined(CONFIG_PLAT_M32104UT)
69/*
70 * IRQ definitions for M32104UT
71 * M32104 Chip: 64 interrupts
72 * ICU of M32104UT-on-board PLD: 32 interrupts cascaded to INT1# chip pin
73 */
74#define M32104UT_NUM_CPU_IRQ (64)
75#define M32104UT_NUM_PLD_IRQ (32)
76#define M32104UT_IRQ_BASE 0
77#define M32104UT_CPU_IRQ_BASE M32104UT_IRQ_BASE
78#define M32104UT_PLD_IRQ_BASE (M32104UT_CPU_IRQ_BASE + M32104UT_NUM_CPU_IRQ)
79
80#define NR_IRQS \
81 (M32104UT_NUM_CPU_IRQ + M32104UT_NUM_PLD_IRQ)
82
83#else
84#define NR_IRQS 64
85#endif
86
87#define irq_canonicalize(irq) (irq)
88
89#endif /* _ASM_M32R_IRQ_H */
90#endif /* __KERNEL__ */
diff --git a/include/asm-m32r/irq_regs.h b/include/asm-m32r/irq_regs.h
deleted file mode 100644
index 3dd9c0b70270..000000000000
--- a/include/asm-m32r/irq_regs.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/irq_regs.h>
diff --git a/include/asm-m32r/kdebug.h b/include/asm-m32r/kdebug.h
deleted file mode 100644
index 6ece1b037665..000000000000
--- a/include/asm-m32r/kdebug.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/kdebug.h>
diff --git a/include/asm-m32r/kmap_types.h b/include/asm-m32r/kmap_types.h
deleted file mode 100644
index fa94dc6410ea..000000000000
--- a/include/asm-m32r/kmap_types.h
+++ /dev/null
@@ -1,29 +0,0 @@
1#ifndef __M32R_KMAP_TYPES_H
2#define __M32R_KMAP_TYPES_H
3
4#ifdef CONFIG_DEBUG_HIGHMEM
5# define D(n) __KM_FENCE_##n ,
6#else
7# define D(n)
8#endif
9
10enum km_type {
11D(0) KM_BOUNCE_READ,
12D(1) KM_SKB_SUNRPC_DATA,
13D(2) KM_SKB_DATA_SOFTIRQ,
14D(3) KM_USER0,
15D(4) KM_USER1,
16D(5) KM_BIO_SRC_IRQ,
17D(6) KM_BIO_DST_IRQ,
18D(7) KM_PTE0,
19D(8) KM_PTE1,
20D(9) KM_IRQ0,
21D(10) KM_IRQ1,
22D(11) KM_SOFTIRQ0,
23D(12) KM_SOFTIRQ1,
24D(13) KM_TYPE_NR
25};
26
27#undef D
28
29#endif /* __M32R_KMAP_TYPES_H */
diff --git a/include/asm-m32r/linkage.h b/include/asm-m32r/linkage.h
deleted file mode 100644
index a9fb151cf648..000000000000
--- a/include/asm-m32r/linkage.h
+++ /dev/null
@@ -1,7 +0,0 @@
1#ifndef __ASM_LINKAGE_H
2#define __ASM_LINKAGE_H
3
4#define __ALIGN .balign 4
5#define __ALIGN_STR ".balign 4"
6
7#endif /* __ASM_LINKAGE_H */
diff --git a/include/asm-m32r/local.h b/include/asm-m32r/local.h
deleted file mode 100644
index 22256d138630..000000000000
--- a/include/asm-m32r/local.h
+++ /dev/null
@@ -1,366 +0,0 @@
1#ifndef __M32R_LOCAL_H
2#define __M32R_LOCAL_H
3
4/*
5 * linux/include/asm-m32r/local.h
6 *
7 * M32R version:
8 * Copyright (C) 2001, 2002 Hitoshi Yamamoto
9 * Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org>
10 * Copyright (C) 2007 Mathieu Desnoyers <mathieu.desnoyers@polymtl.ca>
11 */
12
13#include <linux/percpu.h>
14#include <asm/assembler.h>
15#include <asm/system.h>
16#include <asm/local.h>
17
18/*
19 * Atomic operations that C can't guarantee us. Useful for
20 * resource counting etc..
21 */
22
23/*
24 * Make sure gcc doesn't try to be clever and move things around
25 * on us. We need to use _exactly_ the address the user gave us,
26 * not some alias that contains the same information.
27 */
28typedef struct { volatile int counter; } local_t;
29
30#define LOCAL_INIT(i) { (i) }
31
32/**
33 * local_read - read local variable
34 * @l: pointer of type local_t
35 *
36 * Atomically reads the value of @l.
37 */
38#define local_read(l) ((l)->counter)
39
40/**
41 * local_set - set local variable
42 * @l: pointer of type local_t
43 * @i: required value
44 *
45 * Atomically sets the value of @l to @i.
46 */
47#define local_set(l, i) (((l)->counter) = (i))
48
49/**
50 * local_add_return - add long to local variable and return it
51 * @i: long value to add
52 * @l: pointer of type local_t
53 *
54 * Atomically adds @i to @l and return (@i + @l).
55 */
56static inline long local_add_return(long i, local_t *l)
57{
58 unsigned long flags;
59 long result;
60
61 local_irq_save(flags);
62 __asm__ __volatile__ (
63 "# local_add_return \n\t"
64 DCACHE_CLEAR("%0", "r4", "%1")
65 "ld %0, @%1; \n\t"
66 "add %0, %2; \n\t"
67 "st %0, @%1; \n\t"
68 : "=&r" (result)
69 : "r" (&l->counter), "r" (i)
70 : "memory"
71#ifdef CONFIG_CHIP_M32700_TS1
72 , "r4"
73#endif /* CONFIG_CHIP_M32700_TS1 */
74 );
75 local_irq_restore(flags);
76
77 return result;
78}
79
80/**
81 * local_sub_return - subtract long from local variable and return it
82 * @i: long value to subtract
83 * @l: pointer of type local_t
84 *
85 * Atomically subtracts @i from @l and return (@l - @i).
86 */
87static inline long local_sub_return(long i, local_t *l)
88{
89 unsigned long flags;
90 long result;
91
92 local_irq_save(flags);
93 __asm__ __volatile__ (
94 "# local_sub_return \n\t"
95 DCACHE_CLEAR("%0", "r4", "%1")
96 "ld %0, @%1; \n\t"
97 "sub %0, %2; \n\t"
98 "st %0, @%1; \n\t"
99 : "=&r" (result)
100 : "r" (&l->counter), "r" (i)
101 : "memory"
102#ifdef CONFIG_CHIP_M32700_TS1
103 , "r4"
104#endif /* CONFIG_CHIP_M32700_TS1 */
105 );
106 local_irq_restore(flags);
107
108 return result;
109}
110
111/**
112 * local_add - add long to local variable
113 * @i: long value to add
114 * @l: pointer of type local_t
115 *
116 * Atomically adds @i to @l.
117 */
118#define local_add(i, l) ((void) local_add_return((i), (l)))
119
120/**
121 * local_sub - subtract the local variable
122 * @i: long value to subtract
123 * @l: pointer of type local_t
124 *
125 * Atomically subtracts @i from @l.
126 */
127#define local_sub(i, l) ((void) local_sub_return((i), (l)))
128
129/**
130 * local_sub_and_test - subtract value from variable and test result
131 * @i: integer value to subtract
132 * @l: pointer of type local_t
133 *
134 * Atomically subtracts @i from @l and returns
135 * true if the result is zero, or false for all
136 * other cases.
137 */
138#define local_sub_and_test(i, l) (local_sub_return((i), (l)) == 0)
139
140/**
141 * local_inc_return - increment local variable and return it
142 * @l: pointer of type local_t
143 *
144 * Atomically increments @l by 1 and returns the result.
145 */
146static inline long local_inc_return(local_t *l)
147{
148 unsigned long flags;
149 long result;
150
151 local_irq_save(flags);
152 __asm__ __volatile__ (
153 "# local_inc_return \n\t"
154 DCACHE_CLEAR("%0", "r4", "%1")
155 "ld %0, @%1; \n\t"
156 "addi %0, #1; \n\t"
157 "st %0, @%1; \n\t"
158 : "=&r" (result)
159 : "r" (&l->counter)
160 : "memory"
161#ifdef CONFIG_CHIP_M32700_TS1
162 , "r4"
163#endif /* CONFIG_CHIP_M32700_TS1 */
164 );
165 local_irq_restore(flags);
166
167 return result;
168}
169
170/**
171 * local_dec_return - decrement local variable and return it
172 * @l: pointer of type local_t
173 *
174 * Atomically decrements @l by 1 and returns the result.
175 */
176static inline long local_dec_return(local_t *l)
177{
178 unsigned long flags;
179 long result;
180
181 local_irq_save(flags);
182 __asm__ __volatile__ (
183 "# local_dec_return \n\t"
184 DCACHE_CLEAR("%0", "r4", "%1")
185 "ld %0, @%1; \n\t"
186 "addi %0, #-1; \n\t"
187 "st %0, @%1; \n\t"
188 : "=&r" (result)
189 : "r" (&l->counter)
190 : "memory"
191#ifdef CONFIG_CHIP_M32700_TS1
192 , "r4"
193#endif /* CONFIG_CHIP_M32700_TS1 */
194 );
195 local_irq_restore(flags);
196
197 return result;
198}
199
200/**
201 * local_inc - increment local variable
202 * @l: pointer of type local_t
203 *
204 * Atomically increments @l by 1.
205 */
206#define local_inc(l) ((void)local_inc_return(l))
207
208/**
209 * local_dec - decrement local variable
210 * @l: pointer of type local_t
211 *
212 * Atomically decrements @l by 1.
213 */
214#define local_dec(l) ((void)local_dec_return(l))
215
216/**
217 * local_inc_and_test - increment and test
218 * @l: pointer of type local_t
219 *
220 * Atomically increments @l by 1
221 * and returns true if the result is zero, or false for all
222 * other cases.
223 */
224#define local_inc_and_test(l) (local_inc_return(l) == 0)
225
226/**
227 * local_dec_and_test - decrement and test
228 * @l: pointer of type local_t
229 *
230 * Atomically decrements @l by 1 and
231 * returns true if the result is 0, or false for all
232 * other cases.
233 */
234#define local_dec_and_test(l) (local_dec_return(l) == 0)
235
236/**
237 * local_add_negative - add and test if negative
238 * @l: pointer of type local_t
239 * @i: integer value to add
240 *
241 * Atomically adds @i to @l and returns true
242 * if the result is negative, or false when
243 * result is greater than or equal to zero.
244 */
245#define local_add_negative(i, l) (local_add_return((i), (l)) < 0)
246
247#define local_cmpxchg(l, o, n) (cmpxchg_local(&((l)->counter), (o), (n)))
248#define local_xchg(v, new) (xchg_local(&((l)->counter), new))
249
250/**
251 * local_add_unless - add unless the number is a given value
252 * @l: pointer of type local_t
253 * @a: the amount to add to l...
254 * @u: ...unless l is equal to u.
255 *
256 * Atomically adds @a to @l, so long as it was not @u.
257 * Returns non-zero if @l was not @u, and zero otherwise.
258 */
259static inline int local_add_unless(local_t *l, long a, long u)
260{
261 long c, old;
262 c = local_read(l);
263 for (;;) {
264 if (unlikely(c == (u)))
265 break;
266 old = local_cmpxchg((l), c, c + (a));
267 if (likely(old == c))
268 break;
269 c = old;
270 }
271 return c != (u);
272}
273
274#define local_inc_not_zero(l) local_add_unless((l), 1, 0)
275
276static inline void local_clear_mask(unsigned long mask, local_t *addr)
277{
278 unsigned long flags;
279 unsigned long tmp;
280
281 local_irq_save(flags);
282 __asm__ __volatile__ (
283 "# local_clear_mask \n\t"
284 DCACHE_CLEAR("%0", "r5", "%1")
285 "ld %0, @%1; \n\t"
286 "and %0, %2; \n\t"
287 "st %0, @%1; \n\t"
288 : "=&r" (tmp)
289 : "r" (addr), "r" (~mask)
290 : "memory"
291#ifdef CONFIG_CHIP_M32700_TS1
292 , "r5"
293#endif /* CONFIG_CHIP_M32700_TS1 */
294 );
295 local_irq_restore(flags);
296}
297
298static inline void local_set_mask(unsigned long mask, local_t *addr)
299{
300 unsigned long flags;
301 unsigned long tmp;
302
303 local_irq_save(flags);
304 __asm__ __volatile__ (
305 "# local_set_mask \n\t"
306 DCACHE_CLEAR("%0", "r5", "%1")
307 "ld %0, @%1; \n\t"
308 "or %0, %2; \n\t"
309 "st %0, @%1; \n\t"
310 : "=&r" (tmp)
311 : "r" (addr), "r" (mask)
312 : "memory"
313#ifdef CONFIG_CHIP_M32700_TS1
314 , "r5"
315#endif /* CONFIG_CHIP_M32700_TS1 */
316 );
317 local_irq_restore(flags);
318}
319
320/* Atomic operations are already serializing on m32r */
321#define smp_mb__before_local_dec() barrier()
322#define smp_mb__after_local_dec() barrier()
323#define smp_mb__before_local_inc() barrier()
324#define smp_mb__after_local_inc() barrier()
325
326/* Use these for per-cpu local_t variables: on some archs they are
327 * much more efficient than these naive implementations. Note they take
328 * a variable, not an address.
329 */
330
331#define __local_inc(l) ((l)->a.counter++)
332#define __local_dec(l) ((l)->a.counter++)
333#define __local_add(i, l) ((l)->a.counter += (i))
334#define __local_sub(i, l) ((l)->a.counter -= (i))
335
336/* Use these for per-cpu local_t variables: on some archs they are
337 * much more efficient than these naive implementations. Note they take
338 * a variable, not an address.
339 */
340
341/* Need to disable preemption for the cpu local counters otherwise we could
342 still access a variable of a previous CPU in a non local way. */
343#define cpu_local_wrap_v(l) \
344 ({ local_t res__; \
345 preempt_disable(); \
346 res__ = (l); \
347 preempt_enable(); \
348 res__; })
349#define cpu_local_wrap(l) \
350 ({ preempt_disable(); \
351 l; \
352 preempt_enable(); }) \
353
354#define cpu_local_read(l) cpu_local_wrap_v(local_read(&__get_cpu_var(l)))
355#define cpu_local_set(l, i) cpu_local_wrap(local_set(&__get_cpu_var(l), (i)))
356#define cpu_local_inc(l) cpu_local_wrap(local_inc(&__get_cpu_var(l)))
357#define cpu_local_dec(l) cpu_local_wrap(local_dec(&__get_cpu_var(l)))
358#define cpu_local_add(i, l) cpu_local_wrap(local_add((i), &__get_cpu_var(l)))
359#define cpu_local_sub(i, l) cpu_local_wrap(local_sub((i), &__get_cpu_var(l)))
360
361#define __cpu_local_inc(l) cpu_local_inc(l)
362#define __cpu_local_dec(l) cpu_local_dec(l)
363#define __cpu_local_add(i, l) cpu_local_add((i), (l))
364#define __cpu_local_sub(i, l) cpu_local_sub((i), (l))
365
366#endif /* __M32R_LOCAL_H */
diff --git a/include/asm-m32r/m32102.h b/include/asm-m32r/m32102.h
deleted file mode 100644
index 52807f8db166..000000000000
--- a/include/asm-m32r/m32102.h
+++ /dev/null
@@ -1,314 +0,0 @@
1#ifndef _M32102_H_
2#define _M32102_H_
3
4/*
5 * Renesas M32R 32102 group
6 *
7 * Copyright (c) 2001 Hitoshi Yamamoto
8 * Copyright (c) 2003, 2004 Renesas Technology Corp.
9 */
10
11/*======================================================================*
12 * Special Function Register
13 *======================================================================*/
14#if !defined(CONFIG_CHIP_M32104)
15#define M32R_SFR_OFFSET (0x00E00000) /* 0x00E00000-0x00EFFFFF 1[MB] */
16#else
17#define M32R_SFR_OFFSET (0x00700000) /* 0x00700000-0x007FFFFF 1[MB] */
18#endif
19
20/*
21 * Clock and Power Management registers.
22 */
23#define M32R_CPM_OFFSET (0x000F4000+M32R_SFR_OFFSET)
24
25#define M32R_CPM_CPUCLKCR_PORTL (0x00+M32R_CPM_OFFSET)
26#define M32R_CPM_CLKMOD_PORTL (0x04+M32R_CPM_OFFSET)
27#define M32R_CPM_PLLCR_PORTL (0x08+M32R_CPM_OFFSET)
28
29/*
30 * DMA Controller registers.
31 */
32#define M32R_DMA_OFFSET (0x000F8000+M32R_SFR_OFFSET)
33
34#define M32R_DMAEN_PORTL (0x000+M32R_DMA_OFFSET)
35#define M32R_DMAISTS_PORTL (0x004+M32R_DMA_OFFSET)
36#define M32R_DMAEDET_PORTL (0x008+M32R_DMA_OFFSET)
37#define M32R_DMAASTS_PORTL (0x00c+M32R_DMA_OFFSET)
38
39#define M32R_DMA0CR0_PORTL (0x100+M32R_DMA_OFFSET)
40#define M32R_DMA0CR1_PORTL (0x104+M32R_DMA_OFFSET)
41#define M32R_DMA0CSA_PORTL (0x108+M32R_DMA_OFFSET)
42#define M32R_DMA0RSA_PORTL (0x10c+M32R_DMA_OFFSET)
43#define M32R_DMA0CDA_PORTL (0x110+M32R_DMA_OFFSET)
44#define M32R_DMA0RDA_PORTL (0x114+M32R_DMA_OFFSET)
45#define M32R_DMA0CBCUT_PORTL (0x118+M32R_DMA_OFFSET)
46#define M32R_DMA0RBCUT_PORTL (0x11c+M32R_DMA_OFFSET)
47
48#define M32R_DMA1CR0_PORTL (0x200+M32R_DMA_OFFSET)
49#define M32R_DMA1CR1_PORTL (0x204+M32R_DMA_OFFSET)
50#define M32R_DMA1CSA_PORTL (0x208+M32R_DMA_OFFSET)
51#define M32R_DMA1RSA_PORTL (0x20c+M32R_DMA_OFFSET)
52#define M32R_DMA1CDA_PORTL (0x210+M32R_DMA_OFFSET)
53#define M32R_DMA1RDA_PORTL (0x214+M32R_DMA_OFFSET)
54#define M32R_DMA1CBCUT_PORTL (0x218+M32R_DMA_OFFSET)
55#define M32R_DMA1RBCUT_PORTL (0x21c+M32R_DMA_OFFSET)
56
57/*
58 * Multi Function Timer registers.
59 */
60#define M32R_MFT_OFFSET (0x000FC000+M32R_SFR_OFFSET)
61
62#define M32R_MFTCR_PORTL (0x000+M32R_MFT_OFFSET) /* MFT control */
63#define M32R_MFTRPR_PORTL (0x004+M32R_MFT_OFFSET) /* MFT real port */
64
65#define M32R_MFT0_OFFSET (0x100+M32R_MFT_OFFSET)
66#define M32R_MFT0MOD_PORTL (0x00+M32R_MFT0_OFFSET) /* MFT0 mode */
67#define M32R_MFT0BOS_PORTL (0x04+M32R_MFT0_OFFSET) /* MFT0 b-port output status */
68#define M32R_MFT0CUT_PORTL (0x08+M32R_MFT0_OFFSET) /* MFT0 count */
69#define M32R_MFT0RLD_PORTL (0x0C+M32R_MFT0_OFFSET) /* MFT0 reload */
70#define M32R_MFT0CMPRLD_PORTL (0x10+M32R_MFT0_OFFSET) /* MFT0 compare reload */
71
72#define M32R_MFT1_OFFSET (0x200+M32R_MFT_OFFSET)
73#define M32R_MFT1MOD_PORTL (0x00+M32R_MFT1_OFFSET) /* MFT1 mode */
74#define M32R_MFT1BOS_PORTL (0x04+M32R_MFT1_OFFSET) /* MFT1 b-port output status */
75#define M32R_MFT1CUT_PORTL (0x08+M32R_MFT1_OFFSET) /* MFT1 count */
76#define M32R_MFT1RLD_PORTL (0x0C+M32R_MFT1_OFFSET) /* MFT1 reload */
77#define M32R_MFT1CMPRLD_PORTL (0x10+M32R_MFT1_OFFSET) /* MFT1 compare reload */
78
79#define M32R_MFT2_OFFSET (0x300+M32R_MFT_OFFSET)
80#define M32R_MFT2MOD_PORTL (0x00+M32R_MFT2_OFFSET) /* MFT2 mode */
81#define M32R_MFT2BOS_PORTL (0x04+M32R_MFT2_OFFSET) /* MFT2 b-port output status */
82#define M32R_MFT2CUT_PORTL (0x08+M32R_MFT2_OFFSET) /* MFT2 count */
83#define M32R_MFT2RLD_PORTL (0x0C+M32R_MFT2_OFFSET) /* MFT2 reload */
84#define M32R_MFT2CMPRLD_PORTL (0x10+M32R_MFT2_OFFSET) /* MFT2 compare reload */
85
86#define M32R_MFT3_OFFSET (0x400+M32R_MFT_OFFSET)
87#define M32R_MFT3MOD_PORTL (0x00+M32R_MFT3_OFFSET) /* MFT3 mode */
88#define M32R_MFT3BOS_PORTL (0x04+M32R_MFT3_OFFSET) /* MFT3 b-port output status */
89#define M32R_MFT3CUT_PORTL (0x08+M32R_MFT3_OFFSET) /* MFT3 count */
90#define M32R_MFT3RLD_PORTL (0x0C+M32R_MFT3_OFFSET) /* MFT3 reload */
91#define M32R_MFT3CMPRLD_PORTL (0x10+M32R_MFT3_OFFSET) /* MFT3 compare reload */
92
93#define M32R_MFT4_OFFSET (0x500+M32R_MFT_OFFSET)
94#define M32R_MFT4MOD_PORTL (0x00+M32R_MFT4_OFFSET) /* MFT4 mode */
95#define M32R_MFT4BOS_PORTL (0x04+M32R_MFT4_OFFSET) /* MFT4 b-port output status */
96#define M32R_MFT4CUT_PORTL (0x08+M32R_MFT4_OFFSET) /* MFT4 count */
97#define M32R_MFT4RLD_PORTL (0x0C+M32R_MFT4_OFFSET) /* MFT4 reload */
98#define M32R_MFT4CMPRLD_PORTL (0x10+M32R_MFT4_OFFSET) /* MFT4 compare reload */
99
100#define M32R_MFT5_OFFSET (0x600+M32R_MFT_OFFSET)
101#define M32R_MFT5MOD_PORTL (0x00+M32R_MFT5_OFFSET) /* MFT4 mode */
102#define M32R_MFT5BOS_PORTL (0x04+M32R_MFT5_OFFSET) /* MFT4 b-port output status */
103#define M32R_MFT5CUT_PORTL (0x08+M32R_MFT5_OFFSET) /* MFT4 count */
104#define M32R_MFT5RLD_PORTL (0x0C+M32R_MFT5_OFFSET) /* MFT4 reload */
105#define M32R_MFT5CMPRLD_PORTL (0x10+M32R_MFT5_OFFSET) /* MFT4 compare reload */
106
107#if (defined(CONFIG_CHIP_M32700) && !defined(CONFIG_PLAT_MAPPI2)) \
108 || defined(CONFIG_CHIP_M32104)
109#define M32R_MFTCR_MFT0MSK (1UL<<31) /* b0 */
110#define M32R_MFTCR_MFT1MSK (1UL<<30) /* b1 */
111#define M32R_MFTCR_MFT2MSK (1UL<<29) /* b2 */
112#define M32R_MFTCR_MFT3MSK (1UL<<28) /* b3 */
113#define M32R_MFTCR_MFT4MSK (1UL<<27) /* b4 */
114#define M32R_MFTCR_MFT5MSK (1UL<<26) /* b5 */
115#define M32R_MFTCR_MFT0EN (1UL<<23) /* b8 */
116#define M32R_MFTCR_MFT1EN (1UL<<22) /* b9 */
117#define M32R_MFTCR_MFT2EN (1UL<<21) /* b10 */
118#define M32R_MFTCR_MFT3EN (1UL<<20) /* b11 */
119#define M32R_MFTCR_MFT4EN (1UL<<19) /* b12 */
120#define M32R_MFTCR_MFT5EN (1UL<<18) /* b13 */
121#else
122#define M32R_MFTCR_MFT0MSK (1UL<<15) /* b16 */
123#define M32R_MFTCR_MFT1MSK (1UL<<14) /* b17 */
124#define M32R_MFTCR_MFT2MSK (1UL<<13) /* b18 */
125#define M32R_MFTCR_MFT3MSK (1UL<<12) /* b19 */
126#define M32R_MFTCR_MFT4MSK (1UL<<11) /* b20 */
127#define M32R_MFTCR_MFT5MSK (1UL<<10) /* b21 */
128#define M32R_MFTCR_MFT0EN (1UL<<7) /* b24 */
129#define M32R_MFTCR_MFT1EN (1UL<<6) /* b25 */
130#define M32R_MFTCR_MFT2EN (1UL<<5) /* b26 */
131#define M32R_MFTCR_MFT3EN (1UL<<4) /* b27 */
132#define M32R_MFTCR_MFT4EN (1UL<<3) /* b28 */
133#define M32R_MFTCR_MFT5EN (1UL<<2) /* b29 */
134#endif
135
136#define M32R_MFTMOD_CC_MASK (1UL<<15) /* b16 */
137#define M32R_MFTMOD_TCCR (1UL<<13) /* b18 */
138#define M32R_MFTMOD_GTSEL000 (0UL<<8) /* b21-23 : 000 */
139#define M32R_MFTMOD_GTSEL001 (1UL<<8) /* b21-23 : 001 */
140#define M32R_MFTMOD_GTSEL010 (2UL<<8) /* b21-23 : 010 */
141#define M32R_MFTMOD_GTSEL011 (3UL<<8) /* b21-23 : 011 */
142#define M32R_MFTMOD_GTSEL110 (6UL<<8) /* b21-23 : 110 */
143#define M32R_MFTMOD_GTSEL111 (7UL<<8) /* b21-23 : 111 */
144#define M32R_MFTMOD_CMSEL (1UL<<3) /* b28 */
145#define M32R_MFTMOD_CSSEL000 (0UL<<0) /* b29-b31 : 000 */
146#define M32R_MFTMOD_CSSEL001 (1UL<<0) /* b29-b31 : 001 */
147#define M32R_MFTMOD_CSSEL010 (2UL<<0) /* b29-b31 : 010 */
148#define M32R_MFTMOD_CSSEL011 (3UL<<0) /* b29-b31 : 011 */
149#define M32R_MFTMOD_CSSEL100 (4UL<<0) /* b29-b31 : 100 */
150#define M32R_MFTMOD_CSSEL110 (6UL<<0) /* b29-b31 : 110 */
151
152/*
153 * Serial I/O registers.
154 */
155#define M32R_SIO_OFFSET (0x000FD000+M32R_SFR_OFFSET)
156
157#define M32R_SIO0_CR_PORTL (0x000+M32R_SIO_OFFSET)
158#define M32R_SIO0_MOD0_PORTL (0x004+M32R_SIO_OFFSET)
159#define M32R_SIO0_MOD1_PORTL (0x008+M32R_SIO_OFFSET)
160#define M32R_SIO0_STS_PORTL (0x00C+M32R_SIO_OFFSET)
161#define M32R_SIO0_TRCR_PORTL (0x010+M32R_SIO_OFFSET)
162#define M32R_SIO0_BAUR_PORTL (0x014+M32R_SIO_OFFSET)
163#define M32R_SIO0_RBAUR_PORTL (0x018+M32R_SIO_OFFSET)
164#define M32R_SIO0_TXB_PORTL (0x01C+M32R_SIO_OFFSET)
165#define M32R_SIO0_RXB_PORTL (0x020+M32R_SIO_OFFSET)
166
167/*
168 * Interrupt Control Unit registers.
169 */
170#define M32R_ICU_OFFSET (0x000FF000+M32R_SFR_OFFSET)
171#define M32R_ICU_ISTS_PORTL (0x004+M32R_ICU_OFFSET)
172#define M32R_ICU_IREQ0_PORTL (0x008+M32R_ICU_OFFSET)
173#define M32R_ICU_IREQ1_PORTL (0x00C+M32R_ICU_OFFSET)
174#define M32R_ICU_SBICR_PORTL (0x018+M32R_ICU_OFFSET)
175#define M32R_ICU_IMASK_PORTL (0x01C+M32R_ICU_OFFSET)
176#define M32R_ICU_CR1_PORTL (0x200+M32R_ICU_OFFSET) /* INT0 */
177#define M32R_ICU_CR2_PORTL (0x204+M32R_ICU_OFFSET) /* INT1 */
178#define M32R_ICU_CR3_PORTL (0x208+M32R_ICU_OFFSET) /* INT2 */
179#define M32R_ICU_CR4_PORTL (0x20C+M32R_ICU_OFFSET) /* INT3 */
180#define M32R_ICU_CR5_PORTL (0x210+M32R_ICU_OFFSET) /* INT4 */
181#define M32R_ICU_CR6_PORTL (0x214+M32R_ICU_OFFSET) /* INT5 */
182#define M32R_ICU_CR7_PORTL (0x218+M32R_ICU_OFFSET) /* INT6 */
183#define M32R_ICU_CR8_PORTL (0x219+M32R_ICU_OFFSET) /* INT7 */
184#define M32R_ICU_CR16_PORTL (0x23C+M32R_ICU_OFFSET) /* MFT0 */
185#define M32R_ICU_CR17_PORTL (0x240+M32R_ICU_OFFSET) /* MFT1 */
186#define M32R_ICU_CR18_PORTL (0x244+M32R_ICU_OFFSET) /* MFT2 */
187#define M32R_ICU_CR19_PORTL (0x248+M32R_ICU_OFFSET) /* MFT3 */
188#define M32R_ICU_CR20_PORTL (0x24C+M32R_ICU_OFFSET) /* MFT4 */
189#define M32R_ICU_CR21_PORTL (0x250+M32R_ICU_OFFSET) /* MFT5 */
190#define M32R_ICU_CR32_PORTL (0x27C+M32R_ICU_OFFSET) /* DMA0 */
191#define M32R_ICU_CR33_PORTL (0x280+M32R_ICU_OFFSET) /* DMA1 */
192#define M32R_ICU_CR48_PORTL (0x2BC+M32R_ICU_OFFSET) /* SIO0 */
193#define M32R_ICU_CR49_PORTL (0x2C0+M32R_ICU_OFFSET) /* SIO0 */
194#define M32R_ICU_CR50_PORTL (0x2C4+M32R_ICU_OFFSET) /* SIO1 */
195#define M32R_ICU_CR51_PORTL (0x2C8+M32R_ICU_OFFSET) /* SIO1 */
196#define M32R_ICU_CR52_PORTL (0x2CC+M32R_ICU_OFFSET) /* SIO2 */
197#define M32R_ICU_CR53_PORTL (0x2D0+M32R_ICU_OFFSET) /* SIO2 */
198#define M32R_ICU_CR54_PORTL (0x2D4+M32R_ICU_OFFSET) /* SIO3 */
199#define M32R_ICU_CR55_PORTL (0x2D8+M32R_ICU_OFFSET) /* SIO3 */
200#define M32R_ICU_CR56_PORTL (0x2DC+M32R_ICU_OFFSET) /* SIO4 */
201#define M32R_ICU_CR57_PORTL (0x2E0+M32R_ICU_OFFSET) /* SIO4 */
202
203#ifdef CONFIG_SMP
204#define M32R_ICU_IPICR0_PORTL (0x2dc+M32R_ICU_OFFSET) /* IPI0 */
205#define M32R_ICU_IPICR1_PORTL (0x2e0+M32R_ICU_OFFSET) /* IPI1 */
206#define M32R_ICU_IPICR2_PORTL (0x2e4+M32R_ICU_OFFSET) /* IPI2 */
207#define M32R_ICU_IPICR3_PORTL (0x2e8+M32R_ICU_OFFSET) /* IPI3 */
208#define M32R_ICU_IPICR4_PORTL (0x2ec+M32R_ICU_OFFSET) /* IPI4 */
209#define M32R_ICU_IPICR5_PORTL (0x2f0+M32R_ICU_OFFSET) /* IPI5 */
210#define M32R_ICU_IPICR6_PORTL (0x2f4+M32R_ICU_OFFSET) /* IPI6 */
211#define M32R_ICU_IPICR7_PORTL (0x2f8+M32R_ICU_OFFSET) /* IPI7 */
212#endif /* CONFIG_SMP */
213
214#define M32R_ICUIMASK_IMSK0 (0UL<<16) /* b13-b15: Disable interrupt */
215#define M32R_ICUIMASK_IMSK1 (1UL<<16) /* b13-b15: Enable level 0 interrupt */
216#define M32R_ICUIMASK_IMSK2 (2UL<<16) /* b13-b15: Enable level 0,1 interrupt */
217#define M32R_ICUIMASK_IMSK3 (3UL<<16) /* b13-b15: Enable level 0-2 interrupt */
218#define M32R_ICUIMASK_IMSK4 (4UL<<16) /* b13-b15: Enable level 0-3 interrupt */
219#define M32R_ICUIMASK_IMSK5 (5UL<<16) /* b13-b15: Enable level 0-4 interrupt */
220#define M32R_ICUIMASK_IMSK6 (6UL<<16) /* b13-b15: Enable level 0-5 interrupt */
221#define M32R_ICUIMASK_IMSK7 (7UL<<16) /* b13-b15: Enable level 0-6 interrupt */
222
223#define M32R_ICUCR_IEN (1UL<<12) /* b19: Interrupt enable */
224#define M32R_ICUCR_IRQ (1UL<<8) /* b23: Interrupt request */
225#define M32R_ICUCR_ISMOD00 (0UL<<4) /* b26-b27: Interrupt sense mode Edge HtoL */
226#define M32R_ICUCR_ISMOD01 (1UL<<4) /* b26-b27: Interrupt sense mode Level L */
227#define M32R_ICUCR_ISMOD10 (2UL<<4) /* b26-b27: Interrupt sense mode Edge LtoH*/
228#define M32R_ICUCR_ISMOD11 (3UL<<4) /* b26-b27: Interrupt sense mode Level H */
229#define M32R_ICUCR_ILEVEL0 (0UL<<0) /* b29-b31: Interrupt priority level 0 */
230#define M32R_ICUCR_ILEVEL1 (1UL<<0) /* b29-b31: Interrupt priority level 1 */
231#define M32R_ICUCR_ILEVEL2 (2UL<<0) /* b29-b31: Interrupt priority level 2 */
232#define M32R_ICUCR_ILEVEL3 (3UL<<0) /* b29-b31: Interrupt priority level 3 */
233#define M32R_ICUCR_ILEVEL4 (4UL<<0) /* b29-b31: Interrupt priority level 4 */
234#define M32R_ICUCR_ILEVEL5 (5UL<<0) /* b29-b31: Interrupt priority level 5 */
235#define M32R_ICUCR_ILEVEL6 (6UL<<0) /* b29-b31: Interrupt priority level 6 */
236#define M32R_ICUCR_ILEVEL7 (7UL<<0) /* b29-b31: Disable interrupt */
237
238#define M32R_IRQ_INT0 (1) /* INT0 */
239#define M32R_IRQ_INT1 (2) /* INT1 */
240#define M32R_IRQ_INT2 (3) /* INT2 */
241#define M32R_IRQ_INT3 (4) /* INT3 */
242#define M32R_IRQ_INT4 (5) /* INT4 */
243#define M32R_IRQ_INT5 (6) /* INT5 */
244#define M32R_IRQ_INT6 (7) /* INT6 */
245#define M32R_IRQ_MFT0 (16) /* MFT0 */
246#define M32R_IRQ_MFT1 (17) /* MFT1 */
247#define M32R_IRQ_MFT2 (18) /* MFT2 */
248#define M32R_IRQ_MFT3 (19) /* MFT3 */
249#ifdef CONFIG_CHIP_M32104
250#define M32R_IRQ_MFTX0 (24) /* MFTX0 */
251#define M32R_IRQ_MFTX1 (25) /* MFTX1 */
252#define M32R_IRQ_DMA0 (32) /* DMA0 */
253#define M32R_IRQ_DMA1 (33) /* DMA1 */
254#define M32R_IRQ_DMA2 (34) /* DMA2 */
255#define M32R_IRQ_DMA3 (35) /* DMA3 */
256#define M32R_IRQ_SIO0_R (40) /* SIO0 send */
257#define M32R_IRQ_SIO0_S (41) /* SIO0 receive */
258#define M32R_IRQ_SIO1_R (42) /* SIO1 send */
259#define M32R_IRQ_SIO1_S (43) /* SIO1 receive */
260#define M32R_IRQ_SIO2_R (44) /* SIO2 send */
261#define M32R_IRQ_SIO2_S (45) /* SIO2 receive */
262#define M32R_IRQ_SIO3_R (46) /* SIO3 send */
263#define M32R_IRQ_SIO3_S (47) /* SIO3 receive */
264#define M32R_IRQ_ADC (56) /* ADC */
265#define M32R_IRQ_PC (57) /* PC */
266#else /* ! M32104 */
267#define M32R_IRQ_DMA0 (32) /* DMA0 */
268#define M32R_IRQ_DMA1 (33) /* DMA1 */
269#define M32R_IRQ_SIO0_R (48) /* SIO0 send */
270#define M32R_IRQ_SIO0_S (49) /* SIO0 receive */
271#define M32R_IRQ_SIO1_R (50) /* SIO1 send */
272#define M32R_IRQ_SIO1_S (51) /* SIO1 receive */
273#define M32R_IRQ_SIO2_R (52) /* SIO2 send */
274#define M32R_IRQ_SIO2_S (53) /* SIO2 receive */
275#define M32R_IRQ_SIO3_R (54) /* SIO3 send */
276#define M32R_IRQ_SIO3_S (55) /* SIO3 receive */
277#define M32R_IRQ_SIO4_R (56) /* SIO4 send */
278#define M32R_IRQ_SIO4_S (57) /* SIO4 receive */
279#endif /* ! M32104 */
280
281#ifdef CONFIG_SMP
282#define M32R_IRQ_IPI0 (56)
283#define M32R_IRQ_IPI1 (57)
284#define M32R_IRQ_IPI2 (58)
285#define M32R_IRQ_IPI3 (59)
286#define M32R_IRQ_IPI4 (60)
287#define M32R_IRQ_IPI5 (61)
288#define M32R_IRQ_IPI6 (62)
289#define M32R_IRQ_IPI7 (63)
290#define M32R_CPUID_PORTL (0xffffffe0)
291
292#define M32R_FPGA_TOP (0x000F0000+M32R_SFR_OFFSET)
293
294#define M32R_FPGA_NUM_OF_CPUS_PORTL (0x00+M32R_FPGA_TOP)
295#define M32R_FPGA_CPU_NAME0_PORTL (0x10+M32R_FPGA_TOP)
296#define M32R_FPGA_CPU_NAME1_PORTL (0x14+M32R_FPGA_TOP)
297#define M32R_FPGA_CPU_NAME2_PORTL (0x18+M32R_FPGA_TOP)
298#define M32R_FPGA_CPU_NAME3_PORTL (0x1c+M32R_FPGA_TOP)
299#define M32R_FPGA_MODEL_ID0_PORTL (0x20+M32R_FPGA_TOP)
300#define M32R_FPGA_MODEL_ID1_PORTL (0x24+M32R_FPGA_TOP)
301#define M32R_FPGA_MODEL_ID2_PORTL (0x28+M32R_FPGA_TOP)
302#define M32R_FPGA_MODEL_ID3_PORTL (0x2c+M32R_FPGA_TOP)
303#define M32R_FPGA_VERSION0_PORTL (0x30+M32R_FPGA_TOP)
304#define M32R_FPGA_VERSION1_PORTL (0x34+M32R_FPGA_TOP)
305
306#endif /* CONFIG_SMP */
307
308#ifndef __ASSEMBLY__
309typedef struct {
310 unsigned long icucr; /* ICU Control Register */
311} icu_data_t;
312#endif
313
314#endif /* _M32102_H_ */
diff --git a/include/asm-m32r/m32104ut/m32104ut_pld.h b/include/asm-m32r/m32104ut/m32104ut_pld.h
deleted file mode 100644
index 2dc89d68b6d9..000000000000
--- a/include/asm-m32r/m32104ut/m32104ut_pld.h
+++ /dev/null
@@ -1,161 +0,0 @@
1#ifndef _M32104UT_M32104UT_PLD_H
2#define _M32104UT_M32104UT_PLD_H
3
4/*
5 * include/asm-m32r/m32104ut/m32104ut_pld.h
6 *
7 * Definitions for Programable Logic Device(PLD) on M32104UT board.
8 * Based on m32700ut_pld.h
9 *
10 * Copyright (c) 2002 Takeo Takahashi
11 * Copyright (c) 2005 Naoto Sugai
12 *
13 * This file is subject to the terms and conditions of the GNU General
14 * Public License. See the file "COPYING" in the main directory of
15 * this archive for more details.
16 */
17
18#if defined(CONFIG_PLAT_M32104UT)
19#define PLD_PLAT_BASE 0x02c00000
20#else
21#error "no platform configuration"
22#endif
23
24#ifndef __ASSEMBLY__
25/*
26 * C functions use non-cache address.
27 */
28#define PLD_BASE (PLD_PLAT_BASE /* + NONCACHE_OFFSET */)
29#define __reg8 (volatile unsigned char *)
30#define __reg16 (volatile unsigned short *)
31#define __reg32 (volatile unsigned int *)
32#else
33#define PLD_BASE (PLD_PLAT_BASE + NONCACHE_OFFSET)
34#define __reg8
35#define __reg16
36#define __reg32
37#endif /* __ASSEMBLY__ */
38
39/* CFC */
40#define PLD_CFRSTCR __reg16(PLD_BASE + 0x0000)
41#define PLD_CFSTS __reg16(PLD_BASE + 0x0002)
42#define PLD_CFIMASK __reg16(PLD_BASE + 0x0004)
43#define PLD_CFBUFCR __reg16(PLD_BASE + 0x0006)
44
45/* MMC */
46#define PLD_MMCCR __reg16(PLD_BASE + 0x4000)
47#define PLD_MMCMOD __reg16(PLD_BASE + 0x4002)
48#define PLD_MMCSTS __reg16(PLD_BASE + 0x4006)
49#define PLD_MMCBAUR __reg16(PLD_BASE + 0x400a)
50#define PLD_MMCCMDBCUT __reg16(PLD_BASE + 0x400c)
51#define PLD_MMCCDTBCUT __reg16(PLD_BASE + 0x400e)
52#define PLD_MMCDET __reg16(PLD_BASE + 0x4010)
53#define PLD_MMCWP __reg16(PLD_BASE + 0x4012)
54#define PLD_MMCWDATA __reg16(PLD_BASE + 0x5000)
55#define PLD_MMCRDATA __reg16(PLD_BASE + 0x6000)
56#define PLD_MMCCMDDATA __reg16(PLD_BASE + 0x7000)
57#define PLD_MMCRSPDATA __reg16(PLD_BASE + 0x7006)
58
59/* ICU
60 * ICUISTS: status register
61 * ICUIREQ0: request register
62 * ICUIREQ1: request register
63 * ICUCR3: control register for CFIREQ# interrupt
64 * ICUCR4: control register for CFC Card insert interrupt
65 * ICUCR5: control register for CFC Card eject interrupt
66 * ICUCR6: control register for external interrupt
67 * ICUCR11: control register for MMC Card insert/eject interrupt
68 * ICUCR13: control register for SC error interrupt
69 * ICUCR14: control register for SC receive interrupt
70 * ICUCR15: control register for SC send interrupt
71 */
72
73#define PLD_IRQ_INT0 (M32104UT_PLD_IRQ_BASE + 0) /* None */
74#define PLD_IRQ_CFIREQ (M32104UT_PLD_IRQ_BASE + 3) /* CF IREQ */
75#define PLD_IRQ_CFC_INSERT (M32104UT_PLD_IRQ_BASE + 4) /* CF Insert */
76#define PLD_IRQ_CFC_EJECT (M32104UT_PLD_IRQ_BASE + 5) /* CF Eject */
77#define PLD_IRQ_EXINT (M32104UT_PLD_IRQ_BASE + 6) /* EXINT */
78#define PLD_IRQ_MMCCARD (M32104UT_PLD_IRQ_BASE + 11) /* MMC Insert/Eject */
79#define PLD_IRQ_SC_ERROR (M32104UT_PLD_IRQ_BASE + 13) /* SC error */
80#define PLD_IRQ_SC_RCV (M32104UT_PLD_IRQ_BASE + 14) /* SC receive */
81#define PLD_IRQ_SC_SND (M32104UT_PLD_IRQ_BASE + 15) /* SC send */
82
83#define PLD_ICUISTS __reg16(PLD_BASE + 0x8002)
84#define PLD_ICUISTS_VECB_MASK (0xf000)
85#define PLD_ICUISTS_VECB(x) ((x) & PLD_ICUISTS_VECB_MASK)
86#define PLD_ICUISTS_ISN_MASK (0x07c0)
87#define PLD_ICUISTS_ISN(x) ((x) & PLD_ICUISTS_ISN_MASK)
88#define PLD_ICUCR3 __reg16(PLD_BASE + 0x8104)
89#define PLD_ICUCR4 __reg16(PLD_BASE + 0x8106)
90#define PLD_ICUCR5 __reg16(PLD_BASE + 0x8108)
91#define PLD_ICUCR6 __reg16(PLD_BASE + 0x810a)
92#define PLD_ICUCR11 __reg16(PLD_BASE + 0x8114)
93#define PLD_ICUCR13 __reg16(PLD_BASE + 0x8118)
94#define PLD_ICUCR14 __reg16(PLD_BASE + 0x811a)
95#define PLD_ICUCR15 __reg16(PLD_BASE + 0x811c)
96#define PLD_ICUCR_IEN (0x1000)
97#define PLD_ICUCR_IREQ (0x0100)
98#define PLD_ICUCR_ISMOD00 (0x0000) /* Low edge */
99#define PLD_ICUCR_ISMOD01 (0x0010) /* Low level */
100#define PLD_ICUCR_ISMOD02 (0x0020) /* High edge */
101#define PLD_ICUCR_ISMOD03 (0x0030) /* High level */
102#define PLD_ICUCR_ILEVEL0 (0x0000)
103#define PLD_ICUCR_ILEVEL1 (0x0001)
104#define PLD_ICUCR_ILEVEL2 (0x0002)
105#define PLD_ICUCR_ILEVEL3 (0x0003)
106#define PLD_ICUCR_ILEVEL4 (0x0004)
107#define PLD_ICUCR_ILEVEL5 (0x0005)
108#define PLD_ICUCR_ILEVEL6 (0x0006)
109#define PLD_ICUCR_ILEVEL7 (0x0007)
110
111/* Power Control of MMC and CF */
112#define PLD_CPCR __reg16(PLD_BASE + 0x14000)
113#define PLD_CPCR_CDP 0x0001
114
115/* LED Control
116 *
117 * 1: DIP swich side
118 * 2: Reset switch side
119 */
120#define PLD_IOLEDCR __reg16(PLD_BASE + 0x14002)
121#define PLD_IOLED_1_ON 0x001
122#define PLD_IOLED_1_OFF 0x000
123#define PLD_IOLED_2_ON 0x002
124#define PLD_IOLED_2_OFF 0x000
125
126/* DIP Switch
127 * 0: Write-protect of Flash Memory (0:protected, 1:non-protected)
128 * 1: -
129 * 2: -
130 * 3: -
131 */
132#define PLD_IOSWSTS __reg16(PLD_BASE + 0x14004)
133#define PLD_IOSWSTS_IOSW2 0x0200
134#define PLD_IOSWSTS_IOSW1 0x0100
135#define PLD_IOSWSTS_IOWP0 0x0001
136
137/* CRC */
138#define PLD_CRC7DATA __reg16(PLD_BASE + 0x18000)
139#define PLD_CRC7INDATA __reg16(PLD_BASE + 0x18002)
140#define PLD_CRC16DATA __reg16(PLD_BASE + 0x18004)
141#define PLD_CRC16INDATA __reg16(PLD_BASE + 0x18006)
142#define PLD_CRC16ADATA __reg16(PLD_BASE + 0x18008)
143#define PLD_CRC16AINDATA __reg16(PLD_BASE + 0x1800a)
144
145/* RTC */
146#define PLD_RTCCR __reg16(PLD_BASE + 0x1c000)
147#define PLD_RTCBAUR __reg16(PLD_BASE + 0x1c002)
148#define PLD_RTCWRDATA __reg16(PLD_BASE + 0x1c004)
149#define PLD_RTCRDDATA __reg16(PLD_BASE + 0x1c006)
150#define PLD_RTCRSTODT __reg16(PLD_BASE + 0x1c008)
151
152/* SIM Card */
153#define PLD_SCCR __reg16(PLD_BASE + 0x38000)
154#define PLD_SCMOD __reg16(PLD_BASE + 0x38004)
155#define PLD_SCSTS __reg16(PLD_BASE + 0x38006)
156#define PLD_SCINTCR __reg16(PLD_BASE + 0x38008)
157#define PLD_SCBAUR __reg16(PLD_BASE + 0x3800a)
158#define PLD_SCTXB __reg16(PLD_BASE + 0x3800c)
159#define PLD_SCRXB __reg16(PLD_BASE + 0x3800e)
160
161#endif /* _M32104UT_M32104UT_PLD_H */
diff --git a/include/asm-m32r/m32700ut/m32700ut_lan.h b/include/asm-m32r/m32700ut/m32700ut_lan.h
deleted file mode 100644
index aae810a4fb2c..000000000000
--- a/include/asm-m32r/m32700ut/m32700ut_lan.h
+++ /dev/null
@@ -1,103 +0,0 @@
1#ifndef _M32700UT_M32700UT_LAN_H
2#define _M32700UT_M32700UT_LAN_H
3
4/*
5 * include/asm-m32r/m32700ut/m32700ut_lan.h
6 *
7 * M32700UT-LAN board
8 *
9 * Copyright (c) 2002 Takeo Takahashi
10 *
11 * This file is subject to the terms and conditions of the GNU General
12 * Public License. See the file "COPYING" in the main directory of
13 * this archive for more details.
14 */
15
16#ifndef __ASSEMBLY__
17/*
18 * C functions use non-cache address.
19 */
20#define M32700UT_LAN_BASE (0x10000000 /* + NONCACHE_OFFSET */)
21#else
22#define M32700UT_LAN_BASE (0x10000000 + NONCACHE_OFFSET)
23#endif /* __ASSEMBLY__ */
24
25/* ICU
26 * ICUISTS: status register
27 * ICUIREQ0: request register
28 * ICUIREQ1: request register
29 * ICUCR3: control register for CFIREQ# interrupt
30 * ICUCR4: control register for CFC Card insert interrupt
31 * ICUCR5: control register for CFC Card eject interrupt
32 * ICUCR6: control register for external interrupt
33 * ICUCR11: control register for MMC Card insert/eject interrupt
34 * ICUCR13: control register for SC error interrupt
35 * ICUCR14: control register for SC receive interrupt
36 * ICUCR15: control register for SC send interrupt
37 * ICUCR16: control register for SIO0 receive interrupt
38 * ICUCR17: control register for SIO0 send interrupt
39 */
40#define M32700UT_LAN_IRQ_LAN (M32700UT_LAN_PLD_IRQ_BASE + 1) /* LAN */
41#define M32700UT_LAN_IRQ_I2C (M32700UT_LAN_PLD_IRQ_BASE + 3) /* I2C */
42
43#define M32700UT_LAN_ICUISTS __reg16(M32700UT_LAN_BASE + 0xc0002)
44#define M32700UT_LAN_ICUISTS_VECB_MASK (0xf000)
45#define M32700UT_LAN_VECB(x) ((x) & M32700UT_LAN_ICUISTS_VECB_MASK)
46#define M32700UT_LAN_ICUISTS_ISN_MASK (0x07c0)
47#define M32700UT_LAN_ICUISTS_ISN(x) ((x) & M32700UT_LAN_ICUISTS_ISN_MASK)
48#define M32700UT_LAN_ICUIREQ0 __reg16(M32700UT_LAN_BASE + 0xc0004)
49#define M32700UT_LAN_ICUCR1 __reg16(M32700UT_LAN_BASE + 0xc0010)
50#define M32700UT_LAN_ICUCR3 __reg16(M32700UT_LAN_BASE + 0xc0014)
51
52/*
53 * AR register on PLD
54 */
55#define ARVCR0 __reg32(M32700UT_LAN_BASE + 0x40000)
56#define ARVCR0_VDS 0x00080000
57#define ARVCR0_RST 0x00010000
58#define ARVCR1 __reg32(M32700UT_LAN_BASE + 0x40004)
59#define ARVCR1_QVGA 0x02000000
60#define ARVCR1_NORMAL 0x01000000
61#define ARVCR1_HIEN 0x00010000
62#define ARVHCOUNT __reg32(M32700UT_LAN_BASE + 0x40008)
63#define ARDATA __reg32(M32700UT_LAN_BASE + 0x40010)
64#define ARINTSEL __reg32(M32700UT_LAN_BASE + 0x40014)
65#define ARINTSEL_INT3 0x10000000 /* CPU INT3 */
66#define ARDATA32 __reg32(M32700UT_LAN_BASE + 0x04040010) // Block 5
67/*
68#define ARINTSEL_SEL2 0x00002000
69#define ARINTSEL_SEL3 0x00001000
70#define ARINTSEL_SEL6 0x00000200
71#define ARINTSEL_SEL7 0x00000100
72#define ARINTSEL_SEL9 0x00000040
73#define ARINTSEL_SEL10 0x00000020
74#define ARINTSEL_SEL11 0x00000010
75#define ARINTSEL_SEL12 0x00000008
76*/
77
78/*
79 * I2C register on PLD
80 */
81#define PLDI2CCR __reg32(M32700UT_LAN_BASE + 0x40040)
82#define PLDI2CCR_ES0 0x00000001 /* enable I2C interface */
83#define PLDI2CMOD __reg32(M32700UT_LAN_BASE + 0x40044)
84#define PLDI2CMOD_ACKCLK 0x00000200
85#define PLDI2CMOD_DTWD 0x00000100
86#define PLDI2CMOD_10BT 0x00000004
87#define PLDI2CMOD_ATM_NORMAL 0x00000000
88#define PLDI2CMOD_ATM_AUTO 0x00000003
89#define PLDI2CACK __reg32(M32700UT_LAN_BASE + 0x40048)
90#define PLDI2CACK_ACK 0x00000001
91#define PLDI2CFREQ __reg32(M32700UT_LAN_BASE + 0x4004c)
92#define PLDI2CCND __reg32(M32700UT_LAN_BASE + 0x40050)
93#define PLDI2CCND_START 0x00000001
94#define PLDI2CCND_STOP 0x00000002
95#define PLDI2CSTEN __reg32(M32700UT_LAN_BASE + 0x40054)
96#define PLDI2CSTEN_STEN 0x00000001
97#define PLDI2CDATA __reg32(M32700UT_LAN_BASE + 0x40060)
98#define PLDI2CSTS __reg32(M32700UT_LAN_BASE + 0x40064)
99#define PLDI2CSTS_TRX 0x00000020
100#define PLDI2CSTS_BB 0x00000010
101#define PLDI2CSTS_NOACK 0x00000001 /* 0:ack, 1:noack */
102
103#endif /* _M32700UT_M32700UT_LAN_H */
diff --git a/include/asm-m32r/m32700ut/m32700ut_lcd.h b/include/asm-m32r/m32700ut/m32700ut_lcd.h
deleted file mode 100644
index 4c2489079788..000000000000
--- a/include/asm-m32r/m32700ut/m32700ut_lcd.h
+++ /dev/null
@@ -1,55 +0,0 @@
1#ifndef _M32700UT_M32700UT_LCD_H
2#define _M32700UT_M32700UT_LCD_H
3
4/*
5 * include/asm-m32r/m32700ut/m32700ut_lcd.h
6 *
7 * M32700UT-LCD board
8 *
9 * Copyright (c) 2002 Takeo Takahashi
10 *
11 * This file is subject to the terms and conditions of the GNU General
12 * Public License. See the file "COPYING" in the main directory of
13 * this archive for more details.
14 */
15
16#ifndef __ASSEMBLY__
17/*
18 * C functions use non-cache address.
19 */
20#define M32700UT_LCD_BASE (0x10000000 /* + NONCACHE_OFFSET */)
21#else
22#define M32700UT_LCD_BASE (0x10000000 + NONCACHE_OFFSET)
23#endif /* __ASSEMBLY__ */
24
25/*
26 * ICU
27 */
28#define M32700UT_LCD_IRQ_BAT_INT (M32700UT_LCD_PLD_IRQ_BASE + 1)
29#define M32700UT_LCD_IRQ_USB_INT1 (M32700UT_LCD_PLD_IRQ_BASE + 2)
30#define M32700UT_LCD_IRQ_AUDT0 (M32700UT_LCD_PLD_IRQ_BASE + 3)
31#define M32700UT_LCD_IRQ_AUDT2 (M32700UT_LCD_PLD_IRQ_BASE + 4)
32#define M32700UT_LCD_IRQ_BATSIO_RCV (M32700UT_LCD_PLD_IRQ_BASE + 16)
33#define M32700UT_LCD_IRQ_BATSIO_SND (M32700UT_LCD_PLD_IRQ_BASE + 17)
34#define M32700UT_LCD_IRQ_ASNDSIO_RCV (M32700UT_LCD_PLD_IRQ_BASE + 18)
35#define M32700UT_LCD_IRQ_ASNDSIO_SND (M32700UT_LCD_PLD_IRQ_BASE + 19)
36#define M32700UT_LCD_IRQ_ACNLSIO_SND (M32700UT_LCD_PLD_IRQ_BASE + 21)
37
38#define M32700UT_LCD_ICUISTS __reg16(M32700UT_LCD_BASE + 0x300002)
39#define M32700UT_LCD_ICUISTS_VECB_MASK (0xf000)
40#define M32700UT_LCD_VECB(x) ((x) & M32700UT_LCD_ICUISTS_VECB_MASK)
41#define M32700UT_LCD_ICUISTS_ISN_MASK (0x07c0)
42#define M32700UT_LCD_ICUISTS_ISN(x) ((x) & M32700UT_LCD_ICUISTS_ISN_MASK)
43#define M32700UT_LCD_ICUIREQ0 __reg16(M32700UT_LCD_BASE + 0x300004)
44#define M32700UT_LCD_ICUIREQ1 __reg16(M32700UT_LCD_BASE + 0x300006)
45#define M32700UT_LCD_ICUCR1 __reg16(M32700UT_LCD_BASE + 0x300020)
46#define M32700UT_LCD_ICUCR2 __reg16(M32700UT_LCD_BASE + 0x300022)
47#define M32700UT_LCD_ICUCR3 __reg16(M32700UT_LCD_BASE + 0x300024)
48#define M32700UT_LCD_ICUCR4 __reg16(M32700UT_LCD_BASE + 0x300026)
49#define M32700UT_LCD_ICUCR16 __reg16(M32700UT_LCD_BASE + 0x300030)
50#define M32700UT_LCD_ICUCR17 __reg16(M32700UT_LCD_BASE + 0x300032)
51#define M32700UT_LCD_ICUCR18 __reg16(M32700UT_LCD_BASE + 0x300034)
52#define M32700UT_LCD_ICUCR19 __reg16(M32700UT_LCD_BASE + 0x300036)
53#define M32700UT_LCD_ICUCR21 __reg16(M32700UT_LCD_BASE + 0x30003a)
54
55#endif /* _M32700UT_M32700UT_LCD_H */
diff --git a/include/asm-m32r/m32700ut/m32700ut_pld.h b/include/asm-m32r/m32700ut/m32700ut_pld.h
deleted file mode 100644
index 57623beb44cb..000000000000
--- a/include/asm-m32r/m32700ut/m32700ut_pld.h
+++ /dev/null
@@ -1,259 +0,0 @@
1#ifndef _M32700UT_M32700UT_PLD_H
2#define _M32700UT_M32700UT_PLD_H
3
4/*
5 * include/asm-m32r/m32700ut/m32700ut_pld.h
6 *
7 * Definitions for Programable Logic Device(PLD) on M32700UT board.
8 *
9 * Copyright (c) 2002 Takeo Takahashi
10 *
11 * This file is subject to the terms and conditions of the GNU General
12 * Public License. See the file "COPYING" in the main directory of
13 * this archive for more details.
14 */
15
16#if defined(CONFIG_PLAT_M32700UT) || defined(CONFIG_PLAT_USRV)
17#define PLD_PLAT_BASE 0x04c00000
18#else
19#error "no platform configuration"
20#endif
21
22#ifndef __ASSEMBLY__
23/*
24 * C functions use non-cache address.
25 */
26#define PLD_BASE (PLD_PLAT_BASE /* + NONCACHE_OFFSET */)
27#define __reg8 (volatile unsigned char *)
28#define __reg16 (volatile unsigned short *)
29#define __reg32 (volatile unsigned int *)
30#else
31#define PLD_BASE (PLD_PLAT_BASE + NONCACHE_OFFSET)
32#define __reg8
33#define __reg16
34#define __reg32
35#endif /* __ASSEMBLY__ */
36
37/* CFC */
38#define PLD_CFRSTCR __reg16(PLD_BASE + 0x0000)
39#define PLD_CFSTS __reg16(PLD_BASE + 0x0002)
40#define PLD_CFIMASK __reg16(PLD_BASE + 0x0004)
41#define PLD_CFBUFCR __reg16(PLD_BASE + 0x0006)
42#define PLD_CFVENCR __reg16(PLD_BASE + 0x0008)
43#define PLD_CFCR0 __reg16(PLD_BASE + 0x000a)
44#define PLD_CFCR1 __reg16(PLD_BASE + 0x000c)
45#define PLD_IDERSTCR __reg16(PLD_BASE + 0x0010)
46
47/* MMC */
48#define PLD_MMCCR __reg16(PLD_BASE + 0x4000)
49#define PLD_MMCMOD __reg16(PLD_BASE + 0x4002)
50#define PLD_MMCSTS __reg16(PLD_BASE + 0x4006)
51#define PLD_MMCBAUR __reg16(PLD_BASE + 0x400a)
52#define PLD_MMCCMDBCUT __reg16(PLD_BASE + 0x400c)
53#define PLD_MMCCDTBCUT __reg16(PLD_BASE + 0x400e)
54#define PLD_MMCDET __reg16(PLD_BASE + 0x4010)
55#define PLD_MMCWP __reg16(PLD_BASE + 0x4012)
56#define PLD_MMCWDATA __reg16(PLD_BASE + 0x5000)
57#define PLD_MMCRDATA __reg16(PLD_BASE + 0x6000)
58#define PLD_MMCCMDDATA __reg16(PLD_BASE + 0x7000)
59#define PLD_MMCRSPDATA __reg16(PLD_BASE + 0x7006)
60
61/* ICU
62 * ICUISTS: status register
63 * ICUIREQ0: request register
64 * ICUIREQ1: request register
65 * ICUCR3: control register for CFIREQ# interrupt
66 * ICUCR4: control register for CFC Card insert interrupt
67 * ICUCR5: control register for CFC Card eject interrupt
68 * ICUCR6: control register for external interrupt
69 * ICUCR11: control register for MMC Card insert/eject interrupt
70 * ICUCR13: control register for SC error interrupt
71 * ICUCR14: control register for SC receive interrupt
72 * ICUCR15: control register for SC send interrupt
73 * ICUCR16: control register for SIO0 receive interrupt
74 * ICUCR17: control register for SIO0 send interrupt
75 */
76#if !defined(CONFIG_PLAT_USRV)
77#define PLD_IRQ_INT0 (M32700UT_PLD_IRQ_BASE + 0) /* None */
78#define PLD_IRQ_INT1 (M32700UT_PLD_IRQ_BASE + 1) /* reserved */
79#define PLD_IRQ_INT2 (M32700UT_PLD_IRQ_BASE + 2) /* reserved */
80#define PLD_IRQ_CFIREQ (M32700UT_PLD_IRQ_BASE + 3) /* CF IREQ */
81#define PLD_IRQ_CFC_INSERT (M32700UT_PLD_IRQ_BASE + 4) /* CF Insert */
82#define PLD_IRQ_CFC_EJECT (M32700UT_PLD_IRQ_BASE + 5) /* CF Eject */
83#define PLD_IRQ_EXINT (M32700UT_PLD_IRQ_BASE + 6) /* EXINT */
84#define PLD_IRQ_INT7 (M32700UT_PLD_IRQ_BASE + 7) /* reserved */
85#define PLD_IRQ_INT8 (M32700UT_PLD_IRQ_BASE + 8) /* reserved */
86#define PLD_IRQ_INT9 (M32700UT_PLD_IRQ_BASE + 9) /* reserved */
87#define PLD_IRQ_INT10 (M32700UT_PLD_IRQ_BASE + 10) /* reserved */
88#define PLD_IRQ_MMCCARD (M32700UT_PLD_IRQ_BASE + 11) /* MMC Insert/Eject */
89#define PLD_IRQ_INT12 (M32700UT_PLD_IRQ_BASE + 12) /* reserved */
90#define PLD_IRQ_SC_ERROR (M32700UT_PLD_IRQ_BASE + 13) /* SC error */
91#define PLD_IRQ_SC_RCV (M32700UT_PLD_IRQ_BASE + 14) /* SC receive */
92#define PLD_IRQ_SC_SND (M32700UT_PLD_IRQ_BASE + 15) /* SC send */
93#define PLD_IRQ_SIO0_RCV (M32700UT_PLD_IRQ_BASE + 16) /* SIO receive */
94#define PLD_IRQ_SIO0_SND (M32700UT_PLD_IRQ_BASE + 17) /* SIO send */
95#define PLD_IRQ_INT18 (M32700UT_PLD_IRQ_BASE + 18) /* reserved */
96#define PLD_IRQ_INT19 (M32700UT_PLD_IRQ_BASE + 19) /* reserved */
97#define PLD_IRQ_INT20 (M32700UT_PLD_IRQ_BASE + 20) /* reserved */
98#define PLD_IRQ_INT21 (M32700UT_PLD_IRQ_BASE + 21) /* reserved */
99#define PLD_IRQ_INT22 (M32700UT_PLD_IRQ_BASE + 22) /* reserved */
100#define PLD_IRQ_INT23 (M32700UT_PLD_IRQ_BASE + 23) /* reserved */
101#define PLD_IRQ_INT24 (M32700UT_PLD_IRQ_BASE + 24) /* reserved */
102#define PLD_IRQ_INT25 (M32700UT_PLD_IRQ_BASE + 25) /* reserved */
103#define PLD_IRQ_INT26 (M32700UT_PLD_IRQ_BASE + 26) /* reserved */
104#define PLD_IRQ_INT27 (M32700UT_PLD_IRQ_BASE + 27) /* reserved */
105#define PLD_IRQ_INT28 (M32700UT_PLD_IRQ_BASE + 28) /* reserved */
106#define PLD_IRQ_INT29 (M32700UT_PLD_IRQ_BASE + 29) /* reserved */
107#define PLD_IRQ_INT30 (M32700UT_PLD_IRQ_BASE + 30) /* reserved */
108#define PLD_IRQ_INT31 (M32700UT_PLD_IRQ_BASE + 31) /* reserved */
109
110#else /* CONFIG_PLAT_USRV */
111
112#define PLD_IRQ_INT0 (M32700UT_PLD_IRQ_BASE + 0) /* None */
113#define PLD_IRQ_INT1 (M32700UT_PLD_IRQ_BASE + 1) /* reserved */
114#define PLD_IRQ_INT2 (M32700UT_PLD_IRQ_BASE + 2) /* reserved */
115#define PLD_IRQ_CF0 (M32700UT_PLD_IRQ_BASE + 3) /* CF0# */
116#define PLD_IRQ_CF1 (M32700UT_PLD_IRQ_BASE + 4) /* CF1# */
117#define PLD_IRQ_CF2 (M32700UT_PLD_IRQ_BASE + 5) /* CF2# */
118#define PLD_IRQ_CF3 (M32700UT_PLD_IRQ_BASE + 6) /* CF3# */
119#define PLD_IRQ_CF4 (M32700UT_PLD_IRQ_BASE + 7) /* CF4# */
120#define PLD_IRQ_INT8 (M32700UT_PLD_IRQ_BASE + 8) /* reserved */
121#define PLD_IRQ_INT9 (M32700UT_PLD_IRQ_BASE + 9) /* reserved */
122#define PLD_IRQ_INT10 (M32700UT_PLD_IRQ_BASE + 10) /* reserved */
123#define PLD_IRQ_INT11 (M32700UT_PLD_IRQ_BASE + 11) /* reserved */
124#define PLD_IRQ_UART0 (M32700UT_PLD_IRQ_BASE + 12) /* UARTIRQ0 */
125#define PLD_IRQ_UART1 (M32700UT_PLD_IRQ_BASE + 13) /* UARTIRQ1 */
126#define PLD_IRQ_INT14 (M32700UT_PLD_IRQ_BASE + 14) /* reserved */
127#define PLD_IRQ_INT15 (M32700UT_PLD_IRQ_BASE + 15) /* reserved */
128#define PLD_IRQ_SNDINT (M32700UT_PLD_IRQ_BASE + 16) /* SNDINT# */
129#define PLD_IRQ_INT17 (M32700UT_PLD_IRQ_BASE + 17) /* reserved */
130#define PLD_IRQ_INT18 (M32700UT_PLD_IRQ_BASE + 18) /* reserved */
131#define PLD_IRQ_INT19 (M32700UT_PLD_IRQ_BASE + 19) /* reserved */
132#define PLD_IRQ_INT20 (M32700UT_PLD_IRQ_BASE + 20) /* reserved */
133#define PLD_IRQ_INT21 (M32700UT_PLD_IRQ_BASE + 21) /* reserved */
134#define PLD_IRQ_INT22 (M32700UT_PLD_IRQ_BASE + 22) /* reserved */
135#define PLD_IRQ_INT23 (M32700UT_PLD_IRQ_BASE + 23) /* reserved */
136#define PLD_IRQ_INT24 (M32700UT_PLD_IRQ_BASE + 24) /* reserved */
137#define PLD_IRQ_INT25 (M32700UT_PLD_IRQ_BASE + 25) /* reserved */
138#define PLD_IRQ_INT26 (M32700UT_PLD_IRQ_BASE + 26) /* reserved */
139#define PLD_IRQ_INT27 (M32700UT_PLD_IRQ_BASE + 27) /* reserved */
140#define PLD_IRQ_INT28 (M32700UT_PLD_IRQ_BASE + 28) /* reserved */
141#define PLD_IRQ_INT29 (M32700UT_PLD_IRQ_BASE + 29) /* reserved */
142#define PLD_IRQ_INT30 (M32700UT_PLD_IRQ_BASE + 30) /* reserved */
143
144#endif /* CONFIG_PLAT_USRV */
145
146#define PLD_ICUISTS __reg16(PLD_BASE + 0x8002)
147#define PLD_ICUISTS_VECB_MASK (0xf000)
148#define PLD_ICUISTS_VECB(x) ((x) & PLD_ICUISTS_VECB_MASK)
149#define PLD_ICUISTS_ISN_MASK (0x07c0)
150#define PLD_ICUISTS_ISN(x) ((x) & PLD_ICUISTS_ISN_MASK)
151#define PLD_ICUIREQ0 __reg16(PLD_BASE + 0x8004)
152#define PLD_ICUIREQ1 __reg16(PLD_BASE + 0x8006)
153#define PLD_ICUCR1 __reg16(PLD_BASE + 0x8100)
154#define PLD_ICUCR2 __reg16(PLD_BASE + 0x8102)
155#define PLD_ICUCR3 __reg16(PLD_BASE + 0x8104)
156#define PLD_ICUCR4 __reg16(PLD_BASE + 0x8106)
157#define PLD_ICUCR5 __reg16(PLD_BASE + 0x8108)
158#define PLD_ICUCR6 __reg16(PLD_BASE + 0x810a)
159#define PLD_ICUCR7 __reg16(PLD_BASE + 0x810c)
160#define PLD_ICUCR8 __reg16(PLD_BASE + 0x810e)
161#define PLD_ICUCR9 __reg16(PLD_BASE + 0x8110)
162#define PLD_ICUCR10 __reg16(PLD_BASE + 0x8112)
163#define PLD_ICUCR11 __reg16(PLD_BASE + 0x8114)
164#define PLD_ICUCR12 __reg16(PLD_BASE + 0x8116)
165#define PLD_ICUCR13 __reg16(PLD_BASE + 0x8118)
166#define PLD_ICUCR14 __reg16(PLD_BASE + 0x811a)
167#define PLD_ICUCR15 __reg16(PLD_BASE + 0x811c)
168#define PLD_ICUCR16 __reg16(PLD_BASE + 0x811e)
169#define PLD_ICUCR17 __reg16(PLD_BASE + 0x8120)
170#define PLD_ICUCR_IEN (0x1000)
171#define PLD_ICUCR_IREQ (0x0100)
172#define PLD_ICUCR_ISMOD00 (0x0000) /* Low edge */
173#define PLD_ICUCR_ISMOD01 (0x0010) /* Low level */
174#define PLD_ICUCR_ISMOD02 (0x0020) /* High edge */
175#define PLD_ICUCR_ISMOD03 (0x0030) /* High level */
176#define PLD_ICUCR_ILEVEL0 (0x0000)
177#define PLD_ICUCR_ILEVEL1 (0x0001)
178#define PLD_ICUCR_ILEVEL2 (0x0002)
179#define PLD_ICUCR_ILEVEL3 (0x0003)
180#define PLD_ICUCR_ILEVEL4 (0x0004)
181#define PLD_ICUCR_ILEVEL5 (0x0005)
182#define PLD_ICUCR_ILEVEL6 (0x0006)
183#define PLD_ICUCR_ILEVEL7 (0x0007)
184
185/* Power Control of MMC and CF */
186#define PLD_CPCR __reg16(PLD_BASE + 0x14000)
187#define PLD_CPCR_CF 0x0001
188#define PLD_CPCR_MMC 0x0002
189
190/* LED Control
191 *
192 * 1: DIP swich side
193 * 2: Reset switch side
194 */
195#define PLD_IOLEDCR __reg16(PLD_BASE + 0x14002)
196#define PLD_IOLED_1_ON 0x001
197#define PLD_IOLED_1_OFF 0x000
198#define PLD_IOLED_2_ON 0x002
199#define PLD_IOLED_2_OFF 0x000
200
201/* DIP Switch
202 * 0: Write-protect of Flash Memory (0:protected, 1:non-protected)
203 * 1: -
204 * 2: -
205 * 3: -
206 */
207#define PLD_IOSWSTS __reg16(PLD_BASE + 0x14004)
208#define PLD_IOSWSTS_IOSW2 0x0200
209#define PLD_IOSWSTS_IOSW1 0x0100
210#define PLD_IOSWSTS_IOWP0 0x0001
211
212/* CRC */
213#define PLD_CRC7DATA __reg16(PLD_BASE + 0x18000)
214#define PLD_CRC7INDATA __reg16(PLD_BASE + 0x18002)
215#define PLD_CRC16DATA __reg16(PLD_BASE + 0x18004)
216#define PLD_CRC16INDATA __reg16(PLD_BASE + 0x18006)
217#define PLD_CRC16ADATA __reg16(PLD_BASE + 0x18008)
218#define PLD_CRC16AINDATA __reg16(PLD_BASE + 0x1800a)
219
220/* RTC */
221#define PLD_RTCCR __reg16(PLD_BASE + 0x1c000)
222#define PLD_RTCBAUR __reg16(PLD_BASE + 0x1c002)
223#define PLD_RTCWRDATA __reg16(PLD_BASE + 0x1c004)
224#define PLD_RTCRDDATA __reg16(PLD_BASE + 0x1c006)
225#define PLD_RTCRSTODT __reg16(PLD_BASE + 0x1c008)
226
227/* SIO0 */
228#define PLD_ESIO0CR __reg16(PLD_BASE + 0x20000)
229#define PLD_ESIO0CR_TXEN 0x0001
230#define PLD_ESIO0CR_RXEN 0x0002
231#define PLD_ESIO0MOD0 __reg16(PLD_BASE + 0x20002)
232#define PLD_ESIO0MOD0_CTSS 0x0040
233#define PLD_ESIO0MOD0_RTSS 0x0080
234#define PLD_ESIO0MOD1 __reg16(PLD_BASE + 0x20004)
235#define PLD_ESIO0MOD1_LMFS 0x0010
236#define PLD_ESIO0STS __reg16(PLD_BASE + 0x20006)
237#define PLD_ESIO0STS_TEMP 0x0001
238#define PLD_ESIO0STS_TXCP 0x0002
239#define PLD_ESIO0STS_RXCP 0x0004
240#define PLD_ESIO0STS_TXSC 0x0100
241#define PLD_ESIO0STS_RXSC 0x0200
242#define PLD_ESIO0STS_TXREADY (PLD_ESIO0STS_TXCP | PLD_ESIO0STS_TEMP)
243#define PLD_ESIO0INTCR __reg16(PLD_BASE + 0x20008)
244#define PLD_ESIO0INTCR_TXIEN 0x0002
245#define PLD_ESIO0INTCR_RXCEN 0x0004
246#define PLD_ESIO0BAUR __reg16(PLD_BASE + 0x2000a)
247#define PLD_ESIO0TXB __reg16(PLD_BASE + 0x2000c)
248#define PLD_ESIO0RXB __reg16(PLD_BASE + 0x2000e)
249
250/* SIM Card */
251#define PLD_SCCR __reg16(PLD_BASE + 0x38000)
252#define PLD_SCMOD __reg16(PLD_BASE + 0x38004)
253#define PLD_SCSTS __reg16(PLD_BASE + 0x38006)
254#define PLD_SCINTCR __reg16(PLD_BASE + 0x38008)
255#define PLD_SCBAUR __reg16(PLD_BASE + 0x3800a)
256#define PLD_SCTXB __reg16(PLD_BASE + 0x3800c)
257#define PLD_SCRXB __reg16(PLD_BASE + 0x3800e)
258
259#endif /* _M32700UT_M32700UT_PLD.H */
diff --git a/include/asm-m32r/m32r.h b/include/asm-m32r/m32r.h
deleted file mode 100644
index 214b44b40757..000000000000
--- a/include/asm-m32r/m32r.h
+++ /dev/null
@@ -1,160 +0,0 @@
1#ifndef _ASM_M32R_M32R_H_
2#define _ASM_M32R_M32R_H_
3
4/*
5 * Renesas M32R processor
6 *
7 * Copyright (C) 2003, 2004 Renesas Technology Corp.
8 */
9
10
11/* Chip type */
12#if defined(CONFIG_CHIP_XNUX_MP) || defined(CONFIG_CHIP_XNUX2_MP)
13#include <asm/m32r_mp_fpga.h>
14#elif defined(CONFIG_CHIP_VDEC2) || defined(CONFIG_CHIP_XNUX2) \
15 || defined(CONFIG_CHIP_M32700) || defined(CONFIG_CHIP_M32102) \
16 || defined(CONFIG_CHIP_OPSP) || defined(CONFIG_CHIP_M32104)
17#include <asm/m32102.h>
18#endif
19
20/* Platform type */
21#if defined(CONFIG_PLAT_M32700UT)
22#include <asm/m32700ut/m32700ut_pld.h>
23#include <asm/m32700ut/m32700ut_lan.h>
24#include <asm/m32700ut/m32700ut_lcd.h>
25/* for ei_handler:linux/arch/m32r/kernel/entry.S */
26#define M32R_INT1ICU_ISTS PLD_ICUISTS
27#define M32R_INT1ICU_IRQ_BASE M32700UT_PLD_IRQ_BASE
28#define M32R_INT0ICU_ISTS M32700UT_LAN_ICUISTS
29#define M32R_INT0ICU_IRQ_BASE M32700UT_LAN_PLD_IRQ_BASE
30#define M32R_INT2ICU_ISTS M32700UT_LCD_ICUISTS
31#define M32R_INT2ICU_IRQ_BASE M32700UT_LCD_PLD_IRQ_BASE
32#endif /* CONFIG_PLAT_M32700UT */
33
34#if defined(CONFIG_PLAT_OPSPUT)
35#include <asm/opsput/opsput_pld.h>
36#include <asm/opsput/opsput_lan.h>
37#include <asm/opsput/opsput_lcd.h>
38/* for ei_handler:linux/arch/m32r/kernel/entry.S */
39#define M32R_INT1ICU_ISTS PLD_ICUISTS
40#define M32R_INT1ICU_IRQ_BASE OPSPUT_PLD_IRQ_BASE
41#define M32R_INT0ICU_ISTS OPSPUT_LAN_ICUISTS
42#define M32R_INT0ICU_IRQ_BASE OPSPUT_LAN_PLD_IRQ_BASE
43#define M32R_INT2ICU_ISTS OPSPUT_LCD_ICUISTS
44#define M32R_INT2ICU_IRQ_BASE OPSPUT_LCD_PLD_IRQ_BASE
45#endif /* CONFIG_PLAT_OPSPUT */
46
47#if defined(CONFIG_PLAT_MAPPI2)
48#include <asm/mappi2/mappi2_pld.h>
49#endif /* CONFIG_PLAT_MAPPI2 */
50
51#if defined(CONFIG_PLAT_MAPPI3)
52#include <asm/mappi3/mappi3_pld.h>
53#endif /* CONFIG_PLAT_MAPPI3 */
54
55#if defined(CONFIG_PLAT_USRV)
56#include <asm/m32700ut/m32700ut_pld.h>
57/* for ei_handler:linux/arch/m32r/kernel/entry.S */
58#define M32R_INT1ICU_ISTS PLD_ICUISTS
59#define M32R_INT1ICU_IRQ_BASE M32700UT_PLD_IRQ_BASE
60#endif
61
62#if defined(CONFIG_PLAT_M32104UT)
63#include <asm/m32104ut/m32104ut_pld.h>
64/* for ei_handler:linux/arch/m32r/kernel/entry.S */
65#define M32R_INT1ICU_ISTS PLD_ICUISTS
66#define M32R_INT1ICU_IRQ_BASE M32104UT_PLD_IRQ_BASE
67#endif /* CONFIG_PLAT_M32104 */
68
69/*
70 * M32R Register
71 */
72
73/*
74 * MMU Register
75 */
76
77#define MMU_REG_BASE (0xffff0000)
78#define ITLB_BASE (0xfe000000)
79#define DTLB_BASE (0xfe000800)
80
81#define NR_TLB_ENTRIES CONFIG_TLB_ENTRIES
82
83#define MATM MMU_REG_BASE /* MMU Address Translation Mode
84 Register */
85#define MPSZ (0x04 + MMU_REG_BASE) /* MMU Page Size Designation Register */
86#define MASID (0x08 + MMU_REG_BASE) /* MMU Address Space ID Register */
87#define MESTS (0x0c + MMU_REG_BASE) /* MMU Exception Status Register */
88#define MDEVA (0x10 + MMU_REG_BASE) /* MMU Operand Exception Virtual
89 Address Register */
90#define MDEVP (0x14 + MMU_REG_BASE) /* MMU Operand Exception Virtual Page
91 Number Register */
92#define MPTB (0x18 + MMU_REG_BASE) /* MMU Page Table Base Register */
93#define MSVA (0x20 + MMU_REG_BASE) /* MMU Search Virtual Address
94 Register */
95#define MTOP (0x24 + MMU_REG_BASE) /* MMU TLB Operation Register */
96#define MIDXI (0x28 + MMU_REG_BASE) /* MMU Index Register for
97 Instruciton */
98#define MIDXD (0x2c + MMU_REG_BASE) /* MMU Index Register for Operand */
99
100#define MATM_offset (MATM - MMU_REG_BASE)
101#define MPSZ_offset (MPSZ - MMU_REG_BASE)
102#define MASID_offset (MASID - MMU_REG_BASE)
103#define MESTS_offset (MESTS - MMU_REG_BASE)
104#define MDEVA_offset (MDEVA - MMU_REG_BASE)
105#define MDEVP_offset (MDEVP - MMU_REG_BASE)
106#define MPTB_offset (MPTB - MMU_REG_BASE)
107#define MSVA_offset (MSVA - MMU_REG_BASE)
108#define MTOP_offset (MTOP - MMU_REG_BASE)
109#define MIDXI_offset (MIDXI - MMU_REG_BASE)
110#define MIDXD_offset (MIDXD - MMU_REG_BASE)
111
112#define MESTS_IT (1 << 0) /* Instruction TLB miss */
113#define MESTS_IA (1 << 1) /* Instruction Access Exception */
114#define MESTS_DT (1 << 4) /* Operand TLB miss */
115#define MESTS_DA (1 << 5) /* Operand Access Exception */
116#define MESTS_DRW (1 << 6) /* Operand Write Exception Flag */
117
118/*
119 * PSW (Processor Status Word)
120 */
121
122/* PSW bit */
123#define M32R_PSW_BIT_SM (7) /* Stack Mode */
124#define M32R_PSW_BIT_IE (6) /* Interrupt Enable */
125#define M32R_PSW_BIT_PM (3) /* Processor Mode [0:Supervisor,1:User] */
126#define M32R_PSW_BIT_C (0) /* Condition */
127#define M32R_PSW_BIT_BSM (7+8) /* Backup Stack Mode */
128#define M32R_PSW_BIT_BIE (6+8) /* Backup Interrupt Enable */
129#define M32R_PSW_BIT_BPM (3+8) /* Backup Processor Mode */
130#define M32R_PSW_BIT_BC (0+8) /* Backup Condition */
131
132/* PSW bit map */
133#define M32R_PSW_SM (1UL<< M32R_PSW_BIT_SM) /* Stack Mode */
134#define M32R_PSW_IE (1UL<< M32R_PSW_BIT_IE) /* Interrupt Enable */
135#define M32R_PSW_PM (1UL<< M32R_PSW_BIT_PM) /* Processor Mode */
136#define M32R_PSW_C (1UL<< M32R_PSW_BIT_C) /* Condition */
137#define M32R_PSW_BSM (1UL<< M32R_PSW_BIT_BSM) /* Backup Stack Mode */
138#define M32R_PSW_BIE (1UL<< M32R_PSW_BIT_BIE) /* Backup Interrupt Enable */
139#define M32R_PSW_BPM (1UL<< M32R_PSW_BIT_BPM) /* Backup Processor Mode */
140#define M32R_PSW_BC (1UL<< M32R_PSW_BIT_BC) /* Backup Condition */
141
142/*
143 * Direct address to SFR
144 */
145
146#include <asm/page.h>
147#ifdef CONFIG_MMU
148#define NONCACHE_OFFSET (__PAGE_OFFSET + 0x20000000)
149#else
150#define NONCACHE_OFFSET __PAGE_OFFSET
151#endif /* CONFIG_MMU */
152
153#define M32R_ICU_ISTS_ADDR M32R_ICU_ISTS_PORTL+NONCACHE_OFFSET
154#define M32R_ICU_IPICR_ADDR M32R_ICU_IPICR0_PORTL+NONCACHE_OFFSET
155#define M32R_ICU_IMASK_ADDR M32R_ICU_IMASK_PORTL+NONCACHE_OFFSET
156#define M32R_FPGA_CPU_NAME_ADDR M32R_FPGA_CPU_NAME0_PORTL+NONCACHE_OFFSET
157#define M32R_FPGA_MODEL_ID_ADDR M32R_FPGA_MODEL_ID0_PORTL+NONCACHE_OFFSET
158#define M32R_FPGA_VERSION_ADDR M32R_FPGA_VERSION0_PORTL+NONCACHE_OFFSET
159
160#endif /* _ASM_M32R_M32R_H_ */
diff --git a/include/asm-m32r/m32r_mp_fpga.h b/include/asm-m32r/m32r_mp_fpga.h
deleted file mode 100644
index 976d2b995919..000000000000
--- a/include/asm-m32r/m32r_mp_fpga.h
+++ /dev/null
@@ -1,313 +0,0 @@
1#ifndef _ASM_M32R_M32R_MP_FPGA_
2#define _ASM_M32R_M32R_MP_FPGA_
3
4/*
5 * Renesas M32R-MP-FPGA
6 *
7 * Copyright (c) 2002 Hitoshi Yamamoto
8 * Copyright (c) 2003, 2004 Renesas Technology Corp.
9 */
10
11/*
12 * ========================================================
13 * M32R-MP-FPGA Memory Map
14 * ========================================================
15 * 0x00000000 : Block#0 : 64[MB]
16 * 0x03E00000 : SFR
17 * 0x03E00000 : reserved
18 * 0x03EF0000 : FPGA
19 * 0x03EF1000 : reserved
20 * 0x03EF4000 : CKM
21 * 0x03EF4000 : BSELC
22 * 0x03EF5000 : reserved
23 * 0x03EFC000 : MFT
24 * 0x03EFD000 : SIO
25 * 0x03EFE000 : reserved
26 * 0x03EFF000 : ICU
27 * 0x03F00000 : Internal SRAM 64[KB]
28 * 0x03F10000 : reserved
29 * --------------------------------------------------------
30 * 0x04000000 : Block#1 : 64[MB]
31 * 0x04000000 : Debug board SRAM 4[MB]
32 * 0x04400000 : reserved
33 * --------------------------------------------------------
34 * 0x08000000 : Block#2 : 64[MB]
35 * --------------------------------------------------------
36 * 0x0C000000 : Block#3 : 64[MB]
37 * --------------------------------------------------------
38 * 0x10000000 : Block#4 : 64[MB]
39 * --------------------------------------------------------
40 * 0x14000000 : Block#5 : 64[MB]
41 * --------------------------------------------------------
42 * 0x18000000 : Block#6 : 64[MB]
43 * --------------------------------------------------------
44 * 0x1C000000 : Block#7 : 64[MB]
45 * --------------------------------------------------------
46 * 0xFE000000 : TLB
47 * 0xFE000000 : ITLB
48 * 0xFE000080 : reserved
49 * 0xFE000800 : DTLB
50 * 0xFE000880 : reserved
51 * --------------------------------------------------------
52 * 0xFF000000 : System area
53 * 0xFFFF0000 : MMU
54 * 0xFFFF0030 : reserved
55 * 0xFFFF8000 : Debug function
56 * 0xFFFFA000 : reserved
57 * 0xFFFFC000 : CPU control
58 * 0xFFFFFFFF
59 * ========================================================
60 */
61
62/*======================================================================*
63 * Special Function Register
64 *======================================================================*/
65#define M32R_SFR_OFFSET (0x00E00000) /* 0x03E00000-0x03EFFFFF 1[MB] */
66
67/*
68 * FPGA registers.
69 */
70#define M32R_FPGA_TOP (0x000F0000+M32R_SFR_OFFSET)
71
72#define M32R_FPGA_NUM_OF_CPUS_PORTL (0x00+M32R_FPGA_TOP)
73#define M32R_FPGA_CPU_NAME0_PORTL (0x10+M32R_FPGA_TOP)
74#define M32R_FPGA_CPU_NAME1_PORTL (0x14+M32R_FPGA_TOP)
75#define M32R_FPGA_CPU_NAME2_PORTL (0x18+M32R_FPGA_TOP)
76#define M32R_FPGA_CPU_NAME3_PORTL (0x1C+M32R_FPGA_TOP)
77#define M32R_FPGA_MODEL_ID0_PORTL (0x20+M32R_FPGA_TOP)
78#define M32R_FPGA_MODEL_ID1_PORTL (0x24+M32R_FPGA_TOP)
79#define M32R_FPGA_MODEL_ID2_PORTL (0x28+M32R_FPGA_TOP)
80#define M32R_FPGA_MODEL_ID3_PORTL (0x2C+M32R_FPGA_TOP)
81#define M32R_FPGA_VERSION0_PORTL (0x30+M32R_FPGA_TOP)
82#define M32R_FPGA_VERSION1_PORTL (0x34+M32R_FPGA_TOP)
83
84/*
85 * Clock and Power Manager registers.
86 */
87#define M32R_CPM_OFFSET (0x000F4000+M32R_SFR_OFFSET)
88
89#define M32R_CPM_CPUCLKCR_PORTL (0x00+M32R_CPM_OFFSET)
90#define M32R_CPM_CLKMOD_PORTL (0x04+M32R_CPM_OFFSET)
91#define M32R_CPM_PLLCR_PORTL (0x08+M32R_CPM_OFFSET)
92
93/*
94 * Block SELect Controller registers.
95 */
96#define M32R_BSELC_OFFSET (0x000F5000+M32R_SFR_OFFSET)
97
98#define M32R_BSEL0_CR0_PORTL (0x000+M32R_BSELC_OFFSET)
99#define M32R_BSEL0_CR1_PORTL (0x004+M32R_BSELC_OFFSET)
100#define M32R_BSEL1_CR0_PORTL (0x100+M32R_BSELC_OFFSET)
101#define M32R_BSEL1_CR1_PORTL (0x104+M32R_BSELC_OFFSET)
102#define M32R_BSEL2_CR0_PORTL (0x200+M32R_BSELC_OFFSET)
103#define M32R_BSEL2_CR1_PORTL (0x204+M32R_BSELC_OFFSET)
104#define M32R_BSEL3_CR0_PORTL (0x300+M32R_BSELC_OFFSET)
105#define M32R_BSEL3_CR1_PORTL (0x304+M32R_BSELC_OFFSET)
106#define M32R_BSEL4_CR0_PORTL (0x400+M32R_BSELC_OFFSET)
107#define M32R_BSEL4_CR1_PORTL (0x404+M32R_BSELC_OFFSET)
108#define M32R_BSEL5_CR0_PORTL (0x500+M32R_BSELC_OFFSET)
109#define M32R_BSEL5_CR1_PORTL (0x504+M32R_BSELC_OFFSET)
110#define M32R_BSEL6_CR0_PORTL (0x600+M32R_BSELC_OFFSET)
111#define M32R_BSEL6_CR1_PORTL (0x604+M32R_BSELC_OFFSET)
112#define M32R_BSEL7_CR0_PORTL (0x700+M32R_BSELC_OFFSET)
113#define M32R_BSEL7_CR1_PORTL (0x704+M32R_BSELC_OFFSET)
114
115/*
116 * Multi Function Timer registers.
117 */
118#define M32R_MFT_OFFSET (0x000FC000+M32R_SFR_OFFSET)
119
120#define M32R_MFTCR_PORTL (0x000+M32R_MFT_OFFSET) /* MFT control */
121#define M32R_MFTRPR_PORTL (0x004+M32R_MFT_OFFSET) /* MFT real port */
122
123#define M32R_MFT0_OFFSET (0x100+M32R_MFT_OFFSET)
124#define M32R_MFT0MOD_PORTL (0x00+M32R_MFT0_OFFSET) /* MFT0 mode */
125#define M32R_MFT0BOS_PORTL (0x04+M32R_MFT0_OFFSET) /* MFT0 b-port output status */
126#define M32R_MFT0CUT_PORTL (0x08+M32R_MFT0_OFFSET) /* MFT0 count */
127#define M32R_MFT0RLD_PORTL (0x0C+M32R_MFT0_OFFSET) /* MFT0 reload */
128#define M32R_MFT0CMPRLD_PORTL (0x10+M32R_MFT0_OFFSET) /* MFT0 compare reload */
129
130#define M32R_MFT1_OFFSET (0x200+M32R_MFT_OFFSET)
131#define M32R_MFT1MOD_PORTL (0x00+M32R_MFT1_OFFSET) /* MFT1 mode */
132#define M32R_MFT1BOS_PORTL (0x04+M32R_MFT1_OFFSET) /* MFT1 b-port output status */
133#define M32R_MFT1CUT_PORTL (0x08+M32R_MFT1_OFFSET) /* MFT1 count */
134#define M32R_MFT1RLD_PORTL (0x0C+M32R_MFT1_OFFSET) /* MFT1 reload */
135#define M32R_MFT1CMPRLD_PORTL (0x10+M32R_MFT1_OFFSET) /* MFT1 compare reload */
136
137#define M32R_MFT2_OFFSET (0x300+M32R_MFT_OFFSET)
138#define M32R_MFT2MOD_PORTL (0x00+M32R_MFT2_OFFSET) /* MFT2 mode */
139#define M32R_MFT2BOS_PORTL (0x04+M32R_MFT2_OFFSET) /* MFT2 b-port output status */
140#define M32R_MFT2CUT_PORTL (0x08+M32R_MFT2_OFFSET) /* MFT2 count */
141#define M32R_MFT2RLD_PORTL (0x0C+M32R_MFT2_OFFSET) /* MFT2 reload */
142#define M32R_MFT2CMPRLD_PORTL (0x10+M32R_MFT2_OFFSET) /* MFT2 compare reload */
143
144#define M32R_MFT3_OFFSET (0x400+M32R_MFT_OFFSET)
145#define M32R_MFT3MOD_PORTL (0x00+M32R_MFT3_OFFSET) /* MFT3 mode */
146#define M32R_MFT3BOS_PORTL (0x04+M32R_MFT3_OFFSET) /* MFT3 b-port output status */
147#define M32R_MFT3CUT_PORTL (0x08+M32R_MFT3_OFFSET) /* MFT3 count */
148#define M32R_MFT3RLD_PORTL (0x0C+M32R_MFT3_OFFSET) /* MFT3 reload */
149#define M32R_MFT3CMPRLD_PORTL (0x10+M32R_MFT3_OFFSET) /* MFT3 compare reload */
150
151#define M32R_MFT4_OFFSET (0x500+M32R_MFT_OFFSET)
152#define M32R_MFT4MOD_PORTL (0x00+M32R_MFT4_OFFSET) /* MFT4 mode */
153#define M32R_MFT4BOS_PORTL (0x04+M32R_MFT4_OFFSET) /* MFT4 b-port output status */
154#define M32R_MFT4CUT_PORTL (0x08+M32R_MFT4_OFFSET) /* MFT4 count */
155#define M32R_MFT4RLD_PORTL (0x0C+M32R_MFT4_OFFSET) /* MFT4 reload */
156#define M32R_MFT4CMPRLD_PORTL (0x10+M32R_MFT4_OFFSET) /* MFT4 compare reload */
157
158#define M32R_MFT5_OFFSET (0x600+M32R_MFT_OFFSET)
159#define M32R_MFT5MOD_PORTL (0x00+M32R_MFT5_OFFSET) /* MFT4 mode */
160#define M32R_MFT5BOS_PORTL (0x04+M32R_MFT5_OFFSET) /* MFT4 b-port output status */
161#define M32R_MFT5CUT_PORTL (0x08+M32R_MFT5_OFFSET) /* MFT4 count */
162#define M32R_MFT5RLD_PORTL (0x0C+M32R_MFT5_OFFSET) /* MFT4 reload */
163#define M32R_MFT5CMPRLD_PORTL (0x10+M32R_MFT5_OFFSET) /* MFT4 compare reload */
164
165#define M32R_MFTCR_MFT0MSK (1UL<<15) /* b16 */
166#define M32R_MFTCR_MFT1MSK (1UL<<14) /* b17 */
167#define M32R_MFTCR_MFT2MSK (1UL<<13) /* b18 */
168#define M32R_MFTCR_MFT3MSK (1UL<<12) /* b19 */
169#define M32R_MFTCR_MFT4MSK (1UL<<11) /* b20 */
170#define M32R_MFTCR_MFT5MSK (1UL<<10) /* b21 */
171#define M32R_MFTCR_MFT0EN (1UL<<7) /* b24 */
172#define M32R_MFTCR_MFT1EN (1UL<<6) /* b25 */
173#define M32R_MFTCR_MFT2EN (1UL<<5) /* b26 */
174#define M32R_MFTCR_MFT3EN (1UL<<4) /* b27 */
175#define M32R_MFTCR_MFT4EN (1UL<<3) /* b28 */
176#define M32R_MFTCR_MFT5EN (1UL<<2) /* b29 */
177
178#define M32R_MFTMOD_CC_MASK (1UL<<15) /* b16 */
179#define M32R_MFTMOD_TCCR (1UL<<13) /* b18 */
180#define M32R_MFTMOD_GTSEL000 (0UL<<8) /* b21-23 : 000 */
181#define M32R_MFTMOD_GTSEL001 (1UL<<8) /* b21-23 : 001 */
182#define M32R_MFTMOD_GTSEL010 (2UL<<8) /* b21-23 : 010 */
183#define M32R_MFTMOD_GTSEL011 (3UL<<8) /* b21-23 : 011 */
184#define M32R_MFTMOD_GTSEL110 (6UL<<8) /* b21-23 : 110 */
185#define M32R_MFTMOD_GTSEL111 (7UL<<8) /* b21-23 : 111 */
186#define M32R_MFTMOD_CMSEL (1UL<<3) /* b28 */
187#define M32R_MFTMOD_CSSEL000 (0UL<<0) /* b29-b31 : 000 */
188#define M32R_MFTMOD_CSSEL001 (1UL<<0) /* b29-b31 : 001 */
189#define M32R_MFTMOD_CSSEL010 (2UL<<0) /* b29-b31 : 010 */
190#define M32R_MFTMOD_CSSEL011 (3UL<<0) /* b29-b31 : 011 */
191#define M32R_MFTMOD_CSSEL100 (4UL<<0) /* b29-b31 : 100 */
192#define M32R_MFTMOD_CSSEL110 (6UL<<0) /* b29-b31 : 110 */
193
194/*
195 * Serial I/O registers.
196 */
197#define M32R_SIO_OFFSET (0x000FD000+M32R_SFR_OFFSET)
198
199#define M32R_SIO0_CR_PORTL (0x000+M32R_SIO_OFFSET)
200#define M32R_SIO0_MOD0_PORTL (0x004+M32R_SIO_OFFSET)
201#define M32R_SIO0_MOD1_PORTL (0x008+M32R_SIO_OFFSET)
202#define M32R_SIO0_STS_PORTL (0x00C+M32R_SIO_OFFSET)
203#define M32R_SIO0_TRCR_PORTL (0x010+M32R_SIO_OFFSET)
204#define M32R_SIO0_BAUR_PORTL (0x014+M32R_SIO_OFFSET)
205#define M32R_SIO0_RBAUR_PORTL (0x018+M32R_SIO_OFFSET)
206#define M32R_SIO0_TXB_PORTL (0x01C+M32R_SIO_OFFSET)
207#define M32R_SIO0_RXB_PORTL (0x020+M32R_SIO_OFFSET)
208
209/*
210 * Interrupt Control Unit registers.
211 */
212#define M32R_ICU_OFFSET (0x000FF000+M32R_SFR_OFFSET)
213
214#define M32R_ICU_ISTS_PORTL (0x004+M32R_ICU_OFFSET)
215#define M32R_ICU_IREQ0_PORTL (0x008+M32R_ICU_OFFSET)
216#define M32R_ICU_IREQ1_PORTL (0x00C+M32R_ICU_OFFSET)
217#define M32R_ICU_SBICR_PORTL (0x018+M32R_ICU_OFFSET)
218#define M32R_ICU_IMASK_PORTL (0x01C+M32R_ICU_OFFSET)
219#define M32R_ICU_CR1_PORTL (0x200+M32R_ICU_OFFSET) /* INT0 */
220#define M32R_ICU_CR2_PORTL (0x204+M32R_ICU_OFFSET) /* INT1 */
221#define M32R_ICU_CR3_PORTL (0x208+M32R_ICU_OFFSET) /* INT2 */
222#define M32R_ICU_CR4_PORTL (0x20C+M32R_ICU_OFFSET) /* INT3 */
223#define M32R_ICU_CR5_PORTL (0x210+M32R_ICU_OFFSET) /* INT4 */
224#define M32R_ICU_CR6_PORTL (0x214+M32R_ICU_OFFSET) /* INT5 */
225#define M32R_ICU_CR7_PORTL (0x218+M32R_ICU_OFFSET) /* INT6 */
226#define M32R_ICU_CR8_PORTL (0x218+M32R_ICU_OFFSET) /* INT7 */
227#define M32R_ICU_CR32_PORTL (0x27C+M32R_ICU_OFFSET) /* SIO0 RX */
228#define M32R_ICU_CR33_PORTL (0x280+M32R_ICU_OFFSET) /* SIO0 TX */
229#define M32R_ICU_CR40_PORTL (0x29C+M32R_ICU_OFFSET) /* DMAC0 */
230#define M32R_ICU_CR41_PORTL (0x2A0+M32R_ICU_OFFSET) /* DMAC1 */
231#define M32R_ICU_CR48_PORTL (0x2BC+M32R_ICU_OFFSET) /* MFT0 */
232#define M32R_ICU_CR49_PORTL (0x2C0+M32R_ICU_OFFSET) /* MFT1 */
233#define M32R_ICU_CR50_PORTL (0x2C4+M32R_ICU_OFFSET) /* MFT2 */
234#define M32R_ICU_CR51_PORTL (0x2C8+M32R_ICU_OFFSET) /* MFT3 */
235#define M32R_ICU_CR52_PORTL (0x2CC+M32R_ICU_OFFSET) /* MFT4 */
236#define M32R_ICU_CR53_PORTL (0x2D0+M32R_ICU_OFFSET) /* MFT5 */
237#define M32R_ICU_IPICR0_PORTL (0x2DC+M32R_ICU_OFFSET) /* IPI0 */
238#define M32R_ICU_IPICR1_PORTL (0x2E0+M32R_ICU_OFFSET) /* IPI1 */
239#define M32R_ICU_IPICR2_PORTL (0x2E4+M32R_ICU_OFFSET) /* IPI2 */
240#define M32R_ICU_IPICR3_PORTL (0x2E8+M32R_ICU_OFFSET) /* IPI3 */
241#define M32R_ICU_IPICR4_PORTL (0x2EC+M32R_ICU_OFFSET) /* IPI4 */
242#define M32R_ICU_IPICR5_PORTL (0x2F0+M32R_ICU_OFFSET) /* IPI5 */
243#define M32R_ICU_IPICR6_PORTL (0x2F4+M32R_ICU_OFFSET) /* IPI6 */
244#define M32R_ICU_IPICR7_PORTL (0x2FC+M32R_ICU_OFFSET) /* IPI7 */
245
246#define M32R_ICUISTS_VECB(val) ((val>>28) & 0xF)
247#define M32R_ICUISTS_ISN(val) ((val>>22) & 0x3F)
248#define M32R_ICUISTS_PIML(val) ((val>>16) & 0x7)
249
250#define M32R_ICUIMASK_IMSK0 (0UL<<16) /* b13-b15: Disable interrupt */
251#define M32R_ICUIMASK_IMSK1 (1UL<<16) /* b13-b15: Enable level 0 interrupt */
252#define M32R_ICUIMASK_IMSK2 (2UL<<16) /* b13-b15: Enable level 0,1 interrupt */
253#define M32R_ICUIMASK_IMSK3 (3UL<<16) /* b13-b15: Enable level 0-2 interrupt */
254#define M32R_ICUIMASK_IMSK4 (4UL<<16) /* b13-b15: Enable level 0-3 interrupt */
255#define M32R_ICUIMASK_IMSK5 (5UL<<16) /* b13-b15: Enable level 0-4 interrupt */
256#define M32R_ICUIMASK_IMSK6 (6UL<<16) /* b13-b15: Enable level 0-5 interrupt */
257#define M32R_ICUIMASK_IMSK7 (7UL<<16) /* b13-b15: Enable level 0-6 interrupt */
258
259#define M32R_ICUCR_IEN (1UL<<12) /* b19: Interrupt enable */
260#define M32R_ICUCR_IRQ (1UL<<8) /* b23: Interrupt request */
261#define M32R_ICUCR_ISMOD00 (0UL<<4) /* b26-b27: Interrupt sense mode Edge HtoL */
262#define M32R_ICUCR_ISMOD01 (1UL<<4) /* b26-b27: Interrupt sense mode Level L */
263#define M32R_ICUCR_ISMOD10 (2UL<<4) /* b26-b27: Interrupt sense mode Edge LtoH*/
264#define M32R_ICUCR_ISMOD11 (3UL<<4) /* b26-b27: Interrupt sense mode Level H */
265#define M32R_ICUCR_ILEVEL0 (0UL<<0) /* b29-b31: Interrupt priority level 0 */
266#define M32R_ICUCR_ILEVEL1 (1UL<<0) /* b29-b31: Interrupt priority level 1 */
267#define M32R_ICUCR_ILEVEL2 (2UL<<0) /* b29-b31: Interrupt priority level 2 */
268#define M32R_ICUCR_ILEVEL3 (3UL<<0) /* b29-b31: Interrupt priority level 3 */
269#define M32R_ICUCR_ILEVEL4 (4UL<<0) /* b29-b31: Interrupt priority level 4 */
270#define M32R_ICUCR_ILEVEL5 (5UL<<0) /* b29-b31: Interrupt priority level 5 */
271#define M32R_ICUCR_ILEVEL6 (6UL<<0) /* b29-b31: Interrupt priority level 6 */
272#define M32R_ICUCR_ILEVEL7 (7UL<<0) /* b29-b31: Disable interrupt */
273#define M32R_ICUCR_ILEVEL_MASK (7UL)
274
275#define M32R_IRQ_INT0 (1) /* INT0 */
276#define M32R_IRQ_INT1 (2) /* INT1 */
277#define M32R_IRQ_INT2 (3) /* INT2 */
278#define M32R_IRQ_INT3 (4) /* INT3 */
279#define M32R_IRQ_INT4 (5) /* INT4 */
280#define M32R_IRQ_INT5 (6) /* INT5 */
281#define M32R_IRQ_INT6 (7) /* INT6 */
282#define M32R_IRQ_INT7 (8) /* INT7 */
283#define M32R_IRQ_MFT0 (16) /* MFT0 */
284#define M32R_IRQ_MFT1 (17) /* MFT1 */
285#define M32R_IRQ_MFT2 (18) /* MFT2 */
286#define M32R_IRQ_MFT3 (19) /* MFT3 */
287#define M32R_IRQ_MFT4 (20) /* MFT4 */
288#define M32R_IRQ_MFT5 (21) /* MFT5 */
289#define M32R_IRQ_DMAC0 (32) /* DMAC0 */
290#define M32R_IRQ_DMAC1 (33) /* DMAC1 */
291#define M32R_IRQ_SIO0_R (48) /* SIO0 receive */
292#define M32R_IRQ_SIO0_S (49) /* SIO0 send */
293#define M32R_IRQ_SIO1_R (50) /* SIO1 send */
294#define M32R_IRQ_SIO1_S (51) /* SIO1 receive */
295#define M32R_IRQ_IPI0 (56) /* IPI0 */
296#define M32R_IRQ_IPI1 (57) /* IPI1 */
297#define M32R_IRQ_IPI2 (58) /* IPI2 */
298#define M32R_IRQ_IPI3 (59) /* IPI3 */
299#define M32R_IRQ_IPI4 (60) /* IPI4 */
300#define M32R_IRQ_IPI5 (61) /* IPI5 */
301#define M32R_IRQ_IPI6 (62) /* IPI6 */
302#define M32R_IRQ_IPI7 (63) /* IPI7 */
303
304/*======================================================================*
305 * CPU
306 *======================================================================*/
307
308#define M32R_CPUID_PORTL (0xFFFFFFE0)
309#define M32R_MCICAR_PORTL (0xFFFFFFF0)
310#define M32R_MCDCAR_PORTL (0xFFFFFFF4)
311#define M32R_MCCR_PORTL (0xFFFFFFFC)
312
313#endif /* _ASM_M32R_M32R_MP_FPGA_ */
diff --git a/include/asm-m32r/mappi2/mappi2_pld.h b/include/asm-m32r/mappi2/mappi2_pld.h
deleted file mode 100644
index 2624c9db7255..000000000000
--- a/include/asm-m32r/mappi2/mappi2_pld.h
+++ /dev/null
@@ -1,150 +0,0 @@
1#ifndef _MAPPI2_PLD_H
2#define _MAPPI2_PLD_H
3
4/*
5 * include/asm-m32r/mappi2/mappi2_pld.h
6 *
7 * Definitions for Extended IO Logic on MAPPI2 board.
8 * based on m32700ut_pld.h
9 *
10 * This file is subject to the terms and conditions of the GNU General
11 * Public License. See the file "COPYING" in the main directory of
12 * this archive for more details.
13 */
14
15#ifndef __ASSEMBLY__
16/* FIXME:
17 * Some C functions use non-cache address, so can't define non-cache address.
18 */
19#define PLD_BASE (0x10c00000 /* + NONCACHE_OFFSET */)
20#define __reg8 (volatile unsigned char *)
21#define __reg16 (volatile unsigned short *)
22#define __reg32 (volatile unsigned int *)
23#else
24#define PLD_BASE (0x10c00000 + NONCACHE_OFFSET)
25#define __reg8
26#define __reg16
27#define __reg32
28#endif /* __ASSEMBLY__ */
29
30/* CFC */
31#define PLD_CFRSTCR __reg16(PLD_BASE + 0x0000)
32#define PLD_CFSTS __reg16(PLD_BASE + 0x0002)
33#define PLD_CFIMASK __reg16(PLD_BASE + 0x0004)
34#define PLD_CFBUFCR __reg16(PLD_BASE + 0x0006)
35#define PLD_CFCR0 __reg16(PLD_BASE + 0x000a)
36#define PLD_CFCR1 __reg16(PLD_BASE + 0x000c)
37
38/* MMC */
39#define PLD_MMCCR __reg16(PLD_BASE + 0x4000)
40#define PLD_MMCMOD __reg16(PLD_BASE + 0x4002)
41#define PLD_MMCSTS __reg16(PLD_BASE + 0x4006)
42#define PLD_MMCBAUR __reg16(PLD_BASE + 0x400a)
43#define PLD_MMCCMDBCUT __reg16(PLD_BASE + 0x400c)
44#define PLD_MMCCDTBCUT __reg16(PLD_BASE + 0x400e)
45#define PLD_MMCDET __reg16(PLD_BASE + 0x4010)
46#define PLD_MMCWP __reg16(PLD_BASE + 0x4012)
47#define PLD_MMCWDATA __reg16(PLD_BASE + 0x5000)
48#define PLD_MMCRDATA __reg16(PLD_BASE + 0x6000)
49#define PLD_MMCCMDDATA __reg16(PLD_BASE + 0x7000)
50#define PLD_MMCRSPDATA __reg16(PLD_BASE + 0x7006)
51
52/* Power Control of MMC and CF */
53#define PLD_CPCR __reg16(PLD_BASE + 0x14000)
54
55
56/*==== ICU ====*/
57#define M32R_IRQ_PC104 (5) /* INT4(PC/104) */
58#define M32R_IRQ_I2C (28) /* I2C-BUS */
59#if 1
60#define PLD_IRQ_CFIREQ (40) /* CFC Card Interrupt */
61#define PLD_IRQ_CFC_INSERT (41) /* CFC Card Insert */
62#define PLD_IRQ_CFC_EJECT (42) /* CFC Card Eject */
63#define PLD_IRQ_MMCCARD (43) /* MMC Card Insert */
64#define PLD_IRQ_MMCIRQ (44) /* MMC Transfer Done */
65#else
66#define PLD_IRQ_CFIREQ (34) /* CFC Card Interrupt */
67#define PLD_IRQ_CFC_INSERT (35) /* CFC Card Insert */
68#define PLD_IRQ_CFC_EJECT (36) /* CFC Card Eject */
69#define PLD_IRQ_MMCCARD (37) /* MMC Card Insert */
70#define PLD_IRQ_MMCIRQ (38) /* MMC Transfer Done */
71#endif
72
73
74#if 0
75/* LED Control
76 *
77 * 1: DIP swich side
78 * 2: Reset switch side
79 */
80#define PLD_IOLEDCR __reg16(PLD_BASE + 0x14002)
81#define PLD_IOLED_1_ON 0x001
82#define PLD_IOLED_1_OFF 0x000
83#define PLD_IOLED_2_ON 0x002
84#define PLD_IOLED_2_OFF 0x000
85
86/* DIP Switch
87 * 0: Write-protect of Flash Memory (0:protected, 1:non-protected)
88 * 1: -
89 * 2: -
90 * 3: -
91 */
92#define PLD_IOSWSTS __reg16(PLD_BASE + 0x14004)
93#define PLD_IOSWSTS_IOSW2 0x0200
94#define PLD_IOSWSTS_IOSW1 0x0100
95#define PLD_IOSWSTS_IOWP0 0x0001
96
97#endif
98
99/* CRC */
100#define PLD_CRC7DATA __reg16(PLD_BASE + 0x18000)
101#define PLD_CRC7INDATA __reg16(PLD_BASE + 0x18002)
102#define PLD_CRC16DATA __reg16(PLD_BASE + 0x18004)
103#define PLD_CRC16INDATA __reg16(PLD_BASE + 0x18006)
104#define PLD_CRC16ADATA __reg16(PLD_BASE + 0x18008)
105#define PLD_CRC16AINDATA __reg16(PLD_BASE + 0x1800a)
106
107
108#if 0
109/* RTC */
110#define PLD_RTCCR __reg16(PLD_BASE + 0x1c000)
111#define PLD_RTCBAUR __reg16(PLD_BASE + 0x1c002)
112#define PLD_RTCWRDATA __reg16(PLD_BASE + 0x1c004)
113#define PLD_RTCRDDATA __reg16(PLD_BASE + 0x1c006)
114#define PLD_RTCRSTODT __reg16(PLD_BASE + 0x1c008)
115
116/* SIO0 */
117#define PLD_ESIO0CR __reg16(PLD_BASE + 0x20000)
118#define PLD_ESIO0CR_TXEN 0x0001
119#define PLD_ESIO0CR_RXEN 0x0002
120#define PLD_ESIO0MOD0 __reg16(PLD_BASE + 0x20002)
121#define PLD_ESIO0MOD0_CTSS 0x0040
122#define PLD_ESIO0MOD0_RTSS 0x0080
123#define PLD_ESIO0MOD1 __reg16(PLD_BASE + 0x20004)
124#define PLD_ESIO0MOD1_LMFS 0x0010
125#define PLD_ESIO0STS __reg16(PLD_BASE + 0x20006)
126#define PLD_ESIO0STS_TEMP 0x0001
127#define PLD_ESIO0STS_TXCP 0x0002
128#define PLD_ESIO0STS_RXCP 0x0004
129#define PLD_ESIO0STS_TXSC 0x0100
130#define PLD_ESIO0STS_RXSC 0x0200
131#define PLD_ESIO0STS_TXREADY (PLD_ESIO0STS_TXCP | PLD_ESIO0STS_TEMP)
132#define PLD_ESIO0INTCR __reg16(PLD_BASE + 0x20008)
133#define PLD_ESIO0INTCR_TXIEN 0x0002
134#define PLD_ESIO0INTCR_RXCEN 0x0004
135#define PLD_ESIO0BAUR __reg16(PLD_BASE + 0x2000a)
136#define PLD_ESIO0TXB __reg16(PLD_BASE + 0x2000c)
137#define PLD_ESIO0RXB __reg16(PLD_BASE + 0x2000e)
138
139/* SIM Card */
140#define PLD_SCCR __reg16(PLD_BASE + 0x38000)
141#define PLD_SCMOD __reg16(PLD_BASE + 0x38004)
142#define PLD_SCSTS __reg16(PLD_BASE + 0x38006)
143#define PLD_SCINTCR __reg16(PLD_BASE + 0x38008)
144#define PLD_SCBAUR __reg16(PLD_BASE + 0x3800a)
145#define PLD_SCTXB __reg16(PLD_BASE + 0x3800c)
146#define PLD_SCRXB __reg16(PLD_BASE + 0x3800e)
147
148#endif
149
150#endif /* _MAPPI2_PLD.H */
diff --git a/include/asm-m32r/mappi3/mappi3_pld.h b/include/asm-m32r/mappi3/mappi3_pld.h
deleted file mode 100644
index 451c40ee70af..000000000000
--- a/include/asm-m32r/mappi3/mappi3_pld.h
+++ /dev/null
@@ -1,142 +0,0 @@
1#ifndef _MAPPI3_PLD_H
2#define _MAPPI3_PLD_H
3
4/*
5 * include/asm-m32r/mappi3/mappi3_pld.h
6 *
7 * Definitions for Extended IO Logic on MAPPI3 board.
8 * based on m32700ut_pld.h
9 *
10 * This file is subject to the terms and conditions of the GNU General
11 * Public License. See the file "COPYING" in the main directory of
12 * this archive for more details.
13 */
14
15#ifndef __ASSEMBLY__
16/* FIXME:
17 * Some C functions use non-cache address, so can't define non-cache address.
18 */
19#define PLD_BASE (0x1c000000 /* + NONCACHE_OFFSET */)
20#define __reg8 (volatile unsigned char *)
21#define __reg16 (volatile unsigned short *)
22#define __reg32 (volatile unsigned int *)
23#else
24#define PLD_BASE (0x1c000000 + NONCACHE_OFFSET)
25#define __reg8
26#define __reg16
27#define __reg32
28#endif /* __ASSEMBLY__ */
29
30/* CFC */
31#define PLD_CFRSTCR __reg16(PLD_BASE + 0x0000)
32#define PLD_CFSTS __reg16(PLD_BASE + 0x0002)
33#define PLD_CFIMASK __reg16(PLD_BASE + 0x0004)
34#define PLD_CFBUFCR __reg16(PLD_BASE + 0x0006)
35#define PLD_CFCR0 __reg16(PLD_BASE + 0x000a)
36#define PLD_CFCR1 __reg16(PLD_BASE + 0x000c)
37
38/* MMC */
39#define PLD_MMCCR __reg16(PLD_BASE + 0x4000)
40#define PLD_MMCMOD __reg16(PLD_BASE + 0x4002)
41#define PLD_MMCSTS __reg16(PLD_BASE + 0x4006)
42#define PLD_MMCBAUR __reg16(PLD_BASE + 0x400a)
43#define PLD_MMCCMDBCUT __reg16(PLD_BASE + 0x400c)
44#define PLD_MMCCDTBCUT __reg16(PLD_BASE + 0x400e)
45#define PLD_MMCDET __reg16(PLD_BASE + 0x4010)
46#define PLD_MMCWP __reg16(PLD_BASE + 0x4012)
47#define PLD_MMCWDATA __reg16(PLD_BASE + 0x5000)
48#define PLD_MMCRDATA __reg16(PLD_BASE + 0x6000)
49#define PLD_MMCCMDDATA __reg16(PLD_BASE + 0x7000)
50#define PLD_MMCRSPDATA __reg16(PLD_BASE + 0x7006)
51
52/* Power Control of MMC and CF */
53#define PLD_CPCR __reg16(PLD_BASE + 0x14000)
54
55/* ICU */
56#define M32R_IRQ_PC104 (5) /* INT4(PC/104) */
57#define M32R_IRQ_I2C (28) /* I2C-BUS */
58#define PLD_IRQ_CFIREQ (6) /* INT5 CFC Card Interrupt */
59#define PLD_IRQ_CFC_INSERT (7) /* INT6 CFC Card Insert & Eject */
60#define PLD_IRQ_IDEIREQ (8) /* INT7 IDE Interrupt */
61#define PLD_IRQ_MMCCARD (43) /* MMC Card Insert */
62#define PLD_IRQ_MMCIRQ (44) /* MMC Transfer Done */
63
64#if 0
65/* LED Control
66 *
67 * 1: DIP swich side
68 * 2: Reset switch side
69 */
70#define PLD_IOLEDCR __reg16(PLD_BASE + 0x14002)
71#define PLD_IOLED_1_ON 0x001
72#define PLD_IOLED_1_OFF 0x000
73#define PLD_IOLED_2_ON 0x002
74#define PLD_IOLED_2_OFF 0x000
75
76/* DIP Switch
77 * 0: Write-protect of Flash Memory (0:protected, 1:non-protected)
78 * 1: -
79 * 2: -
80 * 3: -
81 */
82#define PLD_IOSWSTS __reg16(PLD_BASE + 0x14004)
83#define PLD_IOSWSTS_IOSW2 0x0200
84#define PLD_IOSWSTS_IOSW1 0x0100
85#define PLD_IOSWSTS_IOWP0 0x0001
86
87#endif
88
89/* CRC */
90#define PLD_CRC7DATA __reg16(PLD_BASE + 0x18000)
91#define PLD_CRC7INDATA __reg16(PLD_BASE + 0x18002)
92#define PLD_CRC16DATA __reg16(PLD_BASE + 0x18004)
93#define PLD_CRC16INDATA __reg16(PLD_BASE + 0x18006)
94#define PLD_CRC16ADATA __reg16(PLD_BASE + 0x18008)
95#define PLD_CRC16AINDATA __reg16(PLD_BASE + 0x1800a)
96
97#if 0
98/* RTC */
99#define PLD_RTCCR __reg16(PLD_BASE + 0x1c000)
100#define PLD_RTCBAUR __reg16(PLD_BASE + 0x1c002)
101#define PLD_RTCWRDATA __reg16(PLD_BASE + 0x1c004)
102#define PLD_RTCRDDATA __reg16(PLD_BASE + 0x1c006)
103#define PLD_RTCRSTODT __reg16(PLD_BASE + 0x1c008)
104
105/* SIO0 */
106#define PLD_ESIO0CR __reg16(PLD_BASE + 0x20000)
107#define PLD_ESIO0CR_TXEN 0x0001
108#define PLD_ESIO0CR_RXEN 0x0002
109#define PLD_ESIO0MOD0 __reg16(PLD_BASE + 0x20002)
110#define PLD_ESIO0MOD0_CTSS 0x0040
111#define PLD_ESIO0MOD0_RTSS 0x0080
112#define PLD_ESIO0MOD1 __reg16(PLD_BASE + 0x20004)
113#define PLD_ESIO0MOD1_LMFS 0x0010
114#define PLD_ESIO0STS __reg16(PLD_BASE + 0x20006)
115#define PLD_ESIO0STS_TEMP 0x0001
116#define PLD_ESIO0STS_TXCP 0x0002
117#define PLD_ESIO0STS_RXCP 0x0004
118#define PLD_ESIO0STS_TXSC 0x0100
119#define PLD_ESIO0STS_RXSC 0x0200
120#define PLD_ESIO0STS_TXREADY (PLD_ESIO0STS_TXCP | PLD_ESIO0STS_TEMP)
121#define PLD_ESIO0INTCR __reg16(PLD_BASE + 0x20008)
122#define PLD_ESIO0INTCR_TXIEN 0x0002
123#define PLD_ESIO0INTCR_RXCEN 0x0004
124#define PLD_ESIO0BAUR __reg16(PLD_BASE + 0x2000a)
125#define PLD_ESIO0TXB __reg16(PLD_BASE + 0x2000c)
126#define PLD_ESIO0RXB __reg16(PLD_BASE + 0x2000e)
127
128/* SIM Card */
129#define PLD_SCCR __reg16(PLD_BASE + 0x38000)
130#define PLD_SCMOD __reg16(PLD_BASE + 0x38004)
131#define PLD_SCSTS __reg16(PLD_BASE + 0x38006)
132#define PLD_SCINTCR __reg16(PLD_BASE + 0x38008)
133#define PLD_SCBAUR __reg16(PLD_BASE + 0x3800a)
134#define PLD_SCTXB __reg16(PLD_BASE + 0x3800c)
135#define PLD_SCRXB __reg16(PLD_BASE + 0x3800e)
136
137#endif
138
139/* Reset Control */
140#define PLD_REBOOT __reg16(PLD_BASE + 0x38000)
141
142#endif /* _MAPPI3_PLD.H */
diff --git a/include/asm-m32r/mc146818rtc.h b/include/asm-m32r/mc146818rtc.h
deleted file mode 100644
index aa1b7bf84f51..000000000000
--- a/include/asm-m32r/mc146818rtc.h
+++ /dev/null
@@ -1,29 +0,0 @@
1/*
2 * Machine dependent access functions for RTC registers.
3 */
4#ifndef _ASM_MC146818RTC_H
5#define _ASM_MC146818RTC_H
6
7#include <asm/io.h>
8
9#ifndef RTC_PORT
10#define RTC_PORT(x) ((x))
11#define RTC_ALWAYS_BCD 1 /* RTC operates in binary mode */
12#endif
13
14/*
15 * The yet supported machines all access the RTC index register via
16 * an ISA port access but the way to access the date register differs ...
17 */
18#define CMOS_READ(addr) ({ \
19outb_p((addr),RTC_PORT(0)); \
20inb_p(RTC_PORT(1)); \
21})
22#define CMOS_WRITE(val, addr) ({ \
23outb_p((addr),RTC_PORT(0)); \
24outb_p((val),RTC_PORT(1)); \
25})
26
27#define RTC_IRQ 8
28
29#endif /* _ASM_MC146818RTC_H */
diff --git a/include/asm-m32r/mman.h b/include/asm-m32r/mman.h
deleted file mode 100644
index 516a8973b130..000000000000
--- a/include/asm-m32r/mman.h
+++ /dev/null
@@ -1,17 +0,0 @@
1#ifndef __M32R_MMAN_H__
2#define __M32R_MMAN_H__
3
4#include <asm-generic/mman.h>
5
6#define MAP_GROWSDOWN 0x0100 /* stack-like segment */
7#define MAP_DENYWRITE 0x0800 /* ETXTBSY */
8#define MAP_EXECUTABLE 0x1000 /* mark it as an executable */
9#define MAP_LOCKED 0x2000 /* pages are locked */
10#define MAP_NORESERVE 0x4000 /* don't check for reservations */
11#define MAP_POPULATE 0x8000 /* populate (prefault) pagetables */
12#define MAP_NONBLOCK 0x10000 /* do not block on IO */
13
14#define MCL_CURRENT 1 /* lock all current mappings */
15#define MCL_FUTURE 2 /* lock all future mappings */
16
17#endif /* __M32R_MMAN_H__ */
diff --git a/include/asm-m32r/mmu.h b/include/asm-m32r/mmu.h
deleted file mode 100644
index 150cb92bb666..000000000000
--- a/include/asm-m32r/mmu.h
+++ /dev/null
@@ -1,21 +0,0 @@
1#ifndef _ASM_M32R_MMU_H
2#define _ASM_M32R_MMU_H
3
4#if !defined(CONFIG_MMU)
5
6typedef struct {
7 unsigned long end_brk;
8} mm_context_t;
9
10#else /* CONFIG_MMU */
11
12/* Default "unsigned long" context */
13#ifndef CONFIG_SMP
14typedef unsigned long mm_context_t;
15#else
16typedef unsigned long mm_context_t[NR_CPUS];
17#endif
18
19#endif /* CONFIG_MMU */
20
21#endif /* _ASM_M32R_MMU_H */
diff --git a/include/asm-m32r/mmu_context.h b/include/asm-m32r/mmu_context.h
deleted file mode 100644
index 91909e5dd9d0..000000000000
--- a/include/asm-m32r/mmu_context.h
+++ /dev/null
@@ -1,164 +0,0 @@
1#ifndef _ASM_M32R_MMU_CONTEXT_H
2#define _ASM_M32R_MMU_CONTEXT_H
3#ifdef __KERNEL__
4
5#include <asm/m32r.h>
6
7#define MMU_CONTEXT_ASID_MASK (0x000000FF)
8#define MMU_CONTEXT_VERSION_MASK (0xFFFFFF00)
9#define MMU_CONTEXT_FIRST_VERSION (0x00000100)
10#define NO_CONTEXT (0x00000000)
11
12#ifndef __ASSEMBLY__
13
14#include <asm/atomic.h>
15#include <asm/pgalloc.h>
16#include <asm/mmu.h>
17#include <asm/tlbflush.h>
18#include <asm-generic/mm_hooks.h>
19
20/*
21 * Cache of MMU context last used.
22 */
23#ifndef CONFIG_SMP
24extern unsigned long mmu_context_cache_dat;
25#define mmu_context_cache mmu_context_cache_dat
26#define mm_context(mm) mm->context
27#else /* not CONFIG_SMP */
28extern unsigned long mmu_context_cache_dat[];
29#define mmu_context_cache mmu_context_cache_dat[smp_processor_id()]
30#define mm_context(mm) mm->context[smp_processor_id()]
31#endif /* not CONFIG_SMP */
32
33#define set_tlb_tag(entry, tag) (*entry = (tag & PAGE_MASK)|get_asid())
34#define set_tlb_data(entry, data) (*entry = (data | _PAGE_PRESENT))
35
36#ifdef CONFIG_MMU
37#define enter_lazy_tlb(mm, tsk) do { } while (0)
38
39static inline void get_new_mmu_context(struct mm_struct *mm)
40{
41 unsigned long mc = ++mmu_context_cache;
42
43 if (!(mc & MMU_CONTEXT_ASID_MASK)) {
44 /* We exhaust ASID of this version.
45 Flush all TLB and start new cycle. */
46 local_flush_tlb_all();
47 /* Fix version if needed.
48 Note that we avoid version #0 to distingush NO_CONTEXT. */
49 if (!mc)
50 mmu_context_cache = mc = MMU_CONTEXT_FIRST_VERSION;
51 }
52 mm_context(mm) = mc;
53}
54
55/*
56 * Get MMU context if needed.
57 */
58static inline void get_mmu_context(struct mm_struct *mm)
59{
60 if (mm) {
61 unsigned long mc = mmu_context_cache;
62
63 /* Check if we have old version of context.
64 If it's old, we need to get new context with new version. */
65 if ((mm_context(mm) ^ mc) & MMU_CONTEXT_VERSION_MASK)
66 get_new_mmu_context(mm);
67 }
68}
69
70/*
71 * Initialize the context related info for a new mm_struct
72 * instance.
73 */
74static inline int init_new_context(struct task_struct *tsk,
75 struct mm_struct *mm)
76{
77#ifndef CONFIG_SMP
78 mm->context = NO_CONTEXT;
79#else /* CONFIG_SMP */
80 int num_cpus = num_online_cpus();
81 int i;
82
83 for (i = 0 ; i < num_cpus ; i++)
84 mm->context[i] = NO_CONTEXT;
85#endif /* CONFIG_SMP */
86
87 return 0;
88}
89
90/*
91 * Destroy context related info for an mm_struct that is about
92 * to be put to rest.
93 */
94#define destroy_context(mm) do { } while (0)
95
96static inline void set_asid(unsigned long asid)
97{
98 *(volatile unsigned long *)MASID = (asid & MMU_CONTEXT_ASID_MASK);
99}
100
101static inline unsigned long get_asid(void)
102{
103 unsigned long asid;
104
105 asid = *(volatile long *)MASID;
106 asid &= MMU_CONTEXT_ASID_MASK;
107
108 return asid;
109}
110
111/*
112 * After we have set current->mm to a new value, this activates
113 * the context for the new mm so we see the new mappings.
114 */
115static inline void activate_context(struct mm_struct *mm)
116{
117 get_mmu_context(mm);
118 set_asid(mm_context(mm) & MMU_CONTEXT_ASID_MASK);
119}
120
121static inline void switch_mm(struct mm_struct *prev,
122 struct mm_struct *next, struct task_struct *tsk)
123{
124#ifdef CONFIG_SMP
125 int cpu = smp_processor_id();
126#endif /* CONFIG_SMP */
127
128 if (prev != next) {
129#ifdef CONFIG_SMP
130 cpu_set(cpu, next->cpu_vm_mask);
131#endif /* CONFIG_SMP */
132 /* Set MPTB = next->pgd */
133 *(volatile unsigned long *)MPTB = (unsigned long)next->pgd;
134 activate_context(next);
135 }
136#ifdef CONFIG_SMP
137 else
138 if (!cpu_test_and_set(cpu, next->cpu_vm_mask))
139 activate_context(next);
140#endif /* CONFIG_SMP */
141}
142
143#define deactivate_mm(tsk, mm) do { } while (0)
144
145#define activate_mm(prev, next) \
146 switch_mm((prev), (next), NULL)
147
148#else /* not CONFIG_MMU */
149#define get_mmu_context(mm) do { } while (0)
150#define init_new_context(tsk,mm) (0)
151#define destroy_context(mm) do { } while (0)
152#define set_asid(asid) do { } while (0)
153#define get_asid() (0)
154#define activate_context(mm) do { } while (0)
155#define switch_mm(prev,next,tsk) do { } while (0)
156#define deactivate_mm(mm,tsk) do { } while (0)
157#define activate_mm(prev,next) do { } while (0)
158#define enter_lazy_tlb(mm,tsk) do { } while (0)
159#endif /* not CONFIG_MMU */
160
161#endif /* not __ASSEMBLY__ */
162
163#endif /* __KERNEL__ */
164#endif /* _ASM_M32R_MMU_CONTEXT_H */
diff --git a/include/asm-m32r/mmzone.h b/include/asm-m32r/mmzone.h
deleted file mode 100644
index 9f3b5accda88..000000000000
--- a/include/asm-m32r/mmzone.h
+++ /dev/null
@@ -1,59 +0,0 @@
1/*
2 * Written by Pat Gaughen (gone@us.ibm.com) Mar 2002
3 *
4 */
5
6#ifndef _ASM_MMZONE_H_
7#define _ASM_MMZONE_H_
8
9#include <asm/smp.h>
10
11#ifdef CONFIG_DISCONTIGMEM
12
13extern struct pglist_data *node_data[];
14#define NODE_DATA(nid) (node_data[nid])
15
16#define node_localnr(pfn, nid) ((pfn) - NODE_DATA(nid)->node_start_pfn)
17#define node_start_pfn(nid) (NODE_DATA(nid)->node_start_pfn)
18#define node_end_pfn(nid) \
19({ \
20 pg_data_t *__pgdat = NODE_DATA(nid); \
21 __pgdat->node_start_pfn + __pgdat->node_spanned_pages - 1; \
22})
23
24#define pmd_page(pmd) (pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT))
25/*
26 * pfn_valid should be made as fast as possible, and the current definition
27 * is valid for machines that are NUMA, but still contiguous, which is what
28 * is currently supported. A more generalised, but slower definition would
29 * be something like this - mbligh:
30 * ( pfn_to_pgdat(pfn) && ((pfn) < node_end_pfn(pfn_to_nid(pfn))) )
31 */
32#if 1 /* M32R_FIXME */
33#define pfn_valid(pfn) (1)
34#else
35#define pfn_valid(pfn) ((pfn) < num_physpages)
36#endif
37
38/*
39 * generic node memory support, the following assumptions apply:
40 */
41
42static __inline__ int pfn_to_nid(unsigned long pfn)
43{
44 int node;
45
46 for (node = 0 ; node < MAX_NUMNODES ; node++)
47 if (pfn >= node_start_pfn(node) && pfn <= node_end_pfn(node))
48 break;
49
50 return node;
51}
52
53static __inline__ struct pglist_data *pfn_to_pgdat(unsigned long pfn)
54{
55 return(NODE_DATA(pfn_to_nid(pfn)));
56}
57
58#endif /* CONFIG_DISCONTIGMEM */
59#endif /* _ASM_MMZONE_H_ */
diff --git a/include/asm-m32r/module.h b/include/asm-m32r/module.h
deleted file mode 100644
index eb73ee011215..000000000000
--- a/include/asm-m32r/module.h
+++ /dev/null
@@ -1,10 +0,0 @@
1#ifndef _ASM_M32R_MODULE_H
2#define _ASM_M32R_MODULE_H
3
4struct mod_arch_specific { };
5
6#define Elf_Shdr Elf32_Shdr
7#define Elf_Sym Elf32_Sym
8#define Elf_Ehdr Elf32_Ehdr
9
10#endif /* _ASM_M32R_MODULE_H */
diff --git a/include/asm-m32r/msgbuf.h b/include/asm-m32r/msgbuf.h
deleted file mode 100644
index 0d5a877b813e..000000000000
--- a/include/asm-m32r/msgbuf.h
+++ /dev/null
@@ -1,31 +0,0 @@
1#ifndef _ASM_M32R_MSGBUF_H
2#define _ASM_M32R_MSGBUF_H
3
4/*
5 * The msqid64_ds structure for m32r architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct msqid64_ds {
15 struct ipc64_perm msg_perm;
16 __kernel_time_t msg_stime; /* last msgsnd time */
17 unsigned long __unused1;
18 __kernel_time_t msg_rtime; /* last msgrcv time */
19 unsigned long __unused2;
20 __kernel_time_t msg_ctime; /* last change time */
21 unsigned long __unused3;
22 unsigned long msg_cbytes; /* current number of bytes on queue */
23 unsigned long msg_qnum; /* number of messages in queue */
24 unsigned long msg_qbytes; /* max number of bytes on queue */
25 __kernel_pid_t msg_lspid; /* pid of last msgsnd */
26 __kernel_pid_t msg_lrpid; /* last receive pid */
27 unsigned long __unused4;
28 unsigned long __unused5;
29};
30
31#endif /* _ASM_M32R_MSGBUF_H */
diff --git a/include/asm-m32r/mutex.h b/include/asm-m32r/mutex.h
deleted file mode 100644
index 458c1f7fbc18..000000000000
--- a/include/asm-m32r/mutex.h
+++ /dev/null
@@ -1,9 +0,0 @@
1/*
2 * Pull in the generic implementation for the mutex fastpath.
3 *
4 * TODO: implement optimized primitives instead, or leave the generic
5 * implementation in place, or pick the atomic_xchg() based generic
6 * implementation. (see asm-generic/mutex-xchg.h for details)
7 */
8
9#include <asm-generic/mutex-dec.h>
diff --git a/include/asm-m32r/opsput/opsput_lan.h b/include/asm-m32r/opsput/opsput_lan.h
deleted file mode 100644
index a5f18dd1ab20..000000000000
--- a/include/asm-m32r/opsput/opsput_lan.h
+++ /dev/null
@@ -1,52 +0,0 @@
1#ifndef _OPSPUT_OPSPUT_LAN_H
2#define _OPSPUT_OPSPUT_LAN_H
3
4/*
5 * include/asm-m32r/opsput/opsput_lan.h
6 *
7 * OPSPUT-LAN board
8 *
9 * Copyright (c) 2002-2004 Takeo Takahashi, Mamoru Sakugawa
10 *
11 * This file is subject to the terms and conditions of the GNU General
12 * Public License. See the file "COPYING" in the main directory of
13 * this archive for more details.
14 */
15
16#ifndef __ASSEMBLY__
17/*
18 * C functions use non-cache address.
19 */
20#define OPSPUT_LAN_BASE (0x10000000 /* + NONCACHE_OFFSET */)
21#else
22#define OPSPUT_LAN_BASE (0x10000000 + NONCACHE_OFFSET)
23#endif /* __ASSEMBLY__ */
24
25/* ICU
26 * ICUISTS: status register
27 * ICUIREQ0: request register
28 * ICUIREQ1: request register
29 * ICUCR3: control register for CFIREQ# interrupt
30 * ICUCR4: control register for CFC Card insert interrupt
31 * ICUCR5: control register for CFC Card eject interrupt
32 * ICUCR6: control register for external interrupt
33 * ICUCR11: control register for MMC Card insert/eject interrupt
34 * ICUCR13: control register for SC error interrupt
35 * ICUCR14: control register for SC receive interrupt
36 * ICUCR15: control register for SC send interrupt
37 * ICUCR16: control register for SIO0 receive interrupt
38 * ICUCR17: control register for SIO0 send interrupt
39 */
40#define OPSPUT_LAN_IRQ_LAN (OPSPUT_LAN_PLD_IRQ_BASE + 1) /* LAN */
41#define OPSPUT_LAN_IRQ_I2C (OPSPUT_LAN_PLD_IRQ_BASE + 3) /* I2C */
42
43#define OPSPUT_LAN_ICUISTS __reg16(OPSPUT_LAN_BASE + 0xc0002)
44#define OPSPUT_LAN_ICUISTS_VECB_MASK (0xf000)
45#define OPSPUT_LAN_VECB(x) ((x) & OPSPUT_LAN_ICUISTS_VECB_MASK)
46#define OPSPUT_LAN_ICUISTS_ISN_MASK (0x07c0)
47#define OPSPUT_LAN_ICUISTS_ISN(x) ((x) & OPSPUT_LAN_ICUISTS_ISN_MASK)
48#define OPSPUT_LAN_ICUIREQ0 __reg16(OPSPUT_LAN_BASE + 0xc0004)
49#define OPSPUT_LAN_ICUCR1 __reg16(OPSPUT_LAN_BASE + 0xc0010)
50#define OPSPUT_LAN_ICUCR3 __reg16(OPSPUT_LAN_BASE + 0xc0014)
51
52#endif /* _OPSPUT_OPSPUT_LAN_H */
diff --git a/include/asm-m32r/opsput/opsput_lcd.h b/include/asm-m32r/opsput/opsput_lcd.h
deleted file mode 100644
index 369c9f0832a6..000000000000
--- a/include/asm-m32r/opsput/opsput_lcd.h
+++ /dev/null
@@ -1,55 +0,0 @@
1#ifndef _OPSPUT_OPSPUT_LCD_H
2#define _OPSPUT_OPSPUT_LCD_H
3
4/*
5 * include/asm-m32r/opsput/opsput_lcd.h
6 *
7 * OPSPUT-LCD board
8 *
9 * Copyright (c) 2002 Takeo Takahashi
10 *
11 * This file is subject to the terms and conditions of the GNU General
12 * Public License. See the file "COPYING" in the main directory of
13 * this archive for more details.
14 */
15
16#ifndef __ASSEMBLY__
17/*
18 * C functions use non-cache address.
19 */
20#define OPSPUT_LCD_BASE (0x10000000 /* + NONCACHE_OFFSET */)
21#else
22#define OPSPUT_LCD_BASE (0x10000000 + NONCACHE_OFFSET)
23#endif /* __ASSEMBLY__ */
24
25/*
26 * ICU
27 */
28#define OPSPUT_LCD_IRQ_BAT_INT (OPSPUT_LCD_PLD_IRQ_BASE + 1)
29#define OPSPUT_LCD_IRQ_USB_INT1 (OPSPUT_LCD_PLD_IRQ_BASE + 2)
30#define OPSPUT_LCD_IRQ_AUDT0 (OPSPUT_LCD_PLD_IRQ_BASE + 3)
31#define OPSPUT_LCD_IRQ_AUDT2 (OPSPUT_LCD_PLD_IRQ_BASE + 4)
32#define OPSPUT_LCD_IRQ_BATSIO_RCV (OPSPUT_LCD_PLD_IRQ_BASE + 16)
33#define OPSPUT_LCD_IRQ_BATSIO_SND (OPSPUT_LCD_PLD_IRQ_BASE + 17)
34#define OPSPUT_LCD_IRQ_ASNDSIO_RCV (OPSPUT_LCD_PLD_IRQ_BASE + 18)
35#define OPSPUT_LCD_IRQ_ASNDSIO_SND (OPSPUT_LCD_PLD_IRQ_BASE + 19)
36#define OPSPUT_LCD_IRQ_ACNLSIO_SND (OPSPUT_LCD_PLD_IRQ_BASE + 21)
37
38#define OPSPUT_LCD_ICUISTS __reg16(OPSPUT_LCD_BASE + 0x300002)
39#define OPSPUT_LCD_ICUISTS_VECB_MASK (0xf000)
40#define OPSPUT_LCD_VECB(x) ((x) & OPSPUT_LCD_ICUISTS_VECB_MASK)
41#define OPSPUT_LCD_ICUISTS_ISN_MASK (0x07c0)
42#define OPSPUT_LCD_ICUISTS_ISN(x) ((x) & OPSPUT_LCD_ICUISTS_ISN_MASK)
43#define OPSPUT_LCD_ICUIREQ0 __reg16(OPSPUT_LCD_BASE + 0x300004)
44#define OPSPUT_LCD_ICUIREQ1 __reg16(OPSPUT_LCD_BASE + 0x300006)
45#define OPSPUT_LCD_ICUCR1 __reg16(OPSPUT_LCD_BASE + 0x300020)
46#define OPSPUT_LCD_ICUCR2 __reg16(OPSPUT_LCD_BASE + 0x300022)
47#define OPSPUT_LCD_ICUCR3 __reg16(OPSPUT_LCD_BASE + 0x300024)
48#define OPSPUT_LCD_ICUCR4 __reg16(OPSPUT_LCD_BASE + 0x300026)
49#define OPSPUT_LCD_ICUCR16 __reg16(OPSPUT_LCD_BASE + 0x300030)
50#define OPSPUT_LCD_ICUCR17 __reg16(OPSPUT_LCD_BASE + 0x300032)
51#define OPSPUT_LCD_ICUCR18 __reg16(OPSPUT_LCD_BASE + 0x300034)
52#define OPSPUT_LCD_ICUCR19 __reg16(OPSPUT_LCD_BASE + 0x300036)
53#define OPSPUT_LCD_ICUCR21 __reg16(OPSPUT_LCD_BASE + 0x30003a)
54
55#endif /* _OPSPUT_OPSPUT_LCD_H */
diff --git a/include/asm-m32r/opsput/opsput_pld.h b/include/asm-m32r/opsput/opsput_pld.h
deleted file mode 100644
index 3f11ea1aac2d..000000000000
--- a/include/asm-m32r/opsput/opsput_pld.h
+++ /dev/null
@@ -1,255 +0,0 @@
1#ifndef _OPSPUT_OPSPUT_PLD_H
2#define _OPSPUT_OPSPUT_PLD_H
3
4/*
5 * include/asm-m32r/opsput/opsput_pld.h
6 *
7 * Definitions for Programable Logic Device(PLD) on OPSPUT board.
8 *
9 * Copyright (c) 2002 Takeo Takahashi
10 *
11 * This file is subject to the terms and conditions of the GNU General
12 * Public License. See the file "COPYING" in the main directory of
13 * this archive for more details.
14 */
15
16#define PLD_PLAT_BASE 0x1cc00000
17
18#ifndef __ASSEMBLY__
19/*
20 * C functions use non-cache address.
21 */
22#define PLD_BASE (PLD_PLAT_BASE /* + NONCACHE_OFFSET */)
23#define __reg8 (volatile unsigned char *)
24#define __reg16 (volatile unsigned short *)
25#define __reg32 (volatile unsigned int *)
26#else
27#define PLD_BASE (PLD_PLAT_BASE + NONCACHE_OFFSET)
28#define __reg8
29#define __reg16
30#define __reg32
31#endif /* __ASSEMBLY__ */
32
33/* CFC */
34#define PLD_CFRSTCR __reg16(PLD_BASE + 0x0000)
35#define PLD_CFSTS __reg16(PLD_BASE + 0x0002)
36#define PLD_CFIMASK __reg16(PLD_BASE + 0x0004)
37#define PLD_CFBUFCR __reg16(PLD_BASE + 0x0006)
38#define PLD_CFVENCR __reg16(PLD_BASE + 0x0008)
39#define PLD_CFCR0 __reg16(PLD_BASE + 0x000a)
40#define PLD_CFCR1 __reg16(PLD_BASE + 0x000c)
41#define PLD_IDERSTCR __reg16(PLD_BASE + 0x0010)
42
43/* MMC */
44#define PLD_MMCCR __reg16(PLD_BASE + 0x4000)
45#define PLD_MMCMOD __reg16(PLD_BASE + 0x4002)
46#define PLD_MMCSTS __reg16(PLD_BASE + 0x4006)
47#define PLD_MMCBAUR __reg16(PLD_BASE + 0x400a)
48#define PLD_MMCCMDBCUT __reg16(PLD_BASE + 0x400c)
49#define PLD_MMCCDTBCUT __reg16(PLD_BASE + 0x400e)
50#define PLD_MMCDET __reg16(PLD_BASE + 0x4010)
51#define PLD_MMCWP __reg16(PLD_BASE + 0x4012)
52#define PLD_MMCWDATA __reg16(PLD_BASE + 0x5000)
53#define PLD_MMCRDATA __reg16(PLD_BASE + 0x6000)
54#define PLD_MMCCMDDATA __reg16(PLD_BASE + 0x7000)
55#define PLD_MMCRSPDATA __reg16(PLD_BASE + 0x7006)
56
57/* ICU
58 * ICUISTS: status register
59 * ICUIREQ0: request register
60 * ICUIREQ1: request register
61 * ICUCR3: control register for CFIREQ# interrupt
62 * ICUCR4: control register for CFC Card insert interrupt
63 * ICUCR5: control register for CFC Card eject interrupt
64 * ICUCR6: control register for external interrupt
65 * ICUCR11: control register for MMC Card insert/eject interrupt
66 * ICUCR13: control register for SC error interrupt
67 * ICUCR14: control register for SC receive interrupt
68 * ICUCR15: control register for SC send interrupt
69 * ICUCR16: control register for SIO0 receive interrupt
70 * ICUCR17: control register for SIO0 send interrupt
71 */
72#if !defined(CONFIG_PLAT_USRV)
73#define PLD_IRQ_INT0 (OPSPUT_PLD_IRQ_BASE + 0) /* None */
74#define PLD_IRQ_INT1 (OPSPUT_PLD_IRQ_BASE + 1) /* reserved */
75#define PLD_IRQ_INT2 (OPSPUT_PLD_IRQ_BASE + 2) /* reserved */
76#define PLD_IRQ_CFIREQ (OPSPUT_PLD_IRQ_BASE + 3) /* CF IREQ */
77#define PLD_IRQ_CFC_INSERT (OPSPUT_PLD_IRQ_BASE + 4) /* CF Insert */
78#define PLD_IRQ_CFC_EJECT (OPSPUT_PLD_IRQ_BASE + 5) /* CF Eject */
79#define PLD_IRQ_EXINT (OPSPUT_PLD_IRQ_BASE + 6) /* EXINT */
80#define PLD_IRQ_INT7 (OPSPUT_PLD_IRQ_BASE + 7) /* reserved */
81#define PLD_IRQ_INT8 (OPSPUT_PLD_IRQ_BASE + 8) /* reserved */
82#define PLD_IRQ_INT9 (OPSPUT_PLD_IRQ_BASE + 9) /* reserved */
83#define PLD_IRQ_INT10 (OPSPUT_PLD_IRQ_BASE + 10) /* reserved */
84#define PLD_IRQ_MMCCARD (OPSPUT_PLD_IRQ_BASE + 11) /* MMC Insert/Eject */
85#define PLD_IRQ_INT12 (OPSPUT_PLD_IRQ_BASE + 12) /* reserved */
86#define PLD_IRQ_SC_ERROR (OPSPUT_PLD_IRQ_BASE + 13) /* SC error */
87#define PLD_IRQ_SC_RCV (OPSPUT_PLD_IRQ_BASE + 14) /* SC receive */
88#define PLD_IRQ_SC_SND (OPSPUT_PLD_IRQ_BASE + 15) /* SC send */
89#define PLD_IRQ_SIO0_RCV (OPSPUT_PLD_IRQ_BASE + 16) /* SIO receive */
90#define PLD_IRQ_SIO0_SND (OPSPUT_PLD_IRQ_BASE + 17) /* SIO send */
91#define PLD_IRQ_INT18 (OPSPUT_PLD_IRQ_BASE + 18) /* reserved */
92#define PLD_IRQ_INT19 (OPSPUT_PLD_IRQ_BASE + 19) /* reserved */
93#define PLD_IRQ_INT20 (OPSPUT_PLD_IRQ_BASE + 20) /* reserved */
94#define PLD_IRQ_INT21 (OPSPUT_PLD_IRQ_BASE + 21) /* reserved */
95#define PLD_IRQ_INT22 (OPSPUT_PLD_IRQ_BASE + 22) /* reserved */
96#define PLD_IRQ_INT23 (OPSPUT_PLD_IRQ_BASE + 23) /* reserved */
97#define PLD_IRQ_INT24 (OPSPUT_PLD_IRQ_BASE + 24) /* reserved */
98#define PLD_IRQ_INT25 (OPSPUT_PLD_IRQ_BASE + 25) /* reserved */
99#define PLD_IRQ_INT26 (OPSPUT_PLD_IRQ_BASE + 26) /* reserved */
100#define PLD_IRQ_INT27 (OPSPUT_PLD_IRQ_BASE + 27) /* reserved */
101#define PLD_IRQ_INT28 (OPSPUT_PLD_IRQ_BASE + 28) /* reserved */
102#define PLD_IRQ_INT29 (OPSPUT_PLD_IRQ_BASE + 29) /* reserved */
103#define PLD_IRQ_INT30 (OPSPUT_PLD_IRQ_BASE + 30) /* reserved */
104#define PLD_IRQ_INT31 (OPSPUT_PLD_IRQ_BASE + 31) /* reserved */
105
106#else /* CONFIG_PLAT_USRV */
107
108#define PLD_IRQ_INT0 (OPSPUT_PLD_IRQ_BASE + 0) /* None */
109#define PLD_IRQ_INT1 (OPSPUT_PLD_IRQ_BASE + 1) /* reserved */
110#define PLD_IRQ_INT2 (OPSPUT_PLD_IRQ_BASE + 2) /* reserved */
111#define PLD_IRQ_CF0 (OPSPUT_PLD_IRQ_BASE + 3) /* CF0# */
112#define PLD_IRQ_CF1 (OPSPUT_PLD_IRQ_BASE + 4) /* CF1# */
113#define PLD_IRQ_CF2 (OPSPUT_PLD_IRQ_BASE + 5) /* CF2# */
114#define PLD_IRQ_CF3 (OPSPUT_PLD_IRQ_BASE + 6) /* CF3# */
115#define PLD_IRQ_CF4 (OPSPUT_PLD_IRQ_BASE + 7) /* CF4# */
116#define PLD_IRQ_INT8 (OPSPUT_PLD_IRQ_BASE + 8) /* reserved */
117#define PLD_IRQ_INT9 (OPSPUT_PLD_IRQ_BASE + 9) /* reserved */
118#define PLD_IRQ_INT10 (OPSPUT_PLD_IRQ_BASE + 10) /* reserved */
119#define PLD_IRQ_INT11 (OPSPUT_PLD_IRQ_BASE + 11) /* reserved */
120#define PLD_IRQ_UART0 (OPSPUT_PLD_IRQ_BASE + 12) /* UARTIRQ0 */
121#define PLD_IRQ_UART1 (OPSPUT_PLD_IRQ_BASE + 13) /* UARTIRQ1 */
122#define PLD_IRQ_INT14 (OPSPUT_PLD_IRQ_BASE + 14) /* reserved */
123#define PLD_IRQ_INT15 (OPSPUT_PLD_IRQ_BASE + 15) /* reserved */
124#define PLD_IRQ_SNDINT (OPSPUT_PLD_IRQ_BASE + 16) /* SNDINT# */
125#define PLD_IRQ_INT17 (OPSPUT_PLD_IRQ_BASE + 17) /* reserved */
126#define PLD_IRQ_INT18 (OPSPUT_PLD_IRQ_BASE + 18) /* reserved */
127#define PLD_IRQ_INT19 (OPSPUT_PLD_IRQ_BASE + 19) /* reserved */
128#define PLD_IRQ_INT20 (OPSPUT_PLD_IRQ_BASE + 20) /* reserved */
129#define PLD_IRQ_INT21 (OPSPUT_PLD_IRQ_BASE + 21) /* reserved */
130#define PLD_IRQ_INT22 (OPSPUT_PLD_IRQ_BASE + 22) /* reserved */
131#define PLD_IRQ_INT23 (OPSPUT_PLD_IRQ_BASE + 23) /* reserved */
132#define PLD_IRQ_INT24 (OPSPUT_PLD_IRQ_BASE + 24) /* reserved */
133#define PLD_IRQ_INT25 (OPSPUT_PLD_IRQ_BASE + 25) /* reserved */
134#define PLD_IRQ_INT26 (OPSPUT_PLD_IRQ_BASE + 26) /* reserved */
135#define PLD_IRQ_INT27 (OPSPUT_PLD_IRQ_BASE + 27) /* reserved */
136#define PLD_IRQ_INT28 (OPSPUT_PLD_IRQ_BASE + 28) /* reserved */
137#define PLD_IRQ_INT29 (OPSPUT_PLD_IRQ_BASE + 29) /* reserved */
138#define PLD_IRQ_INT30 (OPSPUT_PLD_IRQ_BASE + 30) /* reserved */
139
140#endif /* CONFIG_PLAT_USRV */
141
142#define PLD_ICUISTS __reg16(PLD_BASE + 0x8002)
143#define PLD_ICUISTS_VECB_MASK (0xf000)
144#define PLD_ICUISTS_VECB(x) ((x) & PLD_ICUISTS_VECB_MASK)
145#define PLD_ICUISTS_ISN_MASK (0x07c0)
146#define PLD_ICUISTS_ISN(x) ((x) & PLD_ICUISTS_ISN_MASK)
147#define PLD_ICUIREQ0 __reg16(PLD_BASE + 0x8004)
148#define PLD_ICUIREQ1 __reg16(PLD_BASE + 0x8006)
149#define PLD_ICUCR1 __reg16(PLD_BASE + 0x8100)
150#define PLD_ICUCR2 __reg16(PLD_BASE + 0x8102)
151#define PLD_ICUCR3 __reg16(PLD_BASE + 0x8104)
152#define PLD_ICUCR4 __reg16(PLD_BASE + 0x8106)
153#define PLD_ICUCR5 __reg16(PLD_BASE + 0x8108)
154#define PLD_ICUCR6 __reg16(PLD_BASE + 0x810a)
155#define PLD_ICUCR7 __reg16(PLD_BASE + 0x810c)
156#define PLD_ICUCR8 __reg16(PLD_BASE + 0x810e)
157#define PLD_ICUCR9 __reg16(PLD_BASE + 0x8110)
158#define PLD_ICUCR10 __reg16(PLD_BASE + 0x8112)
159#define PLD_ICUCR11 __reg16(PLD_BASE + 0x8114)
160#define PLD_ICUCR12 __reg16(PLD_BASE + 0x8116)
161#define PLD_ICUCR13 __reg16(PLD_BASE + 0x8118)
162#define PLD_ICUCR14 __reg16(PLD_BASE + 0x811a)
163#define PLD_ICUCR15 __reg16(PLD_BASE + 0x811c)
164#define PLD_ICUCR16 __reg16(PLD_BASE + 0x811e)
165#define PLD_ICUCR17 __reg16(PLD_BASE + 0x8120)
166#define PLD_ICUCR_IEN (0x1000)
167#define PLD_ICUCR_IREQ (0x0100)
168#define PLD_ICUCR_ISMOD00 (0x0000) /* Low edge */
169#define PLD_ICUCR_ISMOD01 (0x0010) /* Low level */
170#define PLD_ICUCR_ISMOD02 (0x0020) /* High edge */
171#define PLD_ICUCR_ISMOD03 (0x0030) /* High level */
172#define PLD_ICUCR_ILEVEL0 (0x0000)
173#define PLD_ICUCR_ILEVEL1 (0x0001)
174#define PLD_ICUCR_ILEVEL2 (0x0002)
175#define PLD_ICUCR_ILEVEL3 (0x0003)
176#define PLD_ICUCR_ILEVEL4 (0x0004)
177#define PLD_ICUCR_ILEVEL5 (0x0005)
178#define PLD_ICUCR_ILEVEL6 (0x0006)
179#define PLD_ICUCR_ILEVEL7 (0x0007)
180
181/* Power Control of MMC and CF */
182#define PLD_CPCR __reg16(PLD_BASE + 0x14000)
183#define PLD_CPCR_CF 0x0001
184#define PLD_CPCR_MMC 0x0002
185
186/* LED Control
187 *
188 * 1: DIP swich side
189 * 2: Reset switch side
190 */
191#define PLD_IOLEDCR __reg16(PLD_BASE + 0x14002)
192#define PLD_IOLED_1_ON 0x001
193#define PLD_IOLED_1_OFF 0x000
194#define PLD_IOLED_2_ON 0x002
195#define PLD_IOLED_2_OFF 0x000
196
197/* DIP Switch
198 * 0: Write-protect of Flash Memory (0:protected, 1:non-protected)
199 * 1: -
200 * 2: -
201 * 3: -
202 */
203#define PLD_IOSWSTS __reg16(PLD_BASE + 0x14004)
204#define PLD_IOSWSTS_IOSW2 0x0200
205#define PLD_IOSWSTS_IOSW1 0x0100
206#define PLD_IOSWSTS_IOWP0 0x0001
207
208/* CRC */
209#define PLD_CRC7DATA __reg16(PLD_BASE + 0x18000)
210#define PLD_CRC7INDATA __reg16(PLD_BASE + 0x18002)
211#define PLD_CRC16DATA __reg16(PLD_BASE + 0x18004)
212#define PLD_CRC16INDATA __reg16(PLD_BASE + 0x18006)
213#define PLD_CRC16ADATA __reg16(PLD_BASE + 0x18008)
214#define PLD_CRC16AINDATA __reg16(PLD_BASE + 0x1800a)
215
216/* RTC */
217#define PLD_RTCCR __reg16(PLD_BASE + 0x1c000)
218#define PLD_RTCBAUR __reg16(PLD_BASE + 0x1c002)
219#define PLD_RTCWRDATA __reg16(PLD_BASE + 0x1c004)
220#define PLD_RTCRDDATA __reg16(PLD_BASE + 0x1c006)
221#define PLD_RTCRSTODT __reg16(PLD_BASE + 0x1c008)
222
223/* SIO0 */
224#define PLD_ESIO0CR __reg16(PLD_BASE + 0x20000)
225#define PLD_ESIO0CR_TXEN 0x0001
226#define PLD_ESIO0CR_RXEN 0x0002
227#define PLD_ESIO0MOD0 __reg16(PLD_BASE + 0x20002)
228#define PLD_ESIO0MOD0_CTSS 0x0040
229#define PLD_ESIO0MOD0_RTSS 0x0080
230#define PLD_ESIO0MOD1 __reg16(PLD_BASE + 0x20004)
231#define PLD_ESIO0MOD1_LMFS 0x0010
232#define PLD_ESIO0STS __reg16(PLD_BASE + 0x20006)
233#define PLD_ESIO0STS_TEMP 0x0001
234#define PLD_ESIO0STS_TXCP 0x0002
235#define PLD_ESIO0STS_RXCP 0x0004
236#define PLD_ESIO0STS_TXSC 0x0100
237#define PLD_ESIO0STS_RXSC 0x0200
238#define PLD_ESIO0STS_TXREADY (PLD_ESIO0STS_TXCP | PLD_ESIO0STS_TEMP)
239#define PLD_ESIO0INTCR __reg16(PLD_BASE + 0x20008)
240#define PLD_ESIO0INTCR_TXIEN 0x0002
241#define PLD_ESIO0INTCR_RXCEN 0x0004
242#define PLD_ESIO0BAUR __reg16(PLD_BASE + 0x2000a)
243#define PLD_ESIO0TXB __reg16(PLD_BASE + 0x2000c)
244#define PLD_ESIO0RXB __reg16(PLD_BASE + 0x2000e)
245
246/* SIM Card */
247#define PLD_SCCR __reg16(PLD_BASE + 0x38000)
248#define PLD_SCMOD __reg16(PLD_BASE + 0x38004)
249#define PLD_SCSTS __reg16(PLD_BASE + 0x38006)
250#define PLD_SCINTCR __reg16(PLD_BASE + 0x38008)
251#define PLD_SCBAUR __reg16(PLD_BASE + 0x3800a)
252#define PLD_SCTXB __reg16(PLD_BASE + 0x3800c)
253#define PLD_SCRXB __reg16(PLD_BASE + 0x3800e)
254
255#endif /* _OPSPUT_OPSPUT_PLD.H */
diff --git a/include/asm-m32r/page.h b/include/asm-m32r/page.h
deleted file mode 100644
index c9333089fe11..000000000000
--- a/include/asm-m32r/page.h
+++ /dev/null
@@ -1,87 +0,0 @@
1#ifndef _ASM_M32R_PAGE_H
2#define _ASM_M32R_PAGE_H
3
4/* PAGE_SHIFT determines the page size */
5#define PAGE_SHIFT 12
6#define PAGE_SIZE (1UL << PAGE_SHIFT)
7#define PAGE_MASK (~(PAGE_SIZE-1))
8
9#ifndef __ASSEMBLY__
10
11extern void clear_page(void *to);
12extern void copy_page(void *to, void *from);
13
14#define clear_user_page(page, vaddr, pg) clear_page(page)
15#define copy_user_page(to, from, vaddr, pg) copy_page(to, from)
16
17#define __alloc_zeroed_user_highpage(movableflags, vma, vaddr) \
18 alloc_page_vma(GFP_HIGHUSER | __GFP_ZERO | movableflags, vma, vaddr)
19#define __HAVE_ARCH_ALLOC_ZEROED_USER_HIGHPAGE
20
21/*
22 * These are used to make use of C type-checking..
23 */
24typedef struct { unsigned long pte; } pte_t;
25typedef struct { unsigned long pmd; } pmd_t;
26typedef struct { unsigned long pgd; } pgd_t;
27#define pte_val(x) ((x).pte)
28#define PTE_MASK PAGE_MASK
29
30typedef struct { unsigned long pgprot; } pgprot_t;
31typedef struct page *pgtable_t;
32
33#define pmd_val(x) ((x).pmd)
34#define pgd_val(x) ((x).pgd)
35#define pgprot_val(x) ((x).pgprot)
36
37#define __pte(x) ((pte_t) { (x) } )
38#define __pmd(x) ((pmd_t) { (x) } )
39#define __pgd(x) ((pgd_t) { (x) } )
40#define __pgprot(x) ((pgprot_t) { (x) } )
41
42#endif /* !__ASSEMBLY__ */
43
44/*
45 * This handles the memory map.. We could make this a config
46 * option, but too many people screw it up, and too few need
47 * it.
48 *
49 * A __PAGE_OFFSET of 0xC0000000 means that the kernel has
50 * a virtual address space of one gigabyte, which limits the
51 * amount of physical memory you can use to about 950MB.
52 *
53 * If you want more physical memory than this then see the CONFIG_HIGHMEM4G
54 * and CONFIG_HIGHMEM64G options in the kernel configuration.
55 */
56
57#define __MEMORY_START CONFIG_MEMORY_START
58#define __MEMORY_SIZE CONFIG_MEMORY_SIZE
59
60#ifdef CONFIG_MMU
61#define __PAGE_OFFSET (0x80000000)
62#else
63#define __PAGE_OFFSET (0x00000000)
64#endif
65
66#define PAGE_OFFSET ((unsigned long)__PAGE_OFFSET)
67#define __pa(x) ((unsigned long)(x) - PAGE_OFFSET)
68#define __va(x) ((void *)((unsigned long)(x) + PAGE_OFFSET))
69
70#ifndef CONFIG_DISCONTIGMEM
71#define PFN_BASE (CONFIG_MEMORY_START >> PAGE_SHIFT)
72#define ARCH_PFN_OFFSET PFN_BASE
73#define pfn_valid(pfn) (((pfn) - PFN_BASE) < max_mapnr)
74#endif /* !CONFIG_DISCONTIGMEM */
75
76#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
77#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
78
79#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \
80 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC )
81
82#define devmem_is_allowed(x) 1
83
84#include <asm-generic/memory_model.h>
85#include <asm-generic/page.h>
86
87#endif /* _ASM_M32R_PAGE_H */
diff --git a/include/asm-m32r/param.h b/include/asm-m32r/param.h
deleted file mode 100644
index 94c770196048..000000000000
--- a/include/asm-m32r/param.h
+++ /dev/null
@@ -1,23 +0,0 @@
1#ifndef _ASM_M32R_PARAM_H
2#define _ASM_M32R_PARAM_H
3
4#ifdef __KERNEL__
5# define HZ CONFIG_HZ /* Internal kernel timer frequency */
6# define USER_HZ 100 /* .. some user interfaces are in "ticks" */
7# define CLOCKS_PER_SEC (USER_HZ) /* like times() */
8#endif
9
10#ifndef HZ
11#define HZ 100
12#endif
13
14#define EXEC_PAGESIZE 4096
15
16#ifndef NOGROUP
17#define NOGROUP (-1)
18#endif
19
20#define MAXHOSTNAMELEN 64 /* max length of hostname */
21
22#endif /* _ASM_M32R_PARAM_H */
23
diff --git a/include/asm-m32r/pci.h b/include/asm-m32r/pci.h
deleted file mode 100644
index fe785d167db6..000000000000
--- a/include/asm-m32r/pci.h
+++ /dev/null
@@ -1,8 +0,0 @@
1#ifndef _ASM_M32R_PCI_H
2#define _ASM_M32R_PCI_H
3
4#include <asm-generic/pci.h>
5
6#define PCI_DMA_BUS_IS_PHYS (1)
7
8#endif /* _ASM_M32R_PCI_H */
diff --git a/include/asm-m32r/percpu.h b/include/asm-m32r/percpu.h
deleted file mode 100644
index e3169301fe66..000000000000
--- a/include/asm-m32r/percpu.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __ARCH_M32R_PERCPU__
2#define __ARCH_M32R_PERCPU__
3
4#include <asm-generic/percpu.h>
5
6#endif /* __ARCH_M32R_PERCPU__ */
diff --git a/include/asm-m32r/pgalloc.h b/include/asm-m32r/pgalloc.h
deleted file mode 100644
index f11a2b909cdb..000000000000
--- a/include/asm-m32r/pgalloc.h
+++ /dev/null
@@ -1,76 +0,0 @@
1#ifndef _ASM_M32R_PGALLOC_H
2#define _ASM_M32R_PGALLOC_H
3
4#include <linux/mm.h>
5
6#include <asm/io.h>
7
8#define pmd_populate_kernel(mm, pmd, pte) \
9 set_pmd(pmd, __pmd(_PAGE_TABLE + __pa(pte)))
10
11static __inline__ void pmd_populate(struct mm_struct *mm, pmd_t *pmd,
12 pgtable_t pte)
13{
14 set_pmd(pmd, __pmd(_PAGE_TABLE + page_to_phys(pte)));
15}
16#define pmd_pgtable(pmd) pmd_page(pmd)
17
18/*
19 * Allocate and free page tables.
20 */
21static __inline__ pgd_t *pgd_alloc(struct mm_struct *mm)
22{
23 pgd_t *pgd = (pgd_t *)__get_free_page(GFP_KERNEL|__GFP_ZERO);
24
25 return pgd;
26}
27
28static inline void pgd_free(struct mm_struct *mm, pgd_t *pgd)
29{
30 free_page((unsigned long)pgd);
31}
32
33static __inline__ pte_t *pte_alloc_one_kernel(struct mm_struct *mm,
34 unsigned long address)
35{
36 pte_t *pte = (pte_t *)__get_free_page(GFP_KERNEL|__GFP_ZERO);
37
38 return pte;
39}
40
41static __inline__ pgtable_t pte_alloc_one(struct mm_struct *mm,
42 unsigned long address)
43{
44 struct page *pte = alloc_page(GFP_KERNEL|__GFP_ZERO);
45
46 pgtable_page_ctor(pte);
47 return pte;
48}
49
50static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
51{
52 free_page((unsigned long)pte);
53}
54
55static inline void pte_free(struct mm_struct *mm, pgtable_t pte)
56{
57 pgtable_page_dtor(pte);
58 __free_page(pte);
59}
60
61#define __pte_free_tlb(tlb, pte) pte_free((tlb)->mm, (pte))
62
63/*
64 * allocating and freeing a pmd is trivial: the 1-entry pmd is
65 * inside the pgd, so has no extra memory associated with it.
66 * (In the PAE case we free the pmds as part of the pgd.)
67 */
68
69#define pmd_alloc_one(mm, addr) ({ BUG(); ((pmd_t *)2); })
70#define pmd_free(mm, x) do { } while (0)
71#define __pmd_free_tlb(tlb, x) do { } while (0)
72#define pgd_populate(mm, pmd, pte) BUG()
73
74#define check_pgt_cache() do { } while (0)
75
76#endif /* _ASM_M32R_PGALLOC_H */
diff --git a/include/asm-m32r/pgtable-2level.h b/include/asm-m32r/pgtable-2level.h
deleted file mode 100644
index bca3475f9595..000000000000
--- a/include/asm-m32r/pgtable-2level.h
+++ /dev/null
@@ -1,78 +0,0 @@
1#ifndef _ASM_M32R_PGTABLE_2LEVEL_H
2#define _ASM_M32R_PGTABLE_2LEVEL_H
3#ifdef __KERNEL__
4
5/*
6 * traditional M32R two-level paging structure:
7 */
8
9#define PGDIR_SHIFT 22
10#define PTRS_PER_PGD 1024
11
12/*
13 * the M32R is two-level, so we don't really have any
14 * PMD directory physically.
15 */
16#define PMD_SHIFT 22
17#define PTRS_PER_PMD 1
18
19#define PTRS_PER_PTE 1024
20
21#define pte_ERROR(e) \
22 printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
23#define pmd_ERROR(e) \
24 printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e))
25#define pgd_ERROR(e) \
26 printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
27
28/*
29 * The "pgd_xxx()" functions here are trivial for a folded two-level
30 * setup: the pgd is never bad, and a pmd always exists (as it's folded
31 * into the pgd entry)
32 */
33static inline int pgd_none(pgd_t pgd) { return 0; }
34static inline int pgd_bad(pgd_t pgd) { return 0; }
35static inline int pgd_present(pgd_t pgd) { return 1; }
36#define pgd_clear(xp) do { } while (0)
37
38/*
39 * Certain architectures need to do special things when PTEs
40 * within a page table are directly modified. Thus, the following
41 * hook is made available.
42 */
43#define set_pte(pteptr, pteval) (*(pteptr) = pteval)
44#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
45
46/*
47 * (pmds are folded into pgds so this doesnt get actually called,
48 * but the define is needed for a generic inline function.)
49 */
50#define set_pmd(pmdptr, pmdval) (*(pmdptr) = pmdval)
51#define set_pgd(pgdptr, pgdval) (*(pgdptr) = pgdval)
52
53#define pgd_page_vaddr(pgd) \
54((unsigned long) __va(pgd_val(pgd) & PAGE_MASK))
55
56#ifndef CONFIG_DISCONTIGMEM
57#define pgd_page(pgd) (mem_map + ((pgd_val(pgd) >> PAGE_SHIFT) - PFN_BASE))
58#endif /* !CONFIG_DISCONTIGMEM */
59
60static inline pmd_t *pmd_offset(pgd_t * dir, unsigned long address)
61{
62 return (pmd_t *) dir;
63}
64
65#define ptep_get_and_clear(mm,addr,xp) __pte(xchg(&(xp)->pte, 0))
66#define pte_same(a, b) (pte_val(a) == pte_val(b))
67#define pte_page(x) pfn_to_page(pte_pfn(x))
68#define pte_none(x) (!pte_val(x))
69#define pte_pfn(x) (pte_val(x) >> PAGE_SHIFT)
70#define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
71#define pfn_pmd(pfn, prot) __pmd(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
72
73#define PTE_FILE_MAX_BITS 29
74#define pte_to_pgoff(pte) (((pte_val(pte) >> 2) & 0x7f) | (((pte_val(pte) >> 10)) << 7))
75#define pgoff_to_pte(off) ((pte_t) { (((off) & 0x7f) << 2) | (((off) >> 7) << 10) | _PAGE_FILE })
76
77#endif /* __KERNEL__ */
78#endif /* _ASM_M32R_PGTABLE_2LEVEL_H */
diff --git a/include/asm-m32r/pgtable.h b/include/asm-m32r/pgtable.h
deleted file mode 100644
index e6359c566b50..000000000000
--- a/include/asm-m32r/pgtable.h
+++ /dev/null
@@ -1,363 +0,0 @@
1#ifndef _ASM_M32R_PGTABLE_H
2#define _ASM_M32R_PGTABLE_H
3
4#include <asm-generic/4level-fixup.h>
5
6#ifdef __KERNEL__
7/*
8 * The Linux memory management assumes a three-level page table setup. On
9 * the M32R, we use that, but "fold" the mid level into the top-level page
10 * table, so that we physically have the same two-level page table as the
11 * M32R mmu expects.
12 *
13 * This file contains the functions and defines necessary to modify and use
14 * the M32R page table tree.
15 */
16
17/* CAUTION!: If you change macro definitions in this file, you might have to
18 * change arch/m32r/mmu.S manually.
19 */
20
21#ifndef __ASSEMBLY__
22
23#include <linux/threads.h>
24#include <linux/bitops.h>
25#include <asm/processor.h>
26#include <asm/addrspace.h>
27#include <asm/page.h>
28
29struct mm_struct;
30struct vm_area_struct;
31
32extern pgd_t swapper_pg_dir[1024];
33extern void paging_init(void);
34
35/*
36 * ZERO_PAGE is a global shared page that is always zero: used
37 * for zero-mapped memory areas etc..
38 */
39extern unsigned long empty_zero_page[1024];
40#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
41
42#endif /* !__ASSEMBLY__ */
43
44#ifndef __ASSEMBLY__
45#include <asm/pgtable-2level.h>
46#endif
47
48#define pgtable_cache_init() do { } while (0)
49
50#define PMD_SIZE (1UL << PMD_SHIFT)
51#define PMD_MASK (~(PMD_SIZE - 1))
52#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
53#define PGDIR_MASK (~(PGDIR_SIZE - 1))
54
55#define USER_PTRS_PER_PGD (TASK_SIZE / PGDIR_SIZE)
56#define FIRST_USER_ADDRESS 0
57
58#ifndef __ASSEMBLY__
59/* Just any arbitrary offset to the start of the vmalloc VM area: the
60 * current 8MB value just means that there will be a 8MB "hole" after the
61 * physical memory until the kernel virtual memory starts. That means that
62 * any out-of-bounds memory accesses will hopefully be caught.
63 * The vmalloc() routines leaves a hole of 4kB between each vmalloced
64 * area for the same reason. ;)
65 */
66#define VMALLOC_START KSEG2
67#define VMALLOC_END KSEG3
68
69/*
70 * M32R TLB format
71 *
72 * [0] [1:19] [20:23] [24:31]
73 * +-----------------------+----+-------------+
74 * | VPN |0000| ASID |
75 * +-----------------------+----+-------------+
76 * +-+---------------------+----+-+---+-+-+-+-+
77 * |0 PPN |0000|N|AC |L|G|V| |
78 * +-+---------------------+----+-+---+-+-+-+-+
79 * RWX
80 */
81
82#define _PAGE_BIT_DIRTY 0 /* software: page changed */
83#define _PAGE_BIT_FILE 0 /* when !present: nonlinear file
84 mapping */
85#define _PAGE_BIT_PRESENT 1 /* Valid: page is valid */
86#define _PAGE_BIT_GLOBAL 2 /* Global */
87#define _PAGE_BIT_LARGE 3 /* Large */
88#define _PAGE_BIT_EXEC 4 /* Execute */
89#define _PAGE_BIT_WRITE 5 /* Write */
90#define _PAGE_BIT_READ 6 /* Read */
91#define _PAGE_BIT_NONCACHABLE 7 /* Non cachable */
92#define _PAGE_BIT_ACCESSED 8 /* software: page referenced */
93#define _PAGE_BIT_PROTNONE 9 /* software: if not present */
94
95#define _PAGE_DIRTY (1UL << _PAGE_BIT_DIRTY)
96#define _PAGE_FILE (1UL << _PAGE_BIT_FILE)
97#define _PAGE_PRESENT (1UL << _PAGE_BIT_PRESENT)
98#define _PAGE_GLOBAL (1UL << _PAGE_BIT_GLOBAL)
99#define _PAGE_LARGE (1UL << _PAGE_BIT_LARGE)
100#define _PAGE_EXEC (1UL << _PAGE_BIT_EXEC)
101#define _PAGE_WRITE (1UL << _PAGE_BIT_WRITE)
102#define _PAGE_READ (1UL << _PAGE_BIT_READ)
103#define _PAGE_NONCACHABLE (1UL << _PAGE_BIT_NONCACHABLE)
104#define _PAGE_ACCESSED (1UL << _PAGE_BIT_ACCESSED)
105#define _PAGE_PROTNONE (1UL << _PAGE_BIT_PROTNONE)
106
107#define _PAGE_TABLE \
108 ( _PAGE_PRESENT | _PAGE_WRITE | _PAGE_READ | _PAGE_ACCESSED \
109 | _PAGE_DIRTY )
110#define _KERNPG_TABLE \
111 ( _PAGE_PRESENT | _PAGE_WRITE | _PAGE_READ | _PAGE_ACCESSED \
112 | _PAGE_DIRTY )
113#define _PAGE_CHG_MASK \
114 ( PTE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY )
115
116#ifdef CONFIG_MMU
117#define PAGE_NONE \
118 __pgprot(_PAGE_PROTNONE | _PAGE_ACCESSED)
119#define PAGE_SHARED \
120 __pgprot(_PAGE_PRESENT | _PAGE_WRITE | _PAGE_READ | _PAGE_ACCESSED)
121#define PAGE_SHARED_EXEC \
122 __pgprot(_PAGE_PRESENT | _PAGE_EXEC | _PAGE_WRITE | _PAGE_READ \
123 | _PAGE_ACCESSED)
124#define PAGE_COPY \
125 __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_ACCESSED)
126#define PAGE_COPY_EXEC \
127 __pgprot(_PAGE_PRESENT | _PAGE_EXEC | _PAGE_READ | _PAGE_ACCESSED)
128#define PAGE_READONLY \
129 __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_ACCESSED)
130#define PAGE_READONLY_EXEC \
131 __pgprot(_PAGE_PRESENT | _PAGE_EXEC | _PAGE_READ | _PAGE_ACCESSED)
132
133#define __PAGE_KERNEL \
134 ( _PAGE_PRESENT | _PAGE_EXEC | _PAGE_WRITE | _PAGE_READ | _PAGE_DIRTY \
135 | _PAGE_ACCESSED )
136#define __PAGE_KERNEL_RO ( __PAGE_KERNEL & ~_PAGE_WRITE )
137#define __PAGE_KERNEL_NOCACHE ( __PAGE_KERNEL | _PAGE_NONCACHABLE)
138
139#define MAKE_GLOBAL(x) __pgprot((x) | _PAGE_GLOBAL)
140
141#define PAGE_KERNEL MAKE_GLOBAL(__PAGE_KERNEL)
142#define PAGE_KERNEL_RO MAKE_GLOBAL(__PAGE_KERNEL_RO)
143#define PAGE_KERNEL_NOCACHE MAKE_GLOBAL(__PAGE_KERNEL_NOCACHE)
144
145#else
146#define PAGE_NONE __pgprot(0)
147#define PAGE_SHARED __pgprot(0)
148#define PAGE_SHARED_EXEC __pgprot(0)
149#define PAGE_COPY __pgprot(0)
150#define PAGE_COPY_EXEC __pgprot(0)
151#define PAGE_READONLY __pgprot(0)
152#define PAGE_READONLY_EXEC __pgprot(0)
153
154#define PAGE_KERNEL __pgprot(0)
155#define PAGE_KERNEL_RO __pgprot(0)
156#define PAGE_KERNEL_NOCACHE __pgprot(0)
157#endif /* CONFIG_MMU */
158
159 /* xwr */
160#define __P000 PAGE_NONE
161#define __P001 PAGE_READONLY
162#define __P010 PAGE_COPY
163#define __P011 PAGE_COPY
164#define __P100 PAGE_READONLY_EXEC
165#define __P101 PAGE_READONLY_EXEC
166#define __P110 PAGE_COPY_EXEC
167#define __P111 PAGE_COPY_EXEC
168
169#define __S000 PAGE_NONE
170#define __S001 PAGE_READONLY
171#define __S010 PAGE_SHARED
172#define __S011 PAGE_SHARED
173#define __S100 PAGE_READONLY_EXEC
174#define __S101 PAGE_READONLY_EXEC
175#define __S110 PAGE_SHARED_EXEC
176#define __S111 PAGE_SHARED_EXEC
177
178/* page table for 0-4MB for everybody */
179
180#define pte_present(x) (pte_val(x) & (_PAGE_PRESENT | _PAGE_PROTNONE))
181#define pte_clear(mm,addr,xp) do { set_pte_at(mm, addr, xp, __pte(0)); } while (0)
182
183#define pmd_none(x) (!pmd_val(x))
184#define pmd_present(x) (pmd_val(x) & _PAGE_PRESENT)
185#define pmd_clear(xp) do { set_pmd(xp, __pmd(0)); } while (0)
186#define pmd_bad(x) ((pmd_val(x) & ~PAGE_MASK) != _KERNPG_TABLE)
187
188#define pages_to_mb(x) ((x) >> (20 - PAGE_SHIFT))
189
190/*
191 * The following only work if pte_present() is true.
192 * Undefined behaviour if not..
193 */
194static inline int pte_dirty(pte_t pte)
195{
196 return pte_val(pte) & _PAGE_DIRTY;
197}
198
199static inline int pte_young(pte_t pte)
200{
201 return pte_val(pte) & _PAGE_ACCESSED;
202}
203
204static inline int pte_write(pte_t pte)
205{
206 return pte_val(pte) & _PAGE_WRITE;
207}
208
209/*
210 * The following only works if pte_present() is not true.
211 */
212static inline int pte_file(pte_t pte)
213{
214 return pte_val(pte) & _PAGE_FILE;
215}
216
217static inline int pte_special(pte_t pte)
218{
219 return 0;
220}
221
222static inline pte_t pte_mkclean(pte_t pte)
223{
224 pte_val(pte) &= ~_PAGE_DIRTY;
225 return pte;
226}
227
228static inline pte_t pte_mkold(pte_t pte)
229{
230 pte_val(pte) &= ~_PAGE_ACCESSED;
231 return pte;
232}
233
234static inline pte_t pte_wrprotect(pte_t pte)
235{
236 pte_val(pte) &= ~_PAGE_WRITE;
237 return pte;
238}
239
240static inline pte_t pte_mkdirty(pte_t pte)
241{
242 pte_val(pte) |= _PAGE_DIRTY;
243 return pte;
244}
245
246static inline pte_t pte_mkyoung(pte_t pte)
247{
248 pte_val(pte) |= _PAGE_ACCESSED;
249 return pte;
250}
251
252static inline pte_t pte_mkwrite(pte_t pte)
253{
254 pte_val(pte) |= _PAGE_WRITE;
255 return pte;
256}
257
258static inline pte_t pte_mkspecial(pte_t pte)
259{
260 return pte;
261}
262
263static inline int ptep_test_and_clear_young(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep)
264{
265 return test_and_clear_bit(_PAGE_BIT_ACCESSED, ptep);
266}
267
268static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
269{
270 clear_bit(_PAGE_BIT_WRITE, ptep);
271}
272
273/*
274 * Macro and implementation to make a page protection as uncachable.
275 */
276static inline pgprot_t pgprot_noncached(pgprot_t _prot)
277{
278 unsigned long prot = pgprot_val(_prot);
279
280 prot |= _PAGE_NONCACHABLE;
281 return __pgprot(prot);
282}
283
284#define pgprot_writecombine(prot) pgprot_noncached(prot)
285
286/*
287 * Conversion functions: convert a page and protection to a page entry,
288 * and a page entry and page directory to the page they refer to.
289 */
290#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), pgprot)
291
292static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
293{
294 set_pte(&pte, __pte((pte_val(pte) & _PAGE_CHG_MASK) \
295 | pgprot_val(newprot)));
296
297 return pte;
298}
299
300/*
301 * Conversion functions: convert a page and protection to a page entry,
302 * and a page entry and page directory to the page they refer to.
303 */
304
305static inline void pmd_set(pmd_t * pmdp, pte_t * ptep)
306{
307 pmd_val(*pmdp) = (((unsigned long) ptep) & PAGE_MASK);
308}
309
310#define pmd_page_vaddr(pmd) \
311 ((unsigned long) __va(pmd_val(pmd) & PAGE_MASK))
312
313#ifndef CONFIG_DISCONTIGMEM
314#define pmd_page(pmd) (mem_map + ((pmd_val(pmd) >> PAGE_SHIFT) - PFN_BASE))
315#endif /* !CONFIG_DISCONTIGMEM */
316
317/* to find an entry in a page-table-directory. */
318#define pgd_index(address) \
319 (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
320
321#define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
322
323/* to find an entry in a kernel page-table-directory */
324#define pgd_offset_k(address) pgd_offset(&init_mm, address)
325
326#define pmd_index(address) \
327 (((address) >> PMD_SHIFT) & (PTRS_PER_PMD - 1))
328
329#define pte_index(address) \
330 (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
331#define pte_offset_kernel(dir, address) \
332 ((pte_t *)pmd_page_vaddr(*(dir)) + pte_index(address))
333#define pte_offset_map(dir, address) \
334 ((pte_t *)page_address(pmd_page(*(dir))) + pte_index(address))
335#define pte_offset_map_nested(dir, address) pte_offset_map(dir, address)
336#define pte_unmap(pte) do { } while (0)
337#define pte_unmap_nested(pte) do { } while (0)
338
339/* Encode and de-code a swap entry */
340#define __swp_type(x) (((x).val >> 2) & 0x1f)
341#define __swp_offset(x) ((x).val >> 10)
342#define __swp_entry(type, offset) \
343 ((swp_entry_t) { ((type) << 2) | ((offset) << 10) })
344#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
345#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
346
347#endif /* !__ASSEMBLY__ */
348
349/* Needs to be defined here and not in linux/mm.h, as it is arch dependent */
350#define kern_addr_valid(addr) (1)
351
352#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
353 remap_pfn_range(vma, vaddr, pfn, size, prot)
354
355#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
356#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
357#define __HAVE_ARCH_PTEP_SET_WRPROTECT
358#define __HAVE_ARCH_PTE_SAME
359#include <asm-generic/pgtable.h>
360
361#endif /* __KERNEL__ */
362
363#endif /* _ASM_M32R_PGTABLE_H */
diff --git a/include/asm-m32r/poll.h b/include/asm-m32r/poll.h
deleted file mode 100644
index c98509d3149e..000000000000
--- a/include/asm-m32r/poll.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/poll.h>
diff --git a/include/asm-m32r/posix_types.h b/include/asm-m32r/posix_types.h
deleted file mode 100644
index b309c5858637..000000000000
--- a/include/asm-m32r/posix_types.h
+++ /dev/null
@@ -1,118 +0,0 @@
1#ifndef _ASM_M32R_POSIX_TYPES_H
2#define _ASM_M32R_POSIX_TYPES_H
3
4/*
5 * This file is generally used by user-level software, so you need to
6 * be a little careful about namespace pollution etc. Also, we cannot
7 * assume GCC is being used.
8 */
9
10typedef unsigned long __kernel_ino_t;
11typedef unsigned short __kernel_mode_t;
12typedef unsigned short __kernel_nlink_t;
13typedef long __kernel_off_t;
14typedef int __kernel_pid_t;
15typedef unsigned short __kernel_ipc_pid_t;
16typedef unsigned short __kernel_uid_t;
17typedef unsigned short __kernel_gid_t;
18typedef unsigned int __kernel_size_t;
19typedef int __kernel_ssize_t;
20typedef int __kernel_ptrdiff_t;
21typedef long __kernel_time_t;
22typedef long __kernel_suseconds_t;
23typedef long __kernel_clock_t;
24typedef int __kernel_timer_t;
25typedef int __kernel_clockid_t;
26typedef int __kernel_daddr_t;
27typedef char * __kernel_caddr_t;
28typedef unsigned short __kernel_uid16_t;
29typedef unsigned short __kernel_gid16_t;
30typedef unsigned int __kernel_uid32_t;
31typedef unsigned int __kernel_gid32_t;
32
33typedef unsigned short __kernel_old_uid_t;
34typedef unsigned short __kernel_old_gid_t;
35typedef unsigned short __kernel_old_dev_t;
36
37#ifdef __GNUC__
38typedef long long __kernel_loff_t;
39#endif
40
41typedef struct {
42 int val[2];
43} __kernel_fsid_t;
44
45#if defined(__KERNEL__)
46
47#undef __FD_SET
48static __inline__ void __FD_SET(unsigned long __fd, __kernel_fd_set *__fdsetp)
49{
50 unsigned long __tmp = __fd / __NFDBITS;
51 unsigned long __rem = __fd % __NFDBITS;
52 __fdsetp->fds_bits[__tmp] |= (1UL<<__rem);
53}
54
55#undef __FD_CLR
56static __inline__ void __FD_CLR(unsigned long __fd, __kernel_fd_set *__fdsetp)
57{
58 unsigned long __tmp = __fd / __NFDBITS;
59 unsigned long __rem = __fd % __NFDBITS;
60 __fdsetp->fds_bits[__tmp] &= ~(1UL<<__rem);
61}
62
63
64#undef __FD_ISSET
65static __inline__ int __FD_ISSET(unsigned long __fd, const __kernel_fd_set *__p)
66{
67 unsigned long __tmp = __fd / __NFDBITS;
68 unsigned long __rem = __fd % __NFDBITS;
69 return (__p->fds_bits[__tmp] & (1UL<<__rem)) != 0;
70}
71
72/*
73 * This will unroll the loop for the normal constant case (8 ints,
74 * for a 256-bit fd_set)
75 */
76#undef __FD_ZERO
77static __inline__ void __FD_ZERO(__kernel_fd_set *__p)
78{
79 unsigned long *__tmp = __p->fds_bits;
80 int __i;
81
82 if (__builtin_constant_p(__FDSET_LONGS)) {
83 switch (__FDSET_LONGS) {
84 case 16:
85 __tmp[ 0] = 0; __tmp[ 1] = 0;
86 __tmp[ 2] = 0; __tmp[ 3] = 0;
87 __tmp[ 4] = 0; __tmp[ 5] = 0;
88 __tmp[ 6] = 0; __tmp[ 7] = 0;
89 __tmp[ 8] = 0; __tmp[ 9] = 0;
90 __tmp[10] = 0; __tmp[11] = 0;
91 __tmp[12] = 0; __tmp[13] = 0;
92 __tmp[14] = 0; __tmp[15] = 0;
93 return;
94
95 case 8:
96 __tmp[ 0] = 0; __tmp[ 1] = 0;
97 __tmp[ 2] = 0; __tmp[ 3] = 0;
98 __tmp[ 4] = 0; __tmp[ 5] = 0;
99 __tmp[ 6] = 0; __tmp[ 7] = 0;
100 return;
101
102 case 4:
103 __tmp[ 0] = 0; __tmp[ 1] = 0;
104 __tmp[ 2] = 0; __tmp[ 3] = 0;
105 return;
106 }
107 }
108 __i = __FDSET_LONGS;
109 while (__i) {
110 __i--;
111 *__tmp = 0;
112 __tmp++;
113 }
114}
115
116#endif /* defined(__KERNEL__) */
117
118#endif /* _ASM_M32R_POSIX_TYPES_H */
diff --git a/include/asm-m32r/processor.h b/include/asm-m32r/processor.h
deleted file mode 100644
index 1a997fc148a2..000000000000
--- a/include/asm-m32r/processor.h
+++ /dev/null
@@ -1,147 +0,0 @@
1#ifndef _ASM_M32R_PROCESSOR_H
2#define _ASM_M32R_PROCESSOR_H
3
4/*
5 * include/asm-m32r/processor.h
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details.
10 *
11 * Copyright (C) 1994 Linus Torvalds
12 * Copyright (C) 2001 Hiroyuki Kondo, Hirokazu Takata, and Hitoshi Yamamoto
13 * Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org>
14 */
15
16#include <linux/kernel.h>
17#include <asm/cache.h>
18#include <asm/ptrace.h> /* pt_regs */
19
20/*
21 * Default implementation of macro that returns current
22 * instruction pointer ("program counter").
23 */
24#define current_text_addr() ({ __label__ _l; _l: &&_l; })
25
26/*
27 * CPU type and hardware bug flags. Kept separately for each CPU.
28 * Members of this structure are referenced in head.S, so think twice
29 * before touching them. [mj]
30 */
31
32struct cpuinfo_m32r {
33 unsigned long pgtable_cache_sz;
34 unsigned long cpu_clock;
35 unsigned long bus_clock;
36 unsigned long timer_divide;
37 unsigned long loops_per_jiffy;
38};
39
40/*
41 * capabilities of CPUs
42 */
43
44extern struct cpuinfo_m32r boot_cpu_data;
45
46#ifdef CONFIG_SMP
47extern struct cpuinfo_m32r cpu_data[];
48#define current_cpu_data cpu_data[smp_processor_id()]
49#else
50#define cpu_data (&boot_cpu_data)
51#define current_cpu_data boot_cpu_data
52#endif
53
54/*
55 * User space process size: 2GB (default).
56 */
57#ifdef CONFIG_MMU
58#define TASK_SIZE (0x80000000UL)
59#else
60#define TASK_SIZE (0x00400000UL)
61#endif
62
63#ifdef __KERNEL__
64#define STACK_TOP TASK_SIZE
65#define STACK_TOP_MAX STACK_TOP
66#endif
67
68/* This decides where the kernel will search for a free chunk of vm
69 * space during mmap's.
70 */
71#define TASK_UNMAPPED_BASE PAGE_ALIGN(TASK_SIZE / 3)
72
73typedef struct {
74 unsigned long seg;
75} mm_segment_t;
76
77#define MAX_TRAPS 10
78
79struct debug_trap {
80 int nr_trap;
81 unsigned long addr[MAX_TRAPS];
82 unsigned long insn[MAX_TRAPS];
83};
84
85struct thread_struct {
86 unsigned long address;
87 unsigned long trap_no; /* Trap number */
88 unsigned long error_code; /* Error code of trap */
89 unsigned long lr; /* saved pc */
90 unsigned long sp; /* user stack pointer */
91 struct debug_trap debug_trap;
92};
93
94#define INIT_SP (sizeof(init_stack) + (unsigned long) &init_stack)
95
96#define INIT_THREAD { \
97 .sp = INIT_SP, \
98}
99
100/*
101 * Do necessary setup to start up a newly executed thread.
102 */
103
104/* User process Backup PSW */
105#define USERPS_BPSW (M32R_PSW_BSM|M32R_PSW_BIE|M32R_PSW_BPM)
106
107#define start_thread(regs, new_pc, new_spu) \
108 do { \
109 set_fs(USER_DS); \
110 regs->psw = (regs->psw | USERPS_BPSW) & 0x0000FFFFUL; \
111 regs->bpc = new_pc; \
112 regs->spu = new_spu; \
113 } while (0)
114
115/* Forward declaration, a strange C thing */
116struct task_struct;
117struct mm_struct;
118
119/* Free all resources held by a thread. */
120extern void release_thread(struct task_struct *);
121
122#define prepare_to_copy(tsk) do { } while (0)
123
124/*
125 * create a kernel thread without removing it from tasklists
126 */
127extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
128
129/* Copy and release all segment info associated with a VM */
130extern void copy_segments(struct task_struct *p, struct mm_struct * mm);
131extern void release_segments(struct mm_struct * mm);
132
133extern unsigned long thread_saved_pc(struct task_struct *);
134
135/* Copy and release all segment info associated with a VM */
136#define copy_segments(p, mm) do { } while (0)
137#define release_segments(mm) do { } while (0)
138
139unsigned long get_wchan(struct task_struct *p);
140#define KSTK_EIP(tsk) ((tsk)->thread.lr)
141#define KSTK_ESP(tsk) ((tsk)->thread.sp)
142
143#define THREAD_SIZE (2*PAGE_SIZE)
144
145#define cpu_relax() barrier()
146
147#endif /* _ASM_M32R_PROCESSOR_H */
diff --git a/include/asm-m32r/ptrace.h b/include/asm-m32r/ptrace.h
deleted file mode 100644
index a0755b982028..000000000000
--- a/include/asm-m32r/ptrace.h
+++ /dev/null
@@ -1,148 +0,0 @@
1#ifndef _ASM_M32R_PTRACE_H
2#define _ASM_M32R_PTRACE_H
3
4/*
5 * linux/include/asm-m32r/ptrace.h
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details.
10 *
11 * M32R version:
12 * Copyright (C) 2001-2002, 2004 Hirokazu Takata <takata at linux-m32r.org>
13 */
14
15/* 0 - 13 are integer registers (general purpose registers). */
16#define PT_R4 0
17#define PT_R5 1
18#define PT_R6 2
19#define PT_REGS 3
20#define PT_R0 4
21#define PT_R1 5
22#define PT_R2 6
23#define PT_R3 7
24#define PT_R7 8
25#define PT_R8 9
26#define PT_R9 10
27#define PT_R10 11
28#define PT_R11 12
29#define PT_R12 13
30#define PT_SYSCNR 14
31#define PT_R13 PT_FP
32#define PT_R14 PT_LR
33#define PT_R15 PT_SP
34
35/* processor status and miscellaneous context registers. */
36#define PT_ACC0H 15
37#define PT_ACC0L 16
38#define PT_ACC1H 17 /* ISA_DSP_LEVEL2 only */
39#define PT_ACC1L 18 /* ISA_DSP_LEVEL2 only */
40#define PT_PSW 19
41#define PT_BPC 20
42#define PT_BBPSW 21
43#define PT_BBPC 22
44#define PT_SPU 23
45#define PT_FP 24
46#define PT_LR 25
47#define PT_SPI 26
48#define PT_ORIGR0 27
49
50/* virtual pt_reg entry for gdb */
51#define PT_PC 30
52#define PT_CBR 31
53#define PT_EVB 32
54
55
56/* Control registers. */
57#define SPR_CR0 PT_PSW
58#define SPR_CR1 PT_CBR /* read only */
59#define SPR_CR2 PT_SPI
60#define SPR_CR3 PT_SPU
61#define SPR_CR4
62#define SPR_CR5 PT_EVB /* part of M32R/E, M32R/I core only */
63#define SPR_CR6 PT_BPC
64#define SPR_CR7
65#define SPR_CR8 PT_BBPSW
66#define SPR_CR9
67#define SPR_CR10
68#define SPR_CR11
69#define SPR_CR12
70#define SPR_CR13 PT_WR
71#define SPR_CR14 PT_BBPC
72#define SPR_CR15
73
74/* this struct defines the way the registers are stored on the
75 stack during a system call. */
76struct pt_regs {
77 /* Saved main processor registers. */
78 unsigned long r4;
79 unsigned long r5;
80 unsigned long r6;
81 struct pt_regs *pt_regs;
82 unsigned long r0;
83 unsigned long r1;
84 unsigned long r2;
85 unsigned long r3;
86 unsigned long r7;
87 unsigned long r8;
88 unsigned long r9;
89 unsigned long r10;
90 unsigned long r11;
91 unsigned long r12;
92 long syscall_nr;
93
94 /* Saved main processor status and miscellaneous context registers. */
95 unsigned long acc0h;
96 unsigned long acc0l;
97 unsigned long acc1h; /* ISA_DSP_LEVEL2 only */
98 unsigned long acc1l; /* ISA_DSP_LEVEL2 only */
99 unsigned long psw;
100 unsigned long bpc; /* saved PC for TRAP syscalls */
101 unsigned long bbpsw;
102 unsigned long bbpc;
103 unsigned long spu; /* saved user stack */
104 unsigned long fp;
105 unsigned long lr; /* saved PC for JL syscalls */
106 unsigned long spi; /* saved kernel stack */
107 unsigned long orig_r0;
108};
109
110/* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */
111#define PTRACE_GETREGS 12
112#define PTRACE_SETREGS 13
113
114#define PTRACE_OLDSETOPTIONS 21
115
116/* options set using PTRACE_SETOPTIONS */
117#define PTRACE_O_TRACESYSGOOD 0x00000001
118
119#ifdef __KERNEL__
120
121#include <asm/m32r.h> /* M32R_PSW_BSM, M32R_PSW_BPM */
122
123struct task_struct;
124extern void init_debug_traps(struct task_struct *);
125#define arch_ptrace_attach(child) \
126 init_debug_traps(child)
127
128#if defined(CONFIG_ISA_M32R2) || defined(CONFIG_CHIP_VDEC2)
129#define user_mode(regs) ((M32R_PSW_BPM & (regs)->psw) != 0)
130#elif defined(CONFIG_ISA_M32R)
131#define user_mode(regs) ((M32R_PSW_BSM & (regs)->psw) != 0)
132#else
133#error unknown isa configuration
134#endif
135
136#define instruction_pointer(regs) ((regs)->bpc)
137#define profile_pc(regs) instruction_pointer(regs)
138
139extern void show_regs(struct pt_regs *);
140
141extern void withdraw_debug_trap(struct pt_regs *regs);
142
143#define task_pt_regs(task) \
144 ((struct pt_regs *)(task_stack_page(task) + THREAD_SIZE) - 1)
145
146#endif /* __KERNEL */
147
148#endif /* _ASM_M32R_PTRACE_H */
diff --git a/include/asm-m32r/resource.h b/include/asm-m32r/resource.h
deleted file mode 100644
index b1ce766e37a0..000000000000
--- a/include/asm-m32r/resource.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef _ASM_M32R_RESOURCE_H
2#define _ASM_M32R_RESOURCE_H
3
4#include <asm-generic/resource.h>
5
6#endif /* _ASM_M32R_RESOURCE_H */
diff --git a/include/asm-m32r/rtc.h b/include/asm-m32r/rtc.h
deleted file mode 100644
index 0340633f3f4d..000000000000
--- a/include/asm-m32r/rtc.h
+++ /dev/null
@@ -1,65 +0,0 @@
1#ifndef __RTC_H__
2#define __RTC_H__
3
4 /* Dallas DS1302 clock/calendar register numbers. */
5# define RTC_SECONDS 0
6# define RTC_MINUTES 1
7# define RTC_HOURS 2
8# define RTC_DAY_OF_MONTH 3
9# define RTC_MONTH 4
10# define RTC_WEEKDAY 5
11# define RTC_YEAR 6
12# define RTC_CONTROL 7
13
14 /* Bits in CONTROL register. */
15# define RTC_CONTROL_WRITEPROTECT 0x80
16# define RTC_TRICKLECHARGER 8
17
18 /* Bits in TRICKLECHARGER register TCS TCS TCS TCS DS DS RS RS. */
19# define RTC_TCR_PATTERN 0xA0 /* 1010xxxx */
20# define RTC_TCR_1DIOD 0x04 /* xxxx01xx */
21# define RTC_TCR_2DIOD 0x08 /* xxxx10xx */
22# define RTC_TCR_DISABLED 0x00 /* xxxxxx00 Disabled */
23# define RTC_TCR_2KOHM 0x01 /* xxxxxx01 2KOhm */
24# define RTC_TCR_4KOHM 0x02 /* xxxxxx10 4kOhm */
25# define RTC_TCR_8KOHM 0x03 /* xxxxxx11 8kOhm */
26
27#ifdef CONFIG_DS1302
28extern unsigned char ds1302_readreg(int reg);
29extern void ds1302_writereg(int reg, unsigned char val);
30extern int ds1302_init(void);
31# define CMOS_READ(x) ds1302_readreg(x)
32# define CMOS_WRITE(val,reg) ds1302_writereg(reg,val)
33# define RTC_INIT() ds1302_init()
34#else
35 /* No RTC configured so we shouldn't try to access any. */
36# define CMOS_READ(x) 42
37# define CMOS_WRITE(x,y)
38# define RTC_INIT() (-1)
39#endif
40
41/*
42 * The struct used to pass data via the following ioctl. Similar to the
43 * struct tm in <time.h>, but it needs to be here so that the kernel
44 * source is self contained, allowing cross-compiles, etc. etc.
45 */
46struct rtc_time {
47 int tm_sec;
48 int tm_min;
49 int tm_hour;
50 int tm_mday;
51 int tm_mon;
52 int tm_year;
53 int tm_wday;
54 int tm_yday;
55 int tm_isdst;
56};
57
58/* ioctl() calls that are permitted to the /dev/rtc interface. */
59#define RTC_MAGIC 'p'
60#define RTC_RD_TIME _IOR(RTC_MAGIC, 0x09, struct rtc_time) /* Read RTC time. */
61#define RTC_SET_TIME _IOW(RTC_MAGIC, 0x0a, struct rtc_time) /* Set RTC time. */
62#define RTC_SET_CHARGE _IOW(RTC_MAGIC, 0x0b, int)
63#define RTC_MAX_IOCTL 0x0b
64
65#endif /* __RTC_H__ */
diff --git a/include/asm-m32r/s1d13806.h b/include/asm-m32r/s1d13806.h
deleted file mode 100644
index 248d36a82d79..000000000000
--- a/include/asm-m32r/s1d13806.h
+++ /dev/null
@@ -1,199 +0,0 @@
1//----------------------------------------------------------------------------
2//
3// File generated by S1D13806CFG.EXE
4//
5// Copyright (c) 2000,2001 Epson Research and Development, Inc.
6// All rights reserved.
7//
8//----------------------------------------------------------------------------
9
10// Panel: (active) 640x480 77Hz STN Single 8-bit (PCLK=CLKI=25.175MHz)
11// Memory: Embedded SDRAM (MCLK=CLKI3=50.000MHz) (BUSCLK=33.333MHz)
12
13#define SWIVEL_VIEW 0 /* 0:none, 1:90 not completed */
14
15static struct s1d13xxxfb_regval s1d13xxxfb_initregs[] = {
16
17 {0x0001,0x00}, // Miscellaneous Register
18 {0x01FC,0x00}, // Display Mode Register
19#if defined(CONFIG_PLAT_MAPPI)
20 {0x0004,0x00}, // General IO Pins Configuration Register 0
21 {0x0005,0x00}, // General IO Pins Configuration Register 1
22 {0x0008,0x00}, // General IO Pins Control Register 0
23 {0x0009,0x00}, // General IO Pins Control Register 1
24 {0x0010,0x00}, // Memory Clock Configuration Register
25 {0x0014,0x00}, // LCD Pixel Clock Configuration Register
26 {0x0018,0x00}, // CRT/TV Pixel Clock Configuration Register
27 {0x001C,0x00}, // MediaPlug Clock Configuration Register
28/*
29 * .. 10MHz: 0x00
30 * .. 30MHz: 0x01
31 * 30MHz ..: 0x02
32 */
33 {0x001E,0x02}, // CPU To Memory Wait State Select Register
34 {0x0021,0x02}, // DRAM Refresh Rate Register
35 {0x002A,0x11}, // DRAM Timings Control Register 0
36 {0x002B,0x13}, // DRAM Timings Control Register 1
37 {0x0020,0x80}, // Memory Configuration Register
38 {0x0030,0x25}, // Panel Type Register
39 {0x0031,0x00}, // MOD Rate Register
40 {0x0032,0x4F}, // LCD Horizontal Display Width Register
41 {0x0034,0x12}, // LCD Horizontal Non-Display Period Register
42 {0x0035,0x01}, // TFT FPLINE Start Position Register
43 {0x0036,0x0B}, // TFT FPLINE Pulse Width Register
44 {0x0038,0xDF}, // LCD Vertical Display Height Register 0
45 {0x0039,0x01}, // LCD Vertical Display Height Register 1
46 {0x003A,0x2C}, // LCD Vertical Non-Display Period Register
47 {0x003B,0x0A}, // TFT FPFRAME Start Position Register
48 {0x003C,0x01}, // TFT FPFRAME Pulse Width Register
49
50 {0x0041,0x00}, // LCD Miscellaneous Register
51 {0x0042,0x00}, // LCD Display Start Address Register 0
52 {0x0043,0x00}, // LCD Display Start Address Register 1
53 {0x0044,0x00}, // LCD Display Start Address Register 2
54
55#elif defined(CONFIG_PLAT_M32700UT) || defined(CONFIG_PLAT_OPSPUT) || defined(CONFIG_PLAT_MAPPI3)
56 {0x0004,0x07}, // GPIO[0:7] direction
57 {0x0005,0x00}, // GPIO[8:12] direction
58 {0x0008,0x00}, // GPIO[0:7] data
59 {0x0009,0x00}, // GPIO[8:12] data
60 {0x0008,0x04}, // LCD panel Vcc on
61 {0x0008,0x05}, // LCD panel reset
62 {0x0010,0x01}, // Memory Clock Configuration Register
63 {0x0014,0x30}, // LCD Pixel Clock Configuration Register (CLKI 22MHz/4)
64 {0x0018,0x00}, // CRT/TV Pixel Clock Configuration Register
65 {0x001C,0x00}, // MediaPlug Clock Configuration Register(10MHz)
66 {0x001E,0x00}, // CPU To Memory Wait State Select Register
67 {0x0020,0x80}, // Memory Configuration Register
68 {0x0021,0x03}, // DRAM Refresh Rate Register
69 {0x002A,0x00}, // DRAM Timings Control Register 0
70 {0x002B,0x01}, // DRAM Timings Control Register 1
71 {0x0030,0x25}, // Panel Type Register
72 {0x0031,0x00}, // MOD Rate Register
73 {0x0032,0x1d}, // LCD Horizontal Display Width Register
74 {0x0034,0x05}, // LCD Horizontal Non-Display Period Register
75 {0x0035,0x01}, // TFT FPLINE Start Position Register
76 {0x0036,0x01}, // TFT FPLINE Pulse Width Register
77 {0x0038,0x3F}, // LCD Vertical Display Height Register 0
78 {0x0039,0x01}, // LCD Vertical Display Height Register 1
79 {0x003A,0x0b}, // LCD Vertical Non-Display Period Register
80 {0x003B,0x07}, // TFT FPFRAME Start Position Register
81 {0x003C,0x02}, // TFT FPFRAME Pulse Width Register
82
83 {0x0041,0x00}, // LCD Miscellaneous Register
84#if (SWIVEL_VIEW == 0)
85 {0x0042,0x00}, // LCD Display Start Address Register 0
86 {0x0043,0x00}, // LCD Display Start Address Register 1
87 {0x0044,0x00}, // LCD Display Start Address Register 2
88
89#elif (SWIVEL_VIEW == 1)
90 // 1024 - W(320) = 0x2C0
91 {0x0042,0xC0}, // LCD Display Start Address Register 0
92 {0x0043,0x02}, // LCD Display Start Address Register 1
93 {0x0044,0x00}, // LCD Display Start Address Register 2
94 // 1024
95 {0x0046,0x00}, // LCD Memory Address Offset Register 0
96 {0x0047,0x02}, // LCD Memory Address Offset Register 1
97#else
98#error unsupported SWIVEL_VIEW mode
99#endif
100#else
101#error no platform configuration
102#endif /* CONFIG_PLAT_XXX */
103
104 {0x0048,0x00}, // LCD Pixel Panning Register
105 {0x004A,0x00}, // LCD Display FIFO High Threshold Control Register
106 {0x004B,0x00}, // LCD Display FIFO Low Threshold Control Register
107 {0x0050,0x4F}, // CRT/TV Horizontal Display Width Register
108 {0x0052,0x13}, // CRT/TV Horizontal Non-Display Period Register
109 {0x0053,0x01}, // CRT/TV HRTC Start Position Register
110 {0x0054,0x0B}, // CRT/TV HRTC Pulse Width Register
111 {0x0056,0xDF}, // CRT/TV Vertical Display Height Register 0
112 {0x0057,0x01}, // CRT/TV Vertical Display Height Register 1
113 {0x0058,0x2B}, // CRT/TV Vertical Non-Display Period Register
114 {0x0059,0x09}, // CRT/TV VRTC Start Position Register
115 {0x005A,0x01}, // CRT/TV VRTC Pulse Width Register
116 {0x005B,0x10}, // TV Output Control Register
117
118 {0x0062,0x00}, // CRT/TV Display Start Address Register 0
119 {0x0063,0x00}, // CRT/TV Display Start Address Register 1
120 {0x0064,0x00}, // CRT/TV Display Start Address Register 2
121
122 {0x0068,0x00}, // CRT/TV Pixel Panning Register
123 {0x006A,0x00}, // CRT/TV Display FIFO High Threshold Control Register
124 {0x006B,0x00}, // CRT/TV Display FIFO Low Threshold Control Register
125 {0x0070,0x00}, // LCD Ink/Cursor Control Register
126 {0x0071,0x01}, // LCD Ink/Cursor Start Address Register
127 {0x0072,0x00}, // LCD Cursor X Position Register 0
128 {0x0073,0x00}, // LCD Cursor X Position Register 1
129 {0x0074,0x00}, // LCD Cursor Y Position Register 0
130 {0x0075,0x00}, // LCD Cursor Y Position Register 1
131 {0x0076,0x00}, // LCD Ink/Cursor Blue Color 0 Register
132 {0x0077,0x00}, // LCD Ink/Cursor Green Color 0 Register
133 {0x0078,0x00}, // LCD Ink/Cursor Red Color 0 Register
134 {0x007A,0x1F}, // LCD Ink/Cursor Blue Color 1 Register
135 {0x007B,0x3F}, // LCD Ink/Cursor Green Color 1 Register
136 {0x007C,0x1F}, // LCD Ink/Cursor Red Color 1 Register
137 {0x007E,0x00}, // LCD Ink/Cursor FIFO Threshold Register
138 {0x0080,0x00}, // CRT/TV Ink/Cursor Control Register
139 {0x0081,0x01}, // CRT/TV Ink/Cursor Start Address Register
140 {0x0082,0x00}, // CRT/TV Cursor X Position Register 0
141 {0x0083,0x00}, // CRT/TV Cursor X Position Register 1
142 {0x0084,0x00}, // CRT/TV Cursor Y Position Register 0
143 {0x0085,0x00}, // CRT/TV Cursor Y Position Register 1
144 {0x0086,0x00}, // CRT/TV Ink/Cursor Blue Color 0 Register
145 {0x0087,0x00}, // CRT/TV Ink/Cursor Green Color 0 Register
146 {0x0088,0x00}, // CRT/TV Ink/Cursor Red Color 0 Register
147 {0x008A,0x1F}, // CRT/TV Ink/Cursor Blue Color 1 Register
148 {0x008B,0x3F}, // CRT/TV Ink/Cursor Green Color 1 Register
149 {0x008C,0x1F}, // CRT/TV Ink/Cursor Red Color 1 Register
150 {0x008E,0x00}, // CRT/TV Ink/Cursor FIFO Threshold Register
151 {0x0100,0x00}, // BitBlt Control Register 0
152 {0x0101,0x00}, // BitBlt Control Register 1
153 {0x0102,0x00}, // BitBlt ROP Code/Color Expansion Register
154 {0x0103,0x00}, // BitBlt Operation Register
155 {0x0104,0x00}, // BitBlt Source Start Address Register 0
156 {0x0105,0x00}, // BitBlt Source Start Address Register 1
157 {0x0106,0x00}, // BitBlt Source Start Address Register 2
158 {0x0108,0x00}, // BitBlt Destination Start Address Register 0
159 {0x0109,0x00}, // BitBlt Destination Start Address Register 1
160 {0x010A,0x00}, // BitBlt Destination Start Address Register 2
161 {0x010C,0x00}, // BitBlt Memory Address Offset Register 0
162 {0x010D,0x00}, // BitBlt Memory Address Offset Register 1
163 {0x0110,0x00}, // BitBlt Width Register 0
164 {0x0111,0x00}, // BitBlt Width Register 1
165 {0x0112,0x00}, // BitBlt Height Register 0
166 {0x0113,0x00}, // BitBlt Height Register 1
167 {0x0114,0x00}, // BitBlt Background Color Register 0
168 {0x0115,0x00}, // BitBlt Background Color Register 1
169 {0x0118,0x00}, // BitBlt Foreground Color Register 0
170 {0x0119,0x00}, // BitBlt Foreground Color Register 1
171 {0x01E0,0x00}, // Look-Up Table Mode Register
172 {0x01E2,0x00}, // Look-Up Table Address Register
173 {0x01F0,0x10}, // Power Save Configuration Register
174 {0x01F1,0x00}, // Power Save Status Register
175 {0x01F4,0x00}, // CPU-to-Memory Access Watchdog Timer Register
176#if (SWIVEL_VIEW == 0)
177 {0x01FC,0x01}, // Display Mode Register(0x01:LCD, 0x02:CRT, 0x03:LCD&CRT)
178#elif (SWIVEL_VIEW == 1)
179 {0x01FC,0x41}, // Display Mode Register(0x01:LCD, 0x02:CRT, 0x03:LCD&CRT)
180#else
181#error unsupported SWIVEL_VIEW mode
182#endif /* SWIVEL_VIEW */
183
184#if defined(CONFIG_PLAT_M32700UT) || defined(CONFIG_PLAT_OPSPUT) || defined(CONFIG_PLAT_MAPPI3)
185 {0x0008,0x07}, // LCD panel Vdd & Vg on
186#endif
187
188 {0x0040,0x05}, // LCD Display Mode Register (2:4bpp,3:8bpp,5:16bpp)
189#if defined(CONFIG_PLAT_MAPPI)
190 {0x0046,0x80}, // LCD Memory Address Offset Register 0
191 {0x0047,0x02}, // LCD Memory Address Offset Register 1
192#elif defined(CONFIG_PLAT_M32700UT) || defined(CONFIG_PLAT_OPSPUT) || defined(CONFIG_PLAT_MAPPI3)
193 {0x0046,0xf0}, // LCD Memory Address Offset Register 0
194 {0x0047,0x00}, // LCD Memory Address Offset Register 1
195#endif
196 {0x0060,0x05}, // CRT/TV Display Mode Register (2:4bpp,3:8bpp,5:16bpp)
197 {0x0066,0x80}, // CRT/TV Memory Address Offset Register 0 // takeo
198 {0x0067,0x02}, // CRT/TV Memory Address Offset Register 1
199};
diff --git a/include/asm-m32r/scatterlist.h b/include/asm-m32r/scatterlist.h
deleted file mode 100644
index 1ed372c73d0b..000000000000
--- a/include/asm-m32r/scatterlist.h
+++ /dev/null
@@ -1,21 +0,0 @@
1#ifndef _ASM_M32R_SCATTERLIST_H
2#define _ASM_M32R_SCATTERLIST_H
3
4#include <asm/types.h>
5
6struct scatterlist {
7#ifdef CONFIG_DEBUG_SG
8 unsigned long sg_magic;
9#endif
10 char * address; /* Location data is to be transferred to, NULL for
11 * highmem page */
12 unsigned long page_link;
13 unsigned int offset;/* for highmem, page offset */
14
15 dma_addr_t dma_address;
16 unsigned int length;
17};
18
19#define ISA_DMA_THRESHOLD (0x1fffffff)
20
21#endif /* _ASM_M32R_SCATTERLIST_H */
diff --git a/include/asm-m32r/sections.h b/include/asm-m32r/sections.h
deleted file mode 100644
index 5e5d21c4908a..000000000000
--- a/include/asm-m32r/sections.h
+++ /dev/null
@@ -1,7 +0,0 @@
1#ifndef _M32R_SECTIONS_H
2#define _M32R_SECTIONS_H
3
4/* nothing to see, move along */
5#include <asm-generic/sections.h>
6
7#endif /* _M32R_SECTIONS_H */
diff --git a/include/asm-m32r/segment.h b/include/asm-m32r/segment.h
deleted file mode 100644
index 42b11aeb3249..000000000000
--- a/include/asm-m32r/segment.h
+++ /dev/null
@@ -1,10 +0,0 @@
1#ifndef _ASM_M32R_SEGMENT_H
2#define _ASM_M32R_SEGMENT_H
3
4#define __KERNEL_CS 0x10
5#define __KERNEL_DS 0x18
6
7#define __USER_CS 0x23
8#define __USER_DS 0x2B
9
10#endif /* _ASM_M32R_SEGMENT_H */
diff --git a/include/asm-m32r/sembuf.h b/include/asm-m32r/sembuf.h
deleted file mode 100644
index c9873d6890e2..000000000000
--- a/include/asm-m32r/sembuf.h
+++ /dev/null
@@ -1,25 +0,0 @@
1#ifndef _ASM_M32R_SEMBUF_H
2#define _ASM_M32R_SEMBUF_H
3
4/*
5 * The semid64_ds structure for m32r architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct semid64_ds {
15 struct ipc64_perm sem_perm; /* permissions .. see ipc.h */
16 __kernel_time_t sem_otime; /* last semop time */
17 unsigned long __unused1;
18 __kernel_time_t sem_ctime; /* last change time */
19 unsigned long __unused2;
20 unsigned long sem_nsems; /* no. of semaphores in array */
21 unsigned long __unused3;
22 unsigned long __unused4;
23};
24
25#endif /* _ASM_M32R_SEMBUF_H */
diff --git a/include/asm-m32r/serial.h b/include/asm-m32r/serial.h
deleted file mode 100644
index 5ac244c72f15..000000000000
--- a/include/asm-m32r/serial.h
+++ /dev/null
@@ -1,9 +0,0 @@
1#ifndef _ASM_M32R_SERIAL_H
2#define _ASM_M32R_SERIAL_H
3
4/* include/asm-m32r/serial.h */
5
6
7#define BASE_BAUD 115200
8
9#endif /* _ASM_M32R_SERIAL_H */
diff --git a/include/asm-m32r/setup.h b/include/asm-m32r/setup.h
deleted file mode 100644
index c637ab992394..000000000000
--- a/include/asm-m32r/setup.h
+++ /dev/null
@@ -1,38 +0,0 @@
1#ifndef _ASM_M32R_SETUP_H
2#define _ASM_M32R_SETUP_H
3
4/*
5 * This is set up by the setup-routine at boot-time
6 */
7
8#define COMMAND_LINE_SIZE 512
9
10#ifdef __KERNEL__
11
12#define PARAM ((unsigned char *)empty_zero_page)
13
14#define MOUNT_ROOT_RDONLY (*(unsigned long *) (PARAM+0x000))
15#define RAMDISK_FLAGS (*(unsigned long *) (PARAM+0x004))
16#define ORIG_ROOT_DEV (*(unsigned long *) (PARAM+0x008))
17#define LOADER_TYPE (*(unsigned long *) (PARAM+0x00c))
18#define INITRD_START (*(unsigned long *) (PARAM+0x010))
19#define INITRD_SIZE (*(unsigned long *) (PARAM+0x014))
20
21#define M32R_CPUCLK (*(unsigned long *) (PARAM+0x018))
22#define M32R_BUSCLK (*(unsigned long *) (PARAM+0x01c))
23#define M32R_TIMER_DIVIDE (*(unsigned long *) (PARAM+0x020))
24
25#define COMMAND_LINE ((char *) (PARAM+0x100))
26
27#define SCREEN_INFO (*(struct screen_info *) (PARAM+0x200))
28
29#define RAMDISK_IMAGE_START_MASK (0x07FF)
30#define RAMDISK_PROMPT_FLAG (0x8000)
31#define RAMDISK_LOAD_FLAG (0x4000)
32
33extern unsigned long memory_start;
34extern unsigned long memory_end;
35
36#endif /* __KERNEL__ */
37
38#endif /* _ASM_M32R_SETUP_H */
diff --git a/include/asm-m32r/shmbuf.h b/include/asm-m32r/shmbuf.h
deleted file mode 100644
index b0cdf0aa7d65..000000000000
--- a/include/asm-m32r/shmbuf.h
+++ /dev/null
@@ -1,42 +0,0 @@
1#ifndef _ASM_M32R_SHMBUF_H
2#define _ASM_M32R_SHMBUF_H
3
4/*
5 * The shmid64_ds structure for M32R architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct shmid64_ds {
15 struct ipc64_perm shm_perm; /* operation perms */
16 size_t shm_segsz; /* size of segment (bytes) */
17 __kernel_time_t shm_atime; /* last attach time */
18 unsigned long __unused1;
19 __kernel_time_t shm_dtime; /* last detach time */
20 unsigned long __unused2;
21 __kernel_time_t shm_ctime; /* last change time */
22 unsigned long __unused3;
23 __kernel_pid_t shm_cpid; /* pid of creator */
24 __kernel_pid_t shm_lpid; /* pid of last operator */
25 unsigned long shm_nattch; /* no. of current attaches */
26 unsigned long __unused4;
27 unsigned long __unused5;
28};
29
30struct shminfo64 {
31 unsigned long shmmax;
32 unsigned long shmmin;
33 unsigned long shmmni;
34 unsigned long shmseg;
35 unsigned long shmall;
36 unsigned long __unused1;
37 unsigned long __unused2;
38 unsigned long __unused3;
39 unsigned long __unused4;
40};
41
42#endif /* _ASM_M32R_SHMBUF_H */
diff --git a/include/asm-m32r/shmparam.h b/include/asm-m32r/shmparam.h
deleted file mode 100644
index 35986d81a528..000000000000
--- a/include/asm-m32r/shmparam.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef _ASM_M32R_SHMPARAM_H
2#define _ASM_M32R_SHMPARAM_H
3
4#define SHMLBA PAGE_SIZE /* attach addr a multiple of this */
5
6#endif /* _ASM_M32R_SHMPARAM_H */
diff --git a/include/asm-m32r/sigcontext.h b/include/asm-m32r/sigcontext.h
deleted file mode 100644
index da4a9c36d09b..000000000000
--- a/include/asm-m32r/sigcontext.h
+++ /dev/null
@@ -1,39 +0,0 @@
1#ifndef _ASM_M32R_SIGCONTEXT_H
2#define _ASM_M32R_SIGCONTEXT_H
3
4struct sigcontext {
5 /* CPU registers */
6 /* Saved main processor registers. */
7 unsigned long sc_r4;
8 unsigned long sc_r5;
9 unsigned long sc_r6;
10 struct pt_regs *sc_pt_regs;
11 unsigned long sc_r0;
12 unsigned long sc_r1;
13 unsigned long sc_r2;
14 unsigned long sc_r3;
15 unsigned long sc_r7;
16 unsigned long sc_r8;
17 unsigned long sc_r9;
18 unsigned long sc_r10;
19 unsigned long sc_r11;
20 unsigned long sc_r12;
21
22 /* Saved main processor status and miscellaneous context registers. */
23 unsigned long sc_acc0h;
24 unsigned long sc_acc0l;
25 unsigned long sc_acc1h; /* ISA_DSP_LEVEL2 only */
26 unsigned long sc_acc1l; /* ISA_DSP_LEVEL2 only */
27 unsigned long sc_psw;
28 unsigned long sc_bpc; /* saved PC for TRAP syscalls */
29 unsigned long sc_bbpsw;
30 unsigned long sc_bbpc;
31 unsigned long sc_spu; /* saved user stack */
32 unsigned long sc_fp;
33 unsigned long sc_lr; /* saved PC for JL syscalls */
34 unsigned long sc_spi; /* saved kernel stack */
35
36 unsigned long oldmask;
37};
38
39#endif /* _ASM_M32R_SIGCONTEXT_H */
diff --git a/include/asm-m32r/siginfo.h b/include/asm-m32r/siginfo.h
deleted file mode 100644
index 7d9cd9ebfd0e..000000000000
--- a/include/asm-m32r/siginfo.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef _M32R_SIGINFO_H
2#define _M32R_SIGINFO_H
3
4#include <asm-generic/siginfo.h>
5
6#endif /* _M32R_SIGINFO_H */
diff --git a/include/asm-m32r/signal.h b/include/asm-m32r/signal.h
deleted file mode 100644
index 1a607066bc64..000000000000
--- a/include/asm-m32r/signal.h
+++ /dev/null
@@ -1,166 +0,0 @@
1#ifndef _ASM_M32R_SIGNAL_H
2#define _ASM_M32R_SIGNAL_H
3
4#include <linux/types.h>
5#include <linux/time.h>
6#include <linux/compiler.h>
7
8/* Avoid too many header ordering problems. */
9struct siginfo;
10
11#ifdef __KERNEL__
12/* Most things should be clean enough to redefine this at will, if care
13 is taken to make libc match. */
14
15#define _NSIG 64
16#define _NSIG_BPW 32
17#define _NSIG_WORDS (_NSIG / _NSIG_BPW)
18
19typedef unsigned long old_sigset_t; /* at least 32 bits */
20
21typedef struct {
22 unsigned long sig[_NSIG_WORDS];
23} sigset_t;
24
25#else
26/* Here we must cater to libcs that poke about in kernel headers. */
27
28#define NSIG 32
29typedef unsigned long sigset_t;
30
31#endif /* __KERNEL__ */
32
33#define SIGHUP 1
34#define SIGINT 2
35#define SIGQUIT 3
36#define SIGILL 4
37#define SIGTRAP 5
38#define SIGABRT 6
39#define SIGIOT 6
40#define SIGBUS 7
41#define SIGFPE 8
42#define SIGKILL 9
43#define SIGUSR1 10
44#define SIGSEGV 11
45#define SIGUSR2 12
46#define SIGPIPE 13
47#define SIGALRM 14
48#define SIGTERM 15
49#define SIGSTKFLT 16
50#define SIGCHLD 17
51#define SIGCONT 18
52#define SIGSTOP 19
53#define SIGTSTP 20
54#define SIGTTIN 21
55#define SIGTTOU 22
56#define SIGURG 23
57#define SIGXCPU 24
58#define SIGXFSZ 25
59#define SIGVTALRM 26
60#define SIGPROF 27
61#define SIGWINCH 28
62#define SIGIO 29
63#define SIGPOLL SIGIO
64/*
65#define SIGLOST 29
66*/
67#define SIGPWR 30
68#define SIGSYS 31
69#define SIGUNUSED 31
70
71/* These should not be considered constants from userland. */
72#define SIGRTMIN 32
73#define SIGRTMAX _NSIG
74
75/*
76 * SA_FLAGS values:
77 *
78 * SA_ONSTACK indicates that a registered stack_t will be used.
79 * SA_RESTART flag to get restarting signals (which were the default long ago)
80 * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
81 * SA_RESETHAND clears the handler when the signal is delivered.
82 * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
83 * SA_NODEFER prevents the current signal from being masked in the handler.
84 *
85 * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
86 * Unix names RESETHAND and NODEFER respectively.
87 */
88#define SA_NOCLDSTOP 0x00000001u
89#define SA_NOCLDWAIT 0x00000002u
90#define SA_SIGINFO 0x00000004u
91#define SA_ONSTACK 0x08000000u
92#define SA_RESTART 0x10000000u
93#define SA_NODEFER 0x40000000u
94#define SA_RESETHAND 0x80000000u
95
96#define SA_NOMASK SA_NODEFER
97#define SA_ONESHOT SA_RESETHAND
98
99#define SA_RESTORER 0x04000000
100
101/*
102 * sigaltstack controls
103 */
104#define SS_ONSTACK 1
105#define SS_DISABLE 2
106
107#define MINSIGSTKSZ 2048
108#define SIGSTKSZ 8192
109
110#include <asm-generic/signal.h>
111
112#ifdef __KERNEL__
113struct old_sigaction {
114 __sighandler_t sa_handler;
115 old_sigset_t sa_mask;
116 unsigned long sa_flags;
117 __sigrestore_t sa_restorer;
118};
119
120struct sigaction {
121 __sighandler_t sa_handler;
122 unsigned long sa_flags;
123 __sigrestore_t sa_restorer;
124 sigset_t sa_mask; /* mask last for extensibility */
125};
126
127struct k_sigaction {
128 struct sigaction sa;
129};
130#else
131/* Here we must cater to libcs that poke about in kernel headers. */
132
133struct sigaction {
134 union {
135 __sighandler_t _sa_handler;
136 void (*_sa_sigaction)(int, struct siginfo *, void *);
137 } _u;
138 sigset_t sa_mask;
139 unsigned long sa_flags;
140 void (*sa_restorer)(void);
141};
142
143#define sa_handler _u._sa_handler
144#define sa_sigaction _u._sa_sigaction
145
146#endif /* __KERNEL__ */
147
148typedef struct sigaltstack {
149 void __user *ss_sp;
150 int ss_flags;
151 size_t ss_size;
152} stack_t;
153
154#ifdef __KERNEL__
155#include <asm/sigcontext.h>
156
157#undef __HAVE_ARCH_SIG_BITOPS
158
159struct pt_regs;
160extern int do_signal(struct pt_regs *regs, sigset_t *oldset);
161
162#define ptrace_signal_deliver(regs, cookie) do { } while (0)
163
164#endif /* __KERNEL__ */
165
166#endif /* _ASM_M32R_SIGNAL_H */
diff --git a/include/asm-m32r/smp.h b/include/asm-m32r/smp.h
deleted file mode 100644
index b96a6d2ffbc3..000000000000
--- a/include/asm-m32r/smp.h
+++ /dev/null
@@ -1,119 +0,0 @@
1#ifndef _ASM_M32R_SMP_H
2#define _ASM_M32R_SMP_H
3
4#ifdef CONFIG_SMP
5#ifndef __ASSEMBLY__
6
7#include <linux/cpumask.h>
8#include <linux/spinlock.h>
9#include <linux/threads.h>
10#include <asm/m32r.h>
11
12#define PHYSID_ARRAY_SIZE 1
13
14struct physid_mask
15{
16 unsigned long mask[PHYSID_ARRAY_SIZE];
17};
18
19typedef struct physid_mask physid_mask_t;
20
21#define physid_set(physid, map) set_bit(physid, (map).mask)
22#define physid_clear(physid, map) clear_bit(physid, (map).mask)
23#define physid_isset(physid, map) test_bit(physid, (map).mask)
24#define physid_test_and_set(physid, map) test_and_set_bit(physid, (map).mask)
25
26#define physids_and(dst, src1, src2) bitmap_and((dst).mask, (src1).mask, (src2).mask, MAX_APICS)
27#define physids_or(dst, src1, src2) bitmap_or((dst).mask, (src1).mask, (src2).mask, MAX_APICS)
28#define physids_clear(map) bitmap_zero((map).mask, MAX_APICS)
29#define physids_complement(dst, src) bitmap_complement((dst).mask,(src).mask, MAX_APICS)
30#define physids_empty(map) bitmap_empty((map).mask, MAX_APICS)
31#define physids_equal(map1, map2) bitmap_equal((map1).mask, (map2).mask, MAX_APICS)
32#define physids_weight(map) bitmap_weight((map).mask, MAX_APICS)
33#define physids_shift_right(d, s, n) bitmap_shift_right((d).mask, (s).mask, n, MAX_APICS)
34#define physids_shift_left(d, s, n) bitmap_shift_left((d).mask, (s).mask, n, MAX_APICS)
35#define physids_coerce(map) ((map).mask[0])
36
37#define physids_promote(physids) \
38 ({ \
39 physid_mask_t __physid_mask = PHYSID_MASK_NONE; \
40 __physid_mask.mask[0] = physids; \
41 __physid_mask; \
42 })
43
44#define physid_mask_of_physid(physid) \
45 ({ \
46 physid_mask_t __physid_mask = PHYSID_MASK_NONE; \
47 physid_set(physid, __physid_mask); \
48 __physid_mask; \
49 })
50
51#define PHYSID_MASK_ALL { {[0 ... PHYSID_ARRAY_SIZE-1] = ~0UL} }
52#define PHYSID_MASK_NONE { {[0 ... PHYSID_ARRAY_SIZE-1] = 0UL} }
53
54extern physid_mask_t phys_cpu_present_map;
55
56/*
57 * Some lowlevel functions might want to know about
58 * the real CPU ID <-> CPU # mapping.
59 */
60extern volatile int cpu_2_physid[NR_CPUS];
61#define cpu_to_physid(cpu_id) cpu_2_physid[cpu_id]
62
63#define raw_smp_processor_id() (current_thread_info()->cpu)
64
65extern cpumask_t cpu_callout_map;
66
67static __inline__ int hard_smp_processor_id(void)
68{
69 return (int)*(volatile long *)M32R_CPUID_PORTL;
70}
71
72static __inline__ int cpu_logical_map(int cpu)
73{
74 return cpu;
75}
76
77static __inline__ int cpu_number_map(int cpu)
78{
79 return cpu;
80}
81
82static __inline__ unsigned int num_booting_cpus(void)
83{
84 return cpus_weight(cpu_callout_map);
85}
86
87extern void smp_send_timer(void);
88extern unsigned long send_IPI_mask_phys(cpumask_t, int, int);
89
90extern void arch_send_call_function_single_ipi(int cpu);
91extern void arch_send_call_function_ipi(cpumask_t mask);
92
93#endif /* not __ASSEMBLY__ */
94
95#define NO_PROC_ID (0xff) /* No processor magic marker */
96
97#define PROC_CHANGE_PENALTY (15) /* Schedule penalty */
98
99/*
100 * M32R-mp IPI
101 */
102#define RESCHEDULE_IPI (M32R_IRQ_IPI0-M32R_IRQ_IPI0)
103#define INVALIDATE_TLB_IPI (M32R_IRQ_IPI1-M32R_IRQ_IPI0)
104#define CALL_FUNCTION_IPI (M32R_IRQ_IPI2-M32R_IRQ_IPI0)
105#define LOCAL_TIMER_IPI (M32R_IRQ_IPI3-M32R_IRQ_IPI0)
106#define INVALIDATE_CACHE_IPI (M32R_IRQ_IPI4-M32R_IRQ_IPI0)
107#define CPU_BOOT_IPI (M32R_IRQ_IPI5-M32R_IRQ_IPI0)
108#define CALL_FUNC_SINGLE_IPI (M32R_IRQ_IPI6-M32R_IRQ_IPI0)
109
110#define IPI_SHIFT (0)
111#define NR_IPIS (8)
112
113#else /* CONFIG_SMP */
114
115#define hard_smp_processor_id() 0
116
117#endif /* CONFIG_SMP */
118
119#endif /* _ASM_M32R_SMP_H */
diff --git a/include/asm-m32r/socket.h b/include/asm-m32r/socket.h
deleted file mode 100644
index be7ed589af5c..000000000000
--- a/include/asm-m32r/socket.h
+++ /dev/null
@@ -1,60 +0,0 @@
1#ifndef _ASM_M32R_SOCKET_H
2#define _ASM_M32R_SOCKET_H
3
4#include <asm/sockios.h>
5
6/* For setsockoptions(2) */
7#define SOL_SOCKET 1
8
9#define SO_DEBUG 1
10#define SO_REUSEADDR 2
11#define SO_TYPE 3
12#define SO_ERROR 4
13#define SO_DONTROUTE 5
14#define SO_BROADCAST 6
15#define SO_SNDBUF 7
16#define SO_RCVBUF 8
17#define SO_SNDBUFFORCE 32
18#define SO_RCVBUFFORCE 33
19#define SO_KEEPALIVE 9
20#define SO_OOBINLINE 10
21#define SO_NO_CHECK 11
22#define SO_PRIORITY 12
23#define SO_LINGER 13
24#define SO_BSDCOMPAT 14
25/* To add :#define SO_REUSEPORT 15 */
26#define SO_PASSCRED 16
27#define SO_PEERCRED 17
28#define SO_RCVLOWAT 18
29#define SO_SNDLOWAT 19
30#define SO_RCVTIMEO 20
31#define SO_SNDTIMEO 21
32
33/* Security levels - as per NRL IPv6 - don't actually do anything */
34#define SO_SECURITY_AUTHENTICATION 22
35#define SO_SECURITY_ENCRYPTION_TRANSPORT 23
36#define SO_SECURITY_ENCRYPTION_NETWORK 24
37
38#define SO_BINDTODEVICE 25
39
40/* Socket filtering */
41#define SO_ATTACH_FILTER 26
42#define SO_DETACH_FILTER 27
43
44#define SO_PEERNAME 28
45#define SO_TIMESTAMP 29
46#define SCM_TIMESTAMP SO_TIMESTAMP
47
48#define SO_ACCEPTCONN 30
49
50#define SO_PEERSEC 31
51#define SO_PASSSEC 34
52#define SO_TIMESTAMPNS 35
53#define SCM_TIMESTAMPNS SO_TIMESTAMPNS
54
55#define SO_MARK 36
56
57#define SO_TIMESTAMPING 37
58#define SCM_TIMESTAMPING SO_TIMESTAMPING
59
60#endif /* _ASM_M32R_SOCKET_H */
diff --git a/include/asm-m32r/sockios.h b/include/asm-m32r/sockios.h
deleted file mode 100644
index 6c1fb9b43bdb..000000000000
--- a/include/asm-m32r/sockios.h
+++ /dev/null
@@ -1,13 +0,0 @@
1#ifndef _ASM_M32R_SOCKIOS_H
2#define _ASM_M32R_SOCKIOS_H
3
4/* Socket-level I/O control calls. */
5#define FIOSETOWN 0x8901
6#define SIOCSPGRP 0x8902
7#define FIOGETOWN 0x8903
8#define SIOCGPGRP 0x8904
9#define SIOCATMARK 0x8905
10#define SIOCGSTAMP 0x8906 /* Get stamp (timeval) */
11#define SIOCGSTAMPNS 0x8907 /* Get stamp (timespec) */
12
13#endif /* _ASM_M32R_SOCKIOS_H */
diff --git a/include/asm-m32r/spinlock.h b/include/asm-m32r/spinlock.h
deleted file mode 100644
index dded923883b2..000000000000
--- a/include/asm-m32r/spinlock.h
+++ /dev/null
@@ -1,326 +0,0 @@
1#ifndef _ASM_M32R_SPINLOCK_H
2#define _ASM_M32R_SPINLOCK_H
3
4/*
5 * linux/include/asm-m32r/spinlock.h
6 *
7 * M32R version:
8 * Copyright (C) 2001, 2002 Hitoshi Yamamoto
9 * Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org>
10 */
11
12#include <linux/compiler.h>
13#include <asm/atomic.h>
14#include <asm/page.h>
15
16/*
17 * Your basic SMP spinlocks, allowing only a single CPU anywhere
18 *
19 * (the type definitions are in asm/spinlock_types.h)
20 *
21 * Simple spin lock operations. There are two variants, one clears IRQ's
22 * on the local processor, one does not.
23 *
24 * We make no fairness assumptions. They have a cost.
25 */
26
27#define __raw_spin_is_locked(x) (*(volatile int *)(&(x)->slock) <= 0)
28#define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock)
29#define __raw_spin_unlock_wait(x) \
30 do { cpu_relax(); } while (__raw_spin_is_locked(x))
31
32/**
33 * __raw_spin_trylock - Try spin lock and return a result
34 * @lock: Pointer to the lock variable
35 *
36 * __raw_spin_trylock() tries to get the lock and returns a result.
37 * On the m32r, the result value is 1 (= Success) or 0 (= Failure).
38 */
39static inline int __raw_spin_trylock(raw_spinlock_t *lock)
40{
41 int oldval;
42 unsigned long tmp1, tmp2;
43
44 /*
45 * lock->slock : =1 : unlock
46 * : <=0 : lock
47 * {
48 * oldval = lock->slock; <--+ need atomic operation
49 * lock->slock = 0; <--+
50 * }
51 */
52 __asm__ __volatile__ (
53 "# __raw_spin_trylock \n\t"
54 "ldi %1, #0; \n\t"
55 "mvfc %2, psw; \n\t"
56 "clrpsw #0x40 -> nop; \n\t"
57 DCACHE_CLEAR("%0", "r6", "%3")
58 "lock %0, @%3; \n\t"
59 "unlock %1, @%3; \n\t"
60 "mvtc %2, psw; \n\t"
61 : "=&r" (oldval), "=&r" (tmp1), "=&r" (tmp2)
62 : "r" (&lock->slock)
63 : "memory"
64#ifdef CONFIG_CHIP_M32700_TS1
65 , "r6"
66#endif /* CONFIG_CHIP_M32700_TS1 */
67 );
68
69 return (oldval > 0);
70}
71
72static inline void __raw_spin_lock(raw_spinlock_t *lock)
73{
74 unsigned long tmp0, tmp1;
75
76 /*
77 * lock->slock : =1 : unlock
78 * : <=0 : lock
79 *
80 * for ( ; ; ) {
81 * lock->slock -= 1; <-- need atomic operation
82 * if (lock->slock == 0) break;
83 * for ( ; lock->slock <= 0 ; );
84 * }
85 */
86 __asm__ __volatile__ (
87 "# __raw_spin_lock \n\t"
88 ".fillinsn \n"
89 "1: \n\t"
90 "mvfc %1, psw; \n\t"
91 "clrpsw #0x40 -> nop; \n\t"
92 DCACHE_CLEAR("%0", "r6", "%2")
93 "lock %0, @%2; \n\t"
94 "addi %0, #-1; \n\t"
95 "unlock %0, @%2; \n\t"
96 "mvtc %1, psw; \n\t"
97 "bltz %0, 2f; \n\t"
98 LOCK_SECTION_START(".balign 4 \n\t")
99 ".fillinsn \n"
100 "2: \n\t"
101 "ld %0, @%2; \n\t"
102 "bgtz %0, 1b; \n\t"
103 "bra 2b; \n\t"
104 LOCK_SECTION_END
105 : "=&r" (tmp0), "=&r" (tmp1)
106 : "r" (&lock->slock)
107 : "memory"
108#ifdef CONFIG_CHIP_M32700_TS1
109 , "r6"
110#endif /* CONFIG_CHIP_M32700_TS1 */
111 );
112}
113
114static inline void __raw_spin_unlock(raw_spinlock_t *lock)
115{
116 mb();
117 lock->slock = 1;
118}
119
120/*
121 * Read-write spinlocks, allowing multiple readers
122 * but only one writer.
123 *
124 * NOTE! it is quite common to have readers in interrupts
125 * but no interrupt writers. For those circumstances we
126 * can "mix" irq-safe locks - any writer needs to get a
127 * irq-safe write-lock, but readers can get non-irqsafe
128 * read-locks.
129 *
130 * On x86, we implement read-write locks as a 32-bit counter
131 * with the high bit (sign) being the "contended" bit.
132 *
133 * The inline assembly is non-obvious. Think about it.
134 *
135 * Changed to use the same technique as rw semaphores. See
136 * semaphore.h for details. -ben
137 */
138
139/**
140 * read_can_lock - would read_trylock() succeed?
141 * @lock: the rwlock in question.
142 */
143#define __raw_read_can_lock(x) ((int)(x)->lock > 0)
144
145/**
146 * write_can_lock - would write_trylock() succeed?
147 * @lock: the rwlock in question.
148 */
149#define __raw_write_can_lock(x) ((x)->lock == RW_LOCK_BIAS)
150
151static inline void __raw_read_lock(raw_rwlock_t *rw)
152{
153 unsigned long tmp0, tmp1;
154
155 /*
156 * rw->lock : >0 : unlock
157 * : <=0 : lock
158 *
159 * for ( ; ; ) {
160 * rw->lock -= 1; <-- need atomic operation
161 * if (rw->lock >= 0) break;
162 * rw->lock += 1; <-- need atomic operation
163 * for ( ; rw->lock <= 0 ; );
164 * }
165 */
166 __asm__ __volatile__ (
167 "# read_lock \n\t"
168 ".fillinsn \n"
169 "1: \n\t"
170 "mvfc %1, psw; \n\t"
171 "clrpsw #0x40 -> nop; \n\t"
172 DCACHE_CLEAR("%0", "r6", "%2")
173 "lock %0, @%2; \n\t"
174 "addi %0, #-1; \n\t"
175 "unlock %0, @%2; \n\t"
176 "mvtc %1, psw; \n\t"
177 "bltz %0, 2f; \n\t"
178 LOCK_SECTION_START(".balign 4 \n\t")
179 ".fillinsn \n"
180 "2: \n\t"
181 "clrpsw #0x40 -> nop; \n\t"
182 DCACHE_CLEAR("%0", "r6", "%2")
183 "lock %0, @%2; \n\t"
184 "addi %0, #1; \n\t"
185 "unlock %0, @%2; \n\t"
186 "mvtc %1, psw; \n\t"
187 ".fillinsn \n"
188 "3: \n\t"
189 "ld %0, @%2; \n\t"
190 "bgtz %0, 1b; \n\t"
191 "bra 3b; \n\t"
192 LOCK_SECTION_END
193 : "=&r" (tmp0), "=&r" (tmp1)
194 : "r" (&rw->lock)
195 : "memory"
196#ifdef CONFIG_CHIP_M32700_TS1
197 , "r6"
198#endif /* CONFIG_CHIP_M32700_TS1 */
199 );
200}
201
202static inline void __raw_write_lock(raw_rwlock_t *rw)
203{
204 unsigned long tmp0, tmp1, tmp2;
205
206 /*
207 * rw->lock : =RW_LOCK_BIAS_STR : unlock
208 * : !=RW_LOCK_BIAS_STR : lock
209 *
210 * for ( ; ; ) {
211 * rw->lock -= RW_LOCK_BIAS_STR; <-- need atomic operation
212 * if (rw->lock == 0) break;
213 * rw->lock += RW_LOCK_BIAS_STR; <-- need atomic operation
214 * for ( ; rw->lock != RW_LOCK_BIAS_STR ; ) ;
215 * }
216 */
217 __asm__ __volatile__ (
218 "# write_lock \n\t"
219 "seth %1, #high(" RW_LOCK_BIAS_STR "); \n\t"
220 "or3 %1, %1, #low(" RW_LOCK_BIAS_STR "); \n\t"
221 ".fillinsn \n"
222 "1: \n\t"
223 "mvfc %2, psw; \n\t"
224 "clrpsw #0x40 -> nop; \n\t"
225 DCACHE_CLEAR("%0", "r7", "%3")
226 "lock %0, @%3; \n\t"
227 "sub %0, %1; \n\t"
228 "unlock %0, @%3; \n\t"
229 "mvtc %2, psw; \n\t"
230 "bnez %0, 2f; \n\t"
231 LOCK_SECTION_START(".balign 4 \n\t")
232 ".fillinsn \n"
233 "2: \n\t"
234 "clrpsw #0x40 -> nop; \n\t"
235 DCACHE_CLEAR("%0", "r7", "%3")
236 "lock %0, @%3; \n\t"
237 "add %0, %1; \n\t"
238 "unlock %0, @%3; \n\t"
239 "mvtc %2, psw; \n\t"
240 ".fillinsn \n"
241 "3: \n\t"
242 "ld %0, @%3; \n\t"
243 "beq %0, %1, 1b; \n\t"
244 "bra 3b; \n\t"
245 LOCK_SECTION_END
246 : "=&r" (tmp0), "=&r" (tmp1), "=&r" (tmp2)
247 : "r" (&rw->lock)
248 : "memory"
249#ifdef CONFIG_CHIP_M32700_TS1
250 , "r7"
251#endif /* CONFIG_CHIP_M32700_TS1 */
252 );
253}
254
255static inline void __raw_read_unlock(raw_rwlock_t *rw)
256{
257 unsigned long tmp0, tmp1;
258
259 __asm__ __volatile__ (
260 "# read_unlock \n\t"
261 "mvfc %1, psw; \n\t"
262 "clrpsw #0x40 -> nop; \n\t"
263 DCACHE_CLEAR("%0", "r6", "%2")
264 "lock %0, @%2; \n\t"
265 "addi %0, #1; \n\t"
266 "unlock %0, @%2; \n\t"
267 "mvtc %1, psw; \n\t"
268 : "=&r" (tmp0), "=&r" (tmp1)
269 : "r" (&rw->lock)
270 : "memory"
271#ifdef CONFIG_CHIP_M32700_TS1
272 , "r6"
273#endif /* CONFIG_CHIP_M32700_TS1 */
274 );
275}
276
277static inline void __raw_write_unlock(raw_rwlock_t *rw)
278{
279 unsigned long tmp0, tmp1, tmp2;
280
281 __asm__ __volatile__ (
282 "# write_unlock \n\t"
283 "seth %1, #high(" RW_LOCK_BIAS_STR "); \n\t"
284 "or3 %1, %1, #low(" RW_LOCK_BIAS_STR "); \n\t"
285 "mvfc %2, psw; \n\t"
286 "clrpsw #0x40 -> nop; \n\t"
287 DCACHE_CLEAR("%0", "r7", "%3")
288 "lock %0, @%3; \n\t"
289 "add %0, %1; \n\t"
290 "unlock %0, @%3; \n\t"
291 "mvtc %2, psw; \n\t"
292 : "=&r" (tmp0), "=&r" (tmp1), "=&r" (tmp2)
293 : "r" (&rw->lock)
294 : "memory"
295#ifdef CONFIG_CHIP_M32700_TS1
296 , "r7"
297#endif /* CONFIG_CHIP_M32700_TS1 */
298 );
299}
300
301static inline int __raw_read_trylock(raw_rwlock_t *lock)
302{
303 atomic_t *count = (atomic_t*)lock;
304 if (atomic_dec_return(count) >= 0)
305 return 1;
306 atomic_inc(count);
307 return 0;
308}
309
310static inline int __raw_write_trylock(raw_rwlock_t *lock)
311{
312 atomic_t *count = (atomic_t *)lock;
313 if (atomic_sub_and_test(RW_LOCK_BIAS, count))
314 return 1;
315 atomic_add(RW_LOCK_BIAS, count);
316 return 0;
317}
318
319#define __raw_read_lock_flags(lock, flags) __raw_read_lock(lock)
320#define __raw_write_lock_flags(lock, flags) __raw_write_lock(lock)
321
322#define _raw_spin_relax(lock) cpu_relax()
323#define _raw_read_relax(lock) cpu_relax()
324#define _raw_write_relax(lock) cpu_relax()
325
326#endif /* _ASM_M32R_SPINLOCK_H */
diff --git a/include/asm-m32r/spinlock_types.h b/include/asm-m32r/spinlock_types.h
deleted file mode 100644
index 83f52105c0e4..000000000000
--- a/include/asm-m32r/spinlock_types.h
+++ /dev/null
@@ -1,23 +0,0 @@
1#ifndef _ASM_M32R_SPINLOCK_TYPES_H
2#define _ASM_M32R_SPINLOCK_TYPES_H
3
4#ifndef __LINUX_SPINLOCK_TYPES_H
5# error "please don't include this file directly"
6#endif
7
8typedef struct {
9 volatile int slock;
10} raw_spinlock_t;
11
12#define __RAW_SPIN_LOCK_UNLOCKED { 1 }
13
14typedef struct {
15 volatile int lock;
16} raw_rwlock_t;
17
18#define RW_LOCK_BIAS 0x01000000
19#define RW_LOCK_BIAS_STR "0x01000000"
20
21#define __RAW_RW_LOCK_UNLOCKED { RW_LOCK_BIAS }
22
23#endif /* _ASM_M32R_SPINLOCK_TYPES_H */
diff --git a/include/asm-m32r/stat.h b/include/asm-m32r/stat.h
deleted file mode 100644
index da4518f82d6d..000000000000
--- a/include/asm-m32r/stat.h
+++ /dev/null
@@ -1,87 +0,0 @@
1#ifndef _ASM_M32R_STAT_H
2#define _ASM_M32R_STAT_H
3
4#include <asm/byteorder.h>
5
6struct __old_kernel_stat {
7 unsigned short st_dev;
8 unsigned short st_ino;
9 unsigned short st_mode;
10 unsigned short st_nlink;
11 unsigned short st_uid;
12 unsigned short st_gid;
13 unsigned short st_rdev;
14 unsigned long st_size;
15 unsigned long st_atime;
16 unsigned long st_mtime;
17 unsigned long st_ctime;
18};
19
20#define STAT_HAVE_NSEC 1
21
22struct stat {
23 unsigned short st_dev;
24 unsigned short __pad1;
25 unsigned long st_ino;
26 unsigned short st_mode;
27 unsigned short st_nlink;
28 unsigned short st_uid;
29 unsigned short st_gid;
30 unsigned short st_rdev;
31 unsigned short __pad2;
32 unsigned long st_size;
33 unsigned long st_blksize;
34 unsigned long st_blocks;
35 unsigned long st_atime;
36 unsigned long st_atime_nsec;
37 unsigned long st_mtime;
38 unsigned long st_mtime_nsec;
39 unsigned long st_ctime;
40 unsigned long st_ctime_nsec;
41 unsigned long __unused4;
42 unsigned long __unused5;
43};
44
45/* This matches struct stat64 in glibc2.1, hence the absolutely
46 * insane amounts of padding around dev_t's.
47 */
48struct stat64 {
49 unsigned long long st_dev;
50 unsigned char __pad0[4];
51#define STAT64_HAS_BROKEN_ST_INO
52 unsigned long __st_ino;
53
54 unsigned int st_mode;
55 unsigned int st_nlink;
56
57 unsigned long st_uid;
58 unsigned long st_gid;
59
60 unsigned long long st_rdev;
61 unsigned char __pad3[4];
62
63 long long st_size;
64 unsigned long st_blksize;
65
66#if defined(__BIG_ENDIAN)
67 unsigned long __pad4; /* future possible st_blocks high bits */
68 unsigned long st_blocks; /* Number 512-byte blocks allocated. */
69#elif defined(__LITTLE_ENDIAN)
70 unsigned long st_blocks; /* Number 512-byte blocks allocated. */
71 unsigned long __pad4; /* future possible st_blocks high bits */
72#else
73#error no endian defined
74#endif
75 unsigned long st_atime;
76 unsigned long st_atime_nsec;
77
78 unsigned long st_mtime;
79 unsigned long st_mtime_nsec;
80
81 unsigned long st_ctime;
82 unsigned long st_ctime_nsec;
83
84 unsigned long long st_ino;
85};
86
87#endif /* _ASM_M32R_STAT_H */
diff --git a/include/asm-m32r/statfs.h b/include/asm-m32r/statfs.h
deleted file mode 100644
index 6eb4c6007e6b..000000000000
--- a/include/asm-m32r/statfs.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef _ASM_M32R_STATFS_H
2#define _ASM_M32R_STATFS_H
3
4#include <asm-generic/statfs.h>
5
6#endif /* _ASM_M32R_STATFS_H */
diff --git a/include/asm-m32r/string.h b/include/asm-m32r/string.h
deleted file mode 100644
index e61e2b0bfc1f..000000000000
--- a/include/asm-m32r/string.h
+++ /dev/null
@@ -1,13 +0,0 @@
1#ifndef _ASM_M32R_STRING_H
2#define _ASM_M32R_STRING_H
3
4#define __HAVE_ARCH_STRLEN
5extern size_t strlen(const char * s);
6
7#define __HAVE_ARCH_MEMCPY
8extern void *memcpy(void *__to, __const__ void *__from, size_t __n);
9
10#define __HAVE_ARCH_MEMSET
11extern void *memset(void *__s, int __c, size_t __count);
12
13#endif /* _ASM_M32R_STRING_H */
diff --git a/include/asm-m32r/swab.h b/include/asm-m32r/swab.h
deleted file mode 100644
index 54dab001d6d1..000000000000
--- a/include/asm-m32r/swab.h
+++ /dev/null
@@ -1,10 +0,0 @@
1#ifndef _ASM_M32R_SWAB_H
2#define _ASM_M32R_SWAB_H
3
4#include <linux/types.h>
5
6#if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
7# define __SWAB_64_THRU_32__
8#endif
9
10#endif /* _ASM_M32R_SWAB_H */
diff --git a/include/asm-m32r/syscall.h b/include/asm-m32r/syscall.h
deleted file mode 100644
index 25f316f2b78d..000000000000
--- a/include/asm-m32r/syscall.h
+++ /dev/null
@@ -1,8 +0,0 @@
1#ifndef _ASM_M32R_SYSCALL_H
2#define _ASM_M32R_SYSCALL_H
3
4/* Definitions for the system call vector. */
5#define SYSCALL_VECTOR "2"
6#define SYSCALL_VECTOR_ADDRESS "0xa0"
7
8#endif /* _ASM_M32R_SYSCALL_H */
diff --git a/include/asm-m32r/system.h b/include/asm-m32r/system.h
deleted file mode 100644
index c980f5ba8de7..000000000000
--- a/include/asm-m32r/system.h
+++ /dev/null
@@ -1,431 +0,0 @@
1#ifndef _ASM_M32R_SYSTEM_H
2#define _ASM_M32R_SYSTEM_H
3
4/*
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 *
9 * Copyright (C) 2001 Hiroyuki Kondo, Hirokazu Takata, and Hitoshi Yamamoto
10 * Copyright (C) 2004, 2006 Hirokazu Takata <takata at linux-m32r.org>
11 */
12
13#include <linux/compiler.h>
14#include <asm/assembler.h>
15
16#ifdef __KERNEL__
17
18/*
19 * switch_to(prev, next) should switch from task `prev' to `next'
20 * `prev' will never be the same as `next'.
21 *
22 * `next' and `prev' should be struct task_struct, but it isn't always defined
23 */
24
25#if defined(CONFIG_FRAME_POINTER) || \
26 !defined(CONFIG_SCHED_OMIT_FRAME_POINTER)
27#define M32R_PUSH_FP " push fp\n"
28#define M32R_POP_FP " pop fp\n"
29#else
30#define M32R_PUSH_FP ""
31#define M32R_POP_FP ""
32#endif
33
34#define switch_to(prev, next, last) do { \
35 __asm__ __volatile__ ( \
36 " seth lr, #high(1f) \n" \
37 " or3 lr, lr, #low(1f) \n" \
38 " st lr, @%4 ; store old LR \n" \
39 " ld lr, @%5 ; load new LR \n" \
40 M32R_PUSH_FP \
41 " st sp, @%2 ; store old SP \n" \
42 " ld sp, @%3 ; load new SP \n" \
43 " push %1 ; store `prev' on new stack \n" \
44 " jmp lr \n" \
45 " .fillinsn \n" \
46 "1: \n" \
47 " pop %0 ; restore `__last' from new stack \n" \
48 M32R_POP_FP \
49 : "=r" (last) \
50 : "0" (prev), \
51 "r" (&(prev->thread.sp)), "r" (&(next->thread.sp)), \
52 "r" (&(prev->thread.lr)), "r" (&(next->thread.lr)) \
53 : "memory", "lr" \
54 ); \
55} while(0)
56
57/* Interrupt Control */
58#if !defined(CONFIG_CHIP_M32102) && !defined(CONFIG_CHIP_M32104)
59#define local_irq_enable() \
60 __asm__ __volatile__ ("setpsw #0x40 -> nop": : :"memory")
61#define local_irq_disable() \
62 __asm__ __volatile__ ("clrpsw #0x40 -> nop": : :"memory")
63#else /* CONFIG_CHIP_M32102 || CONFIG_CHIP_M32104 */
64static inline void local_irq_enable(void)
65{
66 unsigned long tmpreg;
67 __asm__ __volatile__(
68 "mvfc %0, psw; \n\t"
69 "or3 %0, %0, #0x0040; \n\t"
70 "mvtc %0, psw; \n\t"
71 : "=&r" (tmpreg) : : "cbit", "memory");
72}
73
74static inline void local_irq_disable(void)
75{
76 unsigned long tmpreg0, tmpreg1;
77 __asm__ __volatile__(
78 "ld24 %0, #0 ; Use 32-bit insn. \n\t"
79 "mvfc %1, psw ; No interrupt can be accepted here. \n\t"
80 "mvtc %0, psw \n\t"
81 "and3 %0, %1, #0xffbf \n\t"
82 "mvtc %0, psw \n\t"
83 : "=&r" (tmpreg0), "=&r" (tmpreg1) : : "cbit", "memory");
84}
85#endif /* CONFIG_CHIP_M32102 || CONFIG_CHIP_M32104 */
86
87#define local_save_flags(x) \
88 __asm__ __volatile__("mvfc %0,psw" : "=r"(x) : /* no input */)
89
90#define local_irq_restore(x) \
91 __asm__ __volatile__("mvtc %0,psw" : /* no outputs */ \
92 : "r" (x) : "cbit", "memory")
93
94#if !(defined(CONFIG_CHIP_M32102) || defined(CONFIG_CHIP_M32104))
95#define local_irq_save(x) \
96 __asm__ __volatile__( \
97 "mvfc %0, psw; \n\t" \
98 "clrpsw #0x40 -> nop; \n\t" \
99 : "=r" (x) : /* no input */ : "memory")
100#else /* CONFIG_CHIP_M32102 || CONFIG_CHIP_M32104 */
101#define local_irq_save(x) \
102 ({ \
103 unsigned long tmpreg; \
104 __asm__ __volatile__( \
105 "ld24 %1, #0 \n\t" \
106 "mvfc %0, psw \n\t" \
107 "mvtc %1, psw \n\t" \
108 "and3 %1, %0, #0xffbf \n\t" \
109 "mvtc %1, psw \n\t" \
110 : "=r" (x), "=&r" (tmpreg) \
111 : : "cbit", "memory"); \
112 })
113#endif /* CONFIG_CHIP_M32102 || CONFIG_CHIP_M32104 */
114
115#define irqs_disabled() \
116 ({ \
117 unsigned long flags; \
118 local_save_flags(flags); \
119 !(flags & 0x40); \
120 })
121
122#define nop() __asm__ __volatile__ ("nop" : : )
123
124#define xchg(ptr, x) \
125 ((__typeof__(*(ptr)))__xchg((unsigned long)(x), (ptr), sizeof(*(ptr))))
126#define xchg_local(ptr, x) \
127 ((__typeof__(*(ptr)))__xchg_local((unsigned long)(x), (ptr), \
128 sizeof(*(ptr))))
129
130extern void __xchg_called_with_bad_pointer(void);
131
132#ifdef CONFIG_CHIP_M32700_TS1
133#define DCACHE_CLEAR(reg0, reg1, addr) \
134 "seth "reg1", #high(dcache_dummy); \n\t" \
135 "or3 "reg1", "reg1", #low(dcache_dummy); \n\t" \
136 "lock "reg0", @"reg1"; \n\t" \
137 "add3 "reg0", "addr", #0x1000; \n\t" \
138 "ld "reg0", @"reg0"; \n\t" \
139 "add3 "reg0", "addr", #0x2000; \n\t" \
140 "ld "reg0", @"reg0"; \n\t" \
141 "unlock "reg0", @"reg1"; \n\t"
142 /* FIXME: This workaround code cannot handle kernel modules
143 * correctly under SMP environment.
144 */
145#else /* CONFIG_CHIP_M32700_TS1 */
146#define DCACHE_CLEAR(reg0, reg1, addr)
147#endif /* CONFIG_CHIP_M32700_TS1 */
148
149static __always_inline unsigned long
150__xchg(unsigned long x, volatile void *ptr, int size)
151{
152 unsigned long flags;
153 unsigned long tmp = 0;
154
155 local_irq_save(flags);
156
157 switch (size) {
158#ifndef CONFIG_SMP
159 case 1:
160 __asm__ __volatile__ (
161 "ldb %0, @%2 \n\t"
162 "stb %1, @%2 \n\t"
163 : "=&r" (tmp) : "r" (x), "r" (ptr) : "memory");
164 break;
165 case 2:
166 __asm__ __volatile__ (
167 "ldh %0, @%2 \n\t"
168 "sth %1, @%2 \n\t"
169 : "=&r" (tmp) : "r" (x), "r" (ptr) : "memory");
170 break;
171 case 4:
172 __asm__ __volatile__ (
173 "ld %0, @%2 \n\t"
174 "st %1, @%2 \n\t"
175 : "=&r" (tmp) : "r" (x), "r" (ptr) : "memory");
176 break;
177#else /* CONFIG_SMP */
178 case 4:
179 __asm__ __volatile__ (
180 DCACHE_CLEAR("%0", "r4", "%2")
181 "lock %0, @%2; \n\t"
182 "unlock %1, @%2; \n\t"
183 : "=&r" (tmp) : "r" (x), "r" (ptr)
184 : "memory"
185#ifdef CONFIG_CHIP_M32700_TS1
186 , "r4"
187#endif /* CONFIG_CHIP_M32700_TS1 */
188 );
189 break;
190#endif /* CONFIG_SMP */
191 default:
192 __xchg_called_with_bad_pointer();
193 }
194
195 local_irq_restore(flags);
196
197 return (tmp);
198}
199
200static __always_inline unsigned long
201__xchg_local(unsigned long x, volatile void *ptr, int size)
202{
203 unsigned long flags;
204 unsigned long tmp = 0;
205
206 local_irq_save(flags);
207
208 switch (size) {
209 case 1:
210 __asm__ __volatile__ (
211 "ldb %0, @%2 \n\t"
212 "stb %1, @%2 \n\t"
213 : "=&r" (tmp) : "r" (x), "r" (ptr) : "memory");
214 break;
215 case 2:
216 __asm__ __volatile__ (
217 "ldh %0, @%2 \n\t"
218 "sth %1, @%2 \n\t"
219 : "=&r" (tmp) : "r" (x), "r" (ptr) : "memory");
220 break;
221 case 4:
222 __asm__ __volatile__ (
223 "ld %0, @%2 \n\t"
224 "st %1, @%2 \n\t"
225 : "=&r" (tmp) : "r" (x), "r" (ptr) : "memory");
226 break;
227 default:
228 __xchg_called_with_bad_pointer();
229 }
230
231 local_irq_restore(flags);
232
233 return (tmp);
234}
235
236#define __HAVE_ARCH_CMPXCHG 1
237
238static inline unsigned long
239__cmpxchg_u32(volatile unsigned int *p, unsigned int old, unsigned int new)
240{
241 unsigned long flags;
242 unsigned int retval;
243
244 local_irq_save(flags);
245 __asm__ __volatile__ (
246 DCACHE_CLEAR("%0", "r4", "%1")
247 M32R_LOCK" %0, @%1; \n"
248 " bne %0, %2, 1f; \n"
249 M32R_UNLOCK" %3, @%1; \n"
250 " bra 2f; \n"
251 " .fillinsn \n"
252 "1:"
253 M32R_UNLOCK" %0, @%1; \n"
254 " .fillinsn \n"
255 "2:"
256 : "=&r" (retval)
257 : "r" (p), "r" (old), "r" (new)
258 : "cbit", "memory"
259#ifdef CONFIG_CHIP_M32700_TS1
260 , "r4"
261#endif /* CONFIG_CHIP_M32700_TS1 */
262 );
263 local_irq_restore(flags);
264
265 return retval;
266}
267
268static inline unsigned long
269__cmpxchg_local_u32(volatile unsigned int *p, unsigned int old,
270 unsigned int new)
271{
272 unsigned long flags;
273 unsigned int retval;
274
275 local_irq_save(flags);
276 __asm__ __volatile__ (
277 DCACHE_CLEAR("%0", "r4", "%1")
278 "ld %0, @%1; \n"
279 " bne %0, %2, 1f; \n"
280 "st %3, @%1; \n"
281 " bra 2f; \n"
282 " .fillinsn \n"
283 "1:"
284 "st %0, @%1; \n"
285 " .fillinsn \n"
286 "2:"
287 : "=&r" (retval)
288 : "r" (p), "r" (old), "r" (new)
289 : "cbit", "memory"
290#ifdef CONFIG_CHIP_M32700_TS1
291 , "r4"
292#endif /* CONFIG_CHIP_M32700_TS1 */
293 );
294 local_irq_restore(flags);
295
296 return retval;
297}
298
299/* This function doesn't exist, so you'll get a linker error
300 if something tries to do an invalid cmpxchg(). */
301extern void __cmpxchg_called_with_bad_pointer(void);
302
303static inline unsigned long
304__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size)
305{
306 switch (size) {
307 case 4:
308 return __cmpxchg_u32(ptr, old, new);
309#if 0 /* we don't have __cmpxchg_u64 */
310 case 8:
311 return __cmpxchg_u64(ptr, old, new);
312#endif /* 0 */
313 }
314 __cmpxchg_called_with_bad_pointer();
315 return old;
316}
317
318#define cmpxchg(ptr, o, n) \
319 ((__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)(o), \
320 (unsigned long)(n), sizeof(*(ptr))))
321
322#include <asm-generic/cmpxchg-local.h>
323
324static inline unsigned long __cmpxchg_local(volatile void *ptr,
325 unsigned long old,
326 unsigned long new, int size)
327{
328 switch (size) {
329 case 4:
330 return __cmpxchg_local_u32(ptr, old, new);
331 default:
332 return __cmpxchg_local_generic(ptr, old, new, size);
333 }
334
335 return old;
336}
337
338/*
339 * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
340 * them available.
341 */
342#define cmpxchg_local(ptr, o, n) \
343 ((__typeof__(*(ptr)))__cmpxchg_local((ptr), (unsigned long)(o), \
344 (unsigned long)(n), sizeof(*(ptr))))
345#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
346
347#endif /* __KERNEL__ */
348
349/*
350 * Memory barrier.
351 *
352 * mb() prevents loads and stores being reordered across this point.
353 * rmb() prevents loads being reordered across this point.
354 * wmb() prevents stores being reordered across this point.
355 */
356#define mb() barrier()
357#define rmb() mb()
358#define wmb() mb()
359
360/**
361 * read_barrier_depends - Flush all pending reads that subsequents reads
362 * depend on.
363 *
364 * No data-dependent reads from memory-like regions are ever reordered
365 * over this barrier. All reads preceding this primitive are guaranteed
366 * to access memory (but not necessarily other CPUs' caches) before any
367 * reads following this primitive that depend on the data return by
368 * any of the preceding reads. This primitive is much lighter weight than
369 * rmb() on most CPUs, and is never heavier weight than is
370 * rmb().
371 *
372 * These ordering constraints are respected by both the local CPU
373 * and the compiler.
374 *
375 * Ordering is not guaranteed by anything other than these primitives,
376 * not even by data dependencies. See the documentation for
377 * memory_barrier() for examples and URLs to more information.
378 *
379 * For example, the following code would force ordering (the initial
380 * value of "a" is zero, "b" is one, and "p" is "&a"):
381 *
382 * <programlisting>
383 * CPU 0 CPU 1
384 *
385 * b = 2;
386 * memory_barrier();
387 * p = &b; q = p;
388 * read_barrier_depends();
389 * d = *q;
390 * </programlisting>
391 *
392 *
393 * because the read of "*q" depends on the read of "p" and these
394 * two reads are separated by a read_barrier_depends(). However,
395 * the following code, with the same initial values for "a" and "b":
396 *
397 * <programlisting>
398 * CPU 0 CPU 1
399 *
400 * a = 2;
401 * memory_barrier();
402 * b = 3; y = b;
403 * read_barrier_depends();
404 * x = a;
405 * </programlisting>
406 *
407 * does not enforce ordering, since there is no data dependency between
408 * the read of "a" and the read of "b". Therefore, on some CPUs, such
409 * as Alpha, "y" could be set to 3 and "x" to 0. Use rmb()
410 * in cases like this where there are no data dependencies.
411 **/
412
413#define read_barrier_depends() do { } while (0)
414
415#ifdef CONFIG_SMP
416#define smp_mb() mb()
417#define smp_rmb() rmb()
418#define smp_wmb() wmb()
419#define smp_read_barrier_depends() read_barrier_depends()
420#define set_mb(var, value) do { (void) xchg(&var, value); } while (0)
421#else
422#define smp_mb() barrier()
423#define smp_rmb() barrier()
424#define smp_wmb() barrier()
425#define smp_read_barrier_depends() do { } while (0)
426#define set_mb(var, value) do { var = value; barrier(); } while (0)
427#endif
428
429#define arch_align_stack(x) (x)
430
431#endif /* _ASM_M32R_SYSTEM_H */
diff --git a/include/asm-m32r/termbits.h b/include/asm-m32r/termbits.h
deleted file mode 100644
index bc104008b55b..000000000000
--- a/include/asm-m32r/termbits.h
+++ /dev/null
@@ -1,199 +0,0 @@
1#ifndef _ASM_M32R_TERMBITS_H
2#define _ASM_M32R_TERMBITS_H
3
4#include <linux/posix_types.h>
5
6typedef unsigned char cc_t;
7typedef unsigned int speed_t;
8typedef unsigned int tcflag_t;
9
10#define NCCS 19
11struct termios {
12 tcflag_t c_iflag; /* input mode flags */
13 tcflag_t c_oflag; /* output mode flags */
14 tcflag_t c_cflag; /* control mode flags */
15 tcflag_t c_lflag; /* local mode flags */
16 cc_t c_line; /* line discipline */
17 cc_t c_cc[NCCS]; /* control characters */
18};
19
20struct termios2 {
21 tcflag_t c_iflag; /* input mode flags */
22 tcflag_t c_oflag; /* output mode flags */
23 tcflag_t c_cflag; /* control mode flags */
24 tcflag_t c_lflag; /* local mode flags */
25 cc_t c_line; /* line discipline */
26 cc_t c_cc[NCCS]; /* control characters */
27 speed_t c_ispeed; /* input speed */
28 speed_t c_ospeed; /* output speed */
29};
30
31struct ktermios {
32 tcflag_t c_iflag; /* input mode flags */
33 tcflag_t c_oflag; /* output mode flags */
34 tcflag_t c_cflag; /* control mode flags */
35 tcflag_t c_lflag; /* local mode flags */
36 cc_t c_line; /* line discipline */
37 cc_t c_cc[NCCS]; /* control characters */
38 speed_t c_ispeed; /* input speed */
39 speed_t c_ospeed; /* output speed */
40};
41
42/* c_cc characters */
43#define VINTR 0
44#define VQUIT 1
45#define VERASE 2
46#define VKILL 3
47#define VEOF 4
48#define VTIME 5
49#define VMIN 6
50#define VSWTC 7
51#define VSTART 8
52#define VSTOP 9
53#define VSUSP 10
54#define VEOL 11
55#define VREPRINT 12
56#define VDISCARD 13
57#define VWERASE 14
58#define VLNEXT 15
59#define VEOL2 16
60
61/* c_iflag bits */
62#define IGNBRK 0000001
63#define BRKINT 0000002
64#define IGNPAR 0000004
65#define PARMRK 0000010
66#define INPCK 0000020
67#define ISTRIP 0000040
68#define INLCR 0000100
69#define IGNCR 0000200
70#define ICRNL 0000400
71#define IUCLC 0001000
72#define IXON 0002000
73#define IXANY 0004000
74#define IXOFF 0010000
75#define IMAXBEL 0020000
76#define IUTF8 0040000
77
78/* c_oflag bits */
79#define OPOST 0000001
80#define OLCUC 0000002
81#define ONLCR 0000004
82#define OCRNL 0000010
83#define ONOCR 0000020
84#define ONLRET 0000040
85#define OFILL 0000100
86#define OFDEL 0000200
87#define NLDLY 0000400
88#define NL0 0000000
89#define NL1 0000400
90#define CRDLY 0003000
91#define CR0 0000000
92#define CR1 0001000
93#define CR2 0002000
94#define CR3 0003000
95#define TABDLY 0014000
96#define TAB0 0000000
97#define TAB1 0004000
98#define TAB2 0010000
99#define TAB3 0014000
100#define XTABS 0014000
101#define BSDLY 0020000
102#define BS0 0000000
103#define BS1 0020000
104#define VTDLY 0040000
105#define VT0 0000000
106#define VT1 0040000
107#define FFDLY 0100000
108#define FF0 0000000
109#define FF1 0100000
110
111/* c_cflag bit meaning */
112#define CBAUD 0010017
113#define B0 0000000 /* hang up */
114#define B50 0000001
115#define B75 0000002
116#define B110 0000003
117#define B134 0000004
118#define B150 0000005
119#define B200 0000006
120#define B300 0000007
121#define B600 0000010
122#define B1200 0000011
123#define B1800 0000012
124#define B2400 0000013
125#define B4800 0000014
126#define B9600 0000015
127#define B19200 0000016
128#define B38400 0000017
129#define EXTA B19200
130#define EXTB B38400
131#define CSIZE 0000060
132#define CS5 0000000
133#define CS6 0000020
134#define CS7 0000040
135#define CS8 0000060
136#define CSTOPB 0000100
137#define CREAD 0000200
138#define PARENB 0000400
139#define PARODD 0001000
140#define HUPCL 0002000
141#define CLOCAL 0004000
142#define CBAUDEX 0010000
143#define BOTHER 0010000
144#define B57600 0010001
145#define B115200 0010002
146#define B230400 0010003
147#define B460800 0010004
148#define B500000 0010005
149#define B576000 0010006
150#define B921600 0010007
151#define B1000000 0010010
152#define B1152000 0010011
153#define B1500000 0010012
154#define B2000000 0010013
155#define B2500000 0010014
156#define B3000000 0010015
157#define B3500000 0010016
158#define B4000000 0010017
159#define CIBAUD 002003600000 /** input baud rate */
160#define CTVB 004000000000 /* VisioBraille Terminal flow control */
161#define CMSPAR 010000000000 /* mark or space (stick) parity */
162#define CRTSCTS 020000000000 /* flow control */
163
164#define IBSHIFT 16 /* Shift from CBAUD to CIBAUD */
165
166/* c_lflag bits */
167#define ISIG 0000001
168#define ICANON 0000002
169#define XCASE 0000004
170#define ECHO 0000010
171#define ECHOE 0000020
172#define ECHOK 0000040
173#define ECHONL 0000100
174#define NOFLSH 0000200
175#define TOSTOP 0000400
176#define ECHOCTL 0001000
177#define ECHOPRT 0002000
178#define ECHOKE 0004000
179#define FLUSHO 0010000
180#define PENDIN 0040000
181#define IEXTEN 0100000
182
183/* tcflow() and TCXONC use these */
184#define TCOOFF 0
185#define TCOON 1
186#define TCIOFF 2
187#define TCION 3
188
189/* tcflush() and TCFLSH use these */
190#define TCIFLUSH 0
191#define TCOFLUSH 1
192#define TCIOFLUSH 2
193
194/* tcsetattr uses these */
195#define TCSANOW 0
196#define TCSADRAIN 1
197#define TCSAFLUSH 2
198
199#endif /* _ASM_M32R_TERMBITS_H */
diff --git a/include/asm-m32r/termios.h b/include/asm-m32r/termios.h
deleted file mode 100644
index 93ce79fd342a..000000000000
--- a/include/asm-m32r/termios.h
+++ /dev/null
@@ -1,91 +0,0 @@
1#ifndef _M32R_TERMIOS_H
2#define _M32R_TERMIOS_H
3
4#include <asm/termbits.h>
5#include <asm/ioctls.h>
6
7struct winsize {
8 unsigned short ws_row;
9 unsigned short ws_col;
10 unsigned short ws_xpixel;
11 unsigned short ws_ypixel;
12};
13
14#define NCC 8
15struct termio {
16 unsigned short c_iflag; /* input mode flags */
17 unsigned short c_oflag; /* output mode flags */
18 unsigned short c_cflag; /* control mode flags */
19 unsigned short c_lflag; /* local mode flags */
20 unsigned char c_line; /* line discipline */
21 unsigned char c_cc[NCC]; /* control characters */
22};
23
24/* modem lines */
25#define TIOCM_LE 0x001
26#define TIOCM_DTR 0x002
27#define TIOCM_RTS 0x004
28#define TIOCM_ST 0x008
29#define TIOCM_SR 0x010
30#define TIOCM_CTS 0x020
31#define TIOCM_CAR 0x040
32#define TIOCM_RNG 0x080
33#define TIOCM_DSR 0x100
34#define TIOCM_CD TIOCM_CAR
35#define TIOCM_RI TIOCM_RNG
36#define TIOCM_OUT1 0x2000
37#define TIOCM_OUT2 0x4000
38#define TIOCM_LOOP 0x8000
39
40/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */
41
42#ifdef __KERNEL__
43#include <linux/module.h>
44
45/* intr=^C quit=^\ erase=del kill=^U
46 eof=^D vtime=\0 vmin=\1 sxtc=\0
47 start=^Q stop=^S susp=^Z eol=\0
48 reprint=^R discard=^U werase=^W lnext=^V
49 eol2=\0
50*/
51#define INIT_C_CC "\003\034\177\025\004\0\1\0\021\023\032\0\022\017\027\026\0"
52
53/*
54 * Translate a "termio" structure into a "termios". Ugh.
55 */
56#define SET_LOW_TERMIOS_BITS(termios, termio, x) { \
57 unsigned short __tmp; \
58 get_user(__tmp,&(termio)->x); \
59 *(unsigned short *) &(termios)->x = __tmp; \
60}
61
62#define user_termio_to_kernel_termios(termios, termio) \
63({ \
64 SET_LOW_TERMIOS_BITS(termios, termio, c_iflag); \
65 SET_LOW_TERMIOS_BITS(termios, termio, c_oflag); \
66 SET_LOW_TERMIOS_BITS(termios, termio, c_cflag); \
67 SET_LOW_TERMIOS_BITS(termios, termio, c_lflag); \
68 copy_from_user((termios)->c_cc, (termio)->c_cc, NCC); \
69})
70
71/*
72 * Translate a "termios" structure into a "termio". Ugh.
73 */
74#define kernel_termios_to_user_termio(termio, termios) \
75({ \
76 put_user((termios)->c_iflag, &(termio)->c_iflag); \
77 put_user((termios)->c_oflag, &(termio)->c_oflag); \
78 put_user((termios)->c_cflag, &(termio)->c_cflag); \
79 put_user((termios)->c_lflag, &(termio)->c_lflag); \
80 put_user((termios)->c_line, &(termio)->c_line); \
81 copy_to_user((termio)->c_cc, (termios)->c_cc, NCC); \
82})
83
84#define user_termios_to_kernel_termios(k, u) copy_from_user(k, u, sizeof(struct termios2))
85#define kernel_termios_to_user_termios(u, k) copy_to_user(u, k, sizeof(struct termios2))
86#define user_termios_to_kernel_termios_1(k, u) copy_from_user(k, u, sizeof(struct termios))
87#define kernel_termios_to_user_termios_1(u, k) copy_to_user(u, k, sizeof(struct termios))
88
89#endif /* __KERNEL__ */
90
91#endif /* _M32R_TERMIOS_H */
diff --git a/include/asm-m32r/thread_info.h b/include/asm-m32r/thread_info.h
deleted file mode 100644
index 8589d462df27..000000000000
--- a/include/asm-m32r/thread_info.h
+++ /dev/null
@@ -1,184 +0,0 @@
1#ifndef _ASM_M32R_THREAD_INFO_H
2#define _ASM_M32R_THREAD_INFO_H
3
4/* thread_info.h: m32r low-level thread information
5 *
6 * Copyright (C) 2002 David Howells (dhowells@redhat.com)
7 * - Incorporating suggestions made by Linus Torvalds and Dave Miller
8 * Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org>
9 */
10
11#ifdef __KERNEL__
12
13#ifndef __ASSEMBLY__
14#include <asm/processor.h>
15#endif
16
17/*
18 * low level task data that entry.S needs immediate access to
19 * - this struct should fit entirely inside of one cache line
20 * - this struct shares the supervisor stack pages
21 * - if the contents of this structure are changed, the assembly constants must also be changed
22 */
23#ifndef __ASSEMBLY__
24
25struct thread_info {
26 struct task_struct *task; /* main task structure */
27 struct exec_domain *exec_domain; /* execution domain */
28 unsigned long flags; /* low level flags */
29 unsigned long status; /* thread-synchronous flags */
30 __u32 cpu; /* current CPU */
31 int preempt_count; /* 0 => preemptable, <0 => BUG */
32
33 mm_segment_t addr_limit; /* thread address space:
34 0-0xBFFFFFFF for user-thread
35 0-0xFFFFFFFF for kernel-thread
36 */
37 struct restart_block restart_block;
38
39 __u8 supervisor_stack[0];
40};
41
42#else /* !__ASSEMBLY__ */
43
44/* offsets into the thread_info struct for assembly code access */
45#define TI_TASK 0x00000000
46#define TI_EXEC_DOMAIN 0x00000004
47#define TI_FLAGS 0x00000008
48#define TI_STATUS 0x0000000C
49#define TI_CPU 0x00000010
50#define TI_PRE_COUNT 0x00000014
51#define TI_ADDR_LIMIT 0x00000018
52#define TI_RESTART_BLOCK 0x000001C
53
54#endif
55
56#define PREEMPT_ACTIVE 0x10000000
57
58/*
59 * macros/functions for gaining access to the thread information structure
60 *
61 * preempt_count needs to be 1 initially, until the scheduler is functional.
62 */
63#ifndef __ASSEMBLY__
64
65#define INIT_THREAD_INFO(tsk) \
66{ \
67 .task = &tsk, \
68 .exec_domain = &default_exec_domain, \
69 .flags = 0, \
70 .cpu = 0, \
71 .preempt_count = 1, \
72 .addr_limit = KERNEL_DS, \
73 .restart_block = { \
74 .fn = do_no_restart_syscall, \
75 }, \
76}
77
78#define init_thread_info (init_thread_union.thread_info)
79#define init_stack (init_thread_union.stack)
80
81#define THREAD_SIZE (2*PAGE_SIZE)
82
83/* how to get the thread information struct from C */
84static inline struct thread_info *current_thread_info(void)
85{
86 struct thread_info *ti;
87
88 __asm__ __volatile__ (
89 "ldi %0, #%1 \n\t"
90 "and %0, sp \n\t"
91 : "=r" (ti) : "i" (~(THREAD_SIZE - 1))
92 );
93
94 return ti;
95}
96
97#define __HAVE_ARCH_THREAD_INFO_ALLOCATOR
98
99/* thread information allocation */
100#ifdef CONFIG_DEBUG_STACK_USAGE
101#define alloc_thread_info(tsk) \
102 ({ \
103 struct thread_info *ret; \
104 \
105 ret = kzalloc(THREAD_SIZE, GFP_KERNEL); \
106 \
107 ret; \
108 })
109#else
110#define alloc_thread_info(tsk) kmalloc(THREAD_SIZE, GFP_KERNEL)
111#endif
112
113#define free_thread_info(info) kfree(info)
114
115#define TI_FLAG_FAULT_CODE_SHIFT 28
116
117static inline void set_thread_fault_code(unsigned int val)
118{
119 struct thread_info *ti = current_thread_info();
120 ti->flags = (ti->flags & (~0 >> (32 - TI_FLAG_FAULT_CODE_SHIFT)))
121 | (val << TI_FLAG_FAULT_CODE_SHIFT);
122}
123
124static inline unsigned int get_thread_fault_code(void)
125{
126 struct thread_info *ti = current_thread_info();
127 return ti->flags >> TI_FLAG_FAULT_CODE_SHIFT;
128}
129
130#else /* !__ASSEMBLY__ */
131
132#define THREAD_SIZE 8192
133
134/* how to get the thread information struct from ASM */
135#define GET_THREAD_INFO(reg) GET_THREAD_INFO reg
136 .macro GET_THREAD_INFO reg
137 ldi \reg, #-THREAD_SIZE
138 and \reg, sp
139 .endm
140
141#endif
142
143/*
144 * thread information flags
145 * - these are process state flags that various assembly files may need to access
146 * - pending work-to-be-done flags are in LSW
147 * - other flags in MSW
148 */
149#define TIF_SYSCALL_TRACE 0 /* syscall trace active */
150#define TIF_SIGPENDING 1 /* signal pending */
151#define TIF_NEED_RESCHED 2 /* rescheduling necessary */
152#define TIF_SINGLESTEP 3 /* restore singlestep on return to user mode */
153#define TIF_IRET 4 /* return with iret */
154#define TIF_RESTORE_SIGMASK 8 /* restore signal mask in do_signal() */
155#define TIF_USEDFPU 16 /* FPU was used by this task this quantum (SMP) */
156#define TIF_POLLING_NRFLAG 17 /* true if poll_idle() is polling TIF_NEED_RESCHED */
157#define TIF_MEMDIE 18 /* OOM killer killed process */
158#define TIF_FREEZE 19 /* is freezing for suspend */
159
160#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE)
161#define _TIF_SIGPENDING (1<<TIF_SIGPENDING)
162#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED)
163#define _TIF_SINGLESTEP (1<<TIF_SINGLESTEP)
164#define _TIF_IRET (1<<TIF_IRET)
165#define _TIF_RESTORE_SIGMASK (1<<TIF_RESTORE_SIGMASK)
166#define _TIF_USEDFPU (1<<TIF_USEDFPU)
167#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG)
168#define _TIF_FREEZE (1<<TIF_FREEZE)
169
170#define _TIF_WORK_MASK 0x0000FFFE /* work to do on interrupt/exception return */
171#define _TIF_ALLWORK_MASK 0x0000FFFF /* work to do on any return to u-space */
172
173/*
174 * Thread-synchronous status.
175 *
176 * This is different from the flags in that nobody else
177 * ever touches our thread-synchronous status, so we don't
178 * have to worry about atomic accesses.
179 */
180#define TS_USEDFPU 0x0001 /* FPU was used by this task this quantum (SMP) */
181
182#endif /* __KERNEL__ */
183
184#endif /* _ASM_M32R_THREAD_INFO_H */
diff --git a/include/asm-m32r/timex.h b/include/asm-m32r/timex.h
deleted file mode 100644
index bb9fe4feb12d..000000000000
--- a/include/asm-m32r/timex.h
+++ /dev/null
@@ -1,27 +0,0 @@
1#ifndef _ASM_M32R_TIMEX_H
2#define _ASM_M32R_TIMEX_H
3
4/*
5 * linux/include/asm-m32r/timex.h
6 *
7 * m32r architecture timex specifications
8 */
9
10#define CLOCK_TICK_RATE (CONFIG_BUS_CLOCK / CONFIG_TIMER_DIVIDE)
11#define CLOCK_TICK_FACTOR 20 /* Factor of both 1000000 and CLOCK_TICK_RATE */
12
13#ifdef __KERNEL__
14/*
15 * Standard way to access the cycle counter.
16 * Currently only used on SMP.
17 */
18
19typedef unsigned long long cycles_t;
20
21static __inline__ cycles_t get_cycles (void)
22{
23 return 0;
24}
25#endif /* __KERNEL__ */
26
27#endif /* _ASM_M32R_TIMEX_H */
diff --git a/include/asm-m32r/tlb.h b/include/asm-m32r/tlb.h
deleted file mode 100644
index c7ebd8d48f3b..000000000000
--- a/include/asm-m32r/tlb.h
+++ /dev/null
@@ -1,20 +0,0 @@
1#ifndef _M32R_TLB_H
2#define _M32R_TLB_H
3
4/*
5 * x86 doesn't need any special per-pte or
6 * per-vma handling..
7 */
8#define tlb_start_vma(tlb, vma) do { } while (0)
9#define tlb_end_vma(tlb, vma) do { } while (0)
10#define __tlb_remove_tlb_entry(tlb, pte, address) do { } while (0)
11
12/*
13 * .. because we flush the whole mm when it
14 * fills up.
15 */
16#define tlb_flush(tlb) flush_tlb_mm((tlb)->mm)
17
18#include <asm-generic/tlb.h>
19
20#endif /* _M32R_TLB_H */
diff --git a/include/asm-m32r/tlbflush.h b/include/asm-m32r/tlbflush.h
deleted file mode 100644
index 0ef95307784e..000000000000
--- a/include/asm-m32r/tlbflush.h
+++ /dev/null
@@ -1,97 +0,0 @@
1#ifndef _ASM_M32R_TLBFLUSH_H
2#define _ASM_M32R_TLBFLUSH_H
3
4#include <asm/m32r.h>
5
6/*
7 * TLB flushing:
8 *
9 * - flush_tlb() flushes the current mm struct TLBs
10 * - flush_tlb_all() flushes all processes TLBs
11 * - flush_tlb_mm(mm) flushes the specified mm context TLB's
12 * - flush_tlb_page(vma, vmaddr) flushes one page
13 * - flush_tlb_range(vma, start, end) flushes a range of pages
14 * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages
15 */
16
17extern void local_flush_tlb_all(void);
18extern void local_flush_tlb_mm(struct mm_struct *);
19extern void local_flush_tlb_page(struct vm_area_struct *, unsigned long);
20extern void local_flush_tlb_range(struct vm_area_struct *, unsigned long,
21 unsigned long);
22
23#ifndef CONFIG_SMP
24#ifdef CONFIG_MMU
25#define flush_tlb_all() local_flush_tlb_all()
26#define flush_tlb_mm(mm) local_flush_tlb_mm(mm)
27#define flush_tlb_page(vma, page) local_flush_tlb_page(vma, page)
28#define flush_tlb_range(vma, start, end) \
29 local_flush_tlb_range(vma, start, end)
30#define flush_tlb_kernel_range(start, end) local_flush_tlb_all()
31#else /* CONFIG_MMU */
32#define flush_tlb_all() do { } while (0)
33#define flush_tlb_mm(mm) do { } while (0)
34#define flush_tlb_page(vma, vmaddr) do { } while (0)
35#define flush_tlb_range(vma, start, end) do { } while (0)
36#endif /* CONFIG_MMU */
37#else /* CONFIG_SMP */
38extern void smp_flush_tlb_all(void);
39extern void smp_flush_tlb_mm(struct mm_struct *);
40extern void smp_flush_tlb_page(struct vm_area_struct *, unsigned long);
41extern void smp_flush_tlb_range(struct vm_area_struct *, unsigned long,
42 unsigned long);
43
44#define flush_tlb_all() smp_flush_tlb_all()
45#define flush_tlb_mm(mm) smp_flush_tlb_mm(mm)
46#define flush_tlb_page(vma, page) smp_flush_tlb_page(vma, page)
47#define flush_tlb_range(vma, start, end) \
48 smp_flush_tlb_range(vma, start, end)
49#define flush_tlb_kernel_range(start, end) smp_flush_tlb_all()
50#endif /* CONFIG_SMP */
51
52static __inline__ void __flush_tlb_page(unsigned long page)
53{
54 unsigned int tmpreg0, tmpreg1, tmpreg2;
55
56 __asm__ __volatile__ (
57 "seth %0, #high(%4) \n\t"
58 "st %3, @(%5, %0) \n\t"
59 "ldi %1, #1 \n\t"
60 "st %1, @(%6, %0) \n\t"
61 "add3 %1, %0, %7 \n\t"
62 ".fillinsn \n"
63 "1: \n\t"
64 "ld %2, @(%6, %0) \n\t"
65 "bnez %2, 1b \n\t"
66 "ld %0, @%1+ \n\t"
67 "ld %1, @%1 \n\t"
68 "st %2, @+%0 \n\t"
69 "st %2, @+%1 \n\t"
70 : "=&r" (tmpreg0), "=&r" (tmpreg1), "=&r" (tmpreg2)
71 : "r" (page), "i" (MMU_REG_BASE), "i" (MSVA_offset),
72 "i" (MTOP_offset), "i" (MIDXI_offset)
73 : "memory"
74 );
75}
76
77static __inline__ void __flush_tlb_all(void)
78{
79 unsigned int tmpreg0, tmpreg1;
80
81 __asm__ __volatile__ (
82 "seth %0, #high(%2) \n\t"
83 "or3 %0, %0, #low(%2) \n\t"
84 "ldi %1, #0xc \n\t"
85 "st %1, @%0 \n\t"
86 ".fillinsn \n"
87 "1: \n\t"
88 "ld %1, @%0 \n\t"
89 "bnez %1, 1b \n\t"
90 : "=&r" (tmpreg0), "=&r" (tmpreg1)
91 : "i" (MTOP) : "memory"
92 );
93}
94
95extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t);
96
97#endif /* _ASM_M32R_TLBFLUSH_H */
diff --git a/include/asm-m32r/topology.h b/include/asm-m32r/topology.h
deleted file mode 100644
index d607eb32bd7e..000000000000
--- a/include/asm-m32r/topology.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef _ASM_M32R_TOPOLOGY_H
2#define _ASM_M32R_TOPOLOGY_H
3
4#include <asm-generic/topology.h>
5
6#endif /* _ASM_M32R_TOPOLOGY_H */
diff --git a/include/asm-m32r/types.h b/include/asm-m32r/types.h
deleted file mode 100644
index bc9f7fff0ac3..000000000000
--- a/include/asm-m32r/types.h
+++ /dev/null
@@ -1,30 +0,0 @@
1#ifndef _ASM_M32R_TYPES_H
2#define _ASM_M32R_TYPES_H
3
4#include <asm-generic/int-ll64.h>
5
6#ifndef __ASSEMBLY__
7
8typedef unsigned short umode_t;
9
10#endif /* __ASSEMBLY__ */
11
12/*
13 * These aren't exported outside the kernel to avoid name space clashes
14 */
15#ifdef __KERNEL__
16
17#define BITS_PER_LONG 32
18
19#ifndef __ASSEMBLY__
20
21/* DMA addresses are 32-bits wide. */
22
23typedef u32 dma_addr_t;
24typedef u64 dma64_addr_t;
25
26#endif /* __ASSEMBLY__ */
27
28#endif /* __KERNEL__ */
29
30#endif /* _ASM_M32R_TYPES_H */
diff --git a/include/asm-m32r/uaccess.h b/include/asm-m32r/uaccess.h
deleted file mode 100644
index 1c7047bea200..000000000000
--- a/include/asm-m32r/uaccess.h
+++ /dev/null
@@ -1,693 +0,0 @@
1#ifndef _ASM_M32R_UACCESS_H
2#define _ASM_M32R_UACCESS_H
3
4/*
5 * linux/include/asm-m32r/uaccess.h
6 *
7 * M32R version.
8 * Copyright (C) 2004, 2006 Hirokazu Takata <takata at linux-m32r.org>
9 */
10
11/*
12 * User space memory access functions
13 */
14#include <linux/errno.h>
15#include <linux/thread_info.h>
16#include <asm/page.h>
17#include <asm/setup.h>
18
19#define VERIFY_READ 0
20#define VERIFY_WRITE 1
21
22/*
23 * The fs value determines whether argument validity checking should be
24 * performed or not. If get_fs() == USER_DS, checking is performed, with
25 * get_fs() == KERNEL_DS, checking is bypassed.
26 *
27 * For historical reasons, these macros are grossly misnamed.
28 */
29
30#define MAKE_MM_SEG(s) ((mm_segment_t) { (s) })
31
32#ifdef CONFIG_MMU
33
34#define KERNEL_DS MAKE_MM_SEG(0xFFFFFFFF)
35#define USER_DS MAKE_MM_SEG(PAGE_OFFSET)
36#define get_ds() (KERNEL_DS)
37#define get_fs() (current_thread_info()->addr_limit)
38#define set_fs(x) (current_thread_info()->addr_limit = (x))
39
40#else /* not CONFIG_MMU */
41
42#define KERNEL_DS MAKE_MM_SEG(0xFFFFFFFF)
43#define USER_DS MAKE_MM_SEG(0xFFFFFFFF)
44#define get_ds() (KERNEL_DS)
45
46static inline mm_segment_t get_fs(void)
47{
48 return USER_DS;
49}
50
51static inline void set_fs(mm_segment_t s)
52{
53}
54
55#endif /* not CONFIG_MMU */
56
57#define segment_eq(a,b) ((a).seg == (b).seg)
58
59#define __addr_ok(addr) \
60 ((unsigned long)(addr) < (current_thread_info()->addr_limit.seg))
61
62/*
63 * Test whether a block of memory is a valid user space address.
64 * Returns 0 if the range is valid, nonzero otherwise.
65 *
66 * This is equivalent to the following test:
67 * (u33)addr + (u33)size >= (u33)current->addr_limit.seg
68 *
69 * This needs 33-bit arithmetic. We have a carry...
70 */
71#define __range_ok(addr,size) ({ \
72 unsigned long flag, roksum; \
73 __chk_user_ptr(addr); \
74 asm ( \
75 " cmpu %1, %1 ; clear cbit\n" \
76 " addx %1, %3 ; set cbit if overflow\n" \
77 " subx %0, %0\n" \
78 " cmpu %4, %1\n" \
79 " subx %0, %5\n" \
80 : "=&r" (flag), "=r" (roksum) \
81 : "1" (addr), "r" ((int)(size)), \
82 "r" (current_thread_info()->addr_limit.seg), "r" (0) \
83 : "cbit" ); \
84 flag; })
85
86/**
87 * access_ok: - Checks if a user space pointer is valid
88 * @type: Type of access: %VERIFY_READ or %VERIFY_WRITE. Note that
89 * %VERIFY_WRITE is a superset of %VERIFY_READ - if it is safe
90 * to write to a block, it is always safe to read from it.
91 * @addr: User space pointer to start of block to check
92 * @size: Size of block to check
93 *
94 * Context: User context only. This function may sleep.
95 *
96 * Checks if a pointer to a block of memory in user space is valid.
97 *
98 * Returns true (nonzero) if the memory block may be valid, false (zero)
99 * if it is definitely invalid.
100 *
101 * Note that, depending on architecture, this function probably just
102 * checks that the pointer is in the user space range - after calling
103 * this function, memory access functions may still return -EFAULT.
104 */
105#ifdef CONFIG_MMU
106#define access_ok(type,addr,size) (likely(__range_ok(addr,size) == 0))
107#else
108static inline int access_ok(int type, const void *addr, unsigned long size)
109{
110 unsigned long val = (unsigned long)addr;
111
112 return ((val >= memory_start) && ((val + size) < memory_end));
113}
114#endif /* CONFIG_MMU */
115
116/*
117 * The exception table consists of pairs of addresses: the first is the
118 * address of an instruction that is allowed to fault, and the second is
119 * the address at which the program should continue. No registers are
120 * modified, so it is entirely up to the continuation code to figure out
121 * what to do.
122 *
123 * All the routines below use bits of fixup code that are out of line
124 * with the main instruction path. This means when everything is well,
125 * we don't even have to jump over them. Further, they do not intrude
126 * on our cache or tlb entries.
127 */
128
129struct exception_table_entry
130{
131 unsigned long insn, fixup;
132};
133
134extern int fixup_exception(struct pt_regs *regs);
135
136/*
137 * These are the main single-value transfer routines. They automatically
138 * use the right size if we just have the right pointer type.
139 *
140 * This gets kind of ugly. We want to return _two_ values in "get_user()"
141 * and yet we don't want to do any pointers, because that is too much
142 * of a performance impact. Thus we have a few rather ugly macros here,
143 * and hide all the uglyness from the user.
144 *
145 * The "__xxx" versions of the user access functions are versions that
146 * do not verify the address space, that must have been done previously
147 * with a separate "access_ok()" call (this is used when we do multiple
148 * accesses to the same area of user memory).
149 */
150
151/* Careful: we have to cast the result to the type of the pointer for sign
152 reasons */
153/**
154 * get_user: - Get a simple variable from user space.
155 * @x: Variable to store result.
156 * @ptr: Source address, in user space.
157 *
158 * Context: User context only. This function may sleep.
159 *
160 * This macro copies a single simple variable from user space to kernel
161 * space. It supports simple types like char and int, but not larger
162 * data types like structures or arrays.
163 *
164 * @ptr must have pointer-to-simple-variable type, and the result of
165 * dereferencing @ptr must be assignable to @x without a cast.
166 *
167 * Returns zero on success, or -EFAULT on error.
168 * On error, the variable @x is set to zero.
169 */
170#define get_user(x,ptr) \
171 __get_user_check((x),(ptr),sizeof(*(ptr)))
172
173/**
174 * put_user: - Write a simple value into user space.
175 * @x: Value to copy to user space.
176 * @ptr: Destination address, in user space.
177 *
178 * Context: User context only. This function may sleep.
179 *
180 * This macro copies a single simple value from kernel space to user
181 * space. It supports simple types like char and int, but not larger
182 * data types like structures or arrays.
183 *
184 * @ptr must have pointer-to-simple-variable type, and @x must be assignable
185 * to the result of dereferencing @ptr.
186 *
187 * Returns zero on success, or -EFAULT on error.
188 */
189#define put_user(x,ptr) \
190 __put_user_check((__typeof__(*(ptr)))(x),(ptr),sizeof(*(ptr)))
191
192/**
193 * __get_user: - Get a simple variable from user space, with less checking.
194 * @x: Variable to store result.
195 * @ptr: Source address, in user space.
196 *
197 * Context: User context only. This function may sleep.
198 *
199 * This macro copies a single simple variable from user space to kernel
200 * space. It supports simple types like char and int, but not larger
201 * data types like structures or arrays.
202 *
203 * @ptr must have pointer-to-simple-variable type, and the result of
204 * dereferencing @ptr must be assignable to @x without a cast.
205 *
206 * Caller must check the pointer with access_ok() before calling this
207 * function.
208 *
209 * Returns zero on success, or -EFAULT on error.
210 * On error, the variable @x is set to zero.
211 */
212#define __get_user(x,ptr) \
213 __get_user_nocheck((x),(ptr),sizeof(*(ptr)))
214
215#define __get_user_nocheck(x,ptr,size) \
216({ \
217 long __gu_err = 0; \
218 unsigned long __gu_val; \
219 might_sleep(); \
220 __get_user_size(__gu_val,(ptr),(size),__gu_err); \
221 (x) = (__typeof__(*(ptr)))__gu_val; \
222 __gu_err; \
223})
224
225#define __get_user_check(x,ptr,size) \
226({ \
227 long __gu_err = -EFAULT; \
228 unsigned long __gu_val = 0; \
229 const __typeof__(*(ptr)) __user *__gu_addr = (ptr); \
230 might_sleep(); \
231 if (access_ok(VERIFY_READ,__gu_addr,size)) \
232 __get_user_size(__gu_val,__gu_addr,(size),__gu_err); \
233 (x) = (__typeof__(*(ptr)))__gu_val; \
234 __gu_err; \
235})
236
237extern long __get_user_bad(void);
238
239#define __get_user_size(x,ptr,size,retval) \
240do { \
241 retval = 0; \
242 __chk_user_ptr(ptr); \
243 switch (size) { \
244 case 1: __get_user_asm(x,ptr,retval,"ub"); break; \
245 case 2: __get_user_asm(x,ptr,retval,"uh"); break; \
246 case 4: __get_user_asm(x,ptr,retval,""); break; \
247 default: (x) = __get_user_bad(); \
248 } \
249} while (0)
250
251#define __get_user_asm(x, addr, err, itype) \
252 __asm__ __volatile__( \
253 " .fillinsn\n" \
254 "1: ld"itype" %1,@%2\n" \
255 " .fillinsn\n" \
256 "2:\n" \
257 ".section .fixup,\"ax\"\n" \
258 " .balign 4\n" \
259 "3: ldi %0,%3\n" \
260 " seth r14,#high(2b)\n" \
261 " or3 r14,r14,#low(2b)\n" \
262 " jmp r14\n" \
263 ".previous\n" \
264 ".section __ex_table,\"a\"\n" \
265 " .balign 4\n" \
266 " .long 1b,3b\n" \
267 ".previous" \
268 : "=&r" (err), "=&r" (x) \
269 : "r" (addr), "i" (-EFAULT), "0" (err) \
270 : "r14", "memory")
271
272/**
273 * __put_user: - Write a simple value into user space, with less checking.
274 * @x: Value to copy to user space.
275 * @ptr: Destination address, in user space.
276 *
277 * Context: User context only. This function may sleep.
278 *
279 * This macro copies a single simple value from kernel space to user
280 * space. It supports simple types like char and int, but not larger
281 * data types like structures or arrays.
282 *
283 * @ptr must have pointer-to-simple-variable type, and @x must be assignable
284 * to the result of dereferencing @ptr.
285 *
286 * Caller must check the pointer with access_ok() before calling this
287 * function.
288 *
289 * Returns zero on success, or -EFAULT on error.
290 */
291#define __put_user(x,ptr) \
292 __put_user_nocheck((__typeof__(*(ptr)))(x),(ptr),sizeof(*(ptr)))
293
294
295#define __put_user_nocheck(x,ptr,size) \
296({ \
297 long __pu_err; \
298 might_sleep(); \
299 __put_user_size((x),(ptr),(size),__pu_err); \
300 __pu_err; \
301})
302
303
304#define __put_user_check(x,ptr,size) \
305({ \
306 long __pu_err = -EFAULT; \
307 __typeof__(*(ptr)) __user *__pu_addr = (ptr); \
308 might_sleep(); \
309 if (access_ok(VERIFY_WRITE,__pu_addr,size)) \
310 __put_user_size((x),__pu_addr,(size),__pu_err); \
311 __pu_err; \
312})
313
314#if defined(__LITTLE_ENDIAN__)
315#define __put_user_u64(x, addr, err) \
316 __asm__ __volatile__( \
317 " .fillinsn\n" \
318 "1: st %L1,@%2\n" \
319 " .fillinsn\n" \
320 "2: st %H1,@(4,%2)\n" \
321 " .fillinsn\n" \
322 "3:\n" \
323 ".section .fixup,\"ax\"\n" \
324 " .balign 4\n" \
325 "4: ldi %0,%3\n" \
326 " seth r14,#high(3b)\n" \
327 " or3 r14,r14,#low(3b)\n" \
328 " jmp r14\n" \
329 ".previous\n" \
330 ".section __ex_table,\"a\"\n" \
331 " .balign 4\n" \
332 " .long 1b,4b\n" \
333 " .long 2b,4b\n" \
334 ".previous" \
335 : "=&r" (err) \
336 : "r" (x), "r" (addr), "i" (-EFAULT), "0" (err) \
337 : "r14", "memory")
338
339#elif defined(__BIG_ENDIAN__)
340#define __put_user_u64(x, addr, err) \
341 __asm__ __volatile__( \
342 " .fillinsn\n" \
343 "1: st %H1,@%2\n" \
344 " .fillinsn\n" \
345 "2: st %L1,@(4,%2)\n" \
346 " .fillinsn\n" \
347 "3:\n" \
348 ".section .fixup,\"ax\"\n" \
349 " .balign 4\n" \
350 "4: ldi %0,%3\n" \
351 " seth r14,#high(3b)\n" \
352 " or3 r14,r14,#low(3b)\n" \
353 " jmp r14\n" \
354 ".previous\n" \
355 ".section __ex_table,\"a\"\n" \
356 " .balign 4\n" \
357 " .long 1b,4b\n" \
358 " .long 2b,4b\n" \
359 ".previous" \
360 : "=&r" (err) \
361 : "r" (x), "r" (addr), "i" (-EFAULT), "0" (err) \
362 : "r14", "memory")
363#else
364#error no endian defined
365#endif
366
367extern void __put_user_bad(void);
368
369#define __put_user_size(x,ptr,size,retval) \
370do { \
371 retval = 0; \
372 __chk_user_ptr(ptr); \
373 switch (size) { \
374 case 1: __put_user_asm(x,ptr,retval,"b"); break; \
375 case 2: __put_user_asm(x,ptr,retval,"h"); break; \
376 case 4: __put_user_asm(x,ptr,retval,""); break; \
377 case 8: __put_user_u64((__typeof__(*ptr))(x),ptr,retval); break;\
378 default: __put_user_bad(); \
379 } \
380} while (0)
381
382struct __large_struct { unsigned long buf[100]; };
383#define __m(x) (*(struct __large_struct *)(x))
384
385/*
386 * Tell gcc we read from memory instead of writing: this is because
387 * we do not write to any memory gcc knows about, so there are no
388 * aliasing issues.
389 */
390#define __put_user_asm(x, addr, err, itype) \
391 __asm__ __volatile__( \
392 " .fillinsn\n" \
393 "1: st"itype" %1,@%2\n" \
394 " .fillinsn\n" \
395 "2:\n" \
396 ".section .fixup,\"ax\"\n" \
397 " .balign 4\n" \
398 "3: ldi %0,%3\n" \
399 " seth r14,#high(2b)\n" \
400 " or3 r14,r14,#low(2b)\n" \
401 " jmp r14\n" \
402 ".previous\n" \
403 ".section __ex_table,\"a\"\n" \
404 " .balign 4\n" \
405 " .long 1b,3b\n" \
406 ".previous" \
407 : "=&r" (err) \
408 : "r" (x), "r" (addr), "i" (-EFAULT), "0" (err) \
409 : "r14", "memory")
410
411/*
412 * Here we special-case 1, 2 and 4-byte copy_*_user invocations. On a fault
413 * we return the initial request size (1, 2 or 4), as copy_*_user should do.
414 * If a store crosses a page boundary and gets a fault, the m32r will not write
415 * anything, so this is accurate.
416 */
417
418/*
419 * Copy To/From Userspace
420 */
421
422/* Generic arbitrary sized copy. */
423/* Return the number of bytes NOT copied. */
424#define __copy_user(to,from,size) \
425do { \
426 unsigned long __dst, __src, __c; \
427 __asm__ __volatile__ ( \
428 " mv r14, %0\n" \
429 " or r14, %1\n" \
430 " beq %0, %1, 9f\n" \
431 " beqz %2, 9f\n" \
432 " and3 r14, r14, #3\n" \
433 " bnez r14, 2f\n" \
434 " and3 %2, %2, #3\n" \
435 " beqz %3, 2f\n" \
436 " addi %0, #-4 ; word_copy \n" \
437 " .fillinsn\n" \
438 "0: ld r14, @%1+\n" \
439 " addi %3, #-1\n" \
440 " .fillinsn\n" \
441 "1: st r14, @+%0\n" \
442 " bnez %3, 0b\n" \
443 " beqz %2, 9f\n" \
444 " addi %0, #4\n" \
445 " .fillinsn\n" \
446 "2: ldb r14, @%1 ; byte_copy \n" \
447 " .fillinsn\n" \
448 "3: stb r14, @%0\n" \
449 " addi %1, #1\n" \
450 " addi %2, #-1\n" \
451 " addi %0, #1\n" \
452 " bnez %2, 2b\n" \
453 " .fillinsn\n" \
454 "9:\n" \
455 ".section .fixup,\"ax\"\n" \
456 " .balign 4\n" \
457 "5: addi %3, #1\n" \
458 " addi %1, #-4\n" \
459 " .fillinsn\n" \
460 "6: slli %3, #2\n" \
461 " add %2, %3\n" \
462 " addi %0, #4\n" \
463 " .fillinsn\n" \
464 "7: seth r14, #high(9b)\n" \
465 " or3 r14, r14, #low(9b)\n" \
466 " jmp r14\n" \
467 ".previous\n" \
468 ".section __ex_table,\"a\"\n" \
469 " .balign 4\n" \
470 " .long 0b,6b\n" \
471 " .long 1b,5b\n" \
472 " .long 2b,9b\n" \
473 " .long 3b,9b\n" \
474 ".previous\n" \
475 : "=&r" (__dst), "=&r" (__src), "=&r" (size), \
476 "=&r" (__c) \
477 : "0" (to), "1" (from), "2" (size), "3" (size / 4) \
478 : "r14", "memory"); \
479} while (0)
480
481#define __copy_user_zeroing(to,from,size) \
482do { \
483 unsigned long __dst, __src, __c; \
484 __asm__ __volatile__ ( \
485 " mv r14, %0\n" \
486 " or r14, %1\n" \
487 " beq %0, %1, 9f\n" \
488 " beqz %2, 9f\n" \
489 " and3 r14, r14, #3\n" \
490 " bnez r14, 2f\n" \
491 " and3 %2, %2, #3\n" \
492 " beqz %3, 2f\n" \
493 " addi %0, #-4 ; word_copy \n" \
494 " .fillinsn\n" \
495 "0: ld r14, @%1+\n" \
496 " addi %3, #-1\n" \
497 " .fillinsn\n" \
498 "1: st r14, @+%0\n" \
499 " bnez %3, 0b\n" \
500 " beqz %2, 9f\n" \
501 " addi %0, #4\n" \
502 " .fillinsn\n" \
503 "2: ldb r14, @%1 ; byte_copy \n" \
504 " .fillinsn\n" \
505 "3: stb r14, @%0\n" \
506 " addi %1, #1\n" \
507 " addi %2, #-1\n" \
508 " addi %0, #1\n" \
509 " bnez %2, 2b\n" \
510 " .fillinsn\n" \
511 "9:\n" \
512 ".section .fixup,\"ax\"\n" \
513 " .balign 4\n" \
514 "5: addi %3, #1\n" \
515 " addi %1, #-4\n" \
516 " .fillinsn\n" \
517 "6: slli %3, #2\n" \
518 " add %2, %3\n" \
519 " addi %0, #4\n" \
520 " .fillinsn\n" \
521 "7: ldi r14, #0 ; store zero \n" \
522 " .fillinsn\n" \
523 "8: addi %2, #-1\n" \
524 " stb r14, @%0 ; ACE? \n" \
525 " addi %0, #1\n" \
526 " bnez %2, 8b\n" \
527 " seth r14, #high(9b)\n" \
528 " or3 r14, r14, #low(9b)\n" \
529 " jmp r14\n" \
530 ".previous\n" \
531 ".section __ex_table,\"a\"\n" \
532 " .balign 4\n" \
533 " .long 0b,6b\n" \
534 " .long 1b,5b\n" \
535 " .long 2b,7b\n" \
536 " .long 3b,7b\n" \
537 ".previous\n" \
538 : "=&r" (__dst), "=&r" (__src), "=&r" (size), \
539 "=&r" (__c) \
540 : "0" (to), "1" (from), "2" (size), "3" (size / 4) \
541 : "r14", "memory"); \
542} while (0)
543
544
545/* We let the __ versions of copy_from/to_user inline, because they're often
546 * used in fast paths and have only a small space overhead.
547 */
548static inline unsigned long __generic_copy_from_user_nocheck(void *to,
549 const void __user *from, unsigned long n)
550{
551 __copy_user_zeroing(to,from,n);
552 return n;
553}
554
555static inline unsigned long __generic_copy_to_user_nocheck(void __user *to,
556 const void *from, unsigned long n)
557{
558 __copy_user(to,from,n);
559 return n;
560}
561
562unsigned long __generic_copy_to_user(void __user *, const void *, unsigned long);
563unsigned long __generic_copy_from_user(void *, const void __user *, unsigned long);
564
565/**
566 * __copy_to_user: - Copy a block of data into user space, with less checking.
567 * @to: Destination address, in user space.
568 * @from: Source address, in kernel space.
569 * @n: Number of bytes to copy.
570 *
571 * Context: User context only. This function may sleep.
572 *
573 * Copy data from kernel space to user space. Caller must check
574 * the specified block with access_ok() before calling this function.
575 *
576 * Returns number of bytes that could not be copied.
577 * On success, this will be zero.
578 */
579#define __copy_to_user(to,from,n) \
580 __generic_copy_to_user_nocheck((to),(from),(n))
581
582#define __copy_to_user_inatomic __copy_to_user
583#define __copy_from_user_inatomic __copy_from_user
584
585/**
586 * copy_to_user: - Copy a block of data into user space.
587 * @to: Destination address, in user space.
588 * @from: Source address, in kernel space.
589 * @n: Number of bytes to copy.
590 *
591 * Context: User context only. This function may sleep.
592 *
593 * Copy data from kernel space to user space.
594 *
595 * Returns number of bytes that could not be copied.
596 * On success, this will be zero.
597 */
598#define copy_to_user(to,from,n) \
599({ \
600 might_sleep(); \
601 __generic_copy_to_user((to),(from),(n)); \
602})
603
604/**
605 * __copy_from_user: - Copy a block of data from user space, with less checking. * @to: Destination address, in kernel space.
606 * @from: Source address, in user space.
607 * @n: Number of bytes to copy.
608 *
609 * Context: User context only. This function may sleep.
610 *
611 * Copy data from user space to kernel space. Caller must check
612 * the specified block with access_ok() before calling this function.
613 *
614 * Returns number of bytes that could not be copied.
615 * On success, this will be zero.
616 *
617 * If some data could not be copied, this function will pad the copied
618 * data to the requested size using zero bytes.
619 */
620#define __copy_from_user(to,from,n) \
621 __generic_copy_from_user_nocheck((to),(from),(n))
622
623/**
624 * copy_from_user: - Copy a block of data from user space.
625 * @to: Destination address, in kernel space.
626 * @from: Source address, in user space.
627 * @n: Number of bytes to copy.
628 *
629 * Context: User context only. This function may sleep.
630 *
631 * Copy data from user space to kernel space.
632 *
633 * Returns number of bytes that could not be copied.
634 * On success, this will be zero.
635 *
636 * If some data could not be copied, this function will pad the copied
637 * data to the requested size using zero bytes.
638 */
639#define copy_from_user(to,from,n) \
640({ \
641 might_sleep(); \
642 __generic_copy_from_user((to),(from),(n)); \
643})
644
645long __must_check strncpy_from_user(char *dst, const char __user *src,
646 long count);
647long __must_check __strncpy_from_user(char *dst,
648 const char __user *src, long count);
649
650/**
651 * __clear_user: - Zero a block of memory in user space, with less checking.
652 * @to: Destination address, in user space.
653 * @n: Number of bytes to zero.
654 *
655 * Zero a block of memory in user space. Caller must check
656 * the specified block with access_ok() before calling this function.
657 *
658 * Returns number of bytes that could not be cleared.
659 * On success, this will be zero.
660 */
661unsigned long __clear_user(void __user *mem, unsigned long len);
662
663/**
664 * clear_user: - Zero a block of memory in user space.
665 * @to: Destination address, in user space.
666 * @n: Number of bytes to zero.
667 *
668 * Zero a block of memory in user space. Caller must check
669 * the specified block with access_ok() before calling this function.
670 *
671 * Returns number of bytes that could not be cleared.
672 * On success, this will be zero.
673 */
674unsigned long clear_user(void __user *mem, unsigned long len);
675
676/**
677 * strlen_user: - Get the size of a string in user space.
678 * @str: The string to measure.
679 *
680 * Context: User context only. This function may sleep.
681 *
682 * Get the size of a NUL-terminated string in user space.
683 *
684 * Returns the size of the string INCLUDING the terminating NUL.
685 * On exception, returns 0.
686 *
687 * If there is a limit on the length of a valid string, you may wish to
688 * consider using strnlen_user() instead.
689 */
690#define strlen_user(str) strnlen_user(str, ~0UL >> 1)
691long strnlen_user(const char __user *str, long n);
692
693#endif /* _ASM_M32R_UACCESS_H */
diff --git a/include/asm-m32r/ucontext.h b/include/asm-m32r/ucontext.h
deleted file mode 100644
index 09324741eec3..000000000000
--- a/include/asm-m32r/ucontext.h
+++ /dev/null
@@ -1,12 +0,0 @@
1#ifndef _ASM_M32R_UCONTEXT_H
2#define _ASM_M32R_UCONTEXT_H
3
4struct ucontext {
5 unsigned long uc_flags;
6 struct ucontext *uc_link;
7 stack_t uc_stack;
8 struct sigcontext uc_mcontext;
9 sigset_t uc_sigmask; /* mask last for extensibility */
10};
11
12#endif /* _ASM_M32R_UCONTEXT_H */
diff --git a/include/asm-m32r/unaligned.h b/include/asm-m32r/unaligned.h
deleted file mode 100644
index 377eb20d1ec6..000000000000
--- a/include/asm-m32r/unaligned.h
+++ /dev/null
@@ -1,18 +0,0 @@
1#ifndef _ASM_M32R_UNALIGNED_H
2#define _ASM_M32R_UNALIGNED_H
3
4#if defined(__LITTLE_ENDIAN__)
5# include <linux/unaligned/le_memmove.h>
6# include <linux/unaligned/be_byteshift.h>
7# include <linux/unaligned/generic.h>
8# define get_unaligned __get_unaligned_le
9# define put_unaligned __put_unaligned_le
10#else
11# include <linux/unaligned/be_memmove.h>
12# include <linux/unaligned/le_byteshift.h>
13# include <linux/unaligned/generic.h>
14# define get_unaligned __get_unaligned_be
15# define put_unaligned __put_unaligned_be
16#endif
17
18#endif /* _ASM_M32R_UNALIGNED_H */
diff --git a/include/asm-m32r/unistd.h b/include/asm-m32r/unistd.h
deleted file mode 100644
index cf701c933249..000000000000
--- a/include/asm-m32r/unistd.h
+++ /dev/null
@@ -1,389 +0,0 @@
1#ifndef _ASM_M32R_UNISTD_H
2#define _ASM_M32R_UNISTD_H
3
4/*
5 * This file contains the system call numbers.
6 */
7
8#define __NR_restart_syscall 0
9#define __NR_exit 1
10#define __NR_fork 2
11#define __NR_read 3
12#define __NR_write 4
13#define __NR_open 5
14#define __NR_close 6
15#define __NR_waitpid 7
16#define __NR_creat 8
17#define __NR_link 9
18#define __NR_unlink 10
19#define __NR_execve 11
20#define __NR_chdir 12
21#define __NR_time 13
22#define __NR_mknod 14
23#define __NR_chmod 15
24/* 16 is unused */
25/* 17 is unused */
26/* 18 is unused */
27#define __NR_lseek 19
28#define __NR_getpid 20
29#define __NR_mount 21
30#define __NR_umount 22
31/* 23 is unused */
32/* 24 is unused */
33#define __NR_stime 25
34#define __NR_ptrace 26
35#define __NR_alarm 27
36/* 28 is unused */
37#define __NR_pause 29
38#define __NR_utime 30
39/* 31 is unused */
40#define __NR_cachectl 32 /* old #define __NR_gtty 32*/
41#define __NR_access 33
42/* 34 is unused */
43/* 35 is unused */
44#define __NR_sync 36
45#define __NR_kill 37
46#define __NR_rename 38
47#define __NR_mkdir 39
48#define __NR_rmdir 40
49#define __NR_dup 41
50#define __NR_pipe 42
51#define __NR_times 43
52/* 44 is unused */
53#define __NR_brk 45
54/* 46 is unused */
55/* 47 is unused (getgid16) */
56/* 48 is unused */
57/* 49 is unused */
58/* 50 is unused */
59#define __NR_acct 51
60#define __NR_umount2 52
61/* 53 is unused */
62#define __NR_ioctl 54
63/* 55 is unused (fcntl) */
64/* 56 is unused */
65#define __NR_setpgid 57
66/* 58 is unused */
67/* 59 is unused */
68#define __NR_umask 60
69#define __NR_chroot 61
70#define __NR_ustat 62
71#define __NR_dup2 63
72#define __NR_getppid 64
73#define __NR_getpgrp 65
74#define __NR_setsid 66
75/* 67 is unused */
76/* 68 is unused*/
77/* 69 is unused*/
78/* 70 is unused */
79/* 71 is unused */
80/* 72 is unused */
81/* 73 is unused */
82#define __NR_sethostname 74
83#define __NR_setrlimit 75
84/* 76 is unused (old getrlimit) */
85#define __NR_getrusage 77
86#define __NR_gettimeofday 78
87#define __NR_settimeofday 79
88/* 80 is unused */
89/* 81 is unused */
90/* 82 is unused */
91#define __NR_symlink 83
92/* 84 is unused */
93#define __NR_readlink 85
94#define __NR_uselib 86
95#define __NR_swapon 87
96#define __NR_reboot 88
97/* 89 is unused */
98/* 90 is unused */
99#define __NR_munmap 91
100#define __NR_truncate 92
101#define __NR_ftruncate 93
102#define __NR_fchmod 94
103/* 95 is unused */
104#define __NR_getpriority 96
105#define __NR_setpriority 97
106/* 98 is unused */
107#define __NR_statfs 99
108#define __NR_fstatfs 100
109/* 101 is unused */
110#define __NR_socketcall 102
111#define __NR_syslog 103
112#define __NR_setitimer 104
113#define __NR_getitimer 105
114#define __NR_stat 106
115#define __NR_lstat 107
116#define __NR_fstat 108
117/* 109 is unused */
118/* 110 is unused */
119#define __NR_vhangup 111
120/* 112 is unused */
121/* 113 is unused */
122#define __NR_wait4 114
123#define __NR_swapoff 115
124#define __NR_sysinfo 116
125#define __NR_ipc 117
126#define __NR_fsync 118
127/* 119 is unused */
128#define __NR_clone 120
129#define __NR_setdomainname 121
130#define __NR_uname 122
131/* 123 is unused */
132#define __NR_adjtimex 124
133#define __NR_mprotect 125
134/* 126 is unused */
135/* 127 is unused */
136#define __NR_init_module 128
137#define __NR_delete_module 129
138/* 130 is unused */
139#define __NR_quotactl 131
140#define __NR_getpgid 132
141#define __NR_fchdir 133
142#define __NR_bdflush 134
143#define __NR_sysfs 135
144#define __NR_personality 136
145/* 137 is unused */
146/* 138 is unused */
147/* 139 is unused */
148#define __NR__llseek 140
149#define __NR_getdents 141
150#define __NR__newselect 142
151#define __NR_flock 143
152#define __NR_msync 144
153#define __NR_readv 145
154#define __NR_writev 146
155#define __NR_getsid 147
156#define __NR_fdatasync 148
157#define __NR__sysctl 149
158#define __NR_mlock 150
159#define __NR_munlock 151
160#define __NR_mlockall 152
161#define __NR_munlockall 153
162#define __NR_sched_setparam 154
163#define __NR_sched_getparam 155
164#define __NR_sched_setscheduler 156
165#define __NR_sched_getscheduler 157
166#define __NR_sched_yield 158
167#define __NR_sched_get_priority_max 159
168#define __NR_sched_get_priority_min 160
169#define __NR_sched_rr_get_interval 161
170#define __NR_nanosleep 162
171#define __NR_mremap 163
172/* 164 is unused */
173/* 165 is unused */
174#define __NR_tas 166
175/* 167 is unused */
176#define __NR_poll 168
177#define __NR_nfsservctl 169
178/* 170 is unused */
179/* 171 is unused */
180#define __NR_prctl 172
181#define __NR_rt_sigreturn 173
182#define __NR_rt_sigaction 174
183#define __NR_rt_sigprocmask 175
184#define __NR_rt_sigpending 176
185#define __NR_rt_sigtimedwait 177
186#define __NR_rt_sigqueueinfo 178
187#define __NR_rt_sigsuspend 179
188#define __NR_pread64 180
189#define __NR_pwrite64 181
190/* 182 is unused */
191#define __NR_getcwd 183
192#define __NR_capget 184
193#define __NR_capset 185
194#define __NR_sigaltstack 186
195#define __NR_sendfile 187
196/* 188 is unused */
197/* 189 is unused */
198#define __NR_vfork 190
199#define __NR_ugetrlimit 191 /* SuS compliant getrlimit */
200#define __NR_mmap2 192
201#define __NR_truncate64 193
202#define __NR_ftruncate64 194
203#define __NR_stat64 195
204#define __NR_lstat64 196
205#define __NR_fstat64 197
206#define __NR_lchown32 198
207#define __NR_getuid32 199
208#define __NR_getgid32 200
209#define __NR_geteuid32 201
210#define __NR_getegid32 202
211#define __NR_setreuid32 203
212#define __NR_setregid32 204
213#define __NR_getgroups32 205
214#define __NR_setgroups32 206
215#define __NR_fchown32 207
216#define __NR_setresuid32 208
217#define __NR_getresuid32 209
218#define __NR_setresgid32 210
219#define __NR_getresgid32 211
220#define __NR_chown32 212
221#define __NR_setuid32 213
222#define __NR_setgid32 214
223#define __NR_setfsuid32 215
224#define __NR_setfsgid32 216
225#define __NR_pivot_root 217
226#define __NR_mincore 218
227#define __NR_madvise 219
228#define __NR_getdents64 220
229#define __NR_fcntl64 221
230/* 222 is unused */
231/* 223 is unused */
232#define __NR_gettid 224
233#define __NR_readahead 225
234#define __NR_setxattr 226
235#define __NR_lsetxattr 227
236#define __NR_fsetxattr 228
237#define __NR_getxattr 229
238#define __NR_lgetxattr 230
239#define __NR_fgetxattr 231
240#define __NR_listxattr 232
241#define __NR_llistxattr 233
242#define __NR_flistxattr 234
243#define __NR_removexattr 235
244#define __NR_lremovexattr 236
245#define __NR_fremovexattr 237
246#define __NR_tkill 238
247#define __NR_sendfile64 239
248#define __NR_futex 240
249#define __NR_sched_setaffinity 241
250#define __NR_sched_getaffinity 242
251#define __NR_set_thread_area 243
252#define __NR_get_thread_area 244
253#define __NR_io_setup 245
254#define __NR_io_destroy 246
255#define __NR_io_getevents 247
256#define __NR_io_submit 248
257#define __NR_io_cancel 249
258#define __NR_fadvise64 250
259/* 251 is unused */
260#define __NR_exit_group 252
261#define __NR_lookup_dcookie 253
262#define __NR_epoll_create 254
263#define __NR_epoll_ctl 255
264#define __NR_epoll_wait 256
265#define __NR_remap_file_pages 257
266#define __NR_set_tid_address 258
267#define __NR_timer_create 259
268#define __NR_timer_settime (__NR_timer_create+1)
269#define __NR_timer_gettime (__NR_timer_create+2)
270#define __NR_timer_getoverrun (__NR_timer_create+3)
271#define __NR_timer_delete (__NR_timer_create+4)
272#define __NR_clock_settime (__NR_timer_create+5)
273#define __NR_clock_gettime (__NR_timer_create+6)
274#define __NR_clock_getres (__NR_timer_create+7)
275#define __NR_clock_nanosleep (__NR_timer_create+8)
276#define __NR_statfs64 268
277#define __NR_fstatfs64 269
278#define __NR_tgkill 270
279#define __NR_utimes 271
280#define __NR_fadvise64_64 272
281#define __NR_vserver 273
282#define __NR_mbind 274
283#define __NR_get_mempolicy 275
284#define __NR_set_mempolicy 276
285#define __NR_mq_open 277
286#define __NR_mq_unlink (__NR_mq_open+1)
287#define __NR_mq_timedsend (__NR_mq_open+2)
288#define __NR_mq_timedreceive (__NR_mq_open+3)
289#define __NR_mq_notify (__NR_mq_open+4)
290#define __NR_mq_getsetattr (__NR_mq_open+5)
291#define __NR_kexec_load 283
292#define __NR_waitid 284
293/* 285 is unused */
294#define __NR_add_key 286
295#define __NR_request_key 287
296#define __NR_keyctl 288
297#define __NR_ioprio_set 289
298#define __NR_ioprio_get 290
299#define __NR_inotify_init 291
300#define __NR_inotify_add_watch 292
301#define __NR_inotify_rm_watch 293
302#define __NR_migrate_pages 294
303#define __NR_openat 295
304#define __NR_mkdirat 296
305#define __NR_mknodat 297
306#define __NR_fchownat 298
307#define __NR_futimesat 299
308#define __NR_fstatat64 300
309#define __NR_unlinkat 301
310#define __NR_renameat 302
311#define __NR_linkat 303
312#define __NR_symlinkat 304
313#define __NR_readlinkat 305
314#define __NR_fchmodat 306
315#define __NR_faccessat 307
316#define __NR_pselect6 308
317#define __NR_ppoll 309
318#define __NR_unshare 310
319#define __NR_set_robust_list 311
320#define __NR_get_robust_list 312
321#define __NR_splice 313
322#define __NR_sync_file_range 314
323#define __NR_tee 315
324#define __NR_vmsplice 316
325#define __NR_move_pages 317
326#define __NR_getcpu 318
327#define __NR_epoll_pwait 319
328#define __NR_utimensat 320
329#define __NR_signalfd 321
330/* #define __NR_timerfd 322 removed */
331#define __NR_eventfd 323
332#define __NR_fallocate 324
333
334#ifdef __KERNEL__
335
336#define NR_syscalls 325
337
338#define __ARCH_WANT_IPC_PARSE_VERSION
339#define __ARCH_WANT_STAT64
340#define __ARCH_WANT_SYS_ALARM
341#define __ARCH_WANT_SYS_GETHOSTNAME
342#define __ARCH_WANT_SYS_PAUSE
343#define __ARCH_WANT_SYS_TIME
344#define __ARCH_WANT_SYS_UTIME
345#define __ARCH_WANT_SYS_WAITPID
346#define __ARCH_WANT_SYS_SOCKETCALL
347#define __ARCH_WANT_SYS_FADVISE64
348#define __ARCH_WANT_SYS_GETPGRP
349#define __ARCH_WANT_SYS_LLSEEK
350#define __ARCH_WANT_SYS_OLD_GETRLIMIT /*will be unused*/
351#define __ARCH_WANT_SYS_OLDUMOUNT
352#define __ARCH_WANT_SYS_RT_SIGACTION
353
354#define __IGNORE_lchown
355#define __IGNORE_setuid
356#define __IGNORE_getuid
357#define __IGNORE_setgid
358#define __IGNORE_getgid
359#define __IGNORE_geteuid
360#define __IGNORE_getegid
361#define __IGNORE_fcntl
362#define __IGNORE_setreuid
363#define __IGNORE_setregid
364#define __IGNORE_getrlimit
365#define __IGNORE_getgroups
366#define __IGNORE_setgroups
367#define __IGNORE_select
368#define __IGNORE_mmap
369#define __IGNORE_fchown
370#define __IGNORE_setfsuid
371#define __IGNORE_setfsgid
372#define __IGNORE_setresuid
373#define __IGNORE_getresuid
374#define __IGNORE_setresgid
375#define __IGNORE_getresgid
376#define __IGNORE_chown
377
378/*
379 * "Conditional" syscalls
380 *
381 * What we want is __attribute__((weak,alias("sys_ni_syscall"))),
382 * but it doesn't work on all toolchains, so we just do it by hand
383 */
384#ifndef cond_syscall
385#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall")
386#endif
387
388#endif /* __KERNEL__ */
389#endif /* _ASM_M32R_UNISTD_H */
diff --git a/include/asm-m32r/user.h b/include/asm-m32r/user.h
deleted file mode 100644
index 03b3c11c2aff..000000000000
--- a/include/asm-m32r/user.h
+++ /dev/null
@@ -1,52 +0,0 @@
1#ifndef _ASM_M32R_USER_H
2#define _ASM_M32R_USER_H
3
4#include <linux/types.h>
5#include <asm/ptrace.h>
6#include <asm/page.h>
7
8/*
9 * Core file format: The core file is written in such a way that gdb
10 * can understand it and provide useful information to the user (under
11 * linux we use the `trad-core' bfd).
12 *
13 * The actual file contents are as follows:
14 * UPAGE: 1 page consisting of a user struct that tells gdb
15 * what is present in the file. Directly after this is a
16 * copy of the task_struct, which is currently not used by gdb,
17 * but it may come in handy at some point. All of the registers
18 * are stored as part of the upage. The upage should always be
19 * only one page.
20 * DATA: The data area is stored. We use current->end_text to
21 * current->brk to pick up all of the user variables, plus any memory
22 * that may have been sbrk'ed. No attempt is made to determine if a
23 * page is demand-zero or if a page is totally unused, we just cover
24 * the entire range. All of the addresses are rounded in such a way
25 * that an integral number of pages is written.
26 * STACK: We need the stack information in order to get a meaningful
27 * backtrace. We need to write the data from usp to
28 * current->start_stack, so we round each of these off in order to be
29 * able to write an integer number of pages.
30 */
31
32struct user {
33 struct pt_regs regs; /* entire machine state */
34 size_t u_tsize; /* text size (pages) */
35 size_t u_dsize; /* data size (pages) */
36 size_t u_ssize; /* stack size (pages) */
37 unsigned long start_code; /* text starting address */
38 unsigned long start_data; /* data starting address */
39 unsigned long start_stack; /* stack starting address */
40 long int signal; /* signal causing core dump */
41 unsigned long u_ar0; /* help gdb find registers */
42 unsigned long magic; /* identifies a core file */
43 char u_comm[32]; /* user command name */
44};
45
46#define NBPG PAGE_SIZE
47#define UPAGES 1
48#define HOST_TEXT_START_ADDR (u.start_code)
49#define HOST_DATA_START_ADDR (u.start_data)
50#define HOST_STACK_END_ADDR (u.start_stack + u.u_ssize * NBPG)
51
52#endif /* _ASM_M32R_USER_H */
diff --git a/include/asm-m32r/vga.h b/include/asm-m32r/vga.h
deleted file mode 100644
index a1b63061c06f..000000000000
--- a/include/asm-m32r/vga.h
+++ /dev/null
@@ -1,20 +0,0 @@
1#ifndef _ASM_M32R_VGA_H
2#define _ASM_M32R_VGA_H
3
4/*
5 * Access to VGA videoram
6 *
7 * (c) 1998 Martin Mares <mj@ucw.cz>
8 */
9
10/*
11 * On the PC, we can just recalculate addresses and then
12 * access the videoram directly without any black magic.
13 */
14
15#define VGA_MAP_MEM(x,s) (unsigned long)phys_to_virt(x)
16
17#define vga_readb(x) (*(x))
18#define vga_writeb(x,y) (*(y) = (x))
19
20#endif /* _ASM_M32R_VGA_H */
diff --git a/include/asm-m32r/xor.h b/include/asm-m32r/xor.h
deleted file mode 100644
index 6d525259df3e..000000000000
--- a/include/asm-m32r/xor.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef _ASM_M32R_XOR_H
2#define _ASM_M32R_XOR_H
3
4#include <asm-generic/xor.h>
5
6#endif /* _ASM_M32R_XOR_H */
diff --git a/include/asm-mn10300/.gitignore b/include/asm-mn10300/.gitignore
deleted file mode 100644
index 0f87ba790e26..000000000000
--- a/include/asm-mn10300/.gitignore
+++ /dev/null
@@ -1,2 +0,0 @@
1proc
2unit
diff --git a/include/asm-mn10300/Kbuild b/include/asm-mn10300/Kbuild
deleted file mode 100644
index c68e1680da01..000000000000
--- a/include/asm-mn10300/Kbuild
+++ /dev/null
@@ -1 +0,0 @@
1include include/asm-generic/Kbuild.asm
diff --git a/include/asm-mn10300/atomic.h b/include/asm-mn10300/atomic.h
deleted file mode 100644
index bc064825f9b1..000000000000
--- a/include/asm-mn10300/atomic.h
+++ /dev/null
@@ -1,157 +0,0 @@
1/* MN10300 Atomic counter operations
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_ATOMIC_H
12#define _ASM_ATOMIC_H
13
14#ifdef CONFIG_SMP
15#error not SMP safe
16#endif
17
18/*
19 * Atomic operations that C can't guarantee us. Useful for
20 * resource counting etc..
21 */
22
23#define ATOMIC_INIT(i) { (i) }
24
25#ifdef __KERNEL__
26
27/**
28 * atomic_read - read atomic variable
29 * @v: pointer of type atomic_t
30 *
31 * Atomically reads the value of @v. Note that the guaranteed
32 * useful range of an atomic_t is only 24 bits.
33 */
34#define atomic_read(v) ((v)->counter)
35
36/**
37 * atomic_set - set atomic variable
38 * @v: pointer of type atomic_t
39 * @i: required value
40 *
41 * Atomically sets the value of @v to @i. Note that the guaranteed
42 * useful range of an atomic_t is only 24 bits.
43 */
44#define atomic_set(v, i) (((v)->counter) = (i))
45
46#include <asm/system.h>
47
48/**
49 * atomic_add_return - add integer to atomic variable
50 * @i: integer value to add
51 * @v: pointer of type atomic_t
52 *
53 * Atomically adds @i to @v and returns the result
54 * Note that the guaranteed useful range of an atomic_t is only 24 bits.
55 */
56static inline int atomic_add_return(int i, atomic_t *v)
57{
58 unsigned long flags;
59 int temp;
60
61 local_irq_save(flags);
62 temp = v->counter;
63 temp += i;
64 v->counter = temp;
65 local_irq_restore(flags);
66
67 return temp;
68}
69
70/**
71 * atomic_sub_return - subtract integer from atomic variable
72 * @i: integer value to subtract
73 * @v: pointer of type atomic_t
74 *
75 * Atomically subtracts @i from @v and returns the result
76 * Note that the guaranteed useful range of an atomic_t is only 24 bits.
77 */
78static inline int atomic_sub_return(int i, atomic_t *v)
79{
80 unsigned long flags;
81 int temp;
82
83 local_irq_save(flags);
84 temp = v->counter;
85 temp -= i;
86 v->counter = temp;
87 local_irq_restore(flags);
88
89 return temp;
90}
91
92static inline int atomic_add_negative(int i, atomic_t *v)
93{
94 return atomic_add_return(i, v) < 0;
95}
96
97static inline void atomic_add(int i, atomic_t *v)
98{
99 atomic_add_return(i, v);
100}
101
102static inline void atomic_sub(int i, atomic_t *v)
103{
104 atomic_sub_return(i, v);
105}
106
107static inline void atomic_inc(atomic_t *v)
108{
109 atomic_add_return(1, v);
110}
111
112static inline void atomic_dec(atomic_t *v)
113{
114 atomic_sub_return(1, v);
115}
116
117#define atomic_dec_return(v) atomic_sub_return(1, (v))
118#define atomic_inc_return(v) atomic_add_return(1, (v))
119
120#define atomic_sub_and_test(i, v) (atomic_sub_return((i), (v)) == 0)
121#define atomic_dec_and_test(v) (atomic_sub_return(1, (v)) == 0)
122#define atomic_inc_and_test(v) (atomic_add_return(1, (v)) == 0)
123
124#define atomic_add_unless(v, a, u) \
125({ \
126 int c, old; \
127 c = atomic_read(v); \
128 while (c != (u) && (old = atomic_cmpxchg((v), c, c + (a))) != c) \
129 c = old; \
130 c != (u); \
131})
132
133#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
134
135static inline void atomic_clear_mask(unsigned long mask, unsigned long *addr)
136{
137 unsigned long flags;
138
139 mask = ~mask;
140 local_irq_save(flags);
141 *addr &= mask;
142 local_irq_restore(flags);
143}
144
145#define atomic_xchg(ptr, v) (xchg(&(ptr)->counter, (v)))
146#define atomic_cmpxchg(v, old, new) (cmpxchg(&((v)->counter), (old), (new)))
147
148/* Atomic operations are already serializing on MN10300??? */
149#define smp_mb__before_atomic_dec() barrier()
150#define smp_mb__after_atomic_dec() barrier()
151#define smp_mb__before_atomic_inc() barrier()
152#define smp_mb__after_atomic_inc() barrier()
153
154#include <asm-generic/atomic.h>
155
156#endif /* __KERNEL__ */
157#endif /* _ASM_ATOMIC_H */
diff --git a/include/asm-mn10300/auxvec.h b/include/asm-mn10300/auxvec.h
deleted file mode 100644
index 4fdb60b2ae39..000000000000
--- a/include/asm-mn10300/auxvec.h
+++ /dev/null
@@ -1,4 +0,0 @@
1#ifndef _ASM_AUXVEC_H
2#define _ASM_AUXVEC_H
3
4#endif
diff --git a/include/asm-mn10300/bitops.h b/include/asm-mn10300/bitops.h
deleted file mode 100644
index 0b610f482abb..000000000000
--- a/include/asm-mn10300/bitops.h
+++ /dev/null
@@ -1,240 +0,0 @@
1/* MN10300 bit operations
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 *
11 * These have to be done with inline assembly: that way the bit-setting
12 * is guaranteed to be atomic. All bit operations return 0 if the bit
13 * was cleared before the operation and != 0 if it was not.
14 *
15 * bit 0 is the LSB of addr; bit 32 is the LSB of (addr+1).
16 */
17#ifndef __ASM_BITOPS_H
18#define __ASM_BITOPS_H
19
20#include <asm/cpu-regs.h>
21
22#define smp_mb__before_clear_bit() barrier()
23#define smp_mb__after_clear_bit() barrier()
24
25/*
26 * set bit
27 */
28#define __set_bit(nr, addr) \
29({ \
30 volatile unsigned char *_a = (unsigned char *)(addr); \
31 const unsigned shift = (nr) & 7; \
32 _a += (nr) >> 3; \
33 \
34 asm volatile("bset %2,(%1) # set_bit reg" \
35 : "=m"(*_a) \
36 : "a"(_a), "d"(1 << shift), "m"(*_a) \
37 : "memory", "cc"); \
38})
39
40#define set_bit(nr, addr) __set_bit((nr), (addr))
41
42/*
43 * clear bit
44 */
45#define ___clear_bit(nr, addr) \
46({ \
47 volatile unsigned char *_a = (unsigned char *)(addr); \
48 const unsigned shift = (nr) & 7; \
49 _a += (nr) >> 3; \
50 \
51 asm volatile("bclr %2,(%1) # clear_bit reg" \
52 : "=m"(*_a) \
53 : "a"(_a), "d"(1 << shift), "m"(*_a) \
54 : "memory", "cc"); \
55})
56
57#define clear_bit(nr, addr) ___clear_bit((nr), (addr))
58
59
60static inline void __clear_bit(int nr, volatile void *addr)
61{
62 unsigned int *a = (unsigned int *) addr;
63 int mask;
64
65 a += nr >> 5;
66 mask = 1 << (nr & 0x1f);
67 *a &= ~mask;
68}
69
70/*
71 * test bit
72 */
73static inline int test_bit(int nr, const volatile void *addr)
74{
75 return 1UL & (((const unsigned int *) addr)[nr >> 5] >> (nr & 31));
76}
77
78/*
79 * change bit
80 */
81static inline void __change_bit(int nr, volatile void *addr)
82{
83 int mask;
84 unsigned int *a = (unsigned int *) addr;
85
86 a += nr >> 5;
87 mask = 1 << (nr & 0x1f);
88 *a ^= mask;
89}
90
91extern void change_bit(int nr, volatile void *addr);
92
93/*
94 * test and set bit
95 */
96#define __test_and_set_bit(nr,addr) \
97({ \
98 volatile unsigned char *_a = (unsigned char *)(addr); \
99 const unsigned shift = (nr) & 7; \
100 unsigned epsw; \
101 _a += (nr) >> 3; \
102 \
103 asm volatile("bset %3,(%2) # test_set_bit reg\n" \
104 "mov epsw,%1" \
105 : "=m"(*_a), "=d"(epsw) \
106 : "a"(_a), "d"(1 << shift), "m"(*_a) \
107 : "memory", "cc"); \
108 \
109 !(epsw & EPSW_FLAG_Z); \
110})
111
112#define test_and_set_bit(nr, addr) __test_and_set_bit((nr), (addr))
113
114/*
115 * test and clear bit
116 */
117#define __test_and_clear_bit(nr, addr) \
118({ \
119 volatile unsigned char *_a = (unsigned char *)(addr); \
120 const unsigned shift = (nr) & 7; \
121 unsigned epsw; \
122 _a += (nr) >> 3; \
123 \
124 asm volatile("bclr %3,(%2) # test_clear_bit reg\n" \
125 "mov epsw,%1" \
126 : "=m"(*_a), "=d"(epsw) \
127 : "a"(_a), "d"(1 << shift), "m"(*_a) \
128 : "memory", "cc"); \
129 \
130 !(epsw & EPSW_FLAG_Z); \
131})
132
133#define test_and_clear_bit(nr, addr) __test_and_clear_bit((nr), (addr))
134
135/*
136 * test and change bit
137 */
138static inline int __test_and_change_bit(int nr, volatile void *addr)
139{
140 int mask, retval;
141 unsigned int *a = (unsigned int *)addr;
142
143 a += nr >> 5;
144 mask = 1 << (nr & 0x1f);
145 retval = (mask & *a) != 0;
146 *a ^= mask;
147
148 return retval;
149}
150
151extern int test_and_change_bit(int nr, volatile void *addr);
152
153#include <asm-generic/bitops/lock.h>
154
155#ifdef __KERNEL__
156
157/**
158 * __ffs - find first bit set
159 * @x: the word to search
160 *
161 * - return 31..0 to indicate bit 31..0 most least significant bit set
162 * - if no bits are set in x, the result is undefined
163 */
164static inline __attribute__((const))
165unsigned long __ffs(unsigned long x)
166{
167 int bit;
168 asm("bsch %2,%0" : "=r"(bit) : "0"(0), "r"(x & -x));
169 return bit;
170}
171
172/*
173 * special slimline version of fls() for calculating ilog2_u32()
174 * - note: no protection against n == 0
175 */
176static inline __attribute__((const))
177int __ilog2_u32(u32 n)
178{
179 int bit;
180 asm("bsch %2,%0" : "=r"(bit) : "0"(0), "r"(n));
181 return bit;
182}
183
184/**
185 * fls - find last bit set
186 * @x: the word to search
187 *
188 * This is defined the same way as ffs:
189 * - return 32..1 to indicate bit 31..0 most significant bit set
190 * - return 0 to indicate no bits set
191 */
192static inline __attribute__((const))
193int fls(int x)
194{
195 return (x != 0) ? __ilog2_u32(x) + 1 : 0;
196}
197
198/**
199 * __fls - find last (most-significant) set bit in a long word
200 * @word: the word to search
201 *
202 * Undefined if no set bit exists, so code should check against 0 first.
203 */
204static inline unsigned long __fls(unsigned long word)
205{
206 return __ilog2_u32(word);
207}
208
209/**
210 * ffs - find first bit set
211 * @x: the word to search
212 *
213 * - return 32..1 to indicate bit 31..0 most least significant bit set
214 * - return 0 to indicate no bits set
215 */
216static inline __attribute__((const))
217int ffs(int x)
218{
219 /* Note: (x & -x) gives us a mask that is the least significant
220 * (rightmost) 1-bit of the value in x.
221 */
222 return fls(x & -x);
223}
224
225#include <asm-generic/bitops/ffz.h>
226#include <asm-generic/bitops/fls64.h>
227#include <asm-generic/bitops/find.h>
228#include <asm-generic/bitops/sched.h>
229#include <asm-generic/bitops/hweight.h>
230
231#define ext2_set_bit_atomic(lock, nr, addr) \
232 test_and_set_bit((nr) ^ 0x18, (addr))
233#define ext2_clear_bit_atomic(lock, nr, addr) \
234 test_and_clear_bit((nr) ^ 0x18, (addr))
235
236#include <asm-generic/bitops/ext2-non-atomic.h>
237#include <asm-generic/bitops/minix-le.h>
238
239#endif /* __KERNEL__ */
240#endif /* __ASM_BITOPS_H */
diff --git a/include/asm-mn10300/bug.h b/include/asm-mn10300/bug.h
deleted file mode 100644
index 4fcf3384e259..000000000000
--- a/include/asm-mn10300/bug.h
+++ /dev/null
@@ -1,35 +0,0 @@
1/* MN10300 Kernel bug reporting
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_BUG_H
12#define _ASM_BUG_H
13
14/*
15 * Tell the user there is some problem.
16 */
17#define _debug_bug_trap() \
18do { \
19 asm volatile( \
20 " syscall 15 \n" \
21 "0: \n" \
22 " .section __bug_table,\"a\" \n" \
23 " .long 0b,%0,%1 \n" \
24 " .previous \n" \
25 : \
26 : "i"(__FILE__), "i"(__LINE__) \
27 ); \
28} while (0)
29
30#define BUG() _debug_bug_trap()
31
32#define HAVE_ARCH_BUG
33#include <asm-generic/bug.h>
34
35#endif /* _ASM_BUG_H */
diff --git a/include/asm-mn10300/bugs.h b/include/asm-mn10300/bugs.h
deleted file mode 100644
index 31c8bc592b47..000000000000
--- a/include/asm-mn10300/bugs.h
+++ /dev/null
@@ -1,20 +0,0 @@
1/* MN10300 Checks for architecture-dependent bugs
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_BUGS_H
12#define _ASM_BUGS_H
13
14#include <asm/processor.h>
15
16static inline void __init check_bugs(void)
17{
18}
19
20#endif /* _ASM_BUGS_H */
diff --git a/include/asm-mn10300/busctl-regs.h b/include/asm-mn10300/busctl-regs.h
deleted file mode 100644
index 1632aef73401..000000000000
--- a/include/asm-mn10300/busctl-regs.h
+++ /dev/null
@@ -1,151 +0,0 @@
1/* AM33v2 on-board bus controller registers
2 *
3 * Copyright (C) 2002 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_BUSCTL_REGS_H
13#define _ASM_BUSCTL_REGS_H
14
15#include <asm/cpu-regs.h>
16
17#ifdef __KERNEL__
18
19/* bus controller registers */
20#define BCCR __SYSREG(0xc0002000, u32) /* bus controller control reg */
21#define BCCR_B0AD 0x00000003 /* block 0 (80000000-83ffffff) bus allocation */
22#define BCCR_B1AD 0x0000000c /* block 1 (84000000-87ffffff) bus allocation */
23#define BCCR_B2AD 0x00000030 /* block 2 (88000000-8bffffff) bus allocation */
24#define BCCR_B3AD 0x000000c0 /* block 3 (8c000000-8fffffff) bus allocation */
25#define BCCR_B4AD 0x00000300 /* block 4 (90000000-93ffffff) bus allocation */
26#define BCCR_B5AD 0x00000c00 /* block 5 (94000000-97ffffff) bus allocation */
27#define BCCR_B6AD 0x00003000 /* block 6 (98000000-9bffffff) bus allocation */
28#define BCCR_B7AD 0x0000c000 /* block 7 (9c000000-9fffffff) bus allocation */
29#define BCCR_BxAD_EXBUS 0x0 /* - direct to system bus controller */
30#define BCCR_BxAD_OPEXBUS 0x1 /* - direct to memory bus controller */
31#define BCCR_BxAD_OCMBUS 0x2 /* - direct to on chip memory */
32#define BCCR_API 0x00070000 /* bus arbitration priority */
33#define BCCR_API_DMACICD 0x00000000 /* - DMA > CI > CD */
34#define BCCR_API_DMACDCI 0x00010000 /* - DMA > CD > CI */
35#define BCCR_API_CICDDMA 0x00020000 /* - CI > CD > DMA */
36#define BCCR_API_CDCIDMA 0x00030000 /* - CD > CI > DMA */
37#define BCCR_API_ROUNDROBIN 0x00040000 /* - round robin */
38#define BCCR_BEPRI_DMACICD 0x00c00000 /* bus error address priority */
39#define BCCR_BEPRI_DMACDCI 0x00000000 /* - DMA > CI > CD */
40#define BCCR_BEPRI_CICDDMA 0x00400000 /* - DMA > CD > CI */
41#define BCCR_BEPRI_CDCIDMA 0x00800000 /* - CI > CD > DMA */
42#define BCCR_BEPRI 0x00c00000 /* - CD > CI > DMA */
43#define BCCR_TMON 0x03000000 /* timeout value settings */
44#define BCCR_TMON_16IOCLK 0x00000000 /* - 16 IOCLK cycles */
45#define BCCR_TMON_256IOCLK 0x01000000 /* - 256 IOCLK cycles */
46#define BCCR_TMON_4096IOCLK 0x02000000 /* - 4096 IOCLK cycles */
47#define BCCR_TMON_65536IOCLK 0x03000000 /* - 65536 IOCLK cycles */
48#define BCCR_TMOE 0x10000000 /* timeout detection enable */
49
50#define BCBERR __SYSREG(0xc0002010, u32) /* bus error source reg */
51#define BCBERR_BESB 0x0000001f /* erroneous access destination space */
52#define BCBERR_BESB_MON 0x00000001 /* - monitor space */
53#define BCBERR_BESB_IO 0x00000002 /* - IO bus */
54#define BCBERR_BESB_EX 0x00000004 /* - EX bus */
55#define BCBERR_BESB_OPEX 0x00000008 /* - OpEX bus */
56#define BCBERR_BESB_OCM 0x00000010 /* - on chip memory */
57#define BCBERR_BERW 0x00000100 /* type of access */
58#define BCBERR_BERW_WRITE 0x00000000 /* - write */
59#define BCBERR_BERW_READ 0x00000100 /* - read */
60#define BCBERR_BESD 0x00000200 /* error detector */
61#define BCBERR_BESD_BCU 0x00000000 /* - BCU detected error */
62#define BCBERR_BESD_SLAVE_BUS 0x00000200 /* - slave bus detected error */
63#define BCBERR_BEBST 0x00000400 /* type of access */
64#define BCBERR_BEBST_SINGLE 0x00000000 /* - single */
65#define BCBERR_BEBST_BURST 0x00000400 /* - burst */
66#define BCBERR_BEME 0x00000800 /* multiple bus error flag */
67#define BCBERR_BEMR 0x00007000 /* master bus that caused the error */
68#define BCBERR_BEMR_NOERROR 0x00000000 /* - no error */
69#define BCBERR_BEMR_CI 0x00001000 /* - CPU instruction fetch bus caused error */
70#define BCBERR_BEMR_CD 0x00002000 /* - CPU data bus caused error */
71#define BCBERR_BEMR_DMA 0x00004000 /* - DMA bus caused error */
72
73#define BCBEAR __SYSREGC(0xc0002020, u32) /* bus error address reg */
74
75/* system bus controller registers */
76#define SBBASE(X) __SYSREG(0xd8c00100 + (X) * 0x10, u32) /* SBC base addr regs */
77#define SBBASE_BE 0x00000001 /* bank enable */
78#define SBBASE_BAM 0x0000fffe /* bank address mask [31:17] */
79#define SBBASE_BBA 0xfffe0000 /* bank base address [31:17] */
80
81#define SBCNTRL0(X) __SYSREG(0xd8c00200 + (X) * 0x10, u32) /* SBC bank ctrl0 regs */
82#define SBCNTRL0_WEH 0x00000f00 /* write enable hold */
83#define SBCNTRL0_REH 0x0000f000 /* read enable hold */
84#define SBCNTRL0_RWH 0x000f0000 /* SRW signal hold */
85#define SBCNTRL0_CSH 0x00f00000 /* chip select hold */
86#define SBCNTRL0_DAH 0x0f000000 /* data hold */
87#define SBCNTRL0_ADH 0xf0000000 /* address hold */
88
89#define SBCNTRL1(X) __SYSREG(0xd8c00204 + (X) * 0x10, u32) /* SBC bank ctrl1 regs */
90#define SBCNTRL1_WED 0x00000f00 /* write enable delay */
91#define SBCNTRL1_RED 0x0000f000 /* read enable delay */
92#define SBCNTRL1_RWD 0x000f0000 /* SRW signal delay */
93#define SBCNTRL1_ASW 0x00f00000 /* address strobe width */
94#define SBCNTRL1_CSD 0x0f000000 /* chip select delay */
95#define SBCNTRL1_ASD 0xf0000000 /* address strobe delay */
96
97#define SBCNTRL2(X) __SYSREG(0xd8c00208 + (X) * 0x10, u32) /* SBC bank ctrl2 regs */
98#define SBCNTRL2_WC 0x000000ff /* wait count */
99#define SBCNTRL2_BWC 0x00000f00 /* burst wait count */
100#define SBCNTRL2_WM 0x01000000 /* wait mode setting */
101#define SBCNTRL2_WM_FIXEDWAIT 0x00000000 /* - fixed wait access */
102#define SBCNTRL2_WM_HANDSHAKE 0x01000000 /* - handshake access */
103#define SBCNTRL2_BM 0x02000000 /* bus synchronisation mode */
104#define SBCNTRL2_BM_SYNC 0x00000000 /* - synchronous mode */
105#define SBCNTRL2_BM_ASYNC 0x02000000 /* - asynchronous mode */
106#define SBCNTRL2_BW 0x04000000 /* bus width */
107#define SBCNTRL2_BW_32 0x00000000 /* - 32 bits */
108#define SBCNTRL2_BW_16 0x04000000 /* - 16 bits */
109#define SBCNTRL2_RWINV 0x08000000 /* R/W signal invert polarity */
110#define SBCNTRL2_RWINV_NORM 0x00000000 /* - normal (read high) */
111#define SBCNTRL2_RWINV_INV 0x08000000 /* - inverted (read low) */
112#define SBCNTRL2_BT 0x70000000 /* bus type setting */
113#define SBCNTRL2_BT_SRAM 0x00000000 /* - SRAM interface */
114#define SBCNTRL2_BT_ADMUX 0x00000000 /* - addr/data multiplexed interface */
115#define SBCNTRL2_BT_BROM 0x00000000 /* - burst ROM interface */
116#define SBCNTRL2_BTSE 0x80000000 /* burst enable */
117
118/* memory bus controller */
119#define SDBASE(X) __SYSREG(0xda000008 + (X) * 0x4, u32) /* MBC base addr regs */
120#define SDBASE_CE 0x00000001 /* chip enable */
121#define SDBASE_CBAM 0x0000fff0 /* chip base address mask [31:20] */
122#define SDBASE_CBAM_SHIFT 16
123#define SDBASE_CBA 0xfff00000 /* chip base address [31:20] */
124
125#define SDRAMBUS __SYSREG(0xda000000, u32) /* bus mode control reg */
126#define SDRAMBUS_REFEN 0x00000004 /* refresh enable */
127#define SDRAMBUS_TRC 0x00000018 /* refresh command delay time */
128#define SDRAMBUS_BSTPT 0x00000020 /* burst stop command enable */
129#define SDRAMBUS_PONSEQ 0x00000040 /* power on sequence */
130#define SDRAMBUS_SELFREQ 0x00000080 /* self-refresh mode request */
131#define SDRAMBUS_SELFON 0x00000100 /* self-refresh mode on */
132#define SDRAMBUS_SIZE 0x00030000 /* SDRAM size */
133#define SDRAMBUS_SIZE_64Mbit 0x00010000 /* 64Mbit SDRAM (x16) */
134#define SDRAMBUS_SIZE_128Mbit 0x00020000 /* 128Mbit SDRAM (x16) */
135#define SDRAMBUS_SIZE_256Mbit 0x00030000 /* 256Mbit SDRAM (x16) */
136#define SDRAMBUS_TRASWAIT 0x000c0000 /* row address precharge command cycle number */
137#define SDRAMBUS_REFNUM 0x00300000 /* refresh command number */
138#define SDRAMBUS_BSTWAIT 0x00c00000 /* burst stop command cycle */
139#define SDRAMBUS_SETWAIT 0x03000000 /* mode register setting command cycle */
140#define SDRAMBUS_PREWAIT 0x0c000000 /* precharge command cycle */
141#define SDRAMBUS_RASLATE 0x30000000 /* RAS latency */
142#define SDRAMBUS_CASLATE 0xc0000000 /* CAS latency */
143
144#define SDREFCNT __SYSREG(0xda000004, u32) /* refresh period reg */
145#define SDREFCNT_PERI 0x00000fff /* refresh period */
146
147#define SDSHDW __SYSREG(0xda000010, u32) /* test reg */
148
149#endif /* __KERNEL__ */
150
151#endif /* _ASM_BUSCTL_REGS_H */
diff --git a/include/asm-mn10300/byteorder.h b/include/asm-mn10300/byteorder.h
deleted file mode 100644
index 5dd0bdd9feee..000000000000
--- a/include/asm-mn10300/byteorder.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef _ASM_BYTEORDER_H
2#define _ASM_BYTEORDER_H
3
4#include <linux/byteorder/little_endian.h>
5
6#endif /* _ASM_BYTEORDER_H */
diff --git a/include/asm-mn10300/cache.h b/include/asm-mn10300/cache.h
deleted file mode 100644
index 9e01122208a9..000000000000
--- a/include/asm-mn10300/cache.h
+++ /dev/null
@@ -1,54 +0,0 @@
1/* MN10300 cache management registers
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_CACHE_H
13#define _ASM_CACHE_H
14
15#include <asm/cpu-regs.h>
16#include <asm/proc/cache.h>
17
18#ifndef __ASSEMBLY__
19#define L1_CACHE_DISPARITY (L1_CACHE_NENTRIES * L1_CACHE_BYTES)
20#else
21#define L1_CACHE_DISPARITY L1_CACHE_NENTRIES * L1_CACHE_BYTES
22#endif
23
24/* data cache purge registers
25 * - read from the register to unconditionally purge that cache line
26 * - write address & 0xffffff00 to conditionally purge that cache line
27 * - clear LSB to request invalidation as well
28 */
29#define DCACHE_PURGE(WAY, ENTRY) \
30 __SYSREG(0xc8400000 + (WAY) * L1_CACHE_WAYDISP + \
31 (ENTRY) * L1_CACHE_BYTES, u32)
32
33#define DCACHE_PURGE_WAY0(ENTRY) \
34 __SYSREG(0xc8400000 + 0 * L1_CACHE_WAYDISP + (ENTRY) * L1_CACHE_BYTES, u32)
35#define DCACHE_PURGE_WAY1(ENTRY) \
36 __SYSREG(0xc8400000 + 1 * L1_CACHE_WAYDISP + (ENTRY) * L1_CACHE_BYTES, u32)
37#define DCACHE_PURGE_WAY2(ENTRY) \
38 __SYSREG(0xc8400000 + 2 * L1_CACHE_WAYDISP + (ENTRY) * L1_CACHE_BYTES, u32)
39#define DCACHE_PURGE_WAY3(ENTRY) \
40 __SYSREG(0xc8400000 + 3 * L1_CACHE_WAYDISP + (ENTRY) * L1_CACHE_BYTES, u32)
41
42/* instruction cache access registers */
43#define ICACHE_DATA(WAY, ENTRY, OFF) \
44 __SYSREG(0xc8000000 + (WAY) * L1_CACHE_WAYDISP + (ENTRY) * 0x10 + (OFF) * 4, u32)
45#define ICACHE_TAG(WAY, ENTRY) \
46 __SYSREG(0xc8100000 + (WAY) * L1_CACHE_WAYDISP + (ENTRY) * 0x10, u32)
47
48/* instruction cache access registers */
49#define DCACHE_DATA(WAY, ENTRY, OFF) \
50 __SYSREG(0xc8200000 + (WAY) * L1_CACHE_WAYDISP + (ENTRY) * 0x10 + (OFF) * 4, u32)
51#define DCACHE_TAG(WAY, ENTRY) \
52 __SYSREG(0xc8300000 + (WAY) * L1_CACHE_WAYDISP + (ENTRY) * 0x10, u32)
53
54#endif /* _ASM_CACHE_H */
diff --git a/include/asm-mn10300/cacheflush.h b/include/asm-mn10300/cacheflush.h
deleted file mode 100644
index 2db746a251f8..000000000000
--- a/include/asm-mn10300/cacheflush.h
+++ /dev/null
@@ -1,116 +0,0 @@
1/* MN10300 Cache flushing
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_CACHEFLUSH_H
12#define _ASM_CACHEFLUSH_H
13
14#ifndef __ASSEMBLY__
15
16/* Keep includes the same across arches. */
17#include <linux/mm.h>
18
19/*
20 * virtually-indexed cache managment (our cache is physically indexed)
21 */
22#define flush_cache_all() do {} while (0)
23#define flush_cache_mm(mm) do {} while (0)
24#define flush_cache_dup_mm(mm) do {} while (0)
25#define flush_cache_range(mm, start, end) do {} while (0)
26#define flush_cache_page(vma, vmaddr, pfn) do {} while (0)
27#define flush_cache_vmap(start, end) do {} while (0)
28#define flush_cache_vunmap(start, end) do {} while (0)
29#define flush_dcache_page(page) do {} while (0)
30#define flush_dcache_mmap_lock(mapping) do {} while (0)
31#define flush_dcache_mmap_unlock(mapping) do {} while (0)
32
33/*
34 * physically-indexed cache managment
35 */
36#ifndef CONFIG_MN10300_CACHE_DISABLED
37
38extern void flush_icache_range(unsigned long start, unsigned long end);
39extern void flush_icache_page(struct vm_area_struct *vma, struct page *pg);
40
41#else
42
43#define flush_icache_range(start, end) do {} while (0)
44#define flush_icache_page(vma, pg) do {} while (0)
45
46#endif
47
48#define flush_icache_user_range(vma, pg, adr, len) \
49 flush_icache_range(adr, adr + len)
50
51#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
52 do { \
53 memcpy(dst, src, len); \
54 flush_icache_page(vma, page); \
55 } while (0)
56
57#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
58 memcpy(dst, src, len)
59
60/*
61 * primitive routines
62 */
63#ifndef CONFIG_MN10300_CACHE_DISABLED
64extern void mn10300_icache_inv(void);
65extern void mn10300_dcache_inv(void);
66extern void mn10300_dcache_inv_page(unsigned start);
67extern void mn10300_dcache_inv_range(unsigned start, unsigned end);
68extern void mn10300_dcache_inv_range2(unsigned start, unsigned size);
69#ifdef CONFIG_MN10300_CACHE_WBACK
70extern void mn10300_dcache_flush(void);
71extern void mn10300_dcache_flush_page(unsigned start);
72extern void mn10300_dcache_flush_range(unsigned start, unsigned end);
73extern void mn10300_dcache_flush_range2(unsigned start, unsigned size);
74extern void mn10300_dcache_flush_inv(void);
75extern void mn10300_dcache_flush_inv_page(unsigned start);
76extern void mn10300_dcache_flush_inv_range(unsigned start, unsigned end);
77extern void mn10300_dcache_flush_inv_range2(unsigned start, unsigned size);
78#else
79#define mn10300_dcache_flush() do {} while (0)
80#define mn10300_dcache_flush_page(start) do {} while (0)
81#define mn10300_dcache_flush_range(start, end) do {} while (0)
82#define mn10300_dcache_flush_range2(start, size) do {} while (0)
83#define mn10300_dcache_flush_inv() mn10300_dcache_inv()
84#define mn10300_dcache_flush_inv_page(start) \
85 mn10300_dcache_inv_page((start))
86#define mn10300_dcache_flush_inv_range(start, end) \
87 mn10300_dcache_inv_range((start), (end))
88#define mn10300_dcache_flush_inv_range2(start, size) \
89 mn10300_dcache_inv_range2((start), (size))
90#endif /* CONFIG_MN10300_CACHE_WBACK */
91#else
92#define mn10300_icache_inv() do {} while (0)
93#define mn10300_dcache_inv() do {} while (0)
94#define mn10300_dcache_inv_page(start) do {} while (0)
95#define mn10300_dcache_inv_range(start, end) do {} while (0)
96#define mn10300_dcache_inv_range2(start, size) do {} while (0)
97#define mn10300_dcache_flush() do {} while (0)
98#define mn10300_dcache_flush_inv_page(start) do {} while (0)
99#define mn10300_dcache_flush_inv() do {} while (0)
100#define mn10300_dcache_flush_inv_range(start, end) do {} while (0)
101#define mn10300_dcache_flush_inv_range2(start, size) do {} while (0)
102#define mn10300_dcache_flush_page(start) do {} while (0)
103#define mn10300_dcache_flush_range(start, end) do {} while (0)
104#define mn10300_dcache_flush_range2(start, size) do {} while (0)
105#endif /* CONFIG_MN10300_CACHE_DISABLED */
106
107/*
108 * internal debugging function
109 */
110#ifdef CONFIG_DEBUG_PAGEALLOC
111extern void kernel_map_pages(struct page *page, int numpages, int enable);
112#endif
113
114#endif /* __ASSEMBLY__ */
115
116#endif /* _ASM_CACHEFLUSH_H */
diff --git a/include/asm-mn10300/checksum.h b/include/asm-mn10300/checksum.h
deleted file mode 100644
index 9fb2a8d8826a..000000000000
--- a/include/asm-mn10300/checksum.h
+++ /dev/null
@@ -1,86 +0,0 @@
1/* MN10300 Optimised checksumming code
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_CHECKSUM_H
12#define _ASM_CHECKSUM_H
13
14extern __wsum csum_partial(const void *buff, int len, __wsum sum);
15extern __wsum csum_partial_copy_nocheck(const void *src, void *dst,
16 int len, __wsum sum);
17extern __wsum csum_partial_copy_from_user(const void *src, void *dst,
18 int len, __wsum sum,
19 int *err_ptr);
20extern __sum16 ip_fast_csum(const void *iph, unsigned int ihl);
21extern __wsum csum_partial(const void *buff, int len, __wsum sum);
22extern __sum16 ip_compute_csum(const void *buff, int len);
23
24#define csum_partial_copy_fromuser csum_partial_copy
25extern __wsum csum_partial_copy(const void *src, void *dst, int len,
26 __wsum sum);
27
28static inline __sum16 csum_fold(__wsum sum)
29{
30 asm(
31 " add %1,%0 \n"
32 " addc 0xffff,%0 \n"
33 : "=r" (sum)
34 : "r" (sum << 16), "0" (sum & 0xffff0000)
35 : "cc"
36 );
37 return (~sum) >> 16;
38}
39
40static inline __wsum csum_tcpudp_nofold(unsigned long saddr,
41 unsigned long daddr,
42 unsigned short len,
43 unsigned short proto,
44 __wsum sum)
45{
46 __wsum tmp;
47
48 tmp = (__wsum) ntohs(len) << 16;
49 tmp += (__wsum) proto << 8;
50
51 asm(
52 " add %1,%0 \n"
53 " addc %2,%0 \n"
54 " addc %3,%0 \n"
55 " addc 0,%0 \n"
56 : "=r" (sum)
57 : "r" (daddr), "r"(saddr), "r"(tmp), "0"(sum)
58 : "cc"
59 );
60 return sum;
61}
62
63/*
64 * computes the checksum of the TCP/UDP pseudo-header
65 * returns a 16-bit checksum, already complemented
66 */
67static inline __sum16 csum_tcpudp_magic(unsigned long saddr,
68 unsigned long daddr,
69 unsigned short len,
70 unsigned short proto,
71 __wsum sum)
72{
73 return csum_fold(csum_tcpudp_nofold(saddr, daddr, len, proto, sum));
74}
75
76#undef _HAVE_ARCH_IPV6_CSUM
77
78/*
79 * Copy and checksum to user
80 */
81#define HAVE_CSUM_COPY_USER
82extern __wsum csum_and_copy_to_user(const void *src, void *dst, int len,
83 __wsum sum, int *err_ptr);
84
85
86#endif /* _ASM_CHECKSUM_H */
diff --git a/include/asm-mn10300/cpu-regs.h b/include/asm-mn10300/cpu-regs.h
deleted file mode 100644
index 757e9b5388ea..000000000000
--- a/include/asm-mn10300/cpu-regs.h
+++ /dev/null
@@ -1,290 +0,0 @@
1/* MN10300 Core system registers
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_CPU_REGS_H
12#define _ASM_CPU_REGS_H
13
14#ifndef __ASSEMBLY__
15#include <linux/types.h>
16#endif
17
18#ifdef CONFIG_MN10300_CPU_AM33V2
19/* we tell the compiler to pretend to be AM33 so that it doesn't try and use
20 * the FP regs, but tell the assembler that we're actually allowed AM33v2
21 * instructions */
22#ifndef __ASSEMBLY__
23asm(" .am33_2\n");
24#else
25.am33_2
26#endif
27#endif
28
29#ifdef __KERNEL__
30
31#ifndef __ASSEMBLY__
32#define __SYSREG(ADDR, TYPE) (*(volatile TYPE *)(ADDR))
33#define __SYSREGC(ADDR, TYPE) (*(const volatile TYPE *)(ADDR))
34#else
35#define __SYSREG(ADDR, TYPE) ADDR
36#define __SYSREGC(ADDR, TYPE) ADDR
37#endif
38
39/* CPU registers */
40#define EPSW_FLAG_Z 0x00000001 /* zero flag */
41#define EPSW_FLAG_N 0x00000002 /* negative flag */
42#define EPSW_FLAG_C 0x00000004 /* carry flag */
43#define EPSW_FLAG_V 0x00000008 /* overflow flag */
44#define EPSW_IM 0x00000700 /* interrupt mode */
45#define EPSW_IM_0 0x00000000 /* interrupt mode 0 */
46#define EPSW_IM_1 0x00000100 /* interrupt mode 1 */
47#define EPSW_IM_2 0x00000200 /* interrupt mode 2 */
48#define EPSW_IM_3 0x00000300 /* interrupt mode 3 */
49#define EPSW_IM_4 0x00000400 /* interrupt mode 4 */
50#define EPSW_IM_5 0x00000500 /* interrupt mode 5 */
51#define EPSW_IM_6 0x00000600 /* interrupt mode 6 */
52#define EPSW_IM_7 0x00000700 /* interrupt mode 7 */
53#define EPSW_IE 0x00000800 /* interrupt enable */
54#define EPSW_S 0x00003000 /* software auxilliary bits */
55#define EPSW_T 0x00008000 /* trace enable */
56#define EPSW_nSL 0x00010000 /* not supervisor level */
57#define EPSW_NMID 0x00020000 /* nonmaskable interrupt disable */
58#define EPSW_nAR 0x00040000 /* register bank control */
59#define EPSW_ML 0x00080000 /* monitor level */
60#define EPSW_FE 0x00100000 /* FPU enable */
61
62/* FPU registers */
63#define FPCR_EF_I 0x00000001 /* inexact result FPU exception flag */
64#define FPCR_EF_U 0x00000002 /* underflow FPU exception flag */
65#define FPCR_EF_O 0x00000004 /* overflow FPU exception flag */
66#define FPCR_EF_Z 0x00000008 /* zero divide FPU exception flag */
67#define FPCR_EF_V 0x00000010 /* invalid operand FPU exception flag */
68#define FPCR_EE_I 0x00000020 /* inexact result FPU exception enable */
69#define FPCR_EE_U 0x00000040 /* underflow FPU exception enable */
70#define FPCR_EE_O 0x00000080 /* overflow FPU exception enable */
71#define FPCR_EE_Z 0x00000100 /* zero divide FPU exception enable */
72#define FPCR_EE_V 0x00000200 /* invalid operand FPU exception enable */
73#define FPCR_EC_I 0x00000400 /* inexact result FPU exception cause */
74#define FPCR_EC_U 0x00000800 /* underflow FPU exception cause */
75#define FPCR_EC_O 0x00001000 /* overflow FPU exception cause */
76#define FPCR_EC_Z 0x00002000 /* zero divide FPU exception cause */
77#define FPCR_EC_V 0x00004000 /* invalid operand FPU exception cause */
78#define FPCR_RM 0x00030000 /* rounding mode */
79#define FPCR_RM_NEAREST 0x00000000 /* - round to nearest value */
80#define FPCR_FCC_U 0x00040000 /* FPU unordered condition code */
81#define FPCR_FCC_E 0x00080000 /* FPU equal condition code */
82#define FPCR_FCC_G 0x00100000 /* FPU greater than condition code */
83#define FPCR_FCC_L 0x00200000 /* FPU less than condition code */
84#define FPCR_INIT 0x00000000 /* no exceptions, rounding to nearest */
85
86/* CPU control registers */
87#define CPUP __SYSREG(0xc0000020, u16) /* CPU pipeline register */
88#define CPUP_DWBD 0x0020 /* write buffer disable flag */
89#define CPUP_IPFD 0x0040 /* instruction prefetch disable flag */
90#define CPUP_EXM 0x0080 /* exception operation mode */
91#define CPUP_EXM_AM33V1 0x0000 /* - AM33 v1 exception mode */
92#define CPUP_EXM_AM33V2 0x0080 /* - AM33 v2 exception mode */
93
94#define CPUM __SYSREG(0xc0000040, u16) /* CPU mode register */
95#define CPUM_SLEEP 0x0004 /* set to enter sleep state */
96#define CPUM_HALT 0x0008 /* set to enter halt state */
97#define CPUM_STOP 0x0010 /* set to enter stop state */
98
99#define CPUREV __SYSREGC(0xc0000050, u32) /* CPU revision register */
100#define CPUREV_TYPE 0x0000000f /* CPU type */
101#define CPUREV_TYPE_S 0
102#define CPUREV_TYPE_AM33V1 0x00000000 /* - AM33 V1 core, AM33/1.00 arch */
103#define CPUREV_TYPE_AM33V2 0x00000001 /* - AM33 V2 core, AM33/2.00 arch */
104#define CPUREV_TYPE_AM34V1 0x00000002 /* - AM34 V1 core, AM33/2.00 arch */
105#define CPUREV_REVISION 0x000000f0 /* CPU revision */
106#define CPUREV_REVISION_S 4
107#define CPUREV_ICWAY 0x00000f00 /* number of instruction cache ways */
108#define CPUREV_ICWAY_S 8
109#define CPUREV_ICSIZE 0x0000f000 /* instruction cache way size */
110#define CPUREV_ICSIZE_S 12
111#define CPUREV_DCWAY 0x000f0000 /* number of data cache ways */
112#define CPUREV_DCWAY_S 16
113#define CPUREV_DCSIZE 0x00f00000 /* data cache way size */
114#define CPUREV_DCSIZE_S 20
115#define CPUREV_FPUTYPE 0x0f000000 /* FPU core type */
116#define CPUREV_FPUTYPE_NONE 0x00000000 /* - no FPU core implemented */
117#define CPUREV_OCDCTG 0xf0000000 /* on-chip debug function category */
118
119#define DCR __SYSREG(0xc0000030, u16) /* Debug control register */
120
121/* interrupt/exception control registers */
122#define IVAR0 __SYSREG(0xc0000000, u16) /* interrupt vector 0 */
123#define IVAR1 __SYSREG(0xc0000004, u16) /* interrupt vector 1 */
124#define IVAR2 __SYSREG(0xc0000008, u16) /* interrupt vector 2 */
125#define IVAR3 __SYSREG(0xc000000c, u16) /* interrupt vector 3 */
126#define IVAR4 __SYSREG(0xc0000010, u16) /* interrupt vector 4 */
127#define IVAR5 __SYSREG(0xc0000014, u16) /* interrupt vector 5 */
128#define IVAR6 __SYSREG(0xc0000018, u16) /* interrupt vector 6 */
129
130#define TBR __SYSREG(0xc0000024, u32) /* Trap table base */
131#define TBR_TB 0xff000000 /* table base address bits 31-24 */
132#define TBR_INT_CODE 0x00ffffff /* interrupt code */
133
134#define DEAR __SYSREG(0xc0000038, u32) /* Data access exception address */
135
136#define sISR __SYSREG(0xc0000044, u32) /* Supervisor interrupt status */
137#define sISR_IRQICE 0x00000001 /* ICE interrupt */
138#define sISR_ISTEP 0x00000002 /* single step interrupt */
139#define sISR_MISSA 0x00000004 /* memory access address misalignment fault */
140#define sISR_UNIMP 0x00000008 /* unimplemented instruction execution fault */
141#define sISR_PIEXE 0x00000010 /* program interrupt */
142#define sISR_MEMERR 0x00000020 /* illegal memory access fault */
143#define sISR_IBREAK 0x00000040 /* instraction break interrupt */
144#define sISR_DBSRL 0x00000080 /* debug serial interrupt */
145#define sISR_PERIDB 0x00000100 /* peripheral debug interrupt */
146#define sISR_EXUNIMP 0x00000200 /* unimplemented ex-instruction execution fault */
147#define sISR_OBREAK 0x00000400 /* operand break interrupt */
148#define sISR_PRIV 0x00000800 /* privileged instruction execution fault */
149#define sISR_BUSERR 0x00001000 /* bus error fault */
150#define sISR_DBLFT 0x00002000 /* double fault */
151#define sISR_DBG 0x00008000 /* debug reserved interrupt */
152#define sISR_ITMISS 0x00010000 /* instruction TLB miss */
153#define sISR_DTMISS 0x00020000 /* data TLB miss */
154#define sISR_ITEX 0x00040000 /* instruction TLB access exception */
155#define sISR_DTEX 0x00080000 /* data TLB access exception */
156#define sISR_ILGIA 0x00100000 /* illegal instruction access exception */
157#define sISR_ILGDA 0x00200000 /* illegal data access exception */
158#define sISR_IOIA 0x00400000 /* internal I/O space instruction access excep */
159#define sISR_PRIVA 0x00800000 /* privileged space instruction access excep */
160#define sISR_PRIDA 0x01000000 /* privileged space data access excep */
161#define sISR_DISA 0x02000000 /* data space instruction access excep */
162#define sISR_SYSC 0x04000000 /* system call instruction excep */
163#define sISR_FPUD 0x08000000 /* FPU disabled excep */
164#define sISR_FPUUI 0x10000000 /* FPU unimplemented instruction excep */
165#define sISR_FPUOP 0x20000000 /* FPU operation excep */
166#define sISR_NE 0x80000000 /* multiple synchronous exceptions excep */
167
168/* cache control registers */
169#define CHCTR __SYSREG(0xc0000070, u16) /* cache control */
170#define CHCTR_ICEN 0x0001 /* instruction cache enable */
171#define CHCTR_DCEN 0x0002 /* data cache enable */
172#define CHCTR_ICBUSY 0x0004 /* instruction cache busy */
173#define CHCTR_DCBUSY 0x0008 /* data cache busy */
174#define CHCTR_ICINV 0x0010 /* instruction cache invalidate */
175#define CHCTR_DCINV 0x0020 /* data cache invalidate */
176#define CHCTR_DCWTMD 0x0040 /* data cache writing mode */
177#define CHCTR_DCWTMD_WRBACK 0x0000 /* - write back mode */
178#define CHCTR_DCWTMD_WRTHROUGH 0x0040 /* - write through mode */
179#define CHCTR_DCALMD 0x0080 /* data cache allocation mode */
180#define CHCTR_ICWMD 0x0f00 /* instruction cache way mode */
181#define CHCTR_DCWMD 0xf000 /* data cache way mode */
182
183/* MMU control registers */
184#define MMUCTR __SYSREG(0xc0000090, u32) /* MMU control register */
185#define MMUCTR_IRP 0x0000003f /* instruction TLB replace pointer */
186#define MMUCTR_ITE 0x00000040 /* instruction TLB enable */
187#define MMUCTR_IIV 0x00000080 /* instruction TLB invalidate */
188#define MMUCTR_ITL 0x00000700 /* instruction TLB lock pointer */
189#define MMUCTR_ITL_NOLOCK 0x00000000 /* - no lock */
190#define MMUCTR_ITL_LOCK0 0x00000100 /* - entry 0 locked */
191#define MMUCTR_ITL_LOCK0_1 0x00000200 /* - entry 0-1 locked */
192#define MMUCTR_ITL_LOCK0_3 0x00000300 /* - entry 0-3 locked */
193#define MMUCTR_ITL_LOCK0_7 0x00000400 /* - entry 0-7 locked */
194#define MMUCTR_ITL_LOCK0_15 0x00000500 /* - entry 0-15 locked */
195#define MMUCTR_CE 0x00008000 /* cacheable bit enable */
196#define MMUCTR_DRP 0x003f0000 /* data TLB replace pointer */
197#define MMUCTR_DTE 0x00400000 /* data TLB enable */
198#define MMUCTR_DIV 0x00800000 /* data TLB invalidate */
199#define MMUCTR_DTL 0x07000000 /* data TLB lock pointer */
200#define MMUCTR_DTL_NOLOCK 0x00000000 /* - no lock */
201#define MMUCTR_DTL_LOCK0 0x01000000 /* - entry 0 locked */
202#define MMUCTR_DTL_LOCK0_1 0x02000000 /* - entry 0-1 locked */
203#define MMUCTR_DTL_LOCK0_3 0x03000000 /* - entry 0-3 locked */
204#define MMUCTR_DTL_LOCK0_7 0x04000000 /* - entry 0-7 locked */
205#define MMUCTR_DTL_LOCK0_15 0x05000000 /* - entry 0-15 locked */
206
207#define PIDR __SYSREG(0xc0000094, u16) /* PID register */
208#define PIDR_PID 0x00ff /* process identifier */
209
210#define PTBR __SYSREG(0xc0000098, unsigned long) /* Page table base register */
211
212#define IPTEL __SYSREG(0xc00000a0, u32) /* instruction TLB entry */
213#define DPTEL __SYSREG(0xc00000b0, u32) /* data TLB entry */
214#define xPTEL_V 0x00000001 /* TLB entry valid */
215#define xPTEL_UNUSED1 0x00000002 /* unused bit */
216#define xPTEL_UNUSED2 0x00000004 /* unused bit */
217#define xPTEL_C 0x00000008 /* cached if set */
218#define xPTEL_PV 0x00000010 /* page valid */
219#define xPTEL_D 0x00000020 /* dirty */
220#define xPTEL_PR 0x000001c0 /* page protection */
221#define xPTEL_PR_ROK 0x00000000 /* - R/O kernel */
222#define xPTEL_PR_RWK 0x00000100 /* - R/W kernel */
223#define xPTEL_PR_ROK_ROU 0x00000080 /* - R/O kernel and R/O user */
224#define xPTEL_PR_RWK_ROU 0x00000180 /* - R/W kernel and R/O user */
225#define xPTEL_PR_RWK_RWU 0x000001c0 /* - R/W kernel and R/W user */
226#define xPTEL_G 0x00000200 /* global (use PID if 0) */
227#define xPTEL_PS 0x00000c00 /* page size */
228#define xPTEL_PS_4Kb 0x00000000 /* - 4Kb page */
229#define xPTEL_PS_128Kb 0x00000400 /* - 128Kb page */
230#define xPTEL_PS_1Kb 0x00000800 /* - 1Kb page */
231#define xPTEL_PS_4Mb 0x00000c00 /* - 4Mb page */
232#define xPTEL_PPN 0xfffff006 /* physical page number */
233
234#define xPTEL_V_BIT 0 /* bit numbers corresponding to above masks */
235#define xPTEL_UNUSED1_BIT 1
236#define xPTEL_UNUSED2_BIT 2
237#define xPTEL_C_BIT 3
238#define xPTEL_PV_BIT 4
239#define xPTEL_D_BIT 5
240#define xPTEL_G_BIT 9
241
242#define IPTEU __SYSREG(0xc00000a4, u32) /* instruction TLB virtual addr */
243#define DPTEU __SYSREG(0xc00000b4, u32) /* data TLB virtual addr */
244#define xPTEU_VPN 0xfffffc00 /* virtual page number */
245#define xPTEU_PID 0x000000ff /* process identifier to which applicable */
246
247#define IPTEL2 __SYSREG(0xc00000a8, u32) /* instruction TLB entry */
248#define DPTEL2 __SYSREG(0xc00000b8, u32) /* data TLB entry */
249#define xPTEL2_V 0x00000001 /* TLB entry valid */
250#define xPTEL2_C 0x00000002 /* cacheable */
251#define xPTEL2_PV 0x00000004 /* page valid */
252#define xPTEL2_D 0x00000008 /* dirty */
253#define xPTEL2_PR 0x00000070 /* page protection */
254#define xPTEL2_PR_ROK 0x00000000 /* - R/O kernel */
255#define xPTEL2_PR_RWK 0x00000040 /* - R/W kernel */
256#define xPTEL2_PR_ROK_ROU 0x00000020 /* - R/O kernel and R/O user */
257#define xPTEL2_PR_RWK_ROU 0x00000060 /* - R/W kernel and R/O user */
258#define xPTEL2_PR_RWK_RWU 0x00000070 /* - R/W kernel and R/W user */
259#define xPTEL2_G 0x00000080 /* global (use PID if 0) */
260#define xPTEL2_PS 0x00000300 /* page size */
261#define xPTEL2_PS_4Kb 0x00000000 /* - 4Kb page */
262#define xPTEL2_PS_128Kb 0x00000100 /* - 128Kb page */
263#define xPTEL2_PS_1Kb 0x00000200 /* - 1Kb page */
264#define xPTEL2_PS_4Mb 0x00000300 /* - 4Mb page */
265#define xPTEL2_PPN 0xfffffc00 /* physical page number */
266
267#define MMUFCR __SYSREGC(0xc000009c, u32) /* MMU exception cause */
268#define MMUFCR_IFC __SYSREGC(0xc000009c, u16) /* MMU instruction excep cause */
269#define MMUFCR_DFC __SYSREGC(0xc000009e, u16) /* MMU data exception cause */
270#define MMUFCR_xFC_TLBMISS 0x0001 /* TLB miss flag */
271#define MMUFCR_xFC_INITWR 0x0002 /* initial write excep flag */
272#define MMUFCR_xFC_PGINVAL 0x0004 /* page invalid excep flag */
273#define MMUFCR_xFC_PROTVIOL 0x0008 /* protection violation excep flag */
274#define MMUFCR_xFC_ACCESS 0x0010 /* access level flag */
275#define MMUFCR_xFC_ACCESS_USR 0x0000 /* - user mode */
276#define MMUFCR_xFC_ACCESS_SR 0x0010 /* - supervisor mode */
277#define MMUFCR_xFC_TYPE 0x0020 /* access type flag */
278#define MMUFCR_xFC_TYPE_READ 0x0000 /* - read */
279#define MMUFCR_xFC_TYPE_WRITE 0x0020 /* - write */
280#define MMUFCR_xFC_PR 0x01c0 /* page protection flag */
281#define MMUFCR_xFC_PR_ROK 0x0000 /* - R/O kernel */
282#define MMUFCR_xFC_PR_RWK 0x0100 /* - R/W kernel */
283#define MMUFCR_xFC_PR_ROK_ROU 0x0080 /* - R/O kernel and R/O user */
284#define MMUFCR_xFC_PR_RWK_ROU 0x0180 /* - R/W kernel and R/O user */
285#define MMUFCR_xFC_PR_RWK_RWU 0x01c0 /* - R/W kernel and R/W user */
286#define MMUFCR_xFC_ILLADDR 0x0200 /* illegal address excep flag */
287
288#endif /* __KERNEL__ */
289
290#endif /* _ASM_CPU_REGS_H */
diff --git a/include/asm-mn10300/cputime.h b/include/asm-mn10300/cputime.h
deleted file mode 100644
index 6d68ad7e0ea3..000000000000
--- a/include/asm-mn10300/cputime.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/cputime.h>
diff --git a/include/asm-mn10300/current.h b/include/asm-mn10300/current.h
deleted file mode 100644
index ca6027d83743..000000000000
--- a/include/asm-mn10300/current.h
+++ /dev/null
@@ -1,37 +0,0 @@
1/* MN10300 Current task structure accessor
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_CURRENT_H
12#define _ASM_CURRENT_H
13
14#include <linux/thread_info.h>
15
16/*
17 * dedicate E2 to keeping the current task pointer
18 */
19#ifdef CONFIG_MN10300_CURRENT_IN_E2
20
21register struct task_struct *const current asm("e2") __attribute__((used));
22
23#define get_current() current
24
25extern struct task_struct *__current;
26
27#else
28static inline __attribute__((const))
29struct task_struct *get_current(void)
30{
31 return current_thread_info()->task;
32}
33
34#define current get_current()
35#endif
36
37#endif /* _ASM_CURRENT_H */
diff --git a/include/asm-mn10300/delay.h b/include/asm-mn10300/delay.h
deleted file mode 100644
index 34517b359399..000000000000
--- a/include/asm-mn10300/delay.h
+++ /dev/null
@@ -1,19 +0,0 @@
1/* MN10300 Uninterruptible delay routines
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_DELAY_H
12#define _ASM_DELAY_H
13
14extern void __udelay(unsigned long usecs);
15extern void __delay(unsigned long loops);
16
17#define udelay(n) __udelay(n)
18
19#endif /* _ASM_DELAY_H */
diff --git a/include/asm-mn10300/device.h b/include/asm-mn10300/device.h
deleted file mode 100644
index f0a4c256403b..000000000000
--- a/include/asm-mn10300/device.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/device.h>
diff --git a/include/asm-mn10300/div64.h b/include/asm-mn10300/div64.h
deleted file mode 100644
index 3a8329b3e869..000000000000
--- a/include/asm-mn10300/div64.h
+++ /dev/null
@@ -1,100 +0,0 @@
1/* MN10300 64-bit division
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_DIV64
12#define _ASM_DIV64
13
14#include <linux/types.h>
15
16extern void ____unhandled_size_in_do_div___(void);
17
18/*
19 * divide n by base, leaving the result in n and returning the remainder
20 * - we can do this quite efficiently on the MN10300 by cascading the divides
21 * through the MDR register
22 */
23#define do_div(n, base) \
24({ \
25 unsigned __rem = 0; \
26 if (sizeof(n) <= 4) { \
27 asm("mov %1,mdr \n" \
28 "divu %2,%0 \n" \
29 "mov mdr,%1 \n" \
30 : "+r"(n), "=d"(__rem) \
31 : "r"(base), "1"(__rem) \
32 : "cc" \
33 ); \
34 } else if (sizeof(n) <= 8) { \
35 union { \
36 unsigned long long l; \
37 u32 w[2]; \
38 } __quot; \
39 __quot.l = n; \
40 asm("mov %0,mdr \n" /* MDR = 0 */ \
41 "divu %3,%1 \n" \
42 /* __quot.MSL = __div.MSL / base, */ \
43 /* MDR = MDR:__div.MSL % base */ \
44 "divu %3,%2 \n" \
45 /* __quot.LSL = MDR:__div.LSL / base, */ \
46 /* MDR = MDR:__div.LSL % base */ \
47 "mov mdr,%0 \n" \
48 : "=d"(__rem), "=r"(__quot.w[1]), "=r"(__quot.w[0]) \
49 : "r"(base), "0"(__rem), "1"(__quot.w[1]), \
50 "2"(__quot.w[0]) \
51 : "cc" \
52 ); \
53 n = __quot.l; \
54 } else { \
55 ____unhandled_size_in_do_div___(); \
56 } \
57 __rem; \
58})
59
60/*
61 * do an unsigned 32-bit multiply and divide with intermediate 64-bit product
62 * so as not to lose accuracy
63 * - we use the MDR register to hold the MSW of the product
64 */
65static inline __attribute__((const))
66unsigned __muldiv64u(unsigned val, unsigned mult, unsigned div)
67{
68 unsigned result;
69
70 asm("mulu %2,%0 \n" /* MDR:val = val*mult */
71 "divu %3,%0 \n" /* val = MDR:val/div;
72 * MDR = MDR:val%div */
73 : "=r"(result)
74 : "0"(val), "ir"(mult), "r"(div)
75 );
76
77 return result;
78}
79
80/*
81 * do a signed 32-bit multiply and divide with intermediate 64-bit product so
82 * as not to lose accuracy
83 * - we use the MDR register to hold the MSW of the product
84 */
85static inline __attribute__((const))
86signed __muldiv64s(signed val, signed mult, signed div)
87{
88 signed result;
89
90 asm("mul %2,%0 \n" /* MDR:val = val*mult */
91 "div %3,%0 \n" /* val = MDR:val/div;
92 * MDR = MDR:val%div */
93 : "=r"(result)
94 : "0"(val), "ir"(mult), "r"(div)
95 );
96
97 return result;
98}
99
100#endif /* _ASM_DIV64 */
diff --git a/include/asm-mn10300/dma-mapping.h b/include/asm-mn10300/dma-mapping.h
deleted file mode 100644
index ccae8f6c6326..000000000000
--- a/include/asm-mn10300/dma-mapping.h
+++ /dev/null
@@ -1,234 +0,0 @@
1/* DMA mapping routines for the MN10300 arch
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_DMA_MAPPING_H
12#define _ASM_DMA_MAPPING_H
13
14#include <linux/mm.h>
15#include <linux/scatterlist.h>
16
17#include <asm/cache.h>
18#include <asm/io.h>
19
20extern void *dma_alloc_coherent(struct device *dev, size_t size,
21 dma_addr_t *dma_handle, int flag);
22
23extern void dma_free_coherent(struct device *dev, size_t size,
24 void *vaddr, dma_addr_t dma_handle);
25
26#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent((d), (s), (h), (f))
27#define dma_free_noncoherent(d, s, v, h) dma_free_coherent((d), (s), (v), (h))
28
29/*
30 * Map a single buffer of the indicated size for DMA in streaming mode. The
31 * 32-bit bus address to use is returned.
32 *
33 * Once the device is given the dma address, the device owns this memory until
34 * either pci_unmap_single or pci_dma_sync_single is performed.
35 */
36static inline
37dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size,
38 enum dma_data_direction direction)
39{
40 BUG_ON(direction == DMA_NONE);
41 mn10300_dcache_flush_inv();
42 return virt_to_bus(ptr);
43}
44
45/*
46 * Unmap a single streaming mode DMA translation. The dma_addr and size must
47 * match what was provided for in a previous pci_map_single call. All other
48 * usages are undefined.
49 *
50 * After this call, reads by the cpu to the buffer are guarenteed to see
51 * whatever the device wrote there.
52 */
53static inline
54void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
55 enum dma_data_direction direction)
56{
57 BUG_ON(direction == DMA_NONE);
58}
59
60/*
61 * Map a set of buffers described by scatterlist in streaming mode for DMA.
62 * This is the scather-gather version of the above pci_map_single interface.
63 * Here the scatter gather list elements are each tagged with the appropriate
64 * dma address and length. They are obtained via sg_dma_{address,length}(SG).
65 *
66 * NOTE: An implementation may be able to use a smaller number of DMA
67 * address/length pairs than there are SG table elements. (for example
68 * via virtual mapping capabilities) The routine returns the number of
69 * addr/length pairs actually used, at most nents.
70 *
71 * Device ownership issues as mentioned above for pci_map_single are the same
72 * here.
73 */
74static inline
75int dma_map_sg(struct device *dev, struct scatterlist *sglist, int nents,
76 enum dma_data_direction direction)
77{
78 struct scatterlist *sg;
79 int i;
80
81 BUG_ON(!valid_dma_direction(direction));
82 WARN_ON(nents == 0 || sglist[0].length == 0);
83
84 for_each_sg(sglist, sg, nents, i) {
85 BUG_ON(!sg_page(sg));
86
87 sg->dma_address = sg_phys(sg);
88 }
89
90 mn10300_dcache_flush_inv();
91 return nents;
92}
93
94/*
95 * Unmap a set of streaming mode DMA translations.
96 * Again, cpu read rules concerning calls here are the same as for
97 * pci_unmap_single() above.
98 */
99static inline
100void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
101 enum dma_data_direction direction)
102{
103 BUG_ON(!valid_dma_direction(direction));
104}
105
106/*
107 * pci_{map,unmap}_single_page maps a kernel page to a dma_addr_t. identical
108 * to pci_map_single, but takes a struct page instead of a virtual address
109 */
110static inline
111dma_addr_t dma_map_page(struct device *dev, struct page *page,
112 unsigned long offset, size_t size,
113 enum dma_data_direction direction)
114{
115 BUG_ON(direction == DMA_NONE);
116 return page_to_bus(page) + offset;
117}
118
119static inline
120void dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,
121 enum dma_data_direction direction)
122{
123 BUG_ON(direction == DMA_NONE);
124}
125
126/*
127 * Make physical memory consistent for a single streaming mode DMA translation
128 * after a transfer.
129 *
130 * If you perform a pci_map_single() but wish to interrogate the buffer using
131 * the cpu, yet do not wish to teardown the PCI dma mapping, you must call this
132 * function before doing so. At the next point you give the PCI dma address
133 * back to the card, the device again owns the buffer.
134 */
135static inline
136void dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle,
137 size_t size, enum dma_data_direction direction)
138{
139}
140
141static inline
142void dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle,
143 size_t size, enum dma_data_direction direction)
144{
145 mn10300_dcache_flush_inv();
146}
147
148static inline
149void dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle,
150 unsigned long offset, size_t size,
151 enum dma_data_direction direction)
152{
153}
154
155static inline void
156dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle,
157 unsigned long offset, size_t size,
158 enum dma_data_direction direction)
159{
160 mn10300_dcache_flush_inv();
161}
162
163
164/*
165 * Make physical memory consistent for a set of streaming mode DMA translations
166 * after a transfer.
167 *
168 * The same as pci_dma_sync_single but for a scatter-gather list, same rules
169 * and usage.
170 */
171static inline
172void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
173 int nelems, enum dma_data_direction direction)
174{
175}
176
177static inline
178void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
179 int nelems, enum dma_data_direction direction)
180{
181 mn10300_dcache_flush_inv();
182}
183
184static inline
185int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
186{
187 return 0;
188}
189
190/*
191 * Return whether the given PCI device DMA address mask can be supported
192 * properly. For example, if your device can only drive the low 24-bits during
193 * PCI bus mastering, then you would pass 0x00ffffff as the mask to this
194 * function.
195 */
196static inline
197int dma_supported(struct device *dev, u64 mask)
198{
199 /*
200 * we fall back to GFP_DMA when the mask isn't all 1s, so we can't
201 * guarantee allocations that must be within a tighter range than
202 * GFP_DMA
203 */
204 if (mask < 0x00ffffff)
205 return 0;
206 return 1;
207}
208
209static inline
210int dma_set_mask(struct device *dev, u64 mask)
211{
212 if (!dev->dma_mask || !dma_supported(dev, mask))
213 return -EIO;
214
215 *dev->dma_mask = mask;
216 return 0;
217}
218
219static inline
220int dma_get_cache_alignment(void)
221{
222 return 1 << L1_CACHE_SHIFT;
223}
224
225#define dma_is_consistent(d) (1)
226
227static inline
228void dma_cache_sync(void *vaddr, size_t size,
229 enum dma_data_direction direction)
230{
231 mn10300_dcache_flush_inv();
232}
233
234#endif
diff --git a/include/asm-mn10300/dma.h b/include/asm-mn10300/dma.h
deleted file mode 100644
index 098df2e617ab..000000000000
--- a/include/asm-mn10300/dma.h
+++ /dev/null
@@ -1,118 +0,0 @@
1/* MN10300 ISA DMA handlers and definitions
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_DMA_H
12#define _ASM_DMA_H
13
14#include <asm/system.h>
15#include <linux/spinlock.h>
16#include <asm/io.h>
17#include <linux/delay.h>
18
19#undef MAX_DMA_CHANNELS /* switch off linux/kernel/dma.c */
20#define MAX_DMA_ADDRESS 0xbfffffff
21
22extern spinlock_t dma_spin_lock;
23
24static inline unsigned long claim_dma_lock(void)
25{
26 unsigned long flags;
27 spin_lock_irqsave(&dma_spin_lock, flags);
28 return flags;
29}
30
31static inline void release_dma_lock(unsigned long flags)
32{
33 spin_unlock_irqrestore(&dma_spin_lock, flags);
34}
35
36/* enable/disable a specific DMA channel */
37static inline void enable_dma(unsigned int dmanr)
38{
39}
40
41static inline void disable_dma(unsigned int dmanr)
42{
43}
44
45/* Clear the 'DMA Pointer Flip Flop'.
46 * Write 0 for LSB/MSB, 1 for MSB/LSB access.
47 * Use this once to initialize the FF to a known state.
48 * After that, keep track of it. :-)
49 * --- In order to do that, the DMA routines below should ---
50 * --- only be used while holding the DMA lock ! ---
51 */
52static inline void clear_dma_ff(unsigned int dmanr)
53{
54}
55
56/* set mode (above) for a specific DMA channel */
57static inline void set_dma_mode(unsigned int dmanr, char mode)
58{
59}
60
61/* Set only the page register bits of the transfer address.
62 * This is used for successive transfers when we know the contents of
63 * the lower 16 bits of the DMA current address register, but a 64k boundary
64 * may have been crossed.
65 */
66static inline void set_dma_page(unsigned int dmanr, char pagenr)
67{
68}
69
70
71/* Set transfer address & page bits for specific DMA channel.
72 * Assumes dma flipflop is clear.
73 */
74static inline void set_dma_addr(unsigned int dmanr, unsigned int a)
75{
76}
77
78
79/* Set transfer size (max 64k for DMA1..3, 128k for DMA5..7) for
80 * a specific DMA channel.
81 * You must ensure the parameters are valid.
82 * NOTE: from a manual: "the number of transfers is one more
83 * than the initial word count"! This is taken into account.
84 * Assumes dma flip-flop is clear.
85 * NOTE 2: "count" represents _bytes_ and must be even for channels 5-7.
86 */
87static inline void set_dma_count(unsigned int dmanr, unsigned int count)
88{
89}
90
91
92/* Get DMA residue count. After a DMA transfer, this
93 * should return zero. Reading this while a DMA transfer is
94 * still in progress will return unpredictable results.
95 * If called before the channel has been used, it may return 1.
96 * Otherwise, it returns the number of _bytes_ left to transfer.
97 *
98 * Assumes DMA flip-flop is clear.
99 */
100static inline int get_dma_residue(unsigned int dmanr)
101{
102 return 0;
103}
104
105
106/* These are in kernel/dma.c: */
107extern int request_dma(unsigned int dmanr, const char *device_id);
108extern void free_dma(unsigned int dmanr);
109
110/* From PCI */
111
112#ifdef CONFIG_PCI
113extern int isa_dma_bridge_buggy;
114#else
115#define isa_dma_bridge_buggy (0)
116#endif
117
118#endif /* _ASM_DMA_H */
diff --git a/include/asm-mn10300/dmactl-regs.h b/include/asm-mn10300/dmactl-regs.h
deleted file mode 100644
index 58a199da0f4a..000000000000
--- a/include/asm-mn10300/dmactl-regs.h
+++ /dev/null
@@ -1,101 +0,0 @@
1/* MN10300 on-board DMA controller registers
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_DMACTL_REGS_H
12#define _ASM_DMACTL_REGS_H
13
14#include <asm/cpu-regs.h>
15
16#ifdef __KERNEL__
17
18/* DMA registers */
19#define DMxCTR(N) __SYSREG(0xd2000000 + ((N) * 0x100), u32) /* control reg */
20#define DMxCTR_BG 0x0000001f /* transfer request source */
21#define DMxCTR_BG_SOFT 0x00000000 /* - software source */
22#define DMxCTR_BG_SC0TX 0x00000002 /* - serial port 0 transmission */
23#define DMxCTR_BG_SC0RX 0x00000003 /* - serial port 0 reception */
24#define DMxCTR_BG_SC1TX 0x00000004 /* - serial port 1 transmission */
25#define DMxCTR_BG_SC1RX 0x00000005 /* - serial port 1 reception */
26#define DMxCTR_BG_SC2TX 0x00000006 /* - serial port 2 transmission */
27#define DMxCTR_BG_SC2RX 0x00000007 /* - serial port 2 reception */
28#define DMxCTR_BG_TM0UFLOW 0x00000008 /* - timer 0 underflow */
29#define DMxCTR_BG_TM1UFLOW 0x00000009 /* - timer 1 underflow */
30#define DMxCTR_BG_TM2UFLOW 0x0000000a /* - timer 2 underflow */
31#define DMxCTR_BG_TM3UFLOW 0x0000000b /* - timer 3 underflow */
32#define DMxCTR_BG_TM6ACMPCAP 0x0000000c /* - timer 6A compare/capture */
33#define DMxCTR_BG_AFE 0x0000000d /* - analogue front-end interrupt source */
34#define DMxCTR_BG_ADC 0x0000000e /* - A/D conversion end interrupt source */
35#define DMxCTR_BG_IRDA 0x0000000f /* - IrDA interrupt source */
36#define DMxCTR_BG_RTC 0x00000010 /* - RTC interrupt source */
37#define DMxCTR_BG_XIRQ0 0x00000011 /* - XIRQ0 pin interrupt source */
38#define DMxCTR_BG_XIRQ1 0x00000012 /* - XIRQ1 pin interrupt source */
39#define DMxCTR_BG_XDMR0 0x00000013 /* - external request 0 source (XDMR0 pin) */
40#define DMxCTR_BG_XDMR1 0x00000014 /* - external request 1 source (XDMR1 pin) */
41#define DMxCTR_SAM 0x000000e0 /* DMA transfer src addr mode */
42#define DMxCTR_SAM_INCR 0x00000000 /* - increment */
43#define DMxCTR_SAM_DECR 0x00000020 /* - decrement */
44#define DMxCTR_SAM_FIXED 0x00000040 /* - fixed */
45#define DMxCTR_DAM 0x00000000 /* DMA transfer dest addr mode */
46#define DMxCTR_DAM_INCR 0x00000000 /* - increment */
47#define DMxCTR_DAM_DECR 0x00000100 /* - decrement */
48#define DMxCTR_DAM_FIXED 0x00000200 /* - fixed */
49#define DMxCTR_TM 0x00001800 /* DMA transfer mode */
50#define DMxCTR_TM_BATCH 0x00000000 /* - batch transfer */
51#define DMxCTR_TM_INTERM 0x00001000 /* - intermittent transfer */
52#define DMxCTR_UT 0x00006000 /* DMA transfer unit */
53#define DMxCTR_UT_1 0x00000000 /* - 1 byte */
54#define DMxCTR_UT_2 0x00002000 /* - 2 byte */
55#define DMxCTR_UT_4 0x00004000 /* - 4 byte */
56#define DMxCTR_UT_16 0x00006000 /* - 16 byte */
57#define DMxCTR_TEN 0x00010000 /* DMA channel transfer enable */
58#define DMxCTR_RQM 0x00060000 /* external request input source mode */
59#define DMxCTR_RQM_FALLEDGE 0x00000000 /* - falling edge */
60#define DMxCTR_RQM_RISEEDGE 0x00020000 /* - rising edge */
61#define DMxCTR_RQM_LOLEVEL 0x00040000 /* - low level */
62#define DMxCTR_RQM_HILEVEL 0x00060000 /* - high level */
63#define DMxCTR_RQF 0x01000000 /* DMA transfer request flag */
64#define DMxCTR_XEND 0x80000000 /* DMA transfer end flag */
65
66#define DMxSRC(N) __SYSREG(0xd2000004 + ((N) * 0x100), u32) /* control reg */
67
68#define DMxDST(N) __SYSREG(0xd2000008 + ((N) * 0x100), u32) /* src addr reg */
69
70#define DMxSIZ(N) __SYSREG(0xd200000c + ((N) * 0x100), u32) /* dest addr reg */
71#define DMxSIZ_CT 0x000fffff /* number of bytes to transfer */
72
73#define DMxCYC(N) __SYSREG(0xd2000010 + ((N) * 0x100), u32) /* intermittent
74 * size reg */
75#define DMxCYC_CYC 0x000000ff /* number of interrmittent transfers -1 */
76
77#define DM0IRQ 16 /* DMA channel 0 complete IRQ */
78#define DM1IRQ 17 /* DMA channel 1 complete IRQ */
79#define DM2IRQ 18 /* DMA channel 2 complete IRQ */
80#define DM3IRQ 19 /* DMA channel 3 complete IRQ */
81
82#define DM0ICR GxICR(DM0IRQ) /* DMA channel 0 complete intr ctrl reg */
83#define DM1ICR GxICR(DM0IR1) /* DMA channel 1 complete intr ctrl reg */
84#define DM2ICR GxICR(DM0IR2) /* DMA channel 2 complete intr ctrl reg */
85#define DM3ICR GxICR(DM0IR3) /* DMA channel 3 complete intr ctrl reg */
86
87#ifndef __ASSEMBLY__
88
89struct mn10300_dmactl_regs {
90 u32 ctr;
91 const void *src;
92 void *dst;
93 u32 siz;
94 u32 cyc;
95} __attribute__((aligned(0x100)));
96
97#endif /* __ASSEMBLY__ */
98
99#endif /* __KERNEL__ */
100
101#endif /* _ASM_DMACTL_REGS_H */
diff --git a/include/asm-mn10300/elf.h b/include/asm-mn10300/elf.h
deleted file mode 100644
index bf09f8bb392e..000000000000
--- a/include/asm-mn10300/elf.h
+++ /dev/null
@@ -1,147 +0,0 @@
1/* MN10300 ELF constant and register definitions
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 * Written by David Howells (dhowells@redhat.com)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12#ifndef _ASM_ELF_H
13#define _ASM_ELF_H
14
15#include <linux/utsname.h>
16#include <asm/ptrace.h>
17#include <asm/user.h>
18
19/*
20 * AM33 relocations
21 */
22#define R_MN10300_NONE 0 /* No reloc. */
23#define R_MN10300_32 1 /* Direct 32 bit. */
24#define R_MN10300_16 2 /* Direct 16 bit. */
25#define R_MN10300_8 3 /* Direct 8 bit. */
26#define R_MN10300_PCREL32 4 /* PC-relative 32-bit. */
27#define R_MN10300_PCREL16 5 /* PC-relative 16-bit signed. */
28#define R_MN10300_PCREL8 6 /* PC-relative 8-bit signed. */
29#define R_MN10300_24 9 /* Direct 24 bit. */
30#define R_MN10300_RELATIVE 23 /* Adjust by program base. */
31
32/*
33 * ELF register definitions..
34 */
35typedef unsigned long elf_greg_t;
36
37#define ELF_NGREG (sizeof (struct pt_regs) / sizeof(elf_greg_t))
38typedef elf_greg_t elf_gregset_t[ELF_NGREG];
39
40#define ELF_NFPREG 32
41typedef float elf_fpreg_t;
42
43typedef struct {
44 elf_fpreg_t fpregs[ELF_NFPREG];
45 u_int32_t fpcr;
46} elf_fpregset_t;
47
48extern int dump_fpu(struct pt_regs *, elf_fpregset_t *);
49
50/*
51 * This is used to ensure we don't load something for the wrong architecture
52 */
53#define elf_check_arch(x) \
54 (((x)->e_machine == EM_CYGNUS_MN10300) || \
55 ((x)->e_machine == EM_MN10300))
56
57/*
58 * These are used to set parameters in the core dumps.
59 */
60#define ELF_CLASS ELFCLASS32
61#define ELF_DATA ELFDATA2LSB
62#define ELF_ARCH EM_MN10300
63
64/*
65 * ELF process initialiser
66 */
67#define ELF_PLAT_INIT(_r, load_addr) \
68do { \
69 struct pt_regs *_ur = current->thread.uregs; \
70 _ur->a3 = 0; _ur->a2 = 0; _ur->d3 = 0; _ur->d2 = 0; \
71 _ur->mcvf = 0; _ur->mcrl = 0; _ur->mcrh = 0; _ur->mdrq = 0; \
72 _ur->e1 = 0; _ur->e0 = 0; _ur->e7 = 0; _ur->e6 = 0; \
73 _ur->e5 = 0; _ur->e4 = 0; _ur->e3 = 0; _ur->e2 = 0; \
74 _ur->lar = 0; _ur->lir = 0; _ur->mdr = 0; \
75 _ur->a1 = 0; _ur->a0 = 0; _ur->d1 = 0; _ur->d0 = 0; \
76} while (0)
77
78#define USE_ELF_CORE_DUMP
79#define ELF_EXEC_PAGESIZE 4096
80
81/*
82 * This is the location that an ET_DYN program is loaded if exec'ed. Typical
83 * use of this is to invoke "./ld.so someprog" to test out a new version of
84 * the loader. We need to make sure that it is out of the way of the program
85 * that it will "exec", and that there is sufficient room for the brk.
86 * - must clear the VMALLOC area
87 */
88#define ELF_ET_DYN_BASE 0x04000000
89
90/*
91 * regs is struct pt_regs, pr_reg is elf_gregset_t (which is
92 * now struct user_regs, they are different)
93 * - ELF_CORE_COPY_REGS has been guessed, and may be wrong
94 */
95#define ELF_CORE_COPY_REGS(pr_reg, regs) \
96do { \
97 pr_reg[0] = regs->a3; \
98 pr_reg[1] = regs->a2; \
99 pr_reg[2] = regs->d3; \
100 pr_reg[3] = regs->d2; \
101 pr_reg[4] = regs->mcvf; \
102 pr_reg[5] = regs->mcrl; \
103 pr_reg[6] = regs->mcrh; \
104 pr_reg[7] = regs->mdrq; \
105 pr_reg[8] = regs->e1; \
106 pr_reg[9] = regs->e0; \
107 pr_reg[10] = regs->e7; \
108 pr_reg[11] = regs->e6; \
109 pr_reg[12] = regs->e5; \
110 pr_reg[13] = regs->e4; \
111 pr_reg[14] = regs->e3; \
112 pr_reg[15] = regs->e2; \
113 pr_reg[16] = regs->sp; \
114 pr_reg[17] = regs->lar; \
115 pr_reg[18] = regs->lir; \
116 pr_reg[19] = regs->mdr; \
117 pr_reg[20] = regs->a1; \
118 pr_reg[21] = regs->a0; \
119 pr_reg[22] = regs->d1; \
120 pr_reg[23] = regs->d0; \
121 pr_reg[24] = regs->orig_d0; \
122 pr_reg[25] = regs->epsw; \
123 pr_reg[26] = regs->pc; \
124} while (0);
125
126/*
127 * This yields a mask that user programs can use to figure out what
128 * instruction set this CPU supports. This could be done in user space,
129 * but it's not easy, and we've already done it here.
130 */
131#define ELF_HWCAP (0)
132
133/*
134 * This yields a string that ld.so will use to load implementation
135 * specific libraries for optimization. This is more specific in
136 * intent than poking at uname or /proc/cpuinfo.
137 *
138 * For the moment, we have only optimizations for the Intel generations,
139 * but that could change...
140 */
141#define ELF_PLATFORM (NULL)
142
143#ifdef __KERNEL__
144#define SET_PERSONALITY(ex) set_personality(PER_LINUX)
145#endif
146
147#endif /* _ASM_ELF_H */
diff --git a/include/asm-mn10300/emergency-restart.h b/include/asm-mn10300/emergency-restart.h
deleted file mode 100644
index 3711bd9d50bd..000000000000
--- a/include/asm-mn10300/emergency-restart.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/emergency-restart.h>
diff --git a/include/asm-mn10300/errno.h b/include/asm-mn10300/errno.h
deleted file mode 100644
index 4c82b503d92f..000000000000
--- a/include/asm-mn10300/errno.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/errno.h>
diff --git a/include/asm-mn10300/exceptions.h b/include/asm-mn10300/exceptions.h
deleted file mode 100644
index fa16466ef3f9..000000000000
--- a/include/asm-mn10300/exceptions.h
+++ /dev/null
@@ -1,121 +0,0 @@
1/* MN10300 Microcontroller core exceptions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_EXCEPTIONS_H
12#define _ASM_EXCEPTIONS_H
13
14#include <linux/linkage.h>
15
16/*
17 * define the breakpoint instruction opcode to use
18 * - note that the JTAG unit steals 0xFF, so we want to avoid that if we can
19 * (can use 0xF7)
20 */
21#define GDBSTUB_BKPT 0xFF
22
23#ifndef __ASSEMBLY__
24
25/*
26 * enumeration of exception codes (as extracted from TBR MSW)
27 */
28enum exception_code {
29 EXCEP_RESET = 0x000000, /* reset */
30
31 /* MMU exceptions */
32 EXCEP_ITLBMISS = 0x000100, /* instruction TLB miss */
33 EXCEP_DTLBMISS = 0x000108, /* data TLB miss */
34 EXCEP_IAERROR = 0x000110, /* instruction address */
35 EXCEP_DAERROR = 0x000118, /* data address */
36
37 /* system exceptions */
38 EXCEP_TRAP = 0x000128, /* program interrupt (PI instruction) */
39 EXCEP_ISTEP = 0x000130, /* single step */
40 EXCEP_IBREAK = 0x000150, /* instruction breakpoint */
41 EXCEP_OBREAK = 0x000158, /* operand breakpoint */
42 EXCEP_PRIVINS = 0x000160, /* privileged instruction execution */
43 EXCEP_UNIMPINS = 0x000168, /* unimplemented instruction execution */
44 EXCEP_UNIMPEXINS = 0x000170, /* unimplemented extended instruction execution */
45 EXCEP_MEMERR = 0x000178, /* illegal memory access */
46 EXCEP_MISALIGN = 0x000180, /* misalignment */
47 EXCEP_BUSERROR = 0x000188, /* bus error */
48 EXCEP_ILLINSACC = 0x000190, /* illegal instruction access */
49 EXCEP_ILLDATACC = 0x000198, /* illegal data access */
50 EXCEP_IOINSACC = 0x0001a0, /* I/O space instruction access */
51 EXCEP_PRIVINSACC = 0x0001a8, /* privileged space instruction access */
52 EXCEP_PRIVDATACC = 0x0001b0, /* privileged space data access */
53 EXCEP_DATINSACC = 0x0001b8, /* data space instruction access */
54 EXCEP_DOUBLE_FAULT = 0x000200, /* double fault */
55
56 /* FPU exceptions */
57 EXCEP_FPU_DISABLED = 0x0001c0, /* FPU disabled */
58 EXCEP_FPU_UNIMPINS = 0x0001c8, /* FPU unimplemented operation */
59 EXCEP_FPU_OPERATION = 0x0001d0, /* FPU operation */
60
61 /* interrupts */
62 EXCEP_WDT = 0x000240, /* watchdog timer overflow */
63 EXCEP_NMI = 0x000248, /* non-maskable interrupt */
64 EXCEP_IRQ_LEVEL0 = 0x000280, /* level 0 maskable interrupt */
65 EXCEP_IRQ_LEVEL1 = 0x000288, /* level 1 maskable interrupt */
66 EXCEP_IRQ_LEVEL2 = 0x000290, /* level 2 maskable interrupt */
67 EXCEP_IRQ_LEVEL3 = 0x000298, /* level 3 maskable interrupt */
68 EXCEP_IRQ_LEVEL4 = 0x0002a0, /* level 4 maskable interrupt */
69 EXCEP_IRQ_LEVEL5 = 0x0002a8, /* level 5 maskable interrupt */
70 EXCEP_IRQ_LEVEL6 = 0x0002b0, /* level 6 maskable interrupt */
71
72 /* system calls */
73 EXCEP_SYSCALL0 = 0x000300, /* system call 0 */
74 EXCEP_SYSCALL1 = 0x000308, /* system call 1 */
75 EXCEP_SYSCALL2 = 0x000310, /* system call 2 */
76 EXCEP_SYSCALL3 = 0x000318, /* system call 3 */
77 EXCEP_SYSCALL4 = 0x000320, /* system call 4 */
78 EXCEP_SYSCALL5 = 0x000328, /* system call 5 */
79 EXCEP_SYSCALL6 = 0x000330, /* system call 6 */
80 EXCEP_SYSCALL7 = 0x000338, /* system call 7 */
81 EXCEP_SYSCALL8 = 0x000340, /* system call 8 */
82 EXCEP_SYSCALL9 = 0x000348, /* system call 9 */
83 EXCEP_SYSCALL10 = 0x000350, /* system call 10 */
84 EXCEP_SYSCALL11 = 0x000358, /* system call 11 */
85 EXCEP_SYSCALL12 = 0x000360, /* system call 12 */
86 EXCEP_SYSCALL13 = 0x000368, /* system call 13 */
87 EXCEP_SYSCALL14 = 0x000370, /* system call 14 */
88 EXCEP_SYSCALL15 = 0x000378, /* system call 15 */
89};
90
91extern void __set_intr_stub(enum exception_code code, void *handler);
92extern void set_intr_stub(enum exception_code code, void *handler);
93extern void set_jtag_stub(enum exception_code code, void *handler);
94
95struct pt_regs;
96
97extern asmlinkage void __common_exception(void);
98extern asmlinkage void itlb_miss(void);
99extern asmlinkage void dtlb_miss(void);
100extern asmlinkage void itlb_aerror(void);
101extern asmlinkage void dtlb_aerror(void);
102extern asmlinkage void raw_bus_error(void);
103extern asmlinkage void double_fault(void);
104extern asmlinkage int system_call(struct pt_regs *);
105extern asmlinkage void fpu_exception(struct pt_regs *, enum exception_code);
106extern asmlinkage void nmi(struct pt_regs *, enum exception_code);
107extern asmlinkage void uninitialised_exception(struct pt_regs *,
108 enum exception_code);
109extern asmlinkage void irq_handler(void);
110extern asmlinkage void profile_handler(void);
111extern asmlinkage void nmi_handler(void);
112extern asmlinkage void misalignment(struct pt_regs *, enum exception_code);
113
114extern void die(const char *, struct pt_regs *, enum exception_code)
115 ATTRIB_NORET;
116
117extern int die_if_no_fixup(const char *, struct pt_regs *, enum exception_code);
118
119#endif /* __ASSEMBLY__ */
120
121#endif /* _ASM_EXCEPTIONS_H */
diff --git a/include/asm-mn10300/fb.h b/include/asm-mn10300/fb.h
deleted file mode 100644
index 697b24a91e1a..000000000000
--- a/include/asm-mn10300/fb.h
+++ /dev/null
@@ -1,23 +0,0 @@
1/* MN10300 Frame buffer stuff
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_FB_H
12#define _ASM_FB_H
13
14#include <linux/fb.h>
15
16#define fb_pgprotect(...) do {} while (0)
17
18static inline int fb_is_primary_device(struct fb_info *info)
19{
20 return 0;
21}
22
23#endif /* _ASM_FB_H */
diff --git a/include/asm-mn10300/fcntl.h b/include/asm-mn10300/fcntl.h
deleted file mode 100644
index 46ab12db5739..000000000000
--- a/include/asm-mn10300/fcntl.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/fcntl.h>
diff --git a/include/asm-mn10300/fpu.h b/include/asm-mn10300/fpu.h
deleted file mode 100644
index 64a2b83a7a6a..000000000000
--- a/include/asm-mn10300/fpu.h
+++ /dev/null
@@ -1,85 +0,0 @@
1/* MN10300 FPU definitions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 * Derived from include/asm-i386/i387.h: Copyright (C) 1994 Linus Torvalds
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12#ifndef _ASM_FPU_H
13#define _ASM_FPU_H
14
15#include <asm/processor.h>
16#include <asm/sigcontext.h>
17#include <asm/user.h>
18
19#ifdef __KERNEL__
20
21/* the task that owns the FPU state */
22extern struct task_struct *fpu_state_owner;
23
24#define set_using_fpu(tsk) \
25do { \
26 (tsk)->thread.fpu_flags |= THREAD_USING_FPU; \
27} while (0)
28
29#define clear_using_fpu(tsk) \
30do { \
31 (tsk)->thread.fpu_flags &= ~THREAD_USING_FPU; \
32} while (0)
33
34#define is_using_fpu(tsk) ((tsk)->thread.fpu_flags & THREAD_USING_FPU)
35
36#define unlazy_fpu(tsk) \
37do { \
38 preempt_disable(); \
39 if (fpu_state_owner == (tsk)) \
40 fpu_save(&tsk->thread.fpu_state); \
41 preempt_enable(); \
42} while (0)
43
44#define exit_fpu() \
45do { \
46 struct task_struct *__tsk = current; \
47 preempt_disable(); \
48 if (fpu_state_owner == __tsk) \
49 fpu_state_owner = NULL; \
50 preempt_enable(); \
51} while (0)
52
53#define flush_fpu() \
54do { \
55 struct task_struct *__tsk = current; \
56 preempt_disable(); \
57 if (fpu_state_owner == __tsk) { \
58 fpu_state_owner = NULL; \
59 __tsk->thread.uregs->epsw &= ~EPSW_FE; \
60 } \
61 preempt_enable(); \
62 clear_using_fpu(__tsk); \
63} while (0)
64
65extern asmlinkage void fpu_init_state(void);
66extern asmlinkage void fpu_kill_state(struct task_struct *);
67extern asmlinkage void fpu_disabled(struct pt_regs *, enum exception_code);
68extern asmlinkage void fpu_exception(struct pt_regs *, enum exception_code);
69
70#ifdef CONFIG_FPU
71extern asmlinkage void fpu_save(struct fpu_state_struct *);
72extern asmlinkage void fpu_restore(struct fpu_state_struct *);
73#else
74#define fpu_save(a)
75#define fpu_restore(a)
76#endif /* CONFIG_FPU */
77
78/*
79 * signal frame handlers
80 */
81extern int fpu_setup_sigcontext(struct fpucontext *buf);
82extern int fpu_restore_sigcontext(struct fpucontext *buf);
83
84#endif /* __KERNEL__ */
85#endif /* _ASM_FPU_H */
diff --git a/include/asm-mn10300/frame.inc b/include/asm-mn10300/frame.inc
deleted file mode 100644
index 5b1949bdf039..000000000000
--- a/include/asm-mn10300/frame.inc
+++ /dev/null
@@ -1,91 +0,0 @@
1/* MN10300 Microcontroller core system register definitions -*- asm -*-
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_FRAME_INC
12#define _ASM_FRAME_INC
13
14#ifndef __ASSEMBLY__
15#error not for use in C files
16#endif
17
18#ifndef __ASM_OFFSETS_H__
19#include <asm/asm-offsets.h>
20#endif
21
22#define pi break
23
24#define fp a3
25
26###############################################################################
27#
28# build a stack frame from the registers
29# - the caller has subtracted 4 from SP before coming here
30#
31###############################################################################
32.macro SAVE_ALL
33 add -4,sp # next exception frame ptr save area
34 movm [other],(sp)
35 mov usp,a1
36 mov a1,(sp) # USP in MOVM[other] dummy slot
37 movm [d2,d3,a2,a3,exreg0,exreg1,exother],(sp)
38 mov sp,fp # FRAME pointer in A3
39 add -12,sp # allow for calls to be made
40 mov (__frame),a1
41 mov a1,(REG_NEXT,fp)
42 mov fp,(__frame)
43
44 and ~EPSW_FE,epsw # disable the FPU inside the kernel
45
46 # we may be holding current in E2
47#ifdef CONFIG_MN10300_CURRENT_IN_E2
48 mov (__current),e2
49#endif
50.endm
51
52###############################################################################
53#
54# restore the registers from a stack frame
55#
56###############################################################################
57.macro RESTORE_ALL
58 # peel back the stack to the calling frame
59 # - this permits execve() to discard extra frames due to kernel syscalls
60 mov (__frame),fp
61 mov fp,sp
62 mov (REG_NEXT,fp),d0 # userspace has regs->next == 0
63 mov d0,(__frame)
64
65#ifndef CONFIG_MN10300_USING_JTAG
66 mov (REG_EPSW,fp),d0
67 btst EPSW_T,d0
68 beq 99f
69
70 or EPSW_NMID,epsw
71 movhu (DCR),d1
72 or 0x0001, d1
73 movhu d1,(DCR)
74
7599:
76#endif
77 movm (sp),[d2,d3,a2,a3,exreg0,exreg1,exother]
78
79 # must restore usp even if returning to kernel space,
80 # when CONFIG_PREEMPT is enabled.
81 mov (sp),a1 # USP in MOVM[other] dummy slot
82 mov a1,usp
83
84 movm (sp),[other]
85 add 8,sp
86 rti
87
88.endm
89
90
91#endif /* _ASM_FRAME_INC */
diff --git a/include/asm-mn10300/ftrace.h b/include/asm-mn10300/ftrace.h
deleted file mode 100644
index 40a8c178f10d..000000000000
--- a/include/asm-mn10300/ftrace.h
+++ /dev/null
@@ -1 +0,0 @@
1/* empty */
diff --git a/include/asm-mn10300/futex.h b/include/asm-mn10300/futex.h
deleted file mode 100644
index 0b745828f42b..000000000000
--- a/include/asm-mn10300/futex.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/futex.h>
diff --git a/include/asm-mn10300/gdb-stub.h b/include/asm-mn10300/gdb-stub.h
deleted file mode 100644
index e5a6368559af..000000000000
--- a/include/asm-mn10300/gdb-stub.h
+++ /dev/null
@@ -1,183 +0,0 @@
1/* MN10300 Kernel GDB stub definitions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 * - Derived from asm-mips/gdb-stub.h (c) 1995 Andreas Busse
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12#ifndef _ASM_GDB_STUB_H
13#define _ASM_GDB_STUB_H
14
15#include <asm/exceptions.h>
16
17/*
18 * register ID numbers in GDB remote protocol
19 */
20
21#define GDB_REGID_PC 9
22#define GDB_REGID_FP 7
23#define GDB_REGID_SP 8
24
25/*
26 * virtual stack layout for the GDB exception handler
27 */
28#define NUMREGS 64
29
30#define GDB_FR_D0 (0 * 4)
31#define GDB_FR_D1 (1 * 4)
32#define GDB_FR_D2 (2 * 4)
33#define GDB_FR_D3 (3 * 4)
34#define GDB_FR_A0 (4 * 4)
35#define GDB_FR_A1 (5 * 4)
36#define GDB_FR_A2 (6 * 4)
37#define GDB_FR_A3 (7 * 4)
38
39#define GDB_FR_SP (8 * 4)
40#define GDB_FR_PC (9 * 4)
41#define GDB_FR_MDR (10 * 4)
42#define GDB_FR_EPSW (11 * 4)
43#define GDB_FR_LIR (12 * 4)
44#define GDB_FR_LAR (13 * 4)
45#define GDB_FR_MDRQ (14 * 4)
46
47#define GDB_FR_E0 (15 * 4)
48#define GDB_FR_E1 (16 * 4)
49#define GDB_FR_E2 (17 * 4)
50#define GDB_FR_E3 (18 * 4)
51#define GDB_FR_E4 (19 * 4)
52#define GDB_FR_E5 (20 * 4)
53#define GDB_FR_E6 (21 * 4)
54#define GDB_FR_E7 (22 * 4)
55
56#define GDB_FR_SSP (23 * 4)
57#define GDB_FR_MSP (24 * 4)
58#define GDB_FR_USP (25 * 4)
59#define GDB_FR_MCRH (26 * 4)
60#define GDB_FR_MCRL (27 * 4)
61#define GDB_FR_MCVF (28 * 4)
62
63#define GDB_FR_FPCR (29 * 4)
64#define GDB_FR_DUMMY0 (30 * 4)
65#define GDB_FR_DUMMY1 (31 * 4)
66
67#define GDB_FR_FS0 (32 * 4)
68
69#define GDB_FR_SIZE (NUMREGS * 4)
70
71#ifndef __ASSEMBLY__
72
73/*
74 * This is the same as above, but for the high-level
75 * part of the GDB stub.
76 */
77
78struct gdb_regs {
79 /* saved main processor registers */
80 u32 d0, d1, d2, d3, a0, a1, a2, a3;
81 u32 sp, pc, mdr, epsw, lir, lar, mdrq;
82 u32 e0, e1, e2, e3, e4, e5, e6, e7;
83 u32 ssp, msp, usp, mcrh, mcrl, mcvf;
84
85 /* saved floating point registers */
86 u32 fpcr, _dummy0, _dummy1;
87 u32 fs0, fs1, fs2, fs3, fs4, fs5, fs6, fs7;
88 u32 fs8, fs9, fs10, fs11, fs12, fs13, fs14, fs15;
89 u32 fs16, fs17, fs18, fs19, fs20, fs21, fs22, fs23;
90 u32 fs24, fs25, fs26, fs27, fs28, fs29, fs30, fs31;
91};
92
93/*
94 * Prototypes
95 */
96extern void show_registers_only(struct pt_regs *regs);
97
98extern asmlinkage void gdbstub_init(void);
99extern asmlinkage void gdbstub_exit(int status);
100extern asmlinkage void gdbstub_io_init(void);
101extern asmlinkage void gdbstub_io_set_baud(unsigned baud);
102extern asmlinkage int gdbstub_io_rx_char(unsigned char *_ch, int nonblock);
103extern asmlinkage void gdbstub_io_tx_char(unsigned char ch);
104extern asmlinkage void gdbstub_io_tx_flush(void);
105
106extern asmlinkage void gdbstub_io_rx_handler(void);
107extern asmlinkage void gdbstub_rx_irq(struct pt_regs *, enum exception_code);
108extern asmlinkage int gdbstub_intercept(struct pt_regs *, enum exception_code);
109extern asmlinkage void gdbstub_exception(struct pt_regs *, enum exception_code);
110extern asmlinkage void __gdbstub_bug_trap(void);
111extern asmlinkage void __gdbstub_pause(void);
112extern asmlinkage void start_kernel(void);
113
114#ifndef CONFIG_MN10300_CACHE_DISABLED
115extern asmlinkage void gdbstub_purge_cache(void);
116#else
117#define gdbstub_purge_cache() do {} while (0)
118#endif
119
120/* Used to prevent crashes in memory access */
121extern asmlinkage int gdbstub_read_byte(const u8 *, u8 *);
122extern asmlinkage int gdbstub_read_word(const u8 *, u8 *);
123extern asmlinkage int gdbstub_read_dword(const u8 *, u8 *);
124extern asmlinkage int gdbstub_write_byte(u32, u8 *);
125extern asmlinkage int gdbstub_write_word(u32, u8 *);
126extern asmlinkage int gdbstub_write_dword(u32, u8 *);
127
128extern asmlinkage void gdbstub_read_byte_guard(void);
129extern asmlinkage void gdbstub_read_byte_cont(void);
130extern asmlinkage void gdbstub_read_word_guard(void);
131extern asmlinkage void gdbstub_read_word_cont(void);
132extern asmlinkage void gdbstub_read_dword_guard(void);
133extern asmlinkage void gdbstub_read_dword_cont(void);
134extern asmlinkage void gdbstub_write_byte_guard(void);
135extern asmlinkage void gdbstub_write_byte_cont(void);
136extern asmlinkage void gdbstub_write_word_guard(void);
137extern asmlinkage void gdbstub_write_word_cont(void);
138extern asmlinkage void gdbstub_write_dword_guard(void);
139extern asmlinkage void gdbstub_write_dword_cont(void);
140
141extern u8 gdbstub_rx_buffer[PAGE_SIZE];
142extern u32 gdbstub_rx_inp;
143extern u32 gdbstub_rx_outp;
144extern u8 gdbstub_rx_overflow;
145extern u8 gdbstub_busy;
146extern u8 gdbstub_rx_unget;
147
148#ifdef CONFIG_GDBSTUB_DEBUGGING
149extern void gdbstub_printk(const char *fmt, ...)
150 __attribute__((format(printf, 1, 2)));
151#else
152static inline __attribute__((format(printf, 1, 2)))
153void gdbstub_printk(const char *fmt, ...)
154{
155}
156#endif
157
158#ifdef CONFIG_GDBSTUB_DEBUG_ENTRY
159#define gdbstub_entry(FMT, ...) gdbstub_printk(FMT, ##__VA_ARGS__)
160#else
161#define gdbstub_entry(FMT, ...) ({ 0; })
162#endif
163
164#ifdef CONFIG_GDBSTUB_DEBUG_PROTOCOL
165#define gdbstub_proto(FMT, ...) gdbstub_printk(FMT, ##__VA_ARGS__)
166#else
167#define gdbstub_proto(FMT, ...) ({ 0; })
168#endif
169
170#ifdef CONFIG_GDBSTUB_DEBUG_IO
171#define gdbstub_io(FMT, ...) gdbstub_printk(FMT, ##__VA_ARGS__)
172#else
173#define gdbstub_io(FMT, ...) ({ 0; })
174#endif
175
176#ifdef CONFIG_GDBSTUB_DEBUG_BREAKPOINT
177#define gdbstub_bkpt(FMT, ...) gdbstub_printk(FMT, ##__VA_ARGS__)
178#else
179#define gdbstub_bkpt(FMT, ...) ({ 0; })
180#endif
181
182#endif /* !__ASSEMBLY__ */
183#endif /* _ASM_GDB_STUB_H */
diff --git a/include/asm-mn10300/hardirq.h b/include/asm-mn10300/hardirq.h
deleted file mode 100644
index 54d950117674..000000000000
--- a/include/asm-mn10300/hardirq.h
+++ /dev/null
@@ -1,48 +0,0 @@
1/* MN10300 Hardware IRQ statistics and management
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 * Modified by David Howells (dhowells@redhat.com)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12#ifndef _ASM_HARDIRQ_H
13#define _ASM_HARDIRQ_H
14
15#include <linux/threads.h>
16#include <linux/irq.h>
17#include <asm/exceptions.h>
18
19/* assembly code in softirq.h is sensitive to the offsets of these fields */
20typedef struct {
21 unsigned int __softirq_pending;
22 unsigned long idle_timestamp;
23 unsigned int __nmi_count; /* arch dependent */
24 unsigned int __irq_count; /* arch dependent */
25} ____cacheline_aligned irq_cpustat_t;
26
27#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
28
29extern void ack_bad_irq(int irq);
30
31/*
32 * manipulate stubs in the MN10300 CPU Trap/Interrupt Vector table
33 * - these should jump to __common_exception in entry.S unless there's a good
34 * reason to do otherwise (see trap_preinit() in traps.c)
35 */
36typedef void (*intr_stub_fnx)(struct pt_regs *regs,
37 enum exception_code intcode);
38
39/*
40 * manipulate pointers in the Exception table (see entry.S)
41 * - these are indexed by decoding the lower 24 bits of the TBR register
42 * - note that the MN103E010 doesn't always trap through the correct vector,
43 * but does always set the TBR correctly
44 */
45extern asmlinkage void set_excp_vector(enum exception_code code,
46 intr_stub_fnx handler);
47
48#endif /* _ASM_HARDIRQ_H */
diff --git a/include/asm-mn10300/highmem.h b/include/asm-mn10300/highmem.h
deleted file mode 100644
index 90f2abb04bfd..000000000000
--- a/include/asm-mn10300/highmem.h
+++ /dev/null
@@ -1,116 +0,0 @@
1/* MN10300 Virtual kernel memory mappings for high memory
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 * - Derived from include/asm-i386/highmem.h
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12#ifndef _ASM_HIGHMEM_H
13#define _ASM_HIGHMEM_H
14
15#ifdef __KERNEL__
16
17#include <linux/init.h>
18#include <linux/interrupt.h>
19#include <linux/highmem.h>
20#include <asm/kmap_types.h>
21#include <asm/pgtable.h>
22
23/* undef for production */
24#undef HIGHMEM_DEBUG
25
26/* declarations for highmem.c */
27extern unsigned long highstart_pfn, highend_pfn;
28
29extern pte_t *kmap_pte;
30extern pgprot_t kmap_prot;
31extern pte_t *pkmap_page_table;
32
33extern void __init kmap_init(void);
34
35/*
36 * Right now we initialize only a single pte table. It can be extended
37 * easily, subsequent pte tables have to be allocated in one physical
38 * chunk of RAM.
39 */
40#define PKMAP_BASE 0xfe000000UL
41#define LAST_PKMAP 1024
42#define LAST_PKMAP_MASK (LAST_PKMAP - 1)
43#define PKMAP_NR(virt) ((virt - PKMAP_BASE) >> PAGE_SHIFT)
44#define PKMAP_ADDR(nr) (PKMAP_BASE + ((nr) << PAGE_SHIFT))
45
46extern unsigned long kmap_high(struct page *page);
47extern void kunmap_high(struct page *page);
48
49static inline unsigned long kmap(struct page *page)
50{
51 if (in_interrupt())
52 BUG();
53 if (page < highmem_start_page)
54 return page_address(page);
55 return kmap_high(page);
56}
57
58static inline void kunmap(struct page *page)
59{
60 if (in_interrupt())
61 BUG();
62 if (page < highmem_start_page)
63 return;
64 kunmap_high(page);
65}
66
67/*
68 * The use of kmap_atomic/kunmap_atomic is discouraged - kmap/kunmap
69 * gives a more generic (and caching) interface. But kmap_atomic can
70 * be used in IRQ contexts, so in some (very limited) cases we need
71 * it.
72 */
73static inline unsigned long kmap_atomic(struct page *page, enum km_type type)
74{
75 enum fixed_addresses idx;
76 unsigned long vaddr;
77
78 if (page < highmem_start_page)
79 return page_address(page);
80
81 debug_kmap_atomic(type);
82 idx = type + KM_TYPE_NR * smp_processor_id();
83 vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx);
84#if HIGHMEM_DEBUG
85 if (!pte_none(*(kmap_pte - idx)))
86 BUG();
87#endif
88 set_pte(kmap_pte - idx, mk_pte(page, kmap_prot));
89 __flush_tlb_one(vaddr);
90
91 return vaddr;
92}
93
94static inline void kunmap_atomic(unsigned long vaddr, enum km_type type)
95{
96#if HIGHMEM_DEBUG
97 enum fixed_addresses idx = type + KM_TYPE_NR * smp_processor_id();
98
99 if (vaddr < FIXADDR_START) /* FIXME */
100 return;
101
102 if (vaddr != __fix_to_virt(FIX_KMAP_BEGIN + idx))
103 BUG();
104
105 /*
106 * force other mappings to Oops if they'll try to access
107 * this pte without first remap it
108 */
109 pte_clear(kmap_pte - idx);
110 __flush_tlb_one(vaddr);
111#endif
112}
113
114#endif /* __KERNEL__ */
115
116#endif /* _ASM_HIGHMEM_H */
diff --git a/include/asm-mn10300/hw_irq.h b/include/asm-mn10300/hw_irq.h
deleted file mode 100644
index 70619901098e..000000000000
--- a/include/asm-mn10300/hw_irq.h
+++ /dev/null
@@ -1,14 +0,0 @@
1/* MN10300 Hardware interrupt definitions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_HW_IRQ_H
12#define _ASM_HW_IRQ_H
13
14#endif /* _ASM_HW_IRQ_H */
diff --git a/include/asm-mn10300/intctl-regs.h b/include/asm-mn10300/intctl-regs.h
deleted file mode 100644
index ba544c796c5a..000000000000
--- a/include/asm-mn10300/intctl-regs.h
+++ /dev/null
@@ -1,73 +0,0 @@
1/* MN10300 On-board interrupt controller registers
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_INTCTL_REGS_H
12#define _ASM_INTCTL_REGS_H
13
14#include <asm/cpu-regs.h>
15
16#ifdef __KERNEL__
17
18/* interrupt controller registers */
19#define GxICR(X) __SYSREG(0xd4000000 + (X) * 4, u16) /* group irq ctrl regs */
20
21#define IAGR __SYSREG(0xd4000100, u16) /* intr acceptance group reg */
22#define IAGR_GN 0x00fc /* group number register
23 * (documentation _has_ to be wrong)
24 */
25
26#define EXTMD __SYSREG(0xd4000200, u16) /* external pin intr spec reg */
27#define GET_XIRQ_TRIGGER(X) ((EXTMD >> ((X) * 2)) & 3)
28
29#define SET_XIRQ_TRIGGER(X,Y) \
30do { \
31 u16 x = EXTMD; \
32 x &= ~(3 << ((X) * 2)); \
33 x |= ((Y) & 3) << ((X) * 2); \
34 EXTMD = x; \
35} while (0)
36
37#define XIRQ_TRIGGER_LOWLEVEL 0
38#define XIRQ_TRIGGER_HILEVEL 1
39#define XIRQ_TRIGGER_NEGEDGE 2
40#define XIRQ_TRIGGER_POSEDGE 3
41
42/* non-maskable interrupt control */
43#define NMIIRQ 0
44#define NMICR GxICR(NMIIRQ) /* NMI control register */
45#define NMICR_NMIF 0x0001 /* NMI pin interrupt flag */
46#define NMICR_WDIF 0x0002 /* watchdog timer overflow flag */
47#define NMICR_ABUSERR 0x0008 /* async bus error flag */
48
49/* maskable interrupt control */
50#define GxICR_DETECT 0x0001 /* interrupt detect flag */
51#define GxICR_REQUEST 0x0010 /* interrupt request flag */
52#define GxICR_ENABLE 0x0100 /* interrupt enable flag */
53#define GxICR_LEVEL 0x7000 /* interrupt priority level */
54#define GxICR_LEVEL_0 0x0000 /* - level 0 */
55#define GxICR_LEVEL_1 0x1000 /* - level 1 */
56#define GxICR_LEVEL_2 0x2000 /* - level 2 */
57#define GxICR_LEVEL_3 0x3000 /* - level 3 */
58#define GxICR_LEVEL_4 0x4000 /* - level 4 */
59#define GxICR_LEVEL_5 0x5000 /* - level 5 */
60#define GxICR_LEVEL_6 0x6000 /* - level 6 */
61#define GxICR_LEVEL_SHIFT 12
62
63#ifndef __ASSEMBLY__
64extern void set_intr_level(int irq, u16 level);
65extern void set_intr_postackable(int irq);
66#endif
67
68/* external interrupts */
69#define XIRQxICR(X) GxICR((X)) /* external interrupt control regs */
70
71#endif /* __KERNEL__ */
72
73#endif /* _ASM_INTCTL_REGS_H */
diff --git a/include/asm-mn10300/io.h b/include/asm-mn10300/io.h
deleted file mode 100644
index c1a4119e6497..000000000000
--- a/include/asm-mn10300/io.h
+++ /dev/null
@@ -1,301 +0,0 @@
1/* MN10300 I/O port emulation and memory-mapped I/O
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_IO_H
12#define _ASM_IO_H
13
14#include <asm/page.h> /* I/O is all done through memory accesses */
15#include <asm/cpu-regs.h>
16#include <asm/cacheflush.h>
17
18#define mmiowb() do {} while (0)
19
20/*****************************************************************************/
21/*
22 * readX/writeX() are used to access memory mapped devices. On some
23 * architectures the memory mapped IO stuff needs to be accessed
24 * differently. On the x86 architecture, we just read/write the
25 * memory location directly.
26 */
27static inline u8 readb(const volatile void __iomem *addr)
28{
29 return *(const volatile u8 *) addr;
30}
31
32static inline u16 readw(const volatile void __iomem *addr)
33{
34 return *(const volatile u16 *) addr;
35}
36
37static inline u32 readl(const volatile void __iomem *addr)
38{
39 return *(const volatile u32 *) addr;
40}
41
42#define __raw_readb readb
43#define __raw_readw readw
44#define __raw_readl readl
45
46#define readb_relaxed readb
47#define readw_relaxed readw
48#define readl_relaxed readl
49
50static inline void writeb(u8 b, volatile void __iomem *addr)
51{
52 *(volatile u8 *) addr = b;
53}
54
55static inline void writew(u16 b, volatile void __iomem *addr)
56{
57 *(volatile u16 *) addr = b;
58}
59
60static inline void writel(u32 b, volatile void __iomem *addr)
61{
62 *(volatile u32 *) addr = b;
63}
64
65#define __raw_writeb writeb
66#define __raw_writew writew
67#define __raw_writel writel
68
69/*****************************************************************************/
70/*
71 * traditional input/output functions
72 */
73static inline u8 inb_local(unsigned long addr)
74{
75 return readb((volatile void __iomem *) addr);
76}
77
78static inline void outb_local(u8 b, unsigned long addr)
79{
80 return writeb(b, (volatile void __iomem *) addr);
81}
82
83static inline u8 inb(unsigned long addr)
84{
85 return readb((volatile void __iomem *) addr);
86}
87
88static inline u16 inw(unsigned long addr)
89{
90 return readw((volatile void __iomem *) addr);
91}
92
93static inline u32 inl(unsigned long addr)
94{
95 return readl((volatile void __iomem *) addr);
96}
97
98static inline void outb(u8 b, unsigned long addr)
99{
100 return writeb(b, (volatile void __iomem *) addr);
101}
102
103static inline void outw(u16 b, unsigned long addr)
104{
105 return writew(b, (volatile void __iomem *) addr);
106}
107
108static inline void outl(u32 b, unsigned long addr)
109{
110 return writel(b, (volatile void __iomem *) addr);
111}
112
113#define inb_p(addr) inb(addr)
114#define inw_p(addr) inw(addr)
115#define inl_p(addr) inl(addr)
116#define outb_p(x, addr) outb((x), (addr))
117#define outw_p(x, addr) outw((x), (addr))
118#define outl_p(x, addr) outl((x), (addr))
119
120static inline void insb(unsigned long addr, void *buffer, int count)
121{
122 if (count) {
123 u8 *buf = buffer;
124 do {
125 u8 x = inb(addr);
126 *buf++ = x;
127 } while (--count);
128 }
129}
130
131static inline void insw(unsigned long addr, void *buffer, int count)
132{
133 if (count) {
134 u16 *buf = buffer;
135 do {
136 u16 x = inw(addr);
137 *buf++ = x;
138 } while (--count);
139 }
140}
141
142static inline void insl(unsigned long addr, void *buffer, int count)
143{
144 if (count) {
145 u32 *buf = buffer;
146 do {
147 u32 x = inl(addr);
148 *buf++ = x;
149 } while (--count);
150 }
151}
152
153static inline void outsb(unsigned long addr, const void *buffer, int count)
154{
155 if (count) {
156 const u8 *buf = buffer;
157 do {
158 outb(*buf++, addr);
159 } while (--count);
160 }
161}
162
163static inline void outsw(unsigned long addr, const void *buffer, int count)
164{
165 if (count) {
166 const u16 *buf = buffer;
167 do {
168 outw(*buf++, addr);
169 } while (--count);
170 }
171}
172
173extern void __outsl(unsigned long addr, const void *buffer, int count);
174static inline void outsl(unsigned long addr, const void *buffer, int count)
175{
176 if ((unsigned long) buffer & 0x3)
177 return __outsl(addr, buffer, count);
178
179 if (count) {
180 const u32 *buf = buffer;
181 do {
182 outl(*buf++, addr);
183 } while (--count);
184 }
185}
186
187#define ioread8(addr) readb(addr)
188#define ioread16(addr) readw(addr)
189#define ioread32(addr) readl(addr)
190
191#define iowrite8(v, addr) writeb((v), (addr))
192#define iowrite16(v, addr) writew((v), (addr))
193#define iowrite32(v, addr) writel((v), (addr))
194
195#define ioread8_rep(p, dst, count) \
196 insb((unsigned long) (p), (dst), (count))
197#define ioread16_rep(p, dst, count) \
198 insw((unsigned long) (p), (dst), (count))
199#define ioread32_rep(p, dst, count) \
200 insl((unsigned long) (p), (dst), (count))
201
202#define iowrite8_rep(p, src, count) \
203 outsb((unsigned long) (p), (src), (count))
204#define iowrite16_rep(p, src, count) \
205 outsw((unsigned long) (p), (src), (count))
206#define iowrite32_rep(p, src, count) \
207 outsl((unsigned long) (p), (src), (count))
208
209
210#define IO_SPACE_LIMIT 0xffffffff
211
212#ifdef __KERNEL__
213
214#include <linux/vmalloc.h>
215#define __io_virt(x) ((void *) (x))
216
217/* Create a virtual mapping cookie for a PCI BAR (memory or IO) */
218struct pci_dev;
219extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max);
220static inline void pci_iounmap(struct pci_dev *dev, void __iomem *p)
221{
222}
223
224/*
225 * Change virtual addresses to physical addresses and vv.
226 * These are pretty trivial
227 */
228static inline unsigned long virt_to_phys(volatile void *address)
229{
230 return __pa(address);
231}
232
233static inline void *phys_to_virt(unsigned long address)
234{
235 return __va(address);
236}
237
238/*
239 * Change "struct page" to physical address.
240 */
241static inline void *__ioremap(unsigned long offset, unsigned long size,
242 unsigned long flags)
243{
244 return (void *) offset;
245}
246
247static inline void *ioremap(unsigned long offset, unsigned long size)
248{
249 return (void *) offset;
250}
251
252/*
253 * This one maps high address device memory and turns off caching for that
254 * area. it's useful if some control registers are in such an area and write
255 * combining or read caching is not desirable:
256 */
257static inline void *ioremap_nocache(unsigned long offset, unsigned long size)
258{
259 return (void *) (offset | 0x20000000);
260}
261
262#define ioremap_wc ioremap_nocache
263
264static inline void iounmap(void *addr)
265{
266}
267
268static inline void __iomem *ioport_map(unsigned long port, unsigned int nr)
269{
270 return (void __iomem *) port;
271}
272
273static inline void ioport_unmap(void __iomem *p)
274{
275}
276
277#define xlate_dev_kmem_ptr(p) ((void *) (p))
278#define xlate_dev_mem_ptr(p) ((void *) (p))
279
280/*
281 * PCI bus iomem addresses must be in the region 0x80000000-0x9fffffff
282 */
283static inline unsigned long virt_to_bus(volatile void *address)
284{
285 return ((unsigned long) address) & ~0x20000000;
286}
287
288static inline void *bus_to_virt(unsigned long address)
289{
290 return (void *) address;
291}
292
293#define page_to_bus page_to_phys
294
295#define memset_io(a, b, c) memset(__io_virt(a), (b), (c))
296#define memcpy_fromio(a, b, c) memcpy((a), __io_virt(b), (c))
297#define memcpy_toio(a, b, c) memcpy(__io_virt(a), (b), (c))
298
299#endif /* __KERNEL__ */
300
301#endif /* _ASM_IO_H */
diff --git a/include/asm-mn10300/ioctl.h b/include/asm-mn10300/ioctl.h
deleted file mode 100644
index b279fe06dfe5..000000000000
--- a/include/asm-mn10300/ioctl.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/ioctl.h>
diff --git a/include/asm-mn10300/ioctls.h b/include/asm-mn10300/ioctls.h
deleted file mode 100644
index dcbfb452974f..000000000000
--- a/include/asm-mn10300/ioctls.h
+++ /dev/null
@@ -1,88 +0,0 @@
1#ifndef _ASM_IOCTLS_H
2#define _ASM_IOCTLS_H
3
4#include <asm/ioctl.h>
5
6/* 0x54 is just a magic number to make these relatively unique ('T') */
7
8#define TCGETS 0x5401
9#define TCSETS 0x5402
10#define TCSETSW 0x5403
11#define TCSETSF 0x5404
12#define TCGETA 0x5405
13#define TCSETA 0x5406
14#define TCSETAW 0x5407
15#define TCSETAF 0x5408
16#define TCSBRK 0x5409
17#define TCXONC 0x540A
18#define TCFLSH 0x540B
19#define TIOCEXCL 0x540C
20#define TIOCNXCL 0x540D
21#define TIOCSCTTY 0x540E
22#define TIOCGPGRP 0x540F
23#define TIOCSPGRP 0x5410
24#define TIOCOUTQ 0x5411
25#define TIOCSTI 0x5412
26#define TIOCGWINSZ 0x5413
27#define TIOCSWINSZ 0x5414
28#define TIOCMGET 0x5415
29#define TIOCMBIS 0x5416
30#define TIOCMBIC 0x5417
31#define TIOCMSET 0x5418
32#define TIOCGSOFTCAR 0x5419
33#define TIOCSSOFTCAR 0x541A
34#define FIONREAD 0x541B
35#define TIOCINQ FIONREAD
36#define TIOCLINUX 0x541C
37#define TIOCCONS 0x541D
38#define TIOCGSERIAL 0x541E
39#define TIOCSSERIAL 0x541F
40#define TIOCPKT 0x5420
41#define FIONBIO 0x5421
42#define TIOCNOTTY 0x5422
43#define TIOCSETD 0x5423
44#define TIOCGETD 0x5424
45#define TCSBRKP 0x5425 /* Needed for POSIX tcsendbreak() */
46/* #define TIOCTTYGSTRUCT 0x5426 - Former debugging-only ioctl */
47#define TIOCSBRK 0x5427 /* BSD compatibility */
48#define TIOCCBRK 0x5428 /* BSD compatibility */
49#define TIOCGSID 0x5429 /* Return the session ID of FD */
50#define TCGETS2 _IOR('T', 0x2A, struct termios2)
51#define TCSETS2 _IOW('T', 0x2B, struct termios2)
52#define TCSETSW2 _IOW('T', 0x2C, struct termios2)
53#define TCSETSF2 _IOW('T', 0x2D, struct termios2)
54#define TIOCGPTN _IOR('T', 0x30, unsigned int) /* Get Pty Number
55 * (of pty-mux device) */
56#define TIOCSPTLCK _IOW('T', 0x31, int) /* Lock/unlock Pty */
57
58#define FIONCLEX 0x5450
59#define FIOCLEX 0x5451
60#define FIOASYNC 0x5452
61#define TIOCSERCONFIG 0x5453
62#define TIOCSERGWILD 0x5454
63#define TIOCSERSWILD 0x5455
64#define TIOCGLCKTRMIOS 0x5456
65#define TIOCSLCKTRMIOS 0x5457
66#define TIOCSERGSTRUCT 0x5458 /* For debugging only */
67#define TIOCSERGETLSR 0x5459 /* Get line status register */
68#define TIOCSERGETMULTI 0x545A /* Get multiport config */
69#define TIOCSERSETMULTI 0x545B /* Set multiport config */
70
71#define TIOCMIWAIT 0x545C /* wait for a change on serial input line(s) */
72#define TIOCGICOUNT 0x545D /* read serial port inline interrupt counts */
73#define TIOCGHAYESESP 0x545E /* Get Hayes ESP configuration */
74#define TIOCSHAYESESP 0x545F /* Set Hayes ESP configuration */
75#define FIOQSIZE 0x5460
76
77/* Used for packet mode */
78#define TIOCPKT_DATA 0
79#define TIOCPKT_FLUSHREAD 1
80#define TIOCPKT_FLUSHWRITE 2
81#define TIOCPKT_STOP 4
82#define TIOCPKT_START 8
83#define TIOCPKT_NOSTOP 16
84#define TIOCPKT_DOSTOP 32
85
86#define TIOCSER_TEMT 0x01 /* Transmitter physically empty */
87
88#endif /* _ASM_IOCTLS_H */
diff --git a/include/asm-mn10300/ipc.h b/include/asm-mn10300/ipc.h
deleted file mode 100644
index a46e3d9c2a3f..000000000000
--- a/include/asm-mn10300/ipc.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/ipc.h>
diff --git a/include/asm-mn10300/ipcbuf.h b/include/asm-mn10300/ipcbuf.h
deleted file mode 100644
index f6f63d448272..000000000000
--- a/include/asm-mn10300/ipcbuf.h
+++ /dev/null
@@ -1,29 +0,0 @@
1#ifndef _ASM_IPCBUF_H
2#define _ASM_IPCBUF_H
3
4/*
5 * The ipc64_perm structure for MN10300 architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 32-bit mode_t and seq
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct ipc64_perm
15{
16 __kernel_key_t key;
17 __kernel_uid32_t uid;
18 __kernel_gid32_t gid;
19 __kernel_uid32_t cuid;
20 __kernel_gid32_t cgid;
21 __kernel_mode_t mode;
22 unsigned short __pad1;
23 unsigned short seq;
24 unsigned short __pad2;
25 unsigned long __unused1;
26 unsigned long __unused2;
27};
28
29#endif /* _ASM_IPCBUF_H */
diff --git a/include/asm-mn10300/irq.h b/include/asm-mn10300/irq.h
deleted file mode 100644
index 53b380116901..000000000000
--- a/include/asm-mn10300/irq.h
+++ /dev/null
@@ -1,32 +0,0 @@
1/* MN10300 Hardware interrupt definitions
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 * Modified by David Howells (dhowells@redhat.com)
6 * - Derived from include/asm-i386/irq.h:
7 * - (C) 1992, 1993 Linus Torvalds, (C) 1997 Ingo Molnar
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public Licence
11 * as published by the Free Software Foundation; either version
12 * 2 of the Licence, or (at your option) any later version.
13 */
14#ifndef _ASM_IRQ_H
15#define _ASM_IRQ_H
16
17#include <asm/intctl-regs.h>
18#include <asm/reset-regs.h>
19#include <asm/proc/irq.h>
20
21/* this number is used when no interrupt has been assigned */
22#define NO_IRQ INT_MAX
23
24/* hardware irq numbers */
25#define NR_IRQS GxICR_NUM_IRQS
26
27/* external hardware irq numbers */
28#define NR_XIRQS GxICR_NUM_XIRQS
29
30#define irq_canonicalize(IRQ) (IRQ)
31
32#endif /* _ASM_IRQ_H */
diff --git a/include/asm-mn10300/irq_regs.h b/include/asm-mn10300/irq_regs.h
deleted file mode 100644
index a848cd232eb4..000000000000
--- a/include/asm-mn10300/irq_regs.h
+++ /dev/null
@@ -1,24 +0,0 @@
1/* MN10300 IRQ registers pointer definition
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_IRQ_REGS_H
12#define _ASM_IRQ_REGS_H
13
14/*
15 * Per-cpu current frame pointer - the location of the last exception frame on
16 * the stack
17 */
18#define ARCH_HAS_OWN_IRQ_REGS
19
20#ifndef __ASSEMBLY__
21#define get_irq_regs() (__frame)
22#endif
23
24#endif /* _ASM_IRQ_REGS_H */
diff --git a/include/asm-mn10300/kdebug.h b/include/asm-mn10300/kdebug.h
deleted file mode 100644
index 0f47e112190c..000000000000
--- a/include/asm-mn10300/kdebug.h
+++ /dev/null
@@ -1,22 +0,0 @@
1/* MN10300 In-kernel death knells
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_KDEBUG_H
13#define _ASM_KDEBUG_H
14
15/* Grossly misnamed. */
16enum die_val {
17 DIE_OOPS = 1,
18 DIE_BREAKPOINT,
19 DIE_GPF,
20};
21
22#endif /* _ASM_KDEBUG_H */
diff --git a/include/asm-mn10300/kmap_types.h b/include/asm-mn10300/kmap_types.h
deleted file mode 100644
index 3398f9f35603..000000000000
--- a/include/asm-mn10300/kmap_types.h
+++ /dev/null
@@ -1,31 +0,0 @@
1/* MN10300 kmap_atomic() slot IDs
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_KMAP_TYPES_H
12#define _ASM_KMAP_TYPES_H
13
14enum km_type {
15 KM_BOUNCE_READ,
16 KM_SKB_SUNRPC_DATA,
17 KM_SKB_DATA_SOFTIRQ,
18 KM_USER0,
19 KM_USER1,
20 KM_BIO_SRC_IRQ,
21 KM_BIO_DST_IRQ,
22 KM_PTE0,
23 KM_PTE1,
24 KM_IRQ0,
25 KM_IRQ1,
26 KM_SOFTIRQ0,
27 KM_SOFTIRQ1,
28 KM_TYPE_NR
29};
30
31#endif /* _ASM_KMAP_TYPES_H */
diff --git a/include/asm-mn10300/kprobes.h b/include/asm-mn10300/kprobes.h
deleted file mode 100644
index c800b590183a..000000000000
--- a/include/asm-mn10300/kprobes.h
+++ /dev/null
@@ -1,50 +0,0 @@
1/* MN10300 Kernel Probes support
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by Mark Salter (msalter@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public Licence as published by
8 * the Free Software Foundation; either version 2 of the Licence, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public Licence for more details.
15 *
16 * You should have received a copy of the GNU General Public Licence
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 *
20 */
21#ifndef _ASM_KPROBES_H
22#define _ASM_KPROBES_H
23
24#include <linux/types.h>
25#include <linux/ptrace.h>
26
27struct kprobe;
28
29typedef unsigned char kprobe_opcode_t;
30#define BREAKPOINT_INSTRUCTION 0xff
31#define MAX_INSN_SIZE 8
32#define MAX_STACK_SIZE 128
33
34/* Architecture specific copy of original instruction */
35struct arch_specific_insn {
36 /* copy of original instruction
37 */
38 kprobe_opcode_t insn[MAX_INSN_SIZE];
39};
40
41extern const int kretprobe_blacklist_size;
42
43extern int kprobe_exceptions_notify(struct notifier_block *self,
44 unsigned long val, void *data);
45
46#define flush_insn_slot(p) do {} while (0)
47
48extern void arch_remove_kprobe(struct kprobe *p);
49
50#endif /* _ASM_KPROBES_H */
diff --git a/include/asm-mn10300/linkage.h b/include/asm-mn10300/linkage.h
deleted file mode 100644
index dda3002a5dfa..000000000000
--- a/include/asm-mn10300/linkage.h
+++ /dev/null
@@ -1,20 +0,0 @@
1/* MN10300 Linkage and calling-convention overrides
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_LINKAGE_H
12#define _ASM_LINKAGE_H
13
14/* don't override anything */
15#define asmlinkage
16
17#define __ALIGN .align 4,0xcb
18#define __ALIGN_STR ".align 4,0xcb"
19
20#endif
diff --git a/include/asm-mn10300/local.h b/include/asm-mn10300/local.h
deleted file mode 100644
index c11c530f74d0..000000000000
--- a/include/asm-mn10300/local.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/local.h>
diff --git a/include/asm-mn10300/mc146818rtc.h b/include/asm-mn10300/mc146818rtc.h
deleted file mode 100644
index df6bc6e0e8c6..000000000000
--- a/include/asm-mn10300/mc146818rtc.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm/rtc-regs.h>
diff --git a/include/asm-mn10300/mman.h b/include/asm-mn10300/mman.h
deleted file mode 100644
index b7986b65addf..000000000000
--- a/include/asm-mn10300/mman.h
+++ /dev/null
@@ -1,28 +0,0 @@
1/* MN10300 Constants for mmap and co.
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 * - Derived from asm-x86/mman.h
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12#ifndef _ASM_MMAN_H
13#define _ASM_MMAN_H
14
15#include <asm-generic/mman.h>
16
17#define MAP_GROWSDOWN 0x0100 /* stack-like segment */
18#define MAP_DENYWRITE 0x0800 /* ETXTBSY */
19#define MAP_EXECUTABLE 0x1000 /* mark it as an executable */
20#define MAP_LOCKED 0x2000 /* pages are locked */
21#define MAP_NORESERVE 0x4000 /* don't check for reservations */
22#define MAP_POPULATE 0x8000 /* populate (prefault) pagetables */
23#define MAP_NONBLOCK 0x10000 /* do not block on IO */
24
25#define MCL_CURRENT 1 /* lock all current mappings */
26#define MCL_FUTURE 2 /* lock all future mappings */
27
28#endif /* _ASM_MMAN_H */
diff --git a/include/asm-mn10300/mmu.h b/include/asm-mn10300/mmu.h
deleted file mode 100644
index 2d2d097e7309..000000000000
--- a/include/asm-mn10300/mmu.h
+++ /dev/null
@@ -1,19 +0,0 @@
1/* MN10300 Memory management context
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 * - Derived from include/asm-frv/mmu.h
6 */
7
8#ifndef _ASM_MMU_H
9#define _ASM_MMU_H
10
11/*
12 * MMU context
13 */
14typedef struct {
15 unsigned long tlbpid[NR_CPUS]; /* TLB PID for this process on
16 * each CPU */
17} mm_context_t;
18
19#endif /* _ASM_MMU_H */
diff --git a/include/asm-mn10300/mmu_context.h b/include/asm-mn10300/mmu_context.h
deleted file mode 100644
index a9e2e34f69b0..000000000000
--- a/include/asm-mn10300/mmu_context.h
+++ /dev/null
@@ -1,138 +0,0 @@
1/* MN10300 MMU context management
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Modified by David Howells (dhowells@redhat.com)
5 * - Derived from include/asm-m32r/mmu_context.h
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 *
12 *
13 * This implements an algorithm to provide TLB PID mappings to provide
14 * selective access to the TLB for processes, thus reducing the number of TLB
15 * flushes required.
16 *
17 * Note, however, that the M32R algorithm is technically broken as it does not
18 * handle version wrap-around, and could, theoretically, have a problem with a
19 * very long lived program that sleeps long enough for the version number to
20 * wrap all the way around so that its TLB mappings appear valid once again.
21 */
22#ifndef _ASM_MMU_CONTEXT_H
23#define _ASM_MMU_CONTEXT_H
24
25#include <asm/atomic.h>
26#include <asm/pgalloc.h>
27#include <asm/tlbflush.h>
28#include <asm-generic/mm_hooks.h>
29
30#define MMU_CONTEXT_TLBPID_MASK 0x000000ffUL
31#define MMU_CONTEXT_VERSION_MASK 0xffffff00UL
32#define MMU_CONTEXT_FIRST_VERSION 0x00000100UL
33#define MMU_NO_CONTEXT 0x00000000UL
34
35extern unsigned long mmu_context_cache[NR_CPUS];
36#define mm_context(mm) (mm->context.tlbpid[smp_processor_id()])
37
38#define enter_lazy_tlb(mm, tsk) do {} while (0)
39
40#ifdef CONFIG_SMP
41#define cpu_ran_vm(cpu, task) \
42 cpu_set((cpu), (task)->cpu_vm_mask)
43#define cpu_maybe_ran_vm(cpu, task) \
44 cpu_test_and_set((cpu), (task)->cpu_vm_mask)
45#else
46#define cpu_ran_vm(cpu, task) do {} while (0)
47#define cpu_maybe_ran_vm(cpu, task) true
48#endif /* CONFIG_SMP */
49
50/*
51 * allocate an MMU context
52 */
53static inline unsigned long allocate_mmu_context(struct mm_struct *mm)
54{
55 unsigned long *pmc = &mmu_context_cache[smp_processor_id()];
56 unsigned long mc = ++(*pmc);
57
58 if (!(mc & MMU_CONTEXT_TLBPID_MASK)) {
59 /* we exhausted the TLB PIDs of this version on this CPU, so we
60 * flush this CPU's TLB in its entirety and start new cycle */
61 flush_tlb_all();
62
63 /* fix the TLB version if needed (we avoid version #0 so as to
64 * distingush MMU_NO_CONTEXT) */
65 if (!mc)
66 *pmc = mc = MMU_CONTEXT_FIRST_VERSION;
67 }
68 mm_context(mm) = mc;
69 return mc;
70}
71
72/*
73 * get an MMU context if one is needed
74 */
75static inline unsigned long get_mmu_context(struct mm_struct *mm)
76{
77 unsigned long mc = MMU_NO_CONTEXT, cache;
78
79 if (mm) {
80 cache = mmu_context_cache[smp_processor_id()];
81 mc = mm_context(mm);
82
83 /* if we have an old version of the context, replace it */
84 if ((mc ^ cache) & MMU_CONTEXT_VERSION_MASK)
85 mc = allocate_mmu_context(mm);
86 }
87 return mc;
88}
89
90/*
91 * initialise the context related info for a new mm_struct instance
92 */
93static inline int init_new_context(struct task_struct *tsk,
94 struct mm_struct *mm)
95{
96 int num_cpus = NR_CPUS, i;
97
98 for (i = 0; i < num_cpus; i++)
99 mm->context.tlbpid[i] = MMU_NO_CONTEXT;
100 return 0;
101}
102
103/*
104 * destroy context related info for an mm_struct that is about to be put to
105 * rest
106 */
107#define destroy_context(mm) do { } while (0)
108
109/*
110 * after we have set current->mm to a new value, this activates the context for
111 * the new mm so we see the new mappings.
112 */
113static inline void activate_context(struct mm_struct *mm, int cpu)
114{
115 PIDR = get_mmu_context(mm) & MMU_CONTEXT_TLBPID_MASK;
116}
117
118/*
119 * change between virtual memory sets
120 */
121static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
122 struct task_struct *tsk)
123{
124 int cpu = smp_processor_id();
125
126 if (prev != next) {
127 cpu_ran_vm(cpu, next);
128 activate_context(next, cpu);
129 PTBR = (unsigned long) next->pgd;
130 } else if (!cpu_maybe_ran_vm(cpu, next)) {
131 activate_context(next, cpu);
132 }
133}
134
135#define deactivate_mm(tsk, mm) do {} while (0)
136#define activate_mm(prev, next) switch_mm((prev), (next), NULL)
137
138#endif /* _ASM_MMU_CONTEXT_H */
diff --git a/include/asm-mn10300/module.h b/include/asm-mn10300/module.h
deleted file mode 100644
index 5d7057d01494..000000000000
--- a/include/asm-mn10300/module.h
+++ /dev/null
@@ -1,27 +0,0 @@
1/* MN10300 Arch-specific module definitions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by Mark Salter (msalter@redhat.com)
5 * Derived from include/asm-i386/module.h
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12#ifndef _ASM_MODULE_H
13#define _ASM_MODULE_H
14
15struct mod_arch_specific {
16};
17
18#define Elf_Shdr Elf32_Shdr
19#define Elf_Sym Elf32_Sym
20#define Elf_Ehdr Elf32_Ehdr
21
22/*
23 * Include the MN10300 architecture version.
24 */
25#define MODULE_ARCH_VERMAGIC __stringify(PROCESSOR_MODEL_NAME) " "
26
27#endif /* _ASM_MODULE_H */
diff --git a/include/asm-mn10300/msgbuf.h b/include/asm-mn10300/msgbuf.h
deleted file mode 100644
index 8b602450cc4a..000000000000
--- a/include/asm-mn10300/msgbuf.h
+++ /dev/null
@@ -1,31 +0,0 @@
1#ifndef _ASM_MSGBUF_H
2#define _ASM_MSGBUF_H
3
4/*
5 * The msqid64_ds structure for MN10300 architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct msqid64_ds {
15 struct ipc64_perm msg_perm;
16 __kernel_time_t msg_stime; /* last msgsnd time */
17 unsigned long __unused1;
18 __kernel_time_t msg_rtime; /* last msgrcv time */
19 unsigned long __unused2;
20 __kernel_time_t msg_ctime; /* last change time */
21 unsigned long __unused3;
22 unsigned long msg_cbytes; /* current number of bytes on queue */
23 unsigned long msg_qnum; /* number of messages in queue */
24 unsigned long msg_qbytes; /* max number of bytes on queue */
25 __kernel_pid_t msg_lspid; /* pid of last msgsnd */
26 __kernel_pid_t msg_lrpid; /* last receive pid */
27 unsigned long __unused4;
28 unsigned long __unused5;
29};
30
31#endif /* _ASM_MSGBUF_H */
diff --git a/include/asm-mn10300/mutex.h b/include/asm-mn10300/mutex.h
deleted file mode 100644
index 84f5490c6fb4..000000000000
--- a/include/asm-mn10300/mutex.h
+++ /dev/null
@@ -1,16 +0,0 @@
1/* MN10300 Mutex fastpath
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 *
11 *
12 * TODO: implement optimized primitives instead, or leave the generic
13 * implementation in place, or pick the atomic_xchg() based generic
14 * implementation. (see asm-generic/mutex-xchg.h for details)
15 */
16#include <asm-generic/mutex-null.h>
diff --git a/include/asm-mn10300/nmi.h b/include/asm-mn10300/nmi.h
deleted file mode 100644
index f3671cbbc117..000000000000
--- a/include/asm-mn10300/nmi.h
+++ /dev/null
@@ -1,14 +0,0 @@
1/* MN10300 NMI handling
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_NMI_H
12#define _ASM_NMI_H
13
14#endif /* _ASM_NMI_H */
diff --git a/include/asm-mn10300/page.h b/include/asm-mn10300/page.h
deleted file mode 100644
index 8288e124165b..000000000000
--- a/include/asm-mn10300/page.h
+++ /dev/null
@@ -1,128 +0,0 @@
1/* MN10300 Page table definitions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_PAGE_H
12#define _ASM_PAGE_H
13
14/* PAGE_SHIFT determines the page size */
15#define PAGE_SHIFT 12
16
17#ifndef __ASSEMBLY__
18#define PAGE_SIZE (1UL << PAGE_SHIFT)
19#define PAGE_MASK (~(PAGE_SIZE - 1))
20#else
21#define PAGE_SIZE +(1 << PAGE_SHIFT) /* unary plus marks an
22 * immediate val not an addr */
23#define PAGE_MASK +(~(PAGE_SIZE - 1))
24#endif
25
26#ifdef __KERNEL__
27#ifndef __ASSEMBLY__
28
29#define clear_page(page) memset((void *)(page), 0, PAGE_SIZE)
30#define copy_page(to, from) memcpy((void *)(to), (void *)(from), PAGE_SIZE)
31
32#define clear_user_page(addr, vaddr, page) clear_page(addr)
33#define copy_user_page(vto, vfrom, vaddr, to) copy_page(vto, vfrom)
34
35/*
36 * These are used to make use of C type-checking..
37 */
38typedef struct { unsigned long pte; } pte_t;
39typedef struct { unsigned long pgd; } pgd_t;
40typedef struct { unsigned long pgprot; } pgprot_t;
41typedef struct page *pgtable_t;
42
43#define PTE_MASK PAGE_MASK
44#define HPAGE_SHIFT 22
45
46#ifdef CONFIG_HUGETLB_PAGE
47#define HPAGE_SIZE ((1UL) << HPAGE_SHIFT)
48#define HPAGE_MASK (~(HPAGE_SIZE - 1))
49#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT)
50#endif
51
52#define pte_val(x) ((x).pte)
53#define pgd_val(x) ((x).pgd)
54#define pgprot_val(x) ((x).pgprot)
55
56#define __pte(x) ((pte_t) { (x) })
57#define __pgd(x) ((pgd_t) { (x) })
58#define __pgprot(x) ((pgprot_t) { (x) })
59
60#include <asm-generic/pgtable-nopmd.h>
61
62#endif /* !__ASSEMBLY__ */
63
64/*
65 * This handles the memory map.. We could make this a config
66 * option, but too many people screw it up, and too few need
67 * it.
68 *
69 * A __PAGE_OFFSET of 0xC0000000 means that the kernel has
70 * a virtual address space of one gigabyte, which limits the
71 * amount of physical memory you can use to about 950MB.
72 */
73
74#ifndef __ASSEMBLY__
75
76/* Pure 2^n version of get_order */
77static inline int get_order(unsigned long size) __attribute__((const));
78static inline int get_order(unsigned long size)
79{
80 int order;
81
82 size = (size - 1) >> (PAGE_SHIFT - 1);
83 order = -1;
84 do {
85 size >>= 1;
86 order++;
87 } while (size);
88 return order;
89}
90
91#endif /* __ASSEMBLY__ */
92
93#include <asm/page_offset.h>
94
95#define __PAGE_OFFSET (PAGE_OFFSET_RAW)
96#define PAGE_OFFSET ((unsigned long) __PAGE_OFFSET)
97
98/*
99 * main RAM and kernel working space are coincident at 0x90000000, but to make
100 * life more interesting, there's also an uncached virtual shadow at 0xb0000000
101 * - these mappings are fixed in the MMU
102 */
103#define __pfn_disp (CONFIG_KERNEL_RAM_BASE_ADDRESS >> PAGE_SHIFT)
104
105#define __pa(x) ((unsigned long)(x))
106#define __va(x) ((void *)(unsigned long)(x))
107#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT)
108#define pfn_to_page(pfn) (mem_map + ((pfn) - __pfn_disp))
109#define page_to_pfn(page) ((unsigned long)((page) - mem_map) + __pfn_disp)
110
111#define pfn_valid(pfn) \
112({ \
113 unsigned long __pfn = (pfn) - __pfn_disp; \
114 __pfn < max_mapnr; \
115})
116
117#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
118#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
119#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT)
120
121#define VM_DATA_DEFAULT_FLAGS \
122 (VM_READ | VM_WRITE | \
123 ((current->personality & READ_IMPLIES_EXEC) ? VM_EXEC : 0) | \
124 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
125
126#endif /* __KERNEL__ */
127
128#endif /* _ASM_PAGE_H */
diff --git a/include/asm-mn10300/page_offset.h b/include/asm-mn10300/page_offset.h
deleted file mode 100644
index 8eb5b16ad86b..000000000000
--- a/include/asm-mn10300/page_offset.h
+++ /dev/null
@@ -1,11 +0,0 @@
1/* MN10300 Kernel base address
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 */
6#ifndef _ASM_PAGE_OFFSET_H
7#define _ASM_PAGE_OFFSET_H
8
9#define PAGE_OFFSET_RAW CONFIG_KERNEL_RAM_BASE_ADDRESS
10
11#endif
diff --git a/include/asm-mn10300/param.h b/include/asm-mn10300/param.h
deleted file mode 100644
index 789b1df41fcb..000000000000
--- a/include/asm-mn10300/param.h
+++ /dev/null
@@ -1,34 +0,0 @@
1/* MN10300 Kernel parameters
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_PARAM_H
12#define _ASM_PARAM_H
13
14#ifdef __KERNEL__
15#define HZ CONFIG_HZ /* Internal kernel timer frequency */
16#define USER_HZ 100 /* .. some user interfaces are in
17 * "ticks" */
18#define CLOCKS_PER_SEC (USER_HZ) /* like times() */
19#endif
20
21#ifndef HZ
22#define HZ 100
23#endif
24
25#define EXEC_PAGESIZE 4096
26
27#ifndef NOGROUP
28#define NOGROUP (-1)
29#endif
30
31#define MAXHOSTNAMELEN 64 /* max length of hostname */
32#define COMMAND_LINE_SIZE 256
33
34#endif /* _ASM_PARAM_H */
diff --git a/include/asm-mn10300/pci.h b/include/asm-mn10300/pci.h
deleted file mode 100644
index 0517b45313d8..000000000000
--- a/include/asm-mn10300/pci.h
+++ /dev/null
@@ -1,129 +0,0 @@
1/* MN10300 PCI definitions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_PCI_H
12#define _ASM_PCI_H
13
14#ifdef __KERNEL__
15#include <linux/mm.h> /* for struct page */
16
17#if 0
18#define __pcbdebug(FMT, ADDR, ...) \
19 printk(KERN_DEBUG "PCIBRIDGE[%08x]: "FMT"\n", \
20 (u32)(ADDR), ##__VA_ARGS__)
21
22#define __pcidebug(FMT, BUS, DEVFN, WHERE,...) \
23do { \
24 printk(KERN_DEBUG "PCI[%02x:%02x.%x + %02x]: "FMT"\n", \
25 (BUS)->number, \
26 PCI_SLOT(DEVFN), \
27 PCI_FUNC(DEVFN), \
28 (u32)(WHERE), ##__VA_ARGS__); \
29} while (0)
30
31#else
32#define __pcbdebug(FMT, ADDR, ...) do {} while (0)
33#define __pcidebug(FMT, BUS, DEVFN, WHERE, ...) do {} while (0)
34#endif
35
36/* Can be used to override the logic in pci_scan_bus for skipping
37 * already-configured bus numbers - to be used for buggy BIOSes or
38 * architectures with incomplete PCI setup by the loader */
39
40#ifdef CONFIG_PCI
41#define pcibios_assign_all_busses() 1
42extern void unit_pci_init(void);
43#else
44#define pcibios_assign_all_busses() 0
45#endif
46
47extern unsigned long pci_mem_start;
48#define PCIBIOS_MIN_IO 0xBE000004
49#define PCIBIOS_MIN_MEM 0xB8000000
50
51void pcibios_set_master(struct pci_dev *dev);
52void pcibios_penalize_isa_irq(int irq);
53
54/* Dynamic DMA mapping stuff.
55 * i386 has everything mapped statically.
56 */
57
58#include <linux/types.h>
59#include <linux/slab.h>
60#include <asm/scatterlist.h>
61#include <linux/string.h>
62#include <linux/mm.h>
63#include <asm/io.h>
64
65struct pci_dev;
66
67/* The PCI address space does equal the physical memory
68 * address space. The networking and block device layers use
69 * this boolean for bounce buffer decisions.
70 */
71#define PCI_DMA_BUS_IS_PHYS (1)
72
73
74/* This is always fine. */
75#define pci_dac_dma_supported(pci_dev, mask) (0)
76
77/* Return the index of the PCI controller for device. */
78static inline int pci_controller_num(struct pci_dev *dev)
79{
80 return 0;
81}
82
83#define HAVE_PCI_MMAP
84extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
85 enum pci_mmap_state mmap_state,
86 int write_combine);
87
88#endif /* __KERNEL__ */
89
90/* implement the pci_ DMA API in terms of the generic device dma_ one */
91#include <asm-generic/pci-dma-compat.h>
92
93/**
94 * pcibios_resource_to_bus - convert resource to PCI bus address
95 * @dev: device which owns this resource
96 * @region: converted bus-centric region (start,end)
97 * @res: resource to convert
98 *
99 * Convert a resource to a PCI device bus address or bus window.
100 */
101extern void pcibios_resource_to_bus(struct pci_dev *dev,
102 struct pci_bus_region *region,
103 struct resource *res);
104
105extern void pcibios_bus_to_resource(struct pci_dev *dev,
106 struct resource *res,
107 struct pci_bus_region *region);
108
109static inline struct resource *
110pcibios_select_root(struct pci_dev *pdev, struct resource *res)
111{
112 struct resource *root = NULL;
113
114 if (res->flags & IORESOURCE_IO)
115 root = &ioport_resource;
116 if (res->flags & IORESOURCE_MEM)
117 root = &iomem_resource;
118
119 return root;
120}
121
122#define pcibios_scan_all_fns(a, b) 0
123
124static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
125{
126 return channel ? 15 : 14;
127}
128
129#endif /* _ASM_PCI_H */
diff --git a/include/asm-mn10300/percpu.h b/include/asm-mn10300/percpu.h
deleted file mode 100644
index 06a959d67234..000000000000
--- a/include/asm-mn10300/percpu.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/percpu.h>
diff --git a/include/asm-mn10300/pgalloc.h b/include/asm-mn10300/pgalloc.h
deleted file mode 100644
index ec057e1bd4cf..000000000000
--- a/include/asm-mn10300/pgalloc.h
+++ /dev/null
@@ -1,56 +0,0 @@
1/* MN10300 Page and page table/directory allocation
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_PGALLOC_H
12#define _ASM_PGALLOC_H
13
14#include <asm/processor.h>
15#include <asm/page.h>
16#include <linux/threads.h>
17#include <linux/mm.h> /* for struct page */
18
19struct mm_struct;
20struct page;
21
22/* attach a page table to a PMD entry */
23#define pmd_populate_kernel(mm, pmd, pte) \
24 set_pmd(pmd, __pmd(__pa(pte) | _PAGE_TABLE))
25
26static inline
27void pmd_populate(struct mm_struct *mm, pmd_t *pmd, struct page *pte)
28{
29 set_pmd(pmd, __pmd((page_to_pfn(pte) << PAGE_SHIFT) | _PAGE_TABLE));
30}
31#define pmd_pgtable(pmd) pmd_page(pmd)
32
33/*
34 * Allocate and free page tables.
35 */
36
37extern pgd_t *pgd_alloc(struct mm_struct *);
38extern void pgd_free(struct mm_struct *, pgd_t *);
39
40extern pte_t *pte_alloc_one_kernel(struct mm_struct *, unsigned long);
41extern struct page *pte_alloc_one(struct mm_struct *, unsigned long);
42
43static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
44{
45 free_page((unsigned long) pte);
46}
47
48static inline void pte_free(struct mm_struct *mm, struct page *pte)
49{
50 __free_page(pte);
51}
52
53
54#define __pte_free_tlb(tlb, pte) tlb_remove_page((tlb), (pte))
55
56#endif /* _ASM_PGALLOC_H */
diff --git a/include/asm-mn10300/pgtable.h b/include/asm-mn10300/pgtable.h
deleted file mode 100644
index 6dc30fc827c4..000000000000
--- a/include/asm-mn10300/pgtable.h
+++ /dev/null
@@ -1,492 +0,0 @@
1/* MN10300 Page table manipulators and constants
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 *
11 *
12 * The Linux memory management assumes a three-level page table setup. On
13 * the i386, we use that, but "fold" the mid level into the top-level page
14 * table, so that we physically have the same two-level page table as the
15 * i386 mmu expects.
16 *
17 * This file contains the functions and defines necessary to modify and use
18 * the i386 page table tree for the purposes of the MN10300 TLB handler
19 * functions.
20 */
21#ifndef _ASM_PGTABLE_H
22#define _ASM_PGTABLE_H
23
24#include <asm/cpu-regs.h>
25
26#ifndef __ASSEMBLY__
27#include <asm/processor.h>
28#include <asm/cache.h>
29#include <linux/threads.h>
30
31#include <asm/bitops.h>
32
33#include <linux/slab.h>
34#include <linux/list.h>
35#include <linux/spinlock.h>
36
37/*
38 * ZERO_PAGE is a global shared page that is always zero: used
39 * for zero-mapped memory areas etc..
40 */
41#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
42extern unsigned long empty_zero_page[1024];
43extern spinlock_t pgd_lock;
44extern struct page *pgd_list;
45
46extern void pmd_ctor(void *, struct kmem_cache *, unsigned long);
47extern void pgtable_cache_init(void);
48extern void paging_init(void);
49
50#endif /* !__ASSEMBLY__ */
51
52/*
53 * The Linux mn10300 paging architecture only implements both the traditional
54 * 2-level page tables
55 */
56#define PGDIR_SHIFT 22
57#define PTRS_PER_PGD 1024
58#define PTRS_PER_PUD 1 /* we don't really have any PUD physically */
59#define PTRS_PER_PMD 1 /* we don't really have any PMD physically */
60#define PTRS_PER_PTE 1024
61
62#define PGD_SIZE PAGE_SIZE
63#define PMD_SIZE (1UL << PMD_SHIFT)
64#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
65#define PGDIR_MASK (~(PGDIR_SIZE - 1))
66
67#define USER_PTRS_PER_PGD (TASK_SIZE / PGDIR_SIZE)
68#define FIRST_USER_ADDRESS 0
69
70#define USER_PGD_PTRS (PAGE_OFFSET >> PGDIR_SHIFT)
71#define KERNEL_PGD_PTRS (PTRS_PER_PGD - USER_PGD_PTRS)
72
73#define TWOLEVEL_PGDIR_SHIFT 22
74#define BOOT_USER_PGD_PTRS (__PAGE_OFFSET >> TWOLEVEL_PGDIR_SHIFT)
75#define BOOT_KERNEL_PGD_PTRS (1024 - BOOT_USER_PGD_PTRS)
76
77#ifndef __ASSEMBLY__
78extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
79#endif
80
81/*
82 * Unfortunately, due to the way the MMU works on the MN10300, the vmalloc VM
83 * area has to be in the lower half of the virtual address range (the upper
84 * half is not translated through the TLB).
85 *
86 * So in this case, the vmalloc area goes at the bottom of the address map
87 * (leaving a hole at the very bottom to catch addressing errors), and
88 * userspace starts immediately above.
89 *
90 * The vmalloc() routines also leaves a hole of 4kB between each vmalloced
91 * area to catch addressing errors.
92 */
93#define VMALLOC_OFFSET (8 * 1024 * 1024)
94#define VMALLOC_START (0x70000000)
95#define VMALLOC_END (0x7C000000)
96
97#ifndef __ASSEMBLY__
98extern pte_t kernel_vmalloc_ptes[(VMALLOC_END - VMALLOC_START) / PAGE_SIZE];
99#endif
100
101/* IPTEL/DPTEL bit assignments */
102#define _PAGE_BIT_VALID xPTEL_V_BIT
103#define _PAGE_BIT_ACCESSED xPTEL_UNUSED1_BIT /* mustn't be loaded into IPTEL/DPTEL */
104#define _PAGE_BIT_NX xPTEL_UNUSED2_BIT /* mustn't be loaded into IPTEL/DPTEL */
105#define _PAGE_BIT_CACHE xPTEL_C_BIT
106#define _PAGE_BIT_PRESENT xPTEL_PV_BIT
107#define _PAGE_BIT_DIRTY xPTEL_D_BIT
108#define _PAGE_BIT_GLOBAL xPTEL_G_BIT
109
110#define _PAGE_VALID xPTEL_V
111#define _PAGE_ACCESSED xPTEL_UNUSED1
112#define _PAGE_NX xPTEL_UNUSED2 /* no-execute bit */
113#define _PAGE_CACHE xPTEL_C
114#define _PAGE_PRESENT xPTEL_PV
115#define _PAGE_DIRTY xPTEL_D
116#define _PAGE_PROT xPTEL_PR
117#define _PAGE_PROT_RKNU xPTEL_PR_ROK
118#define _PAGE_PROT_WKNU xPTEL_PR_RWK
119#define _PAGE_PROT_RKRU xPTEL_PR_ROK_ROU
120#define _PAGE_PROT_WKRU xPTEL_PR_RWK_ROU
121#define _PAGE_PROT_WKWU xPTEL_PR_RWK_RWU
122#define _PAGE_GLOBAL xPTEL_G
123#define _PAGE_PSE xPTEL_PS_4Mb /* 4MB page */
124
125#define _PAGE_FILE xPTEL_UNUSED1_BIT /* set:pagecache unset:swap */
126
127#define __PAGE_PROT_UWAUX 0x040
128#define __PAGE_PROT_USER 0x080
129#define __PAGE_PROT_WRITE 0x100
130
131#define _PAGE_PRESENTV (_PAGE_PRESENT|_PAGE_VALID)
132#define _PAGE_PROTNONE 0x000 /* If not present */
133
134#ifndef __ASSEMBLY__
135
136#define VMALLOC_VMADDR(x) ((unsigned long)(x))
137
138#define _PAGE_TABLE (_PAGE_PRESENTV | _PAGE_PROT_WKNU | _PAGE_ACCESSED | _PAGE_DIRTY)
139#define _PAGE_CHG_MASK (PTE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY)
140
141#define __PAGE_NONE (_PAGE_PRESENTV | _PAGE_PROT_RKNU | _PAGE_ACCESSED | _PAGE_CACHE)
142#define __PAGE_SHARED (_PAGE_PRESENTV | _PAGE_PROT_WKWU | _PAGE_ACCESSED | _PAGE_CACHE)
143#define __PAGE_COPY (_PAGE_PRESENTV | _PAGE_PROT_RKRU | _PAGE_ACCESSED | _PAGE_CACHE)
144#define __PAGE_READONLY (_PAGE_PRESENTV | _PAGE_PROT_RKRU | _PAGE_ACCESSED | _PAGE_CACHE)
145
146#define PAGE_NONE __pgprot(__PAGE_NONE | _PAGE_NX)
147#define PAGE_SHARED_NOEXEC __pgprot(__PAGE_SHARED | _PAGE_NX)
148#define PAGE_COPY_NOEXEC __pgprot(__PAGE_COPY | _PAGE_NX)
149#define PAGE_READONLY_NOEXEC __pgprot(__PAGE_READONLY | _PAGE_NX)
150#define PAGE_SHARED_EXEC __pgprot(__PAGE_SHARED)
151#define PAGE_COPY_EXEC __pgprot(__PAGE_COPY)
152#define PAGE_READONLY_EXEC __pgprot(__PAGE_READONLY)
153#define PAGE_COPY PAGE_COPY_NOEXEC
154#define PAGE_READONLY PAGE_READONLY_NOEXEC
155#define PAGE_SHARED PAGE_SHARED_EXEC
156
157#define __PAGE_KERNEL_BASE (_PAGE_PRESENTV | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_GLOBAL)
158
159#define __PAGE_KERNEL (__PAGE_KERNEL_BASE | _PAGE_PROT_WKNU | _PAGE_CACHE | _PAGE_NX)
160#define __PAGE_KERNEL_NOCACHE (__PAGE_KERNEL_BASE | _PAGE_PROT_WKNU | _PAGE_NX)
161#define __PAGE_KERNEL_EXEC (__PAGE_KERNEL & ~_PAGE_NX)
162#define __PAGE_KERNEL_RO (__PAGE_KERNEL_BASE | _PAGE_PROT_RKNU | _PAGE_CACHE | _PAGE_NX)
163#define __PAGE_KERNEL_LARGE (__PAGE_KERNEL | _PAGE_PSE)
164#define __PAGE_KERNEL_LARGE_EXEC (__PAGE_KERNEL_EXEC | _PAGE_PSE)
165
166#define PAGE_KERNEL __pgprot(__PAGE_KERNEL)
167#define PAGE_KERNEL_RO __pgprot(__PAGE_KERNEL_RO)
168#define PAGE_KERNEL_EXEC __pgprot(__PAGE_KERNEL_EXEC)
169#define PAGE_KERNEL_NOCACHE __pgprot(__PAGE_KERNEL_NOCACHE)
170#define PAGE_KERNEL_LARGE __pgprot(__PAGE_KERNEL_LARGE)
171#define PAGE_KERNEL_LARGE_EXEC __pgprot(__PAGE_KERNEL_LARGE_EXEC)
172
173/*
174 * Whilst the MN10300 can do page protection for execute (given separate data
175 * and insn TLBs), we are not supporting it at the moment. Write permission,
176 * however, always implies read permission (but not execute permission).
177 */
178#define __P000 PAGE_NONE
179#define __P001 PAGE_READONLY_NOEXEC
180#define __P010 PAGE_COPY_NOEXEC
181#define __P011 PAGE_COPY_NOEXEC
182#define __P100 PAGE_READONLY_EXEC
183#define __P101 PAGE_READONLY_EXEC
184#define __P110 PAGE_COPY_EXEC
185#define __P111 PAGE_COPY_EXEC
186
187#define __S000 PAGE_NONE
188#define __S001 PAGE_READONLY_NOEXEC
189#define __S010 PAGE_SHARED_NOEXEC
190#define __S011 PAGE_SHARED_NOEXEC
191#define __S100 PAGE_READONLY_EXEC
192#define __S101 PAGE_READONLY_EXEC
193#define __S110 PAGE_SHARED_EXEC
194#define __S111 PAGE_SHARED_EXEC
195
196/*
197 * Define this to warn about kernel memory accesses that are
198 * done without a 'verify_area(VERIFY_WRITE,..)'
199 */
200#undef TEST_VERIFY_AREA
201
202#define pte_present(x) (pte_val(x) & _PAGE_VALID)
203#define pte_clear(mm, addr, xp) \
204do { \
205 set_pte_at((mm), (addr), (xp), __pte(0)); \
206} while (0)
207
208#define pmd_none(x) (!pmd_val(x))
209#define pmd_present(x) (!pmd_none(x))
210#define pmd_clear(xp) do { set_pmd(xp, __pmd(0)); } while (0)
211#define pmd_bad(x) 0
212
213
214#define pages_to_mb(x) ((x) >> (20 - PAGE_SHIFT))
215
216#ifndef __ASSEMBLY__
217
218/*
219 * The following only work if pte_present() is true.
220 * Undefined behaviour if not..
221 */
222static inline int pte_user(pte_t pte) { return pte_val(pte) & __PAGE_PROT_USER; }
223static inline int pte_read(pte_t pte) { return pte_val(pte) & __PAGE_PROT_USER; }
224static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY; }
225static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; }
226static inline int pte_write(pte_t pte) { return pte_val(pte) & __PAGE_PROT_WRITE; }
227static inline int pte_special(pte_t pte){ return 0; }
228
229/*
230 * The following only works if pte_present() is not true.
231 */
232static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE; }
233
234static inline pte_t pte_rdprotect(pte_t pte)
235{
236 pte_val(pte) &= ~(__PAGE_PROT_USER|__PAGE_PROT_UWAUX); return pte;
237}
238static inline pte_t pte_exprotect(pte_t pte)
239{
240 pte_val(pte) |= _PAGE_NX; return pte;
241}
242
243static inline pte_t pte_wrprotect(pte_t pte)
244{
245 pte_val(pte) &= ~(__PAGE_PROT_WRITE|__PAGE_PROT_UWAUX); return pte;
246}
247
248static inline pte_t pte_mkclean(pte_t pte) { pte_val(pte) &= ~_PAGE_DIRTY; return pte; }
249static inline pte_t pte_mkold(pte_t pte) { pte_val(pte) &= ~_PAGE_ACCESSED; return pte; }
250static inline pte_t pte_mkdirty(pte_t pte) { pte_val(pte) |= _PAGE_DIRTY; return pte; }
251static inline pte_t pte_mkyoung(pte_t pte) { pte_val(pte) |= _PAGE_ACCESSED; return pte; }
252static inline pte_t pte_mkexec(pte_t pte) { pte_val(pte) &= ~_PAGE_NX; return pte; }
253
254static inline pte_t pte_mkread(pte_t pte)
255{
256 pte_val(pte) |= __PAGE_PROT_USER;
257 if (pte_write(pte))
258 pte_val(pte) |= __PAGE_PROT_UWAUX;
259 return pte;
260}
261static inline pte_t pte_mkwrite(pte_t pte)
262{
263 pte_val(pte) |= __PAGE_PROT_WRITE;
264 if (pte_val(pte) & __PAGE_PROT_USER)
265 pte_val(pte) |= __PAGE_PROT_UWAUX;
266 return pte;
267}
268
269static inline pte_t pte_mkspecial(pte_t pte) { return pte; }
270
271#define pte_ERROR(e) \
272 printk(KERN_ERR "%s:%d: bad pte %08lx.\n", \
273 __FILE__, __LINE__, pte_val(e))
274#define pgd_ERROR(e) \
275 printk(KERN_ERR "%s:%d: bad pgd %08lx.\n", \
276 __FILE__, __LINE__, pgd_val(e))
277
278/*
279 * The "pgd_xxx()" functions here are trivial for a folded two-level
280 * setup: the pgd is never bad, and a pmd always exists (as it's folded
281 * into the pgd entry)
282 */
283#define pgd_clear(xp) do { } while (0)
284
285/*
286 * Certain architectures need to do special things when PTEs
287 * within a page table are directly modified. Thus, the following
288 * hook is made available.
289 */
290#define set_pte(pteptr, pteval) (*(pteptr) = pteval)
291#define set_pte_at(mm, addr, ptep, pteval) set_pte((ptep), (pteval))
292#define set_pte_atomic(pteptr, pteval) set_pte((pteptr), (pteval))
293
294/*
295 * (pmds are folded into pgds so this doesn't get actually called,
296 * but the define is needed for a generic inline function.)
297 */
298#define set_pmd(pmdptr, pmdval) (*(pmdptr) = pmdval)
299
300#define ptep_get_and_clear(mm, addr, ptep) \
301 __pte(xchg(&(ptep)->pte, 0))
302#define pte_same(a, b) (pte_val(a) == pte_val(b))
303#define pte_page(x) pfn_to_page(pte_pfn(x))
304#define pte_none(x) (!pte_val(x))
305#define pte_pfn(x) ((unsigned long) (pte_val(x) >> PAGE_SHIFT))
306#define __pfn_addr(pfn) ((pfn) << PAGE_SHIFT)
307#define pfn_pte(pfn, prot) __pte(__pfn_addr(pfn) | pgprot_val(prot))
308#define pfn_pmd(pfn, prot) __pmd(__pfn_addr(pfn) | pgprot_val(prot))
309
310/*
311 * All present user pages are user-executable:
312 */
313static inline int pte_exec(pte_t pte)
314{
315 return pte_user(pte);
316}
317
318/*
319 * All present pages are kernel-executable:
320 */
321static inline int pte_exec_kernel(pte_t pte)
322{
323 return 1;
324}
325
326/*
327 * Bits 0 and 1 are taken, split up the 29 bits of offset
328 * into this range:
329 */
330#define PTE_FILE_MAX_BITS 29
331
332#define pte_to_pgoff(pte) (pte_val(pte) >> 2)
333#define pgoff_to_pte(off) __pte((off) << 2 | _PAGE_FILE)
334
335/* Encode and de-code a swap entry */
336#define __swp_type(x) (((x).val >> 2) & 0x3f)
337#define __swp_offset(x) ((x).val >> 8)
338#define __swp_entry(type, offset) \
339 ((swp_entry_t) { ((type) << 2) | ((offset) << 8) })
340#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
341#define __swp_entry_to_pte(x) __pte((x).val)
342
343static inline
344int ptep_test_and_clear_dirty(struct vm_area_struct *vma, unsigned long addr,
345 pte_t *ptep)
346{
347 if (!pte_dirty(*ptep))
348 return 0;
349 return test_and_clear_bit(_PAGE_BIT_DIRTY, &ptep->pte);
350}
351
352static inline
353int ptep_test_and_clear_young(struct vm_area_struct *vma, unsigned long addr,
354 pte_t *ptep)
355{
356 if (!pte_young(*ptep))
357 return 0;
358 return test_and_clear_bit(_PAGE_BIT_ACCESSED, &ptep->pte);
359}
360
361static inline
362void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
363{
364 pte_val(*ptep) &= ~(__PAGE_PROT_WRITE|__PAGE_PROT_UWAUX);
365}
366
367static inline void ptep_mkdirty(pte_t *ptep)
368{
369 set_bit(_PAGE_BIT_DIRTY, &ptep->pte);
370}
371
372/*
373 * Macro to mark a page protection value as "uncacheable". On processors which
374 * do not support it, this is a no-op.
375 */
376#define pgprot_noncached(prot) __pgprot(pgprot_val(prot) | _PAGE_CACHE)
377
378
379/*
380 * Conversion functions: convert a page and protection to a page entry,
381 * and a page entry and page directory to the page they refer to.
382 */
383
384#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
385#define mk_pte_huge(entry) \
386 ((entry).pte |= _PAGE_PRESENT | _PAGE_PSE | _PAGE_VALID)
387
388static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
389{
390 pte_val(pte) &= _PAGE_CHG_MASK;
391 pte_val(pte) |= pgprot_val(newprot);
392 return pte;
393}
394
395#define page_pte(page) page_pte_prot((page), __pgprot(0))
396
397#define pmd_page_kernel(pmd) \
398 ((unsigned long) __va(pmd_val(pmd) & PAGE_MASK))
399
400#define pmd_page(pmd) pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT)
401
402#define pmd_large(pmd) \
403 ((pmd_val(pmd) & (_PAGE_PSE | _PAGE_PRESENT)) == \
404 (_PAGE_PSE | _PAGE_PRESENT))
405
406/*
407 * the pgd page can be thought of an array like this: pgd_t[PTRS_PER_PGD]
408 *
409 * this macro returns the index of the entry in the pgd page which would
410 * control the given virtual address
411 */
412#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
413
414/*
415 * pgd_offset() returns a (pgd_t *)
416 * pgd_index() is used get the offset into the pgd page's array of pgd_t's;
417 */
418#define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
419
420/*
421 * a shortcut which implies the use of the kernel's pgd, instead
422 * of a process's
423 */
424#define pgd_offset_k(address) pgd_offset(&init_mm, address)
425
426/*
427 * the pmd page can be thought of an array like this: pmd_t[PTRS_PER_PMD]
428 *
429 * this macro returns the index of the entry in the pmd page which would
430 * control the given virtual address
431 */
432#define pmd_index(address) \
433 (((address) >> PMD_SHIFT) & (PTRS_PER_PMD - 1))
434
435/*
436 * the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE]
437 *
438 * this macro returns the index of the entry in the pte page which would
439 * control the given virtual address
440 */
441#define pte_index(address) \
442 (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
443
444#define pte_offset_kernel(dir, address) \
445 ((pte_t *) pmd_page_kernel(*(dir)) + pte_index(address))
446
447/*
448 * Make a given kernel text page executable/non-executable.
449 * Returns the previous executability setting of that page (which
450 * is used to restore the previous state). Used by the SMP bootup code.
451 * NOTE: this is an __init function for security reasons.
452 */
453static inline int set_kernel_exec(unsigned long vaddr, int enable)
454{
455 return 0;
456}
457
458#define pte_offset_map(dir, address) \
459 ((pte_t *) page_address(pmd_page(*(dir))) + pte_index(address))
460#define pte_offset_map_nested(dir, address) pte_offset_map(dir, address)
461#define pte_unmap(pte) do {} while (0)
462#define pte_unmap_nested(pte) do {} while (0)
463
464/*
465 * The MN10300 has external MMU info in the form of a TLB: this is adapted from
466 * the kernel page tables containing the necessary information by tlb-mn10300.S
467 */
468extern void update_mmu_cache(struct vm_area_struct *vma,
469 unsigned long address, pte_t pte);
470
471#endif /* !__ASSEMBLY__ */
472
473#define kern_addr_valid(addr) (1)
474
475#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
476 remap_pfn_range((vma), (vaddr), (pfn), (size), (prot))
477
478#define MK_IOSPACE_PFN(space, pfn) (pfn)
479#define GET_IOSPACE(pfn) 0
480#define GET_PFN(pfn) (pfn)
481
482#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
483#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY
484#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
485#define __HAVE_ARCH_PTEP_SET_WRPROTECT
486#define __HAVE_ARCH_PTEP_MKDIRTY
487#define __HAVE_ARCH_PTE_SAME
488#include <asm-generic/pgtable.h>
489
490#endif /* !__ASSEMBLY__ */
491
492#endif /* _ASM_PGTABLE_H */
diff --git a/include/asm-mn10300/pio-regs.h b/include/asm-mn10300/pio-regs.h
deleted file mode 100644
index 96bc8182d0ba..000000000000
--- a/include/asm-mn10300/pio-regs.h
+++ /dev/null
@@ -1,233 +0,0 @@
1/* MN10300 On-board I/O port module registers
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_PIO_REGS_H
12#define _ASM_PIO_REGS_H
13
14#include <asm/cpu-regs.h>
15#include <asm/intctl-regs.h>
16
17#ifdef __KERNEL__
18
19/* I/O port 0 */
20#define P0MD __SYSREG(0xdb000000, u16) /* mode reg */
21#define P0MD_0 0x0003 /* mask */
22#define P0MD_0_IN 0x0000 /* input mode */
23#define P0MD_0_OUT 0x0001 /* output mode */
24#define P0MD_0_TM0IO 0x0002 /* timer 0 I/O mode */
25#define P0MD_0_EYECLK 0x0003 /* test signal output (clock) */
26#define P0MD_1 0x000c
27#define P0MD_1_IN 0x0000
28#define P0MD_1_OUT 0x0004
29#define P0MD_1_TM1IO 0x0008 /* timer 1 I/O mode */
30#define P0MD_1_EYED 0x000c /* test signal output (data) */
31#define P0MD_2 0x0030
32#define P0MD_2_IN 0x0000
33#define P0MD_2_OUT 0x0010
34#define P0MD_2_TM2IO 0x0020 /* timer 2 I/O mode */
35#define P0MD_3 0x00c0
36#define P0MD_3_IN 0x0000
37#define P0MD_3_OUT 0x0040
38#define P0MD_3_TM3IO 0x0080 /* timer 3 I/O mode */
39#define P0MD_4 0x0300
40#define P0MD_4_IN 0x0000
41#define P0MD_4_OUT 0x0100
42#define P0MD_4_TM4IO 0x0200 /* timer 4 I/O mode */
43#define P0MD_4_XCTS 0x0300 /* XCTS input for serial port 2 */
44#define P0MD_5 0x0c00
45#define P0MD_5_IN 0x0000
46#define P0MD_5_OUT 0x0400
47#define P0MD_5_TM5IO 0x0800 /* timer 5 I/O mode */
48#define P0MD_6 0x3000
49#define P0MD_6_IN 0x0000
50#define P0MD_6_OUT 0x1000
51#define P0MD_6_TM6IOA 0x2000 /* timer 6 I/O mode A */
52#define P0MD_7 0xc000
53#define P0MD_7_IN 0x0000
54#define P0MD_7_OUT 0x4000
55#define P0MD_7_TM6IOB 0x8000 /* timer 6 I/O mode B */
56
57#define P0IN __SYSREG(0xdb000004, u8) /* in reg */
58#define P0OUT __SYSREG(0xdb000008, u8) /* out reg */
59
60#define P0TMIO __SYSREG(0xdb00000c, u8) /* TM pin I/O control reg */
61#define P0TMIO_TM0_IN 0x00
62#define P0TMIO_TM0_OUT 0x01
63#define P0TMIO_TM1_IN 0x00
64#define P0TMIO_TM1_OUT 0x02
65#define P0TMIO_TM2_IN 0x00
66#define P0TMIO_TM2_OUT 0x04
67#define P0TMIO_TM3_IN 0x00
68#define P0TMIO_TM3_OUT 0x08
69#define P0TMIO_TM4_IN 0x00
70#define P0TMIO_TM4_OUT 0x10
71#define P0TMIO_TM5_IN 0x00
72#define P0TMIO_TM5_OUT 0x20
73#define P0TMIO_TM6A_IN 0x00
74#define P0TMIO_TM6A_OUT 0x40
75#define P0TMIO_TM6B_IN 0x00
76#define P0TMIO_TM6B_OUT 0x80
77
78/* I/O port 1 */
79#define P1MD __SYSREG(0xdb000100, u16) /* mode reg */
80#define P1MD_0 0x0003 /* mask */
81#define P1MD_0_IN 0x0000 /* input mode */
82#define P1MD_0_OUT 0x0001 /* output mode */
83#define P1MD_0_TM7IO 0x0002 /* timer 7 I/O mode */
84#define P1MD_0_ADTRG 0x0003 /* A/D converter trigger mode */
85#define P1MD_1 0x000c
86#define P1MD_1_IN 0x0000
87#define P1MD_1_OUT 0x0004
88#define P1MD_1_TM8IO 0x0008 /* timer 8 I/O mode */
89#define P1MD_1_XDMR0 0x000c /* DMA request input 0 mode */
90#define P1MD_2 0x0030
91#define P1MD_2_IN 0x0000
92#define P1MD_2_OUT 0x0010
93#define P1MD_2_TM9IO 0x0020 /* timer 9 I/O mode */
94#define P1MD_2_XDMR1 0x0030 /* DMA request input 1 mode */
95#define P1MD_3 0x00c0
96#define P1MD_3_IN 0x0000
97#define P1MD_3_OUT 0x0040
98#define P1MD_3_TM10IO 0x0080 /* timer 10 I/O mode */
99#define P1MD_3_FRQS0 0x00c0 /* CPU clock multiplier setting input 0 mode */
100#define P1MD_4 0x0300
101#define P1MD_4_IN 0x0000
102#define P1MD_4_OUT 0x0100
103#define P1MD_4_TM11IO 0x0200 /* timer 11 I/O mode */
104#define P1MD_4_FRQS1 0x0300 /* CPU clock multiplier setting input 1 mode */
105
106#define P1IN __SYSREG(0xdb000104, u8) /* in reg */
107#define P1OUT __SYSREG(0xdb000108, u8) /* out reg */
108#define P1TMIO __SYSREG(0xdb00010c, u8) /* TM pin I/O control reg */
109#define P1TMIO_TM11_IN 0x00
110#define P1TMIO_TM11_OUT 0x01
111#define P1TMIO_TM10_IN 0x00
112#define P1TMIO_TM10_OUT 0x02
113#define P1TMIO_TM9_IN 0x00
114#define P1TMIO_TM9_OUT 0x04
115#define P1TMIO_TM8_IN 0x00
116#define P1TMIO_TM8_OUT 0x08
117#define P1TMIO_TM7_IN 0x00
118#define P1TMIO_TM7_OUT 0x10
119
120/* I/O port 2 */
121#define P2MD __SYSREG(0xdb000200, u16) /* mode reg */
122#define P2MD_0 0x0003 /* mask */
123#define P2MD_0_IN 0x0000 /* input mode */
124#define P2MD_0_OUT 0x0001 /* output mode */
125#define P2MD_0_BOOTBW 0x0003 /* boot bus width selector mode */
126#define P2MD_1 0x000c
127#define P2MD_1_IN 0x0000
128#define P2MD_1_OUT 0x0004
129#define P2MD_1_BOOTSEL 0x000c /* boot device selector mode */
130#define P2MD_2 0x0030
131#define P2MD_2_IN 0x0000
132#define P2MD_2_OUT 0x0010
133#define P2MD_3 0x00c0
134#define P2MD_3_IN 0x0000
135#define P2MD_3_OUT 0x0040
136#define P2MD_3_CKIO 0x00c0 /* mode */
137#define P2MD_4 0x0300
138#define P2MD_4_IN 0x0000
139#define P2MD_4_OUT 0x0100
140#define P2MD_4_CMOD 0x0300 /* mode */
141
142#define P2IN __SYSREG(0xdb000204, u8) /* in reg */
143#define P2OUT __SYSREG(0xdb000208, u8) /* out reg */
144#define P2TMIO __SYSREG(0xdb00020c, u8) /* TM pin I/O control reg */
145
146/* I/O port 3 */
147#define P3MD __SYSREG(0xdb000300, u16) /* mode reg */
148#define P3MD_0 0x0003 /* mask */
149#define P3MD_0_IN 0x0000 /* input mode */
150#define P3MD_0_OUT 0x0001 /* output mode */
151#define P3MD_0_AFRXD 0x0002 /* AFR interface mode */
152#define P3MD_1 0x000c
153#define P3MD_1_IN 0x0000
154#define P3MD_1_OUT 0x0004
155#define P3MD_1_AFTXD 0x0008 /* AFR interface mode */
156#define P3MD_2 0x0030
157#define P3MD_2_IN 0x0000
158#define P3MD_2_OUT 0x0010
159#define P3MD_2_AFSCLK 0x0020 /* AFR interface mode */
160#define P3MD_3 0x00c0
161#define P3MD_3_IN 0x0000
162#define P3MD_3_OUT 0x0040
163#define P3MD_3_AFFS 0x0080 /* AFR interface mode */
164#define P3MD_4 0x0300
165#define P3MD_4_IN 0x0000
166#define P3MD_4_OUT 0x0100
167#define P3MD_4_AFEHC 0x0200 /* AFR interface mode */
168
169#define P3IN __SYSREG(0xdb000304, u8) /* in reg */
170#define P3OUT __SYSREG(0xdb000308, u8) /* out reg */
171
172/* I/O port 4 */
173#define P4MD __SYSREG(0xdb000400, u16) /* mode reg */
174#define P4MD_0 0x0003 /* mask */
175#define P4MD_0_IN 0x0000 /* input mode */
176#define P4MD_0_OUT 0x0001 /* output mode */
177#define P4MD_0_SCL0 0x0002 /* I2C/serial mode */
178#define P4MD_1 0x000c
179#define P4MD_1_IN 0x0000
180#define P4MD_1_OUT 0x0004
181#define P4MD_1_SDA0 0x0008
182#define P4MD_2 0x0030
183#define P4MD_2_IN 0x0000
184#define P4MD_2_OUT 0x0010
185#define P4MD_2_SCL1 0x0020
186#define P4MD_3 0x00c0
187#define P4MD_3_IN 0x0000
188#define P4MD_3_OUT 0x0040
189#define P4MD_3_SDA1 0x0080
190#define P4MD_4 0x0300
191#define P4MD_4_IN 0x0000
192#define P4MD_4_OUT 0x0100
193#define P4MD_4_SBO0 0x0200
194#define P4MD_5 0x0c00
195#define P4MD_5_IN 0x0000
196#define P4MD_5_OUT 0x0400
197#define P4MD_5_SBO1 0x0800
198#define P4MD_6 0x3000
199#define P4MD_6_IN 0x0000
200#define P4MD_6_OUT 0x1000
201#define P4MD_6_SBT0 0x2000
202#define P4MD_7 0xc000
203#define P4MD_7_IN 0x0000
204#define P4MD_7_OUT 0x4000
205#define P4MD_7_SBT1 0x8000
206
207#define P4IN __SYSREG(0xdb000404, u8) /* in reg */
208#define P4OUT __SYSREG(0xdb000408, u8) /* out reg */
209
210/* I/O port 5 */
211#define P5MD __SYSREG(0xdb000500, u16) /* mode reg */
212#define P5MD_0 0x0003 /* mask */
213#define P5MD_0_IN 0x0000 /* input mode */
214#define P5MD_0_OUT 0x0001 /* output mode */
215#define P5MD_0_IRTXD 0x0002 /* IrDA mode */
216#define P5MD_0_SOUT 0x0004 /* serial mode */
217#define P5MD_1 0x000c
218#define P5MD_1_IN 0x0000
219#define P5MD_1_OUT 0x0004
220#define P5MD_1_IRRXDS 0x0008 /* IrDA mode */
221#define P5MD_1_SIN 0x000c /* serial mode */
222#define P5MD_2 0x0030
223#define P5MD_2_IN 0x0000
224#define P5MD_2_OUT 0x0010
225#define P5MD_2_IRRXDF 0x0020 /* IrDA mode */
226
227#define P5IN __SYSREG(0xdb000504, u8) /* in reg */
228#define P5OUT __SYSREG(0xdb000508, u8) /* out reg */
229
230
231#endif /* __KERNEL__ */
232
233#endif /* _ASM_PIO_REGS_H */
diff --git a/include/asm-mn10300/poll.h b/include/asm-mn10300/poll.h
deleted file mode 100644
index c98509d3149e..000000000000
--- a/include/asm-mn10300/poll.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/poll.h>
diff --git a/include/asm-mn10300/posix_types.h b/include/asm-mn10300/posix_types.h
deleted file mode 100644
index 077567c37798..000000000000
--- a/include/asm-mn10300/posix_types.h
+++ /dev/null
@@ -1,132 +0,0 @@
1/* MN10300 POSIX types
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_POSIX_TYPES_H
12#define _ASM_POSIX_TYPES_H
13
14/*
15 * This file is generally used by user-level software, so you need to
16 * be a little careful about namespace pollution etc. Also, we cannot
17 * assume GCC is being used.
18 */
19
20typedef unsigned long __kernel_ino_t;
21typedef unsigned short __kernel_mode_t;
22typedef unsigned short __kernel_nlink_t;
23typedef long __kernel_off_t;
24typedef int __kernel_pid_t;
25typedef unsigned short __kernel_ipc_pid_t;
26typedef unsigned short __kernel_uid_t;
27typedef unsigned short __kernel_gid_t;
28typedef unsigned long __kernel_size_t;
29typedef long __kernel_ssize_t;
30typedef int __kernel_ptrdiff_t;
31typedef long __kernel_time_t;
32typedef long __kernel_suseconds_t;
33typedef long __kernel_clock_t;
34typedef int __kernel_timer_t;
35typedef int __kernel_clockid_t;
36typedef int __kernel_daddr_t;
37typedef char * __kernel_caddr_t;
38typedef unsigned short __kernel_uid16_t;
39typedef unsigned short __kernel_gid16_t;
40typedef unsigned int __kernel_uid32_t;
41typedef unsigned int __kernel_gid32_t;
42
43typedef unsigned short __kernel_old_uid_t;
44typedef unsigned short __kernel_old_gid_t;
45typedef unsigned short __kernel_old_dev_t;
46
47#ifdef __GNUC__
48typedef long long __kernel_loff_t;
49#endif
50
51typedef struct {
52#if defined(__KERNEL__) || defined(__USE_ALL)
53 int val[2];
54#else /* !defined(__KERNEL__) && !defined(__USE_ALL) */
55 int __val[2];
56#endif /* !defined(__KERNEL__) && !defined(__USE_ALL) */
57} __kernel_fsid_t;
58
59#if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2)
60
61#undef __FD_SET
62static inline void __FD_SET(unsigned long __fd, __kernel_fd_set *__fdsetp)
63{
64 unsigned long __tmp = __fd / __NFDBITS;
65 unsigned long __rem = __fd % __NFDBITS;
66 __fdsetp->fds_bits[__tmp] |= (1UL<<__rem);
67}
68
69#undef __FD_CLR
70static inline void __FD_CLR(unsigned long __fd, __kernel_fd_set *__fdsetp)
71{
72 unsigned long __tmp = __fd / __NFDBITS;
73 unsigned long __rem = __fd % __NFDBITS;
74 __fdsetp->fds_bits[__tmp] &= ~(1UL<<__rem);
75}
76
77
78#undef __FD_ISSET
79static inline int __FD_ISSET(unsigned long __fd, const __kernel_fd_set *__p)
80{
81 unsigned long __tmp = __fd / __NFDBITS;
82 unsigned long __rem = __fd % __NFDBITS;
83 return (__p->fds_bits[__tmp] & (1UL<<__rem)) != 0;
84}
85
86/*
87 * This will unroll the loop for the normal constant case (8 ints,
88 * for a 256-bit fd_set)
89 */
90#undef __FD_ZERO
91static inline void __FD_ZERO(__kernel_fd_set *__p)
92{
93 unsigned long *__tmp = __p->fds_bits;
94 int __i;
95
96 if (__builtin_constant_p(__FDSET_LONGS)) {
97 switch (__FDSET_LONGS) {
98 case 16:
99 __tmp[ 0] = 0; __tmp[ 1] = 0;
100 __tmp[ 2] = 0; __tmp[ 3] = 0;
101 __tmp[ 4] = 0; __tmp[ 5] = 0;
102 __tmp[ 6] = 0; __tmp[ 7] = 0;
103 __tmp[ 8] = 0; __tmp[ 9] = 0;
104 __tmp[10] = 0; __tmp[11] = 0;
105 __tmp[12] = 0; __tmp[13] = 0;
106 __tmp[14] = 0; __tmp[15] = 0;
107 return;
108
109 case 8:
110 __tmp[ 0] = 0; __tmp[ 1] = 0;
111 __tmp[ 2] = 0; __tmp[ 3] = 0;
112 __tmp[ 4] = 0; __tmp[ 5] = 0;
113 __tmp[ 6] = 0; __tmp[ 7] = 0;
114 return;
115
116 case 4:
117 __tmp[ 0] = 0; __tmp[ 1] = 0;
118 __tmp[ 2] = 0; __tmp[ 3] = 0;
119 return;
120 }
121 }
122 __i = __FDSET_LONGS;
123 while (__i) {
124 __i--;
125 *__tmp = 0;
126 __tmp++;
127 }
128}
129
130#endif /* defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) */
131
132#endif /* _ASM_POSIX_TYPES_H */
diff --git a/include/asm-mn10300/proc-mn103e010/cache.h b/include/asm-mn10300/proc-mn103e010/cache.h
deleted file mode 100644
index bdc1f9a59b4c..000000000000
--- a/include/asm-mn10300/proc-mn103e010/cache.h
+++ /dev/null
@@ -1,33 +0,0 @@
1/* MN103E010 Cache specification
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_PROC_CACHE_H
12#define _ASM_PROC_CACHE_H
13
14/* L1 cache */
15
16#define L1_CACHE_NWAYS 4 /* number of ways in caches */
17#define L1_CACHE_NENTRIES 256 /* number of entries in each way */
18#define L1_CACHE_BYTES 16 /* bytes per entry */
19#define L1_CACHE_SHIFT 4 /* shift for bytes per entry */
20#define L1_CACHE_WAYDISP 0x1000 /* displacement of one way from the next */
21
22#define L1_CACHE_TAG_VALID 0x00000001 /* cache tag valid bit */
23#define L1_CACHE_TAG_DIRTY 0x00000008 /* data cache tag dirty bit */
24#define L1_CACHE_TAG_ENTRY 0x00000ff0 /* cache tag entry address mask */
25#define L1_CACHE_TAG_ADDRESS 0xfffff000 /* cache tag line address mask */
26
27/*
28 * specification of the interval between interrupt checking intervals whilst
29 * managing the cache with the interrupts disabled
30 */
31#define MN10300_DCACHE_INV_RANGE_INTR_LOG2_INTERVAL 4
32
33#endif /* _ASM_PROC_CACHE_H */
diff --git a/include/asm-mn10300/proc-mn103e010/clock.h b/include/asm-mn10300/proc-mn103e010/clock.h
deleted file mode 100644
index caf998350633..000000000000
--- a/include/asm-mn10300/proc-mn103e010/clock.h
+++ /dev/null
@@ -1,18 +0,0 @@
1/* MN103E010-specific clocks
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_PROC_CLOCK_H
12#define _ASM_PROC_CLOCK_H
13
14#include <asm/unit/clock.h>
15
16#define MN10300_WDCLK MN10300_IOCLK
17
18#endif /* _ASM_PROC_CLOCK_H */
diff --git a/include/asm-mn10300/proc-mn103e010/irq.h b/include/asm-mn10300/proc-mn103e010/irq.h
deleted file mode 100644
index aa6ee8f98b1b..000000000000
--- a/include/asm-mn10300/proc-mn103e010/irq.h
+++ /dev/null
@@ -1,34 +0,0 @@
1/* MN103E010 On-board interrupt controller numbers
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_PROC_IRQ_H
13#define _ASM_PROC_IRQ_H
14
15#ifdef __KERNEL__
16
17#define GxICR_NUM_IRQS 42
18
19#define GxICR_NUM_XIRQS 8
20
21#define XIRQ0 34
22#define XIRQ1 35
23#define XIRQ2 36
24#define XIRQ3 37
25#define XIRQ4 38
26#define XIRQ5 39
27#define XIRQ6 40
28#define XIRQ7 41
29
30#define XIRQ2IRQ(num) (XIRQ0 + num)
31
32#endif /* __KERNEL__ */
33
34#endif /* _ASM_PROC_IRQ_H */
diff --git a/include/asm-mn10300/proc-mn103e010/proc.h b/include/asm-mn10300/proc-mn103e010/proc.h
deleted file mode 100644
index 22a2b93f70b7..000000000000
--- a/include/asm-mn10300/proc-mn103e010/proc.h
+++ /dev/null
@@ -1,18 +0,0 @@
1/* MN103E010 Processor description
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_PROC_PROC_H
13#define _ASM_PROC_PROC_H
14
15#define PROCESSOR_VENDOR_NAME "Matsushita"
16#define PROCESSOR_MODEL_NAME "mn103e010"
17
18#endif /* _ASM_PROC_PROC_H */
diff --git a/include/asm-mn10300/processor.h b/include/asm-mn10300/processor.h
deleted file mode 100644
index 73239271873d..000000000000
--- a/include/asm-mn10300/processor.h
+++ /dev/null
@@ -1,186 +0,0 @@
1/* MN10300 Processor specifics
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 * Written by David Howells (dhowells@redhat.com)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12
13#ifndef _ASM_PROCESSOR_H
14#define _ASM_PROCESSOR_H
15
16#include <asm/page.h>
17#include <asm/ptrace.h>
18#include <asm/cpu-regs.h>
19#include <linux/threads.h>
20
21/* Forward declaration, a strange C thing */
22struct task_struct;
23struct mm_struct;
24
25/*
26 * Default implementation of macro that returns current
27 * instruction pointer ("program counter").
28 */
29#define current_text_addr() \
30({ \
31 void *__pc; \
32 asm("mov pc,%0" : "=a"(__pc)); \
33 __pc; \
34})
35
36extern void show_registers(struct pt_regs *regs);
37
38/*
39 * CPU type and hardware bug flags. Kept separately for each CPU.
40 * Members of this structure are referenced in head.S, so think twice
41 * before touching them. [mj]
42 */
43
44struct mn10300_cpuinfo {
45 int type;
46 unsigned long loops_per_sec;
47 char hard_math;
48 unsigned long *pgd_quick;
49 unsigned long *pte_quick;
50 unsigned long pgtable_cache_sz;
51};
52
53extern struct mn10300_cpuinfo boot_cpu_data;
54
55#define cpu_data &boot_cpu_data
56#define current_cpu_data boot_cpu_data
57
58extern void identify_cpu(struct mn10300_cpuinfo *);
59extern void print_cpu_info(struct mn10300_cpuinfo *);
60extern void dodgy_tsc(void);
61#define cpu_relax() barrier()
62
63/*
64 * User space process size: 1.75GB (default).
65 */
66#define TASK_SIZE 0x70000000
67
68/*
69 * Where to put the userspace stack by default
70 */
71#define STACK_TOP 0x70000000
72#define STACK_TOP_MAX STACK_TOP
73
74/* This decides where the kernel will search for a free chunk of vm
75 * space during mmap's.
76 */
77#define TASK_UNMAPPED_BASE 0x30000000
78
79typedef struct {
80 unsigned long seg;
81} mm_segment_t;
82
83struct fpu_state_struct {
84 unsigned long fs[32]; /* fpu registers */
85 unsigned long fpcr; /* fpu control register */
86};
87
88struct thread_struct {
89 struct pt_regs *uregs; /* userspace register frame */
90 unsigned long pc; /* kernel PC */
91 unsigned long sp; /* kernel SP */
92 unsigned long a3; /* kernel FP */
93 unsigned long wchan;
94 unsigned long usp;
95 struct pt_regs *__frame;
96 unsigned long fpu_flags;
97#define THREAD_USING_FPU 0x00000001 /* T if this task is using the FPU */
98 struct fpu_state_struct fpu_state;
99};
100
101#define INIT_THREAD \
102{ \
103 .uregs = init_uregs, \
104 .pc = 0, \
105 .sp = 0, \
106 .a3 = 0, \
107 .wchan = 0, \
108 .__frame = NULL, \
109}
110
111#define INIT_MMAP \
112{ &init_mm, 0, 0, NULL, PAGE_SHARED, VM_READ | VM_WRITE | VM_EXEC, 1, \
113 NULL, NULL }
114
115/*
116 * do necessary setup to start up a newly executed thread
117 * - need to discard the frame stacked by the kernel thread invoking the execve
118 * syscall (see RESTORE_ALL macro)
119 */
120#define start_thread(regs, new_pc, new_sp) do { \
121 set_fs(USER_DS); \
122 __frame = current->thread.uregs; \
123 __frame->epsw = EPSW_nSL | EPSW_IE | EPSW_IM; \
124 __frame->pc = new_pc; \
125 __frame->sp = new_sp; \
126} while (0)
127
128/* Free all resources held by a thread. */
129extern void release_thread(struct task_struct *);
130
131/* Prepare to copy thread state - unlazy all lazy status */
132extern void prepare_to_copy(struct task_struct *tsk);
133
134/*
135 * create a kernel thread without removing it from tasklists
136 */
137extern int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags);
138
139/*
140 * Return saved PC of a blocked thread.
141 */
142extern unsigned long thread_saved_pc(struct task_struct *tsk);
143
144unsigned long get_wchan(struct task_struct *p);
145
146#define task_pt_regs(task) \
147({ \
148 struct pt_regs *__regs__; \
149 __regs__ = (struct pt_regs *) (KSTK_TOP(task_stack_page(task)) - 8); \
150 __regs__ - 1; \
151})
152
153#define KSTK_EIP(task) (task_pt_regs(task)->pc)
154#define KSTK_ESP(task) (task_pt_regs(task)->sp)
155
156#define KSTK_TOP(info) \
157({ \
158 (unsigned long)(info) + THREAD_SIZE; \
159})
160
161#define ARCH_HAS_PREFETCH
162#define ARCH_HAS_PREFETCHW
163
164static inline void prefetch(const void *x)
165{
166#ifndef CONFIG_MN10300_CACHE_DISABLED
167#ifdef CONFIG_MN10300_PROC_MN103E010
168 asm volatile ("nop; nop; dcpf (%0)" : : "r"(x));
169#else
170 asm volatile ("dcpf (%0)" : : "r"(x));
171#endif
172#endif
173}
174
175static inline void prefetchw(const void *x)
176{
177#ifndef CONFIG_MN10300_CACHE_DISABLED
178#ifdef CONFIG_MN10300_PROC_MN103E010
179 asm volatile ("nop; nop; dcpf (%0)" : : "r"(x));
180#else
181 asm volatile ("dcpf (%0)" : : "r"(x));
182#endif
183#endif
184}
185
186#endif /* _ASM_PROCESSOR_H */
diff --git a/include/asm-mn10300/ptrace.h b/include/asm-mn10300/ptrace.h
deleted file mode 100644
index 7b06cc623d8b..000000000000
--- a/include/asm-mn10300/ptrace.h
+++ /dev/null
@@ -1,103 +0,0 @@
1/* MN10300 Exception frame layout and ptrace constants
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_PTRACE_H
12#define _ASM_PTRACE_H
13
14#define PT_A3 0
15#define PT_A2 1
16#define PT_D3 2
17#define PT_D2 3
18#define PT_MCVF 4
19#define PT_MCRL 5
20#define PT_MCRH 6
21#define PT_MDRQ 7
22#define PT_E1 8
23#define PT_E0 9
24#define PT_E7 10
25#define PT_E6 11
26#define PT_E5 12
27#define PT_E4 13
28#define PT_E3 14
29#define PT_E2 15
30#define PT_SP 16
31#define PT_LAR 17
32#define PT_LIR 18
33#define PT_MDR 19
34#define PT_A1 20
35#define PT_A0 21
36#define PT_D1 22
37#define PT_D0 23
38#define PT_ORIG_D0 24
39#define PT_EPSW 25
40#define PT_PC 26
41#define NR_PTREGS 27
42
43#ifndef __ASSEMBLY__
44/*
45 * This defines the way registers are stored in the event of an exception
46 * - the strange order is due to the MOVM instruction
47 */
48struct pt_regs {
49 unsigned long a3; /* syscall arg 3 */
50 unsigned long a2; /* syscall arg 4 */
51 unsigned long d3; /* syscall arg 5 */
52 unsigned long d2; /* syscall arg 6 */
53 unsigned long mcvf;
54 unsigned long mcrl;
55 unsigned long mcrh;
56 unsigned long mdrq;
57 unsigned long e1;
58 unsigned long e0;
59 unsigned long e7;
60 unsigned long e6;
61 unsigned long e5;
62 unsigned long e4;
63 unsigned long e3;
64 unsigned long e2;
65 unsigned long sp;
66 unsigned long lar;
67 unsigned long lir;
68 unsigned long mdr;
69 unsigned long a1;
70 unsigned long a0; /* syscall arg 1 */
71 unsigned long d1; /* syscall arg 2 */
72 unsigned long d0; /* syscall ret */
73 struct pt_regs *next; /* next frame pointer */
74 unsigned long orig_d0; /* syscall number */
75 unsigned long epsw;
76 unsigned long pc;
77};
78#endif
79
80extern struct pt_regs *__frame; /* current frame pointer */
81
82/* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */
83#define PTRACE_GETREGS 12
84#define PTRACE_SETREGS 13
85#define PTRACE_GETFPREGS 14
86#define PTRACE_SETFPREGS 15
87
88/* options set using PTRACE_SETOPTIONS */
89#define PTRACE_O_TRACESYSGOOD 0x00000001
90
91#if defined(__KERNEL__)
92
93#if !defined(__ASSEMBLY__)
94#define user_mode(regs) (((regs)->epsw & EPSW_nSL) == EPSW_nSL)
95#define instruction_pointer(regs) ((regs)->pc)
96extern void show_regs(struct pt_regs *);
97#endif /* !__ASSEMBLY */
98
99#define profile_pc(regs) ((regs)->pc)
100
101#endif /* __KERNEL__ */
102
103#endif /* _ASM_PTRACE_H */
diff --git a/include/asm-mn10300/reset-regs.h b/include/asm-mn10300/reset-regs.h
deleted file mode 100644
index 174523d50132..000000000000
--- a/include/asm-mn10300/reset-regs.h
+++ /dev/null
@@ -1,64 +0,0 @@
1/* MN10300 Reset controller and watchdog timer definitions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_RESET_REGS_H
13#define _ASM_RESET_REGS_H
14
15#include <asm/cpu-regs.h>
16#include <asm/exceptions.h>
17
18#ifdef __KERNEL__
19
20#ifdef CONFIG_MN10300_WD_TIMER
21#define ARCH_HAS_NMI_WATCHDOG /* See include/linux/nmi.h */
22#endif
23
24/*
25 * watchdog timer registers
26 */
27#define WDBC __SYSREGC(0xc0001000, u8) /* watchdog binary counter reg */
28
29#define WDCTR __SYSREG(0xc0001002, u8) /* watchdog timer control reg */
30#define WDCTR_WDCK 0x07 /* clock source selection */
31#define WDCTR_WDCK_256th 0x00 /* - OSCI/256 */
32#define WDCTR_WDCK_1024th 0x01 /* - OSCI/1024 */
33#define WDCTR_WDCK_2048th 0x02 /* - OSCI/2048 */
34#define WDCTR_WDCK_16384th 0x03 /* - OSCI/16384 */
35#define WDCTR_WDCK_65536th 0x04 /* - OSCI/65536 */
36#define WDCTR_WDRST 0x40 /* binary counter reset */
37#define WDCTR_WDCNE 0x80 /* watchdog timer enable */
38
39#define RSTCTR __SYSREG(0xc0001004, u8) /* reset control reg */
40#define RSTCTR_CHIPRST 0x01 /* chip reset */
41#define RSTCTR_DBFRST 0x02 /* double fault reset flag */
42#define RSTCTR_WDTRST 0x04 /* watchdog timer reset flag */
43#define RSTCTR_WDREN 0x08 /* watchdog timer reset enable */
44
45#ifndef __ASSEMBLY__
46
47static inline void mn10300_proc_hard_reset(void)
48{
49 RSTCTR &= ~RSTCTR_CHIPRST;
50 RSTCTR |= RSTCTR_CHIPRST;
51}
52
53extern unsigned int watchdog_alert_counter;
54
55extern void watchdog_go(void);
56extern asmlinkage void watchdog_handler(void);
57extern asmlinkage
58void watchdog_interrupt(struct pt_regs *, enum exception_code);
59
60#endif
61
62#endif /* __KERNEL__ */
63
64#endif /* _ASM_RESET_REGS_H */
diff --git a/include/asm-mn10300/resource.h b/include/asm-mn10300/resource.h
deleted file mode 100644
index 04bc4db8921b..000000000000
--- a/include/asm-mn10300/resource.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/resource.h>
diff --git a/include/asm-mn10300/rtc-regs.h b/include/asm-mn10300/rtc-regs.h
deleted file mode 100644
index c42deefaec11..000000000000
--- a/include/asm-mn10300/rtc-regs.h
+++ /dev/null
@@ -1,86 +0,0 @@
1/* MN10300 on-chip Real-Time Clock registers
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_RTC_REGS_H
12#define _ASM_RTC_REGS_H
13
14#include <asm/intctl-regs.h>
15
16#ifdef __KERNEL__
17
18#define RTSCR __SYSREG(0xd8600000, u8) /* RTC seconds count reg */
19#define RTSAR __SYSREG(0xd8600001, u8) /* RTC seconds alarm reg */
20#define RTMCR __SYSREG(0xd8600002, u8) /* RTC minutes count reg */
21#define RTMAR __SYSREG(0xd8600003, u8) /* RTC minutes alarm reg */
22#define RTHCR __SYSREG(0xd8600004, u8) /* RTC hours count reg */
23#define RTHAR __SYSREG(0xd8600005, u8) /* RTC hours alarm reg */
24#define RTDWCR __SYSREG(0xd8600006, u8) /* RTC day of the week count reg */
25#define RTDMCR __SYSREG(0xd8600007, u8) /* RTC days count reg */
26#define RTMTCR __SYSREG(0xd8600008, u8) /* RTC months count reg */
27#define RTYCR __SYSREG(0xd8600009, u8) /* RTC years count reg */
28
29#define RTCRA __SYSREG(0xd860000a, u8)/* RTC control reg A */
30#define RTCRA_RS 0x0f /* periodic timer interrupt cycle setting */
31#define RTCRA_RS_NONE 0x00 /* - off */
32#define RTCRA_RS_3_90625ms 0x01 /* - 3.90625ms (1/256s) */
33#define RTCRA_RS_7_8125ms 0x02 /* - 7.8125ms (1/128s) */
34#define RTCRA_RS_122_070us 0x03 /* - 122.070us (1/8192s) */
35#define RTCRA_RS_244_141us 0x04 /* - 244.141us (1/4096s) */
36#define RTCRA_RS_488_281us 0x05 /* - 488.281us (1/2048s) */
37#define RTCRA_RS_976_5625us 0x06 /* - 976.5625us (1/1024s) */
38#define RTCRA_RS_1_953125ms 0x07 /* - 1.953125ms (1/512s) */
39#define RTCRA_RS_3_90624ms 0x08 /* - 3.90624ms (1/256s) */
40#define RTCRA_RS_7_8125ms_b 0x09 /* - 7.8125ms (1/128s) */
41#define RTCRA_RS_15_625ms 0x0a /* - 15.625ms (1/64s) */
42#define RTCRA_RS_31_25ms 0x0b /* - 31.25ms (1/32s) */
43#define RTCRA_RS_62_5ms 0x0c /* - 62.5ms (1/16s) */
44#define RTCRA_RS_125ms 0x0d /* - 125ms (1/8s) */
45#define RTCRA_RS_250ms 0x0e /* - 250ms (1/4s) */
46#define RTCRA_RS_500ms 0x0f /* - 500ms (1/2s) */
47#define RTCRA_DVR 0x40 /* divider reset */
48#define RTCRA_UIP 0x80 /* clock update flag */
49
50#define RTCRB __SYSREG(0xd860000b, u8) /* RTC control reg B */
51#define RTCRB_DSE 0x01 /* daylight savings time enable */
52#define RTCRB_TM 0x02 /* time format */
53#define RTCRB_TM_12HR 0x00 /* - 12 hour format */
54#define RTCRB_TM_24HR 0x02 /* - 24 hour format */
55#define RTCRB_DM 0x04 /* numeric value format */
56#define RTCRB_DM_BCD 0x00 /* - BCD */
57#define RTCRB_DM_BINARY 0x04 /* - binary */
58#define RTCRB_UIE 0x10 /* update interrupt disable */
59#define RTCRB_AIE 0x20 /* alarm interrupt disable */
60#define RTCRB_PIE 0x40 /* periodic interrupt disable */
61#define RTCRB_SET 0x80 /* clock update enable */
62
63#define RTSRC __SYSREG(0xd860000c, u8) /* RTC status reg C */
64#define RTSRC_UF 0x10 /* update end interrupt flag */
65#define RTSRC_AF 0x20 /* alarm interrupt flag */
66#define RTSRC_PF 0x40 /* periodic interrupt flag */
67#define RTSRC_IRQF 0x80 /* interrupt flag */
68
69#define RTIRQ 32
70#define RTICR GxICR(RTIRQ)
71
72/*
73 * MC146818 RTC compatibility defs for the MN10300 on-chip RTC
74 */
75#define RTC_PORT(x) 0xd8600000
76#define RTC_ALWAYS_BCD 1 /* RTC operates in binary mode */
77
78#define CMOS_READ(addr) __SYSREG(0xd8600000 + (addr), u8)
79#define CMOS_WRITE(val, addr) \
80 do { __SYSREG(0xd8600000 + (addr), u8) = val; } while (0)
81
82#define RTC_IRQ RTIRQ
83
84#endif /* __KERNEL__ */
85
86#endif /* _ASM_RTC_REGS_H */
diff --git a/include/asm-mn10300/rtc.h b/include/asm-mn10300/rtc.h
deleted file mode 100644
index c295194cc703..000000000000
--- a/include/asm-mn10300/rtc.h
+++ /dev/null
@@ -1,41 +0,0 @@
1/* MN10300 Real time clock definitions
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_RTC_H
12#define _ASM_RTC_H
13
14#ifdef CONFIG_MN10300_RTC
15
16#include <linux/init.h>
17
18extern void check_rtc_time(void);
19extern void __init calibrate_clock(void);
20extern unsigned long __init get_initial_rtc_time(void);
21
22#else /* !CONFIG_MN10300_RTC */
23
24static inline void check_rtc_time(void)
25{
26}
27
28static inline void calibrate_clock(void)
29{
30}
31
32static inline unsigned long get_initial_rtc_time(void)
33{
34 return 0;
35}
36
37#endif /* !CONFIG_MN10300_RTC */
38
39#include <asm-generic/rtc.h>
40
41#endif /* _ASM_RTC_H */
diff --git a/include/asm-mn10300/scatterlist.h b/include/asm-mn10300/scatterlist.h
deleted file mode 100644
index 67535901b9ff..000000000000
--- a/include/asm-mn10300/scatterlist.h
+++ /dev/null
@@ -1,55 +0,0 @@
1/* MN10300 Scatterlist definitions
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_SCATTERLIST_H
12#define _ASM_SCATTERLIST_H
13
14#include <asm/types.h>
15
16/*
17 * Drivers must set either ->address or (preferred) page and ->offset
18 * to indicate where data must be transferred to/from.
19 *
20 * Using page is recommended since it handles highmem data as well as
21 * low mem. ->address is restricted to data which has a virtual mapping, and
22 * it will go away in the future. Updating to page can be automated very
23 * easily -- something like
24 *
25 * sg->address = some_ptr;
26 *
27 * can be rewritten as
28 *
29 * sg_set_page(virt_to_page(some_ptr));
30 * sg->offset = (unsigned long) some_ptr & ~PAGE_MASK;
31 *
32 * and that's it. There's no excuse for not highmem enabling YOUR driver. /jens
33 */
34struct scatterlist {
35#ifdef CONFIG_DEBUG_SG
36 unsigned long sg_magic;
37#endif
38 unsigned long page_link;
39 unsigned int offset; /* for highmem, page offset */
40 dma_addr_t dma_address;
41 unsigned int length;
42};
43
44#define ISA_DMA_THRESHOLD (0x00ffffff)
45
46/*
47 * These macros should be used after a pci_map_sg call has been done
48 * to get bus addresses of each of the SG entries and their lengths.
49 * You should only work with the number of sg entries pci_map_sg
50 * returns.
51 */
52#define sg_dma_address(sg) ((sg)->dma_address)
53#define sg_dma_len(sg) ((sg)->length)
54
55#endif /* _ASM_SCATTERLIST_H */
diff --git a/include/asm-mn10300/sections.h b/include/asm-mn10300/sections.h
deleted file mode 100644
index 2b8c5160388f..000000000000
--- a/include/asm-mn10300/sections.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/sections.h>
diff --git a/include/asm-mn10300/sembuf.h b/include/asm-mn10300/sembuf.h
deleted file mode 100644
index 301f3f9d8aa9..000000000000
--- a/include/asm-mn10300/sembuf.h
+++ /dev/null
@@ -1,25 +0,0 @@
1#ifndef _ASM_SEMBUF_H
2#define _ASM_SEMBUF_H
3
4/*
5 * The semid64_ds structure for MN10300 architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct semid64_ds {
15 struct ipc64_perm sem_perm; /* permissions .. see ipc.h */
16 __kernel_time_t sem_otime; /* last semop time */
17 unsigned long __unused1;
18 __kernel_time_t sem_ctime; /* last change time */
19 unsigned long __unused2;
20 unsigned long sem_nsems; /* no. of semaphores in array */
21 unsigned long __unused3;
22 unsigned long __unused4;
23};
24
25#endif /* _ASM_SEMBUF_H */
diff --git a/include/asm-mn10300/serial-regs.h b/include/asm-mn10300/serial-regs.h
deleted file mode 100644
index 6498469e93ac..000000000000
--- a/include/asm-mn10300/serial-regs.h
+++ /dev/null
@@ -1,160 +0,0 @@
1/* MN10300 on-board serial port module registers
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_SERIAL_REGS_H
13#define _ASM_SERIAL_REGS_H
14
15#include <asm/cpu-regs.h>
16#include <asm/intctl-regs.h>
17
18#ifdef __KERNEL__
19
20/* serial port 0 */
21#define SC0CTR __SYSREG(0xd4002000, u16) /* control reg */
22#define SC01CTR_CK 0x0007 /* clock source select */
23#define SC0CTR_CK_TM8UFLOW_8 0x0000 /* - 1/8 timer 8 underflow (serial port 0 only) */
24#define SC1CTR_CK_TM9UFLOW_8 0x0000 /* - 1/8 timer 9 underflow (serial port 1 only) */
25#define SC01CTR_CK_IOCLK_8 0x0001 /* - 1/8 IOCLK */
26#define SC01CTR_CK_IOCLK_32 0x0002 /* - 1/32 IOCLK */
27#define SC0CTR_CK_TM2UFLOW_2 0x0003 /* - 1/2 timer 2 underflow (serial port 0 only) */
28#define SC1CTR_CK_TM3UFLOW_2 0x0003 /* - 1/2 timer 3 underflow (serial port 1 only) */
29#define SC0CTR_CK_TM0UFLOW_8 0x0004 /* - 1/8 timer 1 underflow (serial port 0 only) */
30#define SC1CTR_CK_TM1UFLOW_8 0x0004 /* - 1/8 timer 2 underflow (serial port 1 only) */
31#define SC0CTR_CK_TM2UFLOW_8 0x0005 /* - 1/8 timer 2 underflow (serial port 0 only) */
32#define SC1CTR_CK_TM3UFLOW_8 0x0005 /* - 1/8 timer 3 underflow (serial port 1 only) */
33#define SC01CTR_CK_EXTERN_8 0x0006 /* - 1/8 external closk */
34#define SC01CTR_CK_EXTERN 0x0007 /* - external closk */
35#define SC01CTR_STB 0x0008 /* stop bit select */
36#define SC01CTR_STB_1BIT 0x0000 /* - 1 stop bit */
37#define SC01CTR_STB_2BIT 0x0008 /* - 2 stop bits */
38#define SC01CTR_PB 0x0070 /* parity bit select */
39#define SC01CTR_PB_NONE 0x0000 /* - no parity */
40#define SC01CTR_PB_FIXED0 0x0040 /* - fixed at 0 */
41#define SC01CTR_PB_FIXED1 0x0050 /* - fixed at 1 */
42#define SC01CTR_PB_EVEN 0x0060 /* - even parity */
43#define SC01CTR_PB_ODD 0x0070 /* - odd parity */
44#define SC01CTR_CLN 0x0080 /* character length */
45#define SC01CTR_CLN_7BIT 0x0000 /* - 7 bit chars */
46#define SC01CTR_CLN_8BIT 0x0080 /* - 8 bit chars */
47#define SC01CTR_TOE 0x0100 /* T input output enable */
48#define SC01CTR_OD 0x0200 /* bit order select */
49#define SC01CTR_OD_LSBFIRST 0x0000 /* - LSB first */
50#define SC01CTR_OD_MSBFIRST 0x0200 /* - MSB first */
51#define SC01CTR_MD 0x0c00 /* mode select */
52#define SC01CTR_MD_STST_SYNC 0x0000 /* - start-stop synchronous */
53#define SC01CTR_MD_CLOCK_SYNC1 0x0400 /* - clock synchronous 1 */
54#define SC01CTR_MD_I2C 0x0800 /* - I2C mode */
55#define SC01CTR_MD_CLOCK_SYNC2 0x0c00 /* - clock synchronous 2 */
56#define SC01CTR_IIC 0x1000 /* I2C mode select */
57#define SC01CTR_BKE 0x2000 /* break transmit enable */
58#define SC01CTR_RXE 0x4000 /* receive enable */
59#define SC01CTR_TXE 0x8000 /* transmit enable */
60
61#define SC0ICR __SYSREG(0xd4002004, u8) /* interrupt control reg */
62#define SC01ICR_DMD 0x80 /* output data mode */
63#define SC01ICR_TD 0x20 /* transmit DMA trigger cause */
64#define SC01ICR_TI 0x10 /* transmit interrupt cause */
65#define SC01ICR_RES 0x04 /* receive error select */
66#define SC01ICR_RI 0x01 /* receive interrupt cause */
67
68#define SC0TXB __SYSREG(0xd4002008, u8) /* transmit buffer reg */
69#define SC0RXB __SYSREG(0xd4002009, u8) /* receive buffer reg */
70
71#define SC0STR __SYSREG(0xd400200c, u16) /* status reg */
72#define SC01STR_OEF 0x0001 /* overrun error found */
73#define SC01STR_PEF 0x0002 /* parity error found */
74#define SC01STR_FEF 0x0004 /* framing error found */
75#define SC01STR_RBF 0x0010 /* receive buffer status */
76#define SC01STR_TBF 0x0020 /* transmit buffer status */
77#define SC01STR_RXF 0x0040 /* receive status */
78#define SC01STR_TXF 0x0080 /* transmit status */
79#define SC01STR_STF 0x0100 /* I2C start sequence found */
80#define SC01STR_SPF 0x0200 /* I2C stop sequence found */
81
82#define SC0RXIRQ 20 /* timer 0 Receive IRQ */
83#define SC0TXIRQ 21 /* timer 0 Transmit IRQ */
84
85#define SC0RXICR GxICR(SC0RXIRQ) /* serial 0 receive intr ctrl reg */
86#define SC0TXICR GxICR(SC0TXIRQ) /* serial 0 transmit intr ctrl reg */
87
88/* serial port 1 */
89#define SC1CTR __SYSREG(0xd4002010, u16) /* serial port 1 control */
90#define SC1ICR __SYSREG(0xd4002014, u8) /* interrupt control reg */
91#define SC1TXB __SYSREG(0xd4002018, u8) /* transmit buffer reg */
92#define SC1RXB __SYSREG(0xd4002019, u8) /* receive buffer reg */
93#define SC1STR __SYSREG(0xd400201c, u16) /* status reg */
94
95#define SC1RXIRQ 22 /* timer 1 Receive IRQ */
96#define SC1TXIRQ 23 /* timer 1 Transmit IRQ */
97
98#define SC1RXICR GxICR(SC1RXIRQ) /* serial 1 receive intr ctrl reg */
99#define SC1TXICR GxICR(SC1TXIRQ) /* serial 1 transmit intr ctrl reg */
100
101/* serial port 2 */
102#define SC2CTR __SYSREG(0xd4002020, u16) /* control reg */
103#define SC2CTR_CK 0x0003 /* clock source select */
104#define SC2CTR_CK_TM10UFLOW 0x0000 /* - timer 10 underflow */
105#define SC2CTR_CK_TM2UFLOW 0x0001 /* - timer 2 underflow */
106#define SC2CTR_CK_EXTERN 0x0002 /* - external closk */
107#define SC2CTR_CK_TM3UFLOW 0x0003 /* - timer 3 underflow */
108#define SC2CTR_STB 0x0008 /* stop bit select */
109#define SC2CTR_STB_1BIT 0x0000 /* - 1 stop bit */
110#define SC2CTR_STB_2BIT 0x0008 /* - 2 stop bits */
111#define SC2CTR_PB 0x0070 /* parity bit select */
112#define SC2CTR_PB_NONE 0x0000 /* - no parity */
113#define SC2CTR_PB_FIXED0 0x0040 /* - fixed at 0 */
114#define SC2CTR_PB_FIXED1 0x0050 /* - fixed at 1 */
115#define SC2CTR_PB_EVEN 0x0060 /* - even parity */
116#define SC2CTR_PB_ODD 0x0070 /* - odd parity */
117#define SC2CTR_CLN 0x0080 /* character length */
118#define SC2CTR_CLN_7BIT 0x0000 /* - 7 bit chars */
119#define SC2CTR_CLN_8BIT 0x0080 /* - 8 bit chars */
120#define SC2CTR_TWE 0x0100 /* transmit wait enable (enable XCTS control) */
121#define SC2CTR_OD 0x0200 /* bit order select */
122#define SC2CTR_OD_LSBFIRST 0x0000 /* - LSB first */
123#define SC2CTR_OD_MSBFIRST 0x0200 /* - MSB first */
124#define SC2CTR_TWS 0x1000 /* transmit wait select */
125#define SC2CTR_TWS_XCTS_HIGH 0x0000 /* - interrupt TX when XCTS high */
126#define SC2CTR_TWS_XCTS_LOW 0x1000 /* - interrupt TX when XCTS low */
127#define SC2CTR_BKE 0x2000 /* break transmit enable */
128#define SC2CTR_RXE 0x4000 /* receive enable */
129#define SC2CTR_TXE 0x8000 /* transmit enable */
130
131#define SC2ICR __SYSREG(0xd4002024, u8) /* interrupt control reg */
132#define SC2ICR_TD 0x20 /* transmit DMA trigger cause */
133#define SC2ICR_TI 0x10 /* transmit interrupt cause */
134#define SC2ICR_RES 0x04 /* receive error select */
135#define SC2ICR_RI 0x01 /* receive interrupt cause */
136
137#define SC2TXB __SYSREG(0xd4002018, u8) /* transmit buffer reg */
138#define SC2RXB __SYSREG(0xd4002019, u8) /* receive buffer reg */
139#define SC2STR __SYSREG(0xd400201c, u8) /* status reg */
140#define SC2STR_OEF 0x0001 /* overrun error found */
141#define SC2STR_PEF 0x0002 /* parity error found */
142#define SC2STR_FEF 0x0004 /* framing error found */
143#define SC2STR_CTS 0x0008 /* XCTS input pin status (0 means high) */
144#define SC2STR_RBF 0x0010 /* receive buffer status */
145#define SC2STR_TBF 0x0020 /* transmit buffer status */
146#define SC2STR_RXF 0x0040 /* receive status */
147#define SC2STR_TXF 0x0080 /* transmit status */
148
149#define SC2TIM __SYSREG(0xd400202d, u8) /* status reg */
150
151#define SC2RXIRQ 24 /* serial 2 Receive IRQ */
152#define SC2TXIRQ 25 /* serial 2 Transmit IRQ */
153
154#define SC2RXICR GxICR(SC2RXIRQ) /* serial 2 receive intr ctrl reg */
155#define SC2TXICR GxICR(SC2TXIRQ) /* serial 2 transmit intr ctrl reg */
156
157
158#endif /* __KERNEL__ */
159
160#endif /* _ASM_SERIAL_REGS_H */
diff --git a/include/asm-mn10300/serial.h b/include/asm-mn10300/serial.h
deleted file mode 100644
index 99785a9deadb..000000000000
--- a/include/asm-mn10300/serial.h
+++ /dev/null
@@ -1,36 +0,0 @@
1/* Standard UART definitions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12/*
13 * The ASB2305 has an 18.432 MHz clock the UART
14 */
15#define BASE_BAUD (18432000 / 16)
16
17/* Standard COM flags (except for COM4, because of the 8514 problem) */
18#ifdef CONFIG_SERIAL_DETECT_IRQ
19#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST | ASYNC_AUTO_IRQ)
20#define STD_COM4_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_AUTO_IRQ)
21#else
22#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
23#define STD_COM4_FLAGS ASYNC_BOOT_AUTOCONF
24#endif
25
26#ifdef CONFIG_SERIAL_MANY_PORTS
27#define FOURPORT_FLAGS ASYNC_FOURPORT
28#define ACCENT_FLAGS 0
29#define BOCA_FLAGS 0
30#define HUB6_FLAGS 0
31#define RS_TABLE_SIZE 64
32#else
33#define RS_TABLE_SIZE
34#endif
35
36#include <asm/unit/serial.h>
diff --git a/include/asm-mn10300/setup.h b/include/asm-mn10300/setup.h
deleted file mode 100644
index 08356c832283..000000000000
--- a/include/asm-mn10300/setup.h
+++ /dev/null
@@ -1,17 +0,0 @@
1/* MN10300 Setup declarations
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_SETUP_H
12#define _ASM_SETUP_H
13
14extern void __init unit_setup(void);
15extern void __init unit_init_IRQ(void);
16
17#endif /* _ASM_SETUP_H */
diff --git a/include/asm-mn10300/shmbuf.h b/include/asm-mn10300/shmbuf.h
deleted file mode 100644
index 8f300cc35d6c..000000000000
--- a/include/asm-mn10300/shmbuf.h
+++ /dev/null
@@ -1,42 +0,0 @@
1#ifndef _ASM_SHMBUF_H
2#define _ASM_SHMBUF_H
3
4/*
5 * The shmid64_ds structure for MN10300 architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct shmid64_ds {
15 struct ipc64_perm shm_perm; /* operation perms */
16 size_t shm_segsz; /* size of segment (bytes) */
17 __kernel_time_t shm_atime; /* last attach time */
18 unsigned long __unused1;
19 __kernel_time_t shm_dtime; /* last detach time */
20 unsigned long __unused2;
21 __kernel_time_t shm_ctime; /* last change time */
22 unsigned long __unused3;
23 __kernel_pid_t shm_cpid; /* pid of creator */
24 __kernel_pid_t shm_lpid; /* pid of last operator */
25 unsigned long shm_nattch; /* no. of current attaches */
26 unsigned long __unused4;
27 unsigned long __unused5;
28};
29
30struct shminfo64 {
31 unsigned long shmmax;
32 unsigned long shmmin;
33 unsigned long shmmni;
34 unsigned long shmseg;
35 unsigned long shmall;
36 unsigned long __unused1;
37 unsigned long __unused2;
38 unsigned long __unused3;
39 unsigned long __unused4;
40};
41
42#endif /* _ASM_SHMBUF_H */
diff --git a/include/asm-mn10300/shmparam.h b/include/asm-mn10300/shmparam.h
deleted file mode 100644
index ab666ed1a070..000000000000
--- a/include/asm-mn10300/shmparam.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef _ASM_SHMPARAM_H
2#define _ASM_SHMPARAM_H
3
4#define SHMLBA PAGE_SIZE /* attach addr a multiple of this */
5
6#endif /* _ASM_SHMPARAM_H */
diff --git a/include/asm-mn10300/sigcontext.h b/include/asm-mn10300/sigcontext.h
deleted file mode 100644
index 4de3afff4ad7..000000000000
--- a/include/asm-mn10300/sigcontext.h
+++ /dev/null
@@ -1,52 +0,0 @@
1/* MN10300 Userspace signal context
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_SIGCONTEXT_H
12#define _ASM_SIGCONTEXT_H
13
14struct fpucontext {
15 /* Regular FPU environment */
16 unsigned long fs[32]; /* fpu registers */
17 unsigned long fpcr; /* fpu control register */
18};
19
20struct sigcontext {
21 unsigned long d0;
22 unsigned long d1;
23 unsigned long d2;
24 unsigned long d3;
25 unsigned long a0;
26 unsigned long a1;
27 unsigned long a2;
28 unsigned long a3;
29 unsigned long e0;
30 unsigned long e1;
31 unsigned long e2;
32 unsigned long e3;
33 unsigned long e4;
34 unsigned long e5;
35 unsigned long e6;
36 unsigned long e7;
37 unsigned long lar;
38 unsigned long lir;
39 unsigned long mdr;
40 unsigned long mcvf;
41 unsigned long mcrl;
42 unsigned long mcrh;
43 unsigned long mdrq;
44 unsigned long sp;
45 unsigned long epsw;
46 unsigned long pc;
47 struct fpucontext *fpucontext;
48 unsigned long oldmask;
49};
50
51
52#endif /* _ASM_SIGCONTEXT_H */
diff --git a/include/asm-mn10300/siginfo.h b/include/asm-mn10300/siginfo.h
deleted file mode 100644
index 0815d29d82e5..000000000000
--- a/include/asm-mn10300/siginfo.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/siginfo.h>
diff --git a/include/asm-mn10300/signal.h b/include/asm-mn10300/signal.h
deleted file mode 100644
index e98817cec5f7..000000000000
--- a/include/asm-mn10300/signal.h
+++ /dev/null
@@ -1,171 +0,0 @@
1/* MN10300 Signal definitions
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_SIGNAL_H
12#define _ASM_SIGNAL_H
13
14#include <linux/types.h>
15
16/* Avoid too many header ordering problems. */
17struct siginfo;
18
19#ifdef __KERNEL__
20/* Most things should be clean enough to redefine this at will, if care
21 is taken to make libc match. */
22
23#define _NSIG 64
24#define _NSIG_BPW 32
25#define _NSIG_WORDS (_NSIG / _NSIG_BPW)
26
27typedef unsigned long old_sigset_t; /* at least 32 bits */
28
29typedef struct {
30 unsigned long sig[_NSIG_WORDS];
31} sigset_t;
32
33#else
34/* Here we must cater to libcs that poke about in kernel headers. */
35
36#define NSIG 32
37typedef unsigned long sigset_t;
38
39#endif /* __KERNEL__ */
40
41#define SIGHUP 1
42#define SIGINT 2
43#define SIGQUIT 3
44#define SIGILL 4
45#define SIGTRAP 5
46#define SIGABRT 6
47#define SIGIOT 6
48#define SIGBUS 7
49#define SIGFPE 8
50#define SIGKILL 9
51#define SIGUSR1 10
52#define SIGSEGV 11
53#define SIGUSR2 12
54#define SIGPIPE 13
55#define SIGALRM 14
56#define SIGTERM 15
57#define SIGSTKFLT 16
58#define SIGCHLD 17
59#define SIGCONT 18
60#define SIGSTOP 19
61#define SIGTSTP 20
62#define SIGTTIN 21
63#define SIGTTOU 22
64#define SIGURG 23
65#define SIGXCPU 24
66#define SIGXFSZ 25
67#define SIGVTALRM 26
68#define SIGPROF 27
69#define SIGWINCH 28
70#define SIGIO 29
71#define SIGPOLL SIGIO
72/*
73#define SIGLOST 29
74*/
75#define SIGPWR 30
76#define SIGSYS 31
77#define SIGUNUSED 31
78
79/* These should not be considered constants from userland. */
80#define SIGRTMIN 32
81#define SIGRTMAX (_NSIG-1)
82
83/*
84 * SA_FLAGS values:
85 *
86 * SA_ONSTACK indicates that a registered stack_t will be used.
87 * SA_RESTART flag to get restarting signals (which were the default long ago)
88 * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
89 * SA_RESETHAND clears the handler when the signal is delivered.
90 * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
91 * SA_NODEFER prevents the current signal from being masked in the handler.
92 *
93 * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
94 * Unix names RESETHAND and NODEFER respectively.
95 */
96#define SA_NOCLDSTOP 0x00000001U
97#define SA_NOCLDWAIT 0x00000002U
98#define SA_SIGINFO 0x00000004U
99#define SA_ONSTACK 0x08000000U
100#define SA_RESTART 0x10000000U
101#define SA_NODEFER 0x40000000U
102#define SA_RESETHAND 0x80000000U
103
104#define SA_NOMASK SA_NODEFER
105#define SA_ONESHOT SA_RESETHAND
106
107#define SA_RESTORER 0x04000000
108
109/*
110 * sigaltstack controls
111 */
112#define SS_ONSTACK 1
113#define SS_DISABLE 2
114
115#define MINSIGSTKSZ 2048
116#define SIGSTKSZ 8192
117
118#include <asm-generic/signal.h>
119
120#ifdef __KERNEL__
121struct old_sigaction {
122 __sighandler_t sa_handler;
123 old_sigset_t sa_mask;
124 unsigned long sa_flags;
125 __sigrestore_t sa_restorer;
126};
127
128struct sigaction {
129 __sighandler_t sa_handler;
130 unsigned long sa_flags;
131 __sigrestore_t sa_restorer;
132 sigset_t sa_mask; /* mask last for extensibility */
133};
134
135struct k_sigaction {
136 struct sigaction sa;
137};
138#else
139/* Here we must cater to libcs that poke about in kernel headers. */
140
141struct sigaction {
142 union {
143 __sighandler_t _sa_handler;
144 void (*_sa_sigaction)(int, struct siginfo *, void *);
145 } _u;
146 sigset_t sa_mask;
147 unsigned long sa_flags;
148 void (*sa_restorer)(void);
149};
150
151#define sa_handler _u._sa_handler
152#define sa_sigaction _u._sa_sigaction
153
154#endif /* __KERNEL__ */
155
156typedef struct sigaltstack {
157 void __user *ss_sp;
158 int ss_flags;
159 size_t ss_size;
160} stack_t;
161
162#ifdef __KERNEL__
163#include <asm/sigcontext.h>
164
165
166struct pt_regs;
167#define ptrace_signal_deliver(regs, cookie) do { } while (0)
168
169#endif /* __KERNEL__ */
170
171#endif /* _ASM_SIGNAL_H */
diff --git a/include/asm-mn10300/smp.h b/include/asm-mn10300/smp.h
deleted file mode 100644
index 4eb8c61b7dab..000000000000
--- a/include/asm-mn10300/smp.h
+++ /dev/null
@@ -1,18 +0,0 @@
1/* MN10300 SMP support
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_SMP_H
12#define _ASM_SMP_H
13
14#ifdef CONFIG_SMP
15#error SMP not yet supported for MN10300
16#endif
17
18#endif
diff --git a/include/asm-mn10300/socket.h b/include/asm-mn10300/socket.h
deleted file mode 100644
index fb5daf438ec9..000000000000
--- a/include/asm-mn10300/socket.h
+++ /dev/null
@@ -1,60 +0,0 @@
1#ifndef _ASM_SOCKET_H
2#define _ASM_SOCKET_H
3
4#include <asm/sockios.h>
5
6/* For setsockopt(2) */
7#define SOL_SOCKET 1
8
9#define SO_DEBUG 1
10#define SO_REUSEADDR 2
11#define SO_TYPE 3
12#define SO_ERROR 4
13#define SO_DONTROUTE 5
14#define SO_BROADCAST 6
15#define SO_SNDBUF 7
16#define SO_RCVBUF 8
17#define SO_SNDBUFFORCE 32
18#define SO_RCVBUFFORCE 33
19#define SO_KEEPALIVE 9
20#define SO_OOBINLINE 10
21#define SO_NO_CHECK 11
22#define SO_PRIORITY 12
23#define SO_LINGER 13
24#define SO_BSDCOMPAT 14
25/* To add :#define SO_REUSEPORT 15 */
26#define SO_PASSCRED 16
27#define SO_PEERCRED 17
28#define SO_RCVLOWAT 18
29#define SO_SNDLOWAT 19
30#define SO_RCVTIMEO 20
31#define SO_SNDTIMEO 21
32
33/* Security levels - as per NRL IPv6 - don't actually do anything */
34#define SO_SECURITY_AUTHENTICATION 22
35#define SO_SECURITY_ENCRYPTION_TRANSPORT 23
36#define SO_SECURITY_ENCRYPTION_NETWORK 24
37
38#define SO_BINDTODEVICE 25
39
40/* Socket filtering */
41#define SO_ATTACH_FILTER 26
42#define SO_DETACH_FILTER 27
43
44#define SO_PEERNAME 28
45#define SO_TIMESTAMP 29
46#define SCM_TIMESTAMP SO_TIMESTAMP
47
48#define SO_ACCEPTCONN 30
49
50#define SO_PEERSEC 31
51#define SO_PASSSEC 34
52#define SO_TIMESTAMPNS 35
53#define SCM_TIMESTAMPNS SO_TIMESTAMPNS
54
55#define SO_MARK 36
56
57#define SO_TIMESTAMPING 37
58#define SCM_TIMESTAMPING SO_TIMESTAMPING
59
60#endif /* _ASM_SOCKET_H */
diff --git a/include/asm-mn10300/sockios.h b/include/asm-mn10300/sockios.h
deleted file mode 100644
index b03043a1c564..000000000000
--- a/include/asm-mn10300/sockios.h
+++ /dev/null
@@ -1,13 +0,0 @@
1#ifndef _ASM_SOCKIOS_H
2#define _ASM_SOCKIOS_H
3
4/* Socket-level I/O control calls. */
5#define FIOSETOWN 0x8901
6#define SIOCSPGRP 0x8902
7#define FIOGETOWN 0x8903
8#define SIOCGPGRP 0x8904
9#define SIOCATMARK 0x8905
10#define SIOCGSTAMP 0x8906 /* Get stamp */
11#define SIOCGSTAMPNS 0x8907 /* Get stamp (timespec) */
12
13#endif /* _ASM_SOCKIOS_H */
diff --git a/include/asm-mn10300/spinlock.h b/include/asm-mn10300/spinlock.h
deleted file mode 100644
index 4bf9c8b169e0..000000000000
--- a/include/asm-mn10300/spinlock.h
+++ /dev/null
@@ -1,16 +0,0 @@
1/* MN10300 spinlock support
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_SPINLOCK_H
12#define _ASM_SPINLOCK_H
13
14#error SMP spinlocks not implemented for MN10300
15
16#endif /* _ASM_SPINLOCK_H */
diff --git a/include/asm-mn10300/stat.h b/include/asm-mn10300/stat.h
deleted file mode 100644
index 63ff8371cf2c..000000000000
--- a/include/asm-mn10300/stat.h
+++ /dev/null
@@ -1,78 +0,0 @@
1#ifndef _ASM_STAT_H
2#define _ASM_STAT_H
3
4struct __old_kernel_stat {
5 unsigned short st_dev;
6 unsigned short st_ino;
7 unsigned short st_mode;
8 unsigned short st_nlink;
9 unsigned short st_uid;
10 unsigned short st_gid;
11 unsigned short st_rdev;
12 unsigned long st_size;
13 unsigned long st_atime;
14 unsigned long st_mtime;
15 unsigned long st_ctime;
16};
17
18struct stat {
19 unsigned long st_dev;
20 unsigned long st_ino;
21 unsigned short st_mode;
22 unsigned short st_nlink;
23 unsigned short st_uid;
24 unsigned short st_gid;
25 unsigned long st_rdev;
26 unsigned long st_size;
27 unsigned long st_blksize;
28 unsigned long st_blocks;
29 unsigned long st_atime;
30 unsigned long st_atime_nsec;
31 unsigned long st_mtime;
32 unsigned long st_mtime_nsec;
33 unsigned long st_ctime;
34 unsigned long st_ctime_nsec;
35 unsigned long __unused4;
36 unsigned long __unused5;
37};
38
39/* This matches struct stat64 in glibc2.1, hence the absolutely
40 * insane amounts of padding around dev_t's.
41 */
42struct stat64 {
43 unsigned long long st_dev;
44 unsigned char __pad0[4];
45
46#define STAT64_HAS_BROKEN_ST_INO 1
47 unsigned long __st_ino;
48
49 unsigned int st_mode;
50 unsigned int st_nlink;
51
52 unsigned long st_uid;
53 unsigned long st_gid;
54
55 unsigned long long st_rdev;
56 unsigned char __pad3[4];
57
58 long long st_size;
59 unsigned long st_blksize;
60
61 unsigned long st_blocks; /* Number 512-byte blocks allocated. */
62 unsigned long __pad4; /* future possible st_blocks high bits */
63
64 unsigned long st_atime;
65 unsigned long st_atime_nsec;
66
67 unsigned long st_mtime;
68 unsigned int st_mtime_nsec;
69
70 unsigned long st_ctime;
71 unsigned long st_ctime_nsec;
72
73 unsigned long long st_ino;
74};
75
76#define STAT_HAVE_NSEC 1
77
78#endif /* _ASM_STAT_H */
diff --git a/include/asm-mn10300/statfs.h b/include/asm-mn10300/statfs.h
deleted file mode 100644
index 0b91fe198c20..000000000000
--- a/include/asm-mn10300/statfs.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/statfs.h>
diff --git a/include/asm-mn10300/string.h b/include/asm-mn10300/string.h
deleted file mode 100644
index 47dbd4346c32..000000000000
--- a/include/asm-mn10300/string.h
+++ /dev/null
@@ -1,32 +0,0 @@
1/* MN10300 Optimised string functions
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 * Modified by David Howells (dhowells@redhat.com)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12#ifndef _ASM_STRING_H
13#define _ASM_STRING_H
14
15#define __HAVE_ARCH_MEMSET
16#define __HAVE_ARCH_MEMCPY
17#define __HAVE_ARCH_MEMMOVE
18
19extern void *memset(void *dest, int ch, size_t count);
20extern void *memcpy(void *dest, const void *src, size_t count);
21extern void *memmove(void *dest, const void *src, size_t count);
22
23
24extern void __struct_cpy_bug(void);
25#define struct_cpy(x, y) \
26({ \
27 if (sizeof(*(x)) != sizeof(*(y))) \
28 __struct_cpy_bug; \
29 memcpy(x, y, sizeof(*(x))); \
30})
31
32#endif /* _ASM_STRING_H */
diff --git a/include/asm-mn10300/swab.h b/include/asm-mn10300/swab.h
deleted file mode 100644
index bd818a820ca8..000000000000
--- a/include/asm-mn10300/swab.h
+++ /dev/null
@@ -1,42 +0,0 @@
1/* MN10300 Byte-order primitive construction
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_SWAB_H
12#define _ASM_SWAB_H
13
14#include <linux/types.h>
15
16#ifdef __GNUC__
17
18static inline __attribute__((const))
19__u32 __arch_swab32(__u32 x)
20{
21 __u32 ret;
22 asm("swap %1,%0" : "=r" (ret) : "r" (x));
23 return ret;
24}
25#define __arch_swab32 __arch_swab32
26
27static inline __attribute__((const))
28__u16 __arch_swab16(__u16 x)
29{
30 __u16 ret;
31 asm("swaph %1,%0" : "=r" (ret) : "r" (x));
32 return ret;
33}
34#define __arch_swab32 __arch_swab32
35
36#if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
37# define __SWAB_64_THRU_32__
38#endif
39
40#endif /* __GNUC__ */
41
42#endif /* _ASM_SWAB_H */
diff --git a/include/asm-mn10300/system.h b/include/asm-mn10300/system.h
deleted file mode 100644
index 8214fb7e7fe4..000000000000
--- a/include/asm-mn10300/system.h
+++ /dev/null
@@ -1,237 +0,0 @@
1/* MN10300 System definitions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_SYSTEM_H
12#define _ASM_SYSTEM_H
13
14#include <asm/cpu-regs.h>
15
16#ifdef __KERNEL__
17#ifndef __ASSEMBLY__
18
19#include <linux/kernel.h>
20
21struct task_struct;
22struct thread_struct;
23
24extern asmlinkage
25struct task_struct *__switch_to(struct thread_struct *prev,
26 struct thread_struct *next,
27 struct task_struct *prev_task);
28
29/* context switching is now performed out-of-line in switch_to.S */
30#define switch_to(prev, next, last) \
31do { \
32 current->thread.wchan = (u_long) __builtin_return_address(0); \
33 (last) = __switch_to(&(prev)->thread, &(next)->thread, (prev)); \
34 mb(); \
35 current->thread.wchan = 0; \
36} while (0)
37
38#define arch_align_stack(x) (x)
39
40#define nop() asm volatile ("nop")
41
42#endif /* !__ASSEMBLY__ */
43
44/*
45 * Force strict CPU ordering.
46 * And yes, this is required on UP too when we're talking
47 * to devices.
48 *
49 * For now, "wmb()" doesn't actually do anything, as all
50 * Intel CPU's follow what Intel calls a *Processor Order*,
51 * in which all writes are seen in the program order even
52 * outside the CPU.
53 *
54 * I expect future Intel CPU's to have a weaker ordering,
55 * but I'd also expect them to finally get their act together
56 * and add some real memory barriers if so.
57 *
58 * Some non intel clones support out of order store. wmb() ceases to be a
59 * nop for these.
60 */
61
62#define mb() asm volatile ("": : :"memory")
63#define rmb() mb()
64#define wmb() asm volatile ("": : :"memory")
65
66#ifdef CONFIG_SMP
67#define smp_mb() mb()
68#define smp_rmb() rmb()
69#define smp_wmb() wmb()
70#else
71#define smp_mb() barrier()
72#define smp_rmb() barrier()
73#define smp_wmb() barrier()
74#endif
75
76#define set_mb(var, value) do { var = value; mb(); } while (0)
77#define set_wmb(var, value) do { var = value; wmb(); } while (0)
78
79#define read_barrier_depends() do {} while (0)
80#define smp_read_barrier_depends() do {} while (0)
81
82/*****************************************************************************/
83/*
84 * interrupt control
85 * - "disabled": run in IM1/2
86 * - level 0 - GDB stub
87 * - level 1 - virtual serial DMA (if present)
88 * - level 5 - normal interrupt priority
89 * - level 6 - timer interrupt
90 * - "enabled": run in IM7
91 */
92#ifdef CONFIG_MN10300_TTYSM
93#define MN10300_CLI_LEVEL EPSW_IM_2
94#else
95#define MN10300_CLI_LEVEL EPSW_IM_1
96#endif
97
98#define local_save_flags(x) \
99do { \
100 typecheck(unsigned long, x); \
101 asm volatile( \
102 " mov epsw,%0 \n" \
103 : "=d"(x) \
104 ); \
105} while (0)
106
107#define local_irq_disable() \
108do { \
109 asm volatile( \
110 " and %0,epsw \n" \
111 " or %1,epsw \n" \
112 " nop \n" \
113 " nop \n" \
114 " nop \n" \
115 : \
116 : "i"(~EPSW_IM), "i"(EPSW_IE | MN10300_CLI_LEVEL) \
117 ); \
118} while (0)
119
120#define local_irq_save(x) \
121do { \
122 local_save_flags(x); \
123 local_irq_disable(); \
124} while (0)
125
126/*
127 * we make sure local_irq_enable() doesn't cause priority inversion
128 */
129#ifndef __ASSEMBLY__
130
131extern unsigned long __mn10300_irq_enabled_epsw;
132
133#endif
134
135#define local_irq_enable() \
136do { \
137 unsigned long tmp; \
138 \
139 asm volatile( \
140 " mov epsw,%0 \n" \
141 " and %1,%0 \n" \
142 " or %2,%0 \n" \
143 " mov %0,epsw \n" \
144 : "=&d"(tmp) \
145 : "i"(~EPSW_IM), "r"(__mn10300_irq_enabled_epsw) \
146 ); \
147} while (0)
148
149#define local_irq_restore(x) \
150do { \
151 typecheck(unsigned long, x); \
152 asm volatile( \
153 " mov %0,epsw \n" \
154 " nop \n" \
155 " nop \n" \
156 " nop \n" \
157 : \
158 : "d"(x) \
159 : "memory", "cc" \
160 ); \
161} while (0)
162
163#define irqs_disabled() \
164({ \
165 unsigned long flags; \
166 local_save_flags(flags); \
167 (flags & EPSW_IM) <= MN10300_CLI_LEVEL; \
168})
169
170/* hook to save power by halting the CPU
171 * - called from the idle loop
172 * - must reenable interrupts (which takes three instruction cycles to complete)
173 */
174#define safe_halt() \
175do { \
176 asm volatile(" or %0,epsw \n" \
177 " nop \n" \
178 " nop \n" \
179 " bset %2,(%1) \n" \
180 : \
181 : "i"(EPSW_IE|EPSW_IM), "n"(&CPUM), "i"(CPUM_SLEEP)\
182 : "cc" \
183 ); \
184} while (0)
185
186#define STI or EPSW_IE|EPSW_IM,epsw
187#define CLI and ~EPSW_IM,epsw; or EPSW_IE|MN10300_CLI_LEVEL,epsw; nop; nop; nop
188
189/*****************************************************************************/
190/*
191 * MN10300 doesn't actually have an exchange instruction
192 */
193#ifndef __ASSEMBLY__
194
195struct __xchg_dummy { unsigned long a[100]; };
196#define __xg(x) ((struct __xchg_dummy *)(x))
197
198static inline
199unsigned long __xchg(volatile unsigned long *m, unsigned long val)
200{
201 unsigned long retval;
202 unsigned long flags;
203
204 local_irq_save(flags);
205 retval = *m;
206 *m = val;
207 local_irq_restore(flags);
208 return retval;
209}
210
211#define xchg(ptr, v) \
212 ((__typeof__(*(ptr))) __xchg((unsigned long *)(ptr), \
213 (unsigned long)(v)))
214
215static inline unsigned long __cmpxchg(volatile unsigned long *m,
216 unsigned long old, unsigned long new)
217{
218 unsigned long retval;
219 unsigned long flags;
220
221 local_irq_save(flags);
222 retval = *m;
223 if (retval == old)
224 *m = new;
225 local_irq_restore(flags);
226 return retval;
227}
228
229#define cmpxchg(ptr, o, n) \
230 ((__typeof__(*(ptr))) __cmpxchg((unsigned long *)(ptr), \
231 (unsigned long)(o), \
232 (unsigned long)(n)))
233
234#endif /* !__ASSEMBLY__ */
235
236#endif /* __KERNEL__ */
237#endif /* _ASM_SYSTEM_H */
diff --git a/include/asm-mn10300/termbits.h b/include/asm-mn10300/termbits.h
deleted file mode 100644
index eb2b0dc1f696..000000000000
--- a/include/asm-mn10300/termbits.h
+++ /dev/null
@@ -1,200 +0,0 @@
1#ifndef _ASM_TERMBITS_H
2#define _ASM_TERMBITS_H
3
4#include <linux/posix_types.h>
5
6typedef unsigned char cc_t;
7typedef unsigned int speed_t;
8typedef unsigned int tcflag_t;
9
10#define NCCS 19
11struct termios {
12 tcflag_t c_iflag; /* input mode flags */
13 tcflag_t c_oflag; /* output mode flags */
14 tcflag_t c_cflag; /* control mode flags */
15 tcflag_t c_lflag; /* local mode flags */
16 cc_t c_line; /* line discipline */
17 cc_t c_cc[NCCS]; /* control characters */
18};
19
20struct termios2 {
21 tcflag_t c_iflag; /* input mode flags */
22 tcflag_t c_oflag; /* output mode flags */
23 tcflag_t c_cflag; /* control mode flags */
24 tcflag_t c_lflag; /* local mode flags */
25 cc_t c_line; /* line discipline */
26 cc_t c_cc[NCCS]; /* control characters */
27 speed_t c_ispeed; /* input speed */
28 speed_t c_ospeed; /* output speed */
29};
30
31struct ktermios {
32 tcflag_t c_iflag; /* input mode flags */
33 tcflag_t c_oflag; /* output mode flags */
34 tcflag_t c_cflag; /* control mode flags */
35 tcflag_t c_lflag; /* local mode flags */
36 cc_t c_line; /* line discipline */
37 cc_t c_cc[NCCS]; /* control characters */
38 speed_t c_ispeed; /* input speed */
39 speed_t c_ospeed; /* output speed */
40};
41
42/* c_cc characters */
43#define VINTR 0
44#define VQUIT 1
45#define VERASE 2
46#define VKILL 3
47#define VEOF 4
48#define VTIME 5
49#define VMIN 6
50#define VSWTC 7
51#define VSTART 8
52#define VSTOP 9
53#define VSUSP 10
54#define VEOL 11
55#define VREPRINT 12
56#define VDISCARD 13
57#define VWERASE 14
58#define VLNEXT 15
59#define VEOL2 16
60
61
62/* c_iflag bits */
63#define IGNBRK 0000001
64#define BRKINT 0000002
65#define IGNPAR 0000004
66#define PARMRK 0000010
67#define INPCK 0000020
68#define ISTRIP 0000040
69#define INLCR 0000100
70#define IGNCR 0000200
71#define ICRNL 0000400
72#define IUCLC 0001000
73#define IXON 0002000
74#define IXANY 0004000
75#define IXOFF 0010000
76#define IMAXBEL 0020000
77#define IUTF8 0040000
78
79/* c_oflag bits */
80#define OPOST 0000001
81#define OLCUC 0000002
82#define ONLCR 0000004
83#define OCRNL 0000010
84#define ONOCR 0000020
85#define ONLRET 0000040
86#define OFILL 0000100
87#define OFDEL 0000200
88#define NLDLY 0000400
89#define NL0 0000000
90#define NL1 0000400
91#define CRDLY 0003000
92#define CR0 0000000
93#define CR1 0001000
94#define CR2 0002000
95#define CR3 0003000
96#define TABDLY 0014000
97#define TAB0 0000000
98#define TAB1 0004000
99#define TAB2 0010000
100#define TAB3 0014000
101#define XTABS 0014000
102#define BSDLY 0020000
103#define BS0 0000000
104#define BS1 0020000
105#define VTDLY 0040000
106#define VT0 0000000
107#define VT1 0040000
108#define FFDLY 0100000
109#define FF0 0000000
110#define FF1 0100000
111
112/* c_cflag bit meaning */
113#define CBAUD 0010017
114#define B0 0000000 /* hang up */
115#define B50 0000001
116#define B75 0000002
117#define B110 0000003
118#define B134 0000004
119#define B150 0000005
120#define B200 0000006
121#define B300 0000007
122#define B600 0000010
123#define B1200 0000011
124#define B1800 0000012
125#define B2400 0000013
126#define B4800 0000014
127#define B9600 0000015
128#define B19200 0000016
129#define B38400 0000017
130#define EXTA B19200
131#define EXTB B38400
132#define CSIZE 0000060
133#define CS5 0000000
134#define CS6 0000020
135#define CS7 0000040
136#define CS8 0000060
137#define CSTOPB 0000100
138#define CREAD 0000200
139#define PARENB 0000400
140#define PARODD 0001000
141#define HUPCL 0002000
142#define CLOCAL 0004000
143#define CBAUDEX 0010000
144#define BOTHER 0010000
145#define B57600 0010001
146#define B115200 0010002
147#define B230400 0010003
148#define B460800 0010004
149#define B500000 0010005
150#define B576000 0010006
151#define B921600 0010007
152#define B1000000 0010010
153#define B1152000 0010011
154#define B1500000 0010012
155#define B2000000 0010013
156#define B2500000 0010014
157#define B3000000 0010015
158#define B3500000 0010016
159#define B4000000 0010017
160#define CIBAUD 002003600000 /* input baud rate (not used) */
161#define CTVB 004000000000 /* VisioBraille Terminal flow control */
162#define CMSPAR 010000000000 /* mark or space (stick) parity */
163#define CRTSCTS 020000000000 /* flow control */
164
165#define IBSHIFT 16 /* Shift from CBAUD to CIBAUD */
166
167/* c_lflag bits */
168#define ISIG 0000001
169#define ICANON 0000002
170#define XCASE 0000004
171#define ECHO 0000010
172#define ECHOE 0000020
173#define ECHOK 0000040
174#define ECHONL 0000100
175#define NOFLSH 0000200
176#define TOSTOP 0000400
177#define ECHOCTL 0001000
178#define ECHOPRT 0002000
179#define ECHOKE 0004000
180#define FLUSHO 0010000
181#define PENDIN 0040000
182#define IEXTEN 0100000
183
184/* tcflow() and TCXONC use these */
185#define TCOOFF 0
186#define TCOON 1
187#define TCIOFF 2
188#define TCION 3
189
190/* tcflush() and TCFLSH use these */
191#define TCIFLUSH 0
192#define TCOFLUSH 1
193#define TCIOFLUSH 2
194
195/* tcsetattr uses these */
196#define TCSANOW 0
197#define TCSADRAIN 1
198#define TCSAFLUSH 2
199
200#endif /* _ASM_TERMBITS_H */
diff --git a/include/asm-mn10300/termios.h b/include/asm-mn10300/termios.h
deleted file mode 100644
index dd7cf617e118..000000000000
--- a/include/asm-mn10300/termios.h
+++ /dev/null
@@ -1,92 +0,0 @@
1#ifndef _ASM_TERMIOS_H
2#define _ASM_TERMIOS_H
3
4#include <asm/termbits.h>
5#include <asm/ioctls.h>
6
7struct winsize {
8 unsigned short ws_row;
9 unsigned short ws_col;
10 unsigned short ws_xpixel;
11 unsigned short ws_ypixel;
12};
13
14#define NCC 8
15struct termio {
16 unsigned short c_iflag; /* input mode flags */
17 unsigned short c_oflag; /* output mode flags */
18 unsigned short c_cflag; /* control mode flags */
19 unsigned short c_lflag; /* local mode flags */
20 unsigned char c_line; /* line discipline */
21 unsigned char c_cc[NCC]; /* control characters */
22};
23
24#ifdef __KERNEL__
25/* intr=^C quit=^| erase=del kill=^U
26 eof=^D vtime=\0 vmin=\1 sxtc=\0
27 start=^Q stop=^S susp=^Z eol=\0
28 reprint=^R discard=^U werase=^W lnext=^V
29 eol2=\0
30*/
31#define INIT_C_CC "\003\034\177\025\004\0\1\0\021\023\032\0\022\017\027\026\0"
32#endif
33
34/* modem lines */
35#define TIOCM_LE 0x001
36#define TIOCM_DTR 0x002
37#define TIOCM_RTS 0x004
38#define TIOCM_ST 0x008
39#define TIOCM_SR 0x010
40#define TIOCM_CTS 0x020
41#define TIOCM_CAR 0x040
42#define TIOCM_RNG 0x080
43#define TIOCM_DSR 0x100
44#define TIOCM_CD TIOCM_CAR
45#define TIOCM_RI TIOCM_RNG
46#define TIOCM_OUT1 0x2000
47#define TIOCM_OUT2 0x4000
48#define TIOCM_LOOP 0x8000
49
50#define TIOCM_MODEM_BITS TIOCM_OUT2 /* IRDA support */
51
52/*
53 * Translate a "termio" structure into a "termios". Ugh.
54 */
55#define SET_LOW_TERMIOS_BITS(termios, termio, x) { \
56 unsigned short __tmp; \
57 get_user(__tmp, &(termio)->x); \
58 *(unsigned short *) &(termios)->x = __tmp; \
59}
60
61#define user_termio_to_kernel_termios(termios, termio) \
62({ \
63 SET_LOW_TERMIOS_BITS(termios, termio, c_iflag); \
64 SET_LOW_TERMIOS_BITS(termios, termio, c_oflag); \
65 SET_LOW_TERMIOS_BITS(termios, termio, c_cflag); \
66 SET_LOW_TERMIOS_BITS(termios, termio, c_lflag); \
67 copy_from_user((termios)->c_cc, (termio)->c_cc, NCC); \
68})
69
70/*
71 * Translate a "termios" structure into a "termio". Ugh.
72 */
73#define kernel_termios_to_user_termio(termio, termios) \
74({ \
75 put_user((termios)->c_iflag, &(termio)->c_iflag); \
76 put_user((termios)->c_oflag, &(termio)->c_oflag); \
77 put_user((termios)->c_cflag, &(termio)->c_cflag); \
78 put_user((termios)->c_lflag, &(termio)->c_lflag); \
79 put_user((termios)->c_line, &(termio)->c_line); \
80 copy_to_user((termio)->c_cc, (termios)->c_cc, NCC); \
81})
82
83#define user_termios_to_kernel_termios(k, u) \
84 copy_from_user(k, u, sizeof(struct termios2))
85#define kernel_termios_to_user_termios(u, k) \
86 copy_to_user(u, k, sizeof(struct termios2))
87#define user_termios_to_kernel_termios_1(k, u) \
88 copy_from_user(k, u, sizeof(struct termios))
89#define kernel_termios_to_user_termios_1(u, k) \
90 copy_to_user(u, k, sizeof(struct termios))
91
92#endif /* _ASM_TERMIOS_H */
diff --git a/include/asm-mn10300/thread_info.h b/include/asm-mn10300/thread_info.h
deleted file mode 100644
index 78a3881f3c12..000000000000
--- a/include/asm-mn10300/thread_info.h
+++ /dev/null
@@ -1,170 +0,0 @@
1/* MN10300 Low-level thread information
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_THREAD_INFO_H
13#define _ASM_THREAD_INFO_H
14
15#ifdef __KERNEL__
16
17#include <asm/page.h>
18
19#ifndef __ASSEMBLY__
20#include <asm/processor.h>
21#endif
22
23#define PREEMPT_ACTIVE 0x10000000
24
25#ifdef CONFIG_4KSTACKS
26#define THREAD_SIZE (4096)
27#else
28#define THREAD_SIZE (8192)
29#endif
30
31#define STACK_WARN (THREAD_SIZE / 8)
32
33/*
34 * low level task data that entry.S needs immediate access to
35 * - this struct should fit entirely inside of one cache line
36 * - this struct shares the supervisor stack pages
37 * - if the contents of this structure are changed, the assembly constants
38 * must also be changed
39 */
40#ifndef __ASSEMBLY__
41
42struct thread_info {
43 struct task_struct *task; /* main task structure */
44 struct exec_domain *exec_domain; /* execution domain */
45 unsigned long flags; /* low level flags */
46 __u32 cpu; /* current CPU */
47 __s32 preempt_count; /* 0 => preemptable, <0 => BUG */
48
49 mm_segment_t addr_limit; /* thread address space:
50 0-0xBFFFFFFF for user-thead
51 0-0xFFFFFFFF for kernel-thread
52 */
53 struct restart_block restart_block;
54
55 __u8 supervisor_stack[0];
56};
57
58#else /* !__ASSEMBLY__ */
59
60#ifndef __ASM_OFFSETS_H__
61#include <asm/asm-offsets.h>
62#endif
63
64#endif
65
66/*
67 * macros/functions for gaining access to the thread information structure
68 *
69 * preempt_count needs to be 1 initially, until the scheduler is functional.
70 */
71#ifndef __ASSEMBLY__
72
73#define INIT_THREAD_INFO(tsk) \
74{ \
75 .task = &tsk, \
76 .exec_domain = &default_exec_domain, \
77 .flags = 0, \
78 .cpu = 0, \
79 .preempt_count = 1, \
80 .addr_limit = KERNEL_DS, \
81 .restart_block = { \
82 .fn = do_no_restart_syscall, \
83 }, \
84}
85
86#define init_thread_info (init_thread_union.thread_info)
87#define init_stack (init_thread_union.stack)
88#define init_uregs \
89 ((struct pt_regs *) \
90 ((unsigned long) init_stack + THREAD_SIZE - sizeof(struct pt_regs)))
91
92extern struct thread_info *__current_ti;
93
94/* how to get the thread information struct from C */
95static inline __attribute__((const))
96struct thread_info *current_thread_info(void)
97{
98 struct thread_info *ti;
99 asm("mov sp,%0\n"
100 "and %1,%0\n"
101 : "=d" (ti)
102 : "i" (~(THREAD_SIZE - 1))
103 : "cc");
104 return ti;
105}
106
107/* how to get the current stack pointer from C */
108static inline unsigned long current_stack_pointer(void)
109{
110 unsigned long sp;
111 asm("mov sp,%0; ":"=r" (sp));
112 return sp;
113}
114
115#define __HAVE_ARCH_THREAD_INFO_ALLOCATOR
116
117/* thread information allocation */
118#ifdef CONFIG_DEBUG_STACK_USAGE
119#define alloc_thread_info(tsk) kzalloc(THREAD_SIZE, GFP_KERNEL)
120#else
121#define alloc_thread_info(tsk) kmalloc(THREAD_SIZE, GFP_KERNEL)
122#endif
123
124#define free_thread_info(ti) kfree((ti))
125#define get_thread_info(ti) get_task_struct((ti)->task)
126#define put_thread_info(ti) put_task_struct((ti)->task)
127
128#else /* !__ASSEMBLY__ */
129
130#ifndef __VMLINUX_LDS__
131/* how to get the thread information struct from ASM */
132.macro GET_THREAD_INFO reg
133 mov sp,\reg
134 and -THREAD_SIZE,\reg
135.endm
136#endif
137#endif
138
139/*
140 * thread information flags
141 * - these are process state flags that various assembly files may need to
142 * access
143 * - pending work-to-be-done flags are in LSW
144 * - other flags in MSW
145 */
146#define TIF_SYSCALL_TRACE 0 /* syscall trace active */
147#define TIF_NOTIFY_RESUME 1 /* resumption notification requested */
148#define TIF_SIGPENDING 2 /* signal pending */
149#define TIF_NEED_RESCHED 3 /* rescheduling necessary */
150#define TIF_SINGLESTEP 4 /* restore singlestep on return to user mode */
151#define TIF_RESTORE_SIGMASK 5 /* restore signal mask in do_signal() */
152#define TIF_POLLING_NRFLAG 16 /* true if poll_idle() is polling TIF_NEED_RESCHED */
153#define TIF_MEMDIE 17 /* OOM killer killed process */
154#define TIF_FREEZE 18 /* freezing for suspend */
155
156#define _TIF_SYSCALL_TRACE +(1 << TIF_SYSCALL_TRACE)
157#define _TIF_NOTIFY_RESUME +(1 << TIF_NOTIFY_RESUME)
158#define _TIF_SIGPENDING +(1 << TIF_SIGPENDING)
159#define _TIF_NEED_RESCHED +(1 << TIF_NEED_RESCHED)
160#define _TIF_SINGLESTEP +(1 << TIF_SINGLESTEP)
161#define _TIF_RESTORE_SIGMASK +(1 << TIF_RESTORE_SIGMASK)
162#define _TIF_POLLING_NRFLAG +(1 << TIF_POLLING_NRFLAG)
163#define _TIF_FREEZE +(1 << TIF_FREEZE)
164
165#define _TIF_WORK_MASK 0x0000FFFE /* work to do on interrupt/exception return */
166#define _TIF_ALLWORK_MASK 0x0000FFFF /* work to do on any return to u-space */
167
168#endif /* __KERNEL__ */
169
170#endif /* _ASM_THREAD_INFO_H */
diff --git a/include/asm-mn10300/timer-regs.h b/include/asm-mn10300/timer-regs.h
deleted file mode 100644
index 1d883b7f94ab..000000000000
--- a/include/asm-mn10300/timer-regs.h
+++ /dev/null
@@ -1,293 +0,0 @@
1/* AM33v2 on-board timer module registers
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_TIMER_REGS_H
13#define _ASM_TIMER_REGS_H
14
15#include <asm/cpu-regs.h>
16#include <asm/intctl-regs.h>
17
18#ifdef __KERNEL__
19
20/* timer prescalar control */
21#define TMPSCNT __SYSREG(0xd4003071, u8) /* timer prescaler control */
22#define TMPSCNT_ENABLE 0x80 /* timer prescaler enable */
23#define TMPSCNT_DISABLE 0x00 /* timer prescaler disable */
24
25/* 8 bit timers */
26#define TM0MD __SYSREG(0xd4003000, u8) /* timer 0 mode register */
27#define TM0MD_SRC 0x07 /* timer source */
28#define TM0MD_SRC_IOCLK 0x00 /* - IOCLK */
29#define TM0MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
30#define TM0MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
31#define TM0MD_SRC_TM2IO 0x03 /* - TM2IO pin input */
32#define TM0MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
33#define TM0MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
34#define TM0MD_SRC_TM0IO 0x07 /* - TM0IO pin input */
35#define TM0MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
36#define TM0MD_COUNT_ENABLE 0x80 /* timer count enable */
37
38#define TM1MD __SYSREG(0xd4003001, u8) /* timer 1 mode register */
39#define TM1MD_SRC 0x07 /* timer source */
40#define TM1MD_SRC_IOCLK 0x00 /* - IOCLK */
41#define TM1MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
42#define TM1MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
43#define TM1MD_SRC_TM0CASCADE 0x03 /* - cascade with timer 0 */
44#define TM1MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
45#define TM1MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
46#define TM1MD_SRC_TM1IO 0x07 /* - TM1IO pin input */
47#define TM1MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
48#define TM1MD_COUNT_ENABLE 0x80 /* timer count enable */
49
50#define TM2MD __SYSREG(0xd4003002, u8) /* timer 2 mode register */
51#define TM2MD_SRC 0x07 /* timer source */
52#define TM2MD_SRC_IOCLK 0x00 /* - IOCLK */
53#define TM2MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
54#define TM2MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
55#define TM2MD_SRC_TM1CASCADE 0x03 /* - cascade with timer 1 */
56#define TM2MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
57#define TM2MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
58#define TM2MD_SRC_TM2IO 0x07 /* - TM2IO pin input */
59#define TM2MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
60#define TM2MD_COUNT_ENABLE 0x80 /* timer count enable */
61
62#define TM3MD __SYSREG(0xd4003003, u8) /* timer 3 mode register */
63#define TM3MD_SRC 0x07 /* timer source */
64#define TM3MD_SRC_IOCLK 0x00 /* - IOCLK */
65#define TM3MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
66#define TM3MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
67#define TM3MD_SRC_TM1CASCADE 0x03 /* - cascade with timer 2 */
68#define TM3MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
69#define TM3MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
70#define TM3MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
71#define TM3MD_SRC_TM3IO 0x07 /* - TM3IO pin input */
72#define TM3MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
73#define TM3MD_COUNT_ENABLE 0x80 /* timer count enable */
74
75#define TM01MD __SYSREG(0xd4003000, u16) /* timer 0:1 mode register */
76
77#define TM0BR __SYSREG(0xd4003010, u8) /* timer 0 base register */
78#define TM1BR __SYSREG(0xd4003011, u8) /* timer 1 base register */
79#define TM2BR __SYSREG(0xd4003012, u8) /* timer 2 base register */
80#define TM3BR __SYSREG(0xd4003013, u8) /* timer 3 base register */
81#define TM01BR __SYSREG(0xd4003010, u16) /* timer 0:1 base register */
82
83#define TM0BC __SYSREGC(0xd4003020, u8) /* timer 0 binary counter */
84#define TM1BC __SYSREGC(0xd4003021, u8) /* timer 1 binary counter */
85#define TM2BC __SYSREGC(0xd4003022, u8) /* timer 2 binary counter */
86#define TM3BC __SYSREGC(0xd4003023, u8) /* timer 3 binary counter */
87#define TM01BC __SYSREGC(0xd4003020, u16) /* timer 0:1 binary counter */
88
89#define TM0IRQ 2 /* timer 0 IRQ */
90#define TM1IRQ 3 /* timer 1 IRQ */
91#define TM2IRQ 4 /* timer 2 IRQ */
92#define TM3IRQ 5 /* timer 3 IRQ */
93
94#define TM0ICR GxICR(TM0IRQ) /* timer 0 uflow intr ctrl reg */
95#define TM1ICR GxICR(TM1IRQ) /* timer 1 uflow intr ctrl reg */
96#define TM2ICR GxICR(TM2IRQ) /* timer 2 uflow intr ctrl reg */
97#define TM3ICR GxICR(TM3IRQ) /* timer 3 uflow intr ctrl reg */
98
99/* 16-bit timers 4,5 & 7-11 */
100#define TM4MD __SYSREG(0xd4003080, u8) /* timer 4 mode register */
101#define TM4MD_SRC 0x07 /* timer source */
102#define TM4MD_SRC_IOCLK 0x00 /* - IOCLK */
103#define TM4MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
104#define TM4MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
105#define TM4MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
106#define TM4MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
107#define TM4MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
108#define TM4MD_SRC_TM4IO 0x07 /* - TM4IO pin input */
109#define TM4MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
110#define TM4MD_COUNT_ENABLE 0x80 /* timer count enable */
111
112#define TM5MD __SYSREG(0xd4003082, u8) /* timer 5 mode register */
113#define TM5MD_SRC 0x07 /* timer source */
114#define TM5MD_SRC_IOCLK 0x00 /* - IOCLK */
115#define TM5MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
116#define TM5MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
117#define TM5MD_SRC_TM4CASCADE 0x03 /* - cascade with timer 4 */
118#define TM5MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
119#define TM5MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
120#define TM5MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
121#define TM5MD_SRC_TM5IO 0x07 /* - TM5IO pin input */
122#define TM5MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
123#define TM5MD_COUNT_ENABLE 0x80 /* timer count enable */
124
125#define TM7MD __SYSREG(0xd4003086, u8) /* timer 7 mode register */
126#define TM7MD_SRC 0x07 /* timer source */
127#define TM7MD_SRC_IOCLK 0x00 /* - IOCLK */
128#define TM7MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
129#define TM7MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
130#define TM7MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
131#define TM7MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
132#define TM7MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
133#define TM7MD_SRC_TM7IO 0x07 /* - TM7IO pin input */
134#define TM7MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
135#define TM7MD_COUNT_ENABLE 0x80 /* timer count enable */
136
137#define TM8MD __SYSREG(0xd4003088, u8) /* timer 8 mode register */
138#define TM8MD_SRC 0x07 /* timer source */
139#define TM8MD_SRC_IOCLK 0x00 /* - IOCLK */
140#define TM8MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
141#define TM8MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
142#define TM8MD_SRC_TM7CASCADE 0x03 /* - cascade with timer 7 */
143#define TM8MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
144#define TM8MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
145#define TM8MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
146#define TM8MD_SRC_TM8IO 0x07 /* - TM8IO pin input */
147#define TM8MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
148#define TM8MD_COUNT_ENABLE 0x80 /* timer count enable */
149
150#define TM9MD __SYSREG(0xd400308a, u8) /* timer 9 mode register */
151#define TM9MD_SRC 0x07 /* timer source */
152#define TM9MD_SRC_IOCLK 0x00 /* - IOCLK */
153#define TM9MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
154#define TM9MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
155#define TM9MD_SRC_TM8CASCADE 0x03 /* - cascade with timer 8 */
156#define TM9MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
157#define TM9MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
158#define TM9MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
159#define TM9MD_SRC_TM9IO 0x07 /* - TM9IO pin input */
160#define TM9MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
161#define TM9MD_COUNT_ENABLE 0x80 /* timer count enable */
162
163#define TM10MD __SYSREG(0xd400308c, u8) /* timer 10 mode register */
164#define TM10MD_SRC 0x07 /* timer source */
165#define TM10MD_SRC_IOCLK 0x00 /* - IOCLK */
166#define TM10MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
167#define TM10MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
168#define TM10MD_SRC_TM9CASCADE 0x03 /* - cascade with timer 9 */
169#define TM10MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
170#define TM10MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
171#define TM10MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
172#define TM10MD_SRC_TM10IO 0x07 /* - TM10IO pin input */
173#define TM10MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
174#define TM10MD_COUNT_ENABLE 0x80 /* timer count enable */
175
176#define TM11MD __SYSREG(0xd400308e, u8) /* timer 11 mode register */
177#define TM11MD_SRC 0x07 /* timer source */
178#define TM11MD_SRC_IOCLK 0x00 /* - IOCLK */
179#define TM11MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
180#define TM11MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
181#define TM11MD_SRC_TM7CASCADE 0x03 /* - cascade with timer 7 */
182#define TM11MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
183#define TM11MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
184#define TM11MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
185#define TM11MD_SRC_TM11IO 0x07 /* - TM11IO pin input */
186#define TM11MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
187#define TM11MD_COUNT_ENABLE 0x80 /* timer count enable */
188
189#define TM4BR __SYSREG(0xd4003090, u16) /* timer 4 base register */
190#define TM5BR __SYSREG(0xd4003092, u16) /* timer 5 base register */
191#define TM7BR __SYSREG(0xd4003096, u16) /* timer 7 base register */
192#define TM8BR __SYSREG(0xd4003098, u16) /* timer 8 base register */
193#define TM9BR __SYSREG(0xd400309a, u16) /* timer 9 base register */
194#define TM10BR __SYSREG(0xd400309c, u16) /* timer 10 base register */
195#define TM11BR __SYSREG(0xd400309e, u16) /* timer 11 base register */
196#define TM45BR __SYSREG(0xd4003090, u32) /* timer 4:5 base register */
197
198#define TM4BC __SYSREG(0xd40030a0, u16) /* timer 4 binary counter */
199#define TM5BC __SYSREG(0xd40030a2, u16) /* timer 5 binary counter */
200#define TM45BC __SYSREG(0xd40030a0, u32) /* timer 4:5 binary counter */
201
202#define TM7BC __SYSREG(0xd40030a6, u16) /* timer 7 binary counter */
203#define TM8BC __SYSREG(0xd40030a8, u16) /* timer 8 binary counter */
204#define TM9BC __SYSREG(0xd40030aa, u16) /* timer 9 binary counter */
205#define TM10BC __SYSREG(0xd40030ac, u16) /* timer 10 binary counter */
206#define TM11BC __SYSREG(0xd40030ae, u16) /* timer 11 binary counter */
207
208#define TM4IRQ 6 /* timer 4 IRQ */
209#define TM5IRQ 7 /* timer 5 IRQ */
210#define TM7IRQ 11 /* timer 7 IRQ */
211#define TM8IRQ 12 /* timer 8 IRQ */
212#define TM9IRQ 13 /* timer 9 IRQ */
213#define TM10IRQ 14 /* timer 10 IRQ */
214#define TM11IRQ 15 /* timer 11 IRQ */
215
216#define TM4ICR GxICR(TM4IRQ) /* timer 4 uflow intr ctrl reg */
217#define TM5ICR GxICR(TM5IRQ) /* timer 5 uflow intr ctrl reg */
218#define TM7ICR GxICR(TM7IRQ) /* timer 7 uflow intr ctrl reg */
219#define TM8ICR GxICR(TM8IRQ) /* timer 8 uflow intr ctrl reg */
220#define TM9ICR GxICR(TM9IRQ) /* timer 9 uflow intr ctrl reg */
221#define TM10ICR GxICR(TM10IRQ) /* timer 10 uflow intr ctrl reg */
222#define TM11ICR GxICR(TM11IRQ) /* timer 11 uflow intr ctrl reg */
223
224/* 16-bit timer 6 */
225#define TM6MD __SYSREG(0xd4003084, u16) /* timer6 mode register */
226#define TM6MD_SRC 0x0007 /* timer source */
227#define TM6MD_SRC_IOCLK 0x0000 /* - IOCLK */
228#define TM6MD_SRC_IOCLK_8 0x0001 /* - 1/8 IOCLK */
229#define TM6MD_SRC_IOCLK_32 0x0002 /* - 1/32 IOCLK */
230#define TM6MD_SRC_TM0UFLOW 0x0004 /* - timer 0 underflow */
231#define TM6MD_SRC_TM1UFLOW 0x0005 /* - timer 1 underflow */
232#define TM6MD_SRC_TM6IOB_BOTH 0x0006 /* - TM6IOB pin input (both edges) */
233#define TM6MD_SRC_TM6IOB_SINGLE 0x0007 /* - TM6IOB pin input (single edge) */
234#define TM6MD_CLR_ENABLE 0x0010 /* clear count enable */
235#define TM6MD_ONESHOT_ENABLE 0x0040 /* oneshot count */
236#define TM6MD_TRIG_ENABLE 0x0080 /* TM6IOB pin trigger enable */
237#define TM6MD_PWM 0x3800 /* PWM output mode */
238#define TM6MD_PWM_DIS 0x0000 /* - disabled */
239#define TM6MD_PWM_10BIT 0x1000 /* - 10 bits mode */
240#define TM6MD_PWM_11BIT 0x1800 /* - 11 bits mode */
241#define TM6MD_PWM_12BIT 0x3000 /* - 12 bits mode */
242#define TM6MD_PWM_14BIT 0x3800 /* - 14 bits mode */
243#define TM6MD_INIT_COUNTER 0x4000 /* initialize TMnBC to zero */
244#define TM6MD_COUNT_ENABLE 0x8000 /* timer count enable */
245
246#define TM6MDA __SYSREG(0xd40030b4, u8) /* timer6 cmp/cap A mode reg */
247#define TM6MDA_OUT 0x07 /* output select */
248#define TM6MDA_OUT_SETA_RESETB 0x00 /* - set at match A, reset at match B */
249#define TM6MDA_OUT_SETA_RESETOV 0x01 /* - set at match A, reset at overflow */
250#define TM6MDA_OUT_SETA 0x02 /* - set at match A */
251#define TM6MDA_OUT_RESETA 0x03 /* - reset at match A */
252#define TM6MDA_OUT_TOGGLE 0x04 /* - toggle on match A */
253#define TM6MDA_MODE 0xc0 /* compare A register mode */
254#define TM6MDA_MODE_CMP_SINGLE 0x00 /* - compare, single buffer mode */
255#define TM6MDA_MODE_CMP_DOUBLE 0x40 /* - compare, double buffer mode */
256#define TM6MDA_MODE_CAP_S_EDGE 0x80 /* - capture, single edge mode */
257#define TM6MDA_MODE_CAP_D_EDGE 0xc0 /* - capture, double edge mode */
258#define TM6MDA_EDGE 0x20 /* compare A edge select */
259#define TM6MDA_EDGE_FALLING 0x00 /* capture on falling edge */
260#define TM6MDA_EDGE_RISING 0x20 /* capture on rising edge */
261#define TM6MDA_CAPTURE_ENABLE 0x10 /* capture enable */
262
263#define TM6MDB __SYSREG(0xd40030b5, u8) /* timer6 cmp/cap B mode reg */
264#define TM6MDB_OUT 0x07 /* output select */
265#define TM6MDB_OUT_SETB_RESETA 0x00 /* - set at match B, reset at match A */
266#define TM6MDB_OUT_SETB_RESETOV 0x01 /* - set at match B */
267#define TM6MDB_OUT_RESETB 0x03 /* - reset at match B */
268#define TM6MDB_OUT_TOGGLE 0x04 /* - toggle on match B */
269#define TM6MDB_MODE 0xc0 /* compare B register mode */
270#define TM6MDB_MODE_CMP_SINGLE 0x00 /* - compare, single buffer mode */
271#define TM6MDB_MODE_CMP_DOUBLE 0x40 /* - compare, double buffer mode */
272#define TM6MDB_MODE_CAP_S_EDGE 0x80 /* - capture, single edge mode */
273#define TM6MDB_MODE_CAP_D_EDGE 0xc0 /* - capture, double edge mode */
274#define TM6MDB_EDGE 0x20 /* compare B edge select */
275#define TM6MDB_EDGE_FALLING 0x00 /* capture on falling edge */
276#define TM6MDB_EDGE_RISING 0x20 /* capture on rising edge */
277#define TM6MDB_CAPTURE_ENABLE 0x10 /* capture enable */
278
279#define TM6CA __SYSREG(0xd40030c4, u16) /* timer6 cmp/capture reg A */
280#define TM6CB __SYSREG(0xd40030d4, u16) /* timer6 cmp/capture reg B */
281#define TM6BC __SYSREG(0xd40030a4, u16) /* timer6 binary counter */
282
283#define TM6IRQ 6 /* timer 6 IRQ */
284#define TM6AIRQ 9 /* timer 6A IRQ */
285#define TM6BIRQ 10 /* timer 6B IRQ */
286
287#define TM6ICR GxICR(TM6IRQ) /* timer 6 uflow intr ctrl reg */
288#define TM6AICR GxICR(TM6AIRQ) /* timer 6A intr control reg */
289#define TM6BICR GxICR(TM6BIRQ) /* timer 6B intr control reg */
290
291#endif /* __KERNEL__ */
292
293#endif /* _ASM_TIMER_REGS_H */
diff --git a/include/asm-mn10300/timex.h b/include/asm-mn10300/timex.h
deleted file mode 100644
index 3944277dab67..000000000000
--- a/include/asm-mn10300/timex.h
+++ /dev/null
@@ -1,33 +0,0 @@
1/* MN10300 Architecture time management specifications
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_TIMEX_H
12#define _ASM_TIMEX_H
13
14#include <asm/hardirq.h>
15#include <asm/unit/timex.h>
16
17#define TICK_SIZE (tick_nsec / 1000)
18
19#define CLOCK_TICK_RATE 1193180 /* Underlying HZ - this should probably be set
20 * to something appropriate, but what? */
21
22extern cycles_t cacheflush_time;
23
24#ifdef __KERNEL__
25
26static inline cycles_t get_cycles(void)
27{
28 return read_timestamp_counter();
29}
30
31#endif /* __KERNEL__ */
32
33#endif /* _ASM_TIMEX_H */
diff --git a/include/asm-mn10300/tlb.h b/include/asm-mn10300/tlb.h
deleted file mode 100644
index 65d232b96613..000000000000
--- a/include/asm-mn10300/tlb.h
+++ /dev/null
@@ -1,34 +0,0 @@
1/* MN10300 TLB definitions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_TLB_H
13#define _ASM_TLB_H
14
15#include <asm/tlbflush.h>
16
17extern void check_pgt_cache(void);
18
19/*
20 * we don't need any special per-pte or per-vma handling...
21 */
22#define tlb_start_vma(tlb, vma) do { } while (0)
23#define tlb_end_vma(tlb, vma) do { } while (0)
24#define __tlb_remove_tlb_entry(tlb, ptep, address) do { } while (0)
25
26/*
27 * .. because we flush the whole mm when it fills up
28 */
29#define tlb_flush(tlb) flush_tlb_mm((tlb)->mm)
30
31/* for now, just use the generic stuff */
32#include <asm-generic/tlb.h>
33
34#endif /* _ASM_TLB_H */
diff --git a/include/asm-mn10300/tlbflush.h b/include/asm-mn10300/tlbflush.h
deleted file mode 100644
index e0239865abcb..000000000000
--- a/include/asm-mn10300/tlbflush.h
+++ /dev/null
@@ -1,80 +0,0 @@
1/* MN10300 TLB flushing functions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_TLBFLUSH_H
12#define _ASM_TLBFLUSH_H
13
14#include <asm/processor.h>
15
16#define __flush_tlb() \
17do { \
18 int w; \
19 __asm__ __volatile__ \
20 (" mov %1,%0 \n" \
21 " or %2,%0 \n" \
22 " mov %0,%1 \n" \
23 : "=d"(w) \
24 : "m"(MMUCTR), "i"(MMUCTR_IIV|MMUCTR_DIV) \
25 : "memory" \
26 ); \
27} while (0)
28
29#define __flush_tlb_all() __flush_tlb()
30#define __flush_tlb_one(addr) __flush_tlb()
31
32
33/*
34 * TLB flushing:
35 *
36 * - flush_tlb() flushes the current mm struct TLBs
37 * - flush_tlb_all() flushes all processes TLBs
38 * - flush_tlb_mm(mm) flushes the specified mm context TLB's
39 * - flush_tlb_page(vma, vmaddr) flushes one page
40 * - flush_tlb_range(mm, start, end) flushes a range of pages
41 * - flush_tlb_pgtables(mm, start, end) flushes a range of page tables
42 */
43#define flush_tlb_all() \
44do { \
45 preempt_disable(); \
46 __flush_tlb_all(); \
47 preempt_enable(); \
48} while (0)
49
50#define flush_tlb_mm(mm) \
51do { \
52 preempt_disable(); \
53 __flush_tlb_all(); \
54 preempt_enable(); \
55} while (0)
56
57#define flush_tlb_range(vma, start, end) \
58do { \
59 unsigned long __s __attribute__((unused)) = (start); \
60 unsigned long __e __attribute__((unused)) = (end); \
61 preempt_disable(); \
62 __flush_tlb_all(); \
63 preempt_enable(); \
64} while (0)
65
66
67#define __flush_tlb_global() flush_tlb_all()
68#define flush_tlb() flush_tlb_all()
69#define flush_tlb_kernel_range(start, end) \
70do { \
71 unsigned long __s __attribute__((unused)) = (start); \
72 unsigned long __e __attribute__((unused)) = (end); \
73 flush_tlb_all(); \
74} while (0)
75
76extern void flush_tlb_page(struct vm_area_struct *vma, unsigned long addr);
77
78#define flush_tlb_pgtables(mm, start, end) do {} while (0)
79
80#endif /* _ASM_TLBFLUSH_H */
diff --git a/include/asm-mn10300/topology.h b/include/asm-mn10300/topology.h
deleted file mode 100644
index 5428f333a02c..000000000000
--- a/include/asm-mn10300/topology.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/topology.h>
diff --git a/include/asm-mn10300/types.h b/include/asm-mn10300/types.h
deleted file mode 100644
index 7b9f01042fd4..000000000000
--- a/include/asm-mn10300/types.h
+++ /dev/null
@@ -1,38 +0,0 @@
1/* MN10300 Basic type definitions
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_TYPES_H
12#define _ASM_TYPES_H
13
14#include <asm-generic/int-ll64.h>
15
16#ifndef __ASSEMBLY__
17
18typedef unsigned short umode_t;
19
20#endif /* __ASSEMBLY__ */
21
22/*
23 * These aren't exported outside the kernel to avoid name space clashes
24 */
25#ifdef __KERNEL__
26
27#define BITS_PER_LONG 32
28
29#ifndef __ASSEMBLY__
30
31/* Dma addresses are 32-bits wide. */
32typedef u32 dma_addr_t;
33
34#endif /* __ASSEMBLY__ */
35
36#endif /* __KERNEL__ */
37
38#endif /* _ASM_TYPES_H */
diff --git a/include/asm-mn10300/uaccess.h b/include/asm-mn10300/uaccess.h
deleted file mode 100644
index 8a3a4dd55763..000000000000
--- a/include/asm-mn10300/uaccess.h
+++ /dev/null
@@ -1,490 +0,0 @@
1/* MN10300 userspace access functions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_UACCESS_H
12#define _ASM_UACCESS_H
13
14/*
15 * User space memory access functions
16 */
17#include <linux/sched.h>
18#include <asm/page.h>
19#include <asm/pgtable.h>
20#include <asm/errno.h>
21
22#define VERIFY_READ 0
23#define VERIFY_WRITE 1
24
25/*
26 * The fs value determines whether argument validity checking should be
27 * performed or not. If get_fs() == USER_DS, checking is performed, with
28 * get_fs() == KERNEL_DS, checking is bypassed.
29 *
30 * For historical reasons, these macros are grossly misnamed.
31 */
32
33#define MAKE_MM_SEG(s) ((mm_segment_t) { (s) })
34
35#define KERNEL_XDS MAKE_MM_SEG(0xBFFFFFFF)
36#define KERNEL_DS MAKE_MM_SEG(0x9FFFFFFF)
37#define USER_DS MAKE_MM_SEG(TASK_SIZE)
38
39#define get_ds() (KERNEL_DS)
40#define get_fs() (current_thread_info()->addr_limit)
41#define set_fs(x) (current_thread_info()->addr_limit = (x))
42#define __kernel_ds_p() (current_thread_info()->addr_limit.seg == 0x9FFFFFFF)
43
44#define segment_eq(a, b) ((a).seg == (b).seg)
45
46#define __addr_ok(addr) \
47 ((unsigned long)(addr) < (current_thread_info()->addr_limit.seg))
48
49/*
50 * check that a range of addresses falls within the current address limit
51 */
52static inline int ___range_ok(unsigned long addr, unsigned int size)
53{
54 int flag = 1, tmp;
55
56 asm(" add %3,%1 \n" /* set C-flag if addr + size > 4Gb */
57 " bcs 0f \n"
58 " cmp %4,%1 \n" /* jump if addr+size>limit (error) */
59 " bhi 0f \n"
60 " clr %0 \n" /* mark okay */
61 "0: \n"
62 : "=r"(flag), "=&r"(tmp)
63 : "1"(addr), "ir"(size),
64 "r"(current_thread_info()->addr_limit.seg), "0"(flag)
65 : "cc"
66 );
67
68 return flag;
69}
70
71#define __range_ok(addr, size) ___range_ok((unsigned long)(addr), (u32)(size))
72
73#define access_ok(type, addr, size) (__range_ok((addr), (size)) == 0)
74#define __access_ok(addr, size) (__range_ok((addr), (size)) == 0)
75
76static inline int verify_area(int type, const void *addr, unsigned long size)
77{
78 return access_ok(type, addr, size) ? 0 : -EFAULT;
79}
80
81
82/*
83 * The exception table consists of pairs of addresses: the first is the
84 * address of an instruction that is allowed to fault, and the second is
85 * the address at which the program should continue. No registers are
86 * modified, so it is entirely up to the continuation code to figure out
87 * what to do.
88 *
89 * All the routines below use bits of fixup code that are out of line
90 * with the main instruction path. This means when everything is well,
91 * we don't even have to jump over them. Further, they do not intrude
92 * on our cache or tlb entries.
93 */
94
95struct exception_table_entry
96{
97 unsigned long insn, fixup;
98};
99
100/* Returns 0 if exception not found and fixup otherwise. */
101extern int fixup_exception(struct pt_regs *regs);
102
103#define put_user(x, ptr) __put_user_check((x), (ptr), sizeof(*(ptr)))
104#define get_user(x, ptr) __get_user_check((x), (ptr), sizeof(*(ptr)))
105
106/*
107 * The "__xxx" versions do not do address space checking, useful when
108 * doing multiple accesses to the same area (the user has to do the
109 * checks by hand with "access_ok()")
110 */
111#define __put_user(x, ptr) __put_user_nocheck((x), (ptr), sizeof(*(ptr)))
112#define __get_user(x, ptr) __get_user_nocheck((x), (ptr), sizeof(*(ptr)))
113
114/*
115 * The "xxx_ret" versions return constant specified in third argument, if
116 * something bad happens. These macros can be optimized for the
117 * case of just returning from the function xxx_ret is used.
118 */
119
120#define put_user_ret(x, ptr, ret) \
121 ({ if (put_user((x), (ptr))) return (ret); })
122#define get_user_ret(x, ptr, ret) \
123 ({ if (get_user((x), (ptr))) return (ret); })
124#define __put_user_ret(x, ptr, ret) \
125 ({ if (__put_user((x), (ptr))) return (ret); })
126#define __get_user_ret(x, ptr, ret) \
127 ({ if (__get_user((x), (ptr))) return (ret); })
128
129struct __large_struct { unsigned long buf[100]; };
130#define __m(x) (*(struct __large_struct *)(x))
131
132#define __get_user_nocheck(x, ptr, size) \
133({ \
134 __typeof(*(ptr)) __gu_val; \
135 unsigned long __gu_addr; \
136 int __gu_err; \
137 __gu_addr = (unsigned long) (ptr); \
138 switch (size) { \
139 case 1: __get_user_asm("bu"); break; \
140 case 2: __get_user_asm("hu"); break; \
141 case 4: __get_user_asm("" ); break; \
142 default: __get_user_unknown(); break; \
143 } \
144 x = (__typeof__(*(ptr))) __gu_val; \
145 __gu_err; \
146})
147
148#define __get_user_check(x, ptr, size) \
149({ \
150 __typeof__(*(ptr)) __gu_val; \
151 unsigned long __gu_addr; \
152 int __gu_err; \
153 __gu_addr = (unsigned long) (ptr); \
154 if (likely(__access_ok(__gu_addr,size))) { \
155 switch (size) { \
156 case 1: __get_user_asm("bu"); break; \
157 case 2: __get_user_asm("hu"); break; \
158 case 4: __get_user_asm("" ); break; \
159 default: __get_user_unknown(); break; \
160 } \
161 } \
162 else { \
163 __gu_err = -EFAULT; \
164 __gu_val = 0; \
165 } \
166 x = (__typeof__(*(ptr))) __gu_val; \
167 __gu_err; \
168})
169
170#define __get_user_asm(INSN) \
171({ \
172 asm volatile( \
173 "1:\n" \
174 " mov"INSN" %2,%1\n" \
175 " mov 0,%0\n" \
176 "2:\n" \
177 " .section .fixup,\"ax\"\n" \
178 "3:\n\t" \
179 " mov %3,%0\n" \
180 " jmp 2b\n" \
181 " .previous\n" \
182 " .section __ex_table,\"a\"\n" \
183 " .balign 4\n" \
184 " .long 1b, 3b\n" \
185 " .previous" \
186 : "=&r" (__gu_err), "=&r" (__gu_val) \
187 : "m" (__m(__gu_addr)), "i" (-EFAULT)); \
188})
189
190extern int __get_user_unknown(void);
191
192#define __put_user_nocheck(x, ptr, size) \
193({ \
194 union { \
195 __typeof__(*(ptr)) val; \
196 u32 bits[2]; \
197 } __pu_val; \
198 unsigned long __pu_addr; \
199 int __pu_err; \
200 __pu_val.val = (x); \
201 __pu_addr = (unsigned long) (ptr); \
202 switch (size) { \
203 case 1: __put_user_asm("bu"); break; \
204 case 2: __put_user_asm("hu"); break; \
205 case 4: __put_user_asm("" ); break; \
206 case 8: __put_user_asm8(); break; \
207 default: __pu_err = __put_user_unknown(); break; \
208 } \
209 __pu_err; \
210})
211
212#define __put_user_check(x, ptr, size) \
213({ \
214 union { \
215 __typeof__(*(ptr)) val; \
216 u32 bits[2]; \
217 } __pu_val; \
218 unsigned long __pu_addr; \
219 int __pu_err; \
220 __pu_val.val = (x); \
221 __pu_addr = (unsigned long) (ptr); \
222 if (likely(__access_ok(__pu_addr, size))) { \
223 switch (size) { \
224 case 1: __put_user_asm("bu"); break; \
225 case 2: __put_user_asm("hu"); break; \
226 case 4: __put_user_asm("" ); break; \
227 case 8: __put_user_asm8(); break; \
228 default: __pu_err = __put_user_unknown(); break; \
229 } \
230 } \
231 else { \
232 __pu_err = -EFAULT; \
233 } \
234 __pu_err; \
235})
236
237#define __put_user_asm(INSN) \
238({ \
239 asm volatile( \
240 "1:\n" \
241 " mov"INSN" %1,%2\n" \
242 " mov 0,%0\n" \
243 "2:\n" \
244 " .section .fixup,\"ax\"\n" \
245 "3:\n" \
246 " mov %3,%0\n" \
247 " jmp 2b\n" \
248 " .previous\n" \
249 " .section __ex_table,\"a\"\n" \
250 " .balign 4\n" \
251 " .long 1b, 3b\n" \
252 " .previous" \
253 : "=&r" (__pu_err) \
254 : "r" (__pu_val.val), "m" (__m(__pu_addr)), \
255 "i" (-EFAULT) \
256 ); \
257})
258
259#define __put_user_asm8() \
260({ \
261 asm volatile( \
262 "1: mov %1,%3 \n" \
263 "2: mov %2,%4 \n" \
264 " mov 0,%0 \n" \
265 "3: \n" \
266 " .section .fixup,\"ax\" \n" \
267 "4: \n" \
268 " mov %5,%0 \n" \
269 " jmp 3b \n" \
270 " .previous \n" \
271 " .section __ex_table,\"a\"\n" \
272 " .balign 4 \n" \
273 " .long 1b, 4b \n" \
274 " .long 2b, 4b \n" \
275 " .previous \n" \
276 : "=&r" (__pu_err) \
277 : "r" (__pu_val.bits[0]), "r" (__pu_val.bits[1]), \
278 "m" (__m(__pu_addr)), "m" (__m(__pu_addr+4)), \
279 "i" (-EFAULT) \
280 ); \
281})
282
283extern int __put_user_unknown(void);
284
285
286/*
287 * Copy To/From Userspace
288 */
289/* Generic arbitrary sized copy. */
290#define __copy_user(to, from, size) \
291do { \
292 if (size) { \
293 void *__to = to; \
294 const void *__from = from; \
295 int w; \
296 asm volatile( \
297 "0: movbu (%0),%3;\n" \
298 "1: movbu %3,(%1);\n" \
299 " inc %0;\n" \
300 " inc %1;\n" \
301 " add -1,%2;\n" \
302 " bne 0b;\n" \
303 "2:\n" \
304 " .section .fixup,\"ax\"\n" \
305 "3: jmp 2b\n" \
306 " .previous\n" \
307 " .section __ex_table,\"a\"\n" \
308 " .balign 4\n" \
309 " .long 0b,3b\n" \
310 " .long 1b,3b\n" \
311 " .previous\n" \
312 : "=a"(__from), "=a"(__to), "=r"(size), "=&r"(w)\
313 : "0"(__from), "1"(__to), "2"(size) \
314 : "memory"); \
315 } \
316} while (0)
317
318#define __copy_user_zeroing(to, from, size) \
319do { \
320 if (size) { \
321 void *__to = to; \
322 const void *__from = from; \
323 int w; \
324 asm volatile( \
325 "0: movbu (%0),%3;\n" \
326 "1: movbu %3,(%1);\n" \
327 " inc %0;\n" \
328 " inc %1;\n" \
329 " add -1,%2;\n" \
330 " bne 0b;\n" \
331 "2:\n" \
332 " .section .fixup,\"ax\"\n" \
333 "3:\n" \
334 " mov %2,%0\n" \
335 " clr %3\n" \
336 "4: movbu %3,(%1);\n" \
337 " inc %1;\n" \
338 " add -1,%2;\n" \
339 " bne 4b;\n" \
340 " mov %0,%2\n" \
341 " jmp 2b\n" \
342 " .previous\n" \
343 " .section __ex_table,\"a\"\n" \
344 " .balign 4\n" \
345 " .long 0b,3b\n" \
346 " .long 1b,3b\n" \
347 " .previous\n" \
348 : "=a"(__from), "=a"(__to), "=r"(size), "=&r"(w)\
349 : "0"(__from), "1"(__to), "2"(size) \
350 : "memory"); \
351 } \
352} while (0)
353
354/* We let the __ versions of copy_from/to_user inline, because they're often
355 * used in fast paths and have only a small space overhead.
356 */
357static inline
358unsigned long __generic_copy_from_user_nocheck(void *to, const void *from,
359 unsigned long n)
360{
361 __copy_user_zeroing(to, from, n);
362 return n;
363}
364
365static inline
366unsigned long __generic_copy_to_user_nocheck(void *to, const void *from,
367 unsigned long n)
368{
369 __copy_user(to, from, n);
370 return n;
371}
372
373
374#if 0
375#error don't use - these macros don't increment to & from pointers
376/* Optimize just a little bit when we know the size of the move. */
377#define __constant_copy_user(to, from, size) \
378do { \
379 asm volatile( \
380 " mov %0,a0;\n" \
381 "0: movbu (%1),d3;\n" \
382 "1: movbu d3,(%2);\n" \
383 " add -1,a0;\n" \
384 " bne 0b;\n" \
385 "2:;" \
386 ".section .fixup,\"ax\"\n" \
387 "3: jmp 2b\n" \
388 ".previous\n" \
389 ".section __ex_table,\"a\"\n" \
390 " .balign 4\n" \
391 " .long 0b,3b\n" \
392 " .long 1b,3b\n" \
393 ".previous" \
394 : \
395 : "d"(size), "d"(to), "d"(from) \
396 : "d3", "a0"); \
397} while (0)
398
399/* Optimize just a little bit when we know the size of the move. */
400#define __constant_copy_user_zeroing(to, from, size) \
401do { \
402 asm volatile( \
403 " mov %0,a0;\n" \
404 "0: movbu (%1),d3;\n" \
405 "1: movbu d3,(%2);\n" \
406 " add -1,a0;\n" \
407 " bne 0b;\n" \
408 "2:;" \
409 ".section .fixup,\"ax\"\n" \
410 "3: jmp 2b\n" \
411 ".previous\n" \
412 ".section __ex_table,\"a\"\n" \
413 " .balign 4\n" \
414 " .long 0b,3b\n" \
415 " .long 1b,3b\n" \
416 ".previous" \
417 : \
418 : "d"(size), "d"(to), "d"(from) \
419 : "d3", "a0"); \
420} while (0)
421
422static inline
423unsigned long __constant_copy_to_user(void *to, const void *from,
424 unsigned long n)
425{
426 if (access_ok(VERIFY_WRITE, to, n))
427 __constant_copy_user(to, from, n);
428 return n;
429}
430
431static inline
432unsigned long __constant_copy_from_user(void *to, const void *from,
433 unsigned long n)
434{
435 if (access_ok(VERIFY_READ, from, n))
436 __constant_copy_user_zeroing(to, from, n);
437 return n;
438}
439
440static inline
441unsigned long __constant_copy_to_user_nocheck(void *to, const void *from,
442 unsigned long n)
443{
444 __constant_copy_user(to, from, n);
445 return n;
446}
447
448static inline
449unsigned long __constant_copy_from_user_nocheck(void *to, const void *from,
450 unsigned long n)
451{
452 __constant_copy_user_zeroing(to, from, n);
453 return n;
454}
455#endif
456
457extern unsigned long __generic_copy_to_user(void __user *, const void *,
458 unsigned long);
459extern unsigned long __generic_copy_from_user(void *, const void __user *,
460 unsigned long);
461
462#define __copy_to_user_inatomic(to, from, n) \
463 __generic_copy_to_user_nocheck((to), (from), (n))
464#define __copy_from_user_inatomic(to, from, n) \
465 __generic_copy_from_user_nocheck((to), (from), (n))
466
467#define __copy_to_user(to, from, n) \
468({ \
469 might_sleep(); \
470 __copy_to_user_inatomic((to), (from), (n)); \
471})
472
473#define __copy_from_user(to, from, n) \
474({ \
475 might_sleep(); \
476 __copy_from_user_inatomic((to), (from), (n)); \
477})
478
479
480#define copy_to_user(to, from, n) __generic_copy_to_user((to), (from), (n))
481#define copy_from_user(to, from, n) __generic_copy_from_user((to), (from), (n))
482
483extern long strncpy_from_user(char *dst, const char __user *src, long count);
484extern long __strncpy_from_user(char *dst, const char __user *src, long count);
485extern long strnlen_user(const char __user *str, long n);
486#define strlen_user(str) strnlen_user(str, ~0UL >> 1)
487extern unsigned long clear_user(void __user *mem, unsigned long len);
488extern unsigned long __clear_user(void __user *mem, unsigned long len);
489
490#endif /* _ASM_UACCESS_H */
diff --git a/include/asm-mn10300/ucontext.h b/include/asm-mn10300/ucontext.h
deleted file mode 100644
index fcab5c1d8e18..000000000000
--- a/include/asm-mn10300/ucontext.h
+++ /dev/null
@@ -1,22 +0,0 @@
1/* MN10300 User context
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_UCONTEXT_H
12#define _ASM_UCONTEXT_H
13
14struct ucontext {
15 unsigned long uc_flags;
16 struct ucontext *uc_link;
17 stack_t uc_stack;
18 struct sigcontext uc_mcontext;
19 sigset_t uc_sigmask; /* mask last for extensibility */
20};
21
22#endif /* _ASM_UCONTEXT_H */
diff --git a/include/asm-mn10300/unaligned.h b/include/asm-mn10300/unaligned.h
deleted file mode 100644
index 0df671318ae4..000000000000
--- a/include/asm-mn10300/unaligned.h
+++ /dev/null
@@ -1,20 +0,0 @@
1/* MN10300 Unaligned memory access handling
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_MN10300_UNALIGNED_H
12#define _ASM_MN10300_UNALIGNED_H
13
14#include <linux/unaligned/access_ok.h>
15#include <linux/unaligned/generic.h>
16
17#define get_unaligned __get_unaligned_le
18#define put_unaligned __put_unaligned_le
19
20#endif /* _ASM_MN10300_UNALIGNED_H */
diff --git a/include/asm-mn10300/unistd.h b/include/asm-mn10300/unistd.h
deleted file mode 100644
index 543a4f98695d..000000000000
--- a/include/asm-mn10300/unistd.h
+++ /dev/null
@@ -1,390 +0,0 @@
1/* MN10300 System call number list
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_UNISTD_H
12#define _ASM_UNISTD_H
13
14#define __NR_restart_syscall 0
15#define __NR_exit 1
16#define __NR_fork 2
17#define __NR_read 3
18#define __NR_write 4
19#define __NR_open 5
20#define __NR_close 6
21#define __NR_waitpid 7
22#define __NR_creat 8
23#define __NR_link 9
24#define __NR_unlink 10
25#define __NR_execve 11
26#define __NR_chdir 12
27#define __NR_time 13
28#define __NR_mknod 14
29#define __NR_chmod 15
30#define __NR_lchown 16
31#define __NR_break 17
32#define __NR_oldstat 18
33#define __NR_lseek 19
34#define __NR_getpid 20
35#define __NR_mount 21
36#define __NR_umount 22
37#define __NR_setuid 23
38#define __NR_getuid 24
39#define __NR_stime 25
40#define __NR_ptrace 26
41#define __NR_alarm 27
42#define __NR_oldfstat 28
43#define __NR_pause 29
44#define __NR_utime 30
45#define __NR_stty 31
46#define __NR_gtty 32
47#define __NR_access 33
48#define __NR_nice 34
49#define __NR_ftime 35
50#define __NR_sync 36
51#define __NR_kill 37
52#define __NR_rename 38
53#define __NR_mkdir 39
54#define __NR_rmdir 40
55#define __NR_dup 41
56#define __NR_pipe 42
57#define __NR_times 43
58#define __NR_prof 44
59#define __NR_brk 45
60#define __NR_setgid 46
61#define __NR_getgid 47
62#define __NR_signal 48
63#define __NR_geteuid 49
64#define __NR_getegid 50
65#define __NR_acct 51
66#define __NR_umount2 52
67#define __NR_lock 53
68#define __NR_ioctl 54
69#define __NR_fcntl 55
70#define __NR_mpx 56
71#define __NR_setpgid 57
72#define __NR_ulimit 58
73#define __NR_oldolduname 59
74#define __NR_umask 60
75#define __NR_chroot 61
76#define __NR_ustat 62
77#define __NR_dup2 63
78#define __NR_getppid 64
79#define __NR_getpgrp 65
80#define __NR_setsid 66
81#define __NR_sigaction 67
82#define __NR_sgetmask 68
83#define __NR_ssetmask 69
84#define __NR_setreuid 70
85#define __NR_setregid 71
86#define __NR_sigsuspend 72
87#define __NR_sigpending 73
88#define __NR_sethostname 74
89#define __NR_setrlimit 75
90#define __NR_getrlimit 76 /* Back compatible 2Gig limited rlimit */
91#define __NR_getrusage 77
92#define __NR_gettimeofday 78
93#define __NR_settimeofday 79
94#define __NR_getgroups 80
95#define __NR_setgroups 81
96#define __NR_select 82
97#define __NR_symlink 83
98#define __NR_oldlstat 84
99#define __NR_readlink 85
100#define __NR_uselib 86
101#define __NR_swapon 87
102#define __NR_reboot 88
103#define __NR_readdir 89
104#define __NR_mmap 90
105#define __NR_munmap 91
106#define __NR_truncate 92
107#define __NR_ftruncate 93
108#define __NR_fchmod 94
109#define __NR_fchown 95
110#define __NR_getpriority 96
111#define __NR_setpriority 97
112#define __NR_profil 98
113#define __NR_statfs 99
114#define __NR_fstatfs 100
115#define __NR_ioperm 101
116#define __NR_socketcall 102
117#define __NR_syslog 103
118#define __NR_setitimer 104
119#define __NR_getitimer 105
120#define __NR_stat 106
121#define __NR_lstat 107
122#define __NR_fstat 108
123#define __NR_olduname 109
124#define __NR_iopl 110
125#define __NR_vhangup 111
126#define __NR_idle 112
127#define __NR_vm86old 113
128#define __NR_wait4 114
129#define __NR_swapoff 115
130#define __NR_sysinfo 116
131#define __NR_ipc 117
132#define __NR_fsync 118
133#define __NR_sigreturn 119
134#define __NR_clone 120
135#define __NR_setdomainname 121
136#define __NR_uname 122
137#define __NR_modify_ldt 123
138#define __NR_adjtimex 124
139#define __NR_mprotect 125
140#define __NR_sigprocmask 126
141#define __NR_create_module 127
142#define __NR_init_module 128
143#define __NR_delete_module 129
144#define __NR_get_kernel_syms 130
145#define __NR_quotactl 131
146#define __NR_getpgid 132
147#define __NR_fchdir 133
148#define __NR_bdflush 134
149#define __NR_sysfs 135
150#define __NR_personality 136
151#define __NR_afs_syscall 137 /* Syscall for Andrew File System */
152#define __NR_setfsuid 138
153#define __NR_setfsgid 139
154#define __NR__llseek 140
155#define __NR_getdents 141
156#define __NR__newselect 142
157#define __NR_flock 143
158#define __NR_msync 144
159#define __NR_readv 145
160#define __NR_writev 146
161#define __NR_getsid 147
162#define __NR_fdatasync 148
163#define __NR__sysctl 149
164#define __NR_mlock 150
165#define __NR_munlock 151
166#define __NR_mlockall 152
167#define __NR_munlockall 153
168#define __NR_sched_setparam 154
169#define __NR_sched_getparam 155
170#define __NR_sched_setscheduler 156
171#define __NR_sched_getscheduler 157
172#define __NR_sched_yield 158
173#define __NR_sched_get_priority_max 159
174#define __NR_sched_get_priority_min 160
175#define __NR_sched_rr_get_interval 161
176#define __NR_nanosleep 162
177#define __NR_mremap 163
178#define __NR_setresuid 164
179#define __NR_getresuid 165
180#define __NR_vm86 166
181#define __NR_query_module 167
182#define __NR_poll 168
183#define __NR_nfsservctl 169
184#define __NR_setresgid 170
185#define __NR_getresgid 171
186#define __NR_prctl 172
187#define __NR_rt_sigreturn 173
188#define __NR_rt_sigaction 174
189#define __NR_rt_sigprocmask 175
190#define __NR_rt_sigpending 176
191#define __NR_rt_sigtimedwait 177
192#define __NR_rt_sigqueueinfo 178
193#define __NR_rt_sigsuspend 179
194#define __NR_pread64 180
195#define __NR_pwrite64 181
196#define __NR_chown 182
197#define __NR_getcwd 183
198#define __NR_capget 184
199#define __NR_capset 185
200#define __NR_sigaltstack 186
201#define __NR_sendfile 187
202#define __NR_getpmsg 188 /* some people actually want streams */
203#define __NR_putpmsg 189 /* some people actually want streams */
204#define __NR_vfork 190
205#define __NR_ugetrlimit 191 /* SuS compliant getrlimit */
206#define __NR_mmap2 192
207#define __NR_truncate64 193
208#define __NR_ftruncate64 194
209#define __NR_stat64 195
210#define __NR_lstat64 196
211#define __NR_fstat64 197
212#define __NR_lchown32 198
213#define __NR_getuid32 199
214#define __NR_getgid32 200
215#define __NR_geteuid32 201
216#define __NR_getegid32 202
217#define __NR_setreuid32 203
218#define __NR_setregid32 204
219#define __NR_getgroups32 205
220#define __NR_setgroups32 206
221#define __NR_fchown32 207
222#define __NR_setresuid32 208
223#define __NR_getresuid32 209
224#define __NR_setresgid32 210
225#define __NR_getresgid32 211
226#define __NR_chown32 212
227#define __NR_setuid32 213
228#define __NR_setgid32 214
229#define __NR_setfsuid32 215
230#define __NR_setfsgid32 216
231#define __NR_pivot_root 217
232#define __NR_mincore 218
233#define __NR_madvise 219
234#define __NR_madvise1 219 /* delete when C lib stub is removed */
235#define __NR_getdents64 220
236#define __NR_fcntl64 221
237/* 223 is unused */
238#define __NR_gettid 224
239#define __NR_readahead 225
240#define __NR_setxattr 226
241#define __NR_lsetxattr 227
242#define __NR_fsetxattr 228
243#define __NR_getxattr 229
244#define __NR_lgetxattr 230
245#define __NR_fgetxattr 231
246#define __NR_listxattr 232
247#define __NR_llistxattr 233
248#define __NR_flistxattr 234
249#define __NR_removexattr 235
250#define __NR_lremovexattr 236
251#define __NR_fremovexattr 237
252#define __NR_tkill 238
253#define __NR_sendfile64 239
254#define __NR_futex 240
255#define __NR_sched_setaffinity 241
256#define __NR_sched_getaffinity 242
257#define __NR_set_thread_area 243
258#define __NR_get_thread_area 244
259#define __NR_io_setup 245
260#define __NR_io_destroy 246
261#define __NR_io_getevents 247
262#define __NR_io_submit 248
263#define __NR_io_cancel 249
264#define __NR_fadvise64 250
265
266#define __NR_exit_group 252
267#define __NR_lookup_dcookie 253
268#define __NR_epoll_create 254
269#define __NR_epoll_ctl 255
270#define __NR_epoll_wait 256
271#define __NR_remap_file_pages 257
272#define __NR_set_tid_address 258
273#define __NR_timer_create 259
274#define __NR_timer_settime (__NR_timer_create+1)
275#define __NR_timer_gettime (__NR_timer_create+2)
276#define __NR_timer_getoverrun (__NR_timer_create+3)
277#define __NR_timer_delete (__NR_timer_create+4)
278#define __NR_clock_settime (__NR_timer_create+5)
279#define __NR_clock_gettime (__NR_timer_create+6)
280#define __NR_clock_getres (__NR_timer_create+7)
281#define __NR_clock_nanosleep (__NR_timer_create+8)
282#define __NR_statfs64 268
283#define __NR_fstatfs64 269
284#define __NR_tgkill 270
285#define __NR_utimes 271
286#define __NR_fadvise64_64 272
287#define __NR_vserver 273
288#define __NR_mbind 274
289#define __NR_get_mempolicy 275
290#define __NR_set_mempolicy 276
291#define __NR_mq_open 277
292#define __NR_mq_unlink (__NR_mq_open+1)
293#define __NR_mq_timedsend (__NR_mq_open+2)
294#define __NR_mq_timedreceive (__NR_mq_open+3)
295#define __NR_mq_notify (__NR_mq_open+4)
296#define __NR_mq_getsetattr (__NR_mq_open+5)
297#define __NR_kexec_load 283
298#define __NR_waitid 284
299#define __NR_add_key 286
300#define __NR_request_key 287
301#define __NR_keyctl 288
302#define __NR_cacheflush 289
303#define __NR_ioprio_set 290
304#define __NR_ioprio_get 291
305#define __NR_inotify_init 292
306#define __NR_inotify_add_watch 293
307#define __NR_inotify_rm_watch 294
308#define __NR_migrate_pages 295
309#define __NR_openat 296
310#define __NR_mkdirat 297
311#define __NR_mknodat 298
312#define __NR_fchownat 299
313#define __NR_futimesat 300
314#define __NR_fstatat64 301
315#define __NR_unlinkat 302
316#define __NR_renameat 303
317#define __NR_linkat 304
318#define __NR_symlinkat 305
319#define __NR_readlinkat 306
320#define __NR_fchmodat 307
321#define __NR_faccessat 308
322#define __NR_pselect6 309
323#define __NR_ppoll 310
324#define __NR_unshare 311
325#define __NR_set_robust_list 312
326#define __NR_get_robust_list 313
327#define __NR_splice 314
328#define __NR_sync_file_range 315
329#define __NR_tee 316
330#define __NR_vmsplice 317
331#define __NR_move_pages 318
332#define __NR_getcpu 319
333#define __NR_epoll_pwait 320
334#define __NR_utimensat 321
335#define __NR_signalfd 322
336#define __NR_timerfd_create 323
337#define __NR_eventfd 324
338#define __NR_fallocate 325
339#define __NR_timerfd_settime 326
340#define __NR_timerfd_gettime 327
341#define __NR_signalfd4 328
342#define __NR_eventfd2 329
343#define __NR_epoll_create1 330
344#define __NR_dup3 331
345#define __NR_pipe2 332
346#define __NR_inotify_init1 333
347
348#ifdef __KERNEL__
349
350#define NR_syscalls 326
351
352/*
353 * specify the deprecated syscalls we want to support on this arch
354 */
355#define __ARCH_WANT_IPC_PARSE_VERSION
356#define __ARCH_WANT_OLD_READDIR
357#define __ARCH_WANT_OLD_STAT
358#define __ARCH_WANT_STAT64
359#define __ARCH_WANT_SYS_ALARM
360#define __ARCH_WANT_SYS_GETHOSTNAME
361#define __ARCH_WANT_SYS_PAUSE
362#define __ARCH_WANT_SYS_SGETMASK
363#define __ARCH_WANT_SYS_SIGNAL
364#define __ARCH_WANT_SYS_TIME
365#define __ARCH_WANT_SYS_UTIME
366#define __ARCH_WANT_SYS_WAITPID
367#define __ARCH_WANT_SYS_SOCKETCALL
368#define __ARCH_WANT_SYS_FADVISE64
369#define __ARCH_WANT_SYS_GETPGRP
370#define __ARCH_WANT_SYS_LLSEEK
371#define __ARCH_WANT_SYS_NICE
372#define __ARCH_WANT_SYS_OLD_GETRLIMIT
373#define __ARCH_WANT_SYS_OLDUMOUNT
374#define __ARCH_WANT_SYS_SIGPENDING
375#define __ARCH_WANT_SYS_SIGPROCMASK
376#define __ARCH_WANT_SYS_RT_SIGACTION
377#define __ARCH_WANT_SYS_RT_SIGSUSPEND
378
379/*
380 * "Conditional" syscalls
381 *
382 * What we want is __attribute__((weak,alias("sys_ni_syscall"))),
383 * but it doesn't work on all toolchains, so we just do it by hand
384 */
385#ifndef cond_syscall
386#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall");
387#endif
388
389#endif /* __KERNEL__ */
390#endif /* _ASM_UNISTD_H */
diff --git a/include/asm-mn10300/unit-asb2303/clock.h b/include/asm-mn10300/unit-asb2303/clock.h
deleted file mode 100644
index 8b450e920af1..000000000000
--- a/include/asm-mn10300/unit-asb2303/clock.h
+++ /dev/null
@@ -1,45 +0,0 @@
1/* ASB2303-specific clocks
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_UNIT_CLOCK_H
13#define _ASM_UNIT_CLOCK_H
14
15#ifndef __ASSEMBLY__
16
17#ifdef CONFIG_MN10300_RTC
18
19extern unsigned long mn10300_ioclk; /* IOCLK (crystal speed) in HZ */
20extern unsigned long mn10300_iobclk;
21extern unsigned long mn10300_tsc_per_HZ;
22
23#define MN10300_IOCLK ((unsigned long)mn10300_ioclk)
24/* If this processors has a another clock, uncomment the below. */
25/* #define MN10300_IOBCLK ((unsigned long)mn10300_iobclk) */
26
27#else /* !CONFIG_MN10300_RTC */
28
29#define MN10300_IOCLK 33333333UL
30/* #define MN10300_IOBCLK 66666666UL */
31
32#endif /* !CONFIG_MN10300_RTC */
33
34#define MN10300_JCCLK MN10300_IOCLK
35#define MN10300_TSCCLK MN10300_IOCLK
36
37#ifdef CONFIG_MN10300_RTC
38#define MN10300_TSC_PER_HZ ((unsigned long)mn10300_tsc_per_HZ)
39#else /* !CONFIG_MN10300_RTC */
40#define MN10300_TSC_PER_HZ (MN10300_TSCCLK/HZ)
41#endif /* !CONFIG_MN10300_RTC */
42
43#endif /* !__ASSEMBLY__ */
44
45#endif /* _ASM_UNIT_CLOCK_H */
diff --git a/include/asm-mn10300/unit-asb2303/leds.h b/include/asm-mn10300/unit-asb2303/leds.h
deleted file mode 100644
index 3a7543ea7b5c..000000000000
--- a/include/asm-mn10300/unit-asb2303/leds.h
+++ /dev/null
@@ -1,43 +0,0 @@
1/* ASB2303-specific LEDs
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_UNIT_LEDS_H
13#define _ASM_UNIT_LEDS_H
14
15#include <asm/pio-regs.h>
16#include <asm/cpu-regs.h>
17#include <asm/exceptions.h>
18
19#define ASB2303_GPIO0DEF __SYSREG(0xDB000000, u32)
20#define ASB2303_7SEGLEDS __SYSREG(0xDB000008, u32)
21
22/*
23 * use the 7-segment LEDs to indicate states
24 */
25
26/* flip the 7-segment LEDs between "G" and "-" */
27#define mn10300_set_gdbleds(ONOFF) \
28do { \
29 ASB2303_7SEGLEDS = (ONOFF) ? 0x85 : 0x7f; \
30} while (0)
31
32/* indicate double-fault by displaying "d" on the LEDs */
33#define mn10300_set_dbfleds \
34 mov 0x43,d0 ; \
35 movbu d0,(ASB2303_7SEGLEDS)
36
37#ifndef __ASSEMBLY__
38extern void peripheral_leds_display_exception(enum exception_code code);
39extern void peripheral_leds_led_chase(void);
40extern void debug_to_serial(const char *p, int n);
41#endif /* __ASSEMBLY__ */
42
43#endif /* _ASM_UNIT_LEDS_H */
diff --git a/include/asm-mn10300/unit-asb2303/serial.h b/include/asm-mn10300/unit-asb2303/serial.h
deleted file mode 100644
index 0d55cf5896ac..000000000000
--- a/include/asm-mn10300/unit-asb2303/serial.h
+++ /dev/null
@@ -1,136 +0,0 @@
1/* ASB2303-specific 8250 serial ports
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_UNIT_SERIAL_H
13#define _ASM_UNIT_SERIAL_H
14
15#include <asm/cpu-regs.h>
16#include <asm/proc/irq.h>
17#include <linux/serial_reg.h>
18
19#define SERIAL_PORT0_BASE_ADDRESS 0xA6FB0000
20#define SERIAL_PORT1_BASE_ADDRESS 0xA6FC0000
21
22#define SERIAL_IRQ XIRQ0 /* Dual serial (PC16552) (Hi) */
23
24/*
25 * dispose of the /dev/ttyS0 and /dev/ttyS1 serial ports
26 */
27#ifndef CONFIG_GDBSTUB_ON_TTYSx
28
29#define SERIAL_PORT_DFNS \
30 { \
31 .baud_base = BASE_BAUD, \
32 .irq = SERIAL_IRQ, \
33 .flags = STD_COM_FLAGS, \
34 .iomem_base = (u8 *) SERIAL_PORT0_BASE_ADDRESS, \
35 .iomem_reg_shift = 2, \
36 .io_type = SERIAL_IO_MEM, \
37 }, \
38 { \
39 .baud_base = BASE_BAUD, \
40 .irq = SERIAL_IRQ, \
41 .flags = STD_COM_FLAGS, \
42 .iomem_base = (u8 *) SERIAL_PORT1_BASE_ADDRESS, \
43 .iomem_reg_shift = 2, \
44 .io_type = SERIAL_IO_MEM, \
45 },
46
47#ifndef __ASSEMBLY__
48
49static inline void __debug_to_serial(const char *p, int n)
50{
51}
52
53#endif /* !__ASSEMBLY__ */
54
55#else /* CONFIG_GDBSTUB_ON_TTYSx */
56
57#define SERIAL_PORT_DFNS /* both stolen by gdb-stub because they share an IRQ */
58
59#if defined(CONFIG_GDBSTUB_ON_TTYS0)
60#define GDBPORT_SERIAL_RX __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_RX * 4, u8)
61#define GDBPORT_SERIAL_TX __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_TX * 4, u8)
62#define GDBPORT_SERIAL_DLL __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_DLL * 4, u8)
63#define GDBPORT_SERIAL_DLM __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_DLM * 4, u8)
64#define GDBPORT_SERIAL_IER __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_IER * 4, u8)
65#define GDBPORT_SERIAL_IIR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_IIR * 4, u8)
66#define GDBPORT_SERIAL_FCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_FCR * 4, u8)
67#define GDBPORT_SERIAL_LCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_LCR * 4, u8)
68#define GDBPORT_SERIAL_MCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_MCR * 4, u8)
69#define GDBPORT_SERIAL_LSR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_LSR * 4, u8)
70#define GDBPORT_SERIAL_MSR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_MSR * 4, u8)
71#define GDBPORT_SERIAL_SCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_SCR * 4, u8)
72#define GDBPORT_SERIAL_IRQ SERIAL_IRQ
73
74#elif defined(CONFIG_GDBSTUB_ON_TTYS1)
75#define GDBPORT_SERIAL_RX __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_RX * 4, u8)
76#define GDBPORT_SERIAL_TX __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_TX * 4, u8)
77#define GDBPORT_SERIAL_DLL __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_DLL * 4, u8)
78#define GDBPORT_SERIAL_DLM __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_DLM * 4, u8)
79#define GDBPORT_SERIAL_IER __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_IER * 4, u8)
80#define GDBPORT_SERIAL_IIR __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_IIR * 4, u8)
81#define GDBPORT_SERIAL_FCR __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_FCR * 4, u8)
82#define GDBPORT_SERIAL_LCR __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_LCR * 4, u8)
83#define GDBPORT_SERIAL_MCR __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_MCR * 4, u8)
84#define GDBPORT_SERIAL_LSR __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_LSR * 4, u8)
85#define GDBPORT_SERIAL_MSR __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_MSR * 4, u8)
86#define GDBPORT_SERIAL_SCR __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_SCR * 4, u8)
87#define GDBPORT_SERIAL_IRQ SERIAL_IRQ
88#endif
89
90#ifndef __ASSEMBLY__
91
92#define LSR_WAIT_FOR(STATE) \
93do { \
94 while (!(GDBPORT_SERIAL_LSR & UART_LSR_##STATE)) {} \
95} while (0)
96#define FLOWCTL_WAIT_FOR(LINE) \
97do { \
98 while (!(GDBPORT_SERIAL_MSR & UART_MSR_##LINE)) {} \
99} while (0)
100#define FLOWCTL_CLEAR(LINE) \
101do { \
102 GDBPORT_SERIAL_MCR &= ~UART_MCR_##LINE; \
103} while (0)
104#define FLOWCTL_SET(LINE) \
105do { \
106 GDBPORT_SERIAL_MCR |= UART_MCR_##LINE; \
107} while (0)
108#define FLOWCTL_QUERY(LINE) ({ GDBPORT_SERIAL_MSR & UART_MSR_##LINE; })
109
110static inline void __debug_to_serial(const char *p, int n)
111{
112 char ch;
113
114 FLOWCTL_SET(DTR);
115
116 for (; n > 0; n--) {
117 LSR_WAIT_FOR(THRE);
118 FLOWCTL_WAIT_FOR(CTS);
119
120 ch = *p++;
121 if (ch == 0x0a) {
122 GDBPORT_SERIAL_TX = 0x0d;
123 LSR_WAIT_FOR(THRE);
124 FLOWCTL_WAIT_FOR(CTS);
125 }
126 GDBPORT_SERIAL_TX = ch;
127 }
128
129 FLOWCTL_CLEAR(DTR);
130}
131
132#endif /* !__ASSEMBLY__ */
133
134#endif /* CONFIG_GDBSTUB_ON_TTYSx */
135
136#endif /* _ASM_UNIT_SERIAL_H */
diff --git a/include/asm-mn10300/unit-asb2303/smc91111.h b/include/asm-mn10300/unit-asb2303/smc91111.h
deleted file mode 100644
index dd456e9c513f..000000000000
--- a/include/asm-mn10300/unit-asb2303/smc91111.h
+++ /dev/null
@@ -1,50 +0,0 @@
1/* Support for the SMC91C111 NIC on an ASB2303
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_UNIT_SMC91111_H
12#define _ASM_UNIT_SMC91111_H
13
14#include <asm/intctl-regs.h>
15
16#define SMC91111_BASE 0xAA000300UL
17#define SMC91111_BASE_END 0xAA000400UL
18#define SMC91111_IRQ XIRQ3
19
20#define SMC_CAN_USE_8BIT 0
21#define SMC_CAN_USE_16BIT 1
22#define SMC_CAN_USE_32BIT 0
23#define SMC_NOWAIT 1
24#define SMC_IRQ_FLAGS (0)
25
26#if SMC_CAN_USE_8BIT
27#define SMC_inb(a, r) inb((unsigned long) ((a) + (r)))
28#define SMC_outb(v, a, r) outb(v, (unsigned long) ((a) + (r)))
29#endif
30
31#if SMC_CAN_USE_16BIT
32#define SMC_inw(a, r) inw((unsigned long) ((a) + (r)))
33#define SMC_outw(v, a, r) outw(v, (unsigned long) ((a) + (r)))
34#define SMC_insw(a, r, p, l) insw((unsigned long) ((a) + (r)), (p), (l))
35#define SMC_outsw(a, r, p, l) outsw((unsigned long) ((a) + (r)), (p), (l))
36#endif
37
38#if SMC_CAN_USE_32BIT
39#define SMC_inl(a, r) inl((unsigned long) ((a) + (r)))
40#define SMC_outl(v, a, r) outl(v, (unsigned long) ((a) + (r)))
41#define SMC_insl(a, r, p, l) insl((unsigned long) ((a) + (r)), (p), (l))
42#define SMC_outsl(a, r, p, l) outsl((unsigned long) ((a) + (r)), (p), (l))
43#endif
44
45#define RPC_LSA_DEFAULT RPC_LED_100_10
46#define RPC_LSB_DEFAULT RPC_LED_TX_RX
47
48#define set_irq_type(irq, type)
49
50#endif /* _ASM_UNIT_SMC91111_H */
diff --git a/include/asm-mn10300/unit-asb2303/timex.h b/include/asm-mn10300/unit-asb2303/timex.h
deleted file mode 100644
index 7e54b0cfdd03..000000000000
--- a/include/asm-mn10300/unit-asb2303/timex.h
+++ /dev/null
@@ -1,135 +0,0 @@
1/* ASB2303-specific timer specifcations
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_UNIT_TIMEX_H
12#define _ASM_UNIT_TIMEX_H
13
14#ifndef __ASSEMBLY__
15#include <linux/irq.h>
16#endif /* __ASSEMBLY__ */
17
18#include <asm/timer-regs.h>
19#include <asm/unit/clock.h>
20
21/*
22 * jiffies counter specifications
23 */
24
25#define TMJCBR_MAX 0xffff
26#define TMJCBC TM01BC
27
28#define TMJCMD TM01MD
29#define TMJCBR TM01BR
30#define TMJCIRQ TM1IRQ
31#define TMJCICR TM1ICR
32#define TMJCICR_LEVEL GxICR_LEVEL_5
33
34#ifndef __ASSEMBLY__
35
36static inline void startup_jiffies_counter(void)
37{
38 unsigned rate;
39 u16 md, t16;
40
41 /* use as little prescaling as possible to avoid losing accuracy */
42 md = TM0MD_SRC_IOCLK;
43 rate = MN10300_JCCLK / HZ;
44
45 if (rate > TMJCBR_MAX) {
46 md = TM0MD_SRC_IOCLK_8;
47 rate = MN10300_JCCLK / 8 / HZ;
48
49 if (rate > TMJCBR_MAX) {
50 md = TM0MD_SRC_IOCLK_32;
51 rate = MN10300_JCCLK / 32 / HZ;
52
53 if (rate > TMJCBR_MAX)
54 BUG();
55 }
56 }
57
58 TMJCBR = rate - 1;
59 t16 = TMJCBR;
60
61 TMJCMD =
62 md |
63 TM1MD_SRC_TM0CASCADE << 8 |
64 TM0MD_INIT_COUNTER |
65 TM1MD_INIT_COUNTER << 8;
66
67 TMJCMD =
68 md |
69 TM1MD_SRC_TM0CASCADE << 8 |
70 TM0MD_COUNT_ENABLE |
71 TM1MD_COUNT_ENABLE << 8;
72
73 t16 = TMJCMD;
74
75 TMJCICR |= GxICR_ENABLE | GxICR_DETECT | GxICR_REQUEST;
76 t16 = TMJCICR;
77}
78
79static inline void shutdown_jiffies_counter(void)
80{
81}
82
83#endif /* !__ASSEMBLY__ */
84
85
86/*
87 * timestamp counter specifications
88 */
89
90#define TMTSCBR_MAX 0xffffffff
91#define TMTSCBC TM45BC
92
93#ifndef __ASSEMBLY__
94
95static inline void startup_timestamp_counter(void)
96{
97 /* set up timer 4 & 5 cascaded as a 32-bit counter to count real time
98 * - count down from 4Gig-1 to 0 and wrap at IOCLK rate
99 */
100 TM45BR = TMTSCBR_MAX;
101
102 TM4MD = TM4MD_SRC_IOCLK;
103 TM4MD |= TM4MD_INIT_COUNTER;
104 TM4MD &= ~TM4MD_INIT_COUNTER;
105 TM4ICR = 0;
106
107 TM5MD = TM5MD_SRC_TM4CASCADE;
108 TM5MD |= TM5MD_INIT_COUNTER;
109 TM5MD &= ~TM5MD_INIT_COUNTER;
110 TM5ICR = 0;
111
112 TM5MD |= TM5MD_COUNT_ENABLE;
113 TM4MD |= TM4MD_COUNT_ENABLE;
114}
115
116static inline void shutdown_timestamp_counter(void)
117{
118 TM4MD = 0;
119 TM5MD = 0;
120}
121
122/*
123 * we use a cascaded pair of 16-bit down-counting timers to count I/O
124 * clock cycles for the purposes of time keeping
125 */
126typedef unsigned long cycles_t;
127
128static inline cycles_t read_timestamp_counter(void)
129{
130 return (cycles_t)TMTSCBC;
131}
132
133#endif /* !__ASSEMBLY__ */
134
135#endif /* _ASM_UNIT_TIMEX_H */
diff --git a/include/asm-mn10300/unit-asb2305/clock.h b/include/asm-mn10300/unit-asb2305/clock.h
deleted file mode 100644
index 7d514841ffda..000000000000
--- a/include/asm-mn10300/unit-asb2305/clock.h
+++ /dev/null
@@ -1,45 +0,0 @@
1/* ASB2305-specific clocks
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_UNIT_CLOCK_H
13#define _ASM_UNIT_CLOCK_H
14
15#ifndef __ASSEMBLY__
16
17#ifdef CONFIG_MN10300_RTC
18
19extern unsigned long mn10300_ioclk; /* IOCLK (crystal speed) in HZ */
20extern unsigned long mn10300_iobclk;
21extern unsigned long mn10300_tsc_per_HZ;
22
23#define MN10300_IOCLK ((unsigned long)mn10300_ioclk)
24/* If this processors has a another clock, uncomment the below. */
25/* #define MN10300_IOBCLK ((unsigned long)mn10300_iobclk) */
26
27#else /* !CONFIG_MN10300_RTC */
28
29#define MN10300_IOCLK 33333333UL
30/* #define MN10300_IOBCLK 66666666UL */
31
32#endif /* !CONFIG_MN10300_RTC */
33
34#define MN10300_JCCLK MN10300_IOCLK
35#define MN10300_TSCCLK MN10300_IOCLK
36
37#ifdef CONFIG_MN10300_RTC
38#define MN10300_TSC_PER_HZ ((unsigned long)mn10300_tsc_per_HZ)
39#else /* !CONFIG_MN10300_RTC */
40#define MN10300_TSC_PER_HZ (MN10300_TSCCLK/HZ)
41#endif /* !CONFIG_MN10300_RTC */
42
43#endif /* !__ASSEMBLY__ */
44
45#endif /* _ASM_UNIT_CLOCK_H */
diff --git a/include/asm-mn10300/unit-asb2305/leds.h b/include/asm-mn10300/unit-asb2305/leds.h
deleted file mode 100644
index bc471f617fd1..000000000000
--- a/include/asm-mn10300/unit-asb2305/leds.h
+++ /dev/null
@@ -1,51 +0,0 @@
1/* ASB2305-specific LEDs
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_UNIT_LEDS_H
13#define _ASM_UNIT_LEDS_H
14
15#include <asm/pio-regs.h>
16#include <asm/cpu-regs.h>
17#include <asm/exceptions.h>
18
19#define ASB2305_7SEGLEDS __SYSREG(0xA6F90000, u32)
20
21/* perform a hard reset by driving PIO06 low */
22#define mn10300_unit_hard_reset() \
23do { \
24 P0OUT &= 0xbf; \
25 P0MD = (P0MD & P0MD_6) | P0MD_6_OUT; \
26} while (0)
27
28/*
29 * use the 7-segment LEDs to indicate states
30 */
31/* indicate double-fault by displaying "db-f" on the LEDs */
32#define mn10300_set_dbfleds \
33 mov 0x43077f1d,d0 ; \
34 mov d0,(ASB2305_7SEGLEDS)
35
36/* flip the 7-segment LEDs between "Gdb-" and "----" */
37#define mn10300_set_gdbleds(ONOFF) \
38do { \
39 ASB2305_7SEGLEDS = (ONOFF) ? 0x8543077f : 0x7f7f7f7f; \
40} while (0)
41
42#ifndef __ASSEMBLY__
43extern void peripheral_leds_display_exception(enum exception_code);
44extern void peripheral_leds_led_chase(void);
45extern void peripheral_leds7x4_display_dec(unsigned int, unsigned int);
46extern void peripheral_leds7x4_display_hex(unsigned int, unsigned int);
47extern void peripheral_leds7x4_display_minssecs(unsigned int, unsigned int);
48extern void peripheral_leds7x4_display_rtc(void);
49#endif /* __ASSEMBLY__ */
50
51#endif /* _ASM_UNIT_LEDS_H */
diff --git a/include/asm-mn10300/unit-asb2305/serial.h b/include/asm-mn10300/unit-asb2305/serial.h
deleted file mode 100644
index 73d31d67bb71..000000000000
--- a/include/asm-mn10300/unit-asb2305/serial.h
+++ /dev/null
@@ -1,120 +0,0 @@
1/* ASB2305-specific 8250 serial ports
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_UNIT_SERIAL_H
12#define _ASM_UNIT_SERIAL_H
13
14#include <asm/cpu/cpu-regs.h>
15#include <asm/proc/irq.h>
16#include <linux/serial_reg.h>
17
18#define SERIAL_PORT0_BASE_ADDRESS 0xA6FB0000
19#define ASB2305_DEBUG_MCR __SYSREG(0xA6FB0000 + UART_MCR * 2, u8)
20
21#define SERIAL_IRQ XIRQ0 /* Dual serial (PC16552) (Hi) */
22
23/*
24 * dispose of the /dev/ttyS0 serial port
25 */
26#ifndef CONFIG_GDBSTUB_ON_TTYSx
27
28#define SERIAL_PORT_DFNS \
29 { \
30 .baud_base = BASE_BAUD, \
31 .irq = SERIAL_IRQ, \
32 .flags = STD_COM_FLAGS, \
33 .iomem_base = (u8 *) SERIAL_PORT0_BASE_ADDRESS, \
34 .iomem_reg_shift = 2, \
35 .io_type = SERIAL_IO_MEM, \
36 },
37
38#ifndef __ASSEMBLY__
39
40static inline void __debug_to_serial(const char *p, int n)
41{
42}
43
44#endif /* !__ASSEMBLY__ */
45
46#else /* CONFIG_GDBSTUB_ON_TTYSx */
47
48#define SERIAL_PORT_DFNS /* stolen by gdb-stub */
49
50#if defined(CONFIG_GDBSTUB_ON_TTYS0)
51#define GDBPORT_SERIAL_RX __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_RX * 4, u8)
52#define GDBPORT_SERIAL_TX __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_TX * 4, u8)
53#define GDBPORT_SERIAL_DLL __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_DLL * 4, u8)
54#define GDBPORT_SERIAL_DLM __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_DLM * 4, u8)
55#define GDBPORT_SERIAL_IER __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_IER * 4, u8)
56#define GDBPORT_SERIAL_IIR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_IIR * 4, u8)
57#define GDBPORT_SERIAL_FCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_FCR * 4, u8)
58#define GDBPORT_SERIAL_LCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_LCR * 4, u8)
59#define GDBPORT_SERIAL_MCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_MCR * 4, u8)
60#define GDBPORT_SERIAL_LSR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_LSR * 4, u8)
61#define GDBPORT_SERIAL_MSR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_MSR * 4, u8)
62#define GDBPORT_SERIAL_SCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_SCR * 4, u8)
63#define GDBPORT_SERIAL_IRQ SERIAL_IRQ
64
65#elif defined(CONFIG_GDBSTUB_ON_TTYS1)
66#error The ASB2305 doesnt have a /dev/ttyS1
67#endif
68
69#ifndef __ASSEMBLY__
70
71#define TTYS0_TX __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_TX * 4, u8)
72#define TTYS0_MCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_MCR * 4, u8)
73#define TTYS0_LSR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_LSR * 4, u8)
74#define TTYS0_MSR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_MSR * 4, u8)
75
76#define LSR_WAIT_FOR(STATE) \
77do { \
78 while (!(TTYS0_LSR & UART_LSR_##STATE)) {} \
79} while (0)
80#define FLOWCTL_WAIT_FOR(LINE) \
81do { \
82 while (!(TTYS0_MSR & UART_MSR_##LINE)) {} \
83} while (0)
84#define FLOWCTL_CLEAR(LINE) \
85do { \
86 TTYS0_MCR &= ~UART_MCR_##LINE; \
87} while (0)
88#define FLOWCTL_SET(LINE) \
89do { \
90 TTYS0_MCR |= UART_MCR_##LINE; \
91} while (0)
92#define FLOWCTL_QUERY(LINE) ({ TTYS0_MSR & UART_MSR_##LINE; })
93
94static inline void __debug_to_serial(const char *p, int n)
95{
96 char ch;
97
98 FLOWCTL_SET(DTR);
99
100 for (; n > 0; n--) {
101 LSR_WAIT_FOR(THRE);
102 FLOWCTL_WAIT_FOR(CTS);
103
104 ch = *p++;
105 if (ch == 0x0a) {
106 TTYS0_TX = 0x0d;
107 LSR_WAIT_FOR(THRE);
108 FLOWCTL_WAIT_FOR(CTS);
109 }
110 TTYS0_TX = ch;
111 }
112
113 FLOWCTL_CLEAR(DTR);
114}
115
116#endif /* !__ASSEMBLY__ */
117
118#endif /* CONFIG_GDBSTUB_ON_TTYSx */
119
120#endif /* _ASM_UNIT_SERIAL_H */
diff --git a/include/asm-mn10300/unit-asb2305/timex.h b/include/asm-mn10300/unit-asb2305/timex.h
deleted file mode 100644
index 10e1bfe34463..000000000000
--- a/include/asm-mn10300/unit-asb2305/timex.h
+++ /dev/null
@@ -1,135 +0,0 @@
1/* ASB2305 timer specifcations
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_UNIT_TIMEX_H
12#define _ASM_UNIT_TIMEX_H
13
14#ifndef __ASSEMBLY__
15#include <linux/irq.h>
16#endif /* __ASSEMBLY__ */
17
18#include <asm/cpu/timer-regs.h>
19#include <asm/unit/clock.h>
20
21/*
22 * jiffies counter specifications
23 */
24
25#define TMJCBR_MAX 0xffff
26#define TMJCBC TM01BC
27
28#define TMJCMD TM01MD
29#define TMJCBR TM01BR
30#define TMJCIRQ TM1IRQ
31#define TMJCICR TM1ICR
32#define TMJCICR_LEVEL GxICR_LEVEL_5
33
34#ifndef __ASSEMBLY__
35
36static inline void startup_jiffies_counter(void)
37{
38 unsigned rate;
39 u16 md, t16;
40
41 /* use as little prescaling as possible to avoid losing accuracy */
42 md = TM0MD_SRC_IOCLK;
43 rate = MN10300_JCCLK / HZ;
44
45 if (rate > TMJCBR_MAX) {
46 md = TM0MD_SRC_IOCLK_8;
47 rate = MN10300_JCCLK / 8 / HZ;
48
49 if (rate > TMJCBR_MAX) {
50 md = TM0MD_SRC_IOCLK_32;
51 rate = MN10300_JCCLK / 32 / HZ;
52
53 if (rate > TMJCBR_MAX)
54 BUG();
55 }
56 }
57
58 TMJCBR = rate - 1;
59 t16 = TMJCBR;
60
61 TMJCMD =
62 md |
63 TM1MD_SRC_TM0CASCADE << 8 |
64 TM0MD_INIT_COUNTER |
65 TM1MD_INIT_COUNTER << 8;
66
67 TMJCMD =
68 md |
69 TM1MD_SRC_TM0CASCADE << 8 |
70 TM0MD_COUNT_ENABLE |
71 TM1MD_COUNT_ENABLE << 8;
72
73 t16 = TMJCMD;
74
75 TMJCICR |= GxICR_ENABLE | GxICR_DETECT | GxICR_REQUEST;
76 t16 = TMJCICR;
77}
78
79static inline void shutdown_jiffies_counter(void)
80{
81}
82
83#endif /* !__ASSEMBLY__ */
84
85
86/*
87 * timestamp counter specifications
88 */
89
90#define TMTSCBR_MAX 0xffffffff
91#define TMTSCBC TM45BC
92
93#ifndef __ASSEMBLY__
94
95static inline void startup_timestamp_counter(void)
96{
97 /* set up timer 4 & 5 cascaded as a 32-bit counter to count real time
98 * - count down from 4Gig-1 to 0 and wrap at IOCLK rate
99 */
100 TM45BR = TMTSCBR_MAX;
101
102 TM4MD = TM4MD_SRC_IOCLK;
103 TM4MD |= TM4MD_INIT_COUNTER;
104 TM4MD &= ~TM4MD_INIT_COUNTER;
105 TM4ICR = 0;
106
107 TM5MD = TM5MD_SRC_TM4CASCADE;
108 TM5MD |= TM5MD_INIT_COUNTER;
109 TM5MD &= ~TM5MD_INIT_COUNTER;
110 TM5ICR = 0;
111
112 TM5MD |= TM5MD_COUNT_ENABLE;
113 TM4MD |= TM4MD_COUNT_ENABLE;
114}
115
116static inline void shutdown_timestamp_counter(void)
117{
118 TM4MD = 0;
119 TM5MD = 0;
120}
121
122/*
123 * we use a cascaded pair of 16-bit down-counting timers to count I/O
124 * clock cycles for the purposes of time keeping
125 */
126typedef unsigned long cycles_t;
127
128static inline cycles_t read_timestamp_counter(void)
129{
130 return (cycles_t) TMTSCBC;
131}
132
133#endif /* !__ASSEMBLY__ */
134
135#endif /* _ASM_UNIT_TIMEX_H */
diff --git a/include/asm-mn10300/user.h b/include/asm-mn10300/user.h
deleted file mode 100644
index e1193908b78c..000000000000
--- a/include/asm-mn10300/user.h
+++ /dev/null
@@ -1,53 +0,0 @@
1/* MN10300 User process data
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_USER_H
12#define _ASM_USER_H
13
14#include <asm/page.h>
15#include <linux/ptrace.h>
16
17#ifndef __ASSEMBLY__
18/*
19 * When the kernel dumps core, it starts by dumping the user struct - this will
20 * be used by gdb to figure out where the data and stack segments are within
21 * the file, and what virtual addresses to use.
22 */
23struct user {
24 /* We start with the registers, to mimic the way that "memory" is
25 * returned from the ptrace(3,...) function.
26 */
27 struct pt_regs regs; /* Where the registers are actually stored */
28
29 /* The rest of this junk is to help gdb figure out what goes where */
30 unsigned long int u_tsize; /* Text segment size (pages). */
31 unsigned long int u_dsize; /* Data segment size (pages). */
32 unsigned long int u_ssize; /* Stack segment size (pages). */
33 unsigned long start_code; /* Starting virtual address of text. */
34 unsigned long start_stack; /* Starting virtual address of stack area.
35 This is actually the bottom of the stack,
36 the top of the stack is always found in the
37 esp register. */
38 long int signal; /* Signal that caused the core dump. */
39 int reserved; /* No longer used */
40 struct user_pt_regs *u_ar0; /* Used by gdb to help find the values for */
41
42 /* the registers */
43 unsigned long magic; /* To uniquely identify a core file */
44 char u_comm[32]; /* User command that was responsible */
45};
46#endif
47
48#define NBPG PAGE_SIZE
49#define UPAGES 1
50#define HOST_TEXT_START_ADDR +(u.start_code)
51#define HOST_STACK_END_ADDR +(u.start_stack + u.u_ssize * NBPG)
52
53#endif /* _ASM_USER_H */
diff --git a/include/asm-mn10300/vga.h b/include/asm-mn10300/vga.h
deleted file mode 100644
index 0163e50a3459..000000000000
--- a/include/asm-mn10300/vga.h
+++ /dev/null
@@ -1,17 +0,0 @@
1/* MN10300 VGA register definitions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_VGA_H
13#define _ASM_VGA_H
14
15
16
17#endif /* _ASM_VGA_H */
diff --git a/include/asm-mn10300/xor.h b/include/asm-mn10300/xor.h
deleted file mode 100644
index c82eb12a5b18..000000000000
--- a/include/asm-mn10300/xor.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/xor.h>
diff --git a/include/drm/drm_pciids.h b/include/drm/drm_pciids.h
index 2df74eb09563..9477af01a639 100644
--- a/include/drm/drm_pciids.h
+++ b/include/drm/drm_pciids.h
@@ -472,6 +472,7 @@
472 {0x8086, 0x2562, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ 472 {0x8086, 0x2562, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \
473 {0x8086, 0x3582, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ 473 {0x8086, 0x3582, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \
474 {0x8086, 0x2572, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ 474 {0x8086, 0x2572, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \
475 {0x8086, 0x358e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \
475 {0, 0, 0} 476 {0, 0, 0}
476 477
477#define gamma_PCI_IDS \ 478#define gamma_PCI_IDS \
@@ -533,4 +534,5 @@
533 {0x8086, 0x2e22, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \ 534 {0x8086, 0x2e22, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \
534 {0x8086, 0xa001, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \ 535 {0x8086, 0xa001, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \
535 {0x8086, 0xa011, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \ 536 {0x8086, 0xa011, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \
537 {0x8086, 0x35e8, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \
536 {0, 0, 0} 538 {0, 0, 0}
diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h
index 67e3353a56d6..95962fa8398a 100644
--- a/include/drm/i915_drm.h
+++ b/include/drm/i915_drm.h
@@ -594,6 +594,9 @@ struct drm_i915_gem_busy {
594#define I915_BIT_6_SWIZZLE_9_10_11 4 594#define I915_BIT_6_SWIZZLE_9_10_11 4
595/* Not seen by userland */ 595/* Not seen by userland */
596#define I915_BIT_6_SWIZZLE_UNKNOWN 5 596#define I915_BIT_6_SWIZZLE_UNKNOWN 5
597/* Seen by userland. */
598#define I915_BIT_6_SWIZZLE_9_17 6
599#define I915_BIT_6_SWIZZLE_9_10_17 7
597 600
598struct drm_i915_gem_set_tiling { 601struct drm_i915_gem_set_tiling {
599 /** Handle of the buffer to have its tiling state updated */ 602 /** Handle of the buffer to have its tiling state updated */
diff --git a/include/linux/acpi.h b/include/linux/acpi.h
index 6586cbd0d4af..88be890ee3c7 100644
--- a/include/linux/acpi.h
+++ b/include/linux/acpi.h
@@ -111,6 +111,7 @@ int acpi_register_ioapic(acpi_handle handle, u64 phys_addr, u32 gsi_base);
111int acpi_unregister_ioapic(acpi_handle handle, u32 gsi_base); 111int acpi_unregister_ioapic(acpi_handle handle, u32 gsi_base);
112void acpi_irq_stats_init(void); 112void acpi_irq_stats_init(void);
113extern u32 acpi_irq_handled; 113extern u32 acpi_irq_handled;
114extern u32 acpi_irq_not_handled;
114 115
115extern struct acpi_mcfg_allocation *pci_mmcfg_config; 116extern struct acpi_mcfg_allocation *pci_mmcfg_config;
116extern int pci_mmcfg_config_num; 117extern int pci_mmcfg_config_num;
diff --git a/include/linux/bio.h b/include/linux/bio.h
index b900d2c67d29..7b214fd672a2 100644
--- a/include/linux/bio.h
+++ b/include/linux/bio.h
@@ -132,6 +132,7 @@ struct bio {
132 * top 4 bits of bio flags indicate the pool this bio came from 132 * top 4 bits of bio flags indicate the pool this bio came from
133 */ 133 */
134#define BIO_POOL_BITS (4) 134#define BIO_POOL_BITS (4)
135#define BIO_POOL_NONE ((1UL << BIO_POOL_BITS) - 1)
135#define BIO_POOL_OFFSET (BITS_PER_LONG - BIO_POOL_BITS) 136#define BIO_POOL_OFFSET (BITS_PER_LONG - BIO_POOL_BITS)
136#define BIO_POOL_MASK (1UL << BIO_POOL_OFFSET) 137#define BIO_POOL_MASK (1UL << BIO_POOL_OFFSET)
137#define BIO_POOL_IDX(bio) ((bio)->bi_flags >> BIO_POOL_OFFSET) 138#define BIO_POOL_IDX(bio) ((bio)->bi_flags >> BIO_POOL_OFFSET)
@@ -504,6 +505,115 @@ static inline int bio_has_data(struct bio *bio)
504 return bio && bio->bi_io_vec != NULL; 505 return bio && bio->bi_io_vec != NULL;
505} 506}
506 507
508/*
509 * BIO list managment for use by remapping drivers (e.g. DM or MD).
510 *
511 * A bio_list anchors a singly-linked list of bios chained through the bi_next
512 * member of the bio. The bio_list also caches the last list member to allow
513 * fast access to the tail.
514 */
515struct bio_list {
516 struct bio *head;
517 struct bio *tail;
518};
519
520static inline int bio_list_empty(const struct bio_list *bl)
521{
522 return bl->head == NULL;
523}
524
525static inline void bio_list_init(struct bio_list *bl)
526{
527 bl->head = bl->tail = NULL;
528}
529
530#define bio_list_for_each(bio, bl) \
531 for (bio = (bl)->head; bio; bio = bio->bi_next)
532
533static inline unsigned bio_list_size(const struct bio_list *bl)
534{
535 unsigned sz = 0;
536 struct bio *bio;
537
538 bio_list_for_each(bio, bl)
539 sz++;
540
541 return sz;
542}
543
544static inline void bio_list_add(struct bio_list *bl, struct bio *bio)
545{
546 bio->bi_next = NULL;
547
548 if (bl->tail)
549 bl->tail->bi_next = bio;
550 else
551 bl->head = bio;
552
553 bl->tail = bio;
554}
555
556static inline void bio_list_add_head(struct bio_list *bl, struct bio *bio)
557{
558 bio->bi_next = bl->head;
559
560 bl->head = bio;
561
562 if (!bl->tail)
563 bl->tail = bio;
564}
565
566static inline void bio_list_merge(struct bio_list *bl, struct bio_list *bl2)
567{
568 if (!bl2->head)
569 return;
570
571 if (bl->tail)
572 bl->tail->bi_next = bl2->head;
573 else
574 bl->head = bl2->head;
575
576 bl->tail = bl2->tail;
577}
578
579static inline void bio_list_merge_head(struct bio_list *bl,
580 struct bio_list *bl2)
581{
582 if (!bl2->head)
583 return;
584
585 if (bl->head)
586 bl2->tail->bi_next = bl->head;
587 else
588 bl->tail = bl2->tail;
589
590 bl->head = bl2->head;
591}
592
593static inline struct bio *bio_list_pop(struct bio_list *bl)
594{
595 struct bio *bio = bl->head;
596
597 if (bio) {
598 bl->head = bl->head->bi_next;
599 if (!bl->head)
600 bl->tail = NULL;
601
602 bio->bi_next = NULL;
603 }
604
605 return bio;
606}
607
608static inline struct bio *bio_list_get(struct bio_list *bl)
609{
610 struct bio *bio = bl->head;
611
612 bl->head = bl->tail = NULL;
613
614 return bio;
615}
616
507#if defined(CONFIG_BLK_DEV_INTEGRITY) 617#if defined(CONFIG_BLK_DEV_INTEGRITY)
508 618
509#define bip_vec_idx(bip, idx) (&(bip->bip_vec[(idx)])) 619#define bip_vec_idx(bip, idx) (&(bip->bip_vec[(idx)]))
diff --git a/include/linux/bitops.h b/include/linux/bitops.h
index 61829139795a..c05a29cb9bb2 100644
--- a/include/linux/bitops.h
+++ b/include/linux/bitops.h
@@ -112,6 +112,25 @@ static inline unsigned fls_long(unsigned long l)
112 return fls64(l); 112 return fls64(l);
113} 113}
114 114
115/**
116 * __ffs64 - find first set bit in a 64 bit word
117 * @word: The 64 bit word
118 *
119 * On 64 bit arches this is a synomyn for __ffs
120 * The result is not defined if no bits are set, so check that @word
121 * is non-zero before calling this.
122 */
123static inline unsigned long __ffs64(u64 word)
124{
125#if BITS_PER_LONG == 32
126 if (((u32)word) == 0UL)
127 return __ffs((u32)(word >> 32)) + 32;
128#elif BITS_PER_LONG != 64
129#error BITS_PER_LONG not 32 or 64
130#endif
131 return __ffs((unsigned long)word);
132}
133
115#ifdef __KERNEL__ 134#ifdef __KERNEL__
116#ifdef CONFIG_GENERIC_FIND_FIRST_BIT 135#ifdef CONFIG_GENERIC_FIND_FIRST_BIT
117 136
diff --git a/include/linux/blkdev.h b/include/linux/blkdev.h
index ba54c834a590..2755d5c6da22 100644
--- a/include/linux/blkdev.h
+++ b/include/linux/blkdev.h
@@ -118,6 +118,7 @@ enum rq_flag_bits {
118 __REQ_COPY_USER, /* contains copies of user pages */ 118 __REQ_COPY_USER, /* contains copies of user pages */
119 __REQ_INTEGRITY, /* integrity metadata has been remapped */ 119 __REQ_INTEGRITY, /* integrity metadata has been remapped */
120 __REQ_NOIDLE, /* Don't anticipate more IO after this one */ 120 __REQ_NOIDLE, /* Don't anticipate more IO after this one */
121 __REQ_IO_STAT, /* account I/O stat */
121 __REQ_NR_BITS, /* stops here */ 122 __REQ_NR_BITS, /* stops here */
122}; 123};
123 124
@@ -145,6 +146,7 @@ enum rq_flag_bits {
145#define REQ_COPY_USER (1 << __REQ_COPY_USER) 146#define REQ_COPY_USER (1 << __REQ_COPY_USER)
146#define REQ_INTEGRITY (1 << __REQ_INTEGRITY) 147#define REQ_INTEGRITY (1 << __REQ_INTEGRITY)
147#define REQ_NOIDLE (1 << __REQ_NOIDLE) 148#define REQ_NOIDLE (1 << __REQ_NOIDLE)
149#define REQ_IO_STAT (1 << __REQ_IO_STAT)
148 150
149#define BLK_MAX_CDB 16 151#define BLK_MAX_CDB 16
150 152
@@ -598,6 +600,7 @@ enum {
598 blk_failfast_transport(rq) || \ 600 blk_failfast_transport(rq) || \
599 blk_failfast_driver(rq)) 601 blk_failfast_driver(rq))
600#define blk_rq_started(rq) ((rq)->cmd_flags & REQ_STARTED) 602#define blk_rq_started(rq) ((rq)->cmd_flags & REQ_STARTED)
603#define blk_rq_io_stat(rq) ((rq)->cmd_flags & REQ_IO_STAT)
601 604
602#define blk_account_rq(rq) (blk_rq_started(rq) && (blk_fs_request(rq) || blk_discard_rq(rq))) 605#define blk_account_rq(rq) (blk_rq_started(rq) && (blk_fs_request(rq) || blk_discard_rq(rq)))
603 606
diff --git a/include/linux/buffer_head.h b/include/linux/buffer_head.h
index 7b73bb8f1970..16ed0284d780 100644
--- a/include/linux/buffer_head.h
+++ b/include/linux/buffer_head.h
@@ -155,6 +155,7 @@ void create_empty_buffers(struct page *, unsigned long,
155 unsigned long b_state); 155 unsigned long b_state);
156void end_buffer_read_sync(struct buffer_head *bh, int uptodate); 156void end_buffer_read_sync(struct buffer_head *bh, int uptodate);
157void end_buffer_write_sync(struct buffer_head *bh, int uptodate); 157void end_buffer_write_sync(struct buffer_head *bh, int uptodate);
158void end_buffer_async_write(struct buffer_head *bh, int uptodate);
158 159
159/* Things to do with buffers at mapping->private_list */ 160/* Things to do with buffers at mapping->private_list */
160void mark_buffer_dirty_inode(struct buffer_head *bh, struct inode *inode); 161void mark_buffer_dirty_inode(struct buffer_head *bh, struct inode *inode);
@@ -197,6 +198,8 @@ extern int buffer_heads_over_limit;
197void block_invalidatepage(struct page *page, unsigned long offset); 198void block_invalidatepage(struct page *page, unsigned long offset);
198int block_write_full_page(struct page *page, get_block_t *get_block, 199int block_write_full_page(struct page *page, get_block_t *get_block,
199 struct writeback_control *wbc); 200 struct writeback_control *wbc);
201int block_write_full_page_endio(struct page *page, get_block_t *get_block,
202 struct writeback_control *wbc, bh_end_io_t *handler);
200int block_read_full_page(struct page*, get_block_t*); 203int block_read_full_page(struct page*, get_block_t*);
201int block_is_partially_uptodate(struct page *page, read_descriptor_t *desc, 204int block_is_partially_uptodate(struct page *page, read_descriptor_t *desc,
202 unsigned long from); 205 unsigned long from);
diff --git a/include/linux/capability.h b/include/linux/capability.h
index 4864a43b2b45..c3021105edc0 100644
--- a/include/linux/capability.h
+++ b/include/linux/capability.h
@@ -377,7 +377,21 @@ struct cpu_vfs_cap_data {
377#define CAP_FOR_EACH_U32(__capi) \ 377#define CAP_FOR_EACH_U32(__capi) \
378 for (__capi = 0; __capi < _KERNEL_CAPABILITY_U32S; ++__capi) 378 for (__capi = 0; __capi < _KERNEL_CAPABILITY_U32S; ++__capi)
379 379
380/*
381 * CAP_FS_MASK and CAP_NFSD_MASKS:
382 *
383 * The fs mask is all the privileges that fsuid==0 historically meant.
384 * At one time in the past, that included CAP_MKNOD and CAP_LINUX_IMMUTABLE.
385 *
386 * It has never meant setting security.* and trusted.* xattrs.
387 *
388 * We could also define fsmask as follows:
389 * 1. CAP_FS_MASK is the privilege to bypass all fs-related DAC permissions
390 * 2. The security.* and trusted.* xattrs are fs-related MAC permissions
391 */
392
380# define CAP_FS_MASK_B0 (CAP_TO_MASK(CAP_CHOWN) \ 393# define CAP_FS_MASK_B0 (CAP_TO_MASK(CAP_CHOWN) \
394 | CAP_TO_MASK(CAP_MKNOD) \
381 | CAP_TO_MASK(CAP_DAC_OVERRIDE) \ 395 | CAP_TO_MASK(CAP_DAC_OVERRIDE) \
382 | CAP_TO_MASK(CAP_DAC_READ_SEARCH) \ 396 | CAP_TO_MASK(CAP_DAC_READ_SEARCH) \
383 | CAP_TO_MASK(CAP_FOWNER) \ 397 | CAP_TO_MASK(CAP_FOWNER) \
@@ -392,11 +406,12 @@ struct cpu_vfs_cap_data {
392# define CAP_EMPTY_SET ((kernel_cap_t){{ 0, 0 }}) 406# define CAP_EMPTY_SET ((kernel_cap_t){{ 0, 0 }})
393# define CAP_FULL_SET ((kernel_cap_t){{ ~0, ~0 }}) 407# define CAP_FULL_SET ((kernel_cap_t){{ ~0, ~0 }})
394# define CAP_INIT_EFF_SET ((kernel_cap_t){{ ~CAP_TO_MASK(CAP_SETPCAP), ~0 }}) 408# define CAP_INIT_EFF_SET ((kernel_cap_t){{ ~CAP_TO_MASK(CAP_SETPCAP), ~0 }})
395# define CAP_FS_SET ((kernel_cap_t){{ CAP_FS_MASK_B0, CAP_FS_MASK_B1 } }) 409# define CAP_FS_SET ((kernel_cap_t){{ CAP_FS_MASK_B0 \
410 | CAP_TO_MASK(CAP_LINUX_IMMUTABLE), \
411 CAP_FS_MASK_B1 } })
396# define CAP_NFSD_SET ((kernel_cap_t){{ CAP_FS_MASK_B0 \ 412# define CAP_NFSD_SET ((kernel_cap_t){{ CAP_FS_MASK_B0 \
397 | CAP_TO_MASK(CAP_SYS_RESOURCE) \ 413 | CAP_TO_MASK(CAP_SYS_RESOURCE), \
398 | CAP_TO_MASK(CAP_MKNOD), \ 414 CAP_FS_MASK_B1 } })
399 CAP_FS_MASK_B1 } })
400 415
401#endif /* _KERNEL_CAPABILITY_U32S != 2 */ 416#endif /* _KERNEL_CAPABILITY_U32S != 2 */
402 417
diff --git a/include/linux/clocksource.h b/include/linux/clocksource.h
index 573819ef4cc0..5a40d14daa9f 100644
--- a/include/linux/clocksource.h
+++ b/include/linux/clocksource.h
@@ -143,7 +143,9 @@ extern u64 timecounter_cyc2time(struct timecounter *tc,
143 * 400-499: Perfect 143 * 400-499: Perfect
144 * The ideal clocksource. A must-use where 144 * The ideal clocksource. A must-use where
145 * available. 145 * available.
146 * @read: returns a cycle value 146 * @read: returns a cycle value, passes clocksource as argument
147 * @enable: optional function to enable the clocksource
148 * @disable: optional function to disable the clocksource
147 * @mask: bitmask for two's complement 149 * @mask: bitmask for two's complement
148 * subtraction of non 64 bit counters 150 * subtraction of non 64 bit counters
149 * @mult: cycle to nanosecond multiplier (adjusted by NTP) 151 * @mult: cycle to nanosecond multiplier (adjusted by NTP)
@@ -162,7 +164,9 @@ struct clocksource {
162 char *name; 164 char *name;
163 struct list_head list; 165 struct list_head list;
164 int rating; 166 int rating;
165 cycle_t (*read)(void); 167 cycle_t (*read)(struct clocksource *cs);
168 int (*enable)(struct clocksource *cs);
169 void (*disable)(struct clocksource *cs);
166 cycle_t mask; 170 cycle_t mask;
167 u32 mult; 171 u32 mult;
168 u32 mult_orig; 172 u32 mult_orig;
@@ -271,7 +275,34 @@ static inline u32 clocksource_hz2mult(u32 hz, u32 shift_constant)
271 */ 275 */
272static inline cycle_t clocksource_read(struct clocksource *cs) 276static inline cycle_t clocksource_read(struct clocksource *cs)
273{ 277{
274 return cs->read(); 278 return cs->read(cs);
279}
280
281/**
282 * clocksource_enable: - enable clocksource
283 * @cs: pointer to clocksource
284 *
285 * Enables the specified clocksource. The clocksource callback
286 * function should start up the hardware and setup mult and field
287 * members of struct clocksource to reflect hardware capabilities.
288 */
289static inline int clocksource_enable(struct clocksource *cs)
290{
291 return cs->enable ? cs->enable(cs) : 0;
292}
293
294/**
295 * clocksource_disable: - disable clocksource
296 * @cs: pointer to clocksource
297 *
298 * Disables the specified clocksource. The clocksource callback
299 * function should power down the now unused hardware block to
300 * save power.
301 */
302static inline void clocksource_disable(struct clocksource *cs)
303{
304 if (cs->disable)
305 cs->disable(cs);
275} 306}
276 307
277/** 308/**
diff --git a/include/linux/debug_locks.h b/include/linux/debug_locks.h
index 096476f1fb35..29b3ce3f2a1d 100644
--- a/include/linux/debug_locks.h
+++ b/include/linux/debug_locks.h
@@ -2,12 +2,20 @@
2#define __LINUX_DEBUG_LOCKING_H 2#define __LINUX_DEBUG_LOCKING_H
3 3
4#include <linux/kernel.h> 4#include <linux/kernel.h>
5#include <asm/atomic.h>
6#include <asm/system.h>
5 7
6struct task_struct; 8struct task_struct;
7 9
8extern int debug_locks; 10extern int debug_locks;
9extern int debug_locks_silent; 11extern int debug_locks_silent;
10 12
13
14static inline int __debug_locks_off(void)
15{
16 return xchg(&debug_locks, 0);
17}
18
11/* 19/*
12 * Generic 'turn off all lock debugging' function: 20 * Generic 'turn off all lock debugging' function:
13 */ 21 */
diff --git a/include/linux/device-mapper.h b/include/linux/device-mapper.h
index 66ec05a57955..ded2d7c42668 100644
--- a/include/linux/device-mapper.h
+++ b/include/linux/device-mapper.h
@@ -116,7 +116,6 @@ void dm_put_device(struct dm_target *ti, struct dm_dev *d);
116/* 116/*
117 * Target features 117 * Target features
118 */ 118 */
119#define DM_TARGET_SUPPORTS_BARRIERS 0x00000001
120 119
121struct target_type { 120struct target_type {
122 uint64_t features; 121 uint64_t features;
diff --git a/include/linux/device.h b/include/linux/device.h
index 2918c0e8fdfd..6a69caaac18a 100644
--- a/include/linux/device.h
+++ b/include/linux/device.h
@@ -551,6 +551,7 @@ extern int (*platform_notify_remove)(struct device *dev);
551extern struct device *get_device(struct device *dev); 551extern struct device *get_device(struct device *dev);
552extern void put_device(struct device *dev); 552extern void put_device(struct device *dev);
553 553
554extern void wait_for_device_probe(void);
554 555
555/* drivers/base/power/shutdown.c */ 556/* drivers/base/power/shutdown.c */
556extern void device_shutdown(void); 557extern void device_shutdown(void);
diff --git a/include/linux/dynamic_debug.h b/include/linux/dynamic_debug.h
index baabf33be244..a0d9422a1569 100644
--- a/include/linux/dynamic_debug.h
+++ b/include/linux/dynamic_debug.h
@@ -70,7 +70,7 @@ extern int ddebug_remove_module(char *mod_name);
70 DEBUG_HASH2, __LINE__, _DPRINTK_FLAGS_DEFAULT }; \ 70 DEBUG_HASH2, __LINE__, _DPRINTK_FLAGS_DEFAULT }; \
71 if (__dynamic_dbg_enabled(descriptor)) \ 71 if (__dynamic_dbg_enabled(descriptor)) \
72 dev_printk(KERN_DEBUG, dev, \ 72 dev_printk(KERN_DEBUG, dev, \
73 KBUILD_MODNAME ": " pr_fmt(fmt),\ 73 KBUILD_MODNAME ": " fmt, \
74 ##__VA_ARGS__); \ 74 ##__VA_ARGS__); \
75 } while (0) 75 } while (0)
76 76
diff --git a/include/linux/fb.h b/include/linux/fb.h
index f563c5013932..330c4b1bfcaa 100644
--- a/include/linux/fb.h
+++ b/include/linux/fb.h
@@ -173,8 +173,12 @@ struct fb_fix_screeninfo {
173/* Interpretation of offset for color fields: All offsets are from the right, 173/* Interpretation of offset for color fields: All offsets are from the right,
174 * inside a "pixel" value, which is exactly 'bits_per_pixel' wide (means: you 174 * inside a "pixel" value, which is exactly 'bits_per_pixel' wide (means: you
175 * can use the offset as right argument to <<). A pixel afterwards is a bit 175 * can use the offset as right argument to <<). A pixel afterwards is a bit
176 * stream and is written to video memory as that unmodified. This implies 176 * stream and is written to video memory as that unmodified.
177 * big-endian byte order if bits_per_pixel is greater than 8. 177 *
178 * For pseudocolor: offset and length should be the same for all color
179 * components. Offset specifies the position of the least significant bit
180 * of the pallette index in a pixel value. Length indicates the number
181 * of available palette entries (i.e. # of entries = 1 << length).
178 */ 182 */
179struct fb_bitfield { 183struct fb_bitfield {
180 __u32 offset; /* beginning of bitfield */ 184 __u32 offset; /* beginning of bitfield */
diff --git a/include/linux/fiemap.h b/include/linux/fiemap.h
index 671decbd2aeb..934e22d65801 100644
--- a/include/linux/fiemap.h
+++ b/include/linux/fiemap.h
@@ -11,6 +11,8 @@
11#ifndef _LINUX_FIEMAP_H 11#ifndef _LINUX_FIEMAP_H
12#define _LINUX_FIEMAP_H 12#define _LINUX_FIEMAP_H
13 13
14#include <linux/types.h>
15
14struct fiemap_extent { 16struct fiemap_extent {
15 __u64 fe_logical; /* logical offset in bytes for the start of 17 __u64 fe_logical; /* logical offset in bytes for the start of
16 * the extent from the beginning of the file */ 18 * the extent from the beginning of the file */
diff --git a/include/linux/fs.h b/include/linux/fs.h
index 562d2855cf30..5bed436f4353 100644
--- a/include/linux/fs.h
+++ b/include/linux/fs.h
@@ -87,6 +87,60 @@ struct inodes_stat_t {
87 */ 87 */
88#define FMODE_NOCMTIME ((__force fmode_t)2048) 88#define FMODE_NOCMTIME ((__force fmode_t)2048)
89 89
90/*
91 * The below are the various read and write types that we support. Some of
92 * them include behavioral modifiers that send information down to the
93 * block layer and IO scheduler. Terminology:
94 *
95 * The block layer uses device plugging to defer IO a little bit, in
96 * the hope that we will see more IO very shortly. This increases
97 * coalescing of adjacent IO and thus reduces the number of IOs we
98 * have to send to the device. It also allows for better queuing,
99 * if the IO isn't mergeable. If the caller is going to be waiting
100 * for the IO, then he must ensure that the device is unplugged so
101 * that the IO is dispatched to the driver.
102 *
103 * All IO is handled async in Linux. This is fine for background
104 * writes, but for reads or writes that someone waits for completion
105 * on, we want to notify the block layer and IO scheduler so that they
106 * know about it. That allows them to make better scheduling
107 * decisions. So when the below references 'sync' and 'async', it
108 * is referencing this priority hint.
109 *
110 * With that in mind, the available types are:
111 *
112 * READ A normal read operation. Device will be plugged.
113 * READ_SYNC A synchronous read. Device is not plugged, caller can
114 * immediately wait on this read without caring about
115 * unplugging.
116 * READA Used for read-ahead operations. Lower priority, and the
117 * block layer could (in theory) choose to ignore this
118 * request if it runs into resource problems.
119 * WRITE A normal async write. Device will be plugged.
120 * SWRITE Like WRITE, but a special case for ll_rw_block() that
121 * tells it to lock the buffer first. Normally a buffer
122 * must be locked before doing IO.
123 * WRITE_SYNC_PLUG Synchronous write. Identical to WRITE, but passes down
124 * the hint that someone will be waiting on this IO
125 * shortly. The device must still be unplugged explicitly,
126 * WRITE_SYNC_PLUG does not do this as we could be
127 * submitting more writes before we actually wait on any
128 * of them.
129 * WRITE_SYNC Like WRITE_SYNC_PLUG, but also unplugs the device
130 * immediately after submission. The write equivalent
131 * of READ_SYNC.
132 * WRITE_ODIRECT Special case write for O_DIRECT only.
133 * SWRITE_SYNC
134 * SWRITE_SYNC_PLUG Like WRITE_SYNC/WRITE_SYNC_PLUG, but locks the buffer.
135 * See SWRITE.
136 * WRITE_BARRIER Like WRITE, but tells the block layer that all
137 * previously submitted writes must be safely on storage
138 * before this one is started. Also guarantees that when
139 * this write is complete, it itself is also safely on
140 * storage. Prevents reordering of writes on both sides
141 * of this IO.
142 *
143 */
90#define RW_MASK 1 144#define RW_MASK 1
91#define RWA_MASK 2 145#define RWA_MASK 2
92#define READ 0 146#define READ 0
@@ -102,6 +156,11 @@ struct inodes_stat_t {
102 (SWRITE | (1 << BIO_RW_SYNCIO) | (1 << BIO_RW_NOIDLE)) 156 (SWRITE | (1 << BIO_RW_SYNCIO) | (1 << BIO_RW_NOIDLE))
103#define SWRITE_SYNC (SWRITE_SYNC_PLUG | (1 << BIO_RW_UNPLUG)) 157#define SWRITE_SYNC (SWRITE_SYNC_PLUG | (1 << BIO_RW_UNPLUG))
104#define WRITE_BARRIER (WRITE | (1 << BIO_RW_BARRIER)) 158#define WRITE_BARRIER (WRITE | (1 << BIO_RW_BARRIER))
159
160/*
161 * These aren't really reads or writes, they pass down information about
162 * parts of device that are now unused by the file system.
163 */
105#define DISCARD_NOBARRIER (1 << BIO_RW_DISCARD) 164#define DISCARD_NOBARRIER (1 << BIO_RW_DISCARD)
106#define DISCARD_BARRIER ((1 << BIO_RW_DISCARD) | (1 << BIO_RW_BARRIER)) 165#define DISCARD_BARRIER ((1 << BIO_RW_DISCARD) | (1 << BIO_RW_BARRIER))
107 166
@@ -738,9 +797,6 @@ enum inode_i_mutex_lock_class
738 I_MUTEX_QUOTA 797 I_MUTEX_QUOTA
739}; 798};
740 799
741extern void inode_double_lock(struct inode *inode1, struct inode *inode2);
742extern void inode_double_unlock(struct inode *inode1, struct inode *inode2);
743
744/* 800/*
745 * NOTE: in a 32bit arch with a preemptable kernel and 801 * NOTE: in a 32bit arch with a preemptable kernel and
746 * an UP compile the i_size_read/write must be atomic 802 * an UP compile the i_size_read/write must be atomic
@@ -2150,8 +2206,6 @@ extern ssize_t generic_file_splice_read(struct file *, loff_t *,
2150 struct pipe_inode_info *, size_t, unsigned int); 2206 struct pipe_inode_info *, size_t, unsigned int);
2151extern ssize_t generic_file_splice_write(struct pipe_inode_info *, 2207extern ssize_t generic_file_splice_write(struct pipe_inode_info *,
2152 struct file *, loff_t *, size_t, unsigned int); 2208 struct file *, loff_t *, size_t, unsigned int);
2153extern ssize_t generic_file_splice_write_nolock(struct pipe_inode_info *,
2154 struct file *, loff_t *, size_t, unsigned int);
2155extern ssize_t generic_splice_sendpage(struct pipe_inode_info *pipe, 2209extern ssize_t generic_splice_sendpage(struct pipe_inode_info *pipe,
2156 struct file *out, loff_t *, size_t len, unsigned int flags); 2210 struct file *out, loff_t *, size_t len, unsigned int flags);
2157extern long do_splice_direct(struct file *in, loff_t *ppos, struct file *out, 2211extern long do_splice_direct(struct file *in, loff_t *ppos, struct file *out,
@@ -2245,9 +2299,8 @@ extern int vfs_readdir(struct file *, filldir_t, void *);
2245 2299
2246extern int vfs_stat(char __user *, struct kstat *); 2300extern int vfs_stat(char __user *, struct kstat *);
2247extern int vfs_lstat(char __user *, struct kstat *); 2301extern int vfs_lstat(char __user *, struct kstat *);
2248extern int vfs_stat_fd(int dfd, char __user *, struct kstat *);
2249extern int vfs_lstat_fd(int dfd, char __user *, struct kstat *);
2250extern int vfs_fstat(unsigned int, struct kstat *); 2302extern int vfs_fstat(unsigned int, struct kstat *);
2303extern int vfs_fstatat(int , char __user *, struct kstat *, int);
2251 2304
2252extern int do_vfs_ioctl(struct file *filp, unsigned int fd, unsigned int cmd, 2305extern int do_vfs_ioctl(struct file *filp, unsigned int fd, unsigned int cmd,
2253 unsigned long arg); 2306 unsigned long arg);
@@ -2395,7 +2448,7 @@ struct ctl_table;
2395int proc_nr_files(struct ctl_table *table, int write, struct file *filp, 2448int proc_nr_files(struct ctl_table *table, int write, struct file *filp,
2396 void __user *buffer, size_t *lenp, loff_t *ppos); 2449 void __user *buffer, size_t *lenp, loff_t *ppos);
2397 2450
2398int get_filesystem_list(char * buf); 2451int __init get_filesystem_list(char *buf);
2399 2452
2400#endif /* __KERNEL__ */ 2453#endif /* __KERNEL__ */
2401#endif /* _LINUX_FS_H */ 2454#endif /* _LINUX_FS_H */
diff --git a/include/linux/fsl_devices.h b/include/linux/fsl_devices.h
index f2a78b5e8b55..244677cc082b 100644
--- a/include/linux/fsl_devices.h
+++ b/include/linux/fsl_devices.h
@@ -43,10 +43,6 @@
43 * 43 *
44 */ 44 */
45 45
46/* Flags related to I2C device features */
47#define FSL_I2C_DEV_SEPARATE_DFSRR 0x00000001
48#define FSL_I2C_DEV_CLOCK_5200 0x00000002
49
50enum fsl_usb2_operating_modes { 46enum fsl_usb2_operating_modes {
51 FSL_USB2_MPH_HOST, 47 FSL_USB2_MPH_HOST,
52 FSL_USB2_DR_HOST, 48 FSL_USB2_DR_HOST,
@@ -83,6 +79,10 @@ struct fsl_spi_platform_data {
83 u16 max_chipselect; 79 u16 max_chipselect;
84 void (*cs_control)(struct spi_device *spi, bool on); 80 void (*cs_control)(struct spi_device *spi, bool on);
85 u32 sysclk; 81 u32 sysclk;
82
83 /* Legacy hooks, used by mpc52xx_psc_spi driver. */
84 void (*activate_cs)(u8 cs, u8 polarity);
85 void (*deactivate_cs)(u8 cs, u8 polarity);
86}; 86};
87 87
88struct mpc8xx_pcmcia_ops { 88struct mpc8xx_pcmcia_ops {
diff --git a/include/linux/ftrace.h b/include/linux/ftrace.h
index da5405dce347..8a0c2f221e6b 100644
--- a/include/linux/ftrace.h
+++ b/include/linux/ftrace.h
@@ -357,7 +357,7 @@ struct ftrace_graph_ret {
357#ifdef CONFIG_FUNCTION_GRAPH_TRACER 357#ifdef CONFIG_FUNCTION_GRAPH_TRACER
358 358
359/* for init task */ 359/* for init task */
360#define INIT_FTRACE_GRAPH .ret_stack = NULL 360#define INIT_FTRACE_GRAPH .ret_stack = NULL,
361 361
362/* 362/*
363 * Stack of return addresses for functions 363 * Stack of return addresses for functions
@@ -511,33 +511,4 @@ static inline void trace_hw_branch_oops(void) {}
511 511
512#endif /* CONFIG_HW_BRANCH_TRACER */ 512#endif /* CONFIG_HW_BRANCH_TRACER */
513 513
514/*
515 * A syscall entry in the ftrace syscalls array.
516 *
517 * @name: name of the syscall
518 * @nb_args: number of parameters it takes
519 * @types: list of types as strings
520 * @args: list of args as strings (args[i] matches types[i])
521 */
522struct syscall_metadata {
523 const char *name;
524 int nb_args;
525 const char **types;
526 const char **args;
527};
528
529#ifdef CONFIG_FTRACE_SYSCALLS
530extern void arch_init_ftrace_syscalls(void);
531extern struct syscall_metadata *syscall_nr_to_meta(int nr);
532extern void start_ftrace_syscalls(void);
533extern void stop_ftrace_syscalls(void);
534extern void ftrace_syscall_enter(struct pt_regs *regs);
535extern void ftrace_syscall_exit(struct pt_regs *regs);
536#else
537static inline void start_ftrace_syscalls(void) { }
538static inline void stop_ftrace_syscalls(void) { }
539static inline void ftrace_syscall_enter(struct pt_regs *regs) { }
540static inline void ftrace_syscall_exit(struct pt_regs *regs) { }
541#endif
542
543#endif /* _LINUX_FTRACE_H */ 514#endif /* _LINUX_FTRACE_H */
diff --git a/include/linux/genhd.h b/include/linux/genhd.h
index 634c53028fb8..a1a28caed23d 100644
--- a/include/linux/genhd.h
+++ b/include/linux/genhd.h
@@ -214,6 +214,7 @@ static inline void disk_put_part(struct hd_struct *part)
214#define DISK_PITER_REVERSE (1 << 0) /* iterate in the reverse direction */ 214#define DISK_PITER_REVERSE (1 << 0) /* iterate in the reverse direction */
215#define DISK_PITER_INCL_EMPTY (1 << 1) /* include 0-sized parts */ 215#define DISK_PITER_INCL_EMPTY (1 << 1) /* include 0-sized parts */
216#define DISK_PITER_INCL_PART0 (1 << 2) /* include partition 0 */ 216#define DISK_PITER_INCL_PART0 (1 << 2) /* include partition 0 */
217#define DISK_PITER_INCL_EMPTY_PART0 (1 << 3) /* include empty partition 0 */
217 218
218struct disk_part_iter { 219struct disk_part_iter {
219 struct gendisk *disk; 220 struct gendisk *disk;
diff --git a/include/linux/i2c.h b/include/linux/i2c.h
index 00ee11eb9092..ad2580596033 100644
--- a/include/linux/i2c.h
+++ b/include/linux/i2c.h
@@ -274,7 +274,7 @@ struct i2c_board_info {
274 * are provided using conventional syntax. 274 * are provided using conventional syntax.
275 */ 275 */
276#define I2C_BOARD_INFO(dev_type, dev_addr) \ 276#define I2C_BOARD_INFO(dev_type, dev_addr) \
277 .type = (dev_type), .addr = (dev_addr) 277 .type = dev_type, .addr = (dev_addr)
278 278
279 279
280/* Add-on boards should register/unregister their devices; e.g. a board 280/* Add-on boards should register/unregister their devices; e.g. a board
diff --git a/include/linux/ide.h b/include/linux/ide.h
index a5d26f66ef78..ff65fffb078f 100644
--- a/include/linux/ide.h
+++ b/include/linux/ide.h
@@ -240,65 +240,38 @@ typedef enum {
240} ide_startstop_t; 240} ide_startstop_t;
241 241
242enum { 242enum {
243 IDE_VALID_ERROR = (1 << 1),
244 IDE_VALID_FEATURE = IDE_VALID_ERROR,
245 IDE_VALID_NSECT = (1 << 2),
246 IDE_VALID_LBAL = (1 << 3),
247 IDE_VALID_LBAM = (1 << 4),
248 IDE_VALID_LBAH = (1 << 5),
249 IDE_VALID_DEVICE = (1 << 6),
250 IDE_VALID_LBA = IDE_VALID_LBAL |
251 IDE_VALID_LBAM |
252 IDE_VALID_LBAH,
253 IDE_VALID_OUT_TF = IDE_VALID_FEATURE |
254 IDE_VALID_NSECT |
255 IDE_VALID_LBA,
256 IDE_VALID_IN_TF = IDE_VALID_NSECT |
257 IDE_VALID_LBA,
258 IDE_VALID_OUT_HOB = IDE_VALID_OUT_TF,
259 IDE_VALID_IN_HOB = IDE_VALID_ERROR |
260 IDE_VALID_NSECT |
261 IDE_VALID_LBA,
262};
263
264enum {
243 IDE_TFLAG_LBA48 = (1 << 0), 265 IDE_TFLAG_LBA48 = (1 << 0),
244 IDE_TFLAG_OUT_HOB_FEATURE = (1 << 1), 266 IDE_TFLAG_WRITE = (1 << 1),
245 IDE_TFLAG_OUT_HOB_NSECT = (1 << 2), 267 IDE_TFLAG_CUSTOM_HANDLER = (1 << 2),
246 IDE_TFLAG_OUT_HOB_LBAL = (1 << 3), 268 IDE_TFLAG_DMA_PIO_FALLBACK = (1 << 3),
247 IDE_TFLAG_OUT_HOB_LBAM = (1 << 4),
248 IDE_TFLAG_OUT_HOB_LBAH = (1 << 5),
249 IDE_TFLAG_OUT_HOB = IDE_TFLAG_OUT_HOB_FEATURE |
250 IDE_TFLAG_OUT_HOB_NSECT |
251 IDE_TFLAG_OUT_HOB_LBAL |
252 IDE_TFLAG_OUT_HOB_LBAM |
253 IDE_TFLAG_OUT_HOB_LBAH,
254 IDE_TFLAG_OUT_FEATURE = (1 << 6),
255 IDE_TFLAG_OUT_NSECT = (1 << 7),
256 IDE_TFLAG_OUT_LBAL = (1 << 8),
257 IDE_TFLAG_OUT_LBAM = (1 << 9),
258 IDE_TFLAG_OUT_LBAH = (1 << 10),
259 IDE_TFLAG_OUT_TF = IDE_TFLAG_OUT_FEATURE |
260 IDE_TFLAG_OUT_NSECT |
261 IDE_TFLAG_OUT_LBAL |
262 IDE_TFLAG_OUT_LBAM |
263 IDE_TFLAG_OUT_LBAH,
264 IDE_TFLAG_OUT_DEVICE = (1 << 11),
265 IDE_TFLAG_WRITE = (1 << 12),
266 IDE_TFLAG_CUSTOM_HANDLER = (1 << 13),
267 IDE_TFLAG_DMA_PIO_FALLBACK = (1 << 14),
268 IDE_TFLAG_IN_HOB_ERROR = (1 << 15),
269 IDE_TFLAG_IN_HOB_NSECT = (1 << 16),
270 IDE_TFLAG_IN_HOB_LBAL = (1 << 17),
271 IDE_TFLAG_IN_HOB_LBAM = (1 << 18),
272 IDE_TFLAG_IN_HOB_LBAH = (1 << 19),
273 IDE_TFLAG_IN_HOB_LBA = IDE_TFLAG_IN_HOB_LBAL |
274 IDE_TFLAG_IN_HOB_LBAM |
275 IDE_TFLAG_IN_HOB_LBAH,
276 IDE_TFLAG_IN_HOB = IDE_TFLAG_IN_HOB_ERROR |
277 IDE_TFLAG_IN_HOB_NSECT |
278 IDE_TFLAG_IN_HOB_LBA,
279 IDE_TFLAG_IN_ERROR = (1 << 20),
280 IDE_TFLAG_IN_NSECT = (1 << 21),
281 IDE_TFLAG_IN_LBAL = (1 << 22),
282 IDE_TFLAG_IN_LBAM = (1 << 23),
283 IDE_TFLAG_IN_LBAH = (1 << 24),
284 IDE_TFLAG_IN_LBA = IDE_TFLAG_IN_LBAL |
285 IDE_TFLAG_IN_LBAM |
286 IDE_TFLAG_IN_LBAH,
287 IDE_TFLAG_IN_TF = IDE_TFLAG_IN_NSECT |
288 IDE_TFLAG_IN_LBA,
289 IDE_TFLAG_IN_DEVICE = (1 << 25),
290 IDE_TFLAG_HOB = IDE_TFLAG_OUT_HOB |
291 IDE_TFLAG_IN_HOB,
292 IDE_TFLAG_TF = IDE_TFLAG_OUT_TF |
293 IDE_TFLAG_IN_TF,
294 IDE_TFLAG_DEVICE = IDE_TFLAG_OUT_DEVICE |
295 IDE_TFLAG_IN_DEVICE,
296 /* force 16-bit I/O operations */ 269 /* force 16-bit I/O operations */
297 IDE_TFLAG_IO_16BIT = (1 << 26), 270 IDE_TFLAG_IO_16BIT = (1 << 4),
298 /* struct ide_cmd was allocated using kmalloc() */ 271 /* struct ide_cmd was allocated using kmalloc() */
299 IDE_TFLAG_DYN = (1 << 27), 272 IDE_TFLAG_DYN = (1 << 5),
300 IDE_TFLAG_FS = (1 << 28), 273 IDE_TFLAG_FS = (1 << 6),
301 IDE_TFLAG_MULTI_PIO = (1 << 29), 274 IDE_TFLAG_MULTI_PIO = (1 << 7),
302}; 275};
303 276
304enum { 277enum {
@@ -309,45 +282,34 @@ enum {
309}; 282};
310 283
311struct ide_taskfile { 284struct ide_taskfile {
312 u8 hob_data; /* 0: high data byte (for TASKFILE IOCTL) */ 285 u8 data; /* 0: data byte (for TASKFILE ioctl) */
313 /* 1-5: additional data to support LBA48 */ 286 union { /* 1: */
314 union { 287 u8 error; /* read: error */
315 u8 hob_error; /* read: error */ 288 u8 feature; /* write: feature */
316 u8 hob_feature; /* write: feature */
317 };
318
319 u8 hob_nsect;
320 u8 hob_lbal;
321 u8 hob_lbam;
322 u8 hob_lbah;
323
324 u8 data; /* 6: low data byte (for TASKFILE IOCTL) */
325
326 union { /*  7: */
327 u8 error; /* read: error */
328 u8 feature; /* write: feature */
329 }; 289 };
330 290 u8 nsect; /* 2: number of sectors */
331 u8 nsect; /* 8: number of sectors */ 291 u8 lbal; /* 3: LBA low */
332 u8 lbal; /* 9: LBA low */ 292 u8 lbam; /* 4: LBA mid */
333 u8 lbam; /* 10: LBA mid */ 293 u8 lbah; /* 5: LBA high */
334 u8 lbah; /* 11: LBA high */ 294 u8 device; /* 6: device select */
335 295 union { /* 7: */
336 u8 device; /* 12: device select */ 296 u8 status; /* read: status */
337
338 union { /* 13: */
339 u8 status; /*  read: status  */
340 u8 command; /* write: command */ 297 u8 command; /* write: command */
341 }; 298 };
342}; 299};
343 300
344struct ide_cmd { 301struct ide_cmd {
345 union { 302 struct ide_taskfile tf;
346 struct ide_taskfile tf; 303 struct ide_taskfile hob;
347 u8 tf_array[14]; 304 struct {
348 }; 305 struct {
306 u8 tf;
307 u8 hob;
308 } out, in;
309 } valid;
310
311 u8 tf_flags;
349 u8 ftf_flags; /* for TASKFILE ioctl */ 312 u8 ftf_flags; /* for TASKFILE ioctl */
350 u32 tf_flags;
351 int protocol; 313 int protocol;
352 314
353 int sg_nents; /* number of sg entries */ 315 int sg_nents; /* number of sg entries */
@@ -662,8 +624,8 @@ struct ide_tp_ops {
662 void (*write_devctl)(struct hwif_s *, u8); 624 void (*write_devctl)(struct hwif_s *, u8);
663 625
664 void (*dev_select)(ide_drive_t *); 626 void (*dev_select)(ide_drive_t *);
665 void (*tf_load)(ide_drive_t *, struct ide_cmd *); 627 void (*tf_load)(ide_drive_t *, struct ide_taskfile *, u8);
666 void (*tf_read)(ide_drive_t *, struct ide_cmd *); 628 void (*tf_read)(ide_drive_t *, struct ide_taskfile *, u8);
667 629
668 void (*input_data)(ide_drive_t *, struct ide_cmd *, 630 void (*input_data)(ide_drive_t *, struct ide_cmd *,
669 void *, unsigned int); 631 void *, unsigned int);
@@ -1162,7 +1124,8 @@ extern int ide_devset_execute(ide_drive_t *drive,
1162void ide_complete_cmd(ide_drive_t *, struct ide_cmd *, u8, u8); 1124void ide_complete_cmd(ide_drive_t *, struct ide_cmd *, u8, u8);
1163int ide_complete_rq(ide_drive_t *, int, unsigned int); 1125int ide_complete_rq(ide_drive_t *, int, unsigned int);
1164 1126
1165void ide_tf_dump(const char *, struct ide_taskfile *); 1127void ide_tf_readback(ide_drive_t *drive, struct ide_cmd *cmd);
1128void ide_tf_dump(const char *, struct ide_cmd *);
1166 1129
1167void ide_exec_command(ide_hwif_t *, u8); 1130void ide_exec_command(ide_hwif_t *, u8);
1168u8 ide_read_status(ide_hwif_t *); 1131u8 ide_read_status(ide_hwif_t *);
@@ -1170,8 +1133,8 @@ u8 ide_read_altstatus(ide_hwif_t *);
1170void ide_write_devctl(ide_hwif_t *, u8); 1133void ide_write_devctl(ide_hwif_t *, u8);
1171 1134
1172void ide_dev_select(ide_drive_t *); 1135void ide_dev_select(ide_drive_t *);
1173void ide_tf_load(ide_drive_t *, struct ide_cmd *); 1136void ide_tf_load(ide_drive_t *, struct ide_taskfile *, u8);
1174void ide_tf_read(ide_drive_t *, struct ide_cmd *); 1137void ide_tf_read(ide_drive_t *, struct ide_taskfile *, u8);
1175 1138
1176void ide_input_data(ide_drive_t *, struct ide_cmd *, void *, unsigned int); 1139void ide_input_data(ide_drive_t *, struct ide_cmd *, void *, unsigned int);
1177void ide_output_data(ide_drive_t *, struct ide_cmd *, void *, unsigned int); 1140void ide_output_data(ide_drive_t *, struct ide_cmd *, void *, unsigned int);
@@ -1529,7 +1492,7 @@ static inline void ide_set_hwifdata (ide_hwif_t * hwif, void *data)
1529 1492
1530extern void ide_toggle_bounce(ide_drive_t *drive, int on); 1493extern void ide_toggle_bounce(ide_drive_t *drive, int on);
1531 1494
1532u64 ide_get_lba_addr(struct ide_taskfile *, int); 1495u64 ide_get_lba_addr(struct ide_cmd *, int);
1533u8 ide_dump_status(ide_drive_t *, const char *, u8); 1496u8 ide_dump_status(ide_drive_t *, const char *, u8);
1534 1497
1535struct ide_timing { 1498struct ide_timing {
diff --git a/include/linux/init.h b/include/linux/init.h
index 68cb0265d009..0e06c176f185 100644
--- a/include/linux/init.h
+++ b/include/linux/init.h
@@ -2,6 +2,8 @@
2#define _LINUX_INIT_H 2#define _LINUX_INIT_H
3 3
4#include <linux/compiler.h> 4#include <linux/compiler.h>
5#include <linux/section-names.h>
6#include <linux/stringify.h>
5 7
6/* These macros are used to mark some functions or 8/* These macros are used to mark some functions or
7 * initialized data (doesn't apply to uninitialized data) 9 * initialized data (doesn't apply to uninitialized data)
@@ -60,14 +62,6 @@
60#define __refdata __section(.ref.data) 62#define __refdata __section(.ref.data)
61#define __refconst __section(.ref.rodata) 63#define __refconst __section(.ref.rodata)
62 64
63/* backward compatibility note
64 * A few places hardcode the old section names:
65 * .text.init.refok
66 * .data.init.refok
67 * .exit.text.refok
68 * They should be converted to use the defines from this file
69 */
70
71/* compatibility defines */ 65/* compatibility defines */
72#define __init_refok __ref 66#define __init_refok __ref
73#define __initdata_refok __refdata 67#define __initdata_refok __refdata
@@ -107,7 +101,7 @@
107#define __memexitconst __section(.memexit.rodata) 101#define __memexitconst __section(.memexit.rodata)
108 102
109/* For assembly routines */ 103/* For assembly routines */
110#define __HEAD .section ".head.text","ax" 104#define __HEAD .section __stringify(HEAD_TEXT_SECTION),"ax"
111#define __INIT .section ".init.text","ax" 105#define __INIT .section ".init.text","ax"
112#define __FINIT .previous 106#define __FINIT .previous
113 107
@@ -247,6 +241,7 @@ struct obs_kernel_param {
247 241
248/* Relies on boot_command_line being set */ 242/* Relies on boot_command_line being set */
249void __init parse_early_param(void); 243void __init parse_early_param(void);
244void __init parse_early_options(char *cmdline);
250#endif /* __ASSEMBLY__ */ 245#endif /* __ASSEMBLY__ */
251 246
252/** 247/**
diff --git a/include/linux/init_task.h b/include/linux/init_task.h
index dcfb93337e9a..d87247d2641f 100644
--- a/include/linux/init_task.h
+++ b/include/linux/init_task.h
@@ -15,19 +15,6 @@
15extern struct files_struct init_files; 15extern struct files_struct init_files;
16extern struct fs_struct init_fs; 16extern struct fs_struct init_fs;
17 17
18#define INIT_KIOCTX(name, which_mm) \
19{ \
20 .users = ATOMIC_INIT(1), \
21 .dead = 0, \
22 .mm = &which_mm, \
23 .user_id = 0, \
24 .next = NULL, \
25 .wait = __WAIT_QUEUE_HEAD_INITIALIZER(name.wait), \
26 .ctx_lock = __SPIN_LOCK_UNLOCKED(name.ctx_lock), \
27 .reqs_active = 0U, \
28 .max_reqs = ~0U, \
29}
30
31#define INIT_MM(name) \ 18#define INIT_MM(name) \
32{ \ 19{ \
33 .mm_rb = RB_ROOT, \ 20 .mm_rb = RB_ROOT, \
diff --git a/include/linux/ipmi.h b/include/linux/ipmi.h
index 7ebdb4fb4e54..65aae34759de 100644
--- a/include/linux/ipmi.h
+++ b/include/linux/ipmi.h
@@ -198,6 +198,8 @@ struct kernel_ipmi_msg {
198 response. When you send a 198 response. When you send a
199 response message, this will 199 response message, this will
200 be returned. */ 200 be returned. */
201#define IPMI_OEM_RECV_TYPE 5 /* The response for OEM Channels */
202
201/* Note that async events and received commands do not have a completion 203/* Note that async events and received commands do not have a completion
202 code as the first byte of the incoming data, unlike a response. */ 204 code as the first byte of the incoming data, unlike a response. */
203 205
diff --git a/include/linux/ipmi_msgdefs.h b/include/linux/ipmi_msgdefs.h
index b56a158d587a..df97e6e31e87 100644
--- a/include/linux/ipmi_msgdefs.h
+++ b/include/linux/ipmi_msgdefs.h
@@ -58,6 +58,12 @@
58#define IPMI_READ_EVENT_MSG_BUFFER_CMD 0x35 58#define IPMI_READ_EVENT_MSG_BUFFER_CMD 0x35
59#define IPMI_GET_CHANNEL_INFO_CMD 0x42 59#define IPMI_GET_CHANNEL_INFO_CMD 0x42
60 60
61/* Bit for BMC global enables. */
62#define IPMI_BMC_RCV_MSG_INTR 0x01
63#define IPMI_BMC_EVT_MSG_INTR 0x02
64#define IPMI_BMC_EVT_MSG_BUFF 0x04
65#define IPMI_BMC_SYS_LOG 0x08
66
61#define IPMI_NETFN_STORAGE_REQUEST 0x0a 67#define IPMI_NETFN_STORAGE_REQUEST 0x0a
62#define IPMI_NETFN_STORAGE_RESPONSE 0x0b 68#define IPMI_NETFN_STORAGE_RESPONSE 0x0b
63#define IPMI_ADD_SEL_ENTRY_CMD 0x44 69#define IPMI_ADD_SEL_ENTRY_CMD 0x44
@@ -109,5 +115,7 @@
109#define IPMI_CHANNEL_MEDIUM_USB1 10 115#define IPMI_CHANNEL_MEDIUM_USB1 10
110#define IPMI_CHANNEL_MEDIUM_USB2 11 116#define IPMI_CHANNEL_MEDIUM_USB2 11
111#define IPMI_CHANNEL_MEDIUM_SYSINTF 12 117#define IPMI_CHANNEL_MEDIUM_SYSINTF 12
118#define IPMI_CHANNEL_MEDIUM_OEM_MIN 0x60
119#define IPMI_CHANNEL_MEDIUM_OEM_MAX 0x7f
112 120
113#endif /* __LINUX_IPMI_MSGDEFS_H */ 121#endif /* __LINUX_IPMI_MSGDEFS_H */
diff --git a/include/linux/irq.h b/include/linux/irq.h
index ca507c9426b0..b7cbeed972e4 100644
--- a/include/linux/irq.h
+++ b/include/linux/irq.h
@@ -487,6 +487,16 @@ static inline void init_copy_desc_masks(struct irq_desc *old_desc,
487#endif 487#endif
488} 488}
489 489
490static inline void free_desc_masks(struct irq_desc *old_desc,
491 struct irq_desc *new_desc)
492{
493 free_cpumask_var(old_desc->affinity);
494
495#ifdef CONFIG_GENERIC_PENDING_IRQ
496 free_cpumask_var(old_desc->pending_mask);
497#endif
498}
499
490#else /* !CONFIG_SMP */ 500#else /* !CONFIG_SMP */
491 501
492static inline bool init_alloc_desc_masks(struct irq_desc *desc, int cpu, 502static inline bool init_alloc_desc_masks(struct irq_desc *desc, int cpu,
@@ -500,6 +510,10 @@ static inline void init_copy_desc_masks(struct irq_desc *old_desc,
500{ 510{
501} 511}
502 512
513static inline void free_desc_masks(struct irq_desc *old_desc,
514 struct irq_desc *new_desc)
515{
516}
503#endif /* CONFIG_SMP */ 517#endif /* CONFIG_SMP */
504 518
505#endif /* _LINUX_IRQ_H */ 519#endif /* _LINUX_IRQ_H */
diff --git a/include/linux/jbd.h b/include/linux/jbd.h
index 53ae4399da2d..c2049a04fa0b 100644
--- a/include/linux/jbd.h
+++ b/include/linux/jbd.h
@@ -978,7 +978,8 @@ extern void journal_destroy_revoke(journal_t *);
978extern int journal_revoke (handle_t *, 978extern int journal_revoke (handle_t *,
979 unsigned long, struct buffer_head *); 979 unsigned long, struct buffer_head *);
980extern int journal_cancel_revoke(handle_t *, struct journal_head *); 980extern int journal_cancel_revoke(handle_t *, struct journal_head *);
981extern void journal_write_revoke_records(journal_t *, transaction_t *); 981extern void journal_write_revoke_records(journal_t *,
982 transaction_t *, int);
982 983
983/* Recovery revoke support */ 984/* Recovery revoke support */
984extern int journal_set_revoke(journal_t *, unsigned long, tid_t); 985extern int journal_set_revoke(journal_t *, unsigned long, tid_t);
diff --git a/include/linux/jbd2.h b/include/linux/jbd2.h
index 8815a3456b3b..cc02393bfce8 100644
--- a/include/linux/jbd2.h
+++ b/include/linux/jbd2.h
@@ -1193,7 +1193,8 @@ extern int jbd2_journal_init_revoke_caches(void);
1193extern void jbd2_journal_destroy_revoke(journal_t *); 1193extern void jbd2_journal_destroy_revoke(journal_t *);
1194extern int jbd2_journal_revoke (handle_t *, unsigned long long, struct buffer_head *); 1194extern int jbd2_journal_revoke (handle_t *, unsigned long long, struct buffer_head *);
1195extern int jbd2_journal_cancel_revoke(handle_t *, struct journal_head *); 1195extern int jbd2_journal_cancel_revoke(handle_t *, struct journal_head *);
1196extern void jbd2_journal_write_revoke_records(journal_t *, transaction_t *); 1196extern void jbd2_journal_write_revoke_records(journal_t *,
1197 transaction_t *, int);
1197 1198
1198/* Recovery revoke support */ 1199/* Recovery revoke support */
1199extern int jbd2_journal_set_revoke(journal_t *, unsigned long long, tid_t); 1200extern int jbd2_journal_set_revoke(journal_t *, unsigned long long, tid_t);
diff --git a/include/linux/kernel.h b/include/linux/kernel.h
index d9e75ec7def5..883cd44ff765 100644
--- a/include/linux/kernel.h
+++ b/include/linux/kernel.h
@@ -377,6 +377,15 @@ static inline char *pack_hex_byte(char *buf, u8 byte)
377#define pr_cont(fmt, ...) \ 377#define pr_cont(fmt, ...) \
378 printk(KERN_CONT fmt, ##__VA_ARGS__) 378 printk(KERN_CONT fmt, ##__VA_ARGS__)
379 379
380/* pr_devel() should produce zero code unless DEBUG is defined */
381#ifdef DEBUG
382#define pr_devel(fmt, ...) \
383 printk(KERN_DEBUG pr_fmt(fmt), ##__VA_ARGS__)
384#else
385#define pr_devel(fmt, ...) \
386 ({ if (0) printk(KERN_DEBUG pr_fmt(fmt), ##__VA_ARGS__); 0; })
387#endif
388
380/* If you are writing a driver, please use dev_dbg instead */ 389/* If you are writing a driver, please use dev_dbg instead */
381#if defined(DEBUG) 390#if defined(DEBUG)
382#define pr_debug(fmt, ...) \ 391#define pr_debug(fmt, ...) \
diff --git a/include/linux/kmod.h b/include/linux/kmod.h
index d5fa565086d1..384ca8bbf1ac 100644
--- a/include/linux/kmod.h
+++ b/include/linux/kmod.h
@@ -34,7 +34,7 @@ extern int __request_module(bool wait, const char *name, ...) \
34#define request_module(mod...) __request_module(true, mod) 34#define request_module(mod...) __request_module(true, mod)
35#define request_module_nowait(mod...) __request_module(false, mod) 35#define request_module_nowait(mod...) __request_module(false, mod)
36#define try_then_request_module(x, mod...) \ 36#define try_then_request_module(x, mod...) \
37 ((x) ?: (__request_module(false, mod), (x))) 37 ((x) ?: (__request_module(true, mod), (x)))
38#else 38#else
39static inline int request_module(const char *name, ...) { return -ENOSYS; } 39static inline int request_module(const char *name, ...) { return -ENOSYS; }
40static inline int request_module_nowait(const char *name, ...) { return -ENOSYS; } 40static inline int request_module_nowait(const char *name, ...) { return -ENOSYS; }
diff --git a/include/linux/kvm.h b/include/linux/kvm.h
index 311a073afe8a..8cc137911b34 100644
--- a/include/linux/kvm.h
+++ b/include/linux/kvm.h
@@ -409,6 +409,8 @@ struct kvm_trace_rec {
409#ifdef __KVM_HAVE_DEVICE_ASSIGNMENT 409#ifdef __KVM_HAVE_DEVICE_ASSIGNMENT
410#define KVM_CAP_DEVICE_DEASSIGNMENT 27 410#define KVM_CAP_DEVICE_DEASSIGNMENT 27
411#endif 411#endif
412/* Another bug in KVM_SET_USER_MEMORY_REGION fixed: */
413#define KVM_CAP_JOIN_MEMORY_REGIONS_WORKS 30
412 414
413#ifdef KVM_CAP_IRQ_ROUTING 415#ifdef KVM_CAP_IRQ_ROUTING
414 416
diff --git a/include/linux/libata.h b/include/linux/libata.h
index b450a2628855..3d501db36a26 100644
--- a/include/linux/libata.h
+++ b/include/linux/libata.h
@@ -209,6 +209,7 @@ enum {
209 209
210 /* bits 24:31 of ap->flags are reserved for LLD specific flags */ 210 /* bits 24:31 of ap->flags are reserved for LLD specific flags */
211 211
212
212 /* struct ata_port pflags */ 213 /* struct ata_port pflags */
213 ATA_PFLAG_EH_PENDING = (1 << 0), /* EH pending */ 214 ATA_PFLAG_EH_PENDING = (1 << 0), /* EH pending */
214 ATA_PFLAG_EH_IN_PROGRESS = (1 << 1), /* EH in progress */ 215 ATA_PFLAG_EH_IN_PROGRESS = (1 << 1), /* EH in progress */
@@ -225,6 +226,9 @@ enum {
225 ATA_PFLAG_PM_PENDING = (1 << 18), /* PM operation pending */ 226 ATA_PFLAG_PM_PENDING = (1 << 18), /* PM operation pending */
226 ATA_PFLAG_INIT_GTM_VALID = (1 << 19), /* initial gtm data valid */ 227 ATA_PFLAG_INIT_GTM_VALID = (1 << 19), /* initial gtm data valid */
227 228
229 ATA_PFLAG_PIO32 = (1 << 20), /* 32bit PIO */
230 ATA_PFLAG_PIO32CHANGE = (1 << 21), /* 32bit PIO can be turned on/off */
231
228 /* struct ata_queued_cmd flags */ 232 /* struct ata_queued_cmd flags */
229 ATA_QCFLAG_ACTIVE = (1 << 0), /* cmd not yet ack'd to scsi lyer */ 233 ATA_QCFLAG_ACTIVE = (1 << 0), /* cmd not yet ack'd to scsi lyer */
230 ATA_QCFLAG_DMAMAP = (1 << 1), /* SG table is DMA mapped */ 234 ATA_QCFLAG_DMAMAP = (1 << 1), /* SG table is DMA mapped */
@@ -689,7 +693,10 @@ struct ata_port {
689 struct Scsi_Host *scsi_host; /* our co-allocated scsi host */ 693 struct Scsi_Host *scsi_host; /* our co-allocated scsi host */
690 struct ata_port_operations *ops; 694 struct ata_port_operations *ops;
691 spinlock_t *lock; 695 spinlock_t *lock;
696 /* Flags owned by the EH context. Only EH should touch these once the
697 port is active */
692 unsigned long flags; /* ATA_FLAG_xxx */ 698 unsigned long flags; /* ATA_FLAG_xxx */
699 /* Flags that change dynamically, protected by ap->lock */
693 unsigned int pflags; /* ATA_PFLAG_xxx */ 700 unsigned int pflags; /* ATA_PFLAG_xxx */
694 unsigned int print_id; /* user visible unique port ID */ 701 unsigned int print_id; /* user visible unique port ID */
695 unsigned int port_no; /* 0 based port no. inside the host */ 702 unsigned int port_no; /* 0 based port no. inside the host */
@@ -1595,6 +1602,7 @@ extern void ata_sff_drain_fifo(struct ata_queued_cmd *qc);
1595extern void ata_sff_error_handler(struct ata_port *ap); 1602extern void ata_sff_error_handler(struct ata_port *ap);
1596extern void ata_sff_post_internal_cmd(struct ata_queued_cmd *qc); 1603extern void ata_sff_post_internal_cmd(struct ata_queued_cmd *qc);
1597extern int ata_sff_port_start(struct ata_port *ap); 1604extern int ata_sff_port_start(struct ata_port *ap);
1605extern int ata_sff_port_start32(struct ata_port *ap);
1598extern void ata_sff_std_ports(struct ata_ioports *ioaddr); 1606extern void ata_sff_std_ports(struct ata_ioports *ioaddr);
1599extern unsigned long ata_bmdma_mode_filter(struct ata_device *dev, 1607extern unsigned long ata_bmdma_mode_filter(struct ata_device *dev,
1600 unsigned long xfer_mask); 1608 unsigned long xfer_mask);
diff --git a/include/linux/memcontrol.h b/include/linux/memcontrol.h
index 18146c980b68..a9e3b76aa884 100644
--- a/include/linux/memcontrol.h
+++ b/include/linux/memcontrol.h
@@ -75,7 +75,7 @@ int mm_match_cgroup(const struct mm_struct *mm, const struct mem_cgroup *cgroup)
75{ 75{
76 struct mem_cgroup *mem; 76 struct mem_cgroup *mem;
77 rcu_read_lock(); 77 rcu_read_lock();
78 mem = mem_cgroup_from_task((mm)->owner); 78 mem = mem_cgroup_from_task(rcu_dereference((mm)->owner));
79 rcu_read_unlock(); 79 rcu_read_unlock();
80 return cgroup == mem; 80 return cgroup == mem;
81} 81}
diff --git a/include/linux/mfd/pcf50633/core.h b/include/linux/mfd/pcf50633/core.h
index 4455b212d75a..c8f51c3c0a72 100644
--- a/include/linux/mfd/pcf50633/core.h
+++ b/include/linux/mfd/pcf50633/core.h
@@ -29,6 +29,8 @@ struct pcf50633_platform_data {
29 char **batteries; 29 char **batteries;
30 int num_batteries; 30 int num_batteries;
31 31
32 int charging_restart_interval;
33
32 /* Callbacks */ 34 /* Callbacks */
33 void (*probe_done)(struct pcf50633 *); 35 void (*probe_done)(struct pcf50633 *);
34 void (*mbc_event_callback)(struct pcf50633 *, int); 36 void (*mbc_event_callback)(struct pcf50633 *, int);
diff --git a/include/linux/mfd/pcf50633/mbc.h b/include/linux/mfd/pcf50633/mbc.h
index 6e17619b773a..4119579acf2c 100644
--- a/include/linux/mfd/pcf50633/mbc.h
+++ b/include/linux/mfd/pcf50633/mbc.h
@@ -128,7 +128,6 @@ enum pcf50633_reg_mbcs3 {
128int pcf50633_mbc_usb_curlim_set(struct pcf50633 *pcf, int ma); 128int pcf50633_mbc_usb_curlim_set(struct pcf50633 *pcf, int ma);
129 129
130int pcf50633_mbc_get_status(struct pcf50633 *); 130int pcf50633_mbc_get_status(struct pcf50633 *);
131void pcf50633_mbc_set_status(struct pcf50633 *, int what, int status);
132 131
133#endif 132#endif
134 133
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index ee98cd570885..06ba90c211a5 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -2514,6 +2514,8 @@
2514#define PCI_DEVICE_ID_INTEL_IOAT_TBG3 0x3433 2514#define PCI_DEVICE_ID_INTEL_IOAT_TBG3 0x3433
2515#define PCI_DEVICE_ID_INTEL_82830_HB 0x3575 2515#define PCI_DEVICE_ID_INTEL_82830_HB 0x3575
2516#define PCI_DEVICE_ID_INTEL_82830_CGC 0x3577 2516#define PCI_DEVICE_ID_INTEL_82830_CGC 0x3577
2517#define PCI_DEVICE_ID_INTEL_82854_HB 0x358c
2518#define PCI_DEVICE_ID_INTEL_82854_IG 0x358e
2517#define PCI_DEVICE_ID_INTEL_82855GM_HB 0x3580 2519#define PCI_DEVICE_ID_INTEL_82855GM_HB 0x3580
2518#define PCI_DEVICE_ID_INTEL_82855GM_IG 0x3582 2520#define PCI_DEVICE_ID_INTEL_82855GM_IG 0x3582
2519#define PCI_DEVICE_ID_INTEL_E7520_MCH 0x3590 2521#define PCI_DEVICE_ID_INTEL_E7520_MCH 0x3590
diff --git a/include/linux/pci_regs.h b/include/linux/pci_regs.h
index e4d08c1b2e0b..616bf8b3c8b5 100644
--- a/include/linux/pci_regs.h
+++ b/include/linux/pci_regs.h
@@ -376,6 +376,7 @@
376#define PCI_EXP_TYPE_DOWNSTREAM 0x6 /* Downstream Port */ 376#define PCI_EXP_TYPE_DOWNSTREAM 0x6 /* Downstream Port */
377#define PCI_EXP_TYPE_PCI_BRIDGE 0x7 /* PCI/PCI-X Bridge */ 377#define PCI_EXP_TYPE_PCI_BRIDGE 0x7 /* PCI/PCI-X Bridge */
378#define PCI_EXP_TYPE_RC_END 0x9 /* Root Complex Integrated Endpoint */ 378#define PCI_EXP_TYPE_RC_END 0x9 /* Root Complex Integrated Endpoint */
379#define PCI_EXP_TYPE_RC_EC 0x10 /* Root Complex Event Collector */
379#define PCI_EXP_FLAGS_SLOT 0x0100 /* Slot implemented */ 380#define PCI_EXP_FLAGS_SLOT 0x0100 /* Slot implemented */
380#define PCI_EXP_FLAGS_IRQ 0x3e00 /* Interrupt message number */ 381#define PCI_EXP_FLAGS_IRQ 0x3e00 /* Interrupt message number */
381#define PCI_EXP_DEVCAP 4 /* Device capabilities */ 382#define PCI_EXP_DEVCAP 4 /* Device capabilities */
diff --git a/include/linux/pda_power.h b/include/linux/pda_power.h
index cb7d10f30763..d4cf7a2ceb3e 100644
--- a/include/linux/pda_power.h
+++ b/include/linux/pda_power.h
@@ -31,6 +31,8 @@ struct pda_power_pdata {
31 unsigned int wait_for_status; /* msecs, default is 500 */ 31 unsigned int wait_for_status; /* msecs, default is 500 */
32 unsigned int wait_for_charger; /* msecs, default is 500 */ 32 unsigned int wait_for_charger; /* msecs, default is 500 */
33 unsigned int polling_interval; /* msecs, default is 2000 */ 33 unsigned int polling_interval; /* msecs, default is 2000 */
34
35 unsigned long ac_max_uA; /* current to draw when on AC */
34}; 36};
35 37
36#endif /* __PDA_POWER_H__ */ 38#endif /* __PDA_POWER_H__ */
diff --git a/include/linux/percpu-defs.h b/include/linux/percpu-defs.h
new file mode 100644
index 000000000000..8f921d74f49f
--- /dev/null
+++ b/include/linux/percpu-defs.h
@@ -0,0 +1,84 @@
1#ifndef _LINUX_PERCPU_DEFS_H
2#define _LINUX_PERCPU_DEFS_H
3
4/*
5 * Determine the real variable name from the name visible in the
6 * kernel sources.
7 */
8#define per_cpu_var(var) per_cpu__##var
9
10/*
11 * Base implementations of per-CPU variable declarations and definitions, where
12 * the section in which the variable is to be placed is provided by the
13 * 'section' argument. This may be used to affect the parameters governing the
14 * variable's storage.
15 *
16 * NOTE! The sections for the DECLARE and for the DEFINE must match, lest
17 * linkage errors occur due the compiler generating the wrong code to access
18 * that section.
19 */
20#define DECLARE_PER_CPU_SECTION(type, name, section) \
21 extern \
22 __attribute__((__section__(PER_CPU_BASE_SECTION section))) \
23 PER_CPU_ATTRIBUTES __typeof__(type) per_cpu__##name
24
25#define DEFINE_PER_CPU_SECTION(type, name, section) \
26 __attribute__((__section__(PER_CPU_BASE_SECTION section))) \
27 PER_CPU_ATTRIBUTES __typeof__(type) per_cpu__##name
28
29/*
30 * Variant on the per-CPU variable declaration/definition theme used for
31 * ordinary per-CPU variables.
32 */
33#define DECLARE_PER_CPU(type, name) \
34 DECLARE_PER_CPU_SECTION(type, name, "")
35
36#define DEFINE_PER_CPU(type, name) \
37 DEFINE_PER_CPU_SECTION(type, name, "")
38
39/*
40 * Declaration/definition used for per-CPU variables that must come first in
41 * the set of variables.
42 */
43#define DECLARE_PER_CPU_FIRST(type, name) \
44 DECLARE_PER_CPU_SECTION(type, name, PER_CPU_FIRST_SECTION)
45
46#define DEFINE_PER_CPU_FIRST(type, name) \
47 DEFINE_PER_CPU_SECTION(type, name, PER_CPU_FIRST_SECTION)
48
49/*
50 * Declaration/definition used for per-CPU variables that must be cacheline
51 * aligned under SMP conditions so that, whilst a particular instance of the
52 * data corresponds to a particular CPU, inefficiencies due to direct access by
53 * other CPUs are reduced by preventing the data from unnecessarily spanning
54 * cachelines.
55 *
56 * An example of this would be statistical data, where each CPU's set of data
57 * is updated by that CPU alone, but the data from across all CPUs is collated
58 * by a CPU processing a read from a proc file.
59 */
60#define DECLARE_PER_CPU_SHARED_ALIGNED(type, name) \
61 DECLARE_PER_CPU_SECTION(type, name, PER_CPU_SHARED_ALIGNED_SECTION) \
62 ____cacheline_aligned_in_smp
63
64#define DEFINE_PER_CPU_SHARED_ALIGNED(type, name) \
65 DEFINE_PER_CPU_SECTION(type, name, PER_CPU_SHARED_ALIGNED_SECTION) \
66 ____cacheline_aligned_in_smp
67
68/*
69 * Declaration/definition used for per-CPU variables that must be page aligned.
70 */
71#define DECLARE_PER_CPU_PAGE_ALIGNED(type, name) \
72 DECLARE_PER_CPU_SECTION(type, name, ".page_aligned")
73
74#define DEFINE_PER_CPU_PAGE_ALIGNED(type, name) \
75 DEFINE_PER_CPU_SECTION(type, name, ".page_aligned")
76
77/*
78 * Intermodule exports for per-CPU variables.
79 */
80#define EXPORT_PER_CPU_SYMBOL(var) EXPORT_SYMBOL(per_cpu__##var)
81#define EXPORT_PER_CPU_SYMBOL_GPL(var) EXPORT_SYMBOL_GPL(per_cpu__##var)
82
83
84#endif /* _LINUX_PERCPU_DEFS_H */
diff --git a/include/linux/percpu.h b/include/linux/percpu.h
index ee5615d65211..1581ff235c7e 100644
--- a/include/linux/percpu.h
+++ b/include/linux/percpu.h
@@ -9,50 +9,6 @@
9 9
10#include <asm/percpu.h> 10#include <asm/percpu.h>
11 11
12#ifndef PER_CPU_BASE_SECTION
13#ifdef CONFIG_SMP
14#define PER_CPU_BASE_SECTION ".data.percpu"
15#else
16#define PER_CPU_BASE_SECTION ".data"
17#endif
18#endif
19
20#ifdef CONFIG_SMP
21
22#ifdef MODULE
23#define PER_CPU_SHARED_ALIGNED_SECTION ""
24#else
25#define PER_CPU_SHARED_ALIGNED_SECTION ".shared_aligned"
26#endif
27#define PER_CPU_FIRST_SECTION ".first"
28
29#else
30
31#define PER_CPU_SHARED_ALIGNED_SECTION ""
32#define PER_CPU_FIRST_SECTION ""
33
34#endif
35
36#define DEFINE_PER_CPU_SECTION(type, name, section) \
37 __attribute__((__section__(PER_CPU_BASE_SECTION section))) \
38 PER_CPU_ATTRIBUTES __typeof__(type) per_cpu__##name
39
40#define DEFINE_PER_CPU(type, name) \
41 DEFINE_PER_CPU_SECTION(type, name, "")
42
43#define DEFINE_PER_CPU_SHARED_ALIGNED(type, name) \
44 DEFINE_PER_CPU_SECTION(type, name, PER_CPU_SHARED_ALIGNED_SECTION) \
45 ____cacheline_aligned_in_smp
46
47#define DEFINE_PER_CPU_PAGE_ALIGNED(type, name) \
48 DEFINE_PER_CPU_SECTION(type, name, ".page_aligned")
49
50#define DEFINE_PER_CPU_FIRST(type, name) \
51 DEFINE_PER_CPU_SECTION(type, name, PER_CPU_FIRST_SECTION)
52
53#define EXPORT_PER_CPU_SYMBOL(var) EXPORT_SYMBOL(per_cpu__##var)
54#define EXPORT_PER_CPU_SYMBOL_GPL(var) EXPORT_SYMBOL_GPL(per_cpu__##var)
55
56/* enough to cover all DEFINE_PER_CPUs in modules */ 12/* enough to cover all DEFINE_PER_CPUs in modules */
57#ifdef CONFIG_MODULES 13#ifdef CONFIG_MODULES
58#define PERCPU_MODULE_RESERVE (8 << 10) 14#define PERCPU_MODULE_RESERVE (8 << 10)
@@ -168,4 +124,56 @@ static inline void free_percpu(void *p)
168#define alloc_percpu(type) (type *)__alloc_percpu(sizeof(type), \ 124#define alloc_percpu(type) (type *)__alloc_percpu(sizeof(type), \
169 __alignof__(type)) 125 __alignof__(type))
170 126
127/*
128 * Optional methods for optimized non-lvalue per-cpu variable access.
129 *
130 * @var can be a percpu variable or a field of it and its size should
131 * equal char, int or long. percpu_read() evaluates to a lvalue and
132 * all others to void.
133 *
134 * These operations are guaranteed to be atomic w.r.t. preemption.
135 * The generic versions use plain get/put_cpu_var(). Archs are
136 * encouraged to implement single-instruction alternatives which don't
137 * require preemption protection.
138 */
139#ifndef percpu_read
140# define percpu_read(var) \
141 ({ \
142 typeof(per_cpu_var(var)) __tmp_var__; \
143 __tmp_var__ = get_cpu_var(var); \
144 put_cpu_var(var); \
145 __tmp_var__; \
146 })
147#endif
148
149#define __percpu_generic_to_op(var, val, op) \
150do { \
151 get_cpu_var(var) op val; \
152 put_cpu_var(var); \
153} while (0)
154
155#ifndef percpu_write
156# define percpu_write(var, val) __percpu_generic_to_op(var, (val), =)
157#endif
158
159#ifndef percpu_add
160# define percpu_add(var, val) __percpu_generic_to_op(var, (val), +=)
161#endif
162
163#ifndef percpu_sub
164# define percpu_sub(var, val) __percpu_generic_to_op(var, (val), -=)
165#endif
166
167#ifndef percpu_and
168# define percpu_and(var, val) __percpu_generic_to_op(var, (val), &=)
169#endif
170
171#ifndef percpu_or
172# define percpu_or(var, val) __percpu_generic_to_op(var, (val), |=)
173#endif
174
175#ifndef percpu_xor
176# define percpu_xor(var, val) __percpu_generic_to_op(var, (val), ^=)
177#endif
178
171#endif /* __LINUX_PERCPU_H */ 179#endif /* __LINUX_PERCPU_H */
diff --git a/include/linux/phy.h b/include/linux/phy.h
index 32cf14a4b034..97e40cb6b588 100644
--- a/include/linux/phy.h
+++ b/include/linux/phy.h
@@ -388,6 +388,12 @@ struct phy_driver {
388 /* Enables or disables interrupts */ 388 /* Enables or disables interrupts */
389 int (*config_intr)(struct phy_device *phydev); 389 int (*config_intr)(struct phy_device *phydev);
390 390
391 /*
392 * Checks if the PHY generated an interrupt.
393 * For multi-PHY devices with shared PHY interrupt pin
394 */
395 int (*did_interrupt)(struct phy_device *phydev);
396
391 /* Clears up any memory if needed */ 397 /* Clears up any memory if needed */
392 void (*remove)(struct phy_device *phydev); 398 void (*remove)(struct phy_device *phydev);
393 399
diff --git a/include/linux/pipe_fs_i.h b/include/linux/pipe_fs_i.h
index 8e4120285f72..c8f038554e80 100644
--- a/include/linux/pipe_fs_i.h
+++ b/include/linux/pipe_fs_i.h
@@ -134,6 +134,11 @@ struct pipe_buf_operations {
134 memory allocation, whereas PIPE_BUF makes atomicity guarantees. */ 134 memory allocation, whereas PIPE_BUF makes atomicity guarantees. */
135#define PIPE_SIZE PAGE_SIZE 135#define PIPE_SIZE PAGE_SIZE
136 136
137/* Pipe lock and unlock operations */
138void pipe_lock(struct pipe_inode_info *);
139void pipe_unlock(struct pipe_inode_info *);
140void pipe_double_lock(struct pipe_inode_info *, struct pipe_inode_info *);
141
137/* Drop the inode semaphore and wait for a pipe event, atomically */ 142/* Drop the inode semaphore and wait for a pipe event, atomically */
138void pipe_wait(struct pipe_inode_info *pipe); 143void pipe_wait(struct pipe_inode_info *pipe);
139 144
diff --git a/include/linux/pktcdvd.h b/include/linux/pktcdvd.h
index 04b4d7330e6d..d745f5b6c7b0 100644
--- a/include/linux/pktcdvd.h
+++ b/include/linux/pktcdvd.h
@@ -113,6 +113,7 @@ struct pkt_ctrl_command {
113#include <linux/cdrom.h> 113#include <linux/cdrom.h>
114#include <linux/kobject.h> 114#include <linux/kobject.h>
115#include <linux/sysfs.h> 115#include <linux/sysfs.h>
116#include <linux/mempool.h>
116 117
117/* default bio write queue congestion marks */ 118/* default bio write queue congestion marks */
118#define PKT_WRITE_CONGESTION_ON 10000 119#define PKT_WRITE_CONGESTION_ON 10000
diff --git a/include/linux/platform_device.h b/include/linux/platform_device.h
index 76e470a299bf..72736fd8223c 100644
--- a/include/linux/platform_device.h
+++ b/include/linux/platform_device.h
@@ -77,4 +77,46 @@ extern int platform_driver_probe(struct platform_driver *driver,
77#define platform_get_drvdata(_dev) dev_get_drvdata(&(_dev)->dev) 77#define platform_get_drvdata(_dev) dev_get_drvdata(&(_dev)->dev)
78#define platform_set_drvdata(_dev,data) dev_set_drvdata(&(_dev)->dev, (data)) 78#define platform_set_drvdata(_dev,data) dev_set_drvdata(&(_dev)->dev, (data))
79 79
80/* early platform driver interface */
81struct early_platform_driver {
82 const char *class_str;
83 struct platform_driver *pdrv;
84 struct list_head list;
85 int requested_id;
86};
87
88#define EARLY_PLATFORM_ID_UNSET -2
89#define EARLY_PLATFORM_ID_ERROR -3
90
91extern int early_platform_driver_register(struct early_platform_driver *epdrv,
92 char *buf);
93extern void early_platform_add_devices(struct platform_device **devs, int num);
94
95static inline int is_early_platform_device(struct platform_device *pdev)
96{
97 return !pdev->dev.driver;
98}
99
100extern void early_platform_driver_register_all(char *class_str);
101extern int early_platform_driver_probe(char *class_str,
102 int nr_probe, int user_only);
103extern void early_platform_cleanup(void);
104
105
106#ifndef MODULE
107#define early_platform_init(class_string, platform_driver) \
108static __initdata struct early_platform_driver early_driver = { \
109 .class_str = class_string, \
110 .pdrv = platform_driver, \
111 .requested_id = EARLY_PLATFORM_ID_UNSET, \
112}; \
113static int __init early_platform_driver_setup_func(char *buf) \
114{ \
115 return early_platform_driver_register(&early_driver, buf); \
116} \
117early_param(class_string, early_platform_driver_setup_func)
118#else /* MODULE */
119#define early_platform_init(class_string, platform_driver)
120#endif /* MODULE */
121
80#endif /* _PLATFORM_DEVICE_H_ */ 122#endif /* _PLATFORM_DEVICE_H_ */
diff --git a/include/linux/rcutree.h b/include/linux/rcutree.h
index 0cdda00f2b2a..58b2aa5312b9 100644
--- a/include/linux/rcutree.h
+++ b/include/linux/rcutree.h
@@ -161,9 +161,8 @@ struct rcu_data {
161 unsigned long offline_fqs; /* Kicked due to being offline. */ 161 unsigned long offline_fqs; /* Kicked due to being offline. */
162 unsigned long resched_ipi; /* Sent a resched IPI. */ 162 unsigned long resched_ipi; /* Sent a resched IPI. */
163 163
164 /* 5) state to allow this CPU to force_quiescent_state on others */ 164 /* 5) For future __rcu_pending statistics. */
165 long n_rcu_pending; /* rcu_pending() calls since boot. */ 165 long n_rcu_pending; /* rcu_pending() calls since boot. */
166 long n_rcu_pending_force_qs; /* when to force quiescent states. */
167 166
168 int cpu; 167 int cpu;
169}; 168};
diff --git a/include/linux/reiserfs_fs_sb.h b/include/linux/reiserfs_fs_sb.h
index 5621d87c4479..6b361d23a499 100644
--- a/include/linux/reiserfs_fs_sb.h
+++ b/include/linux/reiserfs_fs_sb.h
@@ -193,7 +193,7 @@ struct reiserfs_journal {
193 atomic_t j_wcount; /* count of writers for current commit */ 193 atomic_t j_wcount; /* count of writers for current commit */
194 unsigned long j_bcount; /* batch count. allows turning X transactions into 1 */ 194 unsigned long j_bcount; /* batch count. allows turning X transactions into 1 */
195 unsigned long j_first_unflushed_offset; /* first unflushed transactions offset */ 195 unsigned long j_first_unflushed_offset; /* first unflushed transactions offset */
196 unsigned long j_last_flush_trans_id; /* last fully flushed journal timestamp */ 196 unsigned j_last_flush_trans_id; /* last fully flushed journal timestamp */
197 struct buffer_head *j_header_bh; 197 struct buffer_head *j_header_bh;
198 198
199 time_t j_trans_start_time; /* time this transaction started */ 199 time_t j_trans_start_time; /* time this transaction started */
diff --git a/include/linux/rotary_encoder.h b/include/linux/rotary_encoder.h
new file mode 100644
index 000000000000..12d63a30c347
--- /dev/null
+++ b/include/linux/rotary_encoder.h
@@ -0,0 +1,13 @@
1#ifndef __ROTARY_ENCODER_H__
2#define __ROTARY_ENCODER_H__
3
4struct rotary_encoder_platform_data {
5 unsigned int steps;
6 unsigned int axis;
7 unsigned int gpio_a;
8 unsigned int gpio_b;
9 unsigned int inverted_a;
10 unsigned int inverted_b;
11};
12
13#endif /* __ROTARY_ENCODER_H__ */
diff --git a/include/linux/sched.h b/include/linux/sched.h
index 98e1fe51601d..b4c38bc8049c 100644
--- a/include/linux/sched.h
+++ b/include/linux/sched.h
@@ -205,7 +205,8 @@ extern unsigned long long time_sync_thresh;
205#define task_is_stopped_or_traced(task) \ 205#define task_is_stopped_or_traced(task) \
206 ((task->state & (__TASK_STOPPED | __TASK_TRACED)) != 0) 206 ((task->state & (__TASK_STOPPED | __TASK_TRACED)) != 0)
207#define task_contributes_to_load(task) \ 207#define task_contributes_to_load(task) \
208 ((task->state & TASK_UNINTERRUPTIBLE) != 0) 208 ((task->state & TASK_UNINTERRUPTIBLE) != 0 && \
209 (task->flags & PF_FROZEN) == 0)
209 210
210#define __set_task_state(tsk, state_value) \ 211#define __set_task_state(tsk, state_value) \
211 do { (tsk)->state = (state_value); } while (0) 212 do { (tsk)->state = (state_value); } while (0)
diff --git a/include/linux/seccomp.h b/include/linux/seccomp.h
index 262a8dccfa81..167c33361d9c 100644
--- a/include/linux/seccomp.h
+++ b/include/linux/seccomp.h
@@ -21,6 +21,8 @@ extern long prctl_set_seccomp(unsigned long);
21 21
22#else /* CONFIG_SECCOMP */ 22#else /* CONFIG_SECCOMP */
23 23
24#include <linux/errno.h>
25
24typedef struct { } seccomp_t; 26typedef struct { } seccomp_t;
25 27
26#define secure_computing(x) do { } while (0) 28#define secure_computing(x) do { } while (0)
diff --git a/include/linux/section-names.h b/include/linux/section-names.h
new file mode 100644
index 000000000000..c956f4eb2adf
--- /dev/null
+++ b/include/linux/section-names.h
@@ -0,0 +1,6 @@
1#ifndef __LINUX_SECTION_NAMES_H
2#define __LINUX_SECTION_NAMES_H
3
4#define HEAD_TEXT_SECTION .head.text
5
6#endif /* !__LINUX_SECTION_NAMES_H */
diff --git a/include/linux/serial_max3100.h b/include/linux/serial_max3100.h
new file mode 100644
index 000000000000..4976befb6aeb
--- /dev/null
+++ b/include/linux/serial_max3100.h
@@ -0,0 +1,52 @@
1/*
2 *
3 * Copyright (C) 2007 Christian Pellegrin
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 */
10
11
12#ifndef _LINUX_SERIAL_MAX3100_H
13#define _LINUX_SERIAL_MAX3100_H 1
14
15
16/**
17 * struct plat_max3100 - MAX3100 SPI UART platform data
18 * @loopback: force MAX3100 in loopback
19 * @crystal: 1 for 3.6864 Mhz, 0 for 1.8432
20 * @max3100_hw_suspend: MAX3100 has a shutdown pin. This is a hook
21 * called on suspend and resume to activate it.
22 * @poll_time: poll time for CTS signal in ms, 0 disables (so no hw
23 * flow ctrl is possible but you have less CPU usage)
24 *
25 * You should use this structure in your machine description to specify
26 * how the MAX3100 is connected. Example:
27 *
28 * static struct plat_max3100 max3100_plat_data = {
29 * .loopback = 0,
30 * .crystal = 0,
31 * .poll_time = 100,
32 * };
33 *
34 * static struct spi_board_info spi_board_info[] = {
35 * {
36 * .modalias = "max3100",
37 * .platform_data = &max3100_plat_data,
38 * .irq = IRQ_EINT12,
39 * .max_speed_hz = 5*1000*1000,
40 * .chip_select = 0,
41 * },
42 * };
43 *
44 **/
45struct plat_max3100 {
46 int loopback;
47 int crystal;
48 void (*max3100_hw_suspend) (int suspend);
49 int poll_time;
50};
51
52#endif
diff --git a/include/linux/sht15.h b/include/linux/sht15.h
new file mode 100644
index 000000000000..046bce05ecab
--- /dev/null
+++ b/include/linux/sht15.h
@@ -0,0 +1,24 @@
1/*
2 * sht15.h - support for the SHT15 Temperature and Humidity Sensor
3 *
4 * Copyright (c) 2009 Jonathan Cameron
5 *
6 * Copyright (c) 2007 Wouter Horre
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13/**
14 * struct sht15_platform_data - sht15 connectivity info
15 * @gpio_data: no. of gpio to which bidirectional data line is connected
16 * @gpio_sck: no. of gpio to which the data clock is connected.
17 * @supply_mv: supply voltage in mv. Overridden by regulator if available.
18 **/
19struct sht15_platform_data {
20 int gpio_data;
21 int gpio_sck;
22 int supply_mv;
23};
24
diff --git a/include/linux/slow-work.h b/include/linux/slow-work.h
index 85958277f83d..b65c8881f07a 100644
--- a/include/linux/slow-work.h
+++ b/include/linux/slow-work.h
@@ -67,7 +67,7 @@ static inline void slow_work_init(struct slow_work *work,
67} 67}
68 68
69/** 69/**
70 * slow_work_init - Initialise a very slow work item 70 * vslow_work_init - Initialise a very slow work item
71 * @work: The work item to initialise 71 * @work: The work item to initialise
72 * @ops: The operations to use to handle the slow work item 72 * @ops: The operations to use to handle the slow work item
73 * 73 *
diff --git a/include/linux/spi/ad7879.h b/include/linux/spi/ad7879.h
new file mode 100644
index 000000000000..4231104c9afa
--- /dev/null
+++ b/include/linux/spi/ad7879.h
@@ -0,0 +1,35 @@
1/* linux/spi/ad7879.h */
2
3/* Touchscreen characteristics vary between boards and models. The
4 * platform_data for the device's "struct device" holds this information.
5 *
6 * It's OK if the min/max values are zero.
7 */
8struct ad7879_platform_data {
9 u16 model; /* 7879 */
10 u16 x_plate_ohms;
11 u16 x_min, x_max;
12 u16 y_min, y_max;
13 u16 pressure_min, pressure_max;
14
15 /* [0..255] 0=OFF Starts at 1=550us and goes
16 * all the way to 9.440ms in steps of 35us.
17 */
18 u8 pen_down_acc_interval;
19 /* [0..15] Starts at 0=128us and goes all the
20 * way to 4.096ms in steps of 128us.
21 */
22 u8 first_conversion_delay;
23 /* [0..3] 0 = 2us, 1 = 4us, 2 = 8us, 3 = 16us */
24 u8 acquisition_time;
25 /* [0..3] Average X middle samples 0 = 2, 1 = 4, 2 = 8, 3 = 16 */
26 u8 averaging;
27 /* [0..3] Perform X measurements 0 = OFF,
28 * 1 = 4, 2 = 8, 3 = 16 (median > averaging)
29 */
30 u8 median;
31 /* 1 = AUX/VBAT/GPIO set to GPIO Output */
32 u8 gpio_output;
33 /* Initial GPIO pin state (valid if gpio_output = 1) */
34 u8 gpio_default;
35};
diff --git a/include/linux/spi/ads7846.h b/include/linux/spi/ads7846.h
index 05eab2f11e63..2ea20320c093 100644
--- a/include/linux/spi/ads7846.h
+++ b/include/linux/spi/ads7846.h
@@ -51,5 +51,6 @@ struct ads7846_platform_data {
51 void **filter_data); 51 void **filter_data);
52 int (*filter) (void *filter_data, int data_idx, int *val); 52 int (*filter) (void *filter_data, int data_idx, int *val);
53 void (*filter_cleanup)(void *filter_data); 53 void (*filter_cleanup)(void *filter_data);
54 void (*wait_for_sync)(void);
54}; 55};
55 56
diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h
index 2cc43fa380cb..a0faa18f7b1b 100644
--- a/include/linux/spi/spi.h
+++ b/include/linux/spi/spi.h
@@ -245,7 +245,12 @@ struct spi_master {
245 */ 245 */
246 u16 dma_alignment; 246 u16 dma_alignment;
247 247
248 /* setup mode and clock, etc (spi driver may call many times) */ 248 /* Setup mode and clock, etc (spi driver may call many times).
249 *
250 * IMPORTANT: this may be called when transfers to another
251 * device are active. DO NOT UPDATE SHARED REGISTERS in ways
252 * which could break those transfers.
253 */
249 int (*setup)(struct spi_device *spi); 254 int (*setup)(struct spi_device *spi);
250 255
251 /* bidirectional bulk transfers 256 /* bidirectional bulk transfers
diff --git a/include/linux/splice.h b/include/linux/splice.h
index 528dcb93c2f2..5f3faa9d15ae 100644
--- a/include/linux/splice.h
+++ b/include/linux/splice.h
@@ -36,6 +36,8 @@ struct splice_desc {
36 void *data; /* cookie */ 36 void *data; /* cookie */
37 } u; 37 } u;
38 loff_t pos; /* file position */ 38 loff_t pos; /* file position */
39 size_t num_spliced; /* number of bytes already spliced */
40 bool need_wakeup; /* need to wake up writer */
39}; 41};
40 42
41struct partial_page { 43struct partial_page {
@@ -66,6 +68,16 @@ extern ssize_t splice_from_pipe(struct pipe_inode_info *, struct file *,
66 splice_actor *); 68 splice_actor *);
67extern ssize_t __splice_from_pipe(struct pipe_inode_info *, 69extern ssize_t __splice_from_pipe(struct pipe_inode_info *,
68 struct splice_desc *, splice_actor *); 70 struct splice_desc *, splice_actor *);
71extern int splice_from_pipe_feed(struct pipe_inode_info *, struct splice_desc *,
72 splice_actor *);
73extern int splice_from_pipe_next(struct pipe_inode_info *,
74 struct splice_desc *);
75extern void splice_from_pipe_begin(struct splice_desc *);
76extern void splice_from_pipe_end(struct pipe_inode_info *,
77 struct splice_desc *);
78extern int pipe_to_file(struct pipe_inode_info *, struct pipe_buffer *,
79 struct splice_desc *);
80
69extern ssize_t splice_to_pipe(struct pipe_inode_info *, 81extern ssize_t splice_to_pipe(struct pipe_inode_info *,
70 struct splice_pipe_desc *); 82 struct splice_pipe_desc *);
71extern ssize_t splice_direct_to_actor(struct file *, struct splice_desc *, 83extern ssize_t splice_direct_to_actor(struct file *, struct splice_desc *,
diff --git a/include/linux/stringify.h b/include/linux/stringify.h
index 0b4388356c87..841cec8ed525 100644
--- a/include/linux/stringify.h
+++ b/include/linux/stringify.h
@@ -6,7 +6,7 @@
6 * converts to "bar". 6 * converts to "bar".
7 */ 7 */
8 8
9#define __stringify_1(x) #x 9#define __stringify_1(x...) #x
10#define __stringify(x) __stringify_1(x) 10#define __stringify(x...) __stringify_1(x)
11 11
12#endif /* !__LINUX_STRINGIFY_H */ 12#endif /* !__LINUX_STRINGIFY_H */
diff --git a/include/linux/suspend.h b/include/linux/suspend.h
index 3e3a4364cbff..795032edfc46 100644
--- a/include/linux/suspend.h
+++ b/include/linux/suspend.h
@@ -58,10 +58,17 @@ typedef int __bitwise suspend_state_t;
58 * by @begin(). 58 * by @begin().
59 * @prepare() is called right after devices have been suspended (ie. the 59 * @prepare() is called right after devices have been suspended (ie. the
60 * appropriate .suspend() method has been executed for each device) and 60 * appropriate .suspend() method has been executed for each device) and
61 * before the nonboot CPUs are disabled (it is executed with IRQs enabled). 61 * before device drivers' late suspend callbacks are executed. It returns
62 * This callback is optional. It returns 0 on success or a negative 62 * 0 on success or a negative error code otherwise, in which case the
63 * error code otherwise, in which case the system cannot enter the desired 63 * system cannot enter the desired sleep state (@prepare_late(), @enter(),
64 * sleep state (@enter() and @finish() will not be called in that case). 64 * @wake(), and @finish() will not be called in that case).
65 *
66 * @prepare_late: Finish preparing the platform for entering the system sleep
67 * state indicated by @begin().
68 * @prepare_late is called before disabling nonboot CPUs and after
69 * device drivers' late suspend callbacks have been executed. It returns
70 * 0 on success or a negative error code otherwise, in which case the
71 * system cannot enter the desired sleep state (@enter() and @wake()).
65 * 72 *
66 * @enter: Enter the system sleep state indicated by @begin() or represented by 73 * @enter: Enter the system sleep state indicated by @begin() or represented by
67 * the argument if @begin() is not implemented. 74 * the argument if @begin() is not implemented.
@@ -69,19 +76,26 @@ typedef int __bitwise suspend_state_t;
69 * error code otherwise, in which case the system cannot enter the desired 76 * error code otherwise, in which case the system cannot enter the desired
70 * sleep state. 77 * sleep state.
71 * 78 *
72 * @finish: Called when the system has just left a sleep state, right after 79 * @wake: Called when the system has just left a sleep state, right after
73 * the nonboot CPUs have been enabled and before devices are resumed (it is 80 * the nonboot CPUs have been enabled and before device drivers' early
74 * executed with IRQs enabled). 81 * resume callbacks are executed.
82 * This callback is optional, but should be implemented by the platforms
83 * that implement @prepare_late(). If implemented, it is always called
84 * after @enter(), even if @enter() fails.
85 *
86 * @finish: Finish wake-up of the platform.
87 * @finish is called right prior to calling device drivers' regular suspend
88 * callbacks.
75 * This callback is optional, but should be implemented by the platforms 89 * This callback is optional, but should be implemented by the platforms
76 * that implement @prepare(). If implemented, it is always called after 90 * that implement @prepare(). If implemented, it is always called after
77 * @enter() (even if @enter() fails). 91 * @enter() and @wake(), if implemented, even if any of them fails.
78 * 92 *
79 * @end: Called by the PM core right after resuming devices, to indicate to 93 * @end: Called by the PM core right after resuming devices, to indicate to
80 * the platform that the system has returned to the working state or 94 * the platform that the system has returned to the working state or
81 * the transition to the sleep state has been aborted. 95 * the transition to the sleep state has been aborted.
82 * This callback is optional, but should be implemented by the platforms 96 * This callback is optional, but should be implemented by the platforms
83 * that implement @begin(), but platforms implementing @begin() should 97 * that implement @begin(). Accordingly, platforms implementing @begin()
84 * also provide a @end() which cleans up transitions aborted before 98 * should also provide a @end() which cleans up transitions aborted before
85 * @enter(). 99 * @enter().
86 * 100 *
87 * @recover: Recover the platform from a suspend failure. 101 * @recover: Recover the platform from a suspend failure.
@@ -93,7 +107,9 @@ struct platform_suspend_ops {
93 int (*valid)(suspend_state_t state); 107 int (*valid)(suspend_state_t state);
94 int (*begin)(suspend_state_t state); 108 int (*begin)(suspend_state_t state);
95 int (*prepare)(void); 109 int (*prepare)(void);
110 int (*prepare_late)(void);
96 int (*enter)(suspend_state_t state); 111 int (*enter)(suspend_state_t state);
112 void (*wake)(void);
97 void (*finish)(void); 113 void (*finish)(void);
98 void (*end)(void); 114 void (*end)(void);
99 void (*recover)(void); 115 void (*recover)(void);
diff --git a/include/linux/syscalls.h b/include/linux/syscalls.h
index 6470f74074af..40617c1d8976 100644
--- a/include/linux/syscalls.h
+++ b/include/linux/syscalls.h
@@ -65,7 +65,7 @@ struct old_linux_dirent;
65#include <asm/signal.h> 65#include <asm/signal.h>
66#include <linux/quota.h> 66#include <linux/quota.h>
67#include <linux/key.h> 67#include <linux/key.h>
68#include <linux/ftrace.h> 68#include <trace/syscall.h>
69 69
70#define __SC_DECL1(t1, a1) t1 a1 70#define __SC_DECL1(t1, a1) t1 a1
71#define __SC_DECL2(t2, a2, ...) t2 a2, __SC_DECL1(__VA_ARGS__) 71#define __SC_DECL2(t2, a2, ...) t2 a2, __SC_DECL1(__VA_ARGS__)
@@ -148,7 +148,7 @@ struct old_linux_dirent;
148 asm ("\t.globl " #alias "\n\t.set " #alias ", " #name "\n" \ 148 asm ("\t.globl " #alias "\n\t.set " #alias ", " #name "\n" \
149 "\t.globl ." #alias "\n\t.set ." #alias ", ." #name) 149 "\t.globl ." #alias "\n\t.set ." #alias ", ." #name)
150#else 150#else
151#ifdef CONFIG_ALPHA 151#if defined(CONFIG_ALPHA) || defined(CONFIG_MIPS)
152#define SYSCALL_ALIAS(alias, name) \ 152#define SYSCALL_ALIAS(alias, name) \
153 asm ( #alias " = " #name "\n\t.globl " #alias) 153 asm ( #alias " = " #name "\n\t.globl " #alias)
154#else 154#else
diff --git a/include/linux/usb.h b/include/linux/usb.h
index c6b2ab41b908..3aa2cd1f8d08 100644
--- a/include/linux/usb.h
+++ b/include/linux/usb.h
@@ -1387,6 +1387,7 @@ extern int usb_string(struct usb_device *dev, int index,
1387extern int usb_clear_halt(struct usb_device *dev, int pipe); 1387extern int usb_clear_halt(struct usb_device *dev, int pipe);
1388extern int usb_reset_configuration(struct usb_device *dev); 1388extern int usb_reset_configuration(struct usb_device *dev);
1389extern int usb_set_interface(struct usb_device *dev, int ifnum, int alternate); 1389extern int usb_set_interface(struct usb_device *dev, int ifnum, int alternate);
1390extern void usb_reset_endpoint(struct usb_device *dev, unsigned int epaddr);
1390 1391
1391/* this request isn't really synchronous, but it belongs with the others */ 1392/* this request isn't really synchronous, but it belongs with the others */
1392extern int usb_driver_set_configuration(struct usb_device *udev, int config); 1393extern int usb_driver_set_configuration(struct usb_device *udev, int config);
@@ -1491,14 +1492,6 @@ void usb_sg_wait(struct usb_sg_request *io);
1491#define usb_pipecontrol(pipe) (usb_pipetype((pipe)) == PIPE_CONTROL) 1492#define usb_pipecontrol(pipe) (usb_pipetype((pipe)) == PIPE_CONTROL)
1492#define usb_pipebulk(pipe) (usb_pipetype((pipe)) == PIPE_BULK) 1493#define usb_pipebulk(pipe) (usb_pipetype((pipe)) == PIPE_BULK)
1493 1494
1494/* The D0/D1 toggle bits ... USE WITH CAUTION (they're almost hcd-internal) */
1495#define usb_gettoggle(dev, ep, out) (((dev)->toggle[out] >> (ep)) & 1)
1496#define usb_dotoggle(dev, ep, out) ((dev)->toggle[out] ^= (1 << (ep)))
1497#define usb_settoggle(dev, ep, out, bit) \
1498 ((dev)->toggle[out] = ((dev)->toggle[out] & ~(1 << (ep))) | \
1499 ((bit) << (ep)))
1500
1501
1502static inline unsigned int __create_pipe(struct usb_device *dev, 1495static inline unsigned int __create_pipe(struct usb_device *dev,
1503 unsigned int endpoint) 1496 unsigned int endpoint)
1504{ 1497{
diff --git a/include/linux/usb/musb.h b/include/linux/usb/musb.h
index d6aad0ea6033..d43755669261 100644
--- a/include/linux/usb/musb.h
+++ b/include/linux/usb/musb.h
@@ -7,6 +7,9 @@
7 * key configuration differences between boards. 7 * key configuration differences between boards.
8 */ 8 */
9 9
10#ifndef __LINUX_USB_MUSB_H
11#define __LINUX_USB_MUSB_H
12
10/* The USB role is defined by the connector used on the board, so long as 13/* The USB role is defined by the connector used on the board, so long as
11 * standards are being followed. (Developer boards sometimes won't.) 14 * standards are being followed. (Developer boards sometimes won't.)
12 */ 15 */
@@ -101,3 +104,5 @@ extern int __init tusb6010_setup_interface(
101extern int tusb6010_platform_retime(unsigned is_refclk); 104extern int tusb6010_platform_retime(unsigned is_refclk);
102 105
103#endif /* OMAP2 */ 106#endif /* OMAP2 */
107
108#endif /* __LINUX_USB_MUSB_H */
diff --git a/include/linux/usb/serial.h b/include/linux/usb/serial.h
index b95842542590..625e9e4639c6 100644
--- a/include/linux/usb/serial.h
+++ b/include/linux/usb/serial.h
@@ -29,7 +29,7 @@
29/** 29/**
30 * usb_serial_port: structure for the specific ports of a device. 30 * usb_serial_port: structure for the specific ports of a device.
31 * @serial: pointer back to the struct usb_serial owner of this port. 31 * @serial: pointer back to the struct usb_serial owner of this port.
32 * @tty: pointer to the corresponding tty for this port. 32 * @port: pointer to the corresponding tty_port for this port.
33 * @lock: spinlock to grab when updating portions of this structure. 33 * @lock: spinlock to grab when updating portions of this structure.
34 * @mutex: mutex used to synchronize serial_open() and serial_close() 34 * @mutex: mutex used to synchronize serial_open() and serial_close()
35 * access for this port. 35 * access for this port.
@@ -44,19 +44,22 @@
44 * @interrupt_out_endpointAddress: endpoint address for the interrupt out pipe 44 * @interrupt_out_endpointAddress: endpoint address for the interrupt out pipe
45 * for this port. 45 * for this port.
46 * @bulk_in_buffer: pointer to the bulk in buffer for this port. 46 * @bulk_in_buffer: pointer to the bulk in buffer for this port.
47 * @bulk_in_size: the size of the bulk_in_buffer, in bytes.
47 * @read_urb: pointer to the bulk in struct urb for this port. 48 * @read_urb: pointer to the bulk in struct urb for this port.
48 * @bulk_in_endpointAddress: endpoint address for the bulk in pipe for this 49 * @bulk_in_endpointAddress: endpoint address for the bulk in pipe for this
49 * port. 50 * port.
50 * @bulk_out_buffer: pointer to the bulk out buffer for this port. 51 * @bulk_out_buffer: pointer to the bulk out buffer for this port.
51 * @bulk_out_size: the size of the bulk_out_buffer, in bytes. 52 * @bulk_out_size: the size of the bulk_out_buffer, in bytes.
52 * @write_urb: pointer to the bulk out struct urb for this port. 53 * @write_urb: pointer to the bulk out struct urb for this port.
54 * @write_urb_busy: port`s writing status
53 * @bulk_out_endpointAddress: endpoint address for the bulk out pipe for this 55 * @bulk_out_endpointAddress: endpoint address for the bulk out pipe for this
54 * port. 56 * port.
55 * @write_wait: a wait_queue_head_t used by the port. 57 * @write_wait: a wait_queue_head_t used by the port.
56 * @work: work queue entry for the line discipline waking up. 58 * @work: work queue entry for the line discipline waking up.
57 * @open_count: number of times this port has been opened.
58 * @throttled: nonzero if the read urb is inactive to throttle the device 59 * @throttled: nonzero if the read urb is inactive to throttle the device
59 * @throttle_req: nonzero if the tty wants to throttle us 60 * @throttle_req: nonzero if the tty wants to throttle us
61 * @console: attached usb serial console
62 * @dev: pointer to the serial device
60 * 63 *
61 * This structure is used by the usb-serial core and drivers for the specific 64 * This structure is used by the usb-serial core and drivers for the specific
62 * ports of a device. 65 * ports of a device.
diff --git a/include/net/netfilter/nf_conntrack_expect.h b/include/net/netfilter/nf_conntrack_expect.h
index ab17a159ac66..a9652806d0df 100644
--- a/include/net/netfilter/nf_conntrack_expect.h
+++ b/include/net/netfilter/nf_conntrack_expect.h
@@ -99,9 +99,12 @@ void nf_ct_expect_init(struct nf_conntrack_expect *, unsigned int, u_int8_t,
99 const union nf_inet_addr *, 99 const union nf_inet_addr *,
100 u_int8_t, const __be16 *, const __be16 *); 100 u_int8_t, const __be16 *, const __be16 *);
101void nf_ct_expect_put(struct nf_conntrack_expect *exp); 101void nf_ct_expect_put(struct nf_conntrack_expect *exp);
102int nf_ct_expect_related(struct nf_conntrack_expect *expect);
103int nf_ct_expect_related_report(struct nf_conntrack_expect *expect, 102int nf_ct_expect_related_report(struct nf_conntrack_expect *expect,
104 u32 pid, int report); 103 u32 pid, int report);
104static inline int nf_ct_expect_related(struct nf_conntrack_expect *expect)
105{
106 return nf_ct_expect_related_report(expect, 0, 0);
107}
105 108
106#endif /*_NF_CONNTRACK_EXPECT_H*/ 109#endif /*_NF_CONNTRACK_EXPECT_H*/
107 110
diff --git a/include/net/netfilter/nf_nat.h b/include/net/netfilter/nf_nat.h
index 9dc1039ff78b..8df0b7f7fc6e 100644
--- a/include/net/netfilter/nf_nat.h
+++ b/include/net/netfilter/nf_nat.h
@@ -18,6 +18,7 @@ enum nf_nat_manip_type
18#define IP_NAT_RANGE_MAP_IPS 1 18#define IP_NAT_RANGE_MAP_IPS 1
19#define IP_NAT_RANGE_PROTO_SPECIFIED 2 19#define IP_NAT_RANGE_PROTO_SPECIFIED 2
20#define IP_NAT_RANGE_PROTO_RANDOM 4 20#define IP_NAT_RANGE_PROTO_RANDOM 4
21#define IP_NAT_RANGE_PERSISTENT 8
21 22
22/* NAT sequence number modifications */ 23/* NAT sequence number modifications */
23struct nf_nat_seq { 24struct nf_nat_seq {
diff --git a/include/net/udp.h b/include/net/udp.h
index 93dbe294d459..90e6ce56be65 100644
--- a/include/net/udp.h
+++ b/include/net/udp.h
@@ -124,8 +124,6 @@ static inline void udp_lib_close(struct sock *sk, long timeout)
124 sk_common_release(sk); 124 sk_common_release(sk);
125} 125}
126 126
127extern int ipv4_rcv_saddr_equal(const struct sock *sk1,
128 const struct sock *sk2);
129extern int udp_lib_get_port(struct sock *sk, unsigned short snum, 127extern int udp_lib_get_port(struct sock *sk, unsigned short snum,
130 int (*)(const struct sock*,const struct sock*)); 128 int (*)(const struct sock*,const struct sock*));
131 129
diff --git a/include/scsi/scsi_scan.h b/include/scsi/scsi_scan.h
new file mode 100644
index 000000000000..78898889243d
--- /dev/null
+++ b/include/scsi/scsi_scan.h
@@ -0,0 +1,11 @@
1#ifndef _SCSI_SCSI_SCAN_H
2#define _SCSI_SCSI_SCAN_H
3
4#ifdef CONFIG_SCSI
5/* drivers/scsi/scsi_scan.c */
6extern int scsi_complete_async_scans(void);
7#else
8static inline int scsi_complete_async_scans(void) { return 0; }
9#endif
10
11#endif /* _SCSI_SCSI_SCAN_H */
diff --git a/include/sound/jack.h b/include/sound/jack.h
index 6b013c6f6a04..f236e426a706 100644
--- a/include/sound/jack.h
+++ b/include/sound/jack.h
@@ -50,6 +50,8 @@ struct snd_jack {
50 int type; 50 int type;
51 const char *id; 51 const char *id;
52 char name[100]; 52 char name[100];
53 void *private_data;
54 void (*private_free)(struct snd_jack *);
53}; 55};
54 56
55#ifdef CONFIG_SND_JACK 57#ifdef CONFIG_SND_JACK
diff --git a/include/sound/pcm.h b/include/sound/pcm.h
index 8904b1900d7f..c17296891617 100644
--- a/include/sound/pcm.h
+++ b/include/sound/pcm.h
@@ -268,7 +268,8 @@ struct snd_pcm_runtime {
268 int overrange; 268 int overrange;
269 snd_pcm_uframes_t avail_max; 269 snd_pcm_uframes_t avail_max;
270 snd_pcm_uframes_t hw_ptr_base; /* Position at buffer restart */ 270 snd_pcm_uframes_t hw_ptr_base; /* Position at buffer restart */
271 snd_pcm_uframes_t hw_ptr_interrupt; /* Position at interrupt time*/ 271 snd_pcm_uframes_t hw_ptr_interrupt; /* Position at interrupt time */
272 unsigned long hw_ptr_jiffies; /* Time when hw_ptr is updated */
272 273
273 /* -- HW params -- */ 274 /* -- HW params -- */
274 snd_pcm_access_t access; /* access mode */ 275 snd_pcm_access_t access; /* access mode */
diff --git a/include/sound/pxa2xx-lib.h b/include/sound/pxa2xx-lib.h
index 2c894b600e5b..2fd3d251d9a5 100644
--- a/include/sound/pxa2xx-lib.h
+++ b/include/sound/pxa2xx-lib.h
@@ -42,19 +42,4 @@ extern int pxa2xx_ac97_hw_resume(void);
42extern int pxa2xx_ac97_hw_probe(struct platform_device *dev); 42extern int pxa2xx_ac97_hw_probe(struct platform_device *dev);
43extern void pxa2xx_ac97_hw_remove(struct platform_device *dev); 43extern void pxa2xx_ac97_hw_remove(struct platform_device *dev);
44 44
45/* AC97 platform_data */
46/**
47 * struct pxa2xx_ac97_platform_data - pxa ac97 platform data
48 * @reset_gpio: AC97 reset gpio (normally gpio113 or gpio95)
49 * a -1 value means no gpio will be used for reset
50 *
51 * Platform data should only be specified for pxa27x CPUs where a silicon bug
52 * prevents correct operation of the reset line. If not specified, the default
53 * behaviour is to consider gpio 113 as the AC97 reset line, which is the
54 * default on most boards.
55 */
56struct pxa2xx_ac97_platform_data {
57 int reset_gpio;
58};
59
60#endif 45#endif
diff --git a/include/trace/syscall.h b/include/trace/syscall.h
new file mode 100644
index 000000000000..8cfe515cbc47
--- /dev/null
+++ b/include/trace/syscall.h
@@ -0,0 +1,35 @@
1#ifndef _TRACE_SYSCALL_H
2#define _TRACE_SYSCALL_H
3
4#include <asm/ptrace.h>
5
6/*
7 * A syscall entry in the ftrace syscalls array.
8 *
9 * @name: name of the syscall
10 * @nb_args: number of parameters it takes
11 * @types: list of types as strings
12 * @args: list of args as strings (args[i] matches types[i])
13 */
14struct syscall_metadata {
15 const char *name;
16 int nb_args;
17 const char **types;
18 const char **args;
19};
20
21#ifdef CONFIG_FTRACE_SYSCALLS
22extern void arch_init_ftrace_syscalls(void);
23extern struct syscall_metadata *syscall_nr_to_meta(int nr);
24extern void start_ftrace_syscalls(void);
25extern void stop_ftrace_syscalls(void);
26extern void ftrace_syscall_enter(struct pt_regs *regs);
27extern void ftrace_syscall_exit(struct pt_regs *regs);
28#else
29static inline void start_ftrace_syscalls(void) { }
30static inline void stop_ftrace_syscalls(void) { }
31static inline void ftrace_syscall_enter(struct pt_regs *regs) { }
32static inline void ftrace_syscall_exit(struct pt_regs *regs) { }
33#endif
34
35#endif /* _TRACE_SYSCALL_H */
diff --git a/include/video/cyblafb.h b/include/video/cyblafb.h
deleted file mode 100644
index d3c1d4e2c8e3..000000000000
--- a/include/video/cyblafb.h
+++ /dev/null
@@ -1,175 +0,0 @@
1
2#ifndef CYBLAFB_DEBUG
3#define CYBLAFB_DEBUG 0
4#endif
5
6#if CYBLAFB_DEBUG
7#define debug(f,a...) printk("%s:" f, __func__ , ## a);
8#else
9#define debug(f,a...)
10#endif
11
12#define output(f, a...) printk("cyblafb: " f, ## a)
13
14#define Kb (1024)
15#define Mb (Kb*Kb)
16
17/* PCI IDS of supported cards temporarily here */
18
19#define CYBERBLADEi1 0x8500
20
21/* these defines are for 'lcd' variable */
22#define LCD_STRETCH 0
23#define LCD_CENTER 1
24#define LCD_BIOS 2
25
26/* display types */
27#define DISPLAY_CRT 0
28#define DISPLAY_FP 1
29
30#define ROP_S 0xCC
31
32#define point(x,y) ((y)<<16|(x))
33
34//
35// Attribute Regs, ARxx, 3c0/3c1
36//
37#define AR00 0x00
38#define AR01 0x01
39#define AR02 0x02
40#define AR03 0x03
41#define AR04 0x04
42#define AR05 0x05
43#define AR06 0x06
44#define AR07 0x07
45#define AR08 0x08
46#define AR09 0x09
47#define AR0A 0x0A
48#define AR0B 0x0B
49#define AR0C 0x0C
50#define AR0D 0x0D
51#define AR0E 0x0E
52#define AR0F 0x0F
53#define AR10 0x10
54#define AR12 0x12
55#define AR13 0x13
56
57//
58// Sequencer Regs, SRxx, 3c4/3c5
59//
60#define SR00 0x00
61#define SR01 0x01
62#define SR02 0x02
63#define SR03 0x03
64#define SR04 0x04
65#define SR0D 0x0D
66#define SR0E 0x0E
67#define SR11 0x11
68#define SR18 0x18
69#define SR19 0x19
70
71//
72//
73//
74#define CR00 0x00
75#define CR01 0x01
76#define CR02 0x02
77#define CR03 0x03
78#define CR04 0x04
79#define CR05 0x05
80#define CR06 0x06
81#define CR07 0x07
82#define CR08 0x08
83#define CR09 0x09
84#define CR0A 0x0A
85#define CR0B 0x0B
86#define CR0C 0x0C
87#define CR0D 0x0D
88#define CR0E 0x0E
89#define CR0F 0x0F
90#define CR10 0x10
91#define CR11 0x11
92#define CR12 0x12
93#define CR13 0x13
94#define CR14 0x14
95#define CR15 0x15
96#define CR16 0x16
97#define CR17 0x17
98#define CR18 0x18
99#define CR19 0x19
100#define CR1A 0x1A
101#define CR1B 0x1B
102#define CR1C 0x1C
103#define CR1D 0x1D
104#define CR1E 0x1E
105#define CR1F 0x1F
106#define CR20 0x20
107#define CR21 0x21
108#define CR27 0x27
109#define CR29 0x29
110#define CR2A 0x2A
111#define CR2B 0x2B
112#define CR2D 0x2D
113#define CR2F 0x2F
114#define CR36 0x36
115#define CR38 0x38
116#define CR39 0x39
117#define CR3A 0x3A
118#define CR55 0x55
119#define CR56 0x56
120#define CR57 0x57
121#define CR58 0x58
122
123//
124//
125//
126
127#define GR00 0x01
128#define GR01 0x01
129#define GR02 0x02
130#define GR03 0x03
131#define GR04 0x04
132#define GR05 0x05
133#define GR06 0x06
134#define GR07 0x07
135#define GR08 0x08
136#define GR0F 0x0F
137#define GR20 0x20
138#define GR23 0x23
139#define GR2F 0x2F
140#define GR30 0x30
141#define GR31 0x31
142#define GR33 0x33
143#define GR52 0x52
144#define GR53 0x53
145#define GR5D 0x5d
146
147
148//
149// Graphics Engine
150//
151#define GEBase 0x2100 // could be mapped elsewhere if we like it
152#define GE00 (GEBase+0x00) // source 1, p 111
153#define GE04 (GEBase+0x04) // source 2, p 111
154#define GE08 (GEBase+0x08) // destination 1, p 111
155#define GE0C (GEBase+0x0C) // destination 2, p 112
156#define GE10 (GEBase+0x10) // right view base & enable, p 112
157#define GE13 (GEBase+0x13) // left view base & enable, p 112
158#define GE18 (GEBase+0x18) // block write start address, p 112
159#define GE1C (GEBase+0x1C) // block write end address, p 112
160#define GE20 (GEBase+0x20) // engine status, p 113
161#define GE24 (GEBase+0x24) // reset all GE pointers
162#define GE44 (GEBase+0x44) // command register, p 126
163#define GE48 (GEBase+0x48) // raster operation, p 127
164#define GE60 (GEBase+0x60) // foreground color, p 128
165#define GE64 (GEBase+0x64) // background color, p 128
166#define GE6C (GEBase+0x6C) // Pattern and Style, p 129, ok
167#define GE9C (GEBase+0x9C) // pixel engine data port, p 125
168#define GEB8 (GEBase+0xB8) // Destination Stride / Buffer Base 0, p 133
169#define GEBC (GEBase+0xBC) // Destination Stride / Buffer Base 1, p 133
170#define GEC0 (GEBase+0xC0) // Destination Stride / Buffer Base 2, p 133
171#define GEC4 (GEBase+0xC4) // Destination Stride / Buffer Base 3, p 133
172#define GEC8 (GEBase+0xC8) // Source Stride / Buffer Base 0, p 133
173#define GECC (GEBase+0xCC) // Source Stride / Buffer Base 1, p 133
174#define GED0 (GEBase+0xD0) // Source Stride / Buffer Base 2, p 133
175#define GED4 (GEBase+0xD4) // Source Stride / Buffer Base 3, p 133