diff options
author | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-07-21 23:38:51 -0400 |
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committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-07-21 23:38:51 -0400 |
commit | 6df8cd3d4f921762504c4d1e7ed702b745702543 (patch) | |
tree | b671af9557db240bbc880ddbaebea471338fa7a0 /include | |
parent | 08f1c192c3c32797068bfe97738babb3295bbf42 (diff) | |
parent | 3167d93fc0cb81541dea551dc14411ed211eb9e0 (diff) |
Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6
* 'master' of master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6:
[SPARC64]: ERROR: "sys_ioctl" [arch/sparc64/solaris/solaris.ko] undefined!
[SPARC32]: Make PAGE_SHARED a read-mostly variable.
[SPARC32]: Take enable_irq/disable_irq out of line.
[SPARC32]: clean include/asm-sparc/irq.h
[SPARC32]: Fix rounding errors in ndelay/udelay implementation.
Diffstat (limited to 'include')
-rw-r--r-- | include/asm-sparc/irq.h | 168 | ||||
-rw-r--r-- | include/asm-sparc/pgtable.h | 3 |
2 files changed, 4 insertions, 167 deletions
diff --git a/include/asm-sparc/irq.h b/include/asm-sparc/irq.h index ff520ea97473..afb88a5973f0 100644 --- a/include/asm-sparc/irq.h +++ b/include/asm-sparc/irq.h | |||
@@ -7,178 +7,16 @@ | |||
7 | #ifndef _SPARC_IRQ_H | 7 | #ifndef _SPARC_IRQ_H |
8 | #define _SPARC_IRQ_H | 8 | #define _SPARC_IRQ_H |
9 | 9 | ||
10 | #include <linux/linkage.h> | ||
11 | #include <linux/threads.h> /* For NR_CPUS */ | ||
12 | #include <linux/interrupt.h> | 10 | #include <linux/interrupt.h> |
13 | 11 | ||
14 | #include <asm/system.h> /* For SUN4M_NCPUS */ | ||
15 | #include <asm/btfixup.h> | ||
16 | |||
17 | #define __irq_ino(irq) irq | ||
18 | #define __irq_pil(irq) irq | ||
19 | |||
20 | #define NR_IRQS 16 | 12 | #define NR_IRQS 16 |
21 | 13 | ||
22 | #define irq_canonicalize(irq) (irq) | 14 | #define irq_canonicalize(irq) (irq) |
23 | 15 | ||
24 | /* Dave Redman (djhr@tadpole.co.uk) | 16 | extern void disable_irq_nosync(unsigned int irq); |
25 | * changed these to function pointers.. it saves cycles and will allow | 17 | extern void disable_irq(unsigned int irq); |
26 | * the irq dependencies to be split into different files at a later date | 18 | extern void enable_irq(unsigned int irq); |
27 | * sun4c_irq.c, sun4m_irq.c etc so we could reduce the kernel size. | ||
28 | * Jakub Jelinek (jj@sunsite.mff.cuni.cz) | ||
29 | * Changed these to btfixup entities... It saves cycles :) | ||
30 | */ | ||
31 | BTFIXUPDEF_CALL(void, disable_irq, unsigned int) | ||
32 | BTFIXUPDEF_CALL(void, enable_irq, unsigned int) | ||
33 | BTFIXUPDEF_CALL(void, disable_pil_irq, unsigned int) | ||
34 | BTFIXUPDEF_CALL(void, enable_pil_irq, unsigned int) | ||
35 | BTFIXUPDEF_CALL(void, clear_clock_irq, void) | ||
36 | BTFIXUPDEF_CALL(void, clear_profile_irq, int) | ||
37 | BTFIXUPDEF_CALL(void, load_profile_irq, int, unsigned int) | ||
38 | |||
39 | static inline void disable_irq_nosync(unsigned int irq) | ||
40 | { | ||
41 | BTFIXUP_CALL(disable_irq)(irq); | ||
42 | } | ||
43 | |||
44 | static inline void disable_irq(unsigned int irq) | ||
45 | { | ||
46 | BTFIXUP_CALL(disable_irq)(irq); | ||
47 | } | ||
48 | |||
49 | static inline void enable_irq(unsigned int irq) | ||
50 | { | ||
51 | BTFIXUP_CALL(enable_irq)(irq); | ||
52 | } | ||
53 | |||
54 | static inline void disable_pil_irq(unsigned int irq) | ||
55 | { | ||
56 | BTFIXUP_CALL(disable_pil_irq)(irq); | ||
57 | } | ||
58 | |||
59 | static inline void enable_pil_irq(unsigned int irq) | ||
60 | { | ||
61 | BTFIXUP_CALL(enable_pil_irq)(irq); | ||
62 | } | ||
63 | |||
64 | static inline void clear_clock_irq(void) | ||
65 | { | ||
66 | BTFIXUP_CALL(clear_clock_irq)(); | ||
67 | } | ||
68 | |||
69 | static inline void clear_profile_irq(int irq) | ||
70 | { | ||
71 | BTFIXUP_CALL(clear_profile_irq)(irq); | ||
72 | } | ||
73 | |||
74 | static inline void load_profile_irq(int cpu, int limit) | ||
75 | { | ||
76 | BTFIXUP_CALL(load_profile_irq)(cpu, limit); | ||
77 | } | ||
78 | |||
79 | extern void (*sparc_init_timers)(irq_handler_t lvl10_irq); | ||
80 | extern void claim_ticker14(irq_handler_t irq_handler, | ||
81 | int irq, | ||
82 | unsigned int timeout); | ||
83 | |||
84 | #ifdef CONFIG_SMP | ||
85 | BTFIXUPDEF_CALL(void, set_cpu_int, int, int) | ||
86 | BTFIXUPDEF_CALL(void, clear_cpu_int, int, int) | ||
87 | BTFIXUPDEF_CALL(void, set_irq_udt, int) | ||
88 | |||
89 | #define set_cpu_int(cpu,level) BTFIXUP_CALL(set_cpu_int)(cpu,level) | ||
90 | #define clear_cpu_int(cpu,level) BTFIXUP_CALL(clear_cpu_int)(cpu,level) | ||
91 | #define set_irq_udt(cpu) BTFIXUP_CALL(set_irq_udt)(cpu) | ||
92 | #endif | ||
93 | 19 | ||
94 | extern int request_fast_irq(unsigned int irq, irq_handler_t handler, unsigned long flags, __const__ char *devname); | 20 | extern int request_fast_irq(unsigned int irq, irq_handler_t handler, unsigned long flags, __const__ char *devname); |
95 | 21 | ||
96 | /* On the sun4m, just like the timers, we have both per-cpu and master | ||
97 | * interrupt registers. | ||
98 | */ | ||
99 | |||
100 | /* These registers are used for sending/receiving irqs from/to | ||
101 | * different cpu's. | ||
102 | */ | ||
103 | struct sun4m_intreg_percpu { | ||
104 | unsigned int tbt; /* Interrupts still pending for this cpu. */ | ||
105 | |||
106 | /* These next two registers are WRITE-ONLY and are only | ||
107 | * "on bit" sensitive, "off bits" written have NO affect. | ||
108 | */ | ||
109 | unsigned int clear; /* Clear this cpus irqs here. */ | ||
110 | unsigned int set; /* Set this cpus irqs here. */ | ||
111 | unsigned char space[PAGE_SIZE - 12]; | ||
112 | }; | ||
113 | |||
114 | /* | ||
115 | * djhr | ||
116 | * Actually the clear and set fields in this struct are misleading.. | ||
117 | * according to the SLAVIO manual (and the same applies for the SEC) | ||
118 | * the clear field clears bits in the mask which will ENABLE that IRQ | ||
119 | * the set field sets bits in the mask to DISABLE the IRQ. | ||
120 | * | ||
121 | * Also the undirected_xx address in the SLAVIO is defined as | ||
122 | * RESERVED and write only.. | ||
123 | * | ||
124 | * DAVEM_NOTE: The SLAVIO only specifies behavior on uniprocessor | ||
125 | * sun4m machines, for MP the layout makes more sense. | ||
126 | */ | ||
127 | struct sun4m_intregs { | ||
128 | struct sun4m_intreg_percpu cpu_intregs[SUN4M_NCPUS]; | ||
129 | unsigned int tbt; /* IRQ's that are still pending. */ | ||
130 | unsigned int irqs; /* Master IRQ bits. */ | ||
131 | |||
132 | /* Again, like the above, two these registers are WRITE-ONLY. */ | ||
133 | unsigned int clear; /* Clear master IRQ's by setting bits here. */ | ||
134 | unsigned int set; /* Set master IRQ's by setting bits here. */ | ||
135 | |||
136 | /* This register is both READ and WRITE. */ | ||
137 | unsigned int undirected_target; /* Which cpu gets undirected irqs. */ | ||
138 | }; | ||
139 | |||
140 | extern struct sun4m_intregs *sun4m_interrupts; | ||
141 | |||
142 | /* | ||
143 | * Bit field defines for the interrupt registers on various | ||
144 | * Sparc machines. | ||
145 | */ | ||
146 | |||
147 | /* The sun4c interrupt register. */ | ||
148 | #define SUN4C_INT_ENABLE 0x01 /* Allow interrupts. */ | ||
149 | #define SUN4C_INT_E14 0x80 /* Enable level 14 IRQ. */ | ||
150 | #define SUN4C_INT_E10 0x20 /* Enable level 10 IRQ. */ | ||
151 | #define SUN4C_INT_E8 0x10 /* Enable level 8 IRQ. */ | ||
152 | #define SUN4C_INT_E6 0x08 /* Enable level 6 IRQ. */ | ||
153 | #define SUN4C_INT_E4 0x04 /* Enable level 4 IRQ. */ | ||
154 | #define SUN4C_INT_E1 0x02 /* Enable level 1 IRQ. */ | ||
155 | |||
156 | /* Dave Redman (djhr@tadpole.co.uk) | ||
157 | * The sun4m interrupt registers. | ||
158 | */ | ||
159 | #define SUN4M_INT_ENABLE 0x80000000 | ||
160 | #define SUN4M_INT_E14 0x00000080 | ||
161 | #define SUN4M_INT_E10 0x00080000 | ||
162 | |||
163 | #define SUN4M_HARD_INT(x) (0x000000001 << (x)) | ||
164 | #define SUN4M_SOFT_INT(x) (0x000010000 << (x)) | ||
165 | |||
166 | #define SUN4M_INT_MASKALL 0x80000000 /* mask all interrupts */ | ||
167 | #define SUN4M_INT_MODULE_ERR 0x40000000 /* module error */ | ||
168 | #define SUN4M_INT_M2S_WRITE 0x20000000 /* write buffer error */ | ||
169 | #define SUN4M_INT_ECC 0x10000000 /* ecc memory error */ | ||
170 | #define SUN4M_INT_FLOPPY 0x00400000 /* floppy disk */ | ||
171 | #define SUN4M_INT_MODULE 0x00200000 /* module interrupt */ | ||
172 | #define SUN4M_INT_VIDEO 0x00100000 /* onboard video */ | ||
173 | #define SUN4M_INT_REALTIME 0x00080000 /* system timer */ | ||
174 | #define SUN4M_INT_SCSI 0x00040000 /* onboard scsi */ | ||
175 | #define SUN4M_INT_AUDIO 0x00020000 /* audio/isdn */ | ||
176 | #define SUN4M_INT_ETHERNET 0x00010000 /* onboard ethernet */ | ||
177 | #define SUN4M_INT_SERIAL 0x00008000 /* serial ports */ | ||
178 | #define SUN4M_INT_KBDMS 0x00004000 /* keyboard/mouse */ | ||
179 | #define SUN4M_INT_SBUSBITS 0x00003F80 /* sbus int bits */ | ||
180 | |||
181 | #define SUN4M_INT_SBUS(x) (1 << (x+7)) | ||
182 | #define SUN4M_INT_VME(x) (1 << (x)) | ||
183 | |||
184 | #endif | 22 | #endif |
diff --git a/include/asm-sparc/pgtable.h b/include/asm-sparc/pgtable.h index a55f4c3488b0..2cc235b74d94 100644 --- a/include/asm-sparc/pgtable.h +++ b/include/asm-sparc/pgtable.h | |||
@@ -46,7 +46,6 @@ BTFIXUPDEF_SIMM13(user_ptrs_per_pgd) | |||
46 | #define pgd_ERROR(e) __builtin_trap() | 46 | #define pgd_ERROR(e) __builtin_trap() |
47 | 47 | ||
48 | BTFIXUPDEF_INT(page_none) | 48 | BTFIXUPDEF_INT(page_none) |
49 | BTFIXUPDEF_INT(page_shared) | ||
50 | BTFIXUPDEF_INT(page_copy) | 49 | BTFIXUPDEF_INT(page_copy) |
51 | BTFIXUPDEF_INT(page_readonly) | 50 | BTFIXUPDEF_INT(page_readonly) |
52 | BTFIXUPDEF_INT(page_kernel) | 51 | BTFIXUPDEF_INT(page_kernel) |
@@ -66,7 +65,7 @@ BTFIXUPDEF_INT(page_kernel) | |||
66 | #define PTE_SIZE (PTRS_PER_PTE*4) | 65 | #define PTE_SIZE (PTRS_PER_PTE*4) |
67 | 66 | ||
68 | #define PAGE_NONE __pgprot(BTFIXUP_INT(page_none)) | 67 | #define PAGE_NONE __pgprot(BTFIXUP_INT(page_none)) |
69 | #define PAGE_SHARED __pgprot(BTFIXUP_INT(page_shared)) | 68 | extern pgprot_t PAGE_SHARED; |
70 | #define PAGE_COPY __pgprot(BTFIXUP_INT(page_copy)) | 69 | #define PAGE_COPY __pgprot(BTFIXUP_INT(page_copy)) |
71 | #define PAGE_READONLY __pgprot(BTFIXUP_INT(page_readonly)) | 70 | #define PAGE_READONLY __pgprot(BTFIXUP_INT(page_readonly)) |
72 | 71 | ||