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authorDan Williams <dan.j.williams@intel.com>2008-02-02 21:49:58 -0500
committerDan Williams <dan.j.williams@intel.com>2008-02-06 12:12:18 -0500
commitd4c56f97ff21df405d0cebe11f49e3c3c79662b5 (patch)
treee6b0de433d7c985982ac12815998242a786d87b2 /include
parent0036731c88fdb5bf4f04a796a30b5e445fc57f54 (diff)
async_tx: replace 'int_en' with operation preparation flags
Pass a full set of flags to drivers' per-operation 'prep' routines. Currently the only flag passed is DMA_PREP_INTERRUPT. The expectation is that arch-specific async_tx_find_channel() implementations can exploit this capability to find the best channel for an operation. Signed-off-by: Dan Williams <dan.j.williams@intel.com> Acked-by: Shannon Nelson <shannon.nelson@intel.com> Reviewed-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Diffstat (limited to 'include')
-rw-r--r--include/asm-arm/arch-iop13xx/adma.h18
-rw-r--r--include/asm-arm/hardware/iop3xx-adma.h30
-rw-r--r--include/linux/dmaengine.h17
3 files changed, 40 insertions, 25 deletions
diff --git a/include/asm-arm/arch-iop13xx/adma.h b/include/asm-arm/arch-iop13xx/adma.h
index 04006c1c5fd7..efd9a5eb1008 100644
--- a/include/asm-arm/arch-iop13xx/adma.h
+++ b/include/asm-arm/arch-iop13xx/adma.h
@@ -247,7 +247,7 @@ static inline u32 iop_desc_get_src_count(struct iop_adma_desc_slot *desc,
247} 247}
248 248
249static inline void 249static inline void
250iop_desc_init_memcpy(struct iop_adma_desc_slot *desc, int int_en) 250iop_desc_init_memcpy(struct iop_adma_desc_slot *desc, unsigned long flags)
251{ 251{
252 struct iop13xx_adma_desc_hw *hw_desc = desc->hw_desc; 252 struct iop13xx_adma_desc_hw *hw_desc = desc->hw_desc;
253 union { 253 union {
@@ -257,13 +257,13 @@ iop_desc_init_memcpy(struct iop_adma_desc_slot *desc, int int_en)
257 257
258 u_desc_ctrl.value = 0; 258 u_desc_ctrl.value = 0;
259 u_desc_ctrl.field.xfer_dir = 3; /* local to internal bus */ 259 u_desc_ctrl.field.xfer_dir = 3; /* local to internal bus */
260 u_desc_ctrl.field.int_en = int_en; 260 u_desc_ctrl.field.int_en = flags & DMA_PREP_INTERRUPT;
261 hw_desc->desc_ctrl = u_desc_ctrl.value; 261 hw_desc->desc_ctrl = u_desc_ctrl.value;
262 hw_desc->crc_addr = 0; 262 hw_desc->crc_addr = 0;
263} 263}
264 264
265static inline void 265static inline void
266iop_desc_init_memset(struct iop_adma_desc_slot *desc, int int_en) 266iop_desc_init_memset(struct iop_adma_desc_slot *desc, unsigned long flags)
267{ 267{
268 struct iop13xx_adma_desc_hw *hw_desc = desc->hw_desc; 268 struct iop13xx_adma_desc_hw *hw_desc = desc->hw_desc;
269 union { 269 union {
@@ -274,14 +274,15 @@ iop_desc_init_memset(struct iop_adma_desc_slot *desc, int int_en)
274 u_desc_ctrl.value = 0; 274 u_desc_ctrl.value = 0;
275 u_desc_ctrl.field.xfer_dir = 3; /* local to internal bus */ 275 u_desc_ctrl.field.xfer_dir = 3; /* local to internal bus */
276 u_desc_ctrl.field.block_fill_en = 1; 276 u_desc_ctrl.field.block_fill_en = 1;
277 u_desc_ctrl.field.int_en = int_en; 277 u_desc_ctrl.field.int_en = flags & DMA_PREP_INTERRUPT;
278 hw_desc->desc_ctrl = u_desc_ctrl.value; 278 hw_desc->desc_ctrl = u_desc_ctrl.value;
279 hw_desc->crc_addr = 0; 279 hw_desc->crc_addr = 0;
280} 280}
281 281
282/* to do: support buffers larger than ADMA_MAX_BYTE_COUNT */ 282/* to do: support buffers larger than ADMA_MAX_BYTE_COUNT */
283static inline void 283static inline void
284iop_desc_init_xor(struct iop_adma_desc_slot *desc, int src_cnt, int int_en) 284iop_desc_init_xor(struct iop_adma_desc_slot *desc, int src_cnt,
285 unsigned long flags)
285{ 286{
286 struct iop13xx_adma_desc_hw *hw_desc = desc->hw_desc; 287 struct iop13xx_adma_desc_hw *hw_desc = desc->hw_desc;
287 union { 288 union {
@@ -292,7 +293,7 @@ iop_desc_init_xor(struct iop_adma_desc_slot *desc, int src_cnt, int int_en)
292 u_desc_ctrl.value = 0; 293 u_desc_ctrl.value = 0;
293 u_desc_ctrl.field.src_select = src_cnt - 1; 294 u_desc_ctrl.field.src_select = src_cnt - 1;
294 u_desc_ctrl.field.xfer_dir = 3; /* local to internal bus */ 295 u_desc_ctrl.field.xfer_dir = 3; /* local to internal bus */
295 u_desc_ctrl.field.int_en = int_en; 296 u_desc_ctrl.field.int_en = flags & DMA_PREP_INTERRUPT;
296 hw_desc->desc_ctrl = u_desc_ctrl.value; 297 hw_desc->desc_ctrl = u_desc_ctrl.value;
297 hw_desc->crc_addr = 0; 298 hw_desc->crc_addr = 0;
298 299
@@ -301,7 +302,8 @@ iop_desc_init_xor(struct iop_adma_desc_slot *desc, int src_cnt, int int_en)
301 302
302/* to do: support buffers larger than ADMA_MAX_BYTE_COUNT */ 303/* to do: support buffers larger than ADMA_MAX_BYTE_COUNT */
303static inline int 304static inline int
304iop_desc_init_zero_sum(struct iop_adma_desc_slot *desc, int src_cnt, int int_en) 305iop_desc_init_zero_sum(struct iop_adma_desc_slot *desc, int src_cnt,
306 unsigned long flags)
305{ 307{
306 struct iop13xx_adma_desc_hw *hw_desc = desc->hw_desc; 308 struct iop13xx_adma_desc_hw *hw_desc = desc->hw_desc;
307 union { 309 union {
@@ -314,7 +316,7 @@ iop_desc_init_zero_sum(struct iop_adma_desc_slot *desc, int src_cnt, int int_en)
314 u_desc_ctrl.field.xfer_dir = 3; /* local to internal bus */ 316 u_desc_ctrl.field.xfer_dir = 3; /* local to internal bus */
315 u_desc_ctrl.field.zero_result = 1; 317 u_desc_ctrl.field.zero_result = 1;
316 u_desc_ctrl.field.status_write_back_en = 1; 318 u_desc_ctrl.field.status_write_back_en = 1;
317 u_desc_ctrl.field.int_en = int_en; 319 u_desc_ctrl.field.int_en = flags & DMA_PREP_INTERRUPT;
318 hw_desc->desc_ctrl = u_desc_ctrl.value; 320 hw_desc->desc_ctrl = u_desc_ctrl.value;
319 hw_desc->crc_addr = 0; 321 hw_desc->crc_addr = 0;
320 322
diff --git a/include/asm-arm/hardware/iop3xx-adma.h b/include/asm-arm/hardware/iop3xx-adma.h
index 10834b54f681..5c529e6a5e3b 100644
--- a/include/asm-arm/hardware/iop3xx-adma.h
+++ b/include/asm-arm/hardware/iop3xx-adma.h
@@ -414,7 +414,7 @@ static inline void iop3xx_aau_desc_set_src_addr(struct iop3xx_desc_aau *hw_desc,
414} 414}
415 415
416static inline void 416static inline void
417iop_desc_init_memcpy(struct iop_adma_desc_slot *desc, int int_en) 417iop_desc_init_memcpy(struct iop_adma_desc_slot *desc, unsigned long flags)
418{ 418{
419 struct iop3xx_desc_dma *hw_desc = desc->hw_desc; 419 struct iop3xx_desc_dma *hw_desc = desc->hw_desc;
420 union { 420 union {
@@ -425,14 +425,14 @@ iop_desc_init_memcpy(struct iop_adma_desc_slot *desc, int int_en)
425 u_desc_ctrl.value = 0; 425 u_desc_ctrl.value = 0;
426 u_desc_ctrl.field.mem_to_mem_en = 1; 426 u_desc_ctrl.field.mem_to_mem_en = 1;
427 u_desc_ctrl.field.pci_transaction = 0xe; /* memory read block */ 427 u_desc_ctrl.field.pci_transaction = 0xe; /* memory read block */
428 u_desc_ctrl.field.int_en = int_en; 428 u_desc_ctrl.field.int_en = flags & DMA_PREP_INTERRUPT;
429 hw_desc->desc_ctrl = u_desc_ctrl.value; 429 hw_desc->desc_ctrl = u_desc_ctrl.value;
430 hw_desc->upper_pci_src_addr = 0; 430 hw_desc->upper_pci_src_addr = 0;
431 hw_desc->crc_addr = 0; 431 hw_desc->crc_addr = 0;
432} 432}
433 433
434static inline void 434static inline void
435iop_desc_init_memset(struct iop_adma_desc_slot *desc, int int_en) 435iop_desc_init_memset(struct iop_adma_desc_slot *desc, unsigned long flags)
436{ 436{
437 struct iop3xx_desc_aau *hw_desc = desc->hw_desc; 437 struct iop3xx_desc_aau *hw_desc = desc->hw_desc;
438 union { 438 union {
@@ -443,12 +443,13 @@ iop_desc_init_memset(struct iop_adma_desc_slot *desc, int int_en)
443 u_desc_ctrl.value = 0; 443 u_desc_ctrl.value = 0;
444 u_desc_ctrl.field.blk1_cmd_ctrl = 0x2; /* memory block fill */ 444 u_desc_ctrl.field.blk1_cmd_ctrl = 0x2; /* memory block fill */
445 u_desc_ctrl.field.dest_write_en = 1; 445 u_desc_ctrl.field.dest_write_en = 1;
446 u_desc_ctrl.field.int_en = int_en; 446 u_desc_ctrl.field.int_en = flags & DMA_PREP_INTERRUPT;
447 hw_desc->desc_ctrl = u_desc_ctrl.value; 447 hw_desc->desc_ctrl = u_desc_ctrl.value;
448} 448}
449 449
450static inline u32 450static inline u32
451iop3xx_desc_init_xor(struct iop3xx_desc_aau *hw_desc, int src_cnt, int int_en) 451iop3xx_desc_init_xor(struct iop3xx_desc_aau *hw_desc, int src_cnt,
452 unsigned long flags)
452{ 453{
453 int i, shift; 454 int i, shift;
454 u32 edcr; 455 u32 edcr;
@@ -509,21 +510,23 @@ iop3xx_desc_init_xor(struct iop3xx_desc_aau *hw_desc, int src_cnt, int int_en)
509 510
510 u_desc_ctrl.field.dest_write_en = 1; 511 u_desc_ctrl.field.dest_write_en = 1;
511 u_desc_ctrl.field.blk1_cmd_ctrl = 0x7; /* direct fill */ 512 u_desc_ctrl.field.blk1_cmd_ctrl = 0x7; /* direct fill */
512 u_desc_ctrl.field.int_en = int_en; 513 u_desc_ctrl.field.int_en = flags & DMA_PREP_INTERRUPT;
513 hw_desc->desc_ctrl = u_desc_ctrl.value; 514 hw_desc->desc_ctrl = u_desc_ctrl.value;
514 515
515 return u_desc_ctrl.value; 516 return u_desc_ctrl.value;
516} 517}
517 518
518static inline void 519static inline void
519iop_desc_init_xor(struct iop_adma_desc_slot *desc, int src_cnt, int int_en) 520iop_desc_init_xor(struct iop_adma_desc_slot *desc, int src_cnt,
521 unsigned long flags)
520{ 522{
521 iop3xx_desc_init_xor(desc->hw_desc, src_cnt, int_en); 523 iop3xx_desc_init_xor(desc->hw_desc, src_cnt, flags);
522} 524}
523 525
524/* return the number of operations */ 526/* return the number of operations */
525static inline int 527static inline int
526iop_desc_init_zero_sum(struct iop_adma_desc_slot *desc, int src_cnt, int int_en) 528iop_desc_init_zero_sum(struct iop_adma_desc_slot *desc, int src_cnt,
529 unsigned long flags)
527{ 530{
528 int slot_cnt = desc->slot_cnt, slots_per_op = desc->slots_per_op; 531 int slot_cnt = desc->slot_cnt, slots_per_op = desc->slots_per_op;
529 struct iop3xx_desc_aau *hw_desc, *prev_hw_desc, *iter; 532 struct iop3xx_desc_aau *hw_desc, *prev_hw_desc, *iter;
@@ -538,10 +541,10 @@ iop_desc_init_zero_sum(struct iop_adma_desc_slot *desc, int src_cnt, int int_en)
538 for (i = 0, j = 0; (slot_cnt -= slots_per_op) >= 0; 541 for (i = 0, j = 0; (slot_cnt -= slots_per_op) >= 0;
539 i += slots_per_op, j++) { 542 i += slots_per_op, j++) {
540 iter = iop_hw_desc_slot_idx(hw_desc, i); 543 iter = iop_hw_desc_slot_idx(hw_desc, i);
541 u_desc_ctrl.value = iop3xx_desc_init_xor(iter, src_cnt, int_en); 544 u_desc_ctrl.value = iop3xx_desc_init_xor(iter, src_cnt, flags);
542 u_desc_ctrl.field.dest_write_en = 0; 545 u_desc_ctrl.field.dest_write_en = 0;
543 u_desc_ctrl.field.zero_result_en = 1; 546 u_desc_ctrl.field.zero_result_en = 1;
544 u_desc_ctrl.field.int_en = int_en; 547 u_desc_ctrl.field.int_en = flags & DMA_PREP_INTERRUPT;
545 iter->desc_ctrl = u_desc_ctrl.value; 548 iter->desc_ctrl = u_desc_ctrl.value;
546 549
547 /* for the subsequent descriptors preserve the store queue 550 /* for the subsequent descriptors preserve the store queue
@@ -559,7 +562,8 @@ iop_desc_init_zero_sum(struct iop_adma_desc_slot *desc, int src_cnt, int int_en)
559} 562}
560 563
561static inline void 564static inline void
562iop_desc_init_null_xor(struct iop_adma_desc_slot *desc, int src_cnt, int int_en) 565iop_desc_init_null_xor(struct iop_adma_desc_slot *desc, int src_cnt,
566 unsigned long flags)
563{ 567{
564 struct iop3xx_desc_aau *hw_desc = desc->hw_desc; 568 struct iop3xx_desc_aau *hw_desc = desc->hw_desc;
565 union { 569 union {
@@ -591,7 +595,7 @@ iop_desc_init_null_xor(struct iop_adma_desc_slot *desc, int src_cnt, int int_en)
591 } 595 }
592 596
593 u_desc_ctrl.field.dest_write_en = 0; 597 u_desc_ctrl.field.dest_write_en = 0;
594 u_desc_ctrl.field.int_en = int_en; 598 u_desc_ctrl.field.int_en = flags & DMA_PREP_INTERRUPT;
595 hw_desc->desc_ctrl = u_desc_ctrl.value; 599 hw_desc->desc_ctrl = u_desc_ctrl.value;
596} 600}
597 601
diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h
index b0864f5b729d..acbb364674ff 100644
--- a/include/linux/dmaengine.h
+++ b/include/linux/dmaengine.h
@@ -95,6 +95,15 @@ enum dma_transaction_type {
95#define DMA_TX_TYPE_END (DMA_INTERRUPT + 1) 95#define DMA_TX_TYPE_END (DMA_INTERRUPT + 1)
96 96
97/** 97/**
98 * enum dma_prep_flags - DMA flags to augment operation preparation
99 * @DMA_PREP_INTERRUPT - trigger an interrupt (callback) upon completion of
100 * this transaction
101 */
102enum dma_prep_flags {
103 DMA_PREP_INTERRUPT = (1 << 0),
104};
105
106/**
98 * dma_cap_mask_t - capabilities bitmap modeled after cpumask_t. 107 * dma_cap_mask_t - capabilities bitmap modeled after cpumask_t.
99 * See linux/cpumask.h 108 * See linux/cpumask.h
100 */ 109 */
@@ -274,16 +283,16 @@ struct dma_device {
274 283
275 struct dma_async_tx_descriptor *(*device_prep_dma_memcpy)( 284 struct dma_async_tx_descriptor *(*device_prep_dma_memcpy)(
276 struct dma_chan *chan, dma_addr_t dest, dma_addr_t src, 285 struct dma_chan *chan, dma_addr_t dest, dma_addr_t src,
277 size_t len, int int_en); 286 size_t len, unsigned long flags);
278 struct dma_async_tx_descriptor *(*device_prep_dma_xor)( 287 struct dma_async_tx_descriptor *(*device_prep_dma_xor)(
279 struct dma_chan *chan, dma_addr_t dest, dma_addr_t *src, 288 struct dma_chan *chan, dma_addr_t dest, dma_addr_t *src,
280 unsigned int src_cnt, size_t len, int int_en); 289 unsigned int src_cnt, size_t len, unsigned long flags);
281 struct dma_async_tx_descriptor *(*device_prep_dma_zero_sum)( 290 struct dma_async_tx_descriptor *(*device_prep_dma_zero_sum)(
282 struct dma_chan *chan, dma_addr_t *src, unsigned int src_cnt, 291 struct dma_chan *chan, dma_addr_t *src, unsigned int src_cnt,
283 size_t len, u32 *result, int int_en); 292 size_t len, u32 *result, unsigned long flags);
284 struct dma_async_tx_descriptor *(*device_prep_dma_memset)( 293 struct dma_async_tx_descriptor *(*device_prep_dma_memset)(
285 struct dma_chan *chan, dma_addr_t dest, int value, size_t len, 294 struct dma_chan *chan, dma_addr_t dest, int value, size_t len,
286 int int_en); 295 unsigned long flags);
287 struct dma_async_tx_descriptor *(*device_prep_dma_interrupt)( 296 struct dma_async_tx_descriptor *(*device_prep_dma_interrupt)(
288 struct dma_chan *chan); 297 struct dma_chan *chan);
289 298