diff options
author | Paul Mackerras <paulus@samba.org> | 2006-06-27 23:50:39 -0400 |
---|---|---|
committer | Paul Mackerras <paulus@samba.org> | 2006-06-28 01:19:03 -0400 |
commit | 3965f8c59778b0d37460ec268f92c0c382546b5c (patch) | |
tree | d5c508cb20c8702117457cf331a9edd203298754 /include | |
parent | f127a2b5cf542968ea1c428f86ffc780ea929452 (diff) |
[POWERPC] Simplify the code defining the 64-bit CPU features
Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'include')
-rw-r--r-- | include/asm-powerpc/cputable.h | 48 |
1 files changed, 20 insertions, 28 deletions
diff --git a/include/asm-powerpc/cputable.h b/include/asm-powerpc/cputable.h index fab41c280aa1..1ba3c9983614 100644 --- a/include/asm-powerpc/cputable.h +++ b/include/asm-powerpc/cputable.h | |||
@@ -117,38 +117,30 @@ extern void do_cpu_ftr_fixups(unsigned long offset); | |||
117 | #define CPU_FTR_PPC_LE ASM_CONST(0x0000000000200000) | 117 | #define CPU_FTR_PPC_LE ASM_CONST(0x0000000000200000) |
118 | #define CPU_FTR_REAL_LE ASM_CONST(0x0000000000400000) | 118 | #define CPU_FTR_REAL_LE ASM_CONST(0x0000000000400000) |
119 | 119 | ||
120 | /* | ||
121 | * Add the 64-bit processor unique features in the top half of the word; | ||
122 | * on 32-bit, make the names available but defined to be 0. | ||
123 | */ | ||
120 | #ifdef __powerpc64__ | 124 | #ifdef __powerpc64__ |
121 | /* Add the 64b processor unique features in the top half of the word */ | 125 | #define LONG_ASM_CONST(x) ASM_CONST(x) |
122 | #define CPU_FTR_SLB ASM_CONST(0x0000000100000000) | ||
123 | #define CPU_FTR_16M_PAGE ASM_CONST(0x0000000200000000) | ||
124 | #define CPU_FTR_TLBIEL ASM_CONST(0x0000000400000000) | ||
125 | #define CPU_FTR_NOEXECUTE ASM_CONST(0x0000000800000000) | ||
126 | #define CPU_FTR_IABR ASM_CONST(0x0000002000000000) | ||
127 | #define CPU_FTR_MMCRA ASM_CONST(0x0000004000000000) | ||
128 | #define CPU_FTR_CTRL ASM_CONST(0x0000008000000000) | ||
129 | #define CPU_FTR_SMT ASM_CONST(0x0000010000000000) | ||
130 | #define CPU_FTR_COHERENT_ICACHE ASM_CONST(0x0000020000000000) | ||
131 | #define CPU_FTR_LOCKLESS_TLBIE ASM_CONST(0x0000040000000000) | ||
132 | #define CPU_FTR_CI_LARGE_PAGE ASM_CONST(0x0000100000000000) | ||
133 | #define CPU_FTR_PAUSE_ZERO ASM_CONST(0x0000200000000000) | ||
134 | #define CPU_FTR_PURR ASM_CONST(0x0000400000000000) | ||
135 | #else | 126 | #else |
136 | /* ensure on 32b processors the flags are available for compiling but | 127 | #define LONG_ASM_CONST(x) 0 |
137 | * don't do anything */ | ||
138 | #define CPU_FTR_SLB ASM_CONST(0x0) | ||
139 | #define CPU_FTR_16M_PAGE ASM_CONST(0x0) | ||
140 | #define CPU_FTR_TLBIEL ASM_CONST(0x0) | ||
141 | #define CPU_FTR_NOEXECUTE ASM_CONST(0x0) | ||
142 | #define CPU_FTR_IABR ASM_CONST(0x0) | ||
143 | #define CPU_FTR_MMCRA ASM_CONST(0x0) | ||
144 | #define CPU_FTR_CTRL ASM_CONST(0x0) | ||
145 | #define CPU_FTR_SMT ASM_CONST(0x0) | ||
146 | #define CPU_FTR_COHERENT_ICACHE ASM_CONST(0x0) | ||
147 | #define CPU_FTR_LOCKLESS_TLBIE ASM_CONST(0x0) | ||
148 | #define CPU_FTR_CI_LARGE_PAGE ASM_CONST(0x0) | ||
149 | #define CPU_FTR_PURR ASM_CONST(0x0) | ||
150 | #endif | 128 | #endif |
151 | 129 | ||
130 | #define CPU_FTR_SLB LONG_ASM_CONST(0x0000000100000000) | ||
131 | #define CPU_FTR_16M_PAGE LONG_ASM_CONST(0x0000000200000000) | ||
132 | #define CPU_FTR_TLBIEL LONG_ASM_CONST(0x0000000400000000) | ||
133 | #define CPU_FTR_NOEXECUTE LONG_ASM_CONST(0x0000000800000000) | ||
134 | #define CPU_FTR_IABR LONG_ASM_CONST(0x0000002000000000) | ||
135 | #define CPU_FTR_MMCRA LONG_ASM_CONST(0x0000004000000000) | ||
136 | #define CPU_FTR_CTRL LONG_ASM_CONST(0x0000008000000000) | ||
137 | #define CPU_FTR_SMT LONG_ASM_CONST(0x0000010000000000) | ||
138 | #define CPU_FTR_COHERENT_ICACHE LONG_ASM_CONST(0x0000020000000000) | ||
139 | #define CPU_FTR_LOCKLESS_TLBIE LONG_ASM_CONST(0x0000040000000000) | ||
140 | #define CPU_FTR_CI_LARGE_PAGE LONG_ASM_CONST(0x0000100000000000) | ||
141 | #define CPU_FTR_PAUSE_ZERO LONG_ASM_CONST(0x0000200000000000) | ||
142 | #define CPU_FTR_PURR LONG_ASM_CONST(0x0000400000000000) | ||
143 | |||
152 | #ifndef __ASSEMBLY__ | 144 | #ifndef __ASSEMBLY__ |
153 | 145 | ||
154 | #define CPU_FTR_PPCAS_ARCH_V2_BASE (CPU_FTR_SLB | \ | 146 | #define CPU_FTR_PPCAS_ARCH_V2_BASE (CPU_FTR_SLB | \ |