diff options
author | Paul Mundt <lethal@linux-sh.org> | 2007-11-09 03:08:54 -0500 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2008-01-27 23:18:42 -0500 |
commit | af3c7dfe822b598a2f977098101ed8b63cf0fdd1 (patch) | |
tree | 6c7c496559a2dbcdacdbfb147a95ab6546aac462 /include | |
parent | 33f242ed11ce6b5fbe73fe4ece7ef4bc2f4e2851 (diff) |
sh: Split out processor.h in to _32 and _64 variants.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'include')
-rw-r--r-- | include/asm-sh/processor.h | 247 | ||||
-rw-r--r-- | include/asm-sh/processor_32.h | 248 | ||||
-rw-r--r-- | include/asm-sh/processor_64.h (renamed from include/asm-sh64/processor.h) | 46 |
3 files changed, 272 insertions, 269 deletions
diff --git a/include/asm-sh/processor.h b/include/asm-sh/processor.h index fda68480f377..bf01f486c3e1 100644 --- a/include/asm-sh/processor.h +++ b/include/asm-sh/processor.h | |||
@@ -1,31 +1,5 @@ | |||
1 | /* | ||
2 | * include/asm-sh/processor.h | ||
3 | * | ||
4 | * Copyright (C) 1999, 2000 Niibe Yutaka | ||
5 | * Copyright (C) 2002, 2003 Paul Mundt | ||
6 | */ | ||
7 | |||
8 | #ifndef __ASM_SH_PROCESSOR_H | 1 | #ifndef __ASM_SH_PROCESSOR_H |
9 | #define __ASM_SH_PROCESSOR_H | 2 | #define __ASM_SH_PROCESSOR_H |
10 | #ifdef __KERNEL__ | ||
11 | |||
12 | #include <linux/compiler.h> | ||
13 | #include <asm/page.h> | ||
14 | #include <asm/types.h> | ||
15 | #include <asm/cache.h> | ||
16 | #include <asm/ptrace.h> | ||
17 | #include <asm/cpu-features.h> | ||
18 | |||
19 | /* | ||
20 | * Default implementation of macro that returns current | ||
21 | * instruction pointer ("program counter"). | ||
22 | */ | ||
23 | #define current_text_addr() ({ void *pc; __asm__("mova 1f, %0\n1:":"=z" (pc)); pc; }) | ||
24 | |||
25 | /* Core Processor Version Register */ | ||
26 | #define CCN_PVR 0xff000030 | ||
27 | #define CCN_CVR 0xff000040 | ||
28 | #define CCN_PRR 0xff000044 | ||
29 | 3 | ||
30 | /* | 4 | /* |
31 | * CPU type and hardware bug flags. Kept separately for each CPU. | 5 | * CPU type and hardware bug flags. Kept separately for each CPU. |
@@ -57,229 +31,20 @@ enum cpu_type { | |||
57 | /* SH4AL-DSP types */ | 31 | /* SH4AL-DSP types */ |
58 | CPU_SH7343, CPU_SH7722, | 32 | CPU_SH7343, CPU_SH7722, |
59 | 33 | ||
34 | /* SH-5 types */ | ||
35 | CPU_SH5_101, CPU_SH5_103, | ||
36 | |||
60 | /* Unknown subtype */ | 37 | /* Unknown subtype */ |
61 | CPU_SH_NONE | 38 | CPU_SH_NONE |
62 | }; | 39 | }; |
63 | 40 | ||
64 | struct sh_cpuinfo { | 41 | #ifdef CONFIG_SUPERH32 |
65 | unsigned int type; | 42 | # include "processor_32.h" |
66 | unsigned long loops_per_jiffy; | ||
67 | unsigned long asid_cache; | ||
68 | |||
69 | struct cache_info icache; /* Primary I-cache */ | ||
70 | struct cache_info dcache; /* Primary D-cache */ | ||
71 | struct cache_info scache; /* Secondary cache */ | ||
72 | |||
73 | unsigned long flags; | ||
74 | } __attribute__ ((aligned(L1_CACHE_BYTES))); | ||
75 | |||
76 | extern struct sh_cpuinfo cpu_data[]; | ||
77 | #define boot_cpu_data cpu_data[0] | ||
78 | #define current_cpu_data cpu_data[smp_processor_id()] | ||
79 | #define raw_current_cpu_data cpu_data[raw_smp_processor_id()] | ||
80 | |||
81 | /* | ||
82 | * User space process size: 2GB. | ||
83 | * | ||
84 | * Since SH7709 and SH7750 have "area 7", we can't use 0x7c000000--0x7fffffff | ||
85 | */ | ||
86 | #define TASK_SIZE 0x7c000000UL | ||
87 | |||
88 | /* This decides where the kernel will search for a free chunk of vm | ||
89 | * space during mmap's. | ||
90 | */ | ||
91 | #define TASK_UNMAPPED_BASE (TASK_SIZE / 3) | ||
92 | |||
93 | /* | ||
94 | * Bit of SR register | ||
95 | * | ||
96 | * FD-bit: | ||
97 | * When it's set, it means the processor doesn't have right to use FPU, | ||
98 | * and it results exception when the floating operation is executed. | ||
99 | * | ||
100 | * IMASK-bit: | ||
101 | * Interrupt level mask | ||
102 | */ | ||
103 | #define SR_FD 0x00008000 | ||
104 | #define SR_DSP 0x00001000 | ||
105 | #define SR_IMASK 0x000000f0 | ||
106 | |||
107 | /* | ||
108 | * FPU structure and data | ||
109 | */ | ||
110 | |||
111 | struct sh_fpu_hard_struct { | ||
112 | unsigned long fp_regs[16]; | ||
113 | unsigned long xfp_regs[16]; | ||
114 | unsigned long fpscr; | ||
115 | unsigned long fpul; | ||
116 | |||
117 | long status; /* software status information */ | ||
118 | }; | ||
119 | |||
120 | /* Dummy fpu emulator */ | ||
121 | struct sh_fpu_soft_struct { | ||
122 | unsigned long fp_regs[16]; | ||
123 | unsigned long xfp_regs[16]; | ||
124 | unsigned long fpscr; | ||
125 | unsigned long fpul; | ||
126 | |||
127 | unsigned char lookahead; | ||
128 | unsigned long entry_pc; | ||
129 | }; | ||
130 | |||
131 | union sh_fpu_union { | ||
132 | struct sh_fpu_hard_struct hard; | ||
133 | struct sh_fpu_soft_struct soft; | ||
134 | }; | ||
135 | |||
136 | struct thread_struct { | ||
137 | /* Saved registers when thread is descheduled */ | ||
138 | unsigned long sp; | ||
139 | unsigned long pc; | ||
140 | |||
141 | /* Hardware debugging registers */ | ||
142 | unsigned long ubc_pc; | ||
143 | |||
144 | /* floating point info */ | ||
145 | union sh_fpu_union fpu; | ||
146 | }; | ||
147 | |||
148 | typedef struct { | ||
149 | unsigned long seg; | ||
150 | } mm_segment_t; | ||
151 | |||
152 | /* Count of active tasks with UBC settings */ | ||
153 | extern int ubc_usercnt; | ||
154 | |||
155 | #define INIT_THREAD { \ | ||
156 | .sp = sizeof(init_stack) + (long) &init_stack, \ | ||
157 | } | ||
158 | |||
159 | /* | ||
160 | * Do necessary setup to start up a newly executed thread. | ||
161 | */ | ||
162 | #define start_thread(regs, new_pc, new_sp) \ | ||
163 | set_fs(USER_DS); \ | ||
164 | regs->pr = 0; \ | ||
165 | regs->sr = SR_FD; /* User mode. */ \ | ||
166 | regs->pc = new_pc; \ | ||
167 | regs->regs[15] = new_sp | ||
168 | |||
169 | /* Forward declaration, a strange C thing */ | ||
170 | struct task_struct; | ||
171 | struct mm_struct; | ||
172 | |||
173 | /* Free all resources held by a thread. */ | ||
174 | extern void release_thread(struct task_struct *); | ||
175 | |||
176 | /* Prepare to copy thread state - unlazy all lazy status */ | ||
177 | #define prepare_to_copy(tsk) do { } while (0) | ||
178 | |||
179 | /* | ||
180 | * create a kernel thread without removing it from tasklists | ||
181 | */ | ||
182 | extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags); | ||
183 | |||
184 | /* Copy and release all segment info associated with a VM */ | ||
185 | #define copy_segments(p, mm) do { } while(0) | ||
186 | #define release_segments(mm) do { } while(0) | ||
187 | |||
188 | /* | ||
189 | * FPU lazy state save handling. | ||
190 | */ | ||
191 | |||
192 | static __inline__ void disable_fpu(void) | ||
193 | { | ||
194 | unsigned long __dummy; | ||
195 | |||
196 | /* Set FD flag in SR */ | ||
197 | __asm__ __volatile__("stc sr, %0\n\t" | ||
198 | "or %1, %0\n\t" | ||
199 | "ldc %0, sr" | ||
200 | : "=&r" (__dummy) | ||
201 | : "r" (SR_FD)); | ||
202 | } | ||
203 | |||
204 | static __inline__ void enable_fpu(void) | ||
205 | { | ||
206 | unsigned long __dummy; | ||
207 | |||
208 | /* Clear out FD flag in SR */ | ||
209 | __asm__ __volatile__("stc sr, %0\n\t" | ||
210 | "and %1, %0\n\t" | ||
211 | "ldc %0, sr" | ||
212 | : "=&r" (__dummy) | ||
213 | : "r" (~SR_FD)); | ||
214 | } | ||
215 | |||
216 | static __inline__ void release_fpu(struct pt_regs *regs) | ||
217 | { | ||
218 | regs->sr |= SR_FD; | ||
219 | } | ||
220 | |||
221 | static __inline__ void grab_fpu(struct pt_regs *regs) | ||
222 | { | ||
223 | regs->sr &= ~SR_FD; | ||
224 | } | ||
225 | |||
226 | extern void save_fpu(struct task_struct *__tsk, struct pt_regs *regs); | ||
227 | |||
228 | #define unlazy_fpu(tsk, regs) do { \ | ||
229 | if (test_tsk_thread_flag(tsk, TIF_USEDFPU)) { \ | ||
230 | save_fpu(tsk, regs); \ | ||
231 | } \ | ||
232 | } while (0) | ||
233 | |||
234 | #define clear_fpu(tsk, regs) do { \ | ||
235 | if (test_tsk_thread_flag(tsk, TIF_USEDFPU)) { \ | ||
236 | clear_tsk_thread_flag(tsk, TIF_USEDFPU); \ | ||
237 | release_fpu(regs); \ | ||
238 | } \ | ||
239 | } while (0) | ||
240 | |||
241 | /* Double presision, NANS as NANS, rounding to nearest, no exceptions */ | ||
242 | #define FPSCR_INIT 0x00080000 | ||
243 | |||
244 | #define FPSCR_CAUSE_MASK 0x0001f000 /* Cause bits */ | ||
245 | #define FPSCR_FLAG_MASK 0x0000007c /* Flag bits */ | ||
246 | |||
247 | /* | ||
248 | * Return saved PC of a blocked thread. | ||
249 | */ | ||
250 | #define thread_saved_pc(tsk) (tsk->thread.pc) | ||
251 | |||
252 | void show_trace(struct task_struct *tsk, unsigned long *sp, | ||
253 | struct pt_regs *regs); | ||
254 | extern unsigned long get_wchan(struct task_struct *p); | ||
255 | |||
256 | #define KSTK_EIP(tsk) (task_pt_regs(tsk)->pc) | ||
257 | #define KSTK_ESP(tsk) (task_pt_regs(tsk)->regs[15]) | ||
258 | |||
259 | #define cpu_sleep() __asm__ __volatile__ ("sleep" : : : "memory") | ||
260 | #define cpu_relax() barrier() | ||
261 | |||
262 | #if defined(CONFIG_CPU_SH2A) || defined(CONFIG_CPU_SH3) || \ | ||
263 | defined(CONFIG_CPU_SH4) | ||
264 | #define PREFETCH_STRIDE L1_CACHE_BYTES | ||
265 | #define ARCH_HAS_PREFETCH | ||
266 | #define ARCH_HAS_PREFETCHW | ||
267 | static inline void prefetch(void *x) | ||
268 | { | ||
269 | __asm__ __volatile__ ("pref @%0\n\t" : : "r" (x) : "memory"); | ||
270 | } | ||
271 | |||
272 | #define prefetchw(x) prefetch(x) | ||
273 | #endif | ||
274 | |||
275 | #ifdef CONFIG_VSYSCALL | ||
276 | extern int vsyscall_init(void); | ||
277 | #else | 43 | #else |
278 | #define vsyscall_init() do { } while (0) | 44 | # include "processor_64.h" |
279 | #endif | 45 | #endif |
280 | 46 | ||
281 | /* arch/sh/kernel/setup.c */ | 47 | /* arch/sh/kernel/setup.c */ |
282 | const char *get_cpu_subtype(struct sh_cpuinfo *c); | 48 | const char *get_cpu_subtype(struct sh_cpuinfo *c); |
283 | 49 | ||
284 | #endif /* __KERNEL__ */ | ||
285 | #endif /* __ASM_SH_PROCESSOR_H */ | 50 | #endif /* __ASM_SH_PROCESSOR_H */ |
diff --git a/include/asm-sh/processor_32.h b/include/asm-sh/processor_32.h new file mode 100644 index 000000000000..e10d0ee0c22b --- /dev/null +++ b/include/asm-sh/processor_32.h | |||
@@ -0,0 +1,248 @@ | |||
1 | /* | ||
2 | * include/asm-sh/processor.h | ||
3 | * | ||
4 | * Copyright (C) 1999, 2000 Niibe Yutaka | ||
5 | * Copyright (C) 2002, 2003 Paul Mundt | ||
6 | */ | ||
7 | |||
8 | #ifndef __ASM_SH_PROCESSOR_32_H | ||
9 | #define __ASM_SH_PROCESSOR_32_H | ||
10 | #ifdef __KERNEL__ | ||
11 | |||
12 | #include <linux/compiler.h> | ||
13 | #include <asm/page.h> | ||
14 | #include <asm/types.h> | ||
15 | #include <asm/cache.h> | ||
16 | #include <asm/ptrace.h> | ||
17 | #include <asm/cpu-features.h> | ||
18 | |||
19 | /* | ||
20 | * Default implementation of macro that returns current | ||
21 | * instruction pointer ("program counter"). | ||
22 | */ | ||
23 | #define current_text_addr() ({ void *pc; __asm__("mova 1f, %0\n1:":"=z" (pc)); pc; }) | ||
24 | |||
25 | /* Core Processor Version Register */ | ||
26 | #define CCN_PVR 0xff000030 | ||
27 | #define CCN_CVR 0xff000040 | ||
28 | #define CCN_PRR 0xff000044 | ||
29 | |||
30 | struct sh_cpuinfo { | ||
31 | unsigned int type; | ||
32 | unsigned long loops_per_jiffy; | ||
33 | unsigned long asid_cache; | ||
34 | |||
35 | struct cache_info icache; /* Primary I-cache */ | ||
36 | struct cache_info dcache; /* Primary D-cache */ | ||
37 | struct cache_info scache; /* Secondary cache */ | ||
38 | |||
39 | unsigned long flags; | ||
40 | } __attribute__ ((aligned(L1_CACHE_BYTES))); | ||
41 | |||
42 | extern struct sh_cpuinfo cpu_data[]; | ||
43 | #define boot_cpu_data cpu_data[0] | ||
44 | #define current_cpu_data cpu_data[smp_processor_id()] | ||
45 | #define raw_current_cpu_data cpu_data[raw_smp_processor_id()] | ||
46 | |||
47 | /* | ||
48 | * User space process size: 2GB. | ||
49 | * | ||
50 | * Since SH7709 and SH7750 have "area 7", we can't use 0x7c000000--0x7fffffff | ||
51 | */ | ||
52 | #define TASK_SIZE 0x7c000000UL | ||
53 | |||
54 | /* This decides where the kernel will search for a free chunk of vm | ||
55 | * space during mmap's. | ||
56 | */ | ||
57 | #define TASK_UNMAPPED_BASE (TASK_SIZE / 3) | ||
58 | |||
59 | /* | ||
60 | * Bit of SR register | ||
61 | * | ||
62 | * FD-bit: | ||
63 | * When it's set, it means the processor doesn't have right to use FPU, | ||
64 | * and it results exception when the floating operation is executed. | ||
65 | * | ||
66 | * IMASK-bit: | ||
67 | * Interrupt level mask | ||
68 | */ | ||
69 | #define SR_FD 0x00008000 | ||
70 | #define SR_DSP 0x00001000 | ||
71 | #define SR_IMASK 0x000000f0 | ||
72 | |||
73 | /* | ||
74 | * FPU structure and data | ||
75 | */ | ||
76 | |||
77 | struct sh_fpu_hard_struct { | ||
78 | unsigned long fp_regs[16]; | ||
79 | unsigned long xfp_regs[16]; | ||
80 | unsigned long fpscr; | ||
81 | unsigned long fpul; | ||
82 | |||
83 | long status; /* software status information */ | ||
84 | }; | ||
85 | |||
86 | /* Dummy fpu emulator */ | ||
87 | struct sh_fpu_soft_struct { | ||
88 | unsigned long fp_regs[16]; | ||
89 | unsigned long xfp_regs[16]; | ||
90 | unsigned long fpscr; | ||
91 | unsigned long fpul; | ||
92 | |||
93 | unsigned char lookahead; | ||
94 | unsigned long entry_pc; | ||
95 | }; | ||
96 | |||
97 | union sh_fpu_union { | ||
98 | struct sh_fpu_hard_struct hard; | ||
99 | struct sh_fpu_soft_struct soft; | ||
100 | }; | ||
101 | |||
102 | struct thread_struct { | ||
103 | /* Saved registers when thread is descheduled */ | ||
104 | unsigned long sp; | ||
105 | unsigned long pc; | ||
106 | |||
107 | /* Hardware debugging registers */ | ||
108 | unsigned long ubc_pc; | ||
109 | |||
110 | /* floating point info */ | ||
111 | union sh_fpu_union fpu; | ||
112 | }; | ||
113 | |||
114 | typedef struct { | ||
115 | unsigned long seg; | ||
116 | } mm_segment_t; | ||
117 | |||
118 | /* Count of active tasks with UBC settings */ | ||
119 | extern int ubc_usercnt; | ||
120 | |||
121 | #define INIT_THREAD { \ | ||
122 | .sp = sizeof(init_stack) + (long) &init_stack, \ | ||
123 | } | ||
124 | |||
125 | /* | ||
126 | * Do necessary setup to start up a newly executed thread. | ||
127 | */ | ||
128 | #define start_thread(regs, new_pc, new_sp) \ | ||
129 | set_fs(USER_DS); \ | ||
130 | regs->pr = 0; \ | ||
131 | regs->sr = SR_FD; /* User mode. */ \ | ||
132 | regs->pc = new_pc; \ | ||
133 | regs->regs[15] = new_sp | ||
134 | |||
135 | /* Forward declaration, a strange C thing */ | ||
136 | struct task_struct; | ||
137 | struct mm_struct; | ||
138 | |||
139 | /* Free all resources held by a thread. */ | ||
140 | extern void release_thread(struct task_struct *); | ||
141 | |||
142 | /* Prepare to copy thread state - unlazy all lazy status */ | ||
143 | #define prepare_to_copy(tsk) do { } while (0) | ||
144 | |||
145 | /* | ||
146 | * create a kernel thread without removing it from tasklists | ||
147 | */ | ||
148 | extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags); | ||
149 | |||
150 | /* Copy and release all segment info associated with a VM */ | ||
151 | #define copy_segments(p, mm) do { } while(0) | ||
152 | #define release_segments(mm) do { } while(0) | ||
153 | |||
154 | /* | ||
155 | * FPU lazy state save handling. | ||
156 | */ | ||
157 | |||
158 | static __inline__ void disable_fpu(void) | ||
159 | { | ||
160 | unsigned long __dummy; | ||
161 | |||
162 | /* Set FD flag in SR */ | ||
163 | __asm__ __volatile__("stc sr, %0\n\t" | ||
164 | "or %1, %0\n\t" | ||
165 | "ldc %0, sr" | ||
166 | : "=&r" (__dummy) | ||
167 | : "r" (SR_FD)); | ||
168 | } | ||
169 | |||
170 | static __inline__ void enable_fpu(void) | ||
171 | { | ||
172 | unsigned long __dummy; | ||
173 | |||
174 | /* Clear out FD flag in SR */ | ||
175 | __asm__ __volatile__("stc sr, %0\n\t" | ||
176 | "and %1, %0\n\t" | ||
177 | "ldc %0, sr" | ||
178 | : "=&r" (__dummy) | ||
179 | : "r" (~SR_FD)); | ||
180 | } | ||
181 | |||
182 | static __inline__ void release_fpu(struct pt_regs *regs) | ||
183 | { | ||
184 | regs->sr |= SR_FD; | ||
185 | } | ||
186 | |||
187 | static __inline__ void grab_fpu(struct pt_regs *regs) | ||
188 | { | ||
189 | regs->sr &= ~SR_FD; | ||
190 | } | ||
191 | |||
192 | extern void save_fpu(struct task_struct *__tsk, struct pt_regs *regs); | ||
193 | |||
194 | #define unlazy_fpu(tsk, regs) do { \ | ||
195 | if (test_tsk_thread_flag(tsk, TIF_USEDFPU)) { \ | ||
196 | save_fpu(tsk, regs); \ | ||
197 | } \ | ||
198 | } while (0) | ||
199 | |||
200 | #define clear_fpu(tsk, regs) do { \ | ||
201 | if (test_tsk_thread_flag(tsk, TIF_USEDFPU)) { \ | ||
202 | clear_tsk_thread_flag(tsk, TIF_USEDFPU); \ | ||
203 | release_fpu(regs); \ | ||
204 | } \ | ||
205 | } while (0) | ||
206 | |||
207 | /* Double presision, NANS as NANS, rounding to nearest, no exceptions */ | ||
208 | #define FPSCR_INIT 0x00080000 | ||
209 | |||
210 | #define FPSCR_CAUSE_MASK 0x0001f000 /* Cause bits */ | ||
211 | #define FPSCR_FLAG_MASK 0x0000007c /* Flag bits */ | ||
212 | |||
213 | /* | ||
214 | * Return saved PC of a blocked thread. | ||
215 | */ | ||
216 | #define thread_saved_pc(tsk) (tsk->thread.pc) | ||
217 | |||
218 | void show_trace(struct task_struct *tsk, unsigned long *sp, | ||
219 | struct pt_regs *regs); | ||
220 | extern unsigned long get_wchan(struct task_struct *p); | ||
221 | |||
222 | #define KSTK_EIP(tsk) (task_pt_regs(tsk)->pc) | ||
223 | #define KSTK_ESP(tsk) (task_pt_regs(tsk)->regs[15]) | ||
224 | |||
225 | #define cpu_sleep() __asm__ __volatile__ ("sleep" : : : "memory") | ||
226 | #define cpu_relax() barrier() | ||
227 | |||
228 | #if defined(CONFIG_CPU_SH2A) || defined(CONFIG_CPU_SH3) || \ | ||
229 | defined(CONFIG_CPU_SH4) | ||
230 | #define PREFETCH_STRIDE L1_CACHE_BYTES | ||
231 | #define ARCH_HAS_PREFETCH | ||
232 | #define ARCH_HAS_PREFETCHW | ||
233 | static inline void prefetch(void *x) | ||
234 | { | ||
235 | __asm__ __volatile__ ("pref @%0\n\t" : : "r" (x) : "memory"); | ||
236 | } | ||
237 | |||
238 | #define prefetchw(x) prefetch(x) | ||
239 | #endif | ||
240 | |||
241 | #ifdef CONFIG_VSYSCALL | ||
242 | extern int vsyscall_init(void); | ||
243 | #else | ||
244 | #define vsyscall_init() do { } while (0) | ||
245 | #endif | ||
246 | |||
247 | #endif /* __KERNEL__ */ | ||
248 | #endif /* __ASM_SH_PROCESSOR_32_H */ | ||
diff --git a/include/asm-sh64/processor.h b/include/asm-sh/processor_64.h index eb2bee4b47b9..5430e437b915 100644 --- a/include/asm-sh64/processor.h +++ b/include/asm-sh/processor_64.h | |||
@@ -1,28 +1,24 @@ | |||
1 | #ifndef __ASM_SH64_PROCESSOR_H | 1 | #ifndef __ASM_SH_PROCESSOR_64_H |
2 | #define __ASM_SH64_PROCESSOR_H | 2 | #define __ASM_SH_PROCESSOR_64_H |
3 | 3 | ||
4 | /* | 4 | /* |
5 | * This file is subject to the terms and conditions of the GNU General Public | 5 | * include/asm-sh/processor_64.h |
6 | * License. See the file "COPYING" in the main directory of this archive | ||
7 | * for more details. | ||
8 | * | ||
9 | * include/asm-sh64/processor.h | ||
10 | * | 6 | * |
11 | * Copyright (C) 2000, 2001 Paolo Alberelli | 7 | * Copyright (C) 2000, 2001 Paolo Alberelli |
12 | * Copyright (C) 2003 Paul Mundt | 8 | * Copyright (C) 2003 Paul Mundt |
13 | * Copyright (C) 2004 Richard Curnow | 9 | * Copyright (C) 2004 Richard Curnow |
14 | * | 10 | * |
11 | * This file is subject to the terms and conditions of the GNU General Public | ||
12 | * License. See the file "COPYING" in the main directory of this archive | ||
13 | * for more details. | ||
15 | */ | 14 | */ |
16 | |||
17 | #include <asm/page.h> | ||
18 | |||
19 | #ifndef __ASSEMBLY__ | 15 | #ifndef __ASSEMBLY__ |
20 | 16 | ||
17 | #include <linux/compiler.h> | ||
18 | #include <asm/page.h> | ||
21 | #include <asm/types.h> | 19 | #include <asm/types.h> |
22 | #include <asm/cache.h> | 20 | #include <asm/cache.h> |
23 | #include <asm/registers.h> | 21 | #include <asm/cpu/registers.h> |
24 | #include <linux/threads.h> | ||
25 | #include <linux/compiler.h> | ||
26 | 22 | ||
27 | /* | 23 | /* |
28 | * Default implementation of macro that returns current | 24 | * Default implementation of macro that returns current |
@@ -40,15 +36,6 @@ __asm__("gettr tr0, %1\n\t" \ | |||
40 | pc; }) | 36 | pc; }) |
41 | 37 | ||
42 | /* | 38 | /* |
43 | * CPU type and hardware bug flags. Kept separately for each CPU. | ||
44 | */ | ||
45 | enum cpu_type { | ||
46 | CPU_SH5_101, | ||
47 | CPU_SH5_103, | ||
48 | CPU_SH_NONE | ||
49 | }; | ||
50 | |||
51 | /* | ||
52 | * TLB information structure | 39 | * TLB information structure |
53 | * | 40 | * |
54 | * Defined for both I and D tlb, per-processor. | 41 | * Defined for both I and D tlb, per-processor. |
@@ -178,6 +165,10 @@ struct thread_struct { | |||
178 | union sh_fpu_union fpu; | 165 | union sh_fpu_union fpu; |
179 | }; | 166 | }; |
180 | 167 | ||
168 | typedef struct { | ||
169 | unsigned long seg; | ||
170 | } mm_segment_t; | ||
171 | |||
181 | #define INIT_MMAP \ | 172 | #define INIT_MMAP \ |
182 | { &init_mm, 0, 0, NULL, PAGE_SHARED, VM_READ | VM_WRITE | VM_EXEC, 1, NULL, NULL } | 173 | { &init_mm, 0, 0, NULL, PAGE_SHARED, VM_READ | VM_WRITE | VM_EXEC, 1, NULL, NULL } |
183 | 174 | ||
@@ -200,12 +191,12 @@ extern struct pt_regs fake_swapper_regs; | |||
200 | */ | 191 | */ |
201 | #define SR_USER (SR_MMU | SR_FD) | 192 | #define SR_USER (SR_MMU | SR_FD) |
202 | 193 | ||
203 | #define start_thread(regs, new_pc, new_sp) \ | 194 | #define start_thread(regs, new_pc, new_sp) \ |
204 | set_fs(USER_DS); \ | 195 | set_fs(USER_DS); \ |
205 | regs->sr = SR_USER; /* User mode. */ \ | 196 | regs->sr = SR_USER; /* User mode. */ \ |
206 | regs->pc = new_pc - 4; /* Compensate syscall exit */ \ | 197 | regs->pc = new_pc - 4; /* Compensate syscall exit */ \ |
207 | regs->pc |= 1; /* Set SHmedia ! */ \ | 198 | regs->pc |= 1; /* Set SHmedia ! */ \ |
208 | regs->regs[18] = 0; \ | 199 | regs->regs[18] = 0; \ |
209 | regs->regs[15] = new_sp | 200 | regs->regs[15] = new_sp |
210 | 201 | ||
211 | /* Forward declaration, a strange C thing */ | 202 | /* Forward declaration, a strange C thing */ |
@@ -283,5 +274,4 @@ extern unsigned long get_wchan(struct task_struct *p); | |||
283 | #define cpu_relax() barrier() | 274 | #define cpu_relax() barrier() |
284 | 275 | ||
285 | #endif /* __ASSEMBLY__ */ | 276 | #endif /* __ASSEMBLY__ */ |
286 | #endif /* __ASM_SH64_PROCESSOR_H */ | 277 | #endif /* __ASM_SH_PROCESSOR_64_H */ |
287 | |||