aboutsummaryrefslogtreecommitdiffstats
path: root/include
diff options
context:
space:
mode:
authorAndrew Victor <andrew@sanpeople.com>2006-06-19 11:57:00 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2006-06-19 11:57:00 -0400
commit7238d7ee82d325212e83630047e9844943225118 (patch)
treeb0b9020419ef037650a3398de1525c52c961ef60 /include
parent2e83640270b4a76a3855131953c82bbc1919e589 (diff)
[ARM] 3586/1: AT91RM9200 header update
Patch from Andrew Victor Added definition for the bits in the Chip ID register. Corrected the capitalization of AT91_RTC_AMPM register name. Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include')
-rw-r--r--include/asm-arm/arch-at91rm9200/at91rm9200_sys.h11
1 files changed, 10 insertions, 1 deletions
diff --git a/include/asm-arm/arch-at91rm9200/at91rm9200_sys.h b/include/asm-arm/arch-at91rm9200/at91rm9200_sys.h
index 2910d359f919..0f4c12d5f0cd 100644
--- a/include/asm-arm/arch-at91rm9200/at91rm9200_sys.h
+++ b/include/asm-arm/arch-at91rm9200/at91rm9200_sys.h
@@ -68,8 +68,17 @@
68#define AT91_DBGU_RHR (AT91_DBGU + 0x18) /* Receiver Holding Register */ 68#define AT91_DBGU_RHR (AT91_DBGU + 0x18) /* Receiver Holding Register */
69#define AT91_DBGU_THR (AT91_DBGU + 0x1c) /* Transmitter Holding Register */ 69#define AT91_DBGU_THR (AT91_DBGU + 0x1c) /* Transmitter Holding Register */
70#define AT91_DBGU_BRGR (AT91_DBGU + 0x20) /* Baud Rate Generator Register */ 70#define AT91_DBGU_BRGR (AT91_DBGU + 0x20) /* Baud Rate Generator Register */
71
71#define AT91_DBGU_CIDR (AT91_DBGU + 0x40) /* Chip ID Register */ 72#define AT91_DBGU_CIDR (AT91_DBGU + 0x40) /* Chip ID Register */
72#define AT91_DBGU_EXID (AT91_DBGU + 0x44) /* Chip ID Extension Register */ 73#define AT91_DBGU_EXID (AT91_DBGU + 0x44) /* Chip ID Extension Register */
74#define AT91_CIDR_VERSION (0x1f << 0) /* Version of the Device */
75#define AT91_CIDR_EPROC (7 << 5) /* Embedded Processor */
76#define AT91_CIDR_NVPSIZ (0xf << 8) /* Nonvolatile Program Memory Size */
77#define AT91_CIDR_NVPSIZ2 (0xf << 12) /* Second Nonvolatile Program Memory Size */
78#define AT91_CIDR_SRAMSIZ (0xf << 16) /* Internal SRAM Size */
79#define AT91_CIDR_ARCH (0xff << 20) /* Architecture Identifier */
80#define AT91_CIDR_NVPTYP (7 << 28) /* Nonvolatile Program Memory Type */
81#define AT91_CIDR_EXT (1 << 31) /* Extension Flag */
73 82
74 83
75/* 84/*
@@ -241,7 +250,7 @@
241#define AT91_RTC_SEC (0x7f << 0) /* Current Second */ 250#define AT91_RTC_SEC (0x7f << 0) /* Current Second */
242#define AT91_RTC_MIN (0x7f << 8) /* Current Minute */ 251#define AT91_RTC_MIN (0x7f << 8) /* Current Minute */
243#define AT91_RTC_HOUR (0x3f << 16) /* Current Hour */ 252#define AT91_RTC_HOUR (0x3f << 16) /* Current Hour */
244#define At91_RTC_AMPM (1 << 22) /* Ante Meridiem Post Meridiem Indicator */ 253#define AT91_RTC_AMPM (1 << 22) /* Ante Meridiem Post Meridiem Indicator */
245 254
246#define AT91_RTC_CALR (AT91_RTC + 0x0c) /* Calendar Register */ 255#define AT91_RTC_CALR (AT91_RTC + 0x0c) /* Calendar Register */
247#define AT91_RTC_CENT (0x7f << 0) /* Current Century */ 256#define AT91_RTC_CENT (0x7f << 0) /* Current Century */