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authorRalf Baechle <ralf@linux-mips.org>2007-03-09 10:59:56 -0500
committerRalf Baechle <ralf@linux-mips.org>2007-03-09 15:27:31 -0500
commitbb9b813bb665cdbe7019a4f1e93f7138e7bf59d0 (patch)
treee16ef7f87c90a90e02fd501cf1472ce77ee02c30 /include
parentca6f5494f5e0ff60675d99b51c4c56921d95fe1d (diff)
[MIPS] Sibyte: Fix ZBbus profiler
o Fix build error. o Handle error returns. o Deal with signals received while sleeping. o Don't allow to be selected when we're not building the directory with the driver anyway. o Coding style cleanups. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include')
-rw-r--r--include/asm-mips/sibyte/trace_prof.h110
1 files changed, 0 insertions, 110 deletions
diff --git a/include/asm-mips/sibyte/trace_prof.h b/include/asm-mips/sibyte/trace_prof.h
deleted file mode 100644
index 557792075e9a..000000000000
--- a/include/asm-mips/sibyte/trace_prof.h
+++ /dev/null
@@ -1,110 +0,0 @@
1/*
2 * Copyright (C) 2001 Broadcom Corporation
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 2
7 * of the License, or (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
17 */
18
19#ifndef __ASM_SIBYTE_TRACE_PROF_H
20#define __ASM_SIBYTE_TRACE_PROF_H
21
22#undef DBG
23#if SBPROF_TB_DEBUG
24#define DBG(a) a
25#else
26#define DBG(a)
27#endif
28
29#define SBPROF_TB_MAJOR 240
30#define DEVNAME "bcm1250_tbprof"
31
32typedef u_int64_t tb_sample_t[6*256];
33
34struct sbprof_tb {
35 int open;
36 tb_sample_t *sbprof_tbbuf;
37 int next_tb_sample;
38
39 volatile int tb_enable;
40 volatile int tb_armed;
41
42 wait_queue_head_t tb_sync;
43 wait_queue_head_t tb_read;
44};
45
46#define MAX_SAMPLE_BYTES (24*1024*1024)
47#define MAX_TBSAMPLE_BYTES (12*1024*1024)
48
49#define MAX_SAMPLES (MAX_SAMPLE_BYTES/sizeof(u_int32_t))
50#define TB_SAMPLE_SIZE (sizeof(tb_sample_t))
51#define MAX_TB_SAMPLES (MAX_TBSAMPLE_BYTES/TB_SAMPLE_SIZE)
52
53/* IOCTLs */
54#define SBPROF_ZBSTART _IOW('s', 0, int)
55#define SBPROF_ZBSTOP _IOW('s', 1, int)
56#define SBPROF_ZBWAITFULL _IOW('s', 2, int)
57
58/***************************************************************************
59 * Routines for gathering ZBbus profiles using trace buffer
60 ***************************************************************************/
61
62/* Requires: Already called zclk_timer_init with a value that won't
63 saturate 40 bits. No subsequent use of SCD performance counters
64 or trace buffer.
65 Effect: Starts gathering random ZBbus profiles using trace buffer. */
66extern int sbprof_zbprof_start(struct file *filp);
67
68/* Effect: Stops collection of ZBbus profiles */
69extern int sbprof_zbprof_stop(void);
70
71
72/***************************************************************************
73 * Routines for using 40-bit SCD cycle counter
74 *
75 * Client responsible for either handling interrupts or making sure
76 * the cycles counter never saturates, e.g., by doing
77 * zclk_timer_init(0) at least every 2^40 - 1 ZCLKs.
78 ***************************************************************************/
79
80/* Configures SCD counter 0 to count ZCLKs starting from val;
81 Configures SCD counters1,2,3 to count nothing.
82 Must not be called while gathering ZBbus profiles.
83
84unsigned long long val; */
85#define zclk_timer_init(val) \
86 __asm__ __volatile__ (".set push;" \
87 ".set mips64;" \
88 "la $8, 0xb00204c0;" /* SCD perf_cnt_cfg */ \
89 "sd %0, 0x10($8);" /* write val to counter0 */ \
90 "sd %1, 0($8);" /* config counter0 for zclks*/ \
91 ".set pop" \
92 : /* no outputs */ \
93 /* enable, counter0 */ \
94 : /* inputs */ "r"(val), "r" ((1ULL << 33) | 1ULL) \
95 : /* modifies */ "$8" )
96
97
98/* Reads SCD counter 0 and puts result in value
99 unsigned long long val; */
100#define zclk_get(val) \
101 __asm__ __volatile__ (".set push;" \
102 ".set mips64;" \
103 "la $8, 0xb00204c0;" /* SCD perf_cnt_cfg */ \
104 "ld %0, 0x10($8);" /* write val to counter0 */ \
105 ".set pop" \
106 : /* outputs */ "=r"(val) \
107 : /* inputs */ \
108 : /* modifies */ "$8" )
109
110#endif /* __ASM_SIBYTE_TRACE_PROF_H */