diff options
author | Paul Mackerras <paulus@samba.org> | 2006-12-11 00:31:42 -0500 |
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committer | Paul Mackerras <paulus@samba.org> | 2006-12-11 00:31:42 -0500 |
commit | 973c1fabc70deb10f12a0eaab2f50c2263784257 (patch) | |
tree | 5b0ef183757049d241d0709f0cea9e370627b687 /include | |
parent | 4383162c8f2fa75d916c4901b0d1ebcac7aeaf74 (diff) | |
parent | d10f73480b991da2aa1c000ed38eda3e4a987292 (diff) |
Merge branch 'for_paulus' of master.kernel.org:/pub/scm/linux/kernel/git/galak/powerpc
Diffstat (limited to 'include')
-rw-r--r-- | include/asm-powerpc/cputable.h | 10 | ||||
-rw-r--r-- | include/asm-powerpc/dcr-native.h | 37 | ||||
-rw-r--r-- | include/asm-powerpc/dcr.h | 2 | ||||
-rw-r--r-- | include/asm-ppc/reg_booke.h | 36 | ||||
-rw-r--r-- | include/linux/fsl_devices.h | 1 |
5 files changed, 48 insertions, 38 deletions
diff --git a/include/asm-powerpc/cputable.h b/include/asm-powerpc/cputable.h index 782adbf1f7aa..7384b8086b75 100644 --- a/include/asm-powerpc/cputable.h +++ b/include/asm-powerpc/cputable.h | |||
@@ -126,6 +126,7 @@ extern void do_feature_fixups(unsigned long value, void *fixup_start, | |||
126 | #define CPU_FTR_NODSISRALIGN ASM_CONST(0x0000000000100000) | 126 | #define CPU_FTR_NODSISRALIGN ASM_CONST(0x0000000000100000) |
127 | #define CPU_FTR_PPC_LE ASM_CONST(0x0000000000200000) | 127 | #define CPU_FTR_PPC_LE ASM_CONST(0x0000000000200000) |
128 | #define CPU_FTR_REAL_LE ASM_CONST(0x0000000000400000) | 128 | #define CPU_FTR_REAL_LE ASM_CONST(0x0000000000400000) |
129 | #define CPU_FTR_FPU_UNAVAILABLE ASM_CONST(0x0000000000800000) | ||
129 | 130 | ||
130 | /* | 131 | /* |
131 | * Add the 64-bit processor unique features in the top half of the word; | 132 | * Add the 64-bit processor unique features in the top half of the word; |
@@ -296,6 +297,9 @@ extern void do_feature_fixups(unsigned long value, void *fixup_start, | |||
296 | #define CPU_FTRS_E300 (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE | \ | 297 | #define CPU_FTRS_E300 (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE | \ |
297 | CPU_FTR_USE_TB | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_HAS_HIGH_BATS | \ | 298 | CPU_FTR_USE_TB | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_HAS_HIGH_BATS | \ |
298 | CPU_FTR_COMMON) | 299 | CPU_FTR_COMMON) |
300 | #define CPU_FTRS_E300C2 (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE | \ | ||
301 | CPU_FTR_USE_TB | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_HAS_HIGH_BATS | \ | ||
302 | CPU_FTR_COMMON | CPU_FTR_FPU_UNAVAILABLE) | ||
299 | #define CPU_FTRS_CLASSIC32 (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \ | 303 | #define CPU_FTRS_CLASSIC32 (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \ |
300 | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE) | 304 | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE) |
301 | #define CPU_FTRS_8XX (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB) | 305 | #define CPU_FTRS_8XX (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB) |
@@ -366,7 +370,8 @@ enum { | |||
366 | CPU_FTRS_7450_21 | CPU_FTRS_7450_23 | CPU_FTRS_7455_1 | | 370 | CPU_FTRS_7450_21 | CPU_FTRS_7450_23 | CPU_FTRS_7455_1 | |
367 | CPU_FTRS_7455_20 | CPU_FTRS_7455 | CPU_FTRS_7447_10 | | 371 | CPU_FTRS_7455_20 | CPU_FTRS_7455 | CPU_FTRS_7447_10 | |
368 | CPU_FTRS_7447 | CPU_FTRS_7447A | CPU_FTRS_82XX | | 372 | CPU_FTRS_7447 | CPU_FTRS_7447A | CPU_FTRS_82XX | |
369 | CPU_FTRS_G2_LE | CPU_FTRS_E300 | CPU_FTRS_CLASSIC32 | | 373 | CPU_FTRS_G2_LE | CPU_FTRS_E300 | CPU_FTRS_E300C2 | |
374 | CPU_FTRS_CLASSIC32 | | ||
370 | #else | 375 | #else |
371 | CPU_FTRS_GENERIC_32 | | 376 | CPU_FTRS_GENERIC_32 | |
372 | #endif | 377 | #endif |
@@ -405,7 +410,8 @@ enum { | |||
405 | CPU_FTRS_7450_21 & CPU_FTRS_7450_23 & CPU_FTRS_7455_1 & | 410 | CPU_FTRS_7450_21 & CPU_FTRS_7450_23 & CPU_FTRS_7455_1 & |
406 | CPU_FTRS_7455_20 & CPU_FTRS_7455 & CPU_FTRS_7447_10 & | 411 | CPU_FTRS_7455_20 & CPU_FTRS_7455 & CPU_FTRS_7447_10 & |
407 | CPU_FTRS_7447 & CPU_FTRS_7447A & CPU_FTRS_82XX & | 412 | CPU_FTRS_7447 & CPU_FTRS_7447A & CPU_FTRS_82XX & |
408 | CPU_FTRS_G2_LE & CPU_FTRS_E300 & CPU_FTRS_CLASSIC32 & | 413 | CPU_FTRS_G2_LE & CPU_FTRS_E300 & CPU_FTRS_E300C2 & |
414 | CPU_FTRS_CLASSIC32 & | ||
409 | #else | 415 | #else |
410 | CPU_FTRS_GENERIC_32 & | 416 | CPU_FTRS_GENERIC_32 & |
411 | #endif | 417 | #endif |
diff --git a/include/asm-powerpc/dcr-native.h b/include/asm-powerpc/dcr-native.h index fd4a5f5e33d1..d7a1bc1551c6 100644 --- a/include/asm-powerpc/dcr-native.h +++ b/include/asm-powerpc/dcr-native.h | |||
@@ -20,8 +20,7 @@ | |||
20 | #ifndef _ASM_POWERPC_DCR_NATIVE_H | 20 | #ifndef _ASM_POWERPC_DCR_NATIVE_H |
21 | #define _ASM_POWERPC_DCR_NATIVE_H | 21 | #define _ASM_POWERPC_DCR_NATIVE_H |
22 | #ifdef __KERNEL__ | 22 | #ifdef __KERNEL__ |
23 | 23 | #ifndef __ASSEMBLY__ | |
24 | #include <asm/reg.h> | ||
25 | 24 | ||
26 | typedef struct {} dcr_host_t; | 25 | typedef struct {} dcr_host_t; |
27 | 26 | ||
@@ -32,7 +31,41 @@ typedef struct {} dcr_host_t; | |||
32 | #define dcr_read(host, dcr_n) mfdcr(dcr_n) | 31 | #define dcr_read(host, dcr_n) mfdcr(dcr_n) |
33 | #define dcr_write(host, dcr_n, value) mtdcr(dcr_n, value) | 32 | #define dcr_write(host, dcr_n, value) mtdcr(dcr_n, value) |
34 | 33 | ||
34 | /* Device Control Registers */ | ||
35 | void __mtdcr(int reg, unsigned int val); | ||
36 | unsigned int __mfdcr(int reg); | ||
37 | #define mfdcr(rn) \ | ||
38 | ({unsigned int rval; \ | ||
39 | if (__builtin_constant_p(rn)) \ | ||
40 | asm volatile("mfdcr %0," __stringify(rn) \ | ||
41 | : "=r" (rval)); \ | ||
42 | else \ | ||
43 | rval = __mfdcr(rn); \ | ||
44 | rval;}) | ||
45 | |||
46 | #define mtdcr(rn, v) \ | ||
47 | do { \ | ||
48 | if (__builtin_constant_p(rn)) \ | ||
49 | asm volatile("mtdcr " __stringify(rn) ",%0" \ | ||
50 | : : "r" (v)); \ | ||
51 | else \ | ||
52 | __mtdcr(rn, v); \ | ||
53 | } while (0) | ||
54 | |||
55 | /* R/W of indirect DCRs make use of standard naming conventions for DCRs */ | ||
56 | #define mfdcri(base, reg) \ | ||
57 | ({ \ | ||
58 | mtdcr(base ## _CFGADDR, base ## _ ## reg); \ | ||
59 | mfdcr(base ## _CFGDATA); \ | ||
60 | }) | ||
61 | |||
62 | #define mtdcri(base, reg, data) \ | ||
63 | do { \ | ||
64 | mtdcr(base ## _CFGADDR, base ## _ ## reg); \ | ||
65 | mtdcr(base ## _CFGDATA, data); \ | ||
66 | } while (0) | ||
35 | 67 | ||
68 | #endif /* __ASSEMBLY__ */ | ||
36 | #endif /* __KERNEL__ */ | 69 | #endif /* __KERNEL__ */ |
37 | #endif /* _ASM_POWERPC_DCR_NATIVE_H */ | 70 | #endif /* _ASM_POWERPC_DCR_NATIVE_H */ |
38 | 71 | ||
diff --git a/include/asm-powerpc/dcr.h b/include/asm-powerpc/dcr.h index 473f2c7fd892..b66c5e6941f0 100644 --- a/include/asm-powerpc/dcr.h +++ b/include/asm-powerpc/dcr.h | |||
@@ -20,6 +20,7 @@ | |||
20 | #ifndef _ASM_POWERPC_DCR_H | 20 | #ifndef _ASM_POWERPC_DCR_H |
21 | #define _ASM_POWERPC_DCR_H | 21 | #define _ASM_POWERPC_DCR_H |
22 | #ifdef __KERNEL__ | 22 | #ifdef __KERNEL__ |
23 | #ifdef CONFIG_PPC_DCR | ||
23 | 24 | ||
24 | #ifdef CONFIG_PPC_DCR_NATIVE | 25 | #ifdef CONFIG_PPC_DCR_NATIVE |
25 | #include <asm/dcr-native.h> | 26 | #include <asm/dcr-native.h> |
@@ -38,5 +39,6 @@ extern unsigned int dcr_resource_len(struct device_node *np, | |||
38 | unsigned int index); | 39 | unsigned int index); |
39 | #endif /* CONFIG_PPC_MERGE */ | 40 | #endif /* CONFIG_PPC_MERGE */ |
40 | 41 | ||
42 | #endif /* CONFIG_PPC_DCR */ | ||
41 | #endif /* __KERNEL__ */ | 43 | #endif /* __KERNEL__ */ |
42 | #endif /* _ASM_POWERPC_DCR_H */ | 44 | #endif /* _ASM_POWERPC_DCR_H */ |
diff --git a/include/asm-ppc/reg_booke.h b/include/asm-ppc/reg_booke.h index 602fbadeaf48..a263fc1e65c4 100644 --- a/include/asm-ppc/reg_booke.h +++ b/include/asm-ppc/reg_booke.h | |||
@@ -9,41 +9,9 @@ | |||
9 | #ifndef __ASM_PPC_REG_BOOKE_H__ | 9 | #ifndef __ASM_PPC_REG_BOOKE_H__ |
10 | #define __ASM_PPC_REG_BOOKE_H__ | 10 | #define __ASM_PPC_REG_BOOKE_H__ |
11 | 11 | ||
12 | #ifndef __ASSEMBLY__ | 12 | #include <asm/dcr.h> |
13 | /* Device Control Registers */ | ||
14 | void __mtdcr(int reg, unsigned int val); | ||
15 | unsigned int __mfdcr(int reg); | ||
16 | #define mfdcr(rn) \ | ||
17 | ({unsigned int rval; \ | ||
18 | if (__builtin_constant_p(rn)) \ | ||
19 | asm volatile("mfdcr %0," __stringify(rn) \ | ||
20 | : "=r" (rval)); \ | ||
21 | else \ | ||
22 | rval = __mfdcr(rn); \ | ||
23 | rval;}) | ||
24 | |||
25 | #define mtdcr(rn, v) \ | ||
26 | do { \ | ||
27 | if (__builtin_constant_p(rn)) \ | ||
28 | asm volatile("mtdcr " __stringify(rn) ",%0" \ | ||
29 | : : "r" (v)); \ | ||
30 | else \ | ||
31 | __mtdcr(rn, v); \ | ||
32 | } while (0) | ||
33 | |||
34 | /* R/W of indirect DCRs make use of standard naming conventions for DCRs */ | ||
35 | #define mfdcri(base, reg) \ | ||
36 | ({ \ | ||
37 | mtdcr(base ## _CFGADDR, base ## _ ## reg); \ | ||
38 | mfdcr(base ## _CFGDATA); \ | ||
39 | }) | ||
40 | |||
41 | #define mtdcri(base, reg, data) \ | ||
42 | do { \ | ||
43 | mtdcr(base ## _CFGADDR, base ## _ ## reg); \ | ||
44 | mtdcr(base ## _CFGDATA, data); \ | ||
45 | } while (0) | ||
46 | 13 | ||
14 | #ifndef __ASSEMBLY__ | ||
47 | /* Performance Monitor Registers */ | 15 | /* Performance Monitor Registers */ |
48 | #define mfpmr(rn) ({unsigned int rval; \ | 16 | #define mfpmr(rn) ({unsigned int rval; \ |
49 | asm volatile("mfpmr %0," __stringify(rn) \ | 17 | asm volatile("mfpmr %0," __stringify(rn) \ |
diff --git a/include/linux/fsl_devices.h b/include/linux/fsl_devices.h index 3da29e2d524a..abb64c437f6f 100644 --- a/include/linux/fsl_devices.h +++ b/include/linux/fsl_devices.h | |||
@@ -19,6 +19,7 @@ | |||
19 | #define _FSL_DEVICE_H_ | 19 | #define _FSL_DEVICE_H_ |
20 | 20 | ||
21 | #include <linux/types.h> | 21 | #include <linux/types.h> |
22 | #include <linux/phy.h> | ||
22 | 23 | ||
23 | /* | 24 | /* |
24 | * Some conventions on how we handle peripherals on Freescale chips | 25 | * Some conventions on how we handle peripherals on Freescale chips |