diff options
| author | eric miao <eric.y.miao@gmail.com> | 2007-11-26 21:12:19 -0500 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2007-11-29 15:52:28 -0500 |
| commit | 7267d1ccdb5ef08289323461db3551570fa1ab27 (patch) | |
| tree | b2fb24dc6dc66bbe959d5a57860c273453a19451 /include | |
| parent | fa7f1518e8a107e1feab0357b18c745b9a6927c5 (diff) | |
[ARM] 4672/1: pxa: fix DRCMR(n) to support PXA27x and later processors
Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include')
| -rw-r--r-- | include/asm-arm/arch-pxa/pxa-regs.h | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h index bb68b598c436..6b33df6f1995 100644 --- a/include/asm-arm/arch-pxa/pxa-regs.h +++ b/include/asm-arm/arch-pxa/pxa-regs.h | |||
| @@ -110,7 +110,10 @@ | |||
| 110 | #define DALGN __REG(0x400000a0) /* DMA Alignment Register */ | 110 | #define DALGN __REG(0x400000a0) /* DMA Alignment Register */ |
| 111 | #define DINT __REG(0x400000f0) /* DMA Interrupt Register */ | 111 | #define DINT __REG(0x400000f0) /* DMA Interrupt Register */ |
| 112 | 112 | ||
| 113 | #define DRCMR(n) __REG2(0x40000100, (n)<<2) | 113 | #define DRCMR(n) (*(((n) < 64) ? \ |
| 114 | &__REG2(0x40000100, ((n) & 0x3f) << 2) : \ | ||
| 115 | &__REG2(0x40001100, ((n) & 0x3f) << 2))) | ||
| 116 | |||
| 114 | #define DRCMR0 __REG(0x40000100) /* Request to Channel Map Register for DREQ 0 */ | 117 | #define DRCMR0 __REG(0x40000100) /* Request to Channel Map Register for DREQ 0 */ |
| 115 | #define DRCMR1 __REG(0x40000104) /* Request to Channel Map Register for DREQ 1 */ | 118 | #define DRCMR1 __REG(0x40000104) /* Request to Channel Map Register for DREQ 1 */ |
| 116 | #define DRCMR2 __REG(0x40000108) /* Request to Channel Map Register for I2S receive Request */ | 119 | #define DRCMR2 __REG(0x40000108) /* Request to Channel Map Register for I2S receive Request */ |