Merge master.kernel.org:/home/rmk/linux-2.6-arm

* master.kernel.org:/home/rmk/linux-2.6-arm:
  [ARM] Fix cosmetic typo in asm/irq.h
  [ARM] 3367/1: CLCD mode no longer supported on the RealView boards
  [ARM] 3366/1: Allow the 16bpp mode configuration in the CLCD control register

2 files changed, 12 insertions, 2 deletions

diff --git a/include/asm-arm/irq.h b/include/asm-arm/irq.h
index 7772432d3fd7..60b5105c9c93 100644
--- a/include/asm-arm/irq.h
+++ b/include/asm-arm/irq.h
@@ -27,7 +27,7 @@ extern void enable_irq(unsigned int);
 
 /*
  * These correspond with the SA_TRIGGER_* defines, and therefore the
- * IRQRESOURCE_IRQ_* defines.
+ * IORESOURCE_IRQ_* defines.
  */
 #define __IRQT_RISEDGE  (1 << 0)
 #define __IRQT_FALEDGE  (1 << 1)
diff --git a/include/linux/amba/clcd.h b/include/linux/amba/clcd.h
index 6b8d73dc1ab0..9cf64b1b688b 100644
--- a/include/linux/amba/clcd.h
+++ b/include/linux/amba/clcd.h
@@ -54,6 +54,7 @@
 #define CNTL_LCDBPP4            (2 << 1)
 #define CNTL_LCDBPP8            (3 << 1)
 #define CNTL_LCDBPP16           (4 << 1)
+#define CNTL_LCDBPP16_565       (6 << 1)
 #define CNTL_LCDBPP24           (5 << 1)
 #define CNTL_LCDBW              (1 << 4)
 #define CNTL_LCDTFT             (1 << 5)
@@ -209,7 +210,16 @@ static inline void clcdfb_decode(struct clcd_fb *fb, struct clcd_regs *regs)
                 val |= CNTL_LCDBPP8;
                 break;
         case 16:
-                val |= CNTL_LCDBPP16;
+                /*
+                 * PL110 cannot choose between 5551 and 565 modes in
+                 * its control register
+                 */
+                if ((fb->dev->periphid & 0x000fffff) == 0x00041110)
+                        val |= CNTL_LCDBPP16;
+                else if (fb->fb.var.green.length == 5)
+                        val |= CNTL_LCDBPP16;
+                else
+                        val |= CNTL_LCDBPP16_565;
                 break;
         case 32:
                 val |= CNTL_LCDBPP24;