diff options
author | Olof Johansson <olof@lixom.net> | 2007-01-28 22:23:54 -0500 |
---|---|---|
committer | Paul Mackerras <paulus@samba.org> | 2007-02-06 22:03:19 -0500 |
commit | 1bd2e5ae18a8f93333707d81d3dbd9209a255137 (patch) | |
tree | 72feb6bae2a8dea311e2d9f2e412cfbc69a952fb /include | |
parent | c69b767a2c871bb80cb9e346d6ebce248f711dfb (diff) |
[POWERPC] Add PMC type to cputable
Add cputable entries for which type of PMC implementation the processor
has.
I've only filled in the current 64-bit processors, the unfilled default
value will have same behaviour as before so it can be done over time
as needed.
Also tidy up the dummy_perf implementation a bit, aggregating it into
one function with ifdefs instead of several.
Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'include')
-rw-r--r-- | include/asm-powerpc/cputable.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/include/asm-powerpc/cputable.h b/include/asm-powerpc/cputable.h index 80e314d2f247..e870b5393175 100644 --- a/include/asm-powerpc/cputable.h +++ b/include/asm-powerpc/cputable.h | |||
@@ -50,6 +50,12 @@ enum powerpc_oprofile_type { | |||
50 | PPC_OPROFILE_CELL = 5, | 50 | PPC_OPROFILE_CELL = 5, |
51 | }; | 51 | }; |
52 | 52 | ||
53 | enum powerpc_pmc_type { | ||
54 | PPC_PMC_DEFAULT = 0, | ||
55 | PPC_PMC_IBM = 1, | ||
56 | PPC_PMC_PA6T = 2, | ||
57 | }; | ||
58 | |||
53 | struct cpu_spec { | 59 | struct cpu_spec { |
54 | /* CPU is matched via (PVR & pvr_mask) == pvr_value */ | 60 | /* CPU is matched via (PVR & pvr_mask) == pvr_value */ |
55 | unsigned int pvr_mask; | 61 | unsigned int pvr_mask; |
@@ -65,6 +71,7 @@ struct cpu_spec { | |||
65 | 71 | ||
66 | /* number of performance monitor counters */ | 72 | /* number of performance monitor counters */ |
67 | unsigned int num_pmcs; | 73 | unsigned int num_pmcs; |
74 | enum powerpc_pmc_type pmc_type; | ||
68 | 75 | ||
69 | /* this is called to initialize various CPU bits like L1 cache, | 76 | /* this is called to initialize various CPU bits like L1 cache, |
70 | * BHT, SPD, etc... from head.S before branching to identify_machine | 77 | * BHT, SPD, etc... from head.S before branching to identify_machine |