diff options
author | Maciej W. Rozycki <macro@linux-mips.org> | 2007-05-08 03:37:48 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-05-08 14:15:27 -0400 |
commit | 86c6f7d08b2868ba7cc1ef509c76ee9e9266af40 (patch) | |
tree | 0054449648223eada54e451f4e29dd8d09e9fd6c /include | |
parent | 9a268a629be4c15ed85c88a61d712d92aa943847 (diff) |
tgafb: TURBOchannel support
This is support for the TC variations of the TGA boards (properly known as
SFB+ or Smart Frame Buffer Plus boards). The 8-plane SFB+ board uses the
Bt459 RAMDAC (unlike its PCI TGA counterpart, which uses the Bt485), so
bits have been added to support this chip as well.
Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: "Antonino A. Daplas" <adaplas@pol.net>
Cc: James Simmons <jsimmons@infradead.org>
Acked-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'include')
-rw-r--r-- | include/video/tgafb.h | 47 |
1 files changed, 44 insertions, 3 deletions
diff --git a/include/video/tgafb.h b/include/video/tgafb.h index be2b3e94e251..03d0dbe293a8 100644 --- a/include/video/tgafb.h +++ b/include/video/tgafb.h | |||
@@ -39,6 +39,7 @@ | |||
39 | #define TGA_RASTEROP_REG 0x0034 | 39 | #define TGA_RASTEROP_REG 0x0034 |
40 | #define TGA_PIXELSHIFT_REG 0x0038 | 40 | #define TGA_PIXELSHIFT_REG 0x0038 |
41 | #define TGA_DEEP_REG 0x0050 | 41 | #define TGA_DEEP_REG 0x0050 |
42 | #define TGA_START_REG 0x0054 | ||
42 | #define TGA_PIXELMASK_REG 0x005c | 43 | #define TGA_PIXELMASK_REG 0x005c |
43 | #define TGA_CURSOR_BASE_REG 0x0060 | 44 | #define TGA_CURSOR_BASE_REG 0x0060 |
44 | #define TGA_HORIZ_REG 0x0064 | 45 | #define TGA_HORIZ_REG 0x0064 |
@@ -140,7 +141,7 @@ | |||
140 | 141 | ||
141 | 142 | ||
142 | /* | 143 | /* |
143 | * Useful defines for managing the BT463 on the 24-plane TGAs | 144 | * Useful defines for managing the BT463 on the 24-plane TGAs/SFB+s |
144 | */ | 145 | */ |
145 | 146 | ||
146 | #define BT463_ADDR_LO 0x0 | 147 | #define BT463_ADDR_LO 0x0 |
@@ -168,12 +169,35 @@ | |||
168 | #define BT463_WINDOW_TYPE_BASE 0x0300 | 169 | #define BT463_WINDOW_TYPE_BASE 0x0300 |
169 | 170 | ||
170 | /* | 171 | /* |
172 | * Useful defines for managing the BT459 on the 8-plane SFB+s | ||
173 | */ | ||
174 | |||
175 | #define BT459_ADDR_LO 0x0 | ||
176 | #define BT459_ADDR_HI 0x1 | ||
177 | #define BT459_REG_ACC 0x2 | ||
178 | #define BT459_PALETTE 0x3 | ||
179 | |||
180 | #define BT459_CUR_CLR_1 0x0181 | ||
181 | #define BT459_CUR_CLR_2 0x0182 | ||
182 | #define BT459_CUR_CLR_3 0x0183 | ||
183 | |||
184 | #define BT459_CMD_REG_0 0x0201 | ||
185 | #define BT459_CMD_REG_1 0x0202 | ||
186 | #define BT459_CMD_REG_2 0x0203 | ||
187 | |||
188 | #define BT459_READ_MASK 0x0204 | ||
189 | |||
190 | #define BT459_BLINK_MASK 0x0206 | ||
191 | |||
192 | #define BT459_CUR_CMD_REG 0x0300 | ||
193 | |||
194 | /* | ||
171 | * The framebuffer driver private data. | 195 | * The framebuffer driver private data. |
172 | */ | 196 | */ |
173 | 197 | ||
174 | struct tga_par { | 198 | struct tga_par { |
175 | /* PCI device. */ | 199 | /* PCI/TC device. */ |
176 | struct pci_dev *pdev; | 200 | struct device *dev; |
177 | 201 | ||
178 | /* Device dependent information. */ | 202 | /* Device dependent information. */ |
179 | void __iomem *tga_mem_base; | 203 | void __iomem *tga_mem_base; |
@@ -235,4 +259,21 @@ BT463_WRITE(struct tga_par *par, u32 m, u16 a, u8 v) | |||
235 | TGA_WRITE_REG(par, m << 10 | v, TGA_RAMDAC_REG); | 259 | TGA_WRITE_REG(par, m << 10 | v, TGA_RAMDAC_REG); |
236 | } | 260 | } |
237 | 261 | ||
262 | static inline void | ||
263 | BT459_LOAD_ADDR(struct tga_par *par, u16 a) | ||
264 | { | ||
265 | TGA_WRITE_REG(par, BT459_ADDR_LO << 2, TGA_RAMDAC_SETUP_REG); | ||
266 | TGA_WRITE_REG(par, a & 0xff, TGA_RAMDAC_REG); | ||
267 | TGA_WRITE_REG(par, BT459_ADDR_HI << 2, TGA_RAMDAC_SETUP_REG); | ||
268 | TGA_WRITE_REG(par, a >> 8, TGA_RAMDAC_REG); | ||
269 | } | ||
270 | |||
271 | static inline void | ||
272 | BT459_WRITE(struct tga_par *par, u32 m, u16 a, u8 v) | ||
273 | { | ||
274 | BT459_LOAD_ADDR(par, a); | ||
275 | TGA_WRITE_REG(par, m << 2, TGA_RAMDAC_SETUP_REG); | ||
276 | TGA_WRITE_REG(par, v, TGA_RAMDAC_REG); | ||
277 | } | ||
278 | |||
238 | #endif /* TGAFB_H */ | 279 | #endif /* TGAFB_H */ |