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authorLennert Buytenhek <buytenh@wantstofly.org>2006-04-09 17:20:57 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2006-04-09 17:20:57 -0400
commit932355797530f5bd4e1355a2c384e9f3ccc3dcbc (patch)
tree97ef892c3b02b3275731e898a46c6c2a6b9f1f98 /include
parentc5b8ef62b5df9530c573f00f4106742661425392 (diff)
[ARM] 3459/1: ixp23xx: fix debug serial macros for big-endian operation
Patch from Lennert Buytenhek The debug-8250 macros do byte accesses, which means that if we're in big-endian mode, we need to logically OR the UART address with 3, as the LSB byte lane (where UART data and status is transferred) has the highest byte address in the word when we are in big-endian mode. It's unclear why this problem didn't surface earlier. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include')
-rw-r--r--include/asm-arm/arch-ixp23xx/debug-macro.S3
1 files changed, 3 insertions, 0 deletions
diff --git a/include/asm-arm/arch-ixp23xx/debug-macro.S b/include/asm-arm/arch-ixp23xx/debug-macro.S
index eb99fd69fd24..2b25e640247d 100644
--- a/include/asm-arm/arch-ixp23xx/debug-macro.S
+++ b/include/asm-arm/arch-ixp23xx/debug-macro.S
@@ -17,6 +17,9 @@
17 tst \rx, #1 @ mmu enabled? 17 tst \rx, #1 @ mmu enabled?
18 ldreq \rx, =IXP23XX_PERIPHERAL_PHYS @ physical 18 ldreq \rx, =IXP23XX_PERIPHERAL_PHYS @ physical
19 ldrne \rx, =IXP23XX_PERIPHERAL_VIRT @ virtual 19 ldrne \rx, =IXP23XX_PERIPHERAL_VIRT @ virtual
20#ifdef __ARMEB__
21 orr \rx, \rx, #0x00000003
22#endif
20 .endm 23 .endm
21 24
22#define UART_SHIFT 2 25#define UART_SHIFT 2