[PATCH] powerpc: oprofile support for POWER6

POWER6 moves some of the MMCRA bits and also requires some bits to be
cleared each PMU interrupt.

Signed-off-by: Michael Neuling <mikey@neuling.org>
Acked-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>

2 files changed, 12 insertions, 3 deletions

diff --git a/include/asm-powerpc/cputable.h b/include/asm-powerpc/cputable.h
index 9fcf0162d859..defc166379d2 100644
--- a/include/asm-powerpc/cputable.h
+++ b/include/asm-powerpc/cputable.h
@@ -69,6 +69,13 @@ struct cpu_spec {
         /* Processor specific oprofile operations */
         enum powerpc_oprofile_type oprofile_type;
 
+        /* Bit locations inside the mmcra change */
+        unsigned long   oprofile_mmcra_sihv;
+        unsigned long   oprofile_mmcra_sipr;
+
+        /* Bits to clear during an oprofile exception */
+        unsigned long   oprofile_mmcra_clear;
+
         /* Name of processor class, for the ELF AT_PLATFORM entry */
         char            *platform;
 };
@@ -117,7 +124,6 @@ extern void do_cpu_ftr_fixups(unsigned long offset);
 #define CPU_FTR_SMT                     ASM_CONST(0x0000010000000000)
 #define CPU_FTR_COHERENT_ICACHE         ASM_CONST(0x0000020000000000)
 #define CPU_FTR_LOCKLESS_TLBIE          ASM_CONST(0x0000040000000000)
-#define CPU_FTR_MMCRA_SIHV              ASM_CONST(0x0000080000000000)
 #define CPU_FTR_CI_LARGE_PAGE           ASM_CONST(0x0000100000000000)
 #define CPU_FTR_PAUSE_ZERO              ASM_CONST(0x0000200000000000)
 #define CPU_FTR_PURR                    ASM_CONST(0x0000400000000000)
@@ -134,7 +140,6 @@ extern void do_cpu_ftr_fixups(unsigned long offset);
 #define CPU_FTR_SMT                     ASM_CONST(0x0)
 #define CPU_FTR_COHERENT_ICACHE         ASM_CONST(0x0)
 #define CPU_FTR_LOCKLESS_TLBIE          ASM_CONST(0x0)
-#define CPU_FTR_MMCRA_SIHV              ASM_CONST(0x0)
 #define CPU_FTR_CI_LARGE_PAGE           ASM_CONST(0x0)
 #define CPU_FTR_PURR                    ASM_CONST(0x0)
 #endif
@@ -320,7 +325,7 @@ extern void do_cpu_ftr_fixups(unsigned long offset);
             CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | \
             CPU_FTR_MMCRA | CPU_FTR_SMT | \
             CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \
-            CPU_FTR_MMCRA_SIHV | CPU_FTR_PURR)
+            CPU_FTR_PURR)
 #define CPU_FTRS_POWER6 (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \
             CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | \
             CPU_FTR_MMCRA | CPU_FTR_SMT | \
diff --git a/include/asm-powerpc/reg.h b/include/asm-powerpc/reg.h
index 0257189d5017..3779b21a7c71 100644
--- a/include/asm-powerpc/reg.h
+++ b/include/asm-powerpc/reg.h
@@ -443,6 +443,10 @@
 #define   MMCRA_SIHV    0x10000000UL /* state of MSR HV when SIAR set */
 #define   MMCRA_SIPR    0x08000000UL /* state of MSR PR when SIAR set */
 #define   MMCRA_SAMPLE_ENABLE 0x00000001UL /* enable sampling */
+#define   POWER6_MMCRA_SIHV   0x0000040000000000ULL
+#define   POWER6_MMCRA_SIPR   0x0000020000000000ULL
+#define   POWER6_MMCRA_THRM     0x00000020UL
+#define   POWER6_MMCRA_OTHER    0x0000000EUL
 #define SPRN_PMC1       787
 #define SPRN_PMC2       788
 #define SPRN_PMC3       789