diff options
author | Maciej W. Rozycki <macro@linux-mips.org> | 2005-02-22 16:49:17 -0500 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2005-10-29 14:30:43 -0400 |
commit | 4912ba72d6e27d0f19ec062ffd00a8c0165a2f67 (patch) | |
tree | 6d72de32927d245e31e63013566807a24ae0ec12 /include | |
parent | b727a60258730b331519fedda503a8da78638791 (diff) |
Define mem_*() I/O accessory functions that preserve byte addresses.
Add missing ____raw_*q() functions.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include')
-rw-r--r-- | include/asm-mips/io.h | 46 |
1 files changed, 27 insertions, 19 deletions
diff --git a/include/asm-mips/io.h b/include/asm-mips/io.h index 1f2fe11f4124..644c085e29f3 100644 --- a/include/asm-mips/io.h +++ b/include/asm-mips/io.h | |||
@@ -34,7 +34,7 @@ | |||
34 | #undef CONF_SLOWDOWN_IO | 34 | #undef CONF_SLOWDOWN_IO |
35 | 35 | ||
36 | /* | 36 | /* |
37 | * Raw operations are never swapped in software. Otoh values that raw | 37 | * Raw operations are never swapped in software. OTOH values that raw |
38 | * operations are working on may or may not have been swapped by the bus | 38 | * operations are working on may or may not have been swapped by the bus |
39 | * hardware. An example use would be for flash memory that's used for | 39 | * hardware. An example use would be for flash memory that's used for |
40 | * execute in place. | 40 | * execute in place. |
@@ -43,45 +43,53 @@ | |||
43 | # define __raw_ioswabw(x) (x) | 43 | # define __raw_ioswabw(x) (x) |
44 | # define __raw_ioswabl(x) (x) | 44 | # define __raw_ioswabl(x) (x) |
45 | # define __raw_ioswabq(x) (x) | 45 | # define __raw_ioswabq(x) (x) |
46 | # define ____raw_ioswabq(x) (x) | ||
46 | 47 | ||
47 | /* | 48 | /* |
48 | * Sane hardware offers swapping of PCI/ISA I/O space accesses in hardware; | 49 | * Sane hardware offers swapping of PCI/ISA I/O space accesses in hardware; |
49 | * less sane hardware forces software to fiddle with this... | 50 | * less sane hardware forces software to fiddle with this... |
51 | * | ||
52 | * Regardless, if the host bus endianness mismatches that of PCI/ISA, then | ||
53 | * you can't have the numerical value of data and byte addresses within | ||
54 | * multibyte quantities both preserved at the same time. Hence two | ||
55 | * variations of functions: non-prefixed ones that preserve the value | ||
56 | * and prefixed ones that preserve byte addresses. The latters are | ||
57 | * typically used for moving raw data between a peripheral and memory (cf. | ||
58 | * string I/O functions), hence the "mem_" prefix. | ||
50 | */ | 59 | */ |
51 | #if defined(CONFIG_SWAP_IO_SPACE) | 60 | #if defined(CONFIG_SWAP_IO_SPACE) |
52 | 61 | ||
53 | # define ioswabb(x) (x) | 62 | # define ioswabb(x) (x) |
63 | # define mem_ioswabb(x) (x) | ||
54 | # ifdef CONFIG_SGI_IP22 | 64 | # ifdef CONFIG_SGI_IP22 |
55 | /* | 65 | /* |
56 | * IP22 seems braindead enough to swap 16bits values in hardware, but | 66 | * IP22 seems braindead enough to swap 16bits values in hardware, but |
57 | * not 32bits. Go figure... Can't tell without documentation. | 67 | * not 32bits. Go figure... Can't tell without documentation. |
58 | */ | 68 | */ |
59 | # define ioswabw(x) (x) | 69 | # define ioswabw(x) (x) |
70 | # define mem_ioswabw(x) le16_to_cpu(x) | ||
60 | # else | 71 | # else |
61 | # define ioswabw(x) le16_to_cpu(x) | 72 | # define ioswabw(x) le16_to_cpu(x) |
73 | # define mem_ioswabw(x) (x) | ||
62 | # endif | 74 | # endif |
63 | # define ioswabl(x) le32_to_cpu(x) | 75 | # define ioswabl(x) le32_to_cpu(x) |
76 | # define mem_ioswabl(x) (x) | ||
64 | # define ioswabq(x) le64_to_cpu(x) | 77 | # define ioswabq(x) le64_to_cpu(x) |
78 | # define mem_ioswabq(x) (x) | ||
65 | 79 | ||
66 | #else | 80 | #else |
67 | 81 | ||
68 | # define ioswabb(x) (x) | 82 | # define ioswabb(x) (x) |
83 | # define mem_ioswabb(x) (x) | ||
69 | # define ioswabw(x) (x) | 84 | # define ioswabw(x) (x) |
85 | # define mem_ioswabw(x) cpu_to_le16(x) | ||
70 | # define ioswabl(x) (x) | 86 | # define ioswabl(x) (x) |
87 | # define mem_ioswabl(x) cpu_to_le32(x) | ||
71 | # define ioswabq(x) (x) | 88 | # define ioswabq(x) (x) |
89 | # define mem_ioswabq(x) cpu_to_le32(x) | ||
72 | 90 | ||
73 | #endif | 91 | #endif |
74 | 92 | ||
75 | /* | ||
76 | * Native bus accesses never swapped. | ||
77 | */ | ||
78 | #define bus_ioswabb(x) (x) | ||
79 | #define bus_ioswabw(x) (x) | ||
80 | #define bus_ioswabl(x) (x) | ||
81 | #define bus_ioswabq(x) (x) | ||
82 | |||
83 | #define __bus_ioswabq bus_ioswabq | ||
84 | |||
85 | #define IO_SPACE_LIMIT 0xffff | 93 | #define IO_SPACE_LIMIT 0xffff |
86 | 94 | ||
87 | /* | 95 | /* |
@@ -388,15 +396,15 @@ __BUILD_IOPORT_SINGLE(bus, bwlq, type, _p, SLOW_DOWN_IO) | |||
388 | 396 | ||
389 | #define BUILDIO(bwlq, type) \ | 397 | #define BUILDIO(bwlq, type) \ |
390 | \ | 398 | \ |
391 | __BUILD_MEMORY_PFX(, bwlq, type) \ | ||
392 | __BUILD_MEMORY_PFX(__raw_, bwlq, type) \ | 399 | __BUILD_MEMORY_PFX(__raw_, bwlq, type) \ |
393 | __BUILD_MEMORY_PFX(bus_, bwlq, type) \ | 400 | __BUILD_MEMORY_PFX(, bwlq, type) \ |
401 | __BUILD_MEMORY_PFX(mem_, bwlq, type) \ | ||
394 | __BUILD_IOPORT_PFX(, bwlq, type) \ | 402 | __BUILD_IOPORT_PFX(, bwlq, type) \ |
395 | __BUILD_IOPORT_PFX(__raw_, bwlq, type) | 403 | __BUILD_IOPORT_PFX(mem_, bwlq, type) |
396 | 404 | ||
397 | #define __BUILDIO(bwlq, type) \ | 405 | #define __BUILDIO(bwlq, type) \ |
398 | \ | 406 | \ |
399 | __BUILD_MEMORY_SINGLE(__bus_, bwlq, type, 0) | 407 | __BUILD_MEMORY_SINGLE(____raw_, bwlq, type, 0) |
400 | 408 | ||
401 | BUILDIO(b, u8) | 409 | BUILDIO(b, u8) |
402 | BUILDIO(w, u16) | 410 | BUILDIO(w, u16) |
@@ -424,7 +432,7 @@ static inline void writes##bwlq(volatile void __iomem *mem, void *addr, \ | |||
424 | volatile type *__addr = addr; \ | 432 | volatile type *__addr = addr; \ |
425 | \ | 433 | \ |
426 | while (count--) { \ | 434 | while (count--) { \ |
427 | __raw_write##bwlq(*__addr, mem); \ | 435 | mem_write##bwlq(*__addr, mem); \ |
428 | __addr++; \ | 436 | __addr++; \ |
429 | } \ | 437 | } \ |
430 | } \ | 438 | } \ |
@@ -435,7 +443,7 @@ static inline void reads##bwlq(volatile void __iomem *mem, void *addr, \ | |||
435 | volatile type *__addr = addr; \ | 443 | volatile type *__addr = addr; \ |
436 | \ | 444 | \ |
437 | while (count--) { \ | 445 | while (count--) { \ |
438 | *__addr = __raw_read##bwlq(mem); \ | 446 | *__addr = mem_read##bwlq(mem); \ |
439 | __addr++; \ | 447 | __addr++; \ |
440 | } \ | 448 | } \ |
441 | } | 449 | } |
@@ -448,7 +456,7 @@ static inline void outs##bwlq(unsigned long port, void *addr, \ | |||
448 | volatile type *__addr = addr; \ | 456 | volatile type *__addr = addr; \ |
449 | \ | 457 | \ |
450 | while (count--) { \ | 458 | while (count--) { \ |
451 | __raw_out##bwlq(*__addr, port); \ | 459 | mem_out##bwlq(*__addr, port); \ |
452 | __addr++; \ | 460 | __addr++; \ |
453 | } \ | 461 | } \ |
454 | } \ | 462 | } \ |
@@ -459,7 +467,7 @@ static inline void ins##bwlq(unsigned long port, void *addr, \ | |||
459 | volatile type *__addr = addr; \ | 467 | volatile type *__addr = addr; \ |
460 | \ | 468 | \ |
461 | while (count--) { \ | 469 | while (count--) { \ |
462 | *__addr = __raw_in##bwlq(port); \ | 470 | *__addr = mem_in##bwlq(port); \ |
463 | __addr++; \ | 471 | __addr++; \ |
464 | } \ | 472 | } \ |
465 | } | 473 | } |