diff options
author | Matt Carlson <mcarlson@broadcom.com> | 2009-11-02 09:31:39 -0500 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2009-11-03 02:39:13 -0500 |
commit | 32e5a8d651c0dbb02bf82ca954206282e44c4b11 (patch) | |
tree | 7d8508afb30951c46e3e1edab56f9e664e833275 /include | |
parent | cdd4e09d692bd4f3457b3789279005e112b7696d (diff) |
tg3 / broadcom: Add code to disable rxc refclk
The 5785 does not use the RXC reference clock. Turning it off is
desirable as it saves power.
By default, the 50610 enables the RXC reference clock and the 50610M
disables it. Presumably this is one of the reasons why the hardware
architect chose one over the other.
Adding a "rx reference clock disable" flag is not the ideal way to
describe the option, as it would force the MAC using a 50610M to set
the flag. Ideally we want the flags to represent opt-in behavior that
deviates from hardware defaults. Furthermore, the lack of a
"disable" flag implies that the requester wants the rx reference clock
enabled, which doesn't necessarily follow.
By presenting the option as a passive statement (rx reference clock
unused) rather than a command, I hope to convey an opt-in option to
disable the rx reference clock that falls back to hardware defaults if
not set. A secondary benefit of this is that it keeps the
intelligence about phy defaults in the broadcom module where it belongs
and allows the broadcom module more latitude should a bug arise.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Reviewed-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include')
-rw-r--r-- | include/linux/brcmphy.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/linux/brcmphy.h b/include/linux/brcmphy.h index 6e7ffcee9c80..59432278ded2 100644 --- a/include/linux/brcmphy.h +++ b/include/linux/brcmphy.h | |||
@@ -4,7 +4,7 @@ | |||
4 | #define PHY_BCM_FLAGS_INTF_XAUI 0x00000020 | 4 | #define PHY_BCM_FLAGS_INTF_XAUI 0x00000020 |
5 | #define PHY_BRCM_WIRESPEED_ENABLE 0x00000100 | 5 | #define PHY_BRCM_WIRESPEED_ENABLE 0x00000100 |
6 | #define PHY_BRCM_AUTO_PWRDWN_ENABLE 0x00000200 | 6 | #define PHY_BRCM_AUTO_PWRDWN_ENABLE 0x00000200 |
7 | #define PHY_BRCM_APD_CLK125_ENABLE 0x00000400 | 7 | #define PHY_BRCM_RX_REFCLK_UNUSED 0x00000400 |
8 | #define PHY_BRCM_STD_IBND_DISABLE 0x00000800 | 8 | #define PHY_BRCM_STD_IBND_DISABLE 0x00000800 |
9 | #define PHY_BRCM_EXT_IBND_RX_ENABLE 0x00001000 | 9 | #define PHY_BRCM_EXT_IBND_RX_ENABLE 0x00001000 |
10 | #define PHY_BRCM_EXT_IBND_TX_ENABLE 0x00002000 | 10 | #define PHY_BRCM_EXT_IBND_TX_ENABLE 0x00002000 |