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authorMagnus Damm <damm@igel.co.jp>2007-07-24 22:42:56 -0400
committerPaul Mundt <lethal@linux-sh.org>2007-07-26 02:37:57 -0400
commitd89ddd1c847637d91625c8cb6b0d064e1717057c (patch)
tree7f2547f112e3cd70e06a190fc26ab701dbab71b9 /include
parent32582fa46020cd8940006a8d42dec083d72d6d8b (diff)
sh: remove support for sh7300 and solution engine 7300
This patch removes old dead code: - kill off sh7300 cpu support - get rid of broken solution engine 7300 board support Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'include')
-rw-r--r--include/asm-sh/bugs.h2
-rw-r--r--include/asm-sh/cpu-sh3/freq.h4
-rw-r--r--include/asm-sh/cpu-sh3/mmu_context.h1
-rw-r--r--include/asm-sh/cpu-sh3/timer.h3
-rw-r--r--include/asm-sh/processor.h2
-rw-r--r--include/asm-sh/se7300.h64
-rw-r--r--include/asm-sh/ubc.h3
7 files changed, 4 insertions, 75 deletions
diff --git a/include/asm-sh/bugs.h b/include/asm-sh/bugs.h
index d5d7a16cbfe0..b66139ff73fc 100644
--- a/include/asm-sh/bugs.h
+++ b/include/asm-sh/bugs.h
@@ -29,7 +29,7 @@ static void __init check_bugs(void)
29 *p++ = '2'; 29 *p++ = '2';
30 *p++ = 'a'; 30 *p++ = 'a';
31 break; 31 break;
32 case CPU_SH7705 ... CPU_SH7300: 32 case CPU_SH7705 ... CPU_SH7729:
33 *p++ = '3'; 33 *p++ = '3';
34 break; 34 break;
35 case CPU_SH7750 ... CPU_SH4_501: 35 case CPU_SH7750 ... CPU_SH4_501:
diff --git a/include/asm-sh/cpu-sh3/freq.h b/include/asm-sh/cpu-sh3/freq.h
index 273f3229785c..0a054b53b9de 100644
--- a/include/asm-sh/cpu-sh3/freq.h
+++ b/include/asm-sh/cpu-sh3/freq.h
@@ -10,11 +10,7 @@
10#ifndef __ASM_CPU_SH3_FREQ_H 10#ifndef __ASM_CPU_SH3_FREQ_H
11#define __ASM_CPU_SH3_FREQ_H 11#define __ASM_CPU_SH3_FREQ_H
12 12
13#if defined(CONFIG_CPU_SUBTYPE_SH7300)
14#define FRQCR 0xa415ff80
15#else
16#define FRQCR 0xffffff80 13#define FRQCR 0xffffff80
17#endif
18#define MIN_DIVISOR_NR 0 14#define MIN_DIVISOR_NR 0
19#define MAX_DIVISOR_NR 4 15#define MAX_DIVISOR_NR 4
20 16
diff --git a/include/asm-sh/cpu-sh3/mmu_context.h b/include/asm-sh/cpu-sh3/mmu_context.h
index 4704e86dff5b..b20786d42d09 100644
--- a/include/asm-sh/cpu-sh3/mmu_context.h
+++ b/include/asm-sh/cpu-sh3/mmu_context.h
@@ -30,7 +30,6 @@
30#if defined(CONFIG_CPU_SUBTYPE_SH7707) || \ 30#if defined(CONFIG_CPU_SUBTYPE_SH7707) || \
31 defined(CONFIG_CPU_SUBTYPE_SH7709) || \ 31 defined(CONFIG_CPU_SUBTYPE_SH7709) || \
32 defined(CONFIG_CPU_SUBTYPE_SH7706) || \ 32 defined(CONFIG_CPU_SUBTYPE_SH7706) || \
33 defined(CONFIG_CPU_SUBTYPE_SH7300) || \
34 defined(CONFIG_CPU_SUBTYPE_SH7705) || \ 33 defined(CONFIG_CPU_SUBTYPE_SH7705) || \
35 defined(CONFIG_CPU_SUBTYPE_SH7712) || \ 34 defined(CONFIG_CPU_SUBTYPE_SH7712) || \
36 defined(CONFIG_CPU_SUBTYPE_SH7710) 35 defined(CONFIG_CPU_SUBTYPE_SH7710)
diff --git a/include/asm-sh/cpu-sh3/timer.h b/include/asm-sh/cpu-sh3/timer.h
index 4928b08f9d19..b6c2020a2ad3 100644
--- a/include/asm-sh/cpu-sh3/timer.h
+++ b/include/asm-sh/cpu-sh3/timer.h
@@ -19,7 +19,6 @@
19 * SH7729R 19 * SH7729R
20 * SH7710 20 * SH7710
21 * SH7720 21 * SH7720
22 * SH7300
23 * SH7710 22 * SH7710
24 * --------------------------------------------------------------------------- 23 * ---------------------------------------------------------------------------
25 */ 24 */
@@ -28,7 +27,7 @@
28#define TMU_TOCR 0xfffffe90 /* Byte access */ 27#define TMU_TOCR 0xfffffe90 /* Byte access */
29#endif 28#endif
30 29
31#if defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7710) 30#if defined(CONFIG_CPU_SUBTYPE_SH7710)
32#define TMU_012_TSTR 0xa412fe92 /* Byte access */ 31#define TMU_012_TSTR 0xa412fe92 /* Byte access */
33 32
34#define TMU0_TCOR 0xa412fe94 /* Long access */ 33#define TMU0_TCOR 0xa412fe94 /* Long access */
diff --git a/include/asm-sh/processor.h b/include/asm-sh/processor.h
index 7969d3a127da..26d52174f4b4 100644
--- a/include/asm-sh/processor.h
+++ b/include/asm-sh/processor.h
@@ -45,7 +45,7 @@ enum cpu_type {
45 CPU_SH7705, CPU_SH7706, CPU_SH7707, 45 CPU_SH7705, CPU_SH7706, CPU_SH7707,
46 CPU_SH7708, CPU_SH7708S, CPU_SH7708R, 46 CPU_SH7708, CPU_SH7708S, CPU_SH7708R,
47 CPU_SH7709, CPU_SH7709A, CPU_SH7710, CPU_SH7712, 47 CPU_SH7709, CPU_SH7709A, CPU_SH7710, CPU_SH7712,
48 CPU_SH7729, CPU_SH7300, 48 CPU_SH7729,
49 49
50 /* SH-4 types */ 50 /* SH-4 types */
51 CPU_SH7750, CPU_SH7750S, CPU_SH7750R, CPU_SH7751, CPU_SH7751R, 51 CPU_SH7750, CPU_SH7750S, CPU_SH7750R, CPU_SH7751, CPU_SH7751R,
diff --git a/include/asm-sh/se7300.h b/include/asm-sh/se7300.h
deleted file mode 100644
index 4e24edccb30d..000000000000
--- a/include/asm-sh/se7300.h
+++ /dev/null
@@ -1,64 +0,0 @@
1#ifndef __ASM_SH_HITACHI_SE7300_H
2#define __ASM_SH_HITACHI_SE7300_H
3
4/*
5 * linux/include/asm-sh/se/se7300.h
6 *
7 * Copyright (C) 2003 Takashi Kusuda <kusuda-takashi@hitachi-ul.co.jp>
8 *
9 * SH-Mobile SolutionEngine 7300 support
10 */
11
12/* Box specific addresses. */
13
14/* Area 0 */
15#define PA_ROM 0x00000000 /* EPROM */
16#define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte(Actually 2MB) */
17#define PA_FROM 0x00400000 /* Flash ROM */
18#define PA_FROM_SIZE 0x00400000 /* Flash size 4M byte */
19#define PA_SRAM 0x00800000 /* SRAM */
20#define PA_FROM_SIZE 0x00400000 /* SRAM size 4M byte */
21/* Area 1 */
22#define PA_EXT1 0x04000000
23#define PA_EXT1_SIZE 0x04000000
24/* Area 2 */
25#define PA_EXT2 0x08000000
26#define PA_EXT2_SIZE 0x04000000
27/* Area 3 */
28#define PA_SDRAM 0x0c000000
29#define PA_SDRAM_SIZE 0x04000000
30/* Area 4 */
31#define PA_PCIC 0x10000000 /* MR-SHPC-01 PCMCIA */
32#define PA_MRSHPC 0xb03fffe0 /* MR-SHPC-01 PCMCIA controller */
33#define PA_MRSHPC_MW1 0xb0400000 /* MR-SHPC-01 memory window base */
34#define PA_MRSHPC_MW2 0xb0500000 /* MR-SHPC-01 attribute window base */
35#define PA_MRSHPC_IO 0xb0600000 /* MR-SHPC-01 I/O window base */
36#define MRSHPC_OPTION (PA_MRSHPC + 6)
37#define MRSHPC_CSR (PA_MRSHPC + 8)
38#define MRSHPC_ISR (PA_MRSHPC + 10)
39#define MRSHPC_ICR (PA_MRSHPC + 12)
40#define MRSHPC_CPWCR (PA_MRSHPC + 14)
41#define MRSHPC_MW0CR1 (PA_MRSHPC + 16)
42#define MRSHPC_MW1CR1 (PA_MRSHPC + 18)
43#define MRSHPC_IOWCR1 (PA_MRSHPC + 20)
44#define MRSHPC_MW0CR2 (PA_MRSHPC + 22)
45#define MRSHPC_MW1CR2 (PA_MRSHPC + 24)
46#define MRSHPC_IOWCR2 (PA_MRSHPC + 26)
47#define MRSHPC_CDCR (PA_MRSHPC + 28)
48#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30)
49#define PA_LED 0xb0800000 /* LED */
50#define PA_DIPSW 0xb0900000 /* Dip switch 31 */
51#define PA_EPLD_MODESET 0xb0a00000 /* FPGA Mode set register */
52#define PA_EPLD_ST1 0xb0a80000 /* FPGA Interrupt status register1 */
53#define PA_EPLD_ST2 0xb0ac0000 /* FPGA Interrupt status register2 */
54/* Area 5 */
55#define PA_EXT5 0x14000000
56#define PA_EXT5_SIZE 0x04000000
57/* Area 6 */
58#define PA_LCD1 0xb8000000
59#define PA_LCD2 0xb8800000
60
61#define __IO_PREFIX sh7300se
62#include <asm/io_generic.h>
63
64#endif /* __ASM_SH_HITACHI_SE7300_H */
diff --git a/include/asm-sh/ubc.h b/include/asm-sh/ubc.h
index 38d46e01b846..56f4e30dc49c 100644
--- a/include/asm-sh/ubc.h
+++ b/include/asm-sh/ubc.h
@@ -15,8 +15,7 @@
15#include <asm/cpu/ubc.h> 15#include <asm/cpu/ubc.h>
16 16
17/* User Break Controller */ 17/* User Break Controller */
18#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) || \ 18#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709)
19 defined(CONFIG_CPU_SUBTYPE_SH7300)
20#define UBC_TYPE_SH7729 (current_cpu_data.type == CPU_SH7729) 19#define UBC_TYPE_SH7729 (current_cpu_data.type == CPU_SH7729)
21#else 20#else
22#define UBC_TYPE_SH7729 0 21#define UBC_TYPE_SH7729 0