diff options
author | Ben Dooks <ben-linux@fluff.org> | 2006-12-07 18:08:33 -0500 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2006-12-08 11:05:53 -0500 |
commit | 9fddda232ca2de4d40ba9c3890e27bdb4f4f8bbd (patch) | |
tree | dbf8ee6fcad16a462249012ace564d3f3c9d1d1f /include | |
parent | 94b1e96d9dfbb8cc19b09b68a3621243752c0586 (diff) |
[ARM] 4004/1: S3C24XX: UDC remove implict addition of VA to regs
Remove the implicit addition of a virtual address
to the UDC registers. This should have been done
by ioremap() in the driver, not by a static map.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include')
-rw-r--r-- | include/asm-arm/arch-s3c2410/regs-udc.h | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/include/asm-arm/arch-s3c2410/regs-udc.h b/include/asm-arm/arch-s3c2410/regs-udc.h index 487861d5b49a..3c8354619b60 100644 --- a/include/asm-arm/arch-s3c2410/regs-udc.h +++ b/include/asm-arm/arch-s3c2410/regs-udc.h | |||
@@ -11,8 +11,7 @@ | |||
11 | #ifndef __ASM_ARCH_REGS_UDC_H | 11 | #ifndef __ASM_ARCH_REGS_UDC_H |
12 | #define __ASM_ARCH_REGS_UDC_H | 12 | #define __ASM_ARCH_REGS_UDC_H |
13 | 13 | ||
14 | 14 | #define S3C2410_USBDREG(x) (x) | |
15 | #define S3C2410_USBDREG(x) ((x) + S3C24XX_VA_USBDEV) | ||
16 | 15 | ||
17 | #define S3C2410_UDC_FUNC_ADDR_REG S3C2410_USBDREG(0x0140) | 16 | #define S3C2410_UDC_FUNC_ADDR_REG S3C2410_USBDREG(0x0140) |
18 | #define S3C2410_UDC_PWR_REG S3C2410_USBDREG(0x0144) | 17 | #define S3C2410_UDC_PWR_REG S3C2410_USBDREG(0x0144) |
@@ -136,8 +135,8 @@ | |||
136 | #define S3C2410_UDC_OCSR2_ISO (1<<6) // R/W | 135 | #define S3C2410_UDC_OCSR2_ISO (1<<6) // R/W |
137 | #define S3C2410_UDC_OCSR2_DMAIEN (1<<5) // R/W | 136 | #define S3C2410_UDC_OCSR2_DMAIEN (1<<5) // R/W |
138 | 137 | ||
139 | #define S3C2410_UDC_SETIX(x) \ | 138 | #define S3C2410_UDC_SETIX(base,x) \ |
140 | __raw_writel(S3C2410_UDC_INDEX_ ## x, S3C2410_UDC_INDEX_REG); | 139 | writel(S3C2410_UDC_INDEX_ ## x, base+S3C2410_UDC_INDEX_REG); |
141 | 140 | ||
142 | 141 | ||
143 | #define S3C2410_UDC_EP0_CSR_OPKRDY (1<<0) | 142 | #define S3C2410_UDC_EP0_CSR_OPKRDY (1<<0) |