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authorJeff Garzik <jeff@garzik.org>2006-09-04 06:42:01 -0400
committerJeff Garzik <jeff@garzik.org>2006-09-04 06:42:01 -0400
commitfc851fad00d7fa1bf4ac7034d9ba8041bf482d50 (patch)
tree779a8b572d1701ef2c46755df751d9275650cdf4 /include
parent85cd7251b9112e3dabeac9fd3b175601ca607241 (diff)
parentf9bcda7760e1373615c9f6d9ce24209b0ab97de1 (diff)
Merge branch 'upstream' into pata-drivers
Diffstat (limited to 'include')
-rw-r--r--include/asm-arm/arch-pxa/ssp.h4
-rw-r--r--include/asm-arm/arch-s3c2410/dma.h150
-rw-r--r--include/asm-arm/cacheflush.h18
-rw-r--r--include/asm-arm/hardware/ssp.h4
-rw-r--r--include/asm-arm/io.h7
-rw-r--r--include/asm-arm/spinlock.h16
-rw-r--r--include/asm-i386/alternative.h20
-rw-r--r--include/asm-i386/mach-default/mach_mpspec.h4
-rw-r--r--include/asm-i386/rwlock.h28
-rw-r--r--include/asm-i386/spinlock.h17
-rw-r--r--include/asm-i386/unistd.h4
-rw-r--r--include/asm-i386/unwind.h1
-rw-r--r--include/asm-ia64/sn/sn_sal.h6
-rw-r--r--include/asm-ia64/sn/xp.h22
-rw-r--r--include/asm-ia64/sn/xpc.h4
-rw-r--r--include/asm-powerpc/io.h7
-rw-r--r--include/asm-powerpc/ipic.h12
-rw-r--r--include/asm-powerpc/mpc86xx.h3
-rw-r--r--include/asm-powerpc/mpic.h125
-rw-r--r--include/asm-powerpc/prom.h4
-rw-r--r--include/asm-powerpc/time.h4
-rw-r--r--include/asm-x86_64/alternative.h21
-rw-r--r--include/asm-x86_64/processor.h6
-rw-r--r--include/asm-x86_64/spinlock.h11
-rw-r--r--include/asm-x86_64/unistd.h11
-rw-r--r--include/asm-x86_64/unwind.h1
-rw-r--r--include/linux/delayacct.h10
-rw-r--r--include/linux/mmzone.h1
-rw-r--r--include/linux/pci_ids.h4
-rw-r--r--include/linux/sched.h1
30 files changed, 324 insertions, 202 deletions
diff --git a/include/asm-arm/arch-pxa/ssp.h b/include/asm-arm/arch-pxa/ssp.h
index 949878c0d908..ea200551a75f 100644
--- a/include/asm-arm/arch-pxa/ssp.h
+++ b/include/asm-arm/arch-pxa/ssp.h
@@ -40,8 +40,8 @@ struct ssp_dev {
40}; 40};
41 41
42int ssp_write_word(struct ssp_dev *dev, u32 data); 42int ssp_write_word(struct ssp_dev *dev, u32 data);
43int ssp_read_word(struct ssp_dev *dev); 43int ssp_read_word(struct ssp_dev *dev, u32 *data);
44void ssp_flush(struct ssp_dev *dev); 44int ssp_flush(struct ssp_dev *dev);
45void ssp_enable(struct ssp_dev *dev); 45void ssp_enable(struct ssp_dev *dev);
46void ssp_disable(struct ssp_dev *dev); 46void ssp_disable(struct ssp_dev *dev);
47void ssp_save_state(struct ssp_dev *dev, struct ssp_state *ssp); 47void ssp_save_state(struct ssp_dev *dev, struct ssp_state *ssp);
diff --git a/include/asm-arm/arch-s3c2410/dma.h b/include/asm-arm/arch-s3c2410/dma.h
index 7463fd5252ce..3661e465b0a5 100644
--- a/include/asm-arm/arch-s3c2410/dma.h
+++ b/include/asm-arm/arch-s3c2410/dma.h
@@ -1,18 +1,13 @@
1/* linux/include/asm-arm/arch-bast/dma.h 1/* linux/include/asm-arm/arch-s3c2410/dma.h
2 * 2 *
3 * Copyright (C) 2003,2004 Simtec Electronics 3 * Copyright (C) 2003,2004,2006 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk> 4 * Ben Dooks <ben@simtec.co.uk>
5 * 5 *
6 * Samsung S3C2410X DMA support 6 * Samsung S3C241XX DMA support
7 * 7 *
8 * This program is free software; you can redistribute it and/or modify 8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as 9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
11 *
12 * Changelog:
13 * ??-May-2003 BJD Created file
14 * ??-Jun-2003 BJD Added more dma functionality to go with arch
15 * 10-Nov-2004 BJD Added sys_device support
16*/ 11*/
17 12
18#ifndef __ASM_ARCH_DMA_H 13#ifndef __ASM_ARCH_DMA_H
@@ -21,28 +16,26 @@
21#include <linux/sysdev.h> 16#include <linux/sysdev.h>
22#include "hardware.h" 17#include "hardware.h"
23 18
24
25/* 19/*
26 * This is the maximum DMA address(physical address) that can be DMAd to. 20 * This is the maximum DMA address(physical address) that can be DMAd to.
27 * 21 *
28 */ 22 */
29#define MAX_DMA_ADDRESS 0x20000000 23#define MAX_DMA_ADDRESS 0x40000000
30#define MAX_DMA_TRANSFER_SIZE 0x100000 /* Data Unit is half word */ 24#define MAX_DMA_TRANSFER_SIZE 0x100000 /* Data Unit is half word */
31 25
32
33/* we have 4 dma channels */ 26/* we have 4 dma channels */
34#define S3C2410_DMA_CHANNELS (4) 27#define S3C2410_DMA_CHANNELS (4)
35 28
36/* types */ 29/* types */
37 30
38typedef enum { 31enum s3c2410_dma_state {
39 S3C2410_DMA_IDLE, 32 S3C2410_DMA_IDLE,
40 S3C2410_DMA_RUNNING, 33 S3C2410_DMA_RUNNING,
41 S3C2410_DMA_PAUSED 34 S3C2410_DMA_PAUSED
42} s3c2410_dma_state_t; 35};
43 36
44 37
45/* s3c2410_dma_loadst_t 38/* enum s3c2410_dma_loadst
46 * 39 *
47 * This represents the state of the DMA engine, wrt to the loaded / running 40 * This represents the state of the DMA engine, wrt to the loaded / running
48 * transfers. Since we don't have any way of knowing exactly the state of 41 * transfers. Since we don't have any way of knowing exactly the state of
@@ -70,45 +63,40 @@ typedef enum {
70 * currently running. 63 * currently running.
71*/ 64*/
72 65
73typedef enum { 66enum s3c2410_dma_loadst {
74 S3C2410_DMALOAD_NONE, 67 S3C2410_DMALOAD_NONE,
75 S3C2410_DMALOAD_1LOADED, 68 S3C2410_DMALOAD_1LOADED,
76 S3C2410_DMALOAD_1RUNNING, 69 S3C2410_DMALOAD_1RUNNING,
77 S3C2410_DMALOAD_1LOADED_1RUNNING, 70 S3C2410_DMALOAD_1LOADED_1RUNNING,
78} s3c2410_dma_loadst_t; 71};
79 72
80typedef enum { 73enum s3c2410_dma_buffresult {
81 S3C2410_RES_OK, 74 S3C2410_RES_OK,
82 S3C2410_RES_ERR, 75 S3C2410_RES_ERR,
83 S3C2410_RES_ABORT 76 S3C2410_RES_ABORT
84} s3c2410_dma_buffresult_t; 77};
85
86
87typedef enum s3c2410_dmasrc_e s3c2410_dmasrc_t;
88 78
89enum s3c2410_dmasrc_e { 79enum s3c2410_dmasrc {
90 S3C2410_DMASRC_HW, /* source is memory */ 80 S3C2410_DMASRC_HW, /* source is memory */
91 S3C2410_DMASRC_MEM /* source is hardware */ 81 S3C2410_DMASRC_MEM /* source is hardware */
92}; 82};
93 83
94/* enum s3c2410_chan_op_e 84/* enum s3c2410_chan_op
95 * 85 *
96 * operation codes passed to the DMA code by the user, and also used 86 * operation codes passed to the DMA code by the user, and also used
97 * to inform the current channel owner of any changes to the system state 87 * to inform the current channel owner of any changes to the system state
98*/ 88*/
99 89
100enum s3c2410_chan_op_e { 90enum s3c2410_chan_op {
101 S3C2410_DMAOP_START, 91 S3C2410_DMAOP_START,
102 S3C2410_DMAOP_STOP, 92 S3C2410_DMAOP_STOP,
103 S3C2410_DMAOP_PAUSE, 93 S3C2410_DMAOP_PAUSE,
104 S3C2410_DMAOP_RESUME, 94 S3C2410_DMAOP_RESUME,
105 S3C2410_DMAOP_FLUSH, 95 S3C2410_DMAOP_FLUSH,
106 S3C2410_DMAOP_TIMEOUT, /* internal signal to handler */ 96 S3C2410_DMAOP_TIMEOUT, /* internal signal to handler */
107 S3C2410_DMAOP_STARTED, /* indicate channel started */ 97 S3C2410_DMAOP_STARTED, /* indicate channel started */
108}; 98};
109 99
110typedef enum s3c2410_chan_op_e s3c2410_chan_op_t;
111
112/* flags */ 100/* flags */
113 101
114#define S3C2410_DMAF_SLOW (1<<0) /* slow, so don't worry about 102#define S3C2410_DMAF_SLOW (1<<0) /* slow, so don't worry about
@@ -117,104 +105,100 @@ typedef enum s3c2410_chan_op_e s3c2410_chan_op_t;
117 105
118/* dma buffer */ 106/* dma buffer */
119 107
120typedef struct s3c2410_dma_buf_s s3c2410_dma_buf_t;
121
122struct s3c2410_dma_client { 108struct s3c2410_dma_client {
123 char *name; 109 char *name;
124}; 110};
125 111
126typedef struct s3c2410_dma_client s3c2410_dma_client_t;
127
128/* s3c2410_dma_buf_s 112/* s3c2410_dma_buf_s
129 * 113 *
130 * internally used buffer structure to describe a queued or running 114 * internally used buffer structure to describe a queued or running
131 * buffer. 115 * buffer.
132*/ 116*/
133 117
134struct s3c2410_dma_buf_s { 118struct s3c2410_dma_buf;
135 s3c2410_dma_buf_t *next; 119struct s3c2410_dma_buf {
136 int magic; /* magic */ 120 struct s3c2410_dma_buf *next;
137 int size; /* buffer size in bytes */ 121 int magic; /* magic */
138 dma_addr_t data; /* start of DMA data */ 122 int size; /* buffer size in bytes */
139 dma_addr_t ptr; /* where the DMA got to [1] */ 123 dma_addr_t data; /* start of DMA data */
140 void *id; /* client's id */ 124 dma_addr_t ptr; /* where the DMA got to [1] */
125 void *id; /* client's id */
141}; 126};
142 127
143/* [1] is this updated for both recv/send modes? */ 128/* [1] is this updated for both recv/send modes? */
144 129
145typedef struct s3c2410_dma_chan_s s3c2410_dma_chan_t; 130struct s3c2410_dma_chan;
146 131
147/* s3c2410_dma_cbfn_t 132/* s3c2410_dma_cbfn_t
148 * 133 *
149 * buffer callback routine type 134 * buffer callback routine type
150*/ 135*/
151 136
152typedef void (*s3c2410_dma_cbfn_t)(s3c2410_dma_chan_t *, void *buf, int size, 137typedef void (*s3c2410_dma_cbfn_t)(struct s3c2410_dma_chan *,
153 s3c2410_dma_buffresult_t result); 138 void *buf, int size,
139 enum s3c2410_dma_buffresult result);
154 140
155typedef int (*s3c2410_dma_opfn_t)(s3c2410_dma_chan_t *, 141typedef int (*s3c2410_dma_opfn_t)(struct s3c2410_dma_chan *,
156 s3c2410_chan_op_t ); 142 enum s3c2410_chan_op );
157 143
158struct s3c2410_dma_stats_s { 144struct s3c2410_dma_stats {
159 unsigned long loads; 145 unsigned long loads;
160 unsigned long timeout_longest; 146 unsigned long timeout_longest;
161 unsigned long timeout_shortest; 147 unsigned long timeout_shortest;
162 unsigned long timeout_avg; 148 unsigned long timeout_avg;
163 unsigned long timeout_failed; 149 unsigned long timeout_failed;
164}; 150};
165 151
166typedef struct s3c2410_dma_stats_s s3c2410_dma_stats_t; 152/* struct s3c2410_dma_chan
167
168/* struct s3c2410_dma_chan_s
169 * 153 *
170 * full state information for each DMA channel 154 * full state information for each DMA channel
171*/ 155*/
172 156
173struct s3c2410_dma_chan_s { 157struct s3c2410_dma_chan {
174 /* channel state flags and information */ 158 /* channel state flags and information */
175 unsigned char number; /* number of this dma channel */ 159 unsigned char number; /* number of this dma channel */
176 unsigned char in_use; /* channel allocated */ 160 unsigned char in_use; /* channel allocated */
177 unsigned char irq_claimed; /* irq claimed for channel */ 161 unsigned char irq_claimed; /* irq claimed for channel */
178 unsigned char irq_enabled; /* irq enabled for channel */ 162 unsigned char irq_enabled; /* irq enabled for channel */
179 unsigned char xfer_unit; /* size of an transfer */ 163 unsigned char xfer_unit; /* size of an transfer */
180 164
181 /* channel state */ 165 /* channel state */
182 166
183 s3c2410_dma_state_t state; 167 enum s3c2410_dma_state state;
184 s3c2410_dma_loadst_t load_state; 168 enum s3c2410_dma_loadst load_state;
185 s3c2410_dma_client_t *client; 169 struct s3c2410_dma_client *client;
186 170
187 /* channel configuration */ 171 /* channel configuration */
188 s3c2410_dmasrc_t source; 172 enum s3c2410_dmasrc source;
189 unsigned long dev_addr; 173 unsigned long dev_addr;
190 unsigned long load_timeout; 174 unsigned long load_timeout;
191 unsigned int flags; /* channel flags */ 175 unsigned int flags; /* channel flags */
192 176
193 /* channel's hardware position and configuration */ 177 /* channel's hardware position and configuration */
194 void __iomem *regs; /* channels registers */ 178 void __iomem *regs; /* channels registers */
195 void __iomem *addr_reg; /* data address register */ 179 void __iomem *addr_reg; /* data address register */
196 unsigned int irq; /* channel irq */ 180 unsigned int irq; /* channel irq */
197 unsigned long dcon; /* default value of DCON */ 181 unsigned long dcon; /* default value of DCON */
198 182
199 /* driver handles */ 183 /* driver handles */
200 s3c2410_dma_cbfn_t callback_fn; /* buffer done callback */ 184 s3c2410_dma_cbfn_t callback_fn; /* buffer done callback */
201 s3c2410_dma_opfn_t op_fn; /* channel operation callback */ 185 s3c2410_dma_opfn_t op_fn; /* channel op callback */
202 186
203 /* stats gathering */ 187 /* stats gathering */
204 s3c2410_dma_stats_t *stats; 188 struct s3c2410_dma_stats *stats;
205 s3c2410_dma_stats_t stats_store; 189 struct s3c2410_dma_stats stats_store;
206 190
207 /* buffer list and information */ 191 /* buffer list and information */
208 s3c2410_dma_buf_t *curr; /* current dma buffer */ 192 struct s3c2410_dma_buf *curr; /* current dma buffer */
209 s3c2410_dma_buf_t *next; /* next buffer to load */ 193 struct s3c2410_dma_buf *next; /* next buffer to load */
210 s3c2410_dma_buf_t *end; /* end of queue */ 194 struct s3c2410_dma_buf *end; /* end of queue */
211 195
212 /* system device */ 196 /* system device */
213 struct sys_device dev; 197 struct sys_device dev;
214}; 198};
215 199
216/* the currently allocated channel information */ 200/* the currently allocated channel information */
217extern s3c2410_dma_chan_t s3c2410_chans[]; 201extern struct s3c2410_dma_chan s3c2410_chans[];
218 202
219/* note, we don't really use dma_device_t at the moment */ 203/* note, we don't really use dma_device_t at the moment */
220typedef unsigned long dma_device_t; 204typedef unsigned long dma_device_t;
@@ -227,7 +211,7 @@ typedef unsigned long dma_device_t;
227*/ 211*/
228 212
229extern int s3c2410_dma_request(dmach_t channel, 213extern int s3c2410_dma_request(dmach_t channel,
230 s3c2410_dma_client_t *, void *dev); 214 struct s3c2410_dma_client *, void *dev);
231 215
232 216
233/* s3c2410_dma_ctrl 217/* s3c2410_dma_ctrl
@@ -235,7 +219,7 @@ extern int s3c2410_dma_request(dmach_t channel,
235 * change the state of the dma channel 219 * change the state of the dma channel
236*/ 220*/
237 221
238extern int s3c2410_dma_ctrl(dmach_t channel, s3c2410_chan_op_t op); 222extern int s3c2410_dma_ctrl(dmach_t channel, enum s3c2410_chan_op op);
239 223
240/* s3c2410_dma_setflags 224/* s3c2410_dma_setflags
241 * 225 *
@@ -250,7 +234,7 @@ extern int s3c2410_dma_setflags(dmach_t channel,
250 * free the dma channel (will also abort any outstanding operations) 234 * free the dma channel (will also abort any outstanding operations)
251*/ 235*/
252 236
253extern int s3c2410_dma_free(dmach_t channel, s3c2410_dma_client_t *); 237extern int s3c2410_dma_free(dmach_t channel, struct s3c2410_dma_client *);
254 238
255/* s3c2410_dma_enqueue 239/* s3c2410_dma_enqueue
256 * 240 *
@@ -274,7 +258,7 @@ extern int s3c2410_dma_config(dmach_t channel, int xferunit, int dcon);
274 * configure the device we're talking to 258 * configure the device we're talking to
275*/ 259*/
276 260
277extern int s3c2410_dma_devconfig(int channel, s3c2410_dmasrc_t source, 261extern int s3c2410_dma_devconfig(int channel, enum s3c2410_dmasrc source,
278 int hwcfg, unsigned long devaddr); 262 int hwcfg, unsigned long devaddr);
279 263
280/* s3c2410_dma_getposition 264/* s3c2410_dma_getposition
diff --git a/include/asm-arm/cacheflush.h b/include/asm-arm/cacheflush.h
index fe0c744e0266..e4a2569c636c 100644
--- a/include/asm-arm/cacheflush.h
+++ b/include/asm-arm/cacheflush.h
@@ -247,14 +247,12 @@ extern void dmac_flush_range(unsigned long, unsigned long);
247 */ 247 */
248#define copy_to_user_page(vma, page, vaddr, dst, src, len) \ 248#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
249 do { \ 249 do { \
250 flush_cache_page(vma, vaddr, page_to_pfn(page));\
251 memcpy(dst, src, len); \ 250 memcpy(dst, src, len); \
252 flush_dcache_page(page); \ 251 flush_ptrace_access(vma, page, vaddr, dst, len, 1);\
253 } while (0) 252 } while (0)
254 253
255#define copy_from_user_page(vma, page, vaddr, dst, src, len) \ 254#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
256 do { \ 255 do { \
257 flush_cache_page(vma, vaddr, page_to_pfn(page));\
258 memcpy(dst, src, len); \ 256 memcpy(dst, src, len); \
259 } while (0) 257 } while (0)
260 258
@@ -285,10 +283,24 @@ flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr, unsigned l
285 __cpuc_flush_user_range(addr, addr + PAGE_SIZE, vma->vm_flags); 283 __cpuc_flush_user_range(addr, addr + PAGE_SIZE, vma->vm_flags);
286 } 284 }
287} 285}
286
287static inline void
288flush_ptrace_access(struct vm_area_struct *vma, struct page *page,
289 unsigned long uaddr, void *kaddr,
290 unsigned long len, int write)
291{
292 if (cpu_isset(smp_processor_id(), vma->vm_mm->cpu_vm_mask)) {
293 unsigned long addr = (unsigned long)kaddr;
294 __cpuc_coherent_kern_range(addr, addr + len);
295 }
296}
288#else 297#else
289extern void flush_cache_mm(struct mm_struct *mm); 298extern void flush_cache_mm(struct mm_struct *mm);
290extern void flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long end); 299extern void flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long end);
291extern void flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr, unsigned long pfn); 300extern void flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr, unsigned long pfn);
301extern void flush_ptrace_access(struct vm_area_struct *vma, struct page *page,
302 unsigned long uaddr, void *kaddr,
303 unsigned long len, int write);
292#endif 304#endif
293 305
294/* 306/*
diff --git a/include/asm-arm/hardware/ssp.h b/include/asm-arm/hardware/ssp.h
index 28aa11b769cd..3b42e181997c 100644
--- a/include/asm-arm/hardware/ssp.h
+++ b/include/asm-arm/hardware/ssp.h
@@ -16,8 +16,8 @@ struct ssp_state {
16}; 16};
17 17
18int ssp_write_word(u16 data); 18int ssp_write_word(u16 data);
19int ssp_read_word(void); 19int ssp_read_word(u16 *data);
20void ssp_flush(void); 20int ssp_flush(void);
21void ssp_enable(void); 21void ssp_enable(void);
22void ssp_disable(void); 22void ssp_disable(void);
23void ssp_save_state(struct ssp_state *ssp); 23void ssp_save_state(struct ssp_state *ssp);
diff --git a/include/asm-arm/io.h b/include/asm-arm/io.h
index b3479fc1cc8f..bf7b9dea30f1 100644
--- a/include/asm-arm/io.h
+++ b/include/asm-arm/io.h
@@ -291,5 +291,12 @@ extern void pci_iounmap(struct pci_dev *dev, void __iomem *addr);
291 */ 291 */
292#define xlate_dev_kmem_ptr(p) p 292#define xlate_dev_kmem_ptr(p) p
293 293
294/*
295 * Register ISA memory and port locations for glibc iopl/inb/outb
296 * emulation.
297 */
298extern void register_isa_ports(unsigned int mmio, unsigned int io,
299 unsigned int io_shift);
300
294#endif /* __KERNEL__ */ 301#endif /* __KERNEL__ */
295#endif /* __ASM_ARM_IO_H */ 302#endif /* __ASM_ARM_IO_H */
diff --git a/include/asm-arm/spinlock.h b/include/asm-arm/spinlock.h
index 406ca97a8ab2..e2f1d75171df 100644
--- a/include/asm-arm/spinlock.h
+++ b/include/asm-arm/spinlock.h
@@ -199,7 +199,21 @@ static inline void __raw_read_unlock(raw_rwlock_t *rw)
199 : "cc"); 199 : "cc");
200} 200}
201 201
202#define __raw_read_trylock(lock) generic__raw_read_trylock(lock) 202static inline int __raw_read_trylock(raw_rwlock_t *rw)
203{
204 unsigned long tmp tmp2 = 1;
205
206 __asm__ __volatile__(
207"1: ldrex %0, [%2]\n"
208" adds %0, %0, #1\n"
209" strexpl %1, %0, [%2]\n"
210 : "=&r" (tmp), "+r" (tmp2)
211 : "r" (&rw->lock)
212 : "cc");
213
214 smp_mb();
215 return tmp2 == 0;
216}
203 217
204/* read_can_lock - would read_trylock() succeed? */ 218/* read_can_lock - would read_trylock() succeed? */
205#define __raw_read_can_lock(x) ((x)->lock < 0x80000000) 219#define __raw_read_can_lock(x) ((x)->lock < 0x80000000)
diff --git a/include/asm-i386/alternative.h b/include/asm-i386/alternative.h
index 96adbabec740..b01a7ec409ce 100644
--- a/include/asm-i386/alternative.h
+++ b/include/asm-i386/alternative.h
@@ -88,9 +88,6 @@ static inline void alternatives_smp_switch(int smp) {}
88/* 88/*
89 * Alternative inline assembly for SMP. 89 * Alternative inline assembly for SMP.
90 * 90 *
91 * alternative_smp() takes two versions (SMP first, UP second) and is
92 * for more complex stuff such as spinlocks.
93 *
94 * The LOCK_PREFIX macro defined here replaces the LOCK and 91 * The LOCK_PREFIX macro defined here replaces the LOCK and
95 * LOCK_PREFIX macros used everywhere in the source tree. 92 * LOCK_PREFIX macros used everywhere in the source tree.
96 * 93 *
@@ -110,21 +107,6 @@ static inline void alternatives_smp_switch(int smp) {}
110 */ 107 */
111 108
112#ifdef CONFIG_SMP 109#ifdef CONFIG_SMP
113#define alternative_smp(smpinstr, upinstr, args...) \
114 asm volatile ("661:\n\t" smpinstr "\n662:\n" \
115 ".section .smp_altinstructions,\"a\"\n" \
116 " .align 4\n" \
117 " .long 661b\n" /* label */ \
118 " .long 663f\n" /* new instruction */ \
119 " .byte 0x68\n" /* X86_FEATURE_UP */ \
120 " .byte 662b-661b\n" /* sourcelen */ \
121 " .byte 664f-663f\n" /* replacementlen */ \
122 ".previous\n" \
123 ".section .smp_altinstr_replacement,\"awx\"\n" \
124 "663:\n\t" upinstr "\n" /* replacement */ \
125 "664:\n\t.fill 662b-661b,1,0x42\n" /* space for original */ \
126 ".previous" : args)
127
128#define LOCK_PREFIX \ 110#define LOCK_PREFIX \
129 ".section .smp_locks,\"a\"\n" \ 111 ".section .smp_locks,\"a\"\n" \
130 " .align 4\n" \ 112 " .align 4\n" \
@@ -133,8 +115,6 @@ static inline void alternatives_smp_switch(int smp) {}
133 "661:\n\tlock; " 115 "661:\n\tlock; "
134 116
135#else /* ! CONFIG_SMP */ 117#else /* ! CONFIG_SMP */
136#define alternative_smp(smpinstr, upinstr, args...) \
137 asm volatile (upinstr : args)
138#define LOCK_PREFIX "" 118#define LOCK_PREFIX ""
139#endif 119#endif
140 120
diff --git a/include/asm-i386/mach-default/mach_mpspec.h b/include/asm-i386/mach-default/mach_mpspec.h
index 6b5dadcf1d0e..51c9a9775932 100644
--- a/include/asm-i386/mach-default/mach_mpspec.h
+++ b/include/asm-i386/mach-default/mach_mpspec.h
@@ -3,6 +3,10 @@
3 3
4#define MAX_IRQ_SOURCES 256 4#define MAX_IRQ_SOURCES 256
5 5
6#if CONFIG_BASE_SMALL == 0
7#define MAX_MP_BUSSES 256
8#else
6#define MAX_MP_BUSSES 32 9#define MAX_MP_BUSSES 32
10#endif
7 11
8#endif /* __ASM_MACH_MPSPEC_H */ 12#endif /* __ASM_MACH_MPSPEC_H */
diff --git a/include/asm-i386/rwlock.h b/include/asm-i386/rwlock.h
index 96b0bef2ea56..87c069ccba08 100644
--- a/include/asm-i386/rwlock.h
+++ b/include/asm-i386/rwlock.h
@@ -21,23 +21,21 @@
21#define RW_LOCK_BIAS_STR "0x01000000" 21#define RW_LOCK_BIAS_STR "0x01000000"
22 22
23#define __build_read_lock_ptr(rw, helper) \ 23#define __build_read_lock_ptr(rw, helper) \
24 alternative_smp("lock; subl $1,(%0)\n\t" \ 24 asm volatile(LOCK_PREFIX " subl $1,(%0)\n\t" \
25 "jns 1f\n" \ 25 "jns 1f\n" \
26 "call " helper "\n\t" \ 26 "call " helper "\n\t" \
27 "1:\n", \ 27 "1:\n" \
28 "subl $1,(%0)\n\t", \ 28 ::"a" (rw) : "memory")
29 :"a" (rw) : "memory")
30 29
31#define __build_read_lock_const(rw, helper) \ 30#define __build_read_lock_const(rw, helper) \
32 alternative_smp("lock; subl $1,%0\n\t" \ 31 asm volatile(LOCK_PREFIX " subl $1,%0\n\t" \
33 "jns 1f\n" \ 32 "jns 1f\n" \
34 "pushl %%eax\n\t" \ 33 "pushl %%eax\n\t" \
35 "leal %0,%%eax\n\t" \ 34 "leal %0,%%eax\n\t" \
36 "call " helper "\n\t" \ 35 "call " helper "\n\t" \
37 "popl %%eax\n\t" \ 36 "popl %%eax\n\t" \
38 "1:\n", \ 37 "1:\n" \
39 "subl $1,%0\n\t", \ 38 :"+m" (*(volatile int *)rw) : : "memory")
40 "+m" (*(volatile int *)rw) : : "memory")
41 39
42#define __build_read_lock(rw, helper) do { \ 40#define __build_read_lock(rw, helper) do { \
43 if (__builtin_constant_p(rw)) \ 41 if (__builtin_constant_p(rw)) \
@@ -47,23 +45,21 @@
47 } while (0) 45 } while (0)
48 46
49#define __build_write_lock_ptr(rw, helper) \ 47#define __build_write_lock_ptr(rw, helper) \
50 alternative_smp("lock; subl $" RW_LOCK_BIAS_STR ",(%0)\n\t" \ 48 asm volatile(LOCK_PREFIX " subl $" RW_LOCK_BIAS_STR ",(%0)\n\t" \
51 "jz 1f\n" \ 49 "jz 1f\n" \
52 "call " helper "\n\t" \ 50 "call " helper "\n\t" \
53 "1:\n", \ 51 "1:\n" \
54 "subl $" RW_LOCK_BIAS_STR ",(%0)\n\t", \ 52 ::"a" (rw) : "memory")
55 :"a" (rw) : "memory")
56 53
57#define __build_write_lock_const(rw, helper) \ 54#define __build_write_lock_const(rw, helper) \
58 alternative_smp("lock; subl $" RW_LOCK_BIAS_STR ",%0\n\t" \ 55 asm volatile(LOCK_PREFIX " subl $" RW_LOCK_BIAS_STR ",%0\n\t" \
59 "jz 1f\n" \ 56 "jz 1f\n" \
60 "pushl %%eax\n\t" \ 57 "pushl %%eax\n\t" \
61 "leal %0,%%eax\n\t" \ 58 "leal %0,%%eax\n\t" \
62 "call " helper "\n\t" \ 59 "call " helper "\n\t" \
63 "popl %%eax\n\t" \ 60 "popl %%eax\n\t" \
64 "1:\n", \ 61 "1:\n" \
65 "subl $" RW_LOCK_BIAS_STR ",%0\n\t", \ 62 :"+m" (*(volatile int *)rw) : : "memory")
66 "+m" (*(volatile int *)rw) : : "memory")
67 63
68#define __build_write_lock(rw, helper) do { \ 64#define __build_write_lock(rw, helper) do { \
69 if (__builtin_constant_p(rw)) \ 65 if (__builtin_constant_p(rw)) \
diff --git a/include/asm-i386/spinlock.h b/include/asm-i386/spinlock.h
index d816c62a7a1d..d1020363c41a 100644
--- a/include/asm-i386/spinlock.h
+++ b/include/asm-i386/spinlock.h
@@ -22,7 +22,7 @@
22 22
23#define __raw_spin_lock_string \ 23#define __raw_spin_lock_string \
24 "\n1:\t" \ 24 "\n1:\t" \
25 "lock ; decb %0\n\t" \ 25 LOCK_PREFIX " ; decb %0\n\t" \
26 "jns 3f\n" \ 26 "jns 3f\n" \
27 "2:\t" \ 27 "2:\t" \
28 "rep;nop\n\t" \ 28 "rep;nop\n\t" \
@@ -38,7 +38,7 @@
38 */ 38 */
39#define __raw_spin_lock_string_flags \ 39#define __raw_spin_lock_string_flags \
40 "\n1:\t" \ 40 "\n1:\t" \
41 "lock ; decb %0\n\t" \ 41 LOCK_PREFIX " ; decb %0\n\t" \
42 "jns 5f\n" \ 42 "jns 5f\n" \
43 "2:\t" \ 43 "2:\t" \
44 "testl $0x200, %1\n\t" \ 44 "testl $0x200, %1\n\t" \
@@ -57,15 +57,9 @@
57 "jmp 4b\n" \ 57 "jmp 4b\n" \
58 "5:\n\t" 58 "5:\n\t"
59 59
60#define __raw_spin_lock_string_up \
61 "\n\tdecb %0"
62
63static inline void __raw_spin_lock(raw_spinlock_t *lock) 60static inline void __raw_spin_lock(raw_spinlock_t *lock)
64{ 61{
65 alternative_smp( 62 asm(__raw_spin_lock_string : "+m" (lock->slock) : : "memory");
66 __raw_spin_lock_string,
67 __raw_spin_lock_string_up,
68 "+m" (lock->slock) : : "memory");
69} 63}
70 64
71/* 65/*
@@ -76,10 +70,7 @@ static inline void __raw_spin_lock(raw_spinlock_t *lock)
76#ifndef CONFIG_PROVE_LOCKING 70#ifndef CONFIG_PROVE_LOCKING
77static inline void __raw_spin_lock_flags(raw_spinlock_t *lock, unsigned long flags) 71static inline void __raw_spin_lock_flags(raw_spinlock_t *lock, unsigned long flags)
78{ 72{
79 alternative_smp( 73 asm(__raw_spin_lock_string_flags : "+m" (lock->slock) : "r" (flags) : "memory");
80 __raw_spin_lock_string_flags,
81 __raw_spin_lock_string_up,
82 "+m" (lock->slock) : "r" (flags) : "memory");
83} 74}
84#endif 75#endif
85 76
diff --git a/include/asm-i386/unistd.h b/include/asm-i386/unistd.h
index fc1c8ddae149..d983b74e4d9f 100644
--- a/include/asm-i386/unistd.h
+++ b/include/asm-i386/unistd.h
@@ -324,8 +324,6 @@
324#define __NR_vmsplice 316 324#define __NR_vmsplice 316
325#define __NR_move_pages 317 325#define __NR_move_pages 317
326 326
327#ifdef __KERNEL__
328
329#define NR_syscalls 318 327#define NR_syscalls 318
330 328
331/* 329/*
@@ -425,6 +423,8 @@ __asm__ volatile ("push %%ebp ; push %%ebx ; movl 4(%2),%%ebp ; " \
425__syscall_return(type,__res); \ 423__syscall_return(type,__res); \
426} 424}
427 425
426#ifdef __KERNEL__
427
428#define __ARCH_WANT_IPC_PARSE_VERSION 428#define __ARCH_WANT_IPC_PARSE_VERSION
429#define __ARCH_WANT_OLD_READDIR 429#define __ARCH_WANT_OLD_READDIR
430#define __ARCH_WANT_OLD_STAT 430#define __ARCH_WANT_OLD_STAT
diff --git a/include/asm-i386/unwind.h b/include/asm-i386/unwind.h
index 69f0f1df6722..4c1a0b968569 100644
--- a/include/asm-i386/unwind.h
+++ b/include/asm-i386/unwind.h
@@ -87,6 +87,7 @@ static inline int arch_unw_user_mode(const struct unwind_frame_info *info)
87#else 87#else
88 88
89#define UNW_PC(frame) ((void)(frame), 0) 89#define UNW_PC(frame) ((void)(frame), 0)
90#define UNW_SP(frame) ((void)(frame), 0)
90 91
91static inline int arch_unw_user_mode(const void *info) 92static inline int arch_unw_user_mode(const void *info)
92{ 93{
diff --git a/include/asm-ia64/sn/sn_sal.h b/include/asm-ia64/sn/sn_sal.h
index bd4452bda357..ba826b3f75bb 100644
--- a/include/asm-ia64/sn/sn_sal.h
+++ b/include/asm-ia64/sn/sn_sal.h
@@ -706,12 +706,9 @@ static inline int
706sn_change_memprotect(u64 paddr, u64 len, u64 perms, u64 *nasid_array) 706sn_change_memprotect(u64 paddr, u64 len, u64 perms, u64 *nasid_array)
707{ 707{
708 struct ia64_sal_retval ret_stuff; 708 struct ia64_sal_retval ret_stuff;
709 unsigned long irq_flags;
710 709
711 local_irq_save(irq_flags);
712 ia64_sal_oemcall_nolock(&ret_stuff, SN_SAL_MEMPROTECT, paddr, len, 710 ia64_sal_oemcall_nolock(&ret_stuff, SN_SAL_MEMPROTECT, paddr, len,
713 (u64)nasid_array, perms, 0, 0, 0); 711 (u64)nasid_array, perms, 0, 0, 0);
714 local_irq_restore(irq_flags);
715 return ret_stuff.status; 712 return ret_stuff.status;
716} 713}
717#define SN_MEMPROT_ACCESS_CLASS_0 0x14a080 714#define SN_MEMPROT_ACCESS_CLASS_0 0x14a080
@@ -1143,12 +1140,9 @@ static inline int
1143sn_inject_error(u64 paddr, u64 *data, u64 *ecc) 1140sn_inject_error(u64 paddr, u64 *data, u64 *ecc)
1144{ 1141{
1145 struct ia64_sal_retval ret_stuff; 1142 struct ia64_sal_retval ret_stuff;
1146 unsigned long irq_flags;
1147 1143
1148 local_irq_save(irq_flags);
1149 ia64_sal_oemcall_nolock(&ret_stuff, SN_SAL_INJECT_ERROR, paddr, (u64)data, 1144 ia64_sal_oemcall_nolock(&ret_stuff, SN_SAL_INJECT_ERROR, paddr, (u64)data,
1150 (u64)ecc, 0, 0, 0, 0); 1145 (u64)ecc, 0, 0, 0, 0);
1151 local_irq_restore(irq_flags);
1152 return ret_stuff.status; 1146 return ret_stuff.status;
1153} 1147}
1154 1148
diff --git a/include/asm-ia64/sn/xp.h b/include/asm-ia64/sn/xp.h
index 9bd2f9bf329b..6f807e0193b7 100644
--- a/include/asm-ia64/sn/xp.h
+++ b/include/asm-ia64/sn/xp.h
@@ -60,23 +60,37 @@
60 * the bte_copy() once in the hope that the failure was due to a temporary 60 * the bte_copy() once in the hope that the failure was due to a temporary
61 * aberration (i.e., the link going down temporarily). 61 * aberration (i.e., the link going down temporarily).
62 * 62 *
63 * See bte_copy for definition of the input parameters. 63 * src - physical address of the source of the transfer.
64 * vdst - virtual address of the destination of the transfer.
65 * len - number of bytes to transfer from source to destination.
66 * mode - see bte_copy() for definition.
67 * notification - see bte_copy() for definition.
64 * 68 *
65 * Note: xp_bte_copy() should never be called while holding a spinlock. 69 * Note: xp_bte_copy() should never be called while holding a spinlock.
66 */ 70 */
67static inline bte_result_t 71static inline bte_result_t
68xp_bte_copy(u64 src, u64 dest, u64 len, u64 mode, void *notification) 72xp_bte_copy(u64 src, u64 vdst, u64 len, u64 mode, void *notification)
69{ 73{
70 bte_result_t ret; 74 bte_result_t ret;
75 u64 pdst = ia64_tpa(vdst);
71 76
72 77
73 ret = bte_copy(src, dest, len, mode, notification); 78 /*
79 * Ensure that the physically mapped memory is contiguous.
80 *
81 * We do this by ensuring that the memory is from region 7 only.
82 * If the need should arise to use memory from one of the other
83 * regions, then modify the BUG_ON() statement to ensure that the
84 * memory from that region is always physically contiguous.
85 */
86 BUG_ON(REGION_NUMBER(vdst) != RGN_KERNEL);
74 87
88 ret = bte_copy(src, pdst, len, mode, notification);
75 if (ret != BTE_SUCCESS) { 89 if (ret != BTE_SUCCESS) {
76 if (!in_interrupt()) { 90 if (!in_interrupt()) {
77 cond_resched(); 91 cond_resched();
78 } 92 }
79 ret = bte_copy(src, dest, len, mode, notification); 93 ret = bte_copy(src, pdst, len, mode, notification);
80 } 94 }
81 95
82 return ret; 96 return ret;
diff --git a/include/asm-ia64/sn/xpc.h b/include/asm-ia64/sn/xpc.h
index b72af597878d..35e1386f37ab 100644
--- a/include/asm-ia64/sn/xpc.h
+++ b/include/asm-ia64/sn/xpc.h
@@ -683,7 +683,9 @@ extern struct xpc_vars *xpc_vars;
683extern struct xpc_rsvd_page *xpc_rsvd_page; 683extern struct xpc_rsvd_page *xpc_rsvd_page;
684extern struct xpc_vars_part *xpc_vars_part; 684extern struct xpc_vars_part *xpc_vars_part;
685extern struct xpc_partition xpc_partitions[XP_MAX_PARTITIONS + 1]; 685extern struct xpc_partition xpc_partitions[XP_MAX_PARTITIONS + 1];
686extern char xpc_remote_copy_buffer[]; 686extern char *xpc_remote_copy_buffer;
687extern void *xpc_remote_copy_buffer_base;
688extern void *xpc_kmalloc_cacheline_aligned(size_t, gfp_t, void **);
687extern struct xpc_rsvd_page *xpc_rsvd_page_init(void); 689extern struct xpc_rsvd_page *xpc_rsvd_page_init(void);
688extern void xpc_allow_IPI_ops(void); 690extern void xpc_allow_IPI_ops(void);
689extern void xpc_restrict_IPI_ops(void); 691extern void xpc_restrict_IPI_ops(void);
diff --git a/include/asm-powerpc/io.h b/include/asm-powerpc/io.h
index a9496f34b048..36c4c34bf565 100644
--- a/include/asm-powerpc/io.h
+++ b/include/asm-powerpc/io.h
@@ -72,6 +72,9 @@ extern unsigned long pci_io_base;
72 * Neither do the standard versions now, these are just here 72 * Neither do the standard versions now, these are just here
73 * for older code. 73 * for older code.
74 */ 74 */
75#define insb(port, buf, ns) _insb((u8 __iomem *)((port)+pci_io_base), (buf), (ns))
76#define insw(port, buf, ns) _insw_ns((u8 __iomem *)((port)+pci_io_base), (buf), (ns))
77#define insl(port, buf, nl) _insl_ns((u8 __iomem *)((port)+pci_io_base), (buf), (nl))
75#define insw_ns(port, buf, ns) _insw_ns((u16 __iomem *)((port)+pci_io_base), (buf), (ns)) 78#define insw_ns(port, buf, ns) _insw_ns((u16 __iomem *)((port)+pci_io_base), (buf), (ns))
76#define insl_ns(port, buf, nl) _insl_ns((u32 __iomem *)((port)+pci_io_base), (buf), (nl)) 79#define insl_ns(port, buf, nl) _insl_ns((u32 __iomem *)((port)+pci_io_base), (buf), (nl))
77#else 80#else
@@ -137,12 +140,12 @@ static inline void __raw_writeq(unsigned long v, volatile void __iomem *addr)
137#define insw_ns(port, buf, ns) eeh_insw_ns((port), (buf), (ns)) 140#define insw_ns(port, buf, ns) eeh_insw_ns((port), (buf), (ns))
138#define insl_ns(port, buf, nl) eeh_insl_ns((port), (buf), (nl)) 141#define insl_ns(port, buf, nl) eeh_insl_ns((port), (buf), (nl))
139 142
143#endif
144
140#define outsb(port, buf, ns) _outsb((u8 __iomem *)((port)+pci_io_base), (buf), (ns)) 145#define outsb(port, buf, ns) _outsb((u8 __iomem *)((port)+pci_io_base), (buf), (ns))
141#define outsw(port, buf, ns) _outsw_ns((u16 __iomem *)((port)+pci_io_base), (buf), (ns)) 146#define outsw(port, buf, ns) _outsw_ns((u16 __iomem *)((port)+pci_io_base), (buf), (ns))
142#define outsl(port, buf, nl) _outsl_ns((u32 __iomem *)((port)+pci_io_base), (buf), (nl)) 147#define outsl(port, buf, nl) _outsl_ns((u32 __iomem *)((port)+pci_io_base), (buf), (nl))
143 148
144#endif
145
146#define readb_relaxed(addr) readb(addr) 149#define readb_relaxed(addr) readb(addr)
147#define readw_relaxed(addr) readw(addr) 150#define readw_relaxed(addr) readw(addr)
148#define readl_relaxed(addr) readl(addr) 151#define readl_relaxed(addr) readl(addr)
diff --git a/include/asm-powerpc/ipic.h b/include/asm-powerpc/ipic.h
index 0fe396a2b666..53079ec3a515 100644
--- a/include/asm-powerpc/ipic.h
+++ b/include/asm-powerpc/ipic.h
@@ -69,9 +69,6 @@ enum ipic_mcp_irq {
69 IPIC_MCP_MU = 7, 69 IPIC_MCP_MU = 7,
70}; 70};
71 71
72extern void ipic_init(phys_addr_t phys_addr, unsigned int flags,
73 unsigned int irq_offset,
74 unsigned char *senses, unsigned int senses_count);
75extern int ipic_set_priority(unsigned int irq, unsigned int priority); 72extern int ipic_set_priority(unsigned int irq, unsigned int priority);
76extern void ipic_set_highest_priority(unsigned int irq); 73extern void ipic_set_highest_priority(unsigned int irq);
77extern void ipic_set_default_priority(void); 74extern void ipic_set_default_priority(void);
@@ -79,7 +76,16 @@ extern void ipic_enable_mcp(enum ipic_mcp_irq mcp_irq);
79extern void ipic_disable_mcp(enum ipic_mcp_irq mcp_irq); 76extern void ipic_disable_mcp(enum ipic_mcp_irq mcp_irq);
80extern u32 ipic_get_mcp_status(void); 77extern u32 ipic_get_mcp_status(void);
81extern void ipic_clear_mcp_status(u32 mask); 78extern void ipic_clear_mcp_status(u32 mask);
79
80#ifdef CONFIG_PPC_MERGE
81extern void ipic_init(struct device_node *node, unsigned int flags);
82extern unsigned int ipic_get_irq(struct pt_regs *regs);
83#else
84extern void ipic_init(phys_addr_t phys_addr, unsigned int flags,
85 unsigned int irq_offset,
86 unsigned char *senses, unsigned int senses_count);
82extern int ipic_get_irq(struct pt_regs *regs); 87extern int ipic_get_irq(struct pt_regs *regs);
88#endif
83 89
84#endif /* __ASM_IPIC_H__ */ 90#endif /* __ASM_IPIC_H__ */
85#endif /* __KERNEL__ */ 91#endif /* __KERNEL__ */
diff --git a/include/asm-powerpc/mpc86xx.h b/include/asm-powerpc/mpc86xx.h
index f260382739fa..b85df45b1a84 100644
--- a/include/asm-powerpc/mpc86xx.h
+++ b/include/asm-powerpc/mpc86xx.h
@@ -23,8 +23,6 @@
23#define _ISA_MEM_BASE isa_mem_base 23#define _ISA_MEM_BASE isa_mem_base
24#ifdef CONFIG_PCI 24#ifdef CONFIG_PCI
25#define PCI_DRAM_OFFSET pci_dram_offset 25#define PCI_DRAM_OFFSET pci_dram_offset
26#else
27#define PCI_DRAM_OFFSET 0
28#endif 26#endif
29 27
30#define CPU0_BOOT_RELEASE 0x01000000 28#define CPU0_BOOT_RELEASE 0x01000000
@@ -33,7 +31,6 @@
33#define MCM_PORT_CONFIG_OFFSET 0x1010 31#define MCM_PORT_CONFIG_OFFSET 0x1010
34 32
35/* Offset from CCSRBAR */ 33/* Offset from CCSRBAR */
36#define MPC86xx_OPENPIC_OFFSET (0x40000)
37#define MPC86xx_MCM_OFFSET (0x00000) 34#define MPC86xx_MCM_OFFSET (0x00000)
38#define MPC86xx_MCM_SIZE (0x02000) 35#define MPC86xx_MCM_SIZE (0x02000)
39 36
diff --git a/include/asm-powerpc/mpic.h b/include/asm-powerpc/mpic.h
index eb241c99c457..a9f9604b9eff 100644
--- a/include/asm-powerpc/mpic.h
+++ b/include/asm-powerpc/mpic.h
@@ -41,6 +41,7 @@
41#define MPIC_GREG_IPI_VECTOR_PRI_1 0x000b0 41#define MPIC_GREG_IPI_VECTOR_PRI_1 0x000b0
42#define MPIC_GREG_IPI_VECTOR_PRI_2 0x000c0 42#define MPIC_GREG_IPI_VECTOR_PRI_2 0x000c0
43#define MPIC_GREG_IPI_VECTOR_PRI_3 0x000d0 43#define MPIC_GREG_IPI_VECTOR_PRI_3 0x000d0
44#define MPIC_GREG_IPI_STRIDE 0x10
44#define MPIC_GREG_SPURIOUS 0x000e0 45#define MPIC_GREG_SPURIOUS 0x000e0
45#define MPIC_GREG_TIMER_FREQ 0x000f0 46#define MPIC_GREG_TIMER_FREQ 0x000f0
46 47
@@ -68,6 +69,7 @@
68#define MPIC_CPU_IPI_DISPATCH_1 0x00050 69#define MPIC_CPU_IPI_DISPATCH_1 0x00050
69#define MPIC_CPU_IPI_DISPATCH_2 0x00060 70#define MPIC_CPU_IPI_DISPATCH_2 0x00060
70#define MPIC_CPU_IPI_DISPATCH_3 0x00070 71#define MPIC_CPU_IPI_DISPATCH_3 0x00070
72#define MPIC_CPU_IPI_DISPATCH_STRIDE 0x00010
71#define MPIC_CPU_CURRENT_TASK_PRI 0x00080 73#define MPIC_CPU_CURRENT_TASK_PRI 0x00080
72#define MPIC_CPU_TASKPRI_MASK 0x0000000f 74#define MPIC_CPU_TASKPRI_MASK 0x0000000f
73#define MPIC_CPU_WHOAMI 0x00090 75#define MPIC_CPU_WHOAMI 0x00090
@@ -114,6 +116,103 @@
114#define MPIC_VEC_TIMER_1 248 116#define MPIC_VEC_TIMER_1 248
115#define MPIC_VEC_TIMER_0 247 117#define MPIC_VEC_TIMER_0 247
116 118
119/*
120 * Tsi108 implementation of MPIC has many differences from the original one
121 */
122
123/*
124 * Global registers
125 */
126
127#define TSI108_GREG_BASE 0x00000
128#define TSI108_GREG_FEATURE_0 0x00000
129#define TSI108_GREG_GLOBAL_CONF_0 0x00004
130#define TSI108_GREG_VENDOR_ID 0x0000c
131#define TSI108_GREG_IPI_VECTOR_PRI_0 0x00204 /* Doorbell 0 */
132#define TSI108_GREG_IPI_STRIDE 0x0c
133#define TSI108_GREG_SPURIOUS 0x00010
134#define TSI108_GREG_TIMER_FREQ 0x00014
135
136/*
137 * Timer registers
138 */
139#define TSI108_TIMER_BASE 0x0030
140#define TSI108_TIMER_STRIDE 0x10
141#define TSI108_TIMER_CURRENT_CNT 0x00000
142#define TSI108_TIMER_BASE_CNT 0x00004
143#define TSI108_TIMER_VECTOR_PRI 0x00008
144#define TSI108_TIMER_DESTINATION 0x0000c
145
146/*
147 * Per-Processor registers
148 */
149#define TSI108_CPU_BASE 0x00300
150#define TSI108_CPU_STRIDE 0x00040
151#define TSI108_CPU_IPI_DISPATCH_0 0x00200
152#define TSI108_CPU_IPI_DISPATCH_STRIDE 0x00000
153#define TSI108_CPU_CURRENT_TASK_PRI 0x00000
154#define TSI108_CPU_WHOAMI 0xffffffff
155#define TSI108_CPU_INTACK 0x00004
156#define TSI108_CPU_EOI 0x00008
157
158/*
159 * Per-source registers
160 */
161#define TSI108_IRQ_BASE 0x00100
162#define TSI108_IRQ_STRIDE 0x00008
163#define TSI108_IRQ_VECTOR_PRI 0x00000
164#define TSI108_VECPRI_VECTOR_MASK 0x000000ff
165#define TSI108_VECPRI_POLARITY_POSITIVE 0x01000000
166#define TSI108_VECPRI_POLARITY_NEGATIVE 0x00000000
167#define TSI108_VECPRI_SENSE_LEVEL 0x02000000
168#define TSI108_VECPRI_SENSE_EDGE 0x00000000
169#define TSI108_VECPRI_POLARITY_MASK 0x01000000
170#define TSI108_VECPRI_SENSE_MASK 0x02000000
171#define TSI108_IRQ_DESTINATION 0x00004
172
173/* weird mpic register indices and mask bits in the HW info array */
174enum {
175 MPIC_IDX_GREG_BASE = 0,
176 MPIC_IDX_GREG_FEATURE_0,
177 MPIC_IDX_GREG_GLOBAL_CONF_0,
178 MPIC_IDX_GREG_VENDOR_ID,
179 MPIC_IDX_GREG_IPI_VECTOR_PRI_0,
180 MPIC_IDX_GREG_IPI_STRIDE,
181 MPIC_IDX_GREG_SPURIOUS,
182 MPIC_IDX_GREG_TIMER_FREQ,
183
184 MPIC_IDX_TIMER_BASE,
185 MPIC_IDX_TIMER_STRIDE,
186 MPIC_IDX_TIMER_CURRENT_CNT,
187 MPIC_IDX_TIMER_BASE_CNT,
188 MPIC_IDX_TIMER_VECTOR_PRI,
189 MPIC_IDX_TIMER_DESTINATION,
190
191 MPIC_IDX_CPU_BASE,
192 MPIC_IDX_CPU_STRIDE,
193 MPIC_IDX_CPU_IPI_DISPATCH_0,
194 MPIC_IDX_CPU_IPI_DISPATCH_STRIDE,
195 MPIC_IDX_CPU_CURRENT_TASK_PRI,
196 MPIC_IDX_CPU_WHOAMI,
197 MPIC_IDX_CPU_INTACK,
198 MPIC_IDX_CPU_EOI,
199
200 MPIC_IDX_IRQ_BASE,
201 MPIC_IDX_IRQ_STRIDE,
202 MPIC_IDX_IRQ_VECTOR_PRI,
203
204 MPIC_IDX_VECPRI_VECTOR_MASK,
205 MPIC_IDX_VECPRI_POLARITY_POSITIVE,
206 MPIC_IDX_VECPRI_POLARITY_NEGATIVE,
207 MPIC_IDX_VECPRI_SENSE_LEVEL,
208 MPIC_IDX_VECPRI_SENSE_EDGE,
209 MPIC_IDX_VECPRI_POLARITY_MASK,
210 MPIC_IDX_VECPRI_SENSE_MASK,
211 MPIC_IDX_IRQ_DESTINATION,
212 MPIC_IDX_END
213};
214
215
117#ifdef CONFIG_MPIC_BROKEN_U3 216#ifdef CONFIG_MPIC_BROKEN_U3
118/* Fixup table entry */ 217/* Fixup table entry */
119struct mpic_irq_fixup 218struct mpic_irq_fixup
@@ -171,15 +270,29 @@ struct mpic
171 volatile u32 __iomem *cpuregs[MPIC_MAX_CPUS]; 270 volatile u32 __iomem *cpuregs[MPIC_MAX_CPUS];
172 volatile u32 __iomem *isus[MPIC_MAX_ISU]; 271 volatile u32 __iomem *isus[MPIC_MAX_ISU];
173 272
273#ifdef CONFIG_MPIC_WEIRD
274 /* Pointer to HW info array */
275 u32 *hw_set;
276#endif
277
174 /* link */ 278 /* link */
175 struct mpic *next; 279 struct mpic *next;
176}; 280};
177 281
282/*
283 * MPIC flags (passed to mpic_alloc)
284 *
285 * The top 4 bits contain an MPIC bhw id that is used to index the
286 * register offsets and some masks when CONFIG_MPIC_WEIRD is set.
287 * Note setting any ID (leaving those bits to 0) means standard MPIC
288 */
289
178/* This is the primary controller, only that one has IPIs and 290/* This is the primary controller, only that one has IPIs and
179 * has afinity control. A non-primary MPIC always uses CPU0 291 * has afinity control. A non-primary MPIC always uses CPU0
180 * registers only 292 * registers only
181 */ 293 */
182#define MPIC_PRIMARY 0x00000001 294#define MPIC_PRIMARY 0x00000001
295
183/* Set this for a big-endian MPIC */ 296/* Set this for a big-endian MPIC */
184#define MPIC_BIG_ENDIAN 0x00000002 297#define MPIC_BIG_ENDIAN 0x00000002
185/* Broken U3 MPIC */ 298/* Broken U3 MPIC */
@@ -188,6 +301,18 @@ struct mpic
188#define MPIC_BROKEN_IPI 0x00000008 301#define MPIC_BROKEN_IPI 0x00000008
189/* MPIC wants a reset */ 302/* MPIC wants a reset */
190#define MPIC_WANTS_RESET 0x00000010 303#define MPIC_WANTS_RESET 0x00000010
304/* Spurious vector requires EOI */
305#define MPIC_SPV_EOI 0x00000020
306/* No passthrough disable */
307#define MPIC_NO_PTHROU_DIS 0x00000040
308
309/* MPIC HW modification ID */
310#define MPIC_REGSET_MASK 0xf0000000
311#define MPIC_REGSET(val) (((val) & 0xf ) << 28)
312#define MPIC_GET_REGSET(flags) (((flags) >> 28) & 0xf)
313
314#define MPIC_REGSET_STANDARD MPIC_REGSET(0) /* Original MPIC */
315#define MPIC_REGSET_TSI108 MPIC_REGSET(1) /* Tsi108/109 PIC */
191 316
192/* Allocate the controller structure and setup the linux irq descs 317/* Allocate the controller structure and setup the linux irq descs
193 * for the range if interrupts passed in. No HW initialization is 318 * for the range if interrupts passed in. No HW initialization is
diff --git a/include/asm-powerpc/prom.h b/include/asm-powerpc/prom.h
index b095a285c84b..d0fa1b9aed35 100644
--- a/include/asm-powerpc/prom.h
+++ b/include/asm-powerpc/prom.h
@@ -276,6 +276,7 @@ extern void of_irq_map_init(unsigned int flags);
276 * of_irq_map_raw - Low level interrupt tree parsing 276 * of_irq_map_raw - Low level interrupt tree parsing
277 * @parent: the device interrupt parent 277 * @parent: the device interrupt parent
278 * @intspec: interrupt specifier ("interrupts" property of the device) 278 * @intspec: interrupt specifier ("interrupts" property of the device)
279 * @ointsize: size of the passed in interrupt specifier
279 * @addr: address specifier (start of "reg" property of the device) 280 * @addr: address specifier (start of "reg" property of the device)
280 * @out_irq: structure of_irq filled by this function 281 * @out_irq: structure of_irq filled by this function
281 * 282 *
@@ -288,7 +289,8 @@ extern void of_irq_map_init(unsigned int flags);
288 * 289 *
289 */ 290 */
290 291
291extern int of_irq_map_raw(struct device_node *parent, u32 *intspec, u32 *addr, 292extern int of_irq_map_raw(struct device_node *parent, u32 *intspec,
293 u32 ointsize, u32 *addr,
292 struct of_irq *out_irq); 294 struct of_irq *out_irq);
293 295
294 296
diff --git a/include/asm-powerpc/time.h b/include/asm-powerpc/time.h
index dcde4410348d..5785ac4737b5 100644
--- a/include/asm-powerpc/time.h
+++ b/include/asm-powerpc/time.h
@@ -30,10 +30,6 @@ extern unsigned long tb_ticks_per_usec;
30extern unsigned long tb_ticks_per_sec; 30extern unsigned long tb_ticks_per_sec;
31extern u64 tb_to_xs; 31extern u64 tb_to_xs;
32extern unsigned tb_to_us; 32extern unsigned tb_to_us;
33extern unsigned long tb_last_stamp;
34extern u64 tb_last_jiffy;
35
36DECLARE_PER_CPU(unsigned long, last_jiffy);
37 33
38struct rtc_time; 34struct rtc_time;
39extern void to_tm(int tim, struct rtc_time * tm); 35extern void to_tm(int tim, struct rtc_time * tm);
diff --git a/include/asm-x86_64/alternative.h b/include/asm-x86_64/alternative.h
index aa67bfd1b3ce..a584826cc570 100644
--- a/include/asm-x86_64/alternative.h
+++ b/include/asm-x86_64/alternative.h
@@ -4,6 +4,7 @@
4#ifdef __KERNEL__ 4#ifdef __KERNEL__
5 5
6#include <linux/types.h> 6#include <linux/types.h>
7#include <asm/cpufeature.h>
7 8
8struct alt_instr { 9struct alt_instr {
9 u8 *instr; /* original instruction */ 10 u8 *instr; /* original instruction */
@@ -102,9 +103,6 @@ static inline void alternatives_smp_switch(int smp) {}
102/* 103/*
103 * Alternative inline assembly for SMP. 104 * Alternative inline assembly for SMP.
104 * 105 *
105 * alternative_smp() takes two versions (SMP first, UP second) and is
106 * for more complex stuff such as spinlocks.
107 *
108 * The LOCK_PREFIX macro defined here replaces the LOCK and 106 * The LOCK_PREFIX macro defined here replaces the LOCK and
109 * LOCK_PREFIX macros used everywhere in the source tree. 107 * LOCK_PREFIX macros used everywhere in the source tree.
110 * 108 *
@@ -124,21 +122,6 @@ static inline void alternatives_smp_switch(int smp) {}
124 */ 122 */
125 123
126#ifdef CONFIG_SMP 124#ifdef CONFIG_SMP
127#define alternative_smp(smpinstr, upinstr, args...) \
128 asm volatile ("661:\n\t" smpinstr "\n662:\n" \
129 ".section .smp_altinstructions,\"a\"\n" \
130 " .align 8\n" \
131 " .quad 661b\n" /* label */ \
132 " .quad 663f\n" /* new instruction */ \
133 " .byte 0x66\n" /* X86_FEATURE_UP */ \
134 " .byte 662b-661b\n" /* sourcelen */ \
135 " .byte 664f-663f\n" /* replacementlen */ \
136 ".previous\n" \
137 ".section .smp_altinstr_replacement,\"awx\"\n" \
138 "663:\n\t" upinstr "\n" /* replacement */ \
139 "664:\n\t.fill 662b-661b,1,0x42\n" /* space for original */ \
140 ".previous" : args)
141
142#define LOCK_PREFIX \ 125#define LOCK_PREFIX \
143 ".section .smp_locks,\"a\"\n" \ 126 ".section .smp_locks,\"a\"\n" \
144 " .align 8\n" \ 127 " .align 8\n" \
@@ -147,8 +130,6 @@ static inline void alternatives_smp_switch(int smp) {}
147 "661:\n\tlock; " 130 "661:\n\tlock; "
148 131
149#else /* ! CONFIG_SMP */ 132#else /* ! CONFIG_SMP */
150#define alternative_smp(smpinstr, upinstr, args...) \
151 asm volatile (upinstr : args)
152#define LOCK_PREFIX "" 133#define LOCK_PREFIX ""
153#endif 134#endif
154 135
diff --git a/include/asm-x86_64/processor.h b/include/asm-x86_64/processor.h
index 3b3c1217fe61..de9c3147ee4c 100644
--- a/include/asm-x86_64/processor.h
+++ b/include/asm-x86_64/processor.h
@@ -232,8 +232,14 @@ struct tss_struct {
232 unsigned long io_bitmap[IO_BITMAP_LONGS + 1]; 232 unsigned long io_bitmap[IO_BITMAP_LONGS + 1];
233} __attribute__((packed)) ____cacheline_aligned; 233} __attribute__((packed)) ____cacheline_aligned;
234 234
235
235extern struct cpuinfo_x86 boot_cpu_data; 236extern struct cpuinfo_x86 boot_cpu_data;
236DECLARE_PER_CPU(struct tss_struct,init_tss); 237DECLARE_PER_CPU(struct tss_struct,init_tss);
238/* Save the original ist values for checking stack pointers during debugging */
239struct orig_ist {
240 unsigned long ist[7];
241};
242DECLARE_PER_CPU(struct orig_ist, orig_ist);
237 243
238#ifdef CONFIG_X86_VSMP 244#ifdef CONFIG_X86_VSMP
239#define ARCH_MIN_TASKALIGN (1 << INTERNODE_CACHE_SHIFT) 245#define ARCH_MIN_TASKALIGN (1 << INTERNODE_CACHE_SHIFT)
diff --git a/include/asm-x86_64/spinlock.h b/include/asm-x86_64/spinlock.h
index 8d3421996f94..248a79f0eaff 100644
--- a/include/asm-x86_64/spinlock.h
+++ b/include/asm-x86_64/spinlock.h
@@ -21,7 +21,7 @@
21 21
22#define __raw_spin_lock_string \ 22#define __raw_spin_lock_string \
23 "\n1:\t" \ 23 "\n1:\t" \
24 "lock ; decl %0\n\t" \ 24 LOCK_PREFIX " ; decl %0\n\t" \
25 "js 2f\n" \ 25 "js 2f\n" \
26 LOCK_SECTION_START("") \ 26 LOCK_SECTION_START("") \
27 "2:\t" \ 27 "2:\t" \
@@ -40,10 +40,7 @@
40 40
41static inline void __raw_spin_lock(raw_spinlock_t *lock) 41static inline void __raw_spin_lock(raw_spinlock_t *lock)
42{ 42{
43 alternative_smp( 43 asm volatile(__raw_spin_lock_string : "=m" (lock->slock) : : "memory");
44 __raw_spin_lock_string,
45 __raw_spin_lock_string_up,
46 "=m" (lock->slock) : : "memory");
47} 44}
48 45
49#define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock) 46#define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock)
@@ -125,12 +122,12 @@ static inline int __raw_write_trylock(raw_rwlock_t *lock)
125 122
126static inline void __raw_read_unlock(raw_rwlock_t *rw) 123static inline void __raw_read_unlock(raw_rwlock_t *rw)
127{ 124{
128 asm volatile("lock ; incl %0" :"=m" (rw->lock) : : "memory"); 125 asm volatile(LOCK_PREFIX " ; incl %0" :"=m" (rw->lock) : : "memory");
129} 126}
130 127
131static inline void __raw_write_unlock(raw_rwlock_t *rw) 128static inline void __raw_write_unlock(raw_rwlock_t *rw)
132{ 129{
133 asm volatile("lock ; addl $" RW_LOCK_BIAS_STR ",%0" 130 asm volatile(LOCK_PREFIX " ; addl $" RW_LOCK_BIAS_STR ",%0"
134 : "=m" (rw->lock) : : "memory"); 131 : "=m" (rw->lock) : : "memory");
135} 132}
136 133
diff --git a/include/asm-x86_64/unistd.h b/include/asm-x86_64/unistd.h
index 94387c915e53..2d89d309a2a8 100644
--- a/include/asm-x86_64/unistd.h
+++ b/include/asm-x86_64/unistd.h
@@ -620,8 +620,6 @@ __SYSCALL(__NR_vmsplice, sys_vmsplice)
620#define __NR_move_pages 279 620#define __NR_move_pages 279
621__SYSCALL(__NR_move_pages, sys_move_pages) 621__SYSCALL(__NR_move_pages, sys_move_pages)
622 622
623#ifdef __KERNEL__
624
625#define __NR_syscall_max __NR_move_pages 623#define __NR_syscall_max __NR_move_pages
626 624
627#ifndef __NO_STUBS 625#ifndef __NO_STUBS
@@ -746,6 +744,8 @@ __syscall_return(type,__res); \
746 744
747#else /* __KERNEL_SYSCALLS__ */ 745#else /* __KERNEL_SYSCALLS__ */
748 746
747#ifdef __KERNEL__
748
749#include <linux/syscalls.h> 749#include <linux/syscalls.h>
750#include <asm/ptrace.h> 750#include <asm/ptrace.h>
751 751
@@ -838,9 +838,9 @@ asmlinkage long sys_rt_sigaction(int sig,
838 struct sigaction __user *oact, 838 struct sigaction __user *oact,
839 size_t sigsetsize); 839 size_t sigsetsize);
840 840
841#endif /* __ASSEMBLY__ */ 841#endif
842 842
843#endif /* __NO_STUBS */ 843#endif
844 844
845/* 845/*
846 * "Conditional" syscalls 846 * "Conditional" syscalls
@@ -850,5 +850,6 @@ asmlinkage long sys_rt_sigaction(int sig,
850 */ 850 */
851#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall") 851#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall")
852 852
853#endif /* __KERNEL__ */ 853#endif
854
854#endif 855#endif
diff --git a/include/asm-x86_64/unwind.h b/include/asm-x86_64/unwind.h
index f3e7124effe3..1f6e9bfb569e 100644
--- a/include/asm-x86_64/unwind.h
+++ b/include/asm-x86_64/unwind.h
@@ -95,6 +95,7 @@ static inline int arch_unw_user_mode(const struct unwind_frame_info *info)
95#else 95#else
96 96
97#define UNW_PC(frame) ((void)(frame), 0) 97#define UNW_PC(frame) ((void)(frame), 0)
98#define UNW_SP(frame) ((void)(frame), 0)
98 99
99static inline int arch_unw_user_mode(const void *info) 100static inline int arch_unw_user_mode(const void *info)
100{ 101{
diff --git a/include/linux/delayacct.h b/include/linux/delayacct.h
index 11487b6e7127..561e2a77805c 100644
--- a/include/linux/delayacct.h
+++ b/include/linux/delayacct.h
@@ -59,10 +59,14 @@ static inline void delayacct_tsk_init(struct task_struct *tsk)
59 __delayacct_tsk_init(tsk); 59 __delayacct_tsk_init(tsk);
60} 60}
61 61
62static inline void delayacct_tsk_exit(struct task_struct *tsk) 62/* Free tsk->delays. Called from bad fork and __put_task_struct
63 * where there's no risk of tsk->delays being accessed elsewhere
64 */
65static inline void delayacct_tsk_free(struct task_struct *tsk)
63{ 66{
64 if (tsk->delays) 67 if (tsk->delays)
65 __delayacct_tsk_exit(tsk); 68 kmem_cache_free(delayacct_cache, tsk->delays);
69 tsk->delays = NULL;
66} 70}
67 71
68static inline void delayacct_blkio_start(void) 72static inline void delayacct_blkio_start(void)
@@ -101,7 +105,7 @@ static inline void delayacct_init(void)
101{} 105{}
102static inline void delayacct_tsk_init(struct task_struct *tsk) 106static inline void delayacct_tsk_init(struct task_struct *tsk)
103{} 107{}
104static inline void delayacct_tsk_exit(struct task_struct *tsk) 108static inline void delayacct_tsk_free(struct task_struct *tsk)
105{} 109{}
106static inline void delayacct_blkio_start(void) 110static inline void delayacct_blkio_start(void)
107{} 111{}
diff --git a/include/linux/mmzone.h b/include/linux/mmzone.h
index 656b588a9f96..f45163c528e8 100644
--- a/include/linux/mmzone.h
+++ b/include/linux/mmzone.h
@@ -77,6 +77,7 @@ struct per_cpu_pages {
77struct per_cpu_pageset { 77struct per_cpu_pageset {
78 struct per_cpu_pages pcp[2]; /* 0: hot. 1: cold */ 78 struct per_cpu_pages pcp[2]; /* 0: hot. 1: cold */
79#ifdef CONFIG_SMP 79#ifdef CONFIG_SMP
80 s8 stat_threshold;
80 s8 vm_stat_diff[NR_VM_ZONE_STAT_ITEMS]; 81 s8 vm_stat_diff[NR_VM_ZONE_STAT_ITEMS];
81#endif 82#endif
82} ____cacheline_aligned_in_smp; 83} ____cacheline_aligned_in_smp;
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index 4eae06b08cf2..c91164ea3dec 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -1292,6 +1292,7 @@
1292#define PCI_DEVICE_ID_VIA_8367_0 0x3099 1292#define PCI_DEVICE_ID_VIA_8367_0 0x3099
1293#define PCI_DEVICE_ID_VIA_8653_0 0x3101 1293#define PCI_DEVICE_ID_VIA_8653_0 0x3101
1294#define PCI_DEVICE_ID_VIA_8622 0x3102 1294#define PCI_DEVICE_ID_VIA_8622 0x3102
1295#define PCI_DEVICE_ID_VIA_8235_USB_2 0x3104
1295#define PCI_DEVICE_ID_VIA_8233C_0 0x3109 1296#define PCI_DEVICE_ID_VIA_8233C_0 0x3109
1296#define PCI_DEVICE_ID_VIA_8361 0x3112 1297#define PCI_DEVICE_ID_VIA_8361 0x3112
1297#define PCI_DEVICE_ID_VIA_XM266 0x3116 1298#define PCI_DEVICE_ID_VIA_XM266 0x3116
@@ -1726,6 +1727,9 @@
1726#define PCI_VENDOR_ID_DOMEX 0x134a 1727#define PCI_VENDOR_ID_DOMEX 0x134a
1727#define PCI_DEVICE_ID_DOMEX_DMX3191D 0x0001 1728#define PCI_DEVICE_ID_DOMEX_DMX3191D 0x0001
1728 1729
1730#define PCI_VENDOR_ID_INTASHIELD 0x135a
1731#define PCI_DEVICE_ID_INTASHIELD_IS200 0x0d80
1732
1729#define PCI_VENDOR_ID_QUATECH 0x135C 1733#define PCI_VENDOR_ID_QUATECH 0x135C
1730#define PCI_DEVICE_ID_QUATECH_QSC100 0x0010 1734#define PCI_DEVICE_ID_QUATECH_QSC100 0x0010
1731#define PCI_DEVICE_ID_QUATECH_DSC100 0x0020 1735#define PCI_DEVICE_ID_QUATECH_DSC100 0x0020
diff --git a/include/linux/sched.h b/include/linux/sched.h
index 6674fc1e51bf..34ed0d99b1bd 100644
--- a/include/linux/sched.h
+++ b/include/linux/sched.h
@@ -994,7 +994,6 @@ struct task_struct {
994 */ 994 */
995 struct pipe_inode_info *splice_pipe; 995 struct pipe_inode_info *splice_pipe;
996#ifdef CONFIG_TASK_DELAY_ACCT 996#ifdef CONFIG_TASK_DELAY_ACCT
997 spinlock_t delays_lock;
998 struct task_delay_info *delays; 997 struct task_delay_info *delays;
999#endif 998#endif
1000}; 999};
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-16 14:27:38 -0500