[PATCH] rapidio: core updates

Addresses issues raised with the 2.6.12-rc6-mm1 RIO support.  Fix dma_mask
init, shrink some code, general cleanup.

Signed-off-by: Matt Porter <mporter@kernel.crashing.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

2 files changed, 15 insertions, 0 deletions

diff --git a/include/linux/rio.h b/include/linux/rio.h
index 930bbb7c3802..5c29f2f477c2 100644
--- a/include/linux/rio.h
+++ b/include/linux/rio.h
@@ -91,6 +91,7 @@ struct rio_mport;
  * @swpinfo: Switch port info
  * @src_ops: Source operation capabilities
  * @dst_ops: Destination operation capabilities
+ * @dma_mask: Mask of bits of RIO address this device implements
  * @rswitch: Pointer to &struct rio_switch if valid for this device
  * @driver: Driver claiming this device
  * @dev: Device model device
@@ -112,6 +113,7 @@ struct rio_dev {
         u32 swpinfo;            /* Only used for switches */
         u32 src_ops;
         u32 dst_ops;
+        u64 dma_mask;
         struct rio_switch *rswitch;     /* RIO switch info */
         struct rio_driver *driver;      /* RIO driver claiming this device */
         struct device dev;      /* LDM device structure */
diff --git a/include/linux/rio_regs.h b/include/linux/rio_regs.h
index f419be3be491..326540f9b54e 100644
--- a/include/linux/rio_regs.h
+++ b/include/linux/rio_regs.h
@@ -78,6 +78,19 @@
 #define  RIO_DST_OPS_ATOMIC_CLR         0x00000010      /* [I] Atomic clr op */
 #define  RIO_DST_OPS_PORT_WRITE         0x00000004      /* [I] Port-write op */
 
+#define  RIO_OPS_READ                   0x00008000      /* [I] Read op */
+#define  RIO_OPS_WRITE                  0x00004000      /* [I] Write op */
+#define  RIO_OPS_STREAM_WRITE           0x00002000      /* [I] Str-write op */
+#define  RIO_OPS_WRITE_RESPONSE         0x00001000      /* [I] Write/resp op */
+#define  RIO_OPS_DATA_MSG               0x00000800      /* [II] Data msg op */
+#define  RIO_OPS_DOORBELL               0x00000400      /* [II] Doorbell op */
+#define  RIO_OPS_ATOMIC_TST_SWP         0x00000100      /* [I] Atomic TAS op */
+#define  RIO_OPS_ATOMIC_INC             0x00000080      /* [I] Atomic inc op */
+#define  RIO_OPS_ATOMIC_DEC             0x00000040      /* [I] Atomic dec op */
+#define  RIO_OPS_ATOMIC_SET             0x00000020      /* [I] Atomic set op */
+#define  RIO_OPS_ATOMIC_CLR             0x00000010      /* [I] Atomic clr op */
+#define  RIO_OPS_PORT_WRITE             0x00000004      /* [I] Port-write op */
+
                                         /* 0x20-0x3c *//* Reserved */
 
 #define RIO_MBOX_CSR            0x40    /* [II] Mailbox CSR */