[ARM] nommu: add ARM946E-S core support

This patch adds ARM946E-S core support which has typically 8KB I&D cache.
It has a MPU and supports ARMv5TE instruction set.

Because the ARM946E-S core can be synthesizable with various cache size,
CONFIG_CPU_DCACHE_SIZE is defined for vendor specific configurations.

Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

2 files changed, 16 insertions, 0 deletions

diff --git a/include/asm-arm/cacheflush.h b/include/asm-arm/cacheflush.h
index b0a8603400be..b611a8ea0bb2 100644
--- a/include/asm-arm/cacheflush.h
+++ b/include/asm-arm/cacheflush.h
@@ -64,6 +64,14 @@
 # endif
 #endif
 
+#if defined(CONFIG_CPU_ARM946E)
+# ifdef _CACHE
+#  define MULTI_CACHE 1
+# else
+#  define _CACHE arm946
+# endif
+#endif
+
 #if defined(CONFIG_CPU_SA110) || defined(CONFIG_CPU_SA1100)
 # ifdef _CACHE
 #  define MULTI_CACHE 1
diff --git a/include/asm-arm/proc-fns.h b/include/asm-arm/proc-fns.h
index 87f3ea97f48c..ea7e54c319be 100644
--- a/include/asm-arm/proc-fns.h
+++ b/include/asm-arm/proc-fns.h
@@ -113,6 +113,14 @@
 #   define CPU_NAME cpu_arm940
 #  endif
 # endif
+# ifdef CONFIG_CPU_ARM946E
+#  ifdef CPU_NAME
+#   undef  MULTI_CPU
+#   define MULTI_CPU
+#  else
+#   define CPU_NAME cpu_arm946
+#  endif
+# endif
 # ifdef CONFIG_CPU_SA110
 #  ifdef CPU_NAME
 #   undef  MULTI_CPU