ssb: Fix pcicore cardbus mode

This fixes the pcicore driver to not die a horrible
crash death when inserting a cardbus card.

Signed-off-by: Michael Buesch <mb@bu3sch.de>
Signed-off-by: John W. Linville <linville@tuxdriver.com>

2 files changed, 12 insertions, 0 deletions

diff --git a/include/linux/ssb/ssb.h b/include/linux/ssb/ssb.h
index d14c03685717..20add65215af 100644
--- a/include/linux/ssb/ssb.h
+++ b/include/linux/ssb/ssb.h
@@ -282,6 +282,8 @@ struct ssb_bus {
         struct ssb_boardinfo boardinfo;
         /* Contents of the SPROM. */
         struct ssb_sprom sprom;
+        /* If the board has a cardbus slot, this is set to true. */
+        bool has_cardbus_slot;
 
 #ifdef CONFIG_SSB_EMBEDDED
         /* Lock for GPIO register access. */
@@ -299,8 +301,13 @@ struct ssb_bus {
 
 /* The initialization-invariants. */
 struct ssb_init_invariants {
+        /* Versioning information about the PCB. */
         struct ssb_boardinfo boardinfo;
+        /* The SPROM information. That's either stored in an
+         * EEPROM or NVRAM on the board. */
         struct ssb_sprom sprom;
+        /* If the board has a cardbus slot, this is set to true. */
+        bool has_cardbus_slot;
 };
 /* Type of function to fetch the invariants. */
 typedef int (*ssb_invariants_func_t)(struct ssb_bus *bus,
diff --git a/include/linux/ssb/ssb_driver_pci.h b/include/linux/ssb/ssb_driver_pci.h
index 9cfffb7b1a27..5e25bac4ed31 100644
--- a/include/linux/ssb/ssb_driver_pci.h
+++ b/include/linux/ssb/ssb_driver_pci.h
@@ -51,6 +51,11 @@
 #define  SSB_PCICORE_SBTOPCI1_MASK      0xFC000000
 #define SSB_PCICORE_SBTOPCI2            0x0108  /* Backplane to PCI translation 2 (sbtopci2) */
 #define  SSB_PCICORE_SBTOPCI2_MASK      0xC0000000
+#define SSB_PCICORE_PCICFG0             0x0400  /* PCI config space 0 (rev >= 8) */
+#define SSB_PCICORE_PCICFG1             0x0500  /* PCI config space 1 (rev >= 8) */
+#define SSB_PCICORE_PCICFG2             0x0600  /* PCI config space 2 (rev >= 8) */
+#define SSB_PCICORE_PCICFG3             0x0700  /* PCI config space 3 (rev >= 8) */
+#define SSB_PCICORE_SPROM(wordoffset)   (0x0800 + ((wordoffset) * 2)) /* SPROM shadow area (72 bytes) */
 
 /* SBtoPCIx */
 #define SSB_PCICORE_SBTOPCI_MEM         0x00000000