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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2007-05-12 10:25:50 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2007-05-12 10:25:50 -0400
commit641e79129a56a4c50be1aed0fa713f440b46a440 (patch)
tree41831a6b7927d2d392f5dad8cad7ddd38c363315 /include
parent3b938be69e46b64a516b6e3ed6d93c40c091f22c (diff)
[ARM] Use new get_irqnr_preamble
Use the new get_irqnr_preamble macro to move the address of the IRQ controller outside the IRQ handling loop. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include')
-rw-r--r--include/asm-arm/arch-cl7500/entry-macro.S8
-rw-r--r--include/asm-arm/arch-ebsa110/entry-macro.S2
-rw-r--r--include/asm-arm/arch-ebsa285/entry-macro.S16
-rw-r--r--include/asm-arm/arch-realview/entry-macro.S2
-rw-r--r--include/asm-arm/arch-rpc/entry-macro.S8
-rw-r--r--include/asm-arm/arch-sa1100/entry-macro.S8
-rw-r--r--include/asm-arm/arch-versatile/entry-macro.S2
-rw-r--r--include/asm-arm/hardware/entry-macro-iomd.S28
8 files changed, 42 insertions, 32 deletions
diff --git a/include/asm-arm/arch-cl7500/entry-macro.S b/include/asm-arm/arch-cl7500/entry-macro.S
index 0cfb89b229d1..038b761fdadc 100644
--- a/include/asm-arm/arch-cl7500/entry-macro.S
+++ b/include/asm-arm/arch-cl7500/entry-macro.S
@@ -1,6 +1,14 @@
1#include <asm/hardware.h> 1#include <asm/hardware.h>
2#include <asm/hardware/entry-macro-iomd.S> 2#include <asm/hardware/entry-macro-iomd.S>
3
4 .equ ioc_base_high, IOC_BASE & 0xff000000
5 .equ ioc_base_low, IOC_BASE & 0x00ff0000
6
3 .macro get_irqnr_preamble, base, tmp 7 .macro get_irqnr_preamble, base, tmp
8 mov \base, #ioc_base_high @ point at IOC
9 .if ioc_base_low
10 orr \base, \base, #ioc_base_low
11 .endif
4 .endm 12 .endm
5 13
6 .macro arch_ret_to_user, tmp1, tmp2 14 .macro arch_ret_to_user, tmp1, tmp2
diff --git a/include/asm-arm/arch-ebsa110/entry-macro.S b/include/asm-arm/arch-ebsa110/entry-macro.S
index aa23c5d6c69e..f242be5c49ba 100644
--- a/include/asm-arm/arch-ebsa110/entry-macro.S
+++ b/include/asm-arm/arch-ebsa110/entry-macro.S
@@ -16,13 +16,13 @@
16 .endm 16 .endm
17 17
18 .macro get_irqnr_preamble, base, tmp 18 .macro get_irqnr_preamble, base, tmp
19 mov \base, #IRQ_STAT
19 .endm 20 .endm
20 21
21 .macro arch_ret_to_user, tmp1, tmp2 22 .macro arch_ret_to_user, tmp1, tmp2
22 .endm 23 .endm
23 24
24 .macro get_irqnr_and_base, irqnr, stat, base, tmp 25 .macro get_irqnr_and_base, irqnr, stat, base, tmp
25 mov \base, #IRQ_STAT
26 ldrb \stat, [\base] @ get interrupts 26 ldrb \stat, [\base] @ get interrupts
27 mov \irqnr, #0 27 mov \irqnr, #0
28 tst \stat, #15 28 tst \stat, #15
diff --git a/include/asm-arm/arch-ebsa285/entry-macro.S b/include/asm-arm/arch-ebsa285/entry-macro.S
index 4203dbf10662..e63064edb734 100644
--- a/include/asm-arm/arch-ebsa285/entry-macro.S
+++ b/include/asm-arm/arch-ebsa285/entry-macro.S
@@ -11,24 +11,24 @@
11#include <asm/arch/irqs.h> 11#include <asm/arch/irqs.h>
12#include <asm/hardware/dec21285.h> 12#include <asm/hardware/dec21285.h>
13 13
14 .equ dc21285_high, ARMCSR_BASE & 0xff000000
15 .equ dc21285_low, ARMCSR_BASE & 0x00ffffff
16
14 .macro disable_fiq 17 .macro disable_fiq
15 .endm 18 .endm
16 19
17 .macro get_irqnr_preamble, base, tmp 20 .macro get_irqnr_preamble, base, tmp
21 mov \base, #dc21285_high
22 .if dc21285_low
23 orr \base, \base, #dc21285_low
24 .endif
18 .endm 25 .endm
19 26
20 .macro arch_ret_to_user, tmp1, tmp2 27 .macro arch_ret_to_user, tmp1, tmp2
21 .endm 28 .endm
22 29
23 .equ dc21285_high, ARMCSR_BASE & 0xff000000
24 .equ dc21285_low, ARMCSR_BASE & 0x00ffffff
25
26 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 30 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
27 mov r4, #dc21285_high 31 ldr \irqstat, [\base, #0x180] @ get interrupts
28 .if dc21285_low
29 orr r4, r4, #dc21285_low
30 .endif
31 ldr \irqstat, [r4, #0x180] @ get interrupts
32 32
33 mov \irqnr, #IRQ_SDRAMPARITY 33 mov \irqnr, #IRQ_SDRAMPARITY
34 tst \irqstat, #IRQ_MASK_SDRAMPARITY 34 tst \irqstat, #IRQ_MASK_SDRAMPARITY
diff --git a/include/asm-arm/arch-realview/entry-macro.S b/include/asm-arm/arch-realview/entry-macro.S
index 138838d4ad75..3b4e2076603a 100644
--- a/include/asm-arm/arch-realview/entry-macro.S
+++ b/include/asm-arm/arch-realview/entry-macro.S
@@ -14,6 +14,7 @@
14 .endm 14 .endm
15 15
16 .macro get_irqnr_preamble, base, tmp 16 .macro get_irqnr_preamble, base, tmp
17 ldr \base, =IO_ADDRESS(REALVIEW_GIC_CPU_BASE)
17 .endm 18 .endm
18 19
19 .macro arch_ret_to_user, tmp1, tmp2 20 .macro arch_ret_to_user, tmp1, tmp2
@@ -40,7 +41,6 @@
40 41
41 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 42 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
42 43
43 ldr \base, =IO_ADDRESS(REALVIEW_GIC_CPU_BASE)
44 ldr \irqstat, [\base, #GIC_CPU_INTACK] /* bits 12-10 = src CPU, 9-0 = int # */ 44 ldr \irqstat, [\base, #GIC_CPU_INTACK] /* bits 12-10 = src CPU, 9-0 = int # */
45 45
46 ldr \tmp, =1021 46 ldr \tmp, =1021
diff --git a/include/asm-arm/arch-rpc/entry-macro.S b/include/asm-arm/arch-rpc/entry-macro.S
index 0cfb89b229d1..038b761fdadc 100644
--- a/include/asm-arm/arch-rpc/entry-macro.S
+++ b/include/asm-arm/arch-rpc/entry-macro.S
@@ -1,6 +1,14 @@
1#include <asm/hardware.h> 1#include <asm/hardware.h>
2#include <asm/hardware/entry-macro-iomd.S> 2#include <asm/hardware/entry-macro-iomd.S>
3
4 .equ ioc_base_high, IOC_BASE & 0xff000000
5 .equ ioc_base_low, IOC_BASE & 0x00ff0000
6
3 .macro get_irqnr_preamble, base, tmp 7 .macro get_irqnr_preamble, base, tmp
8 mov \base, #ioc_base_high @ point at IOC
9 .if ioc_base_low
10 orr \base, \base, #ioc_base_low
11 .endif
4 .endm 12 .endm
5 13
6 .macro arch_ret_to_user, tmp1, tmp2 14 .macro arch_ret_to_user, tmp1, tmp2
diff --git a/include/asm-arm/arch-sa1100/entry-macro.S b/include/asm-arm/arch-sa1100/entry-macro.S
index 028967629340..127db4aaf4f2 100644
--- a/include/asm-arm/arch-sa1100/entry-macro.S
+++ b/include/asm-arm/arch-sa1100/entry-macro.S
@@ -12,16 +12,16 @@
12 .endm 12 .endm
13 13
14 .macro get_irqnr_preamble, base, tmp 14 .macro get_irqnr_preamble, base, tmp
15 mov \base, #0xfa000000 @ ICIP = 0xfa050000
16 add \base, \base, #0x00050000
15 .endm 17 .endm
16 18
17 .macro arch_ret_to_user, tmp1, tmp2 19 .macro arch_ret_to_user, tmp1, tmp2
18 .endm 20 .endm
19 21
20 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 22 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
21 mov r4, #0xfa000000 @ ICIP = 0xfa050000 23 ldr \irqstat, [\base] @ get irqs
22 add r4, r4, #0x00050000 24 ldr \irqnr, [\base, #4] @ ICMR = 0xfa050004
23 ldr \irqstat, [r4] @ get irqs
24 ldr \irqnr, [r4, #4] @ ICMR = 0xfa050004
25 ands \irqstat, \irqstat, \irqnr 25 ands \irqstat, \irqstat, \irqnr
26 mov \irqnr, #0 26 mov \irqnr, #0
27 beq 1001f 27 beq 1001f
diff --git a/include/asm-arm/arch-versatile/entry-macro.S b/include/asm-arm/arch-versatile/entry-macro.S
index 0fae002637a0..924d1a8fe360 100644
--- a/include/asm-arm/arch-versatile/entry-macro.S
+++ b/include/asm-arm/arch-versatile/entry-macro.S
@@ -14,13 +14,13 @@
14 .endm 14 .endm
15 15
16 .macro get_irqnr_preamble, base, tmp 16 .macro get_irqnr_preamble, base, tmp
17 ldr \base, =IO_ADDRESS(VERSATILE_VIC_BASE)
17 .endm 18 .endm
18 19
19 .macro arch_ret_to_user, tmp1, tmp2 20 .macro arch_ret_to_user, tmp1, tmp2
20 .endm 21 .endm
21 22
22 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 23 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
23 ldr \base, =IO_ADDRESS(VERSATILE_VIC_BASE)
24 ldr \irqstat, [\base, #VIC_IRQ_STATUS] @ get masked status 24 ldr \irqstat, [\base, #VIC_IRQ_STATUS] @ get masked status
25 mov \irqnr, #0 25 mov \irqnr, #0
26 teq \irqstat, #0 26 teq \irqstat, #0
diff --git a/include/asm-arm/hardware/entry-macro-iomd.S b/include/asm-arm/hardware/entry-macro-iomd.S
index fbed08f298d0..9bb580a5b15e 100644
--- a/include/asm-arm/hardware/entry-macro-iomd.S
+++ b/include/asm-arm/hardware/entry-macro-iomd.S
@@ -11,8 +11,6 @@
11/* IOC / IOMD based hardware */ 11/* IOC / IOMD based hardware */
12#include <asm/hardware/iomd.h> 12#include <asm/hardware/iomd.h>
13 13
14 .equ ioc_base_high, IOC_BASE & 0xff000000
15 .equ ioc_base_low, IOC_BASE & 0x00ff0000
16 .macro disable_fiq 14 .macro disable_fiq
17 mov r12, #ioc_base_high 15 mov r12, #ioc_base_high
18 .if ioc_base_low 16 .if ioc_base_low
@@ -22,33 +20,29 @@
22 .endm 20 .endm
23 21
24 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 22 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
25 mov r4, #ioc_base_high @ point at IOC 23 ldrb \irqstat, [\base, #IOMD_IRQREQB] @ get high priority first
26 .if ioc_base_low 24 ldr \tmp, =irq_prio_h
27 orr r4, r4, #ioc_base_low
28 .endif
29 ldrb \irqstat, [r4, #IOMD_IRQREQB] @ get high priority first
30 ldr \base, =irq_prio_h
31 teq \irqstat, #0 25 teq \irqstat, #0
32#ifdef IOMD_BASE 26#ifdef IOMD_BASE
33 ldreqb \irqstat, [r4, #IOMD_DMAREQ] @ get dma 27 ldreqb \irqstat, [\base, #IOMD_DMAREQ] @ get dma
34 addeq \base, \base, #256 @ irq_prio_h table size 28 addeq \tmp, \tmp, #256 @ irq_prio_h table size
35 teqeq \irqstat, #0 29 teqeq \irqstat, #0
36 bne 2406f 30 bne 2406f
37#endif 31#endif
38 ldreqb \irqstat, [r4, #IOMD_IRQREQA] @ get low priority 32 ldreqb \irqstat, [\base, #IOMD_IRQREQA] @ get low priority
39 addeq \base, \base, #256 @ irq_prio_d table size 33 addeq \tmp, \tmp, #256 @ irq_prio_d table size
40 teqeq \irqstat, #0 34 teqeq \irqstat, #0
41#ifdef IOMD_IRQREQC 35#ifdef IOMD_IRQREQC
42 ldreqb \irqstat, [r4, #IOMD_IRQREQC] 36 ldreqb \irqstat, [\base, #IOMD_IRQREQC]
43 addeq \base, \base, #256 @ irq_prio_l table size 37 addeq \tmp, \tmp, #256 @ irq_prio_l table size
44 teqeq \irqstat, #0 38 teqeq \irqstat, #0
45#endif 39#endif
46#ifdef IOMD_IRQREQD 40#ifdef IOMD_IRQREQD
47 ldreqb \irqstat, [r4, #IOMD_IRQREQD] 41 ldreqb \irqstat, [\base, #IOMD_IRQREQD]
48 addeq \base, \base, #256 @ irq_prio_lc table size 42 addeq \tmp, \tmp, #256 @ irq_prio_lc table size
49 teqeq \irqstat, #0 43 teqeq \irqstat, #0
50#endif 44#endif
512406: ldrneb \irqnr, [\base, \irqstat] @ get IRQ number 452406: ldrneb \irqnr, [\tmp, \irqstat] @ get IRQ number
52 .endm 46 .endm
53 47
54/* 48/*
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