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authorChristoph Lameter <clameter@sgi.com>2008-03-03 14:18:08 -0500
committerChristoph Lameter <clameter@sgi.com>2008-03-03 14:18:08 -0500
commit27710bf6febe8323f78bceca002ca7d71e5012a7 (patch)
tree80a72f385ea28f9f7649363fe5147b3da37f9950 /include
parent9ef64cb4320df821638b508f79aa8b858cca99f0 (diff)
parentcad226b8a71f969ad05137e43b48c9e6059a0b9f (diff)
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
Diffstat (limited to 'include')
-rw-r--r--include/asm-arm/arch-pxa/entry-macro.S2
-rw-r--r--include/asm-arm/arch-pxa/pxa-regs.h3
-rw-r--r--include/asm-arm/kexec.h2
-rw-r--r--include/asm-arm/unaligned.h8
-rw-r--r--include/asm-avr32/pgtable.h1
-rw-r--r--include/asm-blackfin/gptimers.h7
-rw-r--r--include/asm-blackfin/irq.h2
-rw-r--r--include/asm-blackfin/mach-bf527/bfin_serial_5xx.h22
-rw-r--r--include/asm-blackfin/mach-bf533/bfin_serial_5xx.h24
-rw-r--r--include/asm-blackfin/mach-bf537/bfin_serial_5xx.h22
-rw-r--r--include/asm-blackfin/mach-bf548/bfin_serial_5xx.h7
-rw-r--r--include/asm-blackfin/mach-bf561/bfin_serial_5xx.h24
-rw-r--r--include/asm-blackfin/mach-bf561/blackfin.h3
-rw-r--r--include/asm-blackfin/mach-bf561/cdefBF561.h2
-rw-r--r--include/asm-powerpc/reg.h3
-rw-r--r--include/asm-sh/cpu-sh3/cache.h2
-rw-r--r--include/asm-sh/entry-macros.S4
-rw-r--r--include/asm-x86/ptrace-abi.h8
-rw-r--r--include/linux/connector.h2
-rw-r--r--include/linux/elfcore-compat.h4
-rw-r--r--include/linux/hardirq.h10
-rw-r--r--include/linux/maple.h1
-rw-r--r--include/linux/netfilter.h2
-rw-r--r--include/linux/rcuclassic.h3
-rw-r--r--include/linux/rcupreempt.h22
-rw-r--r--include/linux/serial_sci.h (renamed from include/asm-sh/sci.h)10
-rw-r--r--include/linux/usb.h9
-rw-r--r--include/linux/vmstat.h3
-rw-r--r--include/net/sctp/user.h10
29 files changed, 168 insertions, 54 deletions
diff --git a/include/asm-arm/arch-pxa/entry-macro.S b/include/asm-arm/arch-pxa/entry-macro.S
index b7e730851461..c145bb01bc8f 100644
--- a/include/asm-arm/arch-pxa/entry-macro.S
+++ b/include/asm-arm/arch-pxa/entry-macro.S
@@ -35,7 +35,7 @@
351004: 351004:
36 mrc p6, 0, \irqstat, c6, c0, 0 @ ICIP2 36 mrc p6, 0, \irqstat, c6, c0, 0 @ ICIP2
37 mrc p6, 0, \irqnr, c7, c0, 0 @ ICMR2 37 mrc p6, 0, \irqnr, c7, c0, 0 @ ICMR2
38 ands \irqstat, \irqstat, \irqnr 38 ands \irqnr, \irqstat, \irqnr
39 beq 1003f 39 beq 1003f
40 rsb \irqstat, \irqnr, #0 40 rsb \irqstat, \irqnr, #0
41 and \irqstat, \irqstat, \irqnr 41 and \irqstat, \irqstat, \irqnr
diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h
index ac175b4d10cb..2357a73340d4 100644
--- a/include/asm-arm/arch-pxa/pxa-regs.h
+++ b/include/asm-arm/arch-pxa/pxa-regs.h
@@ -520,6 +520,9 @@
520#define MCCR_FSRIE (1 << 1) /* FIFO Service Request Interrupt Enable */ 520#define MCCR_FSRIE (1 << 1) /* FIFO Service Request Interrupt Enable */
521 521
522#define GCR __REG(0x4050000C) /* Global Control Register */ 522#define GCR __REG(0x4050000C) /* Global Control Register */
523#ifdef CONFIG_PXA3xx
524#define GCR_CLKBPB (1 << 31) /* Internal clock enable */
525#endif
523#define GCR_nDMAEN (1 << 24) /* non DMA Enable */ 526#define GCR_nDMAEN (1 << 24) /* non DMA Enable */
524#define GCR_CDONE_IE (1 << 19) /* Command Done Interrupt Enable */ 527#define GCR_CDONE_IE (1 << 19) /* Command Done Interrupt Enable */
525#define GCR_SDONE_IE (1 << 18) /* Status Done Interrupt Enable */ 528#define GCR_SDONE_IE (1 << 18) /* Status Done Interrupt Enable */
diff --git a/include/asm-arm/kexec.h b/include/asm-arm/kexec.h
index 1ee17b6951d0..47fe34d692da 100644
--- a/include/asm-arm/kexec.h
+++ b/include/asm-arm/kexec.h
@@ -8,7 +8,7 @@
8/* Maximum address we can reach in physical address mode */ 8/* Maximum address we can reach in physical address mode */
9#define KEXEC_DESTINATION_MEMORY_LIMIT (-1UL) 9#define KEXEC_DESTINATION_MEMORY_LIMIT (-1UL)
10/* Maximum address we can use for the control code buffer */ 10/* Maximum address we can use for the control code buffer */
11#define KEXEC_CONTROL_MEMORY_LIMIT TASK_SIZE 11#define KEXEC_CONTROL_MEMORY_LIMIT (-1UL)
12 12
13#define KEXEC_CONTROL_CODE_SIZE 4096 13#define KEXEC_CONTROL_CODE_SIZE 4096
14 14
diff --git a/include/asm-arm/unaligned.h b/include/asm-arm/unaligned.h
index 8431f6eed5c6..5db03cf3b905 100644
--- a/include/asm-arm/unaligned.h
+++ b/include/asm-arm/unaligned.h
@@ -40,16 +40,16 @@ extern int __bug_unaligned_x(const void *ptr);
40 */ 40 */
41 41
42#define __get_unaligned_2_le(__p) \ 42#define __get_unaligned_2_le(__p) \
43 (__p[0] | __p[1] << 8) 43 (unsigned int)(__p[0] | __p[1] << 8)
44 44
45#define __get_unaligned_2_be(__p) \ 45#define __get_unaligned_2_be(__p) \
46 (__p[0] << 8 | __p[1]) 46 (unsigned int)(__p[0] << 8 | __p[1])
47 47
48#define __get_unaligned_4_le(__p) \ 48#define __get_unaligned_4_le(__p) \
49 (__p[0] | __p[1] << 8 | __p[2] << 16 | __p[3] << 24) 49 (unsigned int)(__p[0] | __p[1] << 8 | __p[2] << 16 | __p[3] << 24)
50 50
51#define __get_unaligned_4_be(__p) \ 51#define __get_unaligned_4_be(__p) \
52 (__p[0] << 24 | __p[1] << 16 | __p[2] << 8 | __p[3]) 52 (unsigned int)(__p[0] << 24 | __p[1] << 16 | __p[2] << 8 | __p[3])
53 53
54#define __get_unaligned_8_le(__p) \ 54#define __get_unaligned_8_le(__p) \
55 ((unsigned long long)__get_unaligned_4_le((__p+4)) << 32 | \ 55 ((unsigned long long)__get_unaligned_4_le((__p+4)) << 32 | \
diff --git a/include/asm-avr32/pgtable.h b/include/asm-avr32/pgtable.h
index 018f6e2a0242..3ae7b548fce7 100644
--- a/include/asm-avr32/pgtable.h
+++ b/include/asm-avr32/pgtable.h
@@ -157,6 +157,7 @@ extern struct page *empty_zero_page;
157#define _PAGE_S(x) _PAGE_NORMAL(x) 157#define _PAGE_S(x) _PAGE_NORMAL(x)
158 158
159#define PAGE_COPY _PAGE_P(PAGE_WRITE | PAGE_READ) 159#define PAGE_COPY _PAGE_P(PAGE_WRITE | PAGE_READ)
160#define PAGE_SHARED _PAGE_S(PAGE_WRITE | PAGE_READ)
160 161
161#ifndef __ASSEMBLY__ 162#ifndef __ASSEMBLY__
162/* 163/*
diff --git a/include/asm-blackfin/gptimers.h b/include/asm-blackfin/gptimers.h
index 8265ea473d5b..4f318f1fd2d9 100644
--- a/include/asm-blackfin/gptimers.h
+++ b/include/asm-blackfin/gptimers.h
@@ -1,12 +1,11 @@
1/* 1/*
2 * include/asm/bf5xx_timers.h 2 * gptimers.h - Blackfin General Purpose Timer structs/defines/prototypes
3 *
4 * This file contains the major Data structures and constants
5 * used for General Purpose Timer Implementation in BF5xx
6 * 3 *
4 * Copyright (c) 2005-2008 Analog Devices Inc.
7 * Copyright (C) 2005 John DeHority 5 * Copyright (C) 2005 John DeHority
8 * Copyright (C) 2006 Hella Aglaia GmbH (awe@aglaia-gmbh.de) 6 * Copyright (C) 2006 Hella Aglaia GmbH (awe@aglaia-gmbh.de)
9 * 7 *
8 * Licensed under the GPL-2.
10 */ 9 */
11 10
12#ifndef _BLACKFIN_TIMERS_H_ 11#ifndef _BLACKFIN_TIMERS_H_
diff --git a/include/asm-blackfin/irq.h b/include/asm-blackfin/irq.h
index 65480dab244e..86b67834354d 100644
--- a/include/asm-blackfin/irq.h
+++ b/include/asm-blackfin/irq.h
@@ -67,4 +67,6 @@ static __inline__ int irq_canonicalize(int irq)
67#define NO_IRQ ((unsigned int)(-1)) 67#define NO_IRQ ((unsigned int)(-1))
68#endif 68#endif
69 69
70#define SIC_SYSIRQ(irq) (irq - (IRQ_CORETMR + 1))
71
70#endif /* _BFIN_IRQ_H_ */ 72#endif /* _BFIN_IRQ_H_ */
diff --git a/include/asm-blackfin/mach-bf527/bfin_serial_5xx.h b/include/asm-blackfin/mach-bf527/bfin_serial_5xx.h
index 15dbc21eed8b..c0694ecd2ecd 100644
--- a/include/asm-blackfin/mach-bf527/bfin_serial_5xx.h
+++ b/include/asm-blackfin/mach-bf527/bfin_serial_5xx.h
@@ -23,7 +23,6 @@
23#define UART_GET_DLH(uart) bfin_read16(((uart)->port.membase + OFFSET_DLH)) 23#define UART_GET_DLH(uart) bfin_read16(((uart)->port.membase + OFFSET_DLH))
24#define UART_GET_IIR(uart) bfin_read16(((uart)->port.membase + OFFSET_IIR)) 24#define UART_GET_IIR(uart) bfin_read16(((uart)->port.membase + OFFSET_IIR))
25#define UART_GET_LCR(uart) bfin_read16(((uart)->port.membase + OFFSET_LCR)) 25#define UART_GET_LCR(uart) bfin_read16(((uart)->port.membase + OFFSET_LCR))
26#define UART_GET_LSR(uart) bfin_read16(((uart)->port.membase + OFFSET_LSR))
27#define UART_GET_GCTL(uart) bfin_read16(((uart)->port.membase + OFFSET_GCTL)) 26#define UART_GET_GCTL(uart) bfin_read16(((uart)->port.membase + OFFSET_GCTL))
28 27
29#define UART_PUT_CHAR(uart, v) bfin_write16(((uart)->port.membase + OFFSET_THR), v) 28#define UART_PUT_CHAR(uart, v) bfin_write16(((uart)->port.membase + OFFSET_THR), v)
@@ -58,6 +57,7 @@
58struct bfin_serial_port { 57struct bfin_serial_port {
59 struct uart_port port; 58 struct uart_port port;
60 unsigned int old_status; 59 unsigned int old_status;
60 unsigned int lsr;
61#ifdef CONFIG_SERIAL_BFIN_DMA 61#ifdef CONFIG_SERIAL_BFIN_DMA
62 int tx_done; 62 int tx_done;
63 int tx_count; 63 int tx_count;
@@ -67,15 +67,31 @@ struct bfin_serial_port {
67 unsigned int tx_dma_channel; 67 unsigned int tx_dma_channel;
68 unsigned int rx_dma_channel; 68 unsigned int rx_dma_channel;
69 struct work_struct tx_dma_workqueue; 69 struct work_struct tx_dma_workqueue;
70#else
71 struct work_struct cts_workqueue;
72#endif 70#endif
73#ifdef CONFIG_SERIAL_BFIN_CTSRTS 71#ifdef CONFIG_SERIAL_BFIN_CTSRTS
72 struct work_struct cts_workqueue;
74 int cts_pin; 73 int cts_pin;
75 int rts_pin; 74 int rts_pin;
76#endif 75#endif
77}; 76};
78 77
78/* The hardware clears the LSR bits upon read, so we need to cache
79 * some of the more fun bits in software so they don't get lost
80 * when checking the LSR in other code paths (TX).
81 */
82static inline unsigned int UART_GET_LSR(struct bfin_serial_port *uart)
83{
84 unsigned int lsr = bfin_read16(uart->port.membase + OFFSET_LSR);
85 uart->lsr |= (lsr & (BI|FE|PE|OE));
86 return lsr | uart->lsr;
87}
88
89static inline void UART_CLEAR_LSR(struct bfin_serial_port *uart)
90{
91 uart->lsr = 0;
92 bfin_write16(uart->port.membase + OFFSET_LSR, -1);
93}
94
79struct bfin_serial_port bfin_serial_ports[NR_PORTS]; 95struct bfin_serial_port bfin_serial_ports[NR_PORTS];
80struct bfin_serial_res { 96struct bfin_serial_res {
81 unsigned long uart_base_addr; 97 unsigned long uart_base_addr;
diff --git a/include/asm-blackfin/mach-bf533/bfin_serial_5xx.h b/include/asm-blackfin/mach-bf533/bfin_serial_5xx.h
index 7871d4313f49..b6f513bee56e 100644
--- a/include/asm-blackfin/mach-bf533/bfin_serial_5xx.h
+++ b/include/asm-blackfin/mach-bf533/bfin_serial_5xx.h
@@ -23,7 +23,6 @@
23#define UART_GET_DLH(uart) bfin_read16(((uart)->port.membase + OFFSET_DLH)) 23#define UART_GET_DLH(uart) bfin_read16(((uart)->port.membase + OFFSET_DLH))
24#define UART_GET_IIR(uart) bfin_read16(((uart)->port.membase + OFFSET_IIR)) 24#define UART_GET_IIR(uart) bfin_read16(((uart)->port.membase + OFFSET_IIR))
25#define UART_GET_LCR(uart) bfin_read16(((uart)->port.membase + OFFSET_LCR)) 25#define UART_GET_LCR(uart) bfin_read16(((uart)->port.membase + OFFSET_LCR))
26#define UART_GET_LSR(uart) bfin_read16(((uart)->port.membase + OFFSET_LSR))
27#define UART_GET_GCTL(uart) bfin_read16(((uart)->port.membase + OFFSET_GCTL)) 26#define UART_GET_GCTL(uart) bfin_read16(((uart)->port.membase + OFFSET_GCTL))
28 27
29#define UART_PUT_CHAR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_THR),v) 28#define UART_PUT_CHAR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_THR),v)
@@ -46,6 +45,7 @@
46struct bfin_serial_port { 45struct bfin_serial_port {
47 struct uart_port port; 46 struct uart_port port;
48 unsigned int old_status; 47 unsigned int old_status;
48 unsigned int lsr;
49#ifdef CONFIG_SERIAL_BFIN_DMA 49#ifdef CONFIG_SERIAL_BFIN_DMA
50 int tx_done; 50 int tx_done;
51 int tx_count; 51 int tx_count;
@@ -56,14 +56,34 @@ struct bfin_serial_port {
56 unsigned int rx_dma_channel; 56 unsigned int rx_dma_channel;
57 struct work_struct tx_dma_workqueue; 57 struct work_struct tx_dma_workqueue;
58#else 58#else
59 struct work_struct cts_workqueue; 59# if ANOMALY_05000230
60 unsigned int anomaly_threshold;
61# endif
60#endif 62#endif
61#ifdef CONFIG_SERIAL_BFIN_CTSRTS 63#ifdef CONFIG_SERIAL_BFIN_CTSRTS
64 struct work_struct cts_workqueue;
62 int cts_pin; 65 int cts_pin;
63 int rts_pin; 66 int rts_pin;
64#endif 67#endif
65}; 68};
66 69
70/* The hardware clears the LSR bits upon read, so we need to cache
71 * some of the more fun bits in software so they don't get lost
72 * when checking the LSR in other code paths (TX).
73 */
74static inline unsigned int UART_GET_LSR(struct bfin_serial_port *uart)
75{
76 unsigned int lsr = bfin_read16(uart->port.membase + OFFSET_LSR);
77 uart->lsr |= (lsr & (BI|FE|PE|OE));
78 return lsr | uart->lsr;
79}
80
81static inline void UART_CLEAR_LSR(struct bfin_serial_port *uart)
82{
83 uart->lsr = 0;
84 bfin_write16(uart->port.membase + OFFSET_LSR, -1);
85}
86
67struct bfin_serial_port bfin_serial_ports[NR_PORTS]; 87struct bfin_serial_port bfin_serial_ports[NR_PORTS];
68struct bfin_serial_res { 88struct bfin_serial_res {
69 unsigned long uart_base_addr; 89 unsigned long uart_base_addr;
diff --git a/include/asm-blackfin/mach-bf537/bfin_serial_5xx.h b/include/asm-blackfin/mach-bf537/bfin_serial_5xx.h
index 86e45c379838..8fc672d31057 100644
--- a/include/asm-blackfin/mach-bf537/bfin_serial_5xx.h
+++ b/include/asm-blackfin/mach-bf537/bfin_serial_5xx.h
@@ -23,7 +23,6 @@
23#define UART_GET_DLH(uart) bfin_read16(((uart)->port.membase + OFFSET_DLH)) 23#define UART_GET_DLH(uart) bfin_read16(((uart)->port.membase + OFFSET_DLH))
24#define UART_GET_IIR(uart) bfin_read16(((uart)->port.membase + OFFSET_IIR)) 24#define UART_GET_IIR(uart) bfin_read16(((uart)->port.membase + OFFSET_IIR))
25#define UART_GET_LCR(uart) bfin_read16(((uart)->port.membase + OFFSET_LCR)) 25#define UART_GET_LCR(uart) bfin_read16(((uart)->port.membase + OFFSET_LCR))
26#define UART_GET_LSR(uart) bfin_read16(((uart)->port.membase + OFFSET_LSR))
27#define UART_GET_GCTL(uart) bfin_read16(((uart)->port.membase + OFFSET_GCTL)) 26#define UART_GET_GCTL(uart) bfin_read16(((uart)->port.membase + OFFSET_GCTL))
28 27
29#define UART_PUT_CHAR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_THR),v) 28#define UART_PUT_CHAR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_THR),v)
@@ -58,6 +57,7 @@
58struct bfin_serial_port { 57struct bfin_serial_port {
59 struct uart_port port; 58 struct uart_port port;
60 unsigned int old_status; 59 unsigned int old_status;
60 unsigned int lsr;
61#ifdef CONFIG_SERIAL_BFIN_DMA 61#ifdef CONFIG_SERIAL_BFIN_DMA
62 int tx_done; 62 int tx_done;
63 int tx_count; 63 int tx_count;
@@ -67,15 +67,31 @@ struct bfin_serial_port {
67 unsigned int tx_dma_channel; 67 unsigned int tx_dma_channel;
68 unsigned int rx_dma_channel; 68 unsigned int rx_dma_channel;
69 struct work_struct tx_dma_workqueue; 69 struct work_struct tx_dma_workqueue;
70#else
71 struct work_struct cts_workqueue;
72#endif 70#endif
73#ifdef CONFIG_SERIAL_BFIN_CTSRTS 71#ifdef CONFIG_SERIAL_BFIN_CTSRTS
72 struct work_struct cts_workqueue;
74 int cts_pin; 73 int cts_pin;
75 int rts_pin; 74 int rts_pin;
76#endif 75#endif
77}; 76};
78 77
78/* The hardware clears the LSR bits upon read, so we need to cache
79 * some of the more fun bits in software so they don't get lost
80 * when checking the LSR in other code paths (TX).
81 */
82static inline unsigned int UART_GET_LSR(struct bfin_serial_port *uart)
83{
84 unsigned int lsr = bfin_read16(uart->port.membase + OFFSET_LSR);
85 uart->lsr |= (lsr & (BI|FE|PE|OE));
86 return lsr | uart->lsr;
87}
88
89static inline void UART_CLEAR_LSR(struct bfin_serial_port *uart)
90{
91 uart->lsr = 0;
92 bfin_write16(uart->port.membase + OFFSET_LSR, -1);
93}
94
79struct bfin_serial_port bfin_serial_ports[NR_PORTS]; 95struct bfin_serial_port bfin_serial_ports[NR_PORTS];
80struct bfin_serial_res { 96struct bfin_serial_res {
81 unsigned long uart_base_addr; 97 unsigned long uart_base_addr;
diff --git a/include/asm-blackfin/mach-bf548/bfin_serial_5xx.h b/include/asm-blackfin/mach-bf548/bfin_serial_5xx.h
index 3770aa38ee9f..7e6339f62a50 100644
--- a/include/asm-blackfin/mach-bf548/bfin_serial_5xx.h
+++ b/include/asm-blackfin/mach-bf548/bfin_serial_5xx.h
@@ -24,6 +24,8 @@
24#define UART_GET_LCR(uart) bfin_read16(((uart)->port.membase + OFFSET_LCR)) 24#define UART_GET_LCR(uart) bfin_read16(((uart)->port.membase + OFFSET_LCR))
25#define UART_GET_LSR(uart) bfin_read16(((uart)->port.membase + OFFSET_LSR)) 25#define UART_GET_LSR(uart) bfin_read16(((uart)->port.membase + OFFSET_LSR))
26#define UART_GET_GCTL(uart) bfin_read16(((uart)->port.membase + OFFSET_GCTL)) 26#define UART_GET_GCTL(uart) bfin_read16(((uart)->port.membase + OFFSET_GCTL))
27#define UART_GET_MSR(uart) bfin_read16(((uart)->port.membase + OFFSET_MSR))
28#define UART_GET_MCR(uart) bfin_read16(((uart)->port.membase + OFFSET_MCR))
27 29
28#define UART_PUT_CHAR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_THR),v) 30#define UART_PUT_CHAR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_THR),v)
29#define UART_PUT_DLL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLL),v) 31#define UART_PUT_DLL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLL),v)
@@ -32,7 +34,9 @@
32#define UART_PUT_DLH(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLH),v) 34#define UART_PUT_DLH(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLH),v)
33#define UART_PUT_LSR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_LSR),v) 35#define UART_PUT_LSR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_LSR),v)
34#define UART_PUT_LCR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_LCR),v) 36#define UART_PUT_LCR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_LCR),v)
37#define UART_CLEAR_LSR(uart) bfin_write16(((uart)->port.membase + OFFSET_LSR), -1)
35#define UART_PUT_GCTL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_GCTL),v) 38#define UART_PUT_GCTL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_GCTL),v)
39#define UART_PUT_MCR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_MCR),v)
36 40
37#if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART1_CTSRTS) 41#if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART1_CTSRTS)
38# define CONFIG_SERIAL_BFIN_CTSRTS 42# define CONFIG_SERIAL_BFIN_CTSRTS
@@ -68,10 +72,9 @@ struct bfin_serial_port {
68 unsigned int tx_dma_channel; 72 unsigned int tx_dma_channel;
69 unsigned int rx_dma_channel; 73 unsigned int rx_dma_channel;
70 struct work_struct tx_dma_workqueue; 74 struct work_struct tx_dma_workqueue;
71#else
72 struct work_struct cts_workqueue;
73#endif 75#endif
74#ifdef CONFIG_SERIAL_BFIN_CTSRTS 76#ifdef CONFIG_SERIAL_BFIN_CTSRTS
77 struct work_struct cts_workqueue;
75 int cts_pin; 78 int cts_pin;
76 int rts_pin; 79 int rts_pin;
77#endif 80#endif
diff --git a/include/asm-blackfin/mach-bf561/bfin_serial_5xx.h b/include/asm-blackfin/mach-bf561/bfin_serial_5xx.h
index 7871d4313f49..b6f513bee56e 100644
--- a/include/asm-blackfin/mach-bf561/bfin_serial_5xx.h
+++ b/include/asm-blackfin/mach-bf561/bfin_serial_5xx.h
@@ -23,7 +23,6 @@
23#define UART_GET_DLH(uart) bfin_read16(((uart)->port.membase + OFFSET_DLH)) 23#define UART_GET_DLH(uart) bfin_read16(((uart)->port.membase + OFFSET_DLH))
24#define UART_GET_IIR(uart) bfin_read16(((uart)->port.membase + OFFSET_IIR)) 24#define UART_GET_IIR(uart) bfin_read16(((uart)->port.membase + OFFSET_IIR))
25#define UART_GET_LCR(uart) bfin_read16(((uart)->port.membase + OFFSET_LCR)) 25#define UART_GET_LCR(uart) bfin_read16(((uart)->port.membase + OFFSET_LCR))
26#define UART_GET_LSR(uart) bfin_read16(((uart)->port.membase + OFFSET_LSR))
27#define UART_GET_GCTL(uart) bfin_read16(((uart)->port.membase + OFFSET_GCTL)) 26#define UART_GET_GCTL(uart) bfin_read16(((uart)->port.membase + OFFSET_GCTL))
28 27
29#define UART_PUT_CHAR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_THR),v) 28#define UART_PUT_CHAR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_THR),v)
@@ -46,6 +45,7 @@
46struct bfin_serial_port { 45struct bfin_serial_port {
47 struct uart_port port; 46 struct uart_port port;
48 unsigned int old_status; 47 unsigned int old_status;
48 unsigned int lsr;
49#ifdef CONFIG_SERIAL_BFIN_DMA 49#ifdef CONFIG_SERIAL_BFIN_DMA
50 int tx_done; 50 int tx_done;
51 int tx_count; 51 int tx_count;
@@ -56,14 +56,34 @@ struct bfin_serial_port {
56 unsigned int rx_dma_channel; 56 unsigned int rx_dma_channel;
57 struct work_struct tx_dma_workqueue; 57 struct work_struct tx_dma_workqueue;
58#else 58#else
59 struct work_struct cts_workqueue; 59# if ANOMALY_05000230
60 unsigned int anomaly_threshold;
61# endif
60#endif 62#endif
61#ifdef CONFIG_SERIAL_BFIN_CTSRTS 63#ifdef CONFIG_SERIAL_BFIN_CTSRTS
64 struct work_struct cts_workqueue;
62 int cts_pin; 65 int cts_pin;
63 int rts_pin; 66 int rts_pin;
64#endif 67#endif
65}; 68};
66 69
70/* The hardware clears the LSR bits upon read, so we need to cache
71 * some of the more fun bits in software so they don't get lost
72 * when checking the LSR in other code paths (TX).
73 */
74static inline unsigned int UART_GET_LSR(struct bfin_serial_port *uart)
75{
76 unsigned int lsr = bfin_read16(uart->port.membase + OFFSET_LSR);
77 uart->lsr |= (lsr & (BI|FE|PE|OE));
78 return lsr | uart->lsr;
79}
80
81static inline void UART_CLEAR_LSR(struct bfin_serial_port *uart)
82{
83 uart->lsr = 0;
84 bfin_write16(uart->port.membase + OFFSET_LSR, -1);
85}
86
67struct bfin_serial_port bfin_serial_ports[NR_PORTS]; 87struct bfin_serial_port bfin_serial_ports[NR_PORTS];
68struct bfin_serial_res { 88struct bfin_serial_res {
69 unsigned long uart_base_addr; 89 unsigned long uart_base_addr;
diff --git a/include/asm-blackfin/mach-bf561/blackfin.h b/include/asm-blackfin/mach-bf561/blackfin.h
index 362617f93845..3a16df2c86d8 100644
--- a/include/asm-blackfin/mach-bf561/blackfin.h
+++ b/include/asm-blackfin/mach-bf561/blackfin.h
@@ -49,7 +49,8 @@
49#define bfin_read_FIO_INEN() bfin_read_FIO0_INEN() 49#define bfin_read_FIO_INEN() bfin_read_FIO0_INEN()
50#define bfin_write_FIO_INEN(val) bfin_write_FIO0_INEN(val) 50#define bfin_write_FIO_INEN(val) bfin_write_FIO0_INEN(val)
51 51
52 52#define SIC_IWR0 SICA_IWR0
53#define SIC_IWR1 SICA_IWR1
53#define SIC_IAR0 SICA_IAR0 54#define SIC_IAR0 SICA_IAR0
54#define bfin_write_SIC_IMASK0 bfin_write_SICA_IMASK0 55#define bfin_write_SIC_IMASK0 bfin_write_SICA_IMASK0
55#define bfin_write_SIC_IMASK1 bfin_write_SICA_IMASK1 56#define bfin_write_SIC_IMASK1 bfin_write_SICA_IMASK1
diff --git a/include/asm-blackfin/mach-bf561/cdefBF561.h b/include/asm-blackfin/mach-bf561/cdefBF561.h
index d667816486c0..1bc8d2f89ccc 100644
--- a/include/asm-blackfin/mach-bf561/cdefBF561.h
+++ b/include/asm-blackfin/mach-bf561/cdefBF561.h
@@ -559,6 +559,7 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
559#define bfin_write_PPI0_CONTROL(val) bfin_write16(PPI0_CONTROL,val) 559#define bfin_write_PPI0_CONTROL(val) bfin_write16(PPI0_CONTROL,val)
560#define bfin_read_PPI0_STATUS() bfin_read16(PPI0_STATUS) 560#define bfin_read_PPI0_STATUS() bfin_read16(PPI0_STATUS)
561#define bfin_write_PPI0_STATUS(val) bfin_write16(PPI0_STATUS,val) 561#define bfin_write_PPI0_STATUS(val) bfin_write16(PPI0_STATUS,val)
562#define bfin_clear_PPI0_STATUS() bfin_read_PPI0_STATUS()
562#define bfin_read_PPI0_COUNT() bfin_read16(PPI0_COUNT) 563#define bfin_read_PPI0_COUNT() bfin_read16(PPI0_COUNT)
563#define bfin_write_PPI0_COUNT(val) bfin_write16(PPI0_COUNT,val) 564#define bfin_write_PPI0_COUNT(val) bfin_write16(PPI0_COUNT,val)
564#define bfin_read_PPI0_DELAY() bfin_read16(PPI0_DELAY) 565#define bfin_read_PPI0_DELAY() bfin_read16(PPI0_DELAY)
@@ -570,6 +571,7 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
570#define bfin_write_PPI1_CONTROL(val) bfin_write16(PPI1_CONTROL,val) 571#define bfin_write_PPI1_CONTROL(val) bfin_write16(PPI1_CONTROL,val)
571#define bfin_read_PPI1_STATUS() bfin_read16(PPI1_STATUS) 572#define bfin_read_PPI1_STATUS() bfin_read16(PPI1_STATUS)
572#define bfin_write_PPI1_STATUS(val) bfin_write16(PPI1_STATUS,val) 573#define bfin_write_PPI1_STATUS(val) bfin_write16(PPI1_STATUS,val)
574#define bfin_clear_PPI1_STATUS() bfin_read_PPI1_STATUS()
573#define bfin_read_PPI1_COUNT() bfin_read16(PPI1_COUNT) 575#define bfin_read_PPI1_COUNT() bfin_read16(PPI1_COUNT)
574#define bfin_write_PPI1_COUNT(val) bfin_write16(PPI1_COUNT,val) 576#define bfin_write_PPI1_COUNT(val) bfin_write16(PPI1_COUNT,val)
575#define bfin_read_PPI1_DELAY() bfin_read16(PPI1_DELAY) 577#define bfin_read_PPI1_DELAY() bfin_read16(PPI1_DELAY)
diff --git a/include/asm-powerpc/reg.h b/include/asm-powerpc/reg.h
index 0d6238987df8..edc0cfd7f6e2 100644
--- a/include/asm-powerpc/reg.h
+++ b/include/asm-powerpc/reg.h
@@ -153,6 +153,9 @@
153#define CTRL_RUNLATCH 0x1 153#define CTRL_RUNLATCH 0x1
154#define SPRN_DABR 0x3F5 /* Data Address Breakpoint Register */ 154#define SPRN_DABR 0x3F5 /* Data Address Breakpoint Register */
155#define DABR_TRANSLATION (1UL << 2) 155#define DABR_TRANSLATION (1UL << 2)
156#define SPRN_DABRX 0x3F7 /* Data Address Breakpoint Register Extension */
157#define DABRX_USER (1UL << 0)
158#define DABRX_KERNEL (1UL << 1)
156#define SPRN_DAR 0x013 /* Data Address Register */ 159#define SPRN_DAR 0x013 /* Data Address Register */
157#define SPRN_DSISR 0x012 /* Data Storage Interrupt Status Register */ 160#define SPRN_DSISR 0x012 /* Data Storage Interrupt Status Register */
158#define DSISR_NOHPTE 0x40000000 /* no translation found */ 161#define DSISR_NOHPTE 0x40000000 /* no translation found */
diff --git a/include/asm-sh/cpu-sh3/cache.h b/include/asm-sh/cpu-sh3/cache.h
index 56bd838b7db4..bee2d81c56bf 100644
--- a/include/asm-sh/cpu-sh3/cache.h
+++ b/include/asm-sh/cpu-sh3/cache.h
@@ -35,7 +35,7 @@
35 defined(CONFIG_CPU_SUBTYPE_SH7710) || \ 35 defined(CONFIG_CPU_SUBTYPE_SH7710) || \
36 defined(CONFIG_CPU_SUBTYPE_SH7720) || \ 36 defined(CONFIG_CPU_SUBTYPE_SH7720) || \
37 defined(CONFIG_CPU_SUBTYPE_SH7721) 37 defined(CONFIG_CPU_SUBTYPE_SH7721)
38#define CCR3 0xa40000b4 38#define CCR3_REG 0xa40000b4
39#define CCR_CACHE_16KB 0x00010000 39#define CCR_CACHE_16KB 0x00010000
40#define CCR_CACHE_32KB 0x00020000 40#define CCR_CACHE_32KB 0x00020000
41#endif 41#endif
diff --git a/include/asm-sh/entry-macros.S b/include/asm-sh/entry-macros.S
index 500030eae7aa..2dab0b8d9454 100644
--- a/include/asm-sh/entry-macros.S
+++ b/include/asm-sh/entry-macros.S
@@ -12,7 +12,7 @@
12 not r11, r11 12 not r11, r11
13 stc sr, r10 13 stc sr, r10
14 and r11, r10 14 and r11, r10
15#ifdef CONFIG_HAS_SR_RB 15#ifdef CONFIG_CPU_HAS_SR_RB
16 stc k_g_imask, r11 16 stc k_g_imask, r11
17 or r11, r10 17 or r11, r10
18#endif 18#endif
@@ -20,7 +20,7 @@
20 .endm 20 .endm
21 21
22 .macro get_current_thread_info, ti, tmp 22 .macro get_current_thread_info, ti, tmp
23#ifdef CONFIG_HAS_SR_RB 23#ifdef CONFIG_CPU_HAS_SR_RB
24 stc r7_bank, \ti 24 stc r7_bank, \ti
25#else 25#else
26 mov #((THREAD_SIZE - 1) >> 10) ^ 0xff, \tmp 26 mov #((THREAD_SIZE - 1) >> 10) ^ 0xff, \tmp
diff --git a/include/asm-x86/ptrace-abi.h b/include/asm-x86/ptrace-abi.h
index 81a8ee4c55fc..f224eb3c3157 100644
--- a/include/asm-x86/ptrace-abi.h
+++ b/include/asm-x86/ptrace-abi.h
@@ -89,13 +89,13 @@
89*/ 89*/
90struct ptrace_bts_config { 90struct ptrace_bts_config {
91 /* requested or actual size of BTS buffer in bytes */ 91 /* requested or actual size of BTS buffer in bytes */
92 u32 size; 92 __u32 size;
93 /* bitmask of below flags */ 93 /* bitmask of below flags */
94 u32 flags; 94 __u32 flags;
95 /* buffer overflow signal */ 95 /* buffer overflow signal */
96 u32 signal; 96 __u32 signal;
97 /* actual size of bts_struct in bytes */ 97 /* actual size of bts_struct in bytes */
98 u32 bts_size; 98 __u32 bts_size;
99}; 99};
100#endif 100#endif
101 101
diff --git a/include/linux/connector.h b/include/linux/connector.h
index da6dd957f908..96a89d3d6727 100644
--- a/include/linux/connector.h
+++ b/include/linux/connector.h
@@ -170,7 +170,5 @@ int cn_cb_equal(struct cb_id *, struct cb_id *);
170 170
171void cn_queue_wrapper(struct work_struct *work); 171void cn_queue_wrapper(struct work_struct *work);
172 172
173extern int cn_already_initialized;
174
175#endif /* __KERNEL__ */ 173#endif /* __KERNEL__ */
176#endif /* __CONNECTOR_H */ 174#endif /* __CONNECTOR_H */
diff --git a/include/linux/elfcore-compat.h b/include/linux/elfcore-compat.h
index 532d13adabc4..0a90e1c3a422 100644
--- a/include/linux/elfcore-compat.h
+++ b/include/linux/elfcore-compat.h
@@ -45,8 +45,8 @@ struct compat_elf_prpsinfo
45 char pr_zomb; 45 char pr_zomb;
46 char pr_nice; 46 char pr_nice;
47 compat_ulong_t pr_flag; 47 compat_ulong_t pr_flag;
48 compat_uid_t pr_uid; 48 __compat_uid_t pr_uid;
49 compat_gid_t pr_gid; 49 __compat_gid_t pr_gid;
50 compat_pid_t pr_pid, pr_ppid, pr_pgrp, pr_sid; 50 compat_pid_t pr_pid, pr_ppid, pr_pgrp, pr_sid;
51 char pr_fname[16]; 51 char pr_fname[16];
52 char pr_psargs[ELF_PRARGSZ]; 52 char pr_psargs[ELF_PRARGSZ];
diff --git a/include/linux/hardirq.h b/include/linux/hardirq.h
index 2961ec788046..49829988bfa0 100644
--- a/include/linux/hardirq.h
+++ b/include/linux/hardirq.h
@@ -109,6 +109,14 @@ static inline void account_system_vtime(struct task_struct *tsk)
109} 109}
110#endif 110#endif
111 111
112#if defined(CONFIG_PREEMPT_RCU) && defined(CONFIG_NO_HZ)
113extern void rcu_irq_enter(void);
114extern void rcu_irq_exit(void);
115#else
116# define rcu_irq_enter() do { } while (0)
117# define rcu_irq_exit() do { } while (0)
118#endif /* CONFIG_PREEMPT_RCU */
119
112/* 120/*
113 * It is safe to do non-atomic ops on ->hardirq_context, 121 * It is safe to do non-atomic ops on ->hardirq_context,
114 * because NMI handlers may not preempt and the ops are 122 * because NMI handlers may not preempt and the ops are
@@ -117,6 +125,7 @@ static inline void account_system_vtime(struct task_struct *tsk)
117 */ 125 */
118#define __irq_enter() \ 126#define __irq_enter() \
119 do { \ 127 do { \
128 rcu_irq_enter(); \
120 account_system_vtime(current); \ 129 account_system_vtime(current); \
121 add_preempt_count(HARDIRQ_OFFSET); \ 130 add_preempt_count(HARDIRQ_OFFSET); \
122 trace_hardirq_enter(); \ 131 trace_hardirq_enter(); \
@@ -135,6 +144,7 @@ extern void irq_enter(void);
135 trace_hardirq_exit(); \ 144 trace_hardirq_exit(); \
136 account_system_vtime(current); \ 145 account_system_vtime(current); \
137 sub_preempt_count(HARDIRQ_OFFSET); \ 146 sub_preempt_count(HARDIRQ_OFFSET); \
147 rcu_irq_exit(); \
138 } while (0) 148 } while (0)
139 149
140/* 150/*
diff --git a/include/linux/maple.h b/include/linux/maple.h
index 3f01e2bae1a1..d31e36ebb436 100644
--- a/include/linux/maple.h
+++ b/include/linux/maple.h
@@ -64,7 +64,6 @@ struct maple_driver {
64 int (*connect) (struct maple_device * dev); 64 int (*connect) (struct maple_device * dev);
65 void (*disconnect) (struct maple_device * dev); 65 void (*disconnect) (struct maple_device * dev);
66 struct device_driver drv; 66 struct device_driver drv;
67 int registered;
68}; 67};
69 68
70void maple_getcond_callback(struct maple_device *dev, 69void maple_getcond_callback(struct maple_device *dev,
diff --git a/include/linux/netfilter.h b/include/linux/netfilter.h
index b74b615492e8..f0680c2bee73 100644
--- a/include/linux/netfilter.h
+++ b/include/linux/netfilter.h
@@ -31,7 +31,7 @@
31#define NF_VERDICT_QMASK 0xffff0000 31#define NF_VERDICT_QMASK 0xffff0000
32#define NF_VERDICT_QBITS 16 32#define NF_VERDICT_QBITS 16
33 33
34#define NF_QUEUE_NR(x) (((x << NF_VERDICT_QBITS) & NF_VERDICT_QMASK) | NF_QUEUE) 34#define NF_QUEUE_NR(x) ((((x) << NF_VERDICT_BITS) & NF_VERDICT_QMASK) | NF_QUEUE)
35 35
36/* only for userspace compatibility */ 36/* only for userspace compatibility */
37#ifndef __KERNEL__ 37#ifndef __KERNEL__
diff --git a/include/linux/rcuclassic.h b/include/linux/rcuclassic.h
index 4d6624260b4c..b3dccd68629e 100644
--- a/include/linux/rcuclassic.h
+++ b/include/linux/rcuclassic.h
@@ -160,5 +160,8 @@ extern void rcu_restart_cpu(int cpu);
160extern long rcu_batches_completed(void); 160extern long rcu_batches_completed(void);
161extern long rcu_batches_completed_bh(void); 161extern long rcu_batches_completed_bh(void);
162 162
163#define rcu_enter_nohz() do { } while (0)
164#define rcu_exit_nohz() do { } while (0)
165
163#endif /* __KERNEL__ */ 166#endif /* __KERNEL__ */
164#endif /* __LINUX_RCUCLASSIC_H */ 167#endif /* __LINUX_RCUCLASSIC_H */
diff --git a/include/linux/rcupreempt.h b/include/linux/rcupreempt.h
index 60c2a033b19e..01152ed532c8 100644
--- a/include/linux/rcupreempt.h
+++ b/include/linux/rcupreempt.h
@@ -82,5 +82,27 @@ extern struct rcupreempt_trace *rcupreempt_trace_cpu(int cpu);
82 82
83struct softirq_action; 83struct softirq_action;
84 84
85#ifdef CONFIG_NO_HZ
86DECLARE_PER_CPU(long, dynticks_progress_counter);
87
88static inline void rcu_enter_nohz(void)
89{
90 __get_cpu_var(dynticks_progress_counter)++;
91 WARN_ON(__get_cpu_var(dynticks_progress_counter) & 0x1);
92 mb();
93}
94
95static inline void rcu_exit_nohz(void)
96{
97 mb();
98 __get_cpu_var(dynticks_progress_counter)++;
99 WARN_ON(!(__get_cpu_var(dynticks_progress_counter) & 0x1));
100}
101
102#else /* CONFIG_NO_HZ */
103#define rcu_enter_nohz() do { } while (0)
104#define rcu_exit_nohz() do { } while (0)
105#endif /* CONFIG_NO_HZ */
106
85#endif /* __KERNEL__ */ 107#endif /* __KERNEL__ */
86#endif /* __LINUX_RCUPREEMPT_H */ 108#endif /* __LINUX_RCUPREEMPT_H */
diff --git a/include/asm-sh/sci.h b/include/linux/serial_sci.h
index 52e73660c129..893cc53486bc 100644
--- a/include/asm-sh/sci.h
+++ b/include/linux/serial_sci.h
@@ -1,12 +1,10 @@
1#ifndef __ASM_SH_SCI_H 1#ifndef __LINUX_SERIAL_SCI_H
2#define __ASM_SH_SCI_H 2#define __LINUX_SERIAL_SCI_H
3 3
4#include <linux/serial_core.h> 4#include <linux/serial_core.h>
5 5
6/* 6/*
7 * Generic header for SuperH SCI(F) 7 * Generic header for SuperH SCI(F) (used by sh/sh64/h8300 and related parts)
8 *
9 * Do not place SH-specific parts in here, sh64 and h8300 depend on this too.
10 */ 8 */
11 9
12/* Offsets into the sci_port->irqs array */ 10/* Offsets into the sci_port->irqs array */
@@ -31,4 +29,4 @@ struct plat_sci_port {
31 29
32int early_sci_setup(struct uart_port *port); 30int early_sci_setup(struct uart_port *port);
33 31
34#endif /* __ASM_SH_SCI_H */ 32#endif /* __LINUX_SERIAL_SCI_H */
diff --git a/include/linux/usb.h b/include/linux/usb.h
index 2372e2e6b527..5bd3ae8aaaf4 100644
--- a/include/linux/usb.h
+++ b/include/linux/usb.h
@@ -781,8 +781,7 @@ static inline int usb_endpoint_is_isoc_out(
781 .idVendor = (vend), \ 781 .idVendor = (vend), \
782 .idProduct = (prod) 782 .idProduct = (prod)
783/** 783/**
784 * USB_DEVICE_VER - macro used to describe a specific usb device with a 784 * USB_DEVICE_VER - describe a specific usb device with a version range
785 * version range
786 * @vend: the 16 bit USB Vendor ID 785 * @vend: the 16 bit USB Vendor ID
787 * @prod: the 16 bit USB Product ID 786 * @prod: the 16 bit USB Product ID
788 * @lo: the bcdDevice_lo value 787 * @lo: the bcdDevice_lo value
@@ -799,8 +798,7 @@ static inline int usb_endpoint_is_isoc_out(
799 .bcdDevice_hi = (hi) 798 .bcdDevice_hi = (hi)
800 799
801/** 800/**
802 * USB_DEVICE_INTERFACE_PROTOCOL - macro used to describe a usb 801 * USB_DEVICE_INTERFACE_PROTOCOL - describe a usb device with a specific interface protocol
803 * device with a specific interface protocol
804 * @vend: the 16 bit USB Vendor ID 802 * @vend: the 16 bit USB Vendor ID
805 * @prod: the 16 bit USB Product ID 803 * @prod: the 16 bit USB Product ID
806 * @pr: bInterfaceProtocol value 804 * @pr: bInterfaceProtocol value
@@ -846,8 +844,7 @@ static inline int usb_endpoint_is_isoc_out(
846 .bInterfaceProtocol = (pr) 844 .bInterfaceProtocol = (pr)
847 845
848/** 846/**
849 * USB_DEVICE_AND_INTERFACE_INFO - macro used to describe a specific usb device 847 * USB_DEVICE_AND_INTERFACE_INFO - describe a specific usb device with a class of usb interfaces
850 * with a class of usb interfaces
851 * @vend: the 16 bit USB Vendor ID 848 * @vend: the 16 bit USB Vendor ID
852 * @prod: the 16 bit USB Product ID 849 * @prod: the 16 bit USB Product ID
853 * @cl: bInterfaceClass value 850 * @cl: bInterfaceClass value
diff --git a/include/linux/vmstat.h b/include/linux/vmstat.h
index 75370ec0923e..9f1b4b46151e 100644
--- a/include/linux/vmstat.h
+++ b/include/linux/vmstat.h
@@ -246,8 +246,7 @@ static inline void __dec_zone_state(struct zone *zone, enum zone_stat_item item)
246static inline void __dec_zone_page_state(struct page *page, 246static inline void __dec_zone_page_state(struct page *page,
247 enum zone_stat_item item) 247 enum zone_stat_item item)
248{ 248{
249 atomic_long_dec(&page_zone(page)->vm_stat[item]); 249 __dec_zone_state(page_zone(page), item);
250 atomic_long_dec(&vm_stat[item]);
251} 250}
252 251
253/* 252/*
diff --git a/include/net/sctp/user.h b/include/net/sctp/user.h
index 9462d6ae2f37..9619b9d35c9e 100644
--- a/include/net/sctp/user.h
+++ b/include/net/sctp/user.h
@@ -411,6 +411,7 @@ struct sctp_event_subscribe {
411 __u8 sctp_shutdown_event; 411 __u8 sctp_shutdown_event;
412 __u8 sctp_partial_delivery_event; 412 __u8 sctp_partial_delivery_event;
413 __u8 sctp_adaptation_layer_event; 413 __u8 sctp_adaptation_layer_event;
414 __u8 sctp_authentication_event;
414}; 415};
415 416
416/* 417/*
@@ -587,7 +588,7 @@ struct sctp_authchunk {
587 * endpoint requires the peer to use. 588 * endpoint requires the peer to use.
588*/ 589*/
589struct sctp_hmacalgo { 590struct sctp_hmacalgo {
590 __u16 shmac_num_idents; 591 __u32 shmac_num_idents;
591 __u16 shmac_idents[]; 592 __u16 shmac_idents[];
592}; 593};
593 594
@@ -600,7 +601,7 @@ struct sctp_hmacalgo {
600struct sctp_authkey { 601struct sctp_authkey {
601 sctp_assoc_t sca_assoc_id; 602 sctp_assoc_t sca_assoc_id;
602 __u16 sca_keynumber; 603 __u16 sca_keynumber;
603 __u16 sca_keylen; 604 __u16 sca_keylength;
604 __u8 sca_key[]; 605 __u8 sca_key[];
605}; 606};
606 607
@@ -693,8 +694,9 @@ struct sctp_status {
693 * the peer requires to be received authenticated only. 694 * the peer requires to be received authenticated only.
694 */ 695 */
695struct sctp_authchunks { 696struct sctp_authchunks {
696 sctp_assoc_t gauth_assoc_id; 697 sctp_assoc_t gauth_assoc_id;
697 uint8_t gauth_chunks[]; 698 __u32 gauth_number_of_chunks;
699 uint8_t gauth_chunks[];
698}; 700};
699 701
700/* 702/*