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authorRichard Purdie <rpurdie@rpsys.net>2006-12-30 10:08:50 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2006-12-30 12:05:08 -0500
commit1c9d3df5e88ad7db23f5b22f4341c39722a904a4 (patch)
treedbabefd52a5f8a5f35216bda33f29e4b9b398569 /include
parentb0b1d60a64054697ef828e0565f006cc0f823590 (diff)
[ARM] 4078/1: Fix ARM copypage cache coherency problems
If PG_dcache_dirty is set for a page, we need to flush the source page before performing any copypage operation using a different virtual address. This fixes the copypage implementations for XScale, StrongARM and ARMv6. This patch fixes segmentation faults seen in the dynamic linker under the usage patterns in glibc 2.4/2.5. Signed-off-by: Richard Purdie <rpurdie@rpsys.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include')
-rw-r--r--include/asm-arm/cacheflush.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/asm-arm/cacheflush.h b/include/asm-arm/cacheflush.h
index 378a3a2ce8d9..d51049522cd0 100644
--- a/include/asm-arm/cacheflush.h
+++ b/include/asm-arm/cacheflush.h
@@ -355,6 +355,8 @@ extern void flush_ptrace_access(struct vm_area_struct *vma, struct page *page,
355 */ 355 */
356extern void flush_dcache_page(struct page *); 356extern void flush_dcache_page(struct page *);
357 357
358extern void __flush_dcache_page(struct address_space *mapping, struct page *page);
359
358#define flush_dcache_mmap_lock(mapping) \ 360#define flush_dcache_mmap_lock(mapping) \
359 write_lock_irq(&(mapping)->tree_lock) 361 write_lock_irq(&(mapping)->tree_lock)
360#define flush_dcache_mmap_unlock(mapping) \ 362#define flush_dcache_mmap_unlock(mapping) \