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authorLinus Torvalds <torvalds@linux-foundation.org>2011-11-04 21:02:25 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2011-11-04 21:02:25 -0400
commitfba9569924e06da076cb2ad12474bbd82d69f54d (patch)
treef0b7d9c82f8dd90f0dc757a4c00afc0872fc1484 /include
parent3d0a8d10cfb4cc3d1877c29a866ee7d8a46aa2fa (diff)
parent4598fc2c94b68740e0269db03c98a1e7ad5af773 (diff)
Merge branch 'next' of git://git.infradead.org/users/vkoul/slave-dma
* 'next' of git://git.infradead.org/users/vkoul/slave-dma: (63 commits) dmaengine: mid_dma: mask_peripheral_interrupt only when dmac is idle dmaengine/ep93xx_dma: add module.h include pch_dma: Reduce wasting memory pch_dma: Fix suspend issue dma/timberdale: free_irq() on an error path dma: shdma: transfer based runtime PM dmaengine: shdma: protect against the IRQ handler dmaengine i.MX DMA/SDMA: add missing include of linux/module.h dmaengine: delete redundant chan_id and chancnt initialization in dma drivers dmaengine/amba-pl08x: Check txd->llis_va before freeing dma_pool dmaengine/amba-pl08x: Add support for sg len greater than one for slave transfers serial: sh-sci: don't filter on DMA device, use only channel ID ARM: SAMSUNG: Remove Samsung specific enum type for dma direction ASoC: Samsung: Update DMA interface spi/s3c64xx: Merge dma control code spi/s3c64xx: Add support DMA engine API ARM: SAMSUNG: Remove S3C-PL330-DMA driver ARM: S5P64X0: Use generic DMA PL330 driver ARM: S5PC100: Use generic DMA PL330 driver ARM: S5PV210: Use generic DMA PL330 driver ... Fix up fairly trivial conflicts in - arch/arm/mach-exynos4/{Kconfig,clock.c} - arch/arm/mach-s5p64x0/dma.c
Diffstat (limited to 'include')
-rw-r--r--include/linux/amba/pl08x.h30
-rw-r--r--include/linux/amba/pl330.h6
-rw-r--r--include/linux/dmaengine.h13
-rw-r--r--include/linux/serial_sci.h2
4 files changed, 37 insertions, 14 deletions
diff --git a/include/linux/amba/pl08x.h b/include/linux/amba/pl08x.h
index e6e28f37d8ec..9eabffbc4e50 100644
--- a/include/linux/amba/pl08x.h
+++ b/include/linux/amba/pl08x.h
@@ -47,6 +47,9 @@ enum {
47 * @muxval: a number usually used to poke into some mux regiser to 47 * @muxval: a number usually used to poke into some mux regiser to
48 * mux in the signal to this channel 48 * mux in the signal to this channel
49 * @cctl_opt: default options for the channel control register 49 * @cctl_opt: default options for the channel control register
50 * @device_fc: Flow Controller Settings for ccfg register. Only valid for slave
51 * channels. Fill with 'true' if peripheral should be flow controller. Direction
52 * will be selected at Runtime.
50 * @addr: source/target address in physical memory for this DMA channel, 53 * @addr: source/target address in physical memory for this DMA channel,
51 * can be the address of a FIFO register for burst requests for example. 54 * can be the address of a FIFO register for burst requests for example.
52 * This can be left undefined if the PrimeCell API is used for configuring 55 * This can be left undefined if the PrimeCell API is used for configuring
@@ -65,6 +68,7 @@ struct pl08x_channel_data {
65 int max_signal; 68 int max_signal;
66 u32 muxval; 69 u32 muxval;
67 u32 cctl; 70 u32 cctl;
71 bool device_fc;
68 dma_addr_t addr; 72 dma_addr_t addr;
69 bool circular_buffer; 73 bool circular_buffer;
70 bool single; 74 bool single;
@@ -77,13 +81,11 @@ struct pl08x_channel_data {
77 * @addr: current address 81 * @addr: current address
78 * @maxwidth: the maximum width of a transfer on this bus 82 * @maxwidth: the maximum width of a transfer on this bus
79 * @buswidth: the width of this bus in bytes: 1, 2 or 4 83 * @buswidth: the width of this bus in bytes: 1, 2 or 4
80 * @fill_bytes: bytes required to fill to the next bus memory boundary
81 */ 84 */
82struct pl08x_bus_data { 85struct pl08x_bus_data {
83 dma_addr_t addr; 86 dma_addr_t addr;
84 u8 maxwidth; 87 u8 maxwidth;
85 u8 buswidth; 88 u8 buswidth;
86 size_t fill_bytes;
87}; 89};
88 90
89/** 91/**
@@ -104,17 +106,35 @@ struct pl08x_phy_chan {
104}; 106};
105 107
106/** 108/**
109 * struct pl08x_sg - structure containing data per sg
110 * @src_addr: src address of sg
111 * @dst_addr: dst address of sg
112 * @len: transfer len in bytes
113 * @node: node for txd's dsg_list
114 */
115struct pl08x_sg {
116 dma_addr_t src_addr;
117 dma_addr_t dst_addr;
118 size_t len;
119 struct list_head node;
120};
121
122/**
107 * struct pl08x_txd - wrapper for struct dma_async_tx_descriptor 123 * struct pl08x_txd - wrapper for struct dma_async_tx_descriptor
124 * @tx: async tx descriptor
125 * @node: node for txd list for channels
126 * @dsg_list: list of children sg's
127 * @direction: direction of transfer
108 * @llis_bus: DMA memory address (physical) start for the LLIs 128 * @llis_bus: DMA memory address (physical) start for the LLIs
109 * @llis_va: virtual memory address start for the LLIs 129 * @llis_va: virtual memory address start for the LLIs
130 * @cctl: control reg values for current txd
131 * @ccfg: config reg values for current txd
110 */ 132 */
111struct pl08x_txd { 133struct pl08x_txd {
112 struct dma_async_tx_descriptor tx; 134 struct dma_async_tx_descriptor tx;
113 struct list_head node; 135 struct list_head node;
136 struct list_head dsg_list;
114 enum dma_data_direction direction; 137 enum dma_data_direction direction;
115 dma_addr_t src_addr;
116 dma_addr_t dst_addr;
117 size_t len;
118 dma_addr_t llis_bus; 138 dma_addr_t llis_bus;
119 struct pl08x_lli *llis_va; 139 struct pl08x_lli *llis_va;
120 /* Default cctl value for LLIs */ 140 /* Default cctl value for LLIs */
diff --git a/include/linux/amba/pl330.h b/include/linux/amba/pl330.h
index cbee7de7dd36..d12f077a6daf 100644
--- a/include/linux/amba/pl330.h
+++ b/include/linux/amba/pl330.h
@@ -19,12 +19,8 @@ struct dma_pl330_peri {
19 * Peri_Req i/f of the DMAC that is 19 * Peri_Req i/f of the DMAC that is
20 * peripheral could be reached from. 20 * peripheral could be reached from.
21 */ 21 */
22 u8 peri_id; /* {0, 31} */ 22 u8 peri_id; /* specific dma id */
23 enum pl330_reqtype rqtype; 23 enum pl330_reqtype rqtype;
24
25 /* For M->D and D->M Channels */
26 int burst_sz; /* in power of 2 */
27 dma_addr_t fifo_addr;
28}; 24};
29 25
30struct dma_pl330_platdata { 26struct dma_pl330_platdata {
diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h
index 8fbf40e0713c..ace51af4369f 100644
--- a/include/linux/dmaengine.h
+++ b/include/linux/dmaengine.h
@@ -24,8 +24,7 @@
24#include <linux/device.h> 24#include <linux/device.h>
25#include <linux/uio.h> 25#include <linux/uio.h>
26#include <linux/dma-direction.h> 26#include <linux/dma-direction.h>
27 27#include <linux/scatterlist.h>
28struct scatterlist;
29 28
30/** 29/**
31 * typedef dma_cookie_t - an opaque DMA cookie 30 * typedef dma_cookie_t - an opaque DMA cookie
@@ -519,6 +518,16 @@ static inline int dmaengine_slave_config(struct dma_chan *chan,
519 (unsigned long)config); 518 (unsigned long)config);
520} 519}
521 520
521static inline struct dma_async_tx_descriptor *dmaengine_prep_slave_single(
522 struct dma_chan *chan, void *buf, size_t len,
523 enum dma_data_direction dir, unsigned long flags)
524{
525 struct scatterlist sg;
526 sg_init_one(&sg, buf, len);
527
528 return chan->device->device_prep_slave_sg(chan, &sg, 1, dir, flags);
529}
530
522static inline int dmaengine_terminate_all(struct dma_chan *chan) 531static inline int dmaengine_terminate_all(struct dma_chan *chan)
523{ 532{
524 return dmaengine_device_control(chan, DMA_TERMINATE_ALL, 0); 533 return dmaengine_device_control(chan, DMA_TERMINATE_ALL, 0);
diff --git a/include/linux/serial_sci.h b/include/linux/serial_sci.h
index 8bffe9ae2ca0..0efa1f10bc2b 100644
--- a/include/linux/serial_sci.h
+++ b/include/linux/serial_sci.h
@@ -131,8 +131,6 @@ struct plat_sci_port {
131 131
132 struct plat_sci_port_ops *ops; 132 struct plat_sci_port_ops *ops;
133 133
134 struct device *dma_dev;
135
136 unsigned int dma_slave_tx; 134 unsigned int dma_slave_tx;
137 unsigned int dma_slave_rx; 135 unsigned int dma_slave_rx;
138}; 136};