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authorVipin Kumar <vipin.kumar@st.com>2012-03-14 02:17:14 -0400
committerDavid Woodhouse <David.Woodhouse@intel.com>2012-03-26 19:59:34 -0400
commite2f6bce8d94d2c82d4f7ae9d94743963a3b10136 (patch)
treeed6cdc5023282b4322d5490fd579105f7483ab0b /include
parentf63acb75c5d8a9eb7cc5548e3e778d2a00bf3bae (diff)
mtd: nand/fsmc: Modify fsmc driver to accept nand timing parameters via platform
FSMC controllers provide registers to program the required timing values for attached NAND device. The timing values used until now are relaxed and should work for all devices. Although, for read/write performance improvements, the fsmc nand driver should accept nand timings as a platform data and program the timing parameters into fsmc registers accordingly. This patch implements this modification. Additionally, it programs the default timing parameters if these are not passed via platform data. Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Diffstat (limited to 'include')
-rw-r--r--include/linux/mtd/fsmc.h34
1 files changed, 28 insertions, 6 deletions
diff --git a/include/linux/mtd/fsmc.h b/include/linux/mtd/fsmc.h
index e877325d9c51..c4ac07a19691 100644
--- a/include/linux/mtd/fsmc.h
+++ b/include/linux/mtd/fsmc.h
@@ -90,17 +90,29 @@ struct fsmc_regs {
90#define FSMC_ECCEN (1 << 6) 90#define FSMC_ECCEN (1 << 6)
91#define FSMC_ECCPLEN_512 (0 << 7) 91#define FSMC_ECCPLEN_512 (0 << 7)
92#define FSMC_ECCPLEN_256 (1 << 7) 92#define FSMC_ECCPLEN_256 (1 << 7)
93#define FSMC_TCLR_1 (1 << 9) 93#define FSMC_TCLR_1 (1)
94#define FSMC_TAR_1 (1 << 13) 94#define FSMC_TCLR_SHIFT (9)
95#define FSMC_TCLR_MASK (0xF)
96#define FSMC_TAR_1 (1)
97#define FSMC_TAR_SHIFT (13)
98#define FSMC_TAR_MASK (0xF)
95 99
96/* sts register definitions */ 100/* sts register definitions */
97#define FSMC_CODE_RDY (1 << 15) 101#define FSMC_CODE_RDY (1 << 15)
98 102
99/* comm register definitions */ 103/* comm register definitions */
100#define FSMC_TSET_0 (0 << 0) 104#define FSMC_TSET_0 0
101#define FSMC_TWAIT_6 (6 << 8) 105#define FSMC_TSET_SHIFT 0
102#define FSMC_THOLD_4 (4 << 16) 106#define FSMC_TSET_MASK 0xFF
103#define FSMC_THIZ_1 (1 << 24) 107#define FSMC_TWAIT_6 6
108#define FSMC_TWAIT_SHIFT 8
109#define FSMC_TWAIT_MASK 0xFF
110#define FSMC_THOLD_4 4
111#define FSMC_THOLD_SHIFT 16
112#define FSMC_THOLD_MASK 0xFF
113#define FSMC_THIZ_1 1
114#define FSMC_THIZ_SHIFT 24
115#define FSMC_THIZ_MASK 0xFF
104 116
105/* 117/*
106 * There are 13 bytes of ecc for every 512 byte block in FSMC version 8 118 * There are 13 bytes of ecc for every 512 byte block in FSMC version 8
@@ -120,6 +132,15 @@ struct fsmc_eccplace {
120 struct fsmc_nand_eccplace eccplace[MAX_ECCPLACE_ENTRIES]; 132 struct fsmc_nand_eccplace eccplace[MAX_ECCPLACE_ENTRIES];
121}; 133};
122 134
135struct fsmc_nand_timings {
136 uint8_t tclr;
137 uint8_t tar;
138 uint8_t thiz;
139 uint8_t thold;
140 uint8_t twait;
141 uint8_t tset;
142};
143
123/** 144/**
124 * fsmc_nand_platform_data - platform specific NAND controller config 145 * fsmc_nand_platform_data - platform specific NAND controller config
125 * @partitions: partition table for the platform, use a default fallback 146 * @partitions: partition table for the platform, use a default fallback
@@ -133,6 +154,7 @@ struct fsmc_eccplace {
133 * this may be set to NULL 154 * this may be set to NULL
134 */ 155 */
135struct fsmc_nand_platform_data { 156struct fsmc_nand_platform_data {
157 struct fsmc_nand_timings *nand_timings;
136 struct mtd_partition *partitions; 158 struct mtd_partition *partitions;
137 unsigned int nr_partitions; 159 unsigned int nr_partitions;
138 unsigned int options; 160 unsigned int options;