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authorLinus Torvalds <torvalds@linux-foundation.org>2008-11-11 12:22:24 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2008-11-11 12:22:24 -0500
commiteda1be631a1efa3985b408a231ba20e1ecf0a92b (patch)
treebc44c294343f2b8b142a041baba19b7e314756b1 /include
parent5da38d32824eb27c325d296bf3a39b5946578789 (diff)
parent0baf823a10bd4131f70e9712d1f02de3c247f1df (diff)
Merge branch 'drm-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6
* 'drm-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6: drm/i915: Move legacy breadcrumb out of the reserved status page area drm/i915: Filter pci devices based on PCI_CLASS_DISPLAY_VGA drm/radeon: map registers at load time drm: Remove infrastructure for supporting i915's vblank swapping. i915: Remove racy delayed vblank swap ioctl. i915: Don't whine when pci_enable_msi() fails. i915: Don't attempt to short-circuit object_wait_rendering by checking domains. i915: Clean up sarea pointers on leavevt i915: Save/restore MCHBAR_RENDER_STANDBY on GM965/GM45
Diffstat (limited to 'include')
-rw-r--r--include/drm/drmP.h5
-rw-r--r--include/drm/drm_pciids.h46
2 files changed, 23 insertions, 28 deletions
diff --git a/include/drm/drmP.h b/include/drm/drmP.h
index 59c796b46ee7..28c7f1679d49 100644
--- a/include/drm/drmP.h
+++ b/include/drm/drmP.h
@@ -861,8 +861,6 @@ struct drm_device {
861 struct timer_list vblank_disable_timer; 861 struct timer_list vblank_disable_timer;
862 862
863 u32 max_vblank_count; /**< size of vblank counter register */ 863 u32 max_vblank_count; /**< size of vblank counter register */
864 spinlock_t tasklet_lock; /**< For drm_locked_tasklet */
865 void (*locked_tasklet_func)(struct drm_device *dev);
866 864
867 /*@} */ 865 /*@} */
868 cycles_t ctx_start; 866 cycles_t ctx_start;
@@ -1149,8 +1147,6 @@ extern int drm_vblank_init(struct drm_device *dev, int num_crtcs);
1149extern int drm_wait_vblank(struct drm_device *dev, void *data, 1147extern int drm_wait_vblank(struct drm_device *dev, void *data,
1150 struct drm_file *filp); 1148 struct drm_file *filp);
1151extern int drm_vblank_wait(struct drm_device *dev, unsigned int *vbl_seq); 1149extern int drm_vblank_wait(struct drm_device *dev, unsigned int *vbl_seq);
1152extern void drm_locked_tasklet(struct drm_device *dev,
1153 void(*func)(struct drm_device *));
1154extern u32 drm_vblank_count(struct drm_device *dev, int crtc); 1150extern u32 drm_vblank_count(struct drm_device *dev, int crtc);
1155extern void drm_handle_vblank(struct drm_device *dev, int crtc); 1151extern void drm_handle_vblank(struct drm_device *dev, int crtc);
1156extern int drm_vblank_get(struct drm_device *dev, int crtc); 1152extern int drm_vblank_get(struct drm_device *dev, int crtc);
@@ -1158,7 +1154,6 @@ extern void drm_vblank_put(struct drm_device *dev, int crtc);
1158/* Modesetting support */ 1154/* Modesetting support */
1159extern int drm_modeset_ctl(struct drm_device *dev, void *data, 1155extern int drm_modeset_ctl(struct drm_device *dev, void *data,
1160 struct drm_file *file_priv); 1156 struct drm_file *file_priv);
1161extern void drm_locked_tasklet(struct drm_device *dev, void(*func)(struct drm_device*));
1162 1157
1163 /* AGP/GART support (drm_agpsupport.h) */ 1158 /* AGP/GART support (drm_agpsupport.h) */
1164extern struct drm_agp_head *drm_agp_init(struct drm_device *dev); 1159extern struct drm_agp_head *drm_agp_init(struct drm_device *dev);
diff --git a/include/drm/drm_pciids.h b/include/drm/drm_pciids.h
index da04109741e8..5165f240aa68 100644
--- a/include/drm/drm_pciids.h
+++ b/include/drm/drm_pciids.h
@@ -395,27 +395,27 @@
395 {0, 0, 0} 395 {0, 0, 0}
396 396
397#define i915_PCI_IDS \ 397#define i915_PCI_IDS \
398 {0x8086, 0x3577, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ 398 {0x8086, 0x3577, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \
399 {0x8086, 0x2562, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ 399 {0x8086, 0x2562, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \
400 {0x8086, 0x3582, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ 400 {0x8086, 0x3582, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \
401 {0x8086, 0x2572, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ 401 {0x8086, 0x2572, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \
402 {0x8086, 0x2582, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ 402 {0x8086, 0x2582, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \
403 {0x8086, 0x258a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ 403 {0x8086, 0x258a, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \
404 {0x8086, 0x2592, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ 404 {0x8086, 0x2592, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \
405 {0x8086, 0x2772, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ 405 {0x8086, 0x2772, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \
406 {0x8086, 0x27a2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ 406 {0x8086, 0x27a2, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \
407 {0x8086, 0x27ae, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ 407 {0x8086, 0x27ae, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \
408 {0x8086, 0x2972, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ 408 {0x8086, 0x2972, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \
409 {0x8086, 0x2982, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ 409 {0x8086, 0x2982, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \
410 {0x8086, 0x2992, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ 410 {0x8086, 0x2992, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \
411 {0x8086, 0x29a2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ 411 {0x8086, 0x29a2, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \
412 {0x8086, 0x29b2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ 412 {0x8086, 0x29b2, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \
413 {0x8086, 0x29c2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ 413 {0x8086, 0x29c2, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \
414 {0x8086, 0x29d2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ 414 {0x8086, 0x29d2, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \
415 {0x8086, 0x2a02, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ 415 {0x8086, 0x2a02, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \
416 {0x8086, 0x2a12, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ 416 {0x8086, 0x2a12, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \
417 {0x8086, 0x2a42, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ 417 {0x8086, 0x2a42, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \
418 {0x8086, 0x2e02, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ 418 {0x8086, 0x2e02, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \
419 {0x8086, 0x2e12, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ 419 {0x8086, 0x2e12, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \
420 {0x8086, 0x2e22, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ 420 {0x8086, 0x2e22, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \
421 {0, 0, 0} 421 {0, 0, 0}