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authorJie Zhang <jie.zhang@analog.com>2007-11-17 11:00:10 -0500
committerBryan Wu <bryan.wu@analog.com>2007-11-17 11:00:10 -0500
commita961d659637b7d77c916597017e2e3730859c333 (patch)
treecefd016b23ac7f06bdcb7d1e7296739716fc8f09 /include
parent561cc18b8696fd41367544f45542c096fa08d878 (diff)
Blackfin arch: More explicitly describe what the instructions do in inline assembly.
Signed-off-by: Jie Zhang <jie.zhang@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Diffstat (limited to 'include')
-rw-r--r--include/asm-blackfin/mach-common/def_LPBlackfin.h8
1 files changed, 4 insertions, 4 deletions
diff --git a/include/asm-blackfin/mach-common/def_LPBlackfin.h b/include/asm-blackfin/mach-common/def_LPBlackfin.h
index c1d8c4a78fcf..e8967f6124f7 100644
--- a/include/asm-blackfin/mach-common/def_LPBlackfin.h
+++ b/include/asm-blackfin/mach-common/def_LPBlackfin.h
@@ -46,7 +46,7 @@
46#endif 46#endif
47 47
48#define bfin_read8(addr) ({ \ 48#define bfin_read8(addr) ({ \
49 uint8_t __v; \ 49 uint32_t __v; \
50 __asm__ __volatile__( \ 50 __asm__ __volatile__( \
51 NOP_PAD_ANOMALY_05000198 \ 51 NOP_PAD_ANOMALY_05000198 \
52 "%0 = b[%1] (z);" \ 52 "%0 = b[%1] (z);" \
@@ -56,7 +56,7 @@
56 __v; }) 56 __v; })
57 57
58#define bfin_read16(addr) ({ \ 58#define bfin_read16(addr) ({ \
59 uint16_t __v; \ 59 uint32_t __v; \
60 __asm__ __volatile__( \ 60 __asm__ __volatile__( \
61 NOP_PAD_ANOMALY_05000198 \ 61 NOP_PAD_ANOMALY_05000198 \
62 "%0 = w[%1] (z);" \ 62 "%0 = w[%1] (z);" \
@@ -80,7 +80,7 @@
80 NOP_PAD_ANOMALY_05000198 \ 80 NOP_PAD_ANOMALY_05000198 \
81 "b[%0] = %1;" \ 81 "b[%0] = %1;" \
82 : \ 82 : \
83 : "a" (addr), "d" (val) \ 83 : "a" (addr), "d" ((uint8_t)(val)) \
84 : "memory" \ 84 : "memory" \
85 ) 85 )
86 86
@@ -89,7 +89,7 @@
89 NOP_PAD_ANOMALY_05000198 \ 89 NOP_PAD_ANOMALY_05000198 \
90 "w[%0] = %1;" \ 90 "w[%0] = %1;" \
91 : \ 91 : \
92 : "a" (addr), "d" (val) \ 92 : "a" (addr), "d" ((uint16_t)(val)) \
93 : "memory" \ 93 : "memory" \
94 ) 94 )
95 95