diff options
author | Linus Torvalds <torvalds@g5.osdl.org> | 2006-07-08 18:00:28 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-07-08 18:00:28 -0400 |
commit | e2a3d40258fe20d205f8ed592e1e2c0d5529c2e1 (patch) | |
tree | b8d778fb559c581e08bfc86831d16ee1cd43c841 /include | |
parent | a496e25dfb25493a57bcee5d66875d6ff80a9093 (diff) |
power: improve inline asm memory constraints
Use "+m" rather than a combination of "=m" and "m" for improved
clarity and consistency.
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include')
-rw-r--r-- | include/asm-powerpc/atomic.h | 32 | ||||
-rw-r--r-- | include/asm-powerpc/bitops.h | 16 | ||||
-rw-r--r-- | include/asm-powerpc/system.h | 16 |
3 files changed, 32 insertions, 32 deletions
diff --git a/include/asm-powerpc/atomic.h b/include/asm-powerpc/atomic.h index bb3c0ab7e667..53283e2540b3 100644 --- a/include/asm-powerpc/atomic.h +++ b/include/asm-powerpc/atomic.h | |||
@@ -27,8 +27,8 @@ static __inline__ void atomic_add(int a, atomic_t *v) | |||
27 | PPC405_ERR77(0,%3) | 27 | PPC405_ERR77(0,%3) |
28 | " stwcx. %0,0,%3 \n\ | 28 | " stwcx. %0,0,%3 \n\ |
29 | bne- 1b" | 29 | bne- 1b" |
30 | : "=&r" (t), "=m" (v->counter) | 30 | : "=&r" (t), "+m" (v->counter) |
31 | : "r" (a), "r" (&v->counter), "m" (v->counter) | 31 | : "r" (a), "r" (&v->counter) |
32 | : "cc"); | 32 | : "cc"); |
33 | } | 33 | } |
34 | 34 | ||
@@ -63,8 +63,8 @@ static __inline__ void atomic_sub(int a, atomic_t *v) | |||
63 | PPC405_ERR77(0,%3) | 63 | PPC405_ERR77(0,%3) |
64 | " stwcx. %0,0,%3 \n\ | 64 | " stwcx. %0,0,%3 \n\ |
65 | bne- 1b" | 65 | bne- 1b" |
66 | : "=&r" (t), "=m" (v->counter) | 66 | : "=&r" (t), "+m" (v->counter) |
67 | : "r" (a), "r" (&v->counter), "m" (v->counter) | 67 | : "r" (a), "r" (&v->counter) |
68 | : "cc"); | 68 | : "cc"); |
69 | } | 69 | } |
70 | 70 | ||
@@ -97,8 +97,8 @@ static __inline__ void atomic_inc(atomic_t *v) | |||
97 | PPC405_ERR77(0,%2) | 97 | PPC405_ERR77(0,%2) |
98 | " stwcx. %0,0,%2 \n\ | 98 | " stwcx. %0,0,%2 \n\ |
99 | bne- 1b" | 99 | bne- 1b" |
100 | : "=&r" (t), "=m" (v->counter) | 100 | : "=&r" (t), "+m" (v->counter) |
101 | : "r" (&v->counter), "m" (v->counter) | 101 | : "r" (&v->counter) |
102 | : "cc"); | 102 | : "cc"); |
103 | } | 103 | } |
104 | 104 | ||
@@ -141,8 +141,8 @@ static __inline__ void atomic_dec(atomic_t *v) | |||
141 | PPC405_ERR77(0,%2)\ | 141 | PPC405_ERR77(0,%2)\ |
142 | " stwcx. %0,0,%2\n\ | 142 | " stwcx. %0,0,%2\n\ |
143 | bne- 1b" | 143 | bne- 1b" |
144 | : "=&r" (t), "=m" (v->counter) | 144 | : "=&r" (t), "+m" (v->counter) |
145 | : "r" (&v->counter), "m" (v->counter) | 145 | : "r" (&v->counter) |
146 | : "cc"); | 146 | : "cc"); |
147 | } | 147 | } |
148 | 148 | ||
@@ -253,8 +253,8 @@ static __inline__ void atomic64_add(long a, atomic64_t *v) | |||
253 | add %0,%2,%0\n\ | 253 | add %0,%2,%0\n\ |
254 | stdcx. %0,0,%3 \n\ | 254 | stdcx. %0,0,%3 \n\ |
255 | bne- 1b" | 255 | bne- 1b" |
256 | : "=&r" (t), "=m" (v->counter) | 256 | : "=&r" (t), "+m" (v->counter) |
257 | : "r" (a), "r" (&v->counter), "m" (v->counter) | 257 | : "r" (a), "r" (&v->counter) |
258 | : "cc"); | 258 | : "cc"); |
259 | } | 259 | } |
260 | 260 | ||
@@ -287,8 +287,8 @@ static __inline__ void atomic64_sub(long a, atomic64_t *v) | |||
287 | subf %0,%2,%0\n\ | 287 | subf %0,%2,%0\n\ |
288 | stdcx. %0,0,%3 \n\ | 288 | stdcx. %0,0,%3 \n\ |
289 | bne- 1b" | 289 | bne- 1b" |
290 | : "=&r" (t), "=m" (v->counter) | 290 | : "=&r" (t), "+m" (v->counter) |
291 | : "r" (a), "r" (&v->counter), "m" (v->counter) | 291 | : "r" (a), "r" (&v->counter) |
292 | : "cc"); | 292 | : "cc"); |
293 | } | 293 | } |
294 | 294 | ||
@@ -319,8 +319,8 @@ static __inline__ void atomic64_inc(atomic64_t *v) | |||
319 | addic %0,%0,1\n\ | 319 | addic %0,%0,1\n\ |
320 | stdcx. %0,0,%2 \n\ | 320 | stdcx. %0,0,%2 \n\ |
321 | bne- 1b" | 321 | bne- 1b" |
322 | : "=&r" (t), "=m" (v->counter) | 322 | : "=&r" (t), "+m" (v->counter) |
323 | : "r" (&v->counter), "m" (v->counter) | 323 | : "r" (&v->counter) |
324 | : "cc"); | 324 | : "cc"); |
325 | } | 325 | } |
326 | 326 | ||
@@ -361,8 +361,8 @@ static __inline__ void atomic64_dec(atomic64_t *v) | |||
361 | addic %0,%0,-1\n\ | 361 | addic %0,%0,-1\n\ |
362 | stdcx. %0,0,%2\n\ | 362 | stdcx. %0,0,%2\n\ |
363 | bne- 1b" | 363 | bne- 1b" |
364 | : "=&r" (t), "=m" (v->counter) | 364 | : "=&r" (t), "+m" (v->counter) |
365 | : "r" (&v->counter), "m" (v->counter) | 365 | : "r" (&v->counter) |
366 | : "cc"); | 366 | : "cc"); |
367 | } | 367 | } |
368 | 368 | ||
diff --git a/include/asm-powerpc/bitops.h b/include/asm-powerpc/bitops.h index 76e2f08c3c83..c341063d0804 100644 --- a/include/asm-powerpc/bitops.h +++ b/include/asm-powerpc/bitops.h | |||
@@ -65,8 +65,8 @@ static __inline__ void set_bit(int nr, volatile unsigned long *addr) | |||
65 | PPC405_ERR77(0,%3) | 65 | PPC405_ERR77(0,%3) |
66 | PPC_STLCX "%0,0,%3\n" | 66 | PPC_STLCX "%0,0,%3\n" |
67 | "bne- 1b" | 67 | "bne- 1b" |
68 | : "=&r"(old), "=m"(*p) | 68 | : "=&r" (old), "+m" (*p) |
69 | : "r"(mask), "r"(p), "m"(*p) | 69 | : "r" (mask), "r" (p) |
70 | : "cc" ); | 70 | : "cc" ); |
71 | } | 71 | } |
72 | 72 | ||
@@ -82,8 +82,8 @@ static __inline__ void clear_bit(int nr, volatile unsigned long *addr) | |||
82 | PPC405_ERR77(0,%3) | 82 | PPC405_ERR77(0,%3) |
83 | PPC_STLCX "%0,0,%3\n" | 83 | PPC_STLCX "%0,0,%3\n" |
84 | "bne- 1b" | 84 | "bne- 1b" |
85 | : "=&r"(old), "=m"(*p) | 85 | : "=&r" (old), "+m" (*p) |
86 | : "r"(mask), "r"(p), "m"(*p) | 86 | : "r" (mask), "r" (p) |
87 | : "cc" ); | 87 | : "cc" ); |
88 | } | 88 | } |
89 | 89 | ||
@@ -99,8 +99,8 @@ static __inline__ void change_bit(int nr, volatile unsigned long *addr) | |||
99 | PPC405_ERR77(0,%3) | 99 | PPC405_ERR77(0,%3) |
100 | PPC_STLCX "%0,0,%3\n" | 100 | PPC_STLCX "%0,0,%3\n" |
101 | "bne- 1b" | 101 | "bne- 1b" |
102 | : "=&r"(old), "=m"(*p) | 102 | : "=&r" (old), "+m" (*p) |
103 | : "r"(mask), "r"(p), "m"(*p) | 103 | : "r" (mask), "r" (p) |
104 | : "cc" ); | 104 | : "cc" ); |
105 | } | 105 | } |
106 | 106 | ||
@@ -179,8 +179,8 @@ static __inline__ void set_bits(unsigned long mask, unsigned long *addr) | |||
179 | "or %0,%0,%2\n" | 179 | "or %0,%0,%2\n" |
180 | PPC_STLCX "%0,0,%3\n" | 180 | PPC_STLCX "%0,0,%3\n" |
181 | "bne- 1b" | 181 | "bne- 1b" |
182 | : "=&r" (old), "=m" (*addr) | 182 | : "=&r" (old), "+m" (*addr) |
183 | : "r" (mask), "r" (addr), "m" (*addr) | 183 | : "r" (mask), "r" (addr) |
184 | : "cc"); | 184 | : "cc"); |
185 | } | 185 | } |
186 | 186 | ||
diff --git a/include/asm-powerpc/system.h b/include/asm-powerpc/system.h index d075725bf444..c6569516ba35 100644 --- a/include/asm-powerpc/system.h +++ b/include/asm-powerpc/system.h | |||
@@ -220,8 +220,8 @@ __xchg_u32(volatile void *p, unsigned long val) | |||
220 | " stwcx. %3,0,%2 \n\ | 220 | " stwcx. %3,0,%2 \n\ |
221 | bne- 1b" | 221 | bne- 1b" |
222 | ISYNC_ON_SMP | 222 | ISYNC_ON_SMP |
223 | : "=&r" (prev), "=m" (*(volatile unsigned int *)p) | 223 | : "=&r" (prev), "+m" (*(volatile unsigned int *)p) |
224 | : "r" (p), "r" (val), "m" (*(volatile unsigned int *)p) | 224 | : "r" (p), "r" (val) |
225 | : "cc", "memory"); | 225 | : "cc", "memory"); |
226 | 226 | ||
227 | return prev; | 227 | return prev; |
@@ -240,8 +240,8 @@ __xchg_u64(volatile void *p, unsigned long val) | |||
240 | " stdcx. %3,0,%2 \n\ | 240 | " stdcx. %3,0,%2 \n\ |
241 | bne- 1b" | 241 | bne- 1b" |
242 | ISYNC_ON_SMP | 242 | ISYNC_ON_SMP |
243 | : "=&r" (prev), "=m" (*(volatile unsigned long *)p) | 243 | : "=&r" (prev), "+m" (*(volatile unsigned long *)p) |
244 | : "r" (p), "r" (val), "m" (*(volatile unsigned long *)p) | 244 | : "r" (p), "r" (val) |
245 | : "cc", "memory"); | 245 | : "cc", "memory"); |
246 | 246 | ||
247 | return prev; | 247 | return prev; |
@@ -299,8 +299,8 @@ __cmpxchg_u32(volatile unsigned int *p, unsigned long old, unsigned long new) | |||
299 | ISYNC_ON_SMP | 299 | ISYNC_ON_SMP |
300 | "\n\ | 300 | "\n\ |
301 | 2:" | 301 | 2:" |
302 | : "=&r" (prev), "=m" (*p) | 302 | : "=&r" (prev), "+m" (*p) |
303 | : "r" (p), "r" (old), "r" (new), "m" (*p) | 303 | : "r" (p), "r" (old), "r" (new) |
304 | : "cc", "memory"); | 304 | : "cc", "memory"); |
305 | 305 | ||
306 | return prev; | 306 | return prev; |
@@ -322,8 +322,8 @@ __cmpxchg_u64(volatile unsigned long *p, unsigned long old, unsigned long new) | |||
322 | ISYNC_ON_SMP | 322 | ISYNC_ON_SMP |
323 | "\n\ | 323 | "\n\ |
324 | 2:" | 324 | 2:" |
325 | : "=&r" (prev), "=m" (*p) | 325 | : "=&r" (prev), "+m" (*p) |
326 | : "r" (p), "r" (old), "r" (new), "m" (*p) | 326 | : "r" (p), "r" (old), "r" (new) |
327 | : "cc", "memory"); | 327 | : "cc", "memory"); |
328 | 328 | ||
329 | return prev; | 329 | return prev; |