diff options
| author | Graeme Gregory <gg@opensource.wolfsonmicro.com> | 2007-02-02 11:13:05 -0500 |
|---|---|---|
| committer | Jaroslav Kysela <perex@suse.cz> | 2007-02-09 03:03:35 -0500 |
| commit | 1c433fbda4896a6455d97b66a4f2646cbdd52a8c (patch) | |
| tree | 0f68d3970dfbb9d1ce4238b2b790388849bdea99 /include | |
| parent | 3372a153c230bd0b28d470118d5a4c5840f8f966 (diff) | |
[ALSA] soc - 0.13 ASoC headers
This patch updates the API's to include the new DAI configuration and
clocking architecture.
Changes:-
o Removed DAI automatic matching and capabilities structure (struct
snd_soc_dai_mode) and macros.
o Added DAI operations for codec and CPU interfaces.
o Removed config_sysclk() function and struct snd_soc_clock_info. No
longer needed as clocking is now configured manually in the machine
drivers. Also removed other clocking data from structures.
o Updated version to 0.13
o Added shift to SOC_SINGLE_EXT kcontrol macro.
Signed-off-by: Graeme Gregory <gg@opensource.wolfsonmicro.com>
Signed-off-by: Liam Girdwood <lg@opensource.wolfsonmicro.com>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Jaroslav Kysela <perex@suse.cz>
Diffstat (limited to 'include')
| -rw-r--r-- | include/sound/soc.h | 193 |
1 files changed, 83 insertions, 110 deletions
diff --git a/include/sound/soc.h b/include/sound/soc.h index ea836d819ce0..b1dc364b8f74 100644 --- a/include/sound/soc.h +++ b/include/sound/soc.h | |||
| @@ -22,7 +22,7 @@ | |||
| 22 | #include <sound/control.h> | 22 | #include <sound/control.h> |
| 23 | #include <sound/ac97_codec.h> | 23 | #include <sound/ac97_codec.h> |
| 24 | 24 | ||
| 25 | #define SND_SOC_VERSION "0.12" | 25 | #define SND_SOC_VERSION "0.13.0" |
| 26 | 26 | ||
| 27 | /* | 27 | /* |
| 28 | * Convenience kcontrol builders | 28 | * Convenience kcontrol builders |
| @@ -60,12 +60,12 @@ | |||
| 60 | .info = snd_soc_info_enum_double, \ | 60 | .info = snd_soc_info_enum_double, \ |
| 61 | .get = snd_soc_get_enum_double, .put = snd_soc_put_enum_double, \ | 61 | .get = snd_soc_get_enum_double, .put = snd_soc_put_enum_double, \ |
| 62 | .private_value = (unsigned long)&xenum } | 62 | .private_value = (unsigned long)&xenum } |
| 63 | #define SOC_SINGLE_EXT(xname, xreg, xmask, xinvert,\ | 63 | #define SOC_SINGLE_EXT(xname, xreg, xshift, xmask, xinvert,\ |
| 64 | xhandler_get, xhandler_put) \ | 64 | xhandler_get, xhandler_put) \ |
| 65 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ | 65 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ |
| 66 | .info = snd_soc_info_volsw_ext, \ | 66 | .info = snd_soc_info_volsw, \ |
| 67 | .get = xhandler_get, .put = xhandler_put, \ | 67 | .get = xhandler_get, .put = xhandler_put, \ |
| 68 | .private_value = SOC_SINGLE_VALUE_EXT(xreg, xmask, xinvert) } | 68 | .private_value = SOC_SINGLE_VALUE(xreg, xshift, xmask, xinvert) } |
| 69 | #define SOC_SINGLE_BOOL_EXT(xname, xdata, xhandler_get, xhandler_put) \ | 69 | #define SOC_SINGLE_BOOL_EXT(xname, xdata, xhandler_get, xhandler_put) \ |
| 70 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ | 70 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ |
| 71 | .info = snd_soc_info_bool_ext, \ | 71 | .info = snd_soc_info_bool_ext, \ |
| @@ -87,20 +87,29 @@ | |||
| 87 | /* | 87 | /* |
| 88 | * DAI hardware audio formats | 88 | * DAI hardware audio formats |
| 89 | */ | 89 | */ |
| 90 | #define SND_SOC_DAIFMT_I2S (1 << 0) /* I2S mode */ | 90 | #define SND_SOC_DAIFMT_I2S 0 /* I2S mode */ |
| 91 | #define SND_SOC_DAIFMT_RIGHT_J (1 << 1) /* Right justified mode */ | 91 | #define SND_SOC_DAIFMT_RIGHT_J 1 /* Right justified mode */ |
| 92 | #define SND_SOC_DAIFMT_LEFT_J (1 << 2) /* Left Justified mode */ | 92 | #define SND_SOC_DAIFMT_LEFT_J 2 /* Left Justified mode */ |
| 93 | #define SND_SOC_DAIFMT_DSP_A (1 << 3) /* L data msb after FRM or LRC */ | 93 | #define SND_SOC_DAIFMT_DSP_A 3 /* L data msb after FRM or LRC */ |
| 94 | #define SND_SOC_DAIFMT_DSP_B (1 << 4) /* L data msb during FRM or LRC */ | 94 | #define SND_SOC_DAIFMT_DSP_B 4 /* L data msb during FRM or LRC */ |
| 95 | #define SND_SOC_DAIFMT_AC97 (1 << 5) /* AC97 */ | 95 | #define SND_SOC_DAIFMT_AC97 5 /* AC97 */ |
| 96 | |||
| 97 | #define SND_SOC_DAIFMT_MSB SND_SOC_DAIFMT_LEFT_J | ||
| 98 | #define SND_SOC_DAIFMT_LSB SND_SOC_DAIFMT_RIGHT_J | ||
| 99 | |||
| 100 | /* | ||
| 101 | * DAI Gating | ||
| 102 | */ | ||
| 103 | #define SND_SOC_DAIFMT_CONT (0 << 4) /* continuous clock */ | ||
| 104 | #define SND_SOC_DAIFMT_GATED (1 << 4) /* clock is gated when not Tx/Rx */ | ||
| 96 | 105 | ||
| 97 | /* | 106 | /* |
| 98 | * DAI hardware signal inversions | 107 | * DAI hardware signal inversions |
| 99 | */ | 108 | */ |
| 100 | #define SND_SOC_DAIFMT_NB_NF (1 << 8) /* normal bit clock + frame */ | 109 | #define SND_SOC_DAIFMT_NB_NF (0 << 8) /* normal bit clock + frame */ |
| 101 | #define SND_SOC_DAIFMT_NB_IF (1 << 9) /* normal bclk + inv frm */ | 110 | #define SND_SOC_DAIFMT_NB_IF (1 << 8) /* normal bclk + inv frm */ |
| 102 | #define SND_SOC_DAIFMT_IB_NF (1 << 10) /* invert bclk + nor frm */ | 111 | #define SND_SOC_DAIFMT_IB_NF (2 << 8) /* invert bclk + nor frm */ |
| 103 | #define SND_SOC_DAIFMT_IB_IF (1 << 11) /* invert bclk + frm */ | 112 | #define SND_SOC_DAIFMT_IB_IF (3 << 8) /* invert bclk + frm */ |
| 104 | 113 | ||
| 105 | /* | 114 | /* |
| 106 | * DAI hardware clock masters | 115 | * DAI hardware clock masters |
| @@ -108,58 +117,22 @@ | |||
| 108 | * i.e. if the codec is clk and frm master then the interface is | 117 | * i.e. if the codec is clk and frm master then the interface is |
| 109 | * clk and frame slave. | 118 | * clk and frame slave. |
| 110 | */ | 119 | */ |
| 111 | #define SND_SOC_DAIFMT_CBM_CFM (1 << 12) /* codec clk & frm master */ | 120 | #define SND_SOC_DAIFMT_CBM_CFM (0 << 12) /* codec clk & frm master */ |
| 112 | #define SND_SOC_DAIFMT_CBS_CFM (1 << 13) /* codec clk slave & frm master */ | 121 | #define SND_SOC_DAIFMT_CBS_CFM (1 << 12) /* codec clk slave & frm master */ |
| 113 | #define SND_SOC_DAIFMT_CBM_CFS (1 << 14) /* codec clk master & frame slave */ | 122 | #define SND_SOC_DAIFMT_CBM_CFS (2 << 12) /* codec clk master & frame slave */ |
| 114 | #define SND_SOC_DAIFMT_CBS_CFS (1 << 15) /* codec clk & frm slave */ | 123 | #define SND_SOC_DAIFMT_CBS_CFS (3 << 12) /* codec clk & frm slave */ |
| 115 | 124 | ||
| 116 | #define SND_SOC_DAIFMT_FORMAT_MASK 0x00ff | 125 | #define SND_SOC_DAIFMT_FORMAT_MASK 0x000f |
| 126 | #define SND_SOC_DAIFMT_CLOCK_MASK 0x00f0 | ||
| 117 | #define SND_SOC_DAIFMT_INV_MASK 0x0f00 | 127 | #define SND_SOC_DAIFMT_INV_MASK 0x0f00 |
| 118 | #define SND_SOC_DAIFMT_CLOCK_MASK 0xf000 | 128 | #define SND_SOC_DAIFMT_MASTER_MASK 0xf000 |
| 119 | |||
| 120 | /* | ||
| 121 | * DAI hardware audio direction | ||
| 122 | */ | ||
| 123 | #define SND_SOC_DAIDIR_PLAYBACK 0x1 | ||
| 124 | #define SND_SOC_DAIDIR_CAPTURE 0x2 | ||
| 125 | |||
| 126 | /* | ||
| 127 | * DAI hardware Time Division Multiplexing (TDM) Slots | ||
| 128 | * Left and Right data word positions | ||
| 129 | * This is measured in words (sample size) and not bits. | ||
| 130 | */ | ||
| 131 | #define SND_SOC_DAITDM_LRDW(l,r) ((l << 8) | r) | ||
| 132 | |||
| 133 | /* | ||
| 134 | * DAI hardware clock ratios | ||
| 135 | * bit clock can either be a generated by dividing mclk or | ||
| 136 | * by multiplying sample rate, hence there are 2 definitions below | ||
| 137 | * depending on codec type. | ||
| 138 | */ | ||
| 139 | /* ratio of sample rate to mclk/sysclk */ | ||
| 140 | #define SND_SOC_FS_ALL 0xffff /* all mclk supported */ | ||
| 141 | |||
| 142 | /* bit clock dividers */ | ||
| 143 | #define SND_SOC_FSBD(x) (1 << (x - 1)) /* ratio mclk:bclk */ | ||
| 144 | #define SND_SOC_FSBD_REAL(x) (ffs(x)) | ||
| 145 | 129 | ||
| 146 | /* bit clock ratio to (sample rate * channels * word size) */ | ||
| 147 | #define SND_SOC_FSBW(x) (1 << (x - 1)) | ||
| 148 | #define SND_SOC_FSBW_REAL(x) (ffs(x)) | ||
| 149 | /* all bclk ratios supported */ | ||
| 150 | #define SND_SOC_FSB_ALL ~0ULL | ||
| 151 | 130 | ||
| 152 | /* | 131 | /* |
| 153 | * DAI hardware flags | 132 | * Master Clock Directions |
| 154 | */ | 133 | */ |
| 155 | /* use bfs mclk divider mode (BCLK = MCLK / x) */ | 134 | #define SND_SOC_CLOCK_IN 0 |
| 156 | #define SND_SOC_DAI_BFS_DIV 0x1 | 135 | #define SND_SOC_CLOCK_OUT 1 |
| 157 | /* use bfs rate mulitplier (BCLK = RATE * x)*/ | ||
| 158 | #define SND_SOC_DAI_BFS_RATE 0x2 | ||
| 159 | /* use bfs rcw multiplier (BCLK = RATE * CHN * WORD SIZE) */ | ||
| 160 | #define SND_SOC_DAI_BFS_RCW 0x4 | ||
| 161 | /* capture and playback can use different clocks */ | ||
| 162 | #define SND_SOC_DAI_ASYNC 0x8 | ||
| 163 | 136 | ||
| 164 | /* | 137 | /* |
| 165 | * AC97 codec ID's bitmask | 138 | * AC97 codec ID's bitmask |
| @@ -195,7 +168,6 @@ int snd_soc_register_card(struct snd_soc_device *socdev); | |||
| 195 | /* set runtime hw params */ | 168 | /* set runtime hw params */ |
| 196 | int snd_soc_set_runtime_hwparams(struct snd_pcm_substream *substream, | 169 | int snd_soc_set_runtime_hwparams(struct snd_pcm_substream *substream, |
| 197 | const struct snd_pcm_hardware *hw); | 170 | const struct snd_pcm_hardware *hw); |
| 198 | int snd_soc_get_rate(int rate); | ||
| 199 | 171 | ||
| 200 | /* codec IO */ | 172 | /* codec IO */ |
| 201 | #define snd_soc_read(codec, reg) codec->read(codec, reg) | 173 | #define snd_soc_read(codec, reg) codec->read(codec, reg) |
| @@ -244,6 +216,8 @@ int snd_soc_put_volsw_2r(struct snd_kcontrol *kcontrol, | |||
| 244 | /* SoC PCM stream information */ | 216 | /* SoC PCM stream information */ |
| 245 | struct snd_soc_pcm_stream { | 217 | struct snd_soc_pcm_stream { |
| 246 | char *stream_name; | 218 | char *stream_name; |
| 219 | u64 formats; /* SNDRV_PCM_FMTBIT_* */ | ||
| 220 | unsigned int rates; /* SNDRV_PCM_RATE_* */ | ||
| 247 | unsigned int rate_min; /* min rate */ | 221 | unsigned int rate_min; /* min rate */ |
| 248 | unsigned int rate_max; /* max rate */ | 222 | unsigned int rate_max; /* max rate */ |
| 249 | unsigned int channels_min; /* min channels */ | 223 | unsigned int channels_min; /* min channels */ |
| @@ -261,23 +235,43 @@ struct snd_soc_ops { | |||
| 261 | int (*trigger)(struct snd_pcm_substream *, int); | 235 | int (*trigger)(struct snd_pcm_substream *, int); |
| 262 | }; | 236 | }; |
| 263 | 237 | ||
| 264 | /* SoC DAI hardware mode */ | 238 | /* ASoC codec DAI ops */ |
| 265 | struct snd_soc_dai_mode { | 239 | struct snd_soc_codec_ops { |
| 266 | u16 fmt; /* SND_SOC_DAIFMT_* */ | 240 | /* codec DAI clocking configuration */ |
| 267 | u16 tdm; /* SND_SOC_HWTDM_* */ | 241 | int (*set_sysclk)(struct snd_soc_codec_dai *codec_dai, |
| 268 | u64 pcmfmt; /* SNDRV_PCM_FMTBIT_* */ | 242 | int clk_id, unsigned int freq, int dir); |
| 269 | u16 pcmrate; /* SND_SOC_HWRATE_* */ | 243 | int (*set_pll)(struct snd_soc_codec_dai *codec_dai, |
| 270 | u16 pcmdir:2; /* SND_SOC_HWDIR_* */ | 244 | int pll_id, unsigned int freq_in, unsigned int freq_out); |
| 271 | u16 flags:8; /* hw flags */ | 245 | int (*set_clkdiv)(struct snd_soc_codec_dai *codec_dai, |
| 272 | u16 fs; /* mclk to rate divider */ | 246 | int div_id, int div); |
| 273 | u64 bfs; /* mclk to bclk dividers */ | 247 | |
| 274 | unsigned long priv; /* private mode data */ | ||
