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author | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2008-03-04 23:20:32 -0500 |
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committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2008-03-04 23:20:32 -0500 |
commit | 665c1ef8369138dad7773da6407fe77ccff87deb (patch) | |
tree | 35ea30dcd0e1bbdfc0a9ceab99322eaad28e02e4 /include | |
parent | 71ca44dac4cbf89ce88e460a293cc25c5b18fa50 (diff) | |
parent | f0e98c387e61de00646be31fab4c2fa0224e1efb (diff) |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-2.6:
[SPARC]: Fix link errors with gcc-4.3
sparc64: replace remaining __FUNCTION__ occurances
sparc: replace remaining __FUNCTION__ occurances
[SPARC]: Add reboot_command[] extern decl to asm/system.h
[SPARC]: Mark linux_sparc_{fpu,chips} static.
Diffstat (limited to 'include')
-rw-r--r-- | include/asm-sparc/system.h | 2 | ||||
-rw-r--r-- | include/asm-sparc64/system.h | 2 |
2 files changed, 4 insertions, 0 deletions
diff --git a/include/asm-sparc/system.h b/include/asm-sparc/system.h index 45e47c159a6e..4e08210cd4c2 100644 --- a/include/asm-sparc/system.h +++ b/include/asm-sparc/system.h | |||
@@ -44,6 +44,8 @@ extern enum sparc_cpu sparc_cpu_model; | |||
44 | 44 | ||
45 | #define SUN4M_NCPUS 4 /* Architectural limit of sun4m. */ | 45 | #define SUN4M_NCPUS 4 /* Architectural limit of sun4m. */ |
46 | 46 | ||
47 | extern char reboot_command[]; | ||
48 | |||
47 | extern struct thread_info *current_set[NR_CPUS]; | 49 | extern struct thread_info *current_set[NR_CPUS]; |
48 | 50 | ||
49 | extern unsigned long empty_bad_page; | 51 | extern unsigned long empty_bad_page; |
diff --git a/include/asm-sparc64/system.h b/include/asm-sparc64/system.h index ed91a5d8d4f0..53eae091a171 100644 --- a/include/asm-sparc64/system.h +++ b/include/asm-sparc64/system.h | |||
@@ -30,6 +30,8 @@ enum sparc_cpu { | |||
30 | #define ARCH_SUN4C_SUN4 0 | 30 | #define ARCH_SUN4C_SUN4 0 |
31 | #define ARCH_SUN4 0 | 31 | #define ARCH_SUN4 0 |
32 | 32 | ||
33 | extern char reboot_command[]; | ||
34 | |||
33 | /* These are here in an effort to more fully work around Spitfire Errata | 35 | /* These are here in an effort to more fully work around Spitfire Errata |
34 | * #51. Essentially, if a memory barrier occurs soon after a mispredicted | 36 | * #51. Essentially, if a memory barrier occurs soon after a mispredicted |
35 | * branch, the chip can stop executing instructions until a trap occurs. | 37 | * branch, the chip can stop executing instructions until a trap occurs. |