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authorRobin Getz <robin.getz@analog.com>2007-09-12 23:49:33 -0400
committerBryan Wu <bryan.wu@analog.com>2007-09-12 23:49:33 -0400
commit2296fb7ff04531dd8d50394da24f49302ecf103b (patch)
treecd63cc1867b23b40ae3513beaf040a0b46d6976f /include
parent4d5f4ed3fb797021523fc9fb6804047e8e35b33d (diff)
Blackfin arch: Fix bug missing L2_MEMORY definition for EZKIT-BF561 compiling error
Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Diffstat (limited to 'include')
-rw-r--r--include/asm-blackfin/cplb.h4
1 files changed, 3 insertions, 1 deletions
diff --git a/include/asm-blackfin/cplb.h b/include/asm-blackfin/cplb.h
index df4766892767..06828d77a58f 100644
--- a/include/asm-blackfin/cplb.h
+++ b/include/asm-blackfin/cplb.h
@@ -30,7 +30,8 @@
30#ifndef _CPLB_H 30#ifndef _CPLB_H
31#define _CPLB_H 31#define _CPLB_H
32 32
33# include <asm/blackfin.h> 33#include <asm/blackfin.h>
34#include <asm/mach/anomaly.h>
34 35
35#define SDRAM_IGENERIC (CPLB_L1_CHBL | CPLB_USER_RD | CPLB_VALID | CPLB_PORTPRIO) 36#define SDRAM_IGENERIC (CPLB_L1_CHBL | CPLB_USER_RD | CPLB_VALID | CPLB_PORTPRIO)
36#define SDRAM_IKERNEL (SDRAM_IGENERIC | CPLB_LOCK) 37#define SDRAM_IKERNEL (SDRAM_IGENERIC | CPLB_LOCK)
@@ -54,6 +55,7 @@
54#endif 55#endif
55 56
56#define L1_DMEMORY (CPLB_LOCK | CPLB_COMMON) 57#define L1_DMEMORY (CPLB_LOCK | CPLB_COMMON)
58#define L2_MEMORY (CPLB_COMMON)
57#define SDRAM_DNON_CHBL (CPLB_COMMON) 59#define SDRAM_DNON_CHBL (CPLB_COMMON)
58#define SDRAM_EBIU (CPLB_COMMON) 60#define SDRAM_EBIU (CPLB_COMMON)
59#define SDRAM_OOPS (CPLB_VALID | ANOMALY_05000158_WORKAROUND | CPLB_LOCK | CPLB_DIRTY) 61#define SDRAM_OOPS (CPLB_VALID | ANOMALY_05000158_WORKAROUND | CPLB_LOCK | CPLB_DIRTY)