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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2008-10-14 17:24:51 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2008-10-14 17:24:51 -0400
commit7e69a8c4d06b7ecb874f571e82b715a9f79bc3c4 (patch)
tree0248fb8f7a3e445cc3c744252abeecabb9205c05 /include
parentb6825d2df55aa7d7341c715b577b73a6a03dc944 (diff)
parentd5120ae72a066b18f98e0c45ce73262f58030851 (diff)
Merge branch 's3c-move' into devel
Conflicts: arch/arm/mach-versatile/core.c
Diffstat (limited to 'include')
-rw-r--r--include/asm-arm/plat-s3c/debug-macro.S75
-rw-r--r--include/asm-arm/plat-s3c/map.h40
-rw-r--r--include/asm-arm/plat-s3c/regs-adc.h60
-rw-r--r--include/asm-arm/plat-s3c/regs-serial.h232
-rw-r--r--include/asm-arm/plat-s3c/regs-timer.h115
-rw-r--r--include/asm-arm/plat-s3c/uncompress.h155
-rw-r--r--include/asm-arm/plat-s3c24xx/clock.h64
-rw-r--r--include/asm-arm/plat-s3c24xx/common-smdk.h15
-rw-r--r--include/asm-arm/plat-s3c24xx/cpu.h54
-rw-r--r--include/asm-arm/plat-s3c24xx/devs.h49
-rw-r--r--include/asm-arm/plat-s3c24xx/dma.h82
-rw-r--r--include/asm-arm/plat-s3c24xx/irq.h109
-rw-r--r--include/asm-arm/plat-s3c24xx/pm.h73
-rw-r--r--include/asm-arm/plat-s3c24xx/s3c2400.h31
-rw-r--r--include/asm-arm/plat-s3c24xx/s3c2410.h31
-rw-r--r--include/asm-arm/plat-s3c24xx/s3c2412.h29
-rw-r--r--include/asm-arm/plat-s3c24xx/s3c2440.h17
-rw-r--r--include/asm-arm/plat-s3c24xx/s3c2442.h17
-rw-r--r--include/asm-arm/plat-s3c24xx/s3c2443.h32
-rw-r--r--include/asm-mips/cevt-r4k.h46
-rw-r--r--include/asm-mips/irqflags.h26
-rw-r--r--include/asm-mips/mipsregs.h6
-rw-r--r--include/asm-mips/pgtable-32.h2
-rw-r--r--include/asm-mips/smtc.h8
-rw-r--r--include/asm-mips/sn/mapped_kernel.h8
-rw-r--r--include/asm-mips/stackframe.h72
-rw-r--r--include/asm-x86/acpi.h2
-rw-r--r--include/asm-x86/cpufeature.h1
-rw-r--r--include/asm-x86/idle.h2
-rw-r--r--include/asm-x86/kgdb.h24
-rw-r--r--include/asm-x86/uaccess_64.h1
-rw-r--r--include/linux/cnt32_to_63.h80
-rw-r--r--include/linux/hrtimer.h18
-rw-r--r--include/linux/ide.h4
-rw-r--r--include/linux/mlx4/device.h4
-rw-r--r--include/linux/pci.h8
-rw-r--r--include/linux/ramfs.h1
-rw-r--r--include/linux/smb.h2
-rw-r--r--include/linux/stacktrace.h2
-rw-r--r--include/net/9p/9p.h1
-rw-r--r--include/net/9p/transport.h9
-rw-r--r--include/net/sctp/sm.h3
42 files changed, 281 insertions, 1329 deletions
diff --git a/include/asm-arm/plat-s3c/debug-macro.S b/include/asm-arm/plat-s3c/debug-macro.S
deleted file mode 100644
index 84c40b847da8..000000000000
--- a/include/asm-arm/plat-s3c/debug-macro.S
+++ /dev/null
@@ -1,75 +0,0 @@
1/* linux/include/asm-arm/plat-s3c/debug-macro.S
2 *
3 * Copyright 2005, 2007 Simtec Electronics
4 * http://armlinux.simtec.co.uk/
5 * Ben Dooks <ben@simtec.co.uk>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10*/
11
12#include <asm/plat-s3c/regs-serial.h>
13
14/* The S3C2440 implementations are used by default as they are the
15 * most widely re-used */
16
17 .macro fifo_level_s3c2440 rd, rx
18 ldr \rd, [ \rx, # S3C2410_UFSTAT ]
19 and \rd, \rd, #S3C2440_UFSTAT_TXMASK
20 .endm
21
22#ifndef fifo_level
23#define fifo_level fifo_level_s3c2410
24#endif
25
26 .macro fifo_full_s3c2440 rd, rx
27 ldr \rd, [ \rx, # S3C2410_UFSTAT ]
28 tst \rd, #S3C2440_UFSTAT_TXFULL
29 .endm
30
31#ifndef fifo_full
32#define fifo_full fifo_full_s3c2440
33#endif
34
35 .macro senduart,rd,rx
36 strb \rd, [\rx, # S3C2410_UTXH ]
37 .endm
38
39 .macro busyuart, rd, rx
40 ldr \rd, [ \rx, # S3C2410_UFCON ]
41 tst \rd, #S3C2410_UFCON_FIFOMODE @ fifo enabled?
42 beq 1001f @
43 @ FIFO enabled...
441003:
45 fifo_full \rd, \rx
46 bne 1003b
47 b 1002f
48
491001:
50 @ busy waiting for non fifo
51 ldr \rd, [ \rx, # S3C2410_UTRSTAT ]
52 tst \rd, #S3C2410_UTRSTAT_TXFE
53 beq 1001b
54
551002: @ exit busyuart
56 .endm
57
58 .macro waituart,rd,rx
59 ldr \rd, [ \rx, # S3C2410_UFCON ]
60 tst \rd, #S3C2410_UFCON_FIFOMODE @ fifo enabled?
61 beq 1001f @
62 @ FIFO enabled...
631003:
64 fifo_level \rd, \rx
65 teq \rd, #0
66 bne 1003b
67 b 1002f
681001:
69 @ idle waiting for non fifo
70 ldr \rd, [ \rx, # S3C2410_UTRSTAT ]
71 tst \rd, #S3C2410_UTRSTAT_TXFE
72 beq 1001b
73
741002: @ exit busyuart
75 .endm
diff --git a/include/asm-arm/plat-s3c/map.h b/include/asm-arm/plat-s3c/map.h
deleted file mode 100644
index b84289d32a54..000000000000
--- a/include/asm-arm/plat-s3c/map.h
+++ /dev/null
@@ -1,40 +0,0 @@
1/* linux/include/asm-arm/plat-s3c/map.h
2 *
3 * Copyright 2003, 2007 Simtec Electronics
4 * http://armlinux.simtec.co.uk/
5 * Ben Dooks <ben@simtec.co.uk>
6 *
7 * S3C - Memory map definitions (virtual addresses)
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12*/
13
14#ifndef __ASM_PLAT_MAP_H
15#define __ASM_PLAT_MAP_H __FILE__
16
17/* Fit all our registers in at 0xF4000000 upwards, trying to use as
18 * little of the VA space as possible so vmalloc and friends have a
19 * better chance of getting memory.
20 *
21 * we try to ensure stuff like the IRQ registers are available for
22 * an single MOVS instruction (ie, only 8 bits of set data)
23 */
24
25#define S3C_ADDR_BASE (0xF4000000)
26
27#ifndef __ASSEMBLY__
28#define S3C_ADDR(x) ((void __iomem __force *)S3C_ADDR_BASE + (x))
29#else
30#define S3C_ADDR(x) (S3C_ADDR_BASE + (x))
31#endif
32
33#define S3C_VA_IRQ S3C_ADDR(0x00000000) /* irq controller(s) */
34#define S3C_VA_SYS S3C_ADDR(0x00100000) /* system control */
35#define S3C_VA_MEM S3C_ADDR(0x00200000) /* system control */
36#define S3C_VA_TIMER S3C_ADDR(0x00300000) /* timer block */
37#define S3C_VA_WATCHDOG S3C_ADDR(0x00400000) /* watchdog */
38#define S3C_VA_UART S3C_ADDR(0x01000000) /* UART */
39
40#endif /* __ASM_PLAT_MAP_H */
diff --git a/include/asm-arm/plat-s3c/regs-adc.h b/include/asm-arm/plat-s3c/regs-adc.h
deleted file mode 100644
index 4323cccc86cd..000000000000
--- a/include/asm-arm/plat-s3c/regs-adc.h
+++ /dev/null
@@ -1,60 +0,0 @@
1/* arch/arm/mach-s3c2410/include/mach/regs-adc.h
2 *
3 * Copyright (c) 2004 Shannon Holland <holland@loser.net>
4 *
5 * This program is free software; yosu can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * S3C2410 ADC registers
10*/
11
12#ifndef __ASM_ARCH_REGS_ADC_H
13#define __ASM_ARCH_REGS_ADC_H "regs-adc.h"
14
15#define S3C2410_ADCREG(x) (x)
16
17#define S3C2410_ADCCON S3C2410_ADCREG(0x00)
18#define S3C2410_ADCTSC S3C2410_ADCREG(0x04)
19#define S3C2410_ADCDLY S3C2410_ADCREG(0x08)
20#define S3C2410_ADCDAT0 S3C2410_ADCREG(0x0C)
21#define S3C2410_ADCDAT1 S3C2410_ADCREG(0x10)
22
23
24/* ADCCON Register Bits */
25#define S3C2410_ADCCON_ECFLG (1<<15)
26#define S3C2410_ADCCON_PRSCEN (1<<14)
27#define S3C2410_ADCCON_PRSCVL(x) (((x)&0xFF)<<6)
28#define S3C2410_ADCCON_PRSCVLMASK (0xFF<<6)
29#define S3C2410_ADCCON_SELMUX(x) (((x)&0x7)<<3)
30#define S3C2410_ADCCON_MUXMASK (0x7<<3)
31#define S3C2410_ADCCON_STDBM (1<<2)
32#define S3C2410_ADCCON_READ_START (1<<1)
33#define S3C2410_ADCCON_ENABLE_START (1<<0)
34#define S3C2410_ADCCON_STARTMASK (0x3<<0)
35
36
37/* ADCTSC Register Bits */
38#define S3C2410_ADCTSC_YM_SEN (1<<7)
39#define S3C2410_ADCTSC_YP_SEN (1<<6)
40#define S3C2410_ADCTSC_XM_SEN (1<<5)
41#define S3C2410_ADCTSC_XP_SEN (1<<4)
42#define S3C2410_ADCTSC_PULL_UP_DISABLE (1<<3)
43#define S3C2410_ADCTSC_AUTO_PST (1<<2)
44#define S3C2410_ADCTSC_XY_PST(x) (((x)&0x3)<<0)
45
46/* ADCDAT0 Bits */
47#define S3C2410_ADCDAT0_UPDOWN (1<<15)
48#define S3C2410_ADCDAT0_AUTO_PST (1<<14)
49#define S3C2410_ADCDAT0_XY_PST (0x3<<12)
50#define S3C2410_ADCDAT0_XPDATA_MASK (0x03FF)
51
52/* ADCDAT1 Bits */
53#define S3C2410_ADCDAT1_UPDOWN (1<<15)
54#define S3C2410_ADCDAT1_AUTO_PST (1<<14)
55#define S3C2410_ADCDAT1_XY_PST (0x3<<12)
56#define S3C2410_ADCDAT1_YPDATA_MASK (0x03FF)
57
58#endif /* __ASM_ARCH_REGS_ADC_H */
59
60
diff --git a/include/asm-arm/plat-s3c/regs-serial.h b/include/asm-arm/plat-s3c/regs-serial.h
deleted file mode 100644
index a0daa647b92c..000000000000
--- a/include/asm-arm/plat-s3c/regs-serial.h
+++ /dev/null
@@ -1,232 +0,0 @@
1/* arch/arm/mach-s3c2410/include/mach/regs-serial.h
2 *
3 * From linux/include/asm-arm/hardware/serial_s3c2410.h
4 *
5 * Internal header file for Samsung S3C2410 serial ports (UART0-2)
6 *
7 * Copyright (C) 2002 Shane Nay (shane@minirl.com)
8 *
9 * Additional defines, (c) 2003 Simtec Electronics (linux@simtec.co.uk)
10 *
11 * Adapted from:
12 *
13 * Internal header file for MX1ADS serial ports (UART1 & 2)
14 *
15 * Copyright (C) 2002 Shane Nay (shane@minirl.com)
16 *
17 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License as published by
19 * the Free Software Foundation; either version 2 of the License, or
20 * (at your option) any later version.
21 *
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
26 *
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
30*/
31
32#ifndef __ASM_ARM_REGS_SERIAL_H
33#define __ASM_ARM_REGS_SERIAL_H
34
35#define S3C24XX_VA_UART0 (S3C_VA_UART)
36#define S3C24XX_VA_UART1 (S3C_VA_UART + 0x4000 )
37#define S3C24XX_VA_UART2 (S3C_VA_UART + 0x8000 )
38#define S3C24XX_VA_UART3 (S3C_VA_UART + 0xC000 )
39
40#define S3C2410_PA_UART0 (S3C24XX_PA_UART)
41#define S3C2410_PA_UART1 (S3C24XX_PA_UART + 0x4000 )
42#define S3C2410_PA_UART2 (S3C24XX_PA_UART + 0x8000 )
43#define S3C2443_PA_UART3 (S3C24XX_PA_UART + 0xC000 )
44
45#define S3C2410_URXH (0x24)
46#define S3C2410_UTXH (0x20)
47#define S3C2410_ULCON (0x00)
48#define S3C2410_UCON (0x04)
49#define S3C2410_UFCON (0x08)
50#define S3C2410_UMCON (0x0C)
51#define S3C2410_UBRDIV (0x28)
52#define S3C2410_UTRSTAT (0x10)
53#define S3C2410_UERSTAT (0x14)
54#define S3C2410_UFSTAT (0x18)
55#define S3C2410_UMSTAT (0x1C)
56
57#define S3C2410_LCON_CFGMASK ((0xF<<3)|(0x3))
58
59#define S3C2410_LCON_CS5 (0x0)
60#define S3C2410_LCON_CS6 (0x1)
61#define S3C2410_LCON_CS7 (0x2)
62#define S3C2410_LCON_CS8 (0x3)
63#define S3C2410_LCON_CSMASK (0x3)
64
65#define S3C2410_LCON_PNONE (0x0)
66#define S3C2410_LCON_PEVEN (0x5 << 3)
67#define S3C2410_LCON_PODD (0x4 << 3)
68#define S3C2410_LCON_PMASK (0x7 << 3)
69
70#define S3C2410_LCON_STOPB (1<<2)
71#define S3C2410_LCON_IRM (1<<6)
72
73#define S3C2440_UCON_CLKMASK (3<<10)
74#define S3C2440_UCON_PCLK (0<<10)
75#define S3C2440_UCON_UCLK (1<<10)
76#define S3C2440_UCON_PCLK2 (2<<10)
77#define S3C2440_UCON_FCLK (3<<10)
78#define S3C2443_UCON_EPLL (3<<10)
79
80#define S3C2440_UCON2_FCLK_EN (1<<15)
81#define S3C2440_UCON0_DIVMASK (15 << 12)
82#define S3C2440_UCON1_DIVMASK (15 << 12)
83#define S3C2440_UCON2_DIVMASK (7 << 12)
84#define S3C2440_UCON_DIVSHIFT (12)
85
86#define S3C2412_UCON_CLKMASK (3<<10)
87#define S3C2412_UCON_UCLK (1<<10)
88#define S3C2412_UCON_USYSCLK (3<<10)
89#define S3C2412_UCON_PCLK (0<<10)
90#define S3C2412_UCON_PCLK2 (2<<10)
91
92#define S3C2410_UCON_UCLK (1<<10)
93#define S3C2410_UCON_SBREAK (1<<4)
94
95#define S3C2410_UCON_TXILEVEL (1<<9)
96#define S3C2410_UCON_RXILEVEL (1<<8)
97#define S3C2410_UCON_TXIRQMODE (1<<2)
98#define S3C2410_UCON_RXIRQMODE (1<<0)
99#define S3C2410_UCON_RXFIFO_TOI (1<<7)
100#define S3C2443_UCON_RXERR_IRQEN (1<<6)
101#define S3C2443_UCON_LOOPBACK (1<<5)
102
103#define S3C2410_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
104 S3C2410_UCON_RXILEVEL | \
105 S3C2410_UCON_TXIRQMODE | \
106 S3C2410_UCON_RXIRQMODE | \
107 S3C2410_UCON_RXFIFO_TOI)
108
109#define S3C2410_UFCON_FIFOMODE (1<<0)
110#define S3C2410_UFCON_TXTRIG0 (0<<6)
111#define S3C2410_UFCON_RXTRIG8 (1<<4)
112#define S3C2410_UFCON_RXTRIG12 (2<<4)
113
114/* S3C2440 FIFO trigger levels */
115#define S3C2440_UFCON_RXTRIG1 (0<<4)
116#define S3C2440_UFCON_RXTRIG8 (1<<4)
117#define S3C2440_UFCON_RXTRIG16 (2<<4)
118#define S3C2440_UFCON_RXTRIG32 (3<<4)
119
120#define S3C2440_UFCON_TXTRIG0 (0<<6)
121#define S3C2440_UFCON_TXTRIG16 (1<<6)
122#define S3C2440_UFCON_TXTRIG32 (2<<6)
123#define S3C2440_UFCON_TXTRIG48 (3<<6)
124
125#define S3C2410_UFCON_RESETBOTH (3<<1)
126#define S3C2410_UFCON_RESETTX (1<<2)
127#define S3C2410_UFCON_RESETRX (1<<1)
128
129#define S3C2410_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
130 S3C2410_UFCON_TXTRIG0 | \
131 S3C2410_UFCON_RXTRIG8 )
132
133#define S3C2410_UMCOM_AFC (1<<4)
134#define S3C2410_UMCOM_RTS_LOW (1<<0)
135
136#define S3C2412_UMCON_AFC_63 (0<<5) /* same as s3c2443 */
137#define S3C2412_UMCON_AFC_56 (1<<5)
138#define S3C2412_UMCON_AFC_48 (2<<5)
139#define S3C2412_UMCON_AFC_40 (3<<5)
140#define S3C2412_UMCON_AFC_32 (4<<5)
141#define S3C2412_UMCON_AFC_24 (5<<5)
142#define S3C2412_UMCON_AFC_16 (6<<5)
143#define S3C2412_UMCON_AFC_8 (7<<5)
144
145#define S3C2410_UFSTAT_TXFULL (1<<9)
146#define S3C2410_UFSTAT_RXFULL (1<<8)
147#define S3C2410_UFSTAT_TXMASK (15<<4)
148#define S3C2410_UFSTAT_TXSHIFT (4)
149#define S3C2410_UFSTAT_RXMASK (15<<0)
150#define S3C2410_UFSTAT_RXSHIFT (0)
151
152/* UFSTAT S3C2443 same as S3C2440 */
153#define S3C2440_UFSTAT_TXFULL (1<<14)
154#define S3C2440_UFSTAT_RXFULL (1<<6)
155#define S3C2440_UFSTAT_TXSHIFT (8)
156#define S3C2440_UFSTAT_RXSHIFT (0)
157#define S3C2440_UFSTAT_TXMASK (63<<8)
158#define S3C2440_UFSTAT_RXMASK (63)
159
160#define S3C2410_UTRSTAT_TXE (1<<2)
161#define S3C2410_UTRSTAT_TXFE (1<<1)
162#define S3C2410_UTRSTAT_RXDR (1<<0)
163
164#define S3C2410_UERSTAT_OVERRUN (1<<0)
165#define S3C2410_UERSTAT_FRAME (1<<2)
166#define S3C2410_UERSTAT_BREAK (1<<3)
167#define S3C2443_UERSTAT_PARITY (1<<1)
168
169#define S3C2410_UERSTAT_ANY (S3C2410_UERSTAT_OVERRUN | \
170 S3C2410_UERSTAT_FRAME | \
171 S3C2410_UERSTAT_BREAK)
172
173#define S3C2410_UMSTAT_CTS (1<<0)
174#define S3C2410_UMSTAT_DeltaCTS (1<<2)
175
176#define S3C2443_DIVSLOT (0x2C)
177
178#ifndef __ASSEMBLY__
179
180/* struct s3c24xx_uart_clksrc
181 *
182 * this structure defines a named clock source that can be used for the
183 * uart, so that the best clock can be selected for the requested baud
184 * rate.
185 *
186 * min_baud and max_baud define the range of baud-rates this clock is
187 * acceptable for, if they are both zero, it is assumed any baud rate that
188 * can be generated from this clock will be used.
189 *
190 * divisor gives the divisor from the clock to the one seen by the uart
191*/
192
193struct s3c24xx_uart_clksrc {
194 const char *name;
195 unsigned int divisor;
196 unsigned int min_baud;
197 unsigned int max_baud;
198};
199
200/* configuration structure for per-machine configurations for the
201 * serial port
202 *
203 * the pointer is setup by the machine specific initialisation from the
204 * arch/arm/mach-s3c2410/ directory.
205*/
206
207struct s3c2410_uartcfg {
208 unsigned char hwport; /* hardware port number */
209 unsigned char unused;
210 unsigned short flags;
211 upf_t uart_flags; /* default uart flags */
212
213 unsigned long ucon; /* value of ucon for port */
214 unsigned long ulcon; /* value of ulcon for port */
215 unsigned long ufcon; /* value of ufcon for port */
216
217 struct s3c24xx_uart_clksrc *clocks;
218 unsigned int clocks_size;
219};
220
221/* s3c24xx_uart_devs
222 *
223 * this is exported from the core as we cannot use driver_register(),
224 * or platform_add_device() before the console_initcall()
225*/
226
227extern struct platform_device *s3c24xx_uart_devs[3];
228
229#endif /* __ASSEMBLY__ */
230
231#endif /* __ASM_ARM_REGS_SERIAL_H */
232
diff --git a/include/asm-arm/plat-s3c/regs-timer.h b/include/asm-arm/plat-s3c/regs-timer.h
deleted file mode 100644
index cc0eedd53e38..000000000000
--- a/include/asm-arm/plat-s3c/regs-timer.h
+++ /dev/null
@@ -1,115 +0,0 @@
1/* arch/arm/mach-s3c2410/include/mach/regs-timer.h
2 *
3 * Copyright (c) 2003 Simtec Electronics <linux@simtec.co.uk>
4 * http://www.simtec.co.uk/products/SWLINUX/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * S3C2410 Timer configuration
11*/
12
13
14#ifndef __ASM_ARCH_REGS_TIMER_H
15#define __ASM_ARCH_REGS_TIMER_H
16
17#define S3C_TIMERREG(x) (S3C_VA_TIMER + (x))
18#define S3C_TIMERREG2(tmr,reg) S3C_TIMERREG((reg)+0x0c+((tmr)*0x0c))
19
20#define S3C2410_TCFG0 S3C_TIMERREG(0x00)
21#define S3C2410_TCFG1 S3C_TIMERREG(0x04)
22#define S3C2410_TCON S3C_TIMERREG(0x08)
23
24#define S3C2410_TCFG_PRESCALER0_MASK (255<<0)
25#define S3C2410_TCFG_PRESCALER1_MASK (255<<8)
26#define S3C2410_TCFG_PRESCALER1_SHIFT (8)
27#define S3C2410_TCFG_DEADZONE_MASK (255<<16)
28#define S3C2410_TCFG_DEADZONE_SHIFT (16)
29
30#define S3C2410_TCFG1_MUX4_DIV2 (0<<16)
31#define S3C2410_TCFG1_MUX4_DIV4 (1<<16)
32#define S3C2410_TCFG1_MUX4_DIV8 (2<<16)
33#define S3C2410_TCFG1_MUX4_DIV16 (3<<16)
34#define S3C2410_TCFG1_MUX4_TCLK1 (4<<16)
35#define S3C2410_TCFG1_MUX4_MASK (15<<16)
36#define S3C2410_TCFG1_MUX4_SHIFT (16)
37
38#define S3C2410_TCFG1_MUX3_DIV2 (0<<12)
39#define S3C2410_TCFG1_MUX3_DIV4 (1<<12)
40#define S3C2410_TCFG1_MUX3_DIV8 (2<<12)
41#define S3C2410_TCFG1_MUX3_DIV16 (3<<12)
42#define S3C2410_TCFG1_MUX3_TCLK1 (4<<12)
43#define S3C2410_TCFG1_MUX3_MASK (15<<12)
44
45
46#define S3C2410_TCFG1_MUX2_DIV2 (0<<8)
47#define S3C2410_TCFG1_MUX2_DIV4 (1<<8)
48#define S3C2410_TCFG1_MUX2_DIV8 (2<<8)
49#define S3C2410_TCFG1_MUX2_DIV16 (3<<8)
50#define S3C2410_TCFG1_MUX2_TCLK1 (4<<8)
51#define S3C2410_TCFG1_MUX2_MASK (15<<8)
52
53
54#define S3C2410_TCFG1_MUX1_DIV2 (0<<4)
55#define S3C2410_TCFG1_MUX1_DIV4 (1<<4)
56#define S3C2410_TCFG1_MUX1_DIV8 (2<<4)
57#define S3C2410_TCFG1_MUX1_DIV16 (3<<4)
58#define S3C2410_TCFG1_MUX1_TCLK0 (4<<4)
59#define S3C2410_TCFG1_MUX1_MASK (15<<4)
60
61#define S3C2410_TCFG1_MUX0_DIV2 (0<<0)
62#define S3C2410_TCFG1_MUX0_DIV4 (1<<0)
63#define S3C2410_TCFG1_MUX0_DIV8 (2<<0)
64#define S3C2410_TCFG1_MUX0_DIV16 (3<<0)
65#define S3C2410_TCFG1_MUX0_TCLK0 (4<<0)
66#define S3C2410_TCFG1_MUX0_MASK (15<<0)
67
68#define S3C2410_TCFG1_MUX_DIV2 (0<<0)
69#define S3C2410_TCFG1_MUX_DIV4 (1<<0)
70#define S3C2410_TCFG1_MUX_DIV8 (2<<0)
71#define S3C2410_TCFG1_MUX_DIV16 (3<<0)
72#define S3C2410_TCFG1_MUX_TCLK (4<<0)
73#define S3C2410_TCFG1_MUX_MASK (15<<0)
74
75#define S3C2410_TCFG1_SHIFT(x) ((x) * 4)
76
77/* for each timer, we have an count buffer, an compare buffer and
78 * an observation buffer
79*/
80
81/* WARNING - timer 4 has no buffer reg, and it's observation is at +4 */
82
83#define S3C2410_TCNTB(tmr) S3C_TIMERREG2(tmr, 0x00)
84#define S3C2410_TCMPB(tmr) S3C_TIMERREG2(tmr, 0x04)
85#define S3C2410_TCNTO(tmr) S3C_TIMERREG2(tmr, (((tmr) == 4) ? 0x04 : 0x08))
86
87#define S3C2410_TCON_T4RELOAD (1<<22)
88#define S3C2410_TCON_T4MANUALUPD (1<<21)
89#define S3C2410_TCON_T4START (1<<20)
90
91#define S3C2410_TCON_T3RELOAD (1<<19)
92#define S3C2410_TCON_T3INVERT (1<<18)
93#define S3C2410_TCON_T3MANUALUPD (1<<17)
94#define S3C2410_TCON_T3START (1<<16)
95
96#define S3C2410_TCON_T2RELOAD (1<<15)
97#define S3C2410_TCON_T2INVERT (1<<14)
98#define S3C2410_TCON_T2MANUALUPD (1<<13)
99#define S3C2410_TCON_T2START (1<<12)
100
101#define S3C2410_TCON_T1RELOAD (1<<11)
102#define S3C2410_TCON_T1INVERT (1<<10)
103#define S3C2410_TCON_T1MANUALUPD (1<<9)
104#define S3C2410_TCON_T1START (1<<8)
105
106#define S3C2410_TCON_T0DEADZONE (1<<4)
107#define S3C2410_TCON_T0RELOAD (1<<3)
108#define S3C2410_TCON_T0INVERT (1<<2)
109#define S3C2410_TCON_T0MANUALUPD (1<<1)
110#define S3C2410_TCON_T0START (1<<0)
111
112#endif /* __ASM_ARCH_REGS_TIMER_H */
113
114
115
diff --git a/include/asm-arm/plat-s3c/uncompress.h b/include/asm-arm/plat-s3c/uncompress.h
deleted file mode 100644
index 19b9eda39485..000000000000
--- a/include/asm-arm/plat-s3c/uncompress.h
+++ /dev/null
@@ -1,155 +0,0 @@
1/* linux/include/asm-arm/plat-s3c/uncompress.h
2 *
3 * Copyright 2003, 2007 Simtec Electronics
4 * http://armlinux.simtec.co.uk/
5 * Ben Dooks <ben@simtec.co.uk>
6 *
7 * S3C - uncompress code
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12*/
13
14#ifndef __ASM_PLAT_UNCOMPRESS_H
15#define __ASM_PLAT_UNCOMPRESS_H
16
17typedef unsigned int upf_t; /* cannot include linux/serial_core.h */
18
19/* uart setup */
20
21static unsigned int fifo_mask;
22static unsigned int fifo_max;
23
24/* forward declerations */
25
26static void arch_detect_cpu(void);
27
28/* defines for UART registers */
29
30#include <asm/plat-s3c/regs-serial.h>
31#include <asm/plat-s3c/regs-watchdog.h>
32
33/* working in physical space... */
34#undef S3C2410_WDOGREG
35#define S3C2410_WDOGREG(x) ((S3C24XX_PA_WATCHDOG + (x)))
36
37/* how many bytes we allow into the FIFO at a time in FIFO mode */
38#define FIFO_MAX (14)
39
40#define uart_base S3C24XX_PA_UART + (0x4000*CONFIG_S3C_LOWLEVEL_UART_PORT)
41
42static __inline__ void
43uart_wr(unsigned int reg, unsigned int val)
44{
45 volatile unsigned int *ptr;
46
47 ptr = (volatile unsigned int *)(reg + uart_base);
48 *ptr = val;
49}
50
51static __inline__ unsigned int
52uart_rd(unsigned int reg)
53{
54 volatile unsigned int *ptr;
55
56 ptr = (volatile unsigned int *)(reg + uart_base);
57 return *ptr;
58}
59
60/* we can deal with the case the UARTs are being run
61 * in FIFO mode, so that we don't hold up our execution
62 * waiting for tx to happen...
63*/
64
65static void putc(int ch)
66{
67 if (uart_rd(S3C2410_UFCON) & S3C2410_UFCON_FIFOMODE) {
68 int level;
69
70 while (1) {
71 level = uart_rd(S3C2410_UFSTAT);
72 level &= fifo_mask;
73
74 if (level < fifo_max)
75 break;
76 }
77
78 } else {
79 /* not using fifos */
80
81 while ((uart_rd(S3C2410_UTRSTAT) & S3C2410_UTRSTAT_TXE) != S3C2410_UTRSTAT_TXE)
82 barrier();
83 }
84
85 /* write byte to transmission register */
86 uart_wr(S3C2410_UTXH, ch);
87}
88
89static inline void flush(void)
90{
91}
92
93#define __raw_writel(d,ad) do { *((volatile unsigned int *)(ad)) = (d); } while(0)
94
95/* CONFIG_S3C_BOOT_WATCHDOG
96 *
97 * Simple boot-time watchdog setup, to reboot the system if there is
98 * any problem with the boot process
99*/
100
101#ifdef CONFIG_S3C_BOOT_WATCHDOG
102
103#define WDOG_COUNT (0xff00)
104
105static inline void arch_decomp_wdog(void)
106{
107 __raw_writel(WDOG_COUNT, S3C2410_WTCNT);
108}
109
110static void arch_decomp_wdog_start(void)
111{
112 __raw_writel(WDOG_COUNT, S3C2410_WTDAT);
113 __raw_writel(WDOG_COUNT, S3C2410_WTCNT);
114 __raw_writel(S3C2410_WTCON_ENABLE | S3C2410_WTCON_DIV128 | S3C2410_WTCON_RSTEN | S3C2410_WTCON_PRESCALE(0x80), S3C2410_WTCON);
115}
116
117#else
118#define arch_decomp_wdog_start()
119#define arch_decomp_wdog()
120#endif
121
122#ifdef CONFIG_S3C_BOOT_ERROR_RESET
123
124static void arch_decomp_error(const char *x)
125{
126 putstr("\n\n");
127 putstr(x);
128 putstr("\n\n -- System resetting\n");
129
130 __raw_writel(0x4000, S3C2410_WTDAT);
131 __raw_writel(0x4000, S3C2410_WTCNT);
132 __raw_writel(S3C2410_WTCON_ENABLE | S3C2410_WTCON_DIV128 | S3C2410_WTCON_RSTEN | S3C2410_WTCON_PRESCALE(0x40), S3C2410_WTCON);
133
134 while(1);
135}
136
137#define arch_error arch_decomp_error
138#endif
139
140static void error(char *err);
141
142static void
143arch_decomp_setup(void)
144{
145 /* we may need to setup the uart(s) here if we are not running
146 * on an BAST... the BAST will have left the uarts configured
147 * after calling linux.
148 */
149
150 arch_detect_cpu();
151 arch_decomp_wdog_start();
152}
153
154
155#endif /* __ASM_PLAT_UNCOMPRESS_H */
diff --git a/include/asm-arm/plat-s3c24xx/clock.h b/include/asm-arm/plat-s3c24xx/clock.h
deleted file mode 100644
index 235b753cd877..000000000000
--- a/include/asm-arm/plat-s3c24xx/clock.h
+++ /dev/null
@@ -1,64 +0,0 @@
1/* linux/include/asm-arm/plat-s3c24xx/clock.h
2 * linux/arch/arm/mach-s3c2410/clock.h
3 *
4 * Copyright (c) 2004-2005 Simtec Electronics
5 * http://www.simtec.co.uk/products/SWLINUX/
6 * Written by Ben Dooks, <ben@simtec.co.uk>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13struct clk {
14 struct list_head list;
15 struct module *owner;
16 struct clk *parent;
17 const char *name;
18 int id;
19 int usage;
20 unsigned long rate;
21 unsigned long ctrlbit;
22
23 int (*enable)(struct clk *, int enable);
24 int (*set_rate)(struct clk *c, unsigned long rate);
25 unsigned long (*get_rate)(struct clk *c);
26 unsigned long (*round_rate)(struct clk *c, unsigned long rate);
27 int (*set_parent)(struct clk *c, struct clk *parent);
28};
29
30/* other clocks which may be registered by board support */
31
32extern struct clk s3c24xx_dclk0;
33extern struct clk s3c24xx_dclk1;
34extern struct clk s3c24xx_clkout0;
35extern struct clk s3c24xx_clkout1;
36extern struct clk s3c24xx_uclk;
37
38extern struct clk clk_usb_bus;
39
40/* core clock support */
41
42extern struct clk clk_f;
43extern struct clk clk_h;
44extern struct clk clk_p;
45extern struct clk clk_mpll;
46extern struct clk clk_upll;
47extern struct clk clk_xtal;
48
49/* exports for arch/arm/mach-s3c2410
50 *
51 * Please DO NOT use these outside of arch/arm/mach-s3c2410
52*/
53
54extern struct mutex clocks_mutex;
55
56extern int s3c2410_clkcon_enable(struct clk *clk, int enable);
57
58extern int s3c24xx_register_clock(struct clk *clk);
59extern int s3c24xx_register_clocks(struct clk **clk, int nr_clks);
60
61extern int s3c24xx_setup_clocks(unsigned long xtal,
62 unsigned long fclk,
63 unsigned long hclk,
64 unsigned long pclk);
diff --git a/include/asm-arm/plat-s3c24xx/common-smdk.h b/include/asm-arm/plat-s3c24xx/common-smdk.h
deleted file mode 100644
index 58d9094c935c..000000000000
--- a/include/asm-arm/plat-s3c24xx/common-smdk.h
+++ /dev/null
@@ -1,15 +0,0 @@
1/* linux/include/asm-arm/plat-s3c24xx/common-smdk.h
2 *
3 * Copyright (c) 2006 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Common code for SMDK2410 and SMDK2440 boards
7 *
8 * http://www.fluff.org/ben/smdk2440/
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15extern void smdk_machine_init(void);
diff --git a/include/asm-arm/plat-s3c24xx/cpu.h b/include/asm-arm/plat-s3c24xx/cpu.h
deleted file mode 100644
index 23e420e8bd5b..000000000000
--- a/include/asm-arm/plat-s3c24xx/cpu.h
+++ /dev/null
@@ -1,54 +0,0 @@
1/* linux/include/asm-arm/plat-s3c24xx/cpu.h
2 *
3 * Copyright (c) 2004-2005 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Header file for S3C24XX CPU support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13/* todo - fix when rmk changes iodescs to use `void __iomem *` */
14
15#define IODESC_ENT(x) { (unsigned long)S3C24XX_VA_##x, __phys_to_pfn(S3C24XX_PA_##x), S3C24XX_SZ_##x, MT_DEVICE }
16
17#ifndef MHZ
18#define MHZ (1000*1000)
19#endif
20
21#define print_mhz(m) ((m) / MHZ), ((m / 1000) % 1000)
22
23/* forward declaration */
24struct s3c24xx_uart_resources;
25struct platform_device;
26struct s3c2410_uartcfg;
27struct map_desc;
28
29/* core initialisation functions */
30
31extern void s3c24xx_init_irq(void);
32
33extern void s3c24xx_init_io(struct map_desc *mach_desc, int size);
34
35extern void s3c24xx_init_uarts(struct s3c2410_uartcfg *cfg, int no);
36
37extern void s3c24xx_init_clocks(int xtal);
38
39extern void s3c24xx_init_uartdevs(char *name,
40 struct s3c24xx_uart_resources *res,
41 struct s3c2410_uartcfg *cfg, int no);
42
43/* timer for 2410/2440 */
44
45struct sys_timer;
46extern struct sys_timer s3c24xx_timer;
47
48/* system device classes */
49
50extern struct sysdev_class s3c2410_sysclass;
51extern struct sysdev_class s3c2412_sysclass;
52extern struct sysdev_class s3c2440_sysclass;
53extern struct sysdev_class s3c2442_sysclass;
54extern struct sysdev_class s3c2443_sysclass;
diff --git a/include/asm-arm/plat-s3c24xx/devs.h b/include/asm-arm/plat-s3c24xx/devs.h
deleted file mode 100644
index badaac9d64a8..000000000000
--- a/include/asm-arm/plat-s3c24xx/devs.h
+++ /dev/null
@@ -1,49 +0,0 @@
1/* linux/include/asm-arm/plat-s3c24xx/devs.h
2 *
3 * Copyright (c) 2004 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Header file for s3c2410 standard platform devices
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12#include <linux/platform_device.h>
13
14struct s3c24xx_uart_resources {
15 struct resource *resources;
16 unsigned long nr_resources;
17};
18
19extern struct s3c24xx_uart_resources s3c2410_uart_resources[];
20
21extern struct platform_device *s3c24xx_uart_devs[];
22extern struct platform_device *s3c24xx_uart_src[];
23
24extern struct platform_device s3c_device_timer[];
25
26extern struct platform_device s3c_device_usb;
27extern struct platform_device s3c_device_lcd;
28extern struct platform_device s3c_device_wdt;
29extern struct platform_device s3c_device_i2c;
30extern struct platform_device s3c_device_iis;
31extern struct platform_device s3c_device_rtc;
32extern struct platform_device s3c_device_adc;
33extern struct platform_device s3c_device_sdi;
34extern struct platform_device s3c_device_hsmmc;
35
36extern struct platform_device s3c_device_spi0;
37extern struct platform_device s3c_device_spi1;
38
39extern struct platform_device s3c_device_nand;
40
41extern struct platform_device s3c_device_usbgadget;
42
43/* s3c2440 specific devices */
44
45#ifdef CONFIG_CPU_S3C2440
46
47extern struct platform_device s3c_device_camif;
48
49#endif
diff --git a/include/asm-arm/plat-s3c24xx/dma.h b/include/asm-arm/plat-s3c24xx/dma.h
deleted file mode 100644
index c78efe316fc8..000000000000
--- a/include/asm-arm/plat-s3c24xx/dma.h
+++ /dev/null
@@ -1,82 +0,0 @@
1/* linux/include/asm-arm/plat-s3c24xx/dma.h
2 *
3 * Copyright (C) 2006 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Samsung S3C24XX DMA support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13extern struct sysdev_class dma_sysclass;
14extern struct s3c2410_dma_chan s3c2410_chans[S3C2410_DMA_CHANNELS];
15
16#define DMA_CH_VALID (1<<31)
17#define DMA_CH_NEVER (1<<30)
18
19struct s3c24xx_dma_addr {
20 unsigned long from;
21 unsigned long to;
22};
23
24/* struct s3c24xx_dma_map
25 *
26 * this holds the mapping information for the channel selected
27 * to be connected to the specified device
28*/
29
30struct s3c24xx_dma_map {
31 const char *name;
32 struct s3c24xx_dma_addr hw_addr;
33
34 unsigned long channels[S3C2410_DMA_CHANNELS];
35 unsigned long channels_rx[S3C2410_DMA_CHANNELS];
36};
37
38struct s3c24xx_dma_selection {
39 struct s3c24xx_dma_map *map;
40 unsigned long map_size;
41 unsigned long dcon_mask;
42
43 void (*select)(struct s3c2410_dma_chan *chan,
44 struct s3c24xx_dma_map *map);
45
46 void (*direction)(struct s3c2410_dma_chan *chan,
47 struct s3c24xx_dma_map *map,
48 enum s3c2410_dmasrc dir);
49};
50
51extern int s3c24xx_dma_init_map(struct s3c24xx_dma_selection *sel);
52
53/* struct s3c24xx_dma_order_ch
54 *
55 * channel map for one of the `enum dma_ch` dma channels. the list
56 * entry contains a set of low-level channel numbers, orred with
57 * DMA_CH_VALID, which are checked in the order in the array.
58*/
59
60struct s3c24xx_dma_order_ch {
61 unsigned int list[S3C2410_DMA_CHANNELS]; /* list of channels */
62 unsigned int flags; /* flags */
63};
64
65/* struct s3c24xx_dma_order
66 *
67 * information provided by either the core or the board to give the
68 * dma system a hint on how to allocate channels
69*/
70
71struct s3c24xx_dma_order {
72 struct s3c24xx_dma_order_ch channels[DMACH_MAX];
73};
74
75extern int s3c24xx_dma_order_set(struct s3c24xx_dma_order *map);
76
77/* DMA init code, called from the cpu support code */
78
79extern int s3c2410_dma_init(void);
80
81extern int s3c24xx_dma_init(unsigned int channels, unsigned int irq,
82 unsigned int stride);
diff --git a/include/asm-arm/plat-s3c24xx/irq.h b/include/asm-arm/plat-s3c24xx/irq.h
deleted file mode 100644
index 45746a995343..000000000000
--- a/include/asm-arm/plat-s3c24xx/irq.h
+++ /dev/null
@@ -1,109 +0,0 @@
1/* linux/include/asm-arm/plat-s3c24xx/irq.h
2 *
3 * Copyright (c) 2004-2005 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Header file for S3C24XX CPU IRQ support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#define irqdbf(x...)
14#define irqdbf2(x...)
15
16#define EXTINT_OFF (IRQ_EINT4 - 4)
17
18/* these are exported for arch/arm/mach-* usage */
19extern struct irq_chip s3c_irq_level_chip;
20extern struct irq_chip s3c_irq_chip;
21
22static inline void
23s3c_irqsub_mask(unsigned int irqno, unsigned int parentbit,
24 int subcheck)
25{
26 unsigned long mask;
27 unsigned long submask;
28
29 submask = __raw_readl(S3C2410_INTSUBMSK);
30 mask = __raw_readl(S3C2410_INTMSK);
31
32 submask |= (1UL << (irqno - IRQ_S3CUART_RX0));
33
34 /* check to see if we need to mask the parent IRQ */
35
36 if ((submask & subcheck) == subcheck) {
37 __raw_writel(mask | parentbit, S3C2410_INTMSK);
38 }
39
40 /* write back masks */
41 __raw_writel(submask, S3C2410_INTSUBMSK);
42
43}
44
45static inline void
46s3c_irqsub_unmask(unsigned int irqno, unsigned int parentbit)
47{
48 unsigned long mask;
49 unsigned long submask;
50
51 submask = __raw_readl(S3C2410_INTSUBMSK);
52 mask = __raw_readl(S3C2410_INTMSK);
53
54 submask &= ~(1UL << (irqno - IRQ_S3CUART_RX0));
55 mask &= ~parentbit;
56
57 /* write back masks */
58 __raw_writel(submask, S3C2410_INTSUBMSK);
59 __raw_writel(mask, S3C2410_INTMSK);
60}
61
62
63static inline void
64s3c_irqsub_maskack(unsigned int irqno, unsigned int parentmask, unsigned int group)
65{
66 unsigned int bit = 1UL << (irqno - IRQ_S3CUART_RX0);
67
68 s3c_irqsub_mask(irqno, parentmask, group);
69
70 __raw_writel(bit, S3C2410_SUBSRCPND);
71
72 /* only ack parent if we've got all the irqs (seems we must
73 * ack, all and hope that the irq system retriggers ok when
74 * the interrupt goes off again)
75 */
76
77 if (1) {
78 __raw_writel(parentmask, S3C2410_SRCPND);
79 __raw_writel(parentmask, S3C2410_INTPND);
80 }
81}
82
83static inline void
84s3c_irqsub_ack(unsigned int irqno, unsigned int parentmask, unsigned int group)
85{
86 unsigned int bit = 1UL << (irqno - IRQ_S3CUART_RX0);
87
88 __raw_writel(bit, S3C2410_SUBSRCPND);
89
90 /* only ack parent if we've got all the irqs (seems we must
91 * ack, all and hope that the irq system retriggers ok when
92 * the interrupt goes off again)
93 */
94
95 if (1) {
96 __raw_writel(parentmask, S3C2410_SRCPND);
97 __raw_writel(parentmask, S3C2410_INTPND);
98 }
99}
100
101/* exported for use in arch/arm/mach-s3c2410 */
102
103#ifdef CONFIG_PM
104extern int s3c_irq_wake(unsigned int irqno, unsigned int state);
105#else
106#define s3c_irq_wake NULL
107#endif
108
109extern int s3c_irqext_type(unsigned int irq, unsigned int type);
diff --git a/include/asm-arm/plat-s3c24xx/pm.h b/include/asm-arm/plat-s3c24xx/pm.h
deleted file mode 100644
index cc623667e48a..000000000000
--- a/include/asm-arm/plat-s3c24xx/pm.h
+++ /dev/null
@@ -1,73 +0,0 @@
1/* linux/include/asm-arm/plat-s3c24xx/pm.h
2 *
3 * Copyright (c) 2004 Simtec Electronics
4 * Written by Ben Dooks, <ben@simtec.co.uk>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9*/
10
11/* s3c2410_pm_init
12 *
13 * called from board at initialisation time to setup the power
14 * management
15*/
16
17#ifdef CONFIG_PM
18
19extern __init int s3c2410_pm_init(void);
20
21#else
22
23static inline int s3c2410_pm_init(void)
24{
25 return 0;
26}
27#endif
28
29/* configuration for the IRQ mask over sleep */
30extern unsigned long s3c_irqwake_intmask;
31extern unsigned long s3c_irqwake_eintmask;
32
33/* IRQ masks for IRQs allowed to go to sleep (see irq.c) */
34extern unsigned long s3c_irqwake_intallow;
35extern unsigned long s3c_irqwake_eintallow;
36
37/* per-cpu sleep functions */
38
39extern void (*pm_cpu_prep)(void);
40extern void (*pm_cpu_sleep)(void);
41
42/* Flags for PM Control */
43
44extern unsigned long s3c_pm_flags;
45
46/* from sleep.S */
47
48extern int s3c2410_cpu_save(unsigned long *saveblk);
49extern void s3c2410_cpu_suspend(void);
50extern void s3c2410_cpu_resume(void);
51
52extern unsigned long s3c2410_sleep_save_phys;
53
54/* sleep save info */
55
56struct sleep_save {
57 void __iomem *reg;
58 unsigned long val;
59};
60
61#define SAVE_ITEM(x) \
62 { .reg = (x) }
63
64extern void s3c2410_pm_do_save(struct sleep_save *ptr, int count);
65extern void s3c2410_pm_do_restore(struct sleep_save *ptr, int count);
66
67#ifdef CONFIG_PM
68extern int s3c24xx_irq_suspend(struct sys_device *dev, pm_message_t state);
69extern int s3c24xx_irq_resume(struct sys_device *dev);
70#else
71#define s3c24xx_irq_suspend NULL
72#define s3c24xx_irq_resume NULL
73#endif
diff --git a/include/asm-arm/plat-s3c24xx/s3c2400.h b/include/asm-arm/plat-s3c24xx/s3c2400.h
deleted file mode 100644
index 3a5a16821af8..000000000000
--- a/include/asm-arm/plat-s3c24xx/s3c2400.h
+++ /dev/null
@@ -1,31 +0,0 @@
1/* linux/include/asm-arm/plat-s3c24xx/s3c2400.h
2 *
3 * Copyright (c) 2004 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Header file for S3C2400 cpu support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * Modifications:
13 * 09-Fev-2006 LCVR First version, based on s3c2410.h
14*/
15
16#ifdef CONFIG_CPU_S3C2400
17
18extern int s3c2400_init(void);
19
20extern void s3c2400_map_io(struct map_desc *mach_desc, int size);
21
22extern void s3c2400_init_uarts(struct s3c2410_uartcfg *cfg, int no);
23
24extern void s3c2400_init_clocks(int xtal);
25
26#else
27#define s3c2400_init_clocks NULL
28#define s3c2400_init_uarts NULL
29#define s3c2400_map_io NULL
30#define s3c2400_init NULL
31#endif
diff --git a/include/asm-arm/plat-s3c24xx/s3c2410.h b/include/asm-arm/plat-s3c24xx/s3c2410.h
deleted file mode 100644
index 3cd1ec677b3f..000000000000
--- a/include/asm-arm/plat-s3c24xx/s3c2410.h
+++ /dev/null
@@ -1,31 +0,0 @@
1/* linux/include/asm-arm/plat-s3c24xx/s3c2410.h
2 *
3 * Copyright (c) 2004 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Header file for s3c2410 machine directory
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12*/
13
14#ifdef CONFIG_CPU_S3C2410
15
16extern int s3c2410_init(void);
17
18extern void s3c2410_map_io(struct map_desc *mach_desc, int size);
19
20extern void s3c2410_init_uarts(struct s3c2410_uartcfg *cfg, int no);
21
22extern void s3c2410_init_clocks(int xtal);
23
24#else
25#define s3c2410_init_clocks NULL
26#define s3c2410_init_uarts NULL
27#define s3c2410_map_io NULL
28#define s3c2410_init NULL
29#endif
30
31extern int s3c2410_baseclk_add(void);
diff --git a/include/asm-arm/plat-s3c24xx/s3c2412.h b/include/asm-arm/plat-s3c24xx/s3c2412.h
deleted file mode 100644
index 3ec97685e781..000000000000
--- a/include/asm-arm/plat-s3c24xx/s3c2412.h
+++ /dev/null
@@ -1,29 +0,0 @@
1/* linux/include/asm-arm/plat-s3c24xx/s3c2412.h
2 *
3 * Copyright (c) 2006 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Header file for s3c2412 cpu support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifdef CONFIG_CPU_S3C2412
14
15extern int s3c2412_init(void);
16
17extern void s3c2412_map_io(struct map_desc *mach_desc, int size);
18
19extern void s3c2412_init_uarts(struct s3c2410_uartcfg *cfg, int no);
20
21extern void s3c2412_init_clocks(int xtal);
22
23extern int s3c2412_baseclk_add(void);
24#else
25#define s3c2412_init_clocks NULL
26#define s3c2412_init_uarts NULL
27#define s3c2412_map_io NULL
28#define s3c2412_init NULL
29#endif
diff --git a/include/asm-arm/plat-s3c24xx/s3c2440.h b/include/asm-arm/plat-s3c24xx/s3c2440.h
deleted file mode 100644
index 107853bf9481..000000000000
--- a/include/asm-arm/plat-s3c24xx/s3c2440.h
+++ /dev/null
@@ -1,17 +0,0 @@
1/* linux/include/asm-arm/plat-s3c24xx/s3c2440.h
2 *
3 * Copyright (c) 2004-2005 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Header file for s3c2440 cpu support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifdef CONFIG_CPU_S3C2440
14extern int s3c2440_init(void);
15#else
16#define s3c2440_init NULL
17#endif
diff --git a/include/asm-arm/plat-s3c24xx/s3c2442.h b/include/asm-arm/plat-s3c24xx/s3c2442.h
deleted file mode 100644
index 451a23a2092a..000000000000
--- a/include/asm-arm/plat-s3c24xx/s3c2442.h
+++ /dev/null
@@ -1,17 +0,0 @@
1/* linux/include/asm-arm/plat-s3c24xx/s3c2442.h
2 *
3 * Copyright (c) 2006 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Header file for s3c2442 cpu support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifdef CONFIG_CPU_S3C2442
14extern int s3c2442_init(void);
15#else
16#define s3c2442_init NULL
17#endif
diff --git a/include/asm-arm/plat-s3c24xx/s3c2443.h b/include/asm-arm/plat-s3c24xx/s3c2443.h
deleted file mode 100644
index 11d83b5c84e6..000000000000
--- a/include/asm-arm/plat-s3c24xx/s3c2443.h
+++ /dev/null
@@ -1,32 +0,0 @@
1/* linux/include/asm-arm/plat-s3c24xx/s3c2443.h
2 *
3 * Copyright (c) 2004-2005 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Header file for s3c2443 cpu support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifdef CONFIG_CPU_S3C2443
14
15struct s3c2410_uartcfg;
16
17extern int s3c2443_init(void);
18
19extern void s3c2443_map_io(struct map_desc *mach_desc, int size);
20
21extern void s3c2443_init_uarts(struct s3c2410_uartcfg *cfg, int no);
22
23extern void s3c2443_init_clocks(int xtal);
24
25extern int s3c2443_baseclk_add(void);
26
27#else
28#define s3c2443_init_clocks NULL
29#define s3c2443_init_uarts NULL
30#define s3c2443_map_io NULL
31#define s3c2443_init NULL
32#endif
diff --git a/include/asm-mips/cevt-r4k.h b/include/asm-mips/cevt-r4k.h
new file mode 100644
index 000000000000..fa4328f9124f
--- /dev/null
+++ b/include/asm-mips/cevt-r4k.h
@@ -0,0 +1,46 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2008 Kevin D. Kissell
7 */
8
9/*
10 * Definitions used for common event timer implementation
11 * for MIPS 4K-type processors and their MIPS MT variants.
12 * Avoids unsightly extern declarations in C files.
13 */
14#ifndef __ASM_CEVT_R4K_H
15#define __ASM_CEVT_R4K_H
16
17DECLARE_PER_CPU(struct clock_event_device, mips_clockevent_device);
18
19void mips_event_handler(struct clock_event_device *dev);
20int c0_compare_int_usable(void);
21void mips_set_clock_mode(enum clock_event_mode, struct clock_event_device *);
22irqreturn_t c0_compare_interrupt(int, void *);
23
24extern struct irqaction c0_compare_irqaction;
25extern int cp0_timer_irq_installed;
26
27/*
28 * Possibly handle a performance counter interrupt.
29 * Return true if the timer interrupt should not be checked
30 */
31
32static inline int handle_perf_irq(int r2)
33{
34 /*
35 * The performance counter overflow interrupt may be shared with the
36 * timer interrupt (cp0_perfcount_irq < 0). If it is and a
37 * performance counter has overflowed (perf_irq() == IRQ_HANDLED)
38 * and we can't reliably determine if a counter interrupt has also
39 * happened (!r2) then don't check for a timer interrupt.
40 */
41 return (cp0_perfcount_irq < 0) &&
42 perf_irq() == IRQ_HANDLED &&
43 !r2;
44}
45
46#endif /* __ASM_CEVT_R4K_H */
diff --git a/include/asm-mips/irqflags.h b/include/asm-mips/irqflags.h
index 881e8866501d..701ec0ba8fa9 100644
--- a/include/asm-mips/irqflags.h
+++ b/include/asm-mips/irqflags.h
@@ -38,8 +38,17 @@ __asm__(
38 " .set pop \n" 38 " .set pop \n"
39 " .endm"); 39 " .endm");
40 40
41extern void smtc_ipi_replay(void);
42
41static inline void raw_local_irq_enable(void) 43static inline void raw_local_irq_enable(void)
42{ 44{
45#ifdef CONFIG_MIPS_MT_SMTC
46 /*
47 * SMTC kernel needs to do a software replay of queued
48 * IPIs, at the cost of call overhead on each local_irq_enable()
49 */
50 smtc_ipi_replay();
51#endif
43 __asm__ __volatile__( 52 __asm__ __volatile__(
44 "raw_local_irq_enable" 53 "raw_local_irq_enable"
45 : /* no outputs */ 54 : /* no outputs */
@@ -47,6 +56,7 @@ static inline void raw_local_irq_enable(void)
47 : "memory"); 56 : "memory");
48} 57}
49 58
59
50/* 60/*
51 * For cli() we have to insert nops to make sure that the new value 61 * For cli() we have to insert nops to make sure that the new value
52 * has actually arrived in the status register before the end of this 62 * has actually arrived in the status register before the end of this
@@ -185,15 +195,14 @@ __asm__(
185 " .set pop \n" 195 " .set pop \n"
186 " .endm \n"); 196 " .endm \n");
187 197
188extern void smtc_ipi_replay(void);
189 198
190static inline void raw_local_irq_restore(unsigned long flags) 199static inline void raw_local_irq_restore(unsigned long flags)
191{ 200{
192 unsigned long __tmp1; 201 unsigned long __tmp1;
193 202
194#ifdef CONFIG_MIPS_MT_SMTC_INSTANT_REPLAY 203#ifdef CONFIG_MIPS_MT_SMTC
195 /* 204 /*
196 * CONFIG_MIPS_MT_SMTC_INSTANT_REPLAY does prompt replay of deferred 205 * SMTC kernel needs to do a software replay of queued
197 * IPIs, at the cost of branch and call overhead on each 206 * IPIs, at the cost of branch and call overhead on each
198 * local_irq_restore() 207 * local_irq_restore()
199 */ 208 */
@@ -208,6 +217,17 @@ static inline void raw_local_irq_restore(unsigned long flags)
208 : "memory"); 217 : "memory");
209} 218}
210 219
220static inline void __raw_local_irq_restore(unsigned long flags)
221{
222 unsigned long __tmp1;
223
224 __asm__ __volatile__(
225 "raw_local_irq_restore\t%0"
226 : "=r" (__tmp1)
227 : "0" (flags)
228 : "memory");
229}
230
211static inline int raw_irqs_disabled_flags(unsigned long flags) 231static inline int raw_irqs_disabled_flags(unsigned long flags)
212{ 232{
213#ifdef CONFIG_MIPS_MT_SMTC 233#ifdef CONFIG_MIPS_MT_SMTC
diff --git a/include/asm-mips/mipsregs.h b/include/asm-mips/mipsregs.h
index a46f8e258e6b..979866000da4 100644
--- a/include/asm-mips/mipsregs.h
+++ b/include/asm-mips/mipsregs.h
@@ -1462,7 +1462,7 @@ set_c0_##name(unsigned int set) \
1462{ \ 1462{ \
1463 unsigned int res; \ 1463 unsigned int res; \
1464 unsigned int omt; \ 1464 unsigned int omt; \
1465 unsigned int flags; \ 1465 unsigned long flags; \
1466 \ 1466 \
1467 local_irq_save(flags); \ 1467 local_irq_save(flags); \
1468 omt = __dmt(); \ 1468 omt = __dmt(); \
@@ -1480,7 +1480,7 @@ clear_c0_##name(unsigned int clear) \
1480{ \ 1480{ \
1481 unsigned int res; \ 1481 unsigned int res; \
1482 unsigned int omt; \ 1482 unsigned int omt; \
1483 unsigned int flags; \ 1483 unsigned long flags; \
1484 \ 1484 \
1485 local_irq_save(flags); \ 1485 local_irq_save(flags); \
1486 omt = __dmt(); \ 1486 omt = __dmt(); \
@@ -1498,7 +1498,7 @@ change_c0_##name(unsigned int change, unsigned int new) \
1498{ \ 1498{ \
1499 unsigned int res; \ 1499 unsigned int res; \
1500 unsigned int omt; \ 1500 unsigned int omt; \
1501 unsigned int flags; \ 1501 unsigned long flags; \
1502 \ 1502 \
1503 local_irq_save(flags); \ 1503 local_irq_save(flags); \
1504 \ 1504 \
diff --git a/include/asm-mips/pgtable-32.h b/include/asm-mips/pgtable-32.h
index 4396e9ffd418..55813d6150c7 100644
--- a/include/asm-mips/pgtable-32.h
+++ b/include/asm-mips/pgtable-32.h
@@ -57,7 +57,7 @@ extern int add_temporary_entry(unsigned long entrylo0, unsigned long entrylo1,
57#define PMD_ORDER 1 57#define PMD_ORDER 1
58#define PTE_ORDER 0 58#define PTE_ORDER 0
59 59
60#define PTRS_PER_PGD ((PAGE_SIZE << PGD_ORDER) / sizeof(pgd_t)) 60#define PTRS_PER_PGD (USER_PTRS_PER_PGD * 2)
61#define PTRS_PER_PTE ((PAGE_SIZE << PTE_ORDER) / sizeof(pte_t)) 61#define PTRS_PER_PTE ((PAGE_SIZE << PTE_ORDER) / sizeof(pte_t))
62 62
63#define USER_PTRS_PER_PGD (0x80000000UL/PGDIR_SIZE) 63#define USER_PTRS_PER_PGD (0x80000000UL/PGDIR_SIZE)
diff --git a/include/asm-mips/smtc.h b/include/asm-mips/smtc.h
index 3639b28f80db..ea60bf08dcb0 100644
--- a/include/asm-mips/smtc.h
+++ b/include/asm-mips/smtc.h
@@ -6,6 +6,7 @@
6 */ 6 */
7 7
8#include <asm/mips_mt.h> 8#include <asm/mips_mt.h>
9#include <asm/smtc_ipi.h>
9 10
10/* 11/*
11 * System-wide SMTC status information 12 * System-wide SMTC status information
@@ -38,14 +39,15 @@ struct mm_struct;
38struct task_struct; 39struct task_struct;
39 40
40void smtc_get_new_mmu_context(struct mm_struct *mm, unsigned long cpu); 41void smtc_get_new_mmu_context(struct mm_struct *mm, unsigned long cpu);
41 42void self_ipi(struct smtc_ipi *);
42void smtc_flush_tlb_asid(unsigned long asid); 43void smtc_flush_tlb_asid(unsigned long asid);
43extern int mipsmt_build_cpu_map(int startslot); 44extern int smtc_build_cpu_map(int startslot);
44extern void mipsmt_prepare_cpus(void); 45extern void smtc_prepare_cpus(int cpus);
45extern void smtc_smp_finish(void); 46extern void smtc_smp_finish(void);
46extern void smtc_boot_secondary(int cpu, struct task_struct *t); 47extern void smtc_boot_secondary(int cpu, struct task_struct *t);
47extern void smtc_cpus_done(void); 48extern void smtc_cpus_done(void);
48 49
50
49/* 51/*
50 * Sharing the TLB between multiple VPEs means that the 52 * Sharing the TLB between multiple VPEs means that the
51 * "random" index selection function is not allowed to 53 * "random" index selection function is not allowed to
diff --git a/include/asm-mips/sn/mapped_kernel.h b/include/asm-mips/sn/mapped_kernel.h
index c3dd5d0d525f..721496a0bb92 100644
--- a/include/asm-mips/sn/mapped_kernel.h
+++ b/include/asm-mips/sn/mapped_kernel.h
@@ -5,6 +5,8 @@
5#ifndef __ASM_SN_MAPPED_KERNEL_H 5#ifndef __ASM_SN_MAPPED_KERNEL_H
6#define __ASM_SN_MAPPED_KERNEL_H 6#define __ASM_SN_MAPPED_KERNEL_H
7 7
8#include <linux/mmzone.h>
9
8/* 10/*
9 * Note on how mapped kernels work: the text and data section is 11 * Note on how mapped kernels work: the text and data section is
10 * compiled at cksseg segment (LOADADDR = 0xc001c000), and the 12 * compiled at cksseg segment (LOADADDR = 0xc001c000), and the
@@ -29,10 +31,8 @@
29#define MAPPED_ADDR_RO_TO_PHYS(x) (x - REP_BASE) 31#define MAPPED_ADDR_RO_TO_PHYS(x) (x - REP_BASE)
30#define MAPPED_ADDR_RW_TO_PHYS(x) (x - REP_BASE - 16777216) 32#define MAPPED_ADDR_RW_TO_PHYS(x) (x - REP_BASE - 16777216)
31 33
32#define MAPPED_KERN_RO_PHYSBASE(n) \ 34#define MAPPED_KERN_RO_PHYSBASE(n) (hub_data(n)->kern_vars.kv_ro_baseaddr)
33 (PLAT_NODE_DATA(n)->kern_vars.kv_ro_baseaddr) 35#define MAPPED_KERN_RW_PHYSBASE(n) (hub_data(n)->kern_vars.kv_rw_baseaddr)
34#define MAPPED_KERN_RW_PHYSBASE(n) \
35 (PLAT_NODE_DATA(n)->kern_vars.kv_rw_baseaddr)
36 36
37#define MAPPED_KERN_RO_TO_PHYS(x) \ 37#define MAPPED_KERN_RO_TO_PHYS(x) \
38 ((unsigned long)MAPPED_ADDR_RO_TO_PHYS(x) | \ 38 ((unsigned long)MAPPED_ADDR_RO_TO_PHYS(x) | \
diff --git a/include/asm-mips/stackframe.h b/include/asm-mips/stackframe.h
index 051e1af0bb95..4c37c4e5f72e 100644
--- a/include/asm-mips/stackframe.h
+++ b/include/asm-mips/stackframe.h
@@ -297,14 +297,31 @@
297#ifdef CONFIG_MIPS_MT_SMTC 297#ifdef CONFIG_MIPS_MT_SMTC
298 .set mips32r2 298 .set mips32r2
299 /* 299 /*
300 * This may not really be necessary if ints are already 300 * We need to make sure the read-modify-write
301 * inhibited here. 301 * of Status below isn't perturbed by an interrupt
302 * or cross-TC access, so we need to do at least a DMT,
303 * protected by an interrupt-inhibit. But setting IXMT
304 * also creates a few-cycle window where an IPI could
305 * be queued and not be detected before potentially
306 * returning to a WAIT or user-mode loop. It must be
307 * replayed.
308 *
309 * We're in the middle of a context switch, and
310 * we can't dispatch it directly without trashing
311 * some registers, so we'll try to detect this unlikely
312 * case and program a software interrupt in the VPE,
313 * as would be done for a cross-VPE IPI. To accomodate
314 * the handling of that case, we're doing a DVPE instead
315 * of just a DMT here to protect against other threads.
316 * This is a lot of cruft to cover a tiny window.
317 * If you can find a better design, implement it!
318 *
302 */ 319 */
303 mfc0 v0, CP0_TCSTATUS 320 mfc0 v0, CP0_TCSTATUS
304 ori v0, TCSTATUS_IXMT 321 ori v0, TCSTATUS_IXMT
305 mtc0 v0, CP0_TCSTATUS 322 mtc0 v0, CP0_TCSTATUS
306 _ehb 323 _ehb
307 DMT 5 # dmt a1 324 DVPE 5 # dvpe a1
308 jal mips_ihb 325 jal mips_ihb
309#endif /* CONFIG_MIPS_MT_SMTC */ 326#endif /* CONFIG_MIPS_MT_SMTC */
310 mfc0 a0, CP0_STATUS 327 mfc0 a0, CP0_STATUS
@@ -325,17 +342,50 @@
325 */ 342 */
326 LONG_L v1, PT_TCSTATUS(sp) 343 LONG_L v1, PT_TCSTATUS(sp)
327 _ehb 344 _ehb
328 mfc0 v0, CP0_TCSTATUS 345 mfc0 a0, CP0_TCSTATUS
329 andi v1, TCSTATUS_IXMT 346 andi v1, TCSTATUS_IXMT
330 /* We know that TCStatua.IXMT should be set from above */ 347 bnez v1, 0f
331 xori v0, v0, TCSTATUS_IXMT 348
332 or v0, v0, v1 349/*
333 mtc0 v0, CP0_TCSTATUS 350 * We'd like to detect any IPIs queued in the tiny window
334 _ehb 351 * above and request an software interrupt to service them
335 andi a1, a1, VPECONTROL_TE 352 * when we ERET.
353 *
354 * Computing the offset into the IPIQ array of the executing
355 * TC's IPI queue in-line would be tedious. We use part of
356 * the TCContext register to hold 16 bits of offset that we
357 * can add in-line to find the queue head.
358 */
359 mfc0 v0, CP0_TCCONTEXT
360 la a2, IPIQ
361 srl v0, v0, 16
362 addu a2, a2, v0
363 LONG_L v0, 0(a2)
364 beqz v0, 0f
365/*
366 * If we have a queue, provoke dispatch within the VPE by setting C_SW1
367 */
368 mfc0 v0, CP0_CAUSE
369 ori v0, v0, C_SW1
370 mtc0 v0, CP0_CAUSE
3710:
372 /*
373 * This test should really never branch but
374 * let's be prudent here. Having atomized
375 * the shared register modifications, we can
376 * now EVPE, and must do so before interrupts
377 * are potentially re-enabled.
378 */
379 andi a1, a1, MVPCONTROL_EVP
336 beqz a1, 1f 380 beqz a1, 1f
337 emt 381 evpe
3381: 3821:
383 /* We know that TCStatua.IXMT should be set from above */
384 xori a0, a0, TCSTATUS_IXMT
385 or a0, a0, v1
386 mtc0 a0, CP0_TCSTATUS
387 _ehb
388
339 .set mips0 389 .set mips0
340#endif /* CONFIG_MIPS_MT_SMTC */ 390#endif /* CONFIG_MIPS_MT_SMTC */
341 LONG_L v1, PT_EPC(sp) 391 LONG_L v1, PT_EPC(sp)
diff --git a/include/asm-x86/acpi.h b/include/asm-x86/acpi.h
index 635d764dc13e..35d1743b57ac 100644
--- a/include/asm-x86/acpi.h
+++ b/include/asm-x86/acpi.h
@@ -140,6 +140,8 @@ static inline unsigned int acpi_processor_cstate_check(unsigned int max_cstate)
140 boot_cpu_data.x86_model <= 0x05 && 140 boot_cpu_data.x86_model <= 0x05 &&
141 boot_cpu_data.x86_mask < 0x0A) 141 boot_cpu_data.x86_mask < 0x0A)
142 return 1; 142 return 1;
143 else if (boot_cpu_has(X86_FEATURE_AMDC1E))
144 return 1;
143 else 145 else
144 return max_cstate; 146 return max_cstate;
145} 147}
diff --git a/include/asm-x86/cpufeature.h b/include/asm-x86/cpufeature.h
index 9489283a4bcf..cfcfb0a806ba 100644
--- a/include/asm-x86/cpufeature.h
+++ b/include/asm-x86/cpufeature.h
@@ -81,6 +81,7 @@
81#define X86_FEATURE_LFENCE_RDTSC (3*32+18) /* Lfence synchronizes RDTSC */ 81#define X86_FEATURE_LFENCE_RDTSC (3*32+18) /* Lfence synchronizes RDTSC */
82#define X86_FEATURE_11AP (3*32+19) /* Bad local APIC aka 11AP */ 82#define X86_FEATURE_11AP (3*32+19) /* Bad local APIC aka 11AP */
83#define X86_FEATURE_NOPL (3*32+20) /* The NOPL (0F 1F) instructions */ 83#define X86_FEATURE_NOPL (3*32+20) /* The NOPL (0F 1F) instructions */
84#define X86_FEATURE_AMDC1E (3*32+21) /* AMD C1E detected */
84 85
85/* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */ 86/* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */
86#define X86_FEATURE_XMM3 (4*32+ 0) /* Streaming SIMD Extensions-3 */ 87#define X86_FEATURE_XMM3 (4*32+ 0) /* Streaming SIMD Extensions-3 */
diff --git a/include/asm-x86/idle.h b/include/asm-x86/idle.h
index d240e5b30a45..cbb649123612 100644
--- a/include/asm-x86/idle.h
+++ b/include/asm-x86/idle.h
@@ -10,4 +10,6 @@ void idle_notifier_register(struct notifier_block *n);
10void enter_idle(void); 10void enter_idle(void);
11void exit_idle(void); 11void exit_idle(void);
12 12
13void c1e_remove_cpu(int cpu);
14
13#endif 15#endif
diff --git a/include/asm-x86/kgdb.h b/include/asm-x86/kgdb.h
index 484c47554f3b..94d63db10365 100644
--- a/include/asm-x86/kgdb.h
+++ b/include/asm-x86/kgdb.h
@@ -39,12 +39,13 @@ enum regnames {
39 GDB_FS, /* 14 */ 39 GDB_FS, /* 14 */
40 GDB_GS, /* 15 */ 40 GDB_GS, /* 15 */
41}; 41};
42#define NUMREGBYTES ((GDB_GS+1)*4)
42#else /* ! CONFIG_X86_32 */ 43#else /* ! CONFIG_X86_32 */
43enum regnames { 44enum regnames64 {
44 GDB_AX, /* 0 */ 45 GDB_AX, /* 0 */
45 GDB_DX, /* 1 */ 46 GDB_BX, /* 1 */
46 GDB_CX, /* 2 */ 47 GDB_CX, /* 2 */
47 GDB_BX, /* 3 */ 48 GDB_DX, /* 3 */
48 GDB_SI, /* 4 */ 49 GDB_SI, /* 4 */
49 GDB_DI, /* 5 */ 50 GDB_DI, /* 5 */
50 GDB_BP, /* 6 */ 51 GDB_BP, /* 6 */
@@ -58,18 +59,15 @@ enum regnames {
58 GDB_R14, /* 14 */ 59 GDB_R14, /* 14 */
59 GDB_R15, /* 15 */ 60 GDB_R15, /* 15 */
60 GDB_PC, /* 16 */ 61 GDB_PC, /* 16 */
61 GDB_PS, /* 17 */
62}; 62};
63#endif /* CONFIG_X86_32 */
64 63
65/* 64enum regnames32 {
66 * Number of bytes of registers: 65 GDB_PS = 34,
67 */ 66 GDB_CS,
68#ifdef CONFIG_X86_32 67 GDB_SS,
69# define NUMREGBYTES 64 68};
70#else 69#define NUMREGBYTES ((GDB_SS+1)*4)
71# define NUMREGBYTES ((GDB_PS+1)*8) 70#endif /* CONFIG_X86_32 */
72#endif
73 71
74static inline void arch_kgdb_breakpoint(void) 72static inline void arch_kgdb_breakpoint(void)
75{ 73{
diff --git a/include/asm-x86/uaccess_64.h b/include/asm-x86/uaccess_64.h
index 515d4dce96b5..45806d60bcbe 100644
--- a/include/asm-x86/uaccess_64.h
+++ b/include/asm-x86/uaccess_64.h
@@ -7,6 +7,7 @@
7#include <linux/compiler.h> 7#include <linux/compiler.h>
8#include <linux/errno.h> 8#include <linux/errno.h>
9#include <linux/prefetch.h> 9#include <linux/prefetch.h>
10#include <linux/lockdep.h>
10#include <asm/page.h> 11#include <asm/page.h>
11 12
12/* 13/*
diff --git a/include/linux/cnt32_to_63.h b/include/linux/cnt32_to_63.h
new file mode 100644
index 000000000000..8c0f9505b48c
--- /dev/null
+++ b/include/linux/cnt32_to_63.h
@@ -0,0 +1,80 @@
1/*
2 * Extend a 32-bit counter to 63 bits
3 *
4 * Author: Nicolas Pitre
5 * Created: December 3, 2006
6 * Copyright: MontaVista Software, Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2
10 * as published by the Free Software Foundation.
11 */
12
13#ifndef __LINUX_CNT32_TO_63_H__
14#define __LINUX_CNT32_TO_63_H__
15
16#include <linux/compiler.h>
17#include <linux/types.h>
18#include <asm/byteorder.h>
19
20/* this is used only to give gcc a clue about good code generation */
21union cnt32_to_63 {
22 struct {
23#if defined(__LITTLE_ENDIAN)
24 u32 lo, hi;
25#elif defined(__BIG_ENDIAN)
26 u32 hi, lo;
27#endif
28 };
29 u64 val;
30};
31
32
33/**
34 * cnt32_to_63 - Expand a 32-bit counter to a 63-bit counter
35 * @cnt_lo: The low part of the counter
36 *
37 * Many hardware clock counters are only 32 bits wide and therefore have
38 * a relatively short period making wrap-arounds rather frequent. This
39 * is a problem when implementing sched_clock() for example, where a 64-bit
40 * non-wrapping monotonic value is expected to be returned.
41 *
42 * To overcome that limitation, let's extend a 32-bit counter to 63 bits
43 * in a completely lock free fashion. Bits 0 to 31 of the clock are provided
44 * by the hardware while bits 32 to 62 are stored in memory. The top bit in
45 * memory is used to synchronize with the hardware clock half-period. When
46 * the top bit of both counters (hardware and in memory) differ then the
47 * memory is updated with a new value, incrementing it when the hardware
48 * counter wraps around.
49 *
50 * Because a word store in memory is atomic then the incremented value will
51 * always be in synch with the top bit indicating to any potential concurrent
52 * reader if the value in memory is up to date or not with regards to the
53 * needed increment. And any race in updating the value in memory is harmless
54 * as the same value would simply be stored more than once.
55 *
56 * The only restriction for the algorithm to work properly is that this
57 * code must be executed at least once per each half period of the 32-bit
58 * counter to properly update the state bit in memory. This is usually not a
59 * problem in practice, but if it is then a kernel timer could be scheduled
60 * to manage for this code to be executed often enough.
61 *
62 * Note that the top bit (bit 63) in the returned value should be considered
63 * as garbage. It is not cleared here because callers are likely to use a
64 * multiplier on the returned value which can get rid of the top bit
65 * implicitly by making the multiplier even, therefore saving on a runtime
66 * clear-bit instruction. Otherwise caller must remember to clear the top
67 * bit explicitly.
68 */
69#define cnt32_to_63(cnt_lo) \
70({ \
71 static volatile u32 __m_cnt_hi; \
72 union cnt32_to_63 __x; \
73 __x.hi = __m_cnt_hi; \
74 __x.lo = (cnt_lo); \
75 if (unlikely((s32)(__x.hi ^ __x.lo) < 0)) \
76 __m_cnt_hi = __x.hi = (__x.hi ^ 0x80000000) + (__x.hi >> 31); \
77 __x.val; \
78})
79
80#endif
diff --git a/include/linux/hrtimer.h b/include/linux/hrtimer.h
index 6d93dce61cbb..2f245fe63bda 100644
--- a/include/linux/hrtimer.h
+++ b/include/linux/hrtimer.h
@@ -47,14 +47,22 @@ enum hrtimer_restart {
47 * HRTIMER_CB_IRQSAFE: Callback may run in hardirq context 47 * HRTIMER_CB_IRQSAFE: Callback may run in hardirq context
48 * HRTIMER_CB_IRQSAFE_NO_RESTART: Callback may run in hardirq context and 48 * HRTIMER_CB_IRQSAFE_NO_RESTART: Callback may run in hardirq context and
49 * does not restart the timer 49 * does not restart the timer
50 * HRTIMER_CB_IRQSAFE_NO_SOFTIRQ: Callback must run in hardirq context 50 * HRTIMER_CB_IRQSAFE_PERCPU: Callback must run in hardirq context
51 * Special mode for tick emultation 51 * Special mode for tick emulation and
52 * scheduler timer. Such timers are per
53 * cpu and not allowed to be migrated on
54 * cpu unplug.
55 * HRTIMER_CB_IRQSAFE_UNLOCKED: Callback should run in hardirq context
56 * with timer->base lock unlocked
57 * used for timers which call wakeup to
58 * avoid lock order problems with rq->lock
52 */ 59 */
53enum hrtimer_cb_mode { 60enum hrtimer_cb_mode {
54 HRTIMER_CB_SOFTIRQ, 61 HRTIMER_CB_SOFTIRQ,
55 HRTIMER_CB_IRQSAFE, 62 HRTIMER_CB_IRQSAFE,
56 HRTIMER_CB_IRQSAFE_NO_RESTART, 63 HRTIMER_CB_IRQSAFE_NO_RESTART,
57 HRTIMER_CB_IRQSAFE_NO_SOFTIRQ, 64 HRTIMER_CB_IRQSAFE_PERCPU,
65 HRTIMER_CB_IRQSAFE_UNLOCKED,
58}; 66};
59 67
60/* 68/*
@@ -67,9 +75,10 @@ enum hrtimer_cb_mode {
67 * 0x02 callback function running 75 * 0x02 callback function running
68 * 0x04 callback pending (high resolution mode) 76 * 0x04 callback pending (high resolution mode)
69 * 77 *
70 * Special case: 78 * Special cases:
71 * 0x03 callback function running and enqueued 79 * 0x03 callback function running and enqueued
72 * (was requeued on another CPU) 80 * (was requeued on another CPU)
81 * 0x09 timer was migrated on CPU hotunplug
73 * The "callback function running and enqueued" status is only possible on 82 * The "callback function running and enqueued" status is only possible on
74 * SMP. It happens for example when a posix timer expired and the callback 83 * SMP. It happens for example when a posix timer expired and the callback
75 * queued a signal. Between dropping the lock which protects the posix timer 84 * queued a signal. Between dropping the lock which protects the posix timer
@@ -87,6 +96,7 @@ enum hrtimer_cb_mode {
87#define HRTIMER_STATE_ENQUEUED 0x01 96#define HRTIMER_STATE_ENQUEUED 0x01
88#define HRTIMER_STATE_CALLBACK 0x02 97#define HRTIMER_STATE_CALLBACK 0x02
89#define HRTIMER_STATE_PENDING 0x04 98#define HRTIMER_STATE_PENDING 0x04
99#define HRTIMER_STATE_MIGRATE 0x08
90 100
91/** 101/**
92 * struct hrtimer - the basic hrtimer structure 102 * struct hrtimer - the basic hrtimer structure
diff --git a/include/linux/ide.h b/include/linux/ide.h
index 1524829f73f2..6514db8fd2e4 100644
--- a/include/linux/ide.h
+++ b/include/linux/ide.h
@@ -366,7 +366,9 @@ enum {
366 /* Currently on a filemark */ 366 /* Currently on a filemark */
367 IDE_AFLAG_FILEMARK = (1 << 25), 367 IDE_AFLAG_FILEMARK = (1 << 25),
368 /* 0 = no tape is loaded, so we don't rewind after ejecting */ 368 /* 0 = no tape is loaded, so we don't rewind after ejecting */
369 IDE_AFLAG_MEDIUM_PRESENT = (1 << 26) 369 IDE_AFLAG_MEDIUM_PRESENT = (1 << 26),
370
371 IDE_AFLAG_NO_AUTOCLOSE = (1 << 27),
370}; 372};
371 373
372struct ide_drive_s { 374struct ide_drive_s {
diff --git a/include/linux/mlx4/device.h b/include/linux/mlx4/device.h
index 655ea0d1ee14..b2f944468313 100644
--- a/include/linux/mlx4/device.h
+++ b/include/linux/mlx4/device.h
@@ -141,6 +141,10 @@ enum {
141 MLX4_STAT_RATE_OFFSET = 5 141 MLX4_STAT_RATE_OFFSET = 5
142}; 142};
143 143
144enum {
145 MLX4_MTT_FLAG_PRESENT = 1
146};
147
144static inline u64 mlx4_fw_ver(u64 major, u64 minor, u64 subminor) 148static inline u64 mlx4_fw_ver(u64 major, u64 minor, u64 subminor)
145{ 149{
146 return (major << 32) | (minor << 16) | subminor; 150 return (major << 32) | (minor << 16) | subminor;
diff --git a/include/linux/pci.h b/include/linux/pci.h
index c0e14008a3c2..98dc6243a706 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -534,7 +534,7 @@ extern void pci_sort_breadthfirst(void);
534#ifdef CONFIG_PCI_LEGACY 534#ifdef CONFIG_PCI_LEGACY
535struct pci_dev __deprecated *pci_find_device(unsigned int vendor, 535struct pci_dev __deprecated *pci_find_device(unsigned int vendor,
536 unsigned int device, 536 unsigned int device,
537 const struct pci_dev *from); 537 struct pci_dev *from);
538struct pci_dev __deprecated *pci_find_slot(unsigned int bus, 538struct pci_dev __deprecated *pci_find_slot(unsigned int bus,
539 unsigned int devfn); 539 unsigned int devfn);
540#endif /* CONFIG_PCI_LEGACY */ 540#endif /* CONFIG_PCI_LEGACY */
@@ -550,7 +550,7 @@ struct pci_dev *pci_get_device(unsigned int vendor, unsigned int device,
550 struct pci_dev *from); 550 struct pci_dev *from);
551struct pci_dev *pci_get_subsys(unsigned int vendor, unsigned int device, 551struct pci_dev *pci_get_subsys(unsigned int vendor, unsigned int device,
552 unsigned int ss_vendor, unsigned int ss_device, 552 unsigned int ss_vendor, unsigned int ss_device,
553 const struct pci_dev *from); 553 struct pci_dev *from);
554struct pci_dev *pci_get_slot(struct pci_bus *bus, unsigned int devfn); 554struct pci_dev *pci_get_slot(struct pci_bus *bus, unsigned int devfn);
555struct pci_dev *pci_get_bus_and_slot(unsigned int bus, unsigned int devfn); 555struct pci_dev *pci_get_bus_and_slot(unsigned int bus, unsigned int devfn);
556struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *from); 556struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *from);
@@ -816,7 +816,7 @@ _PCI_NOP_ALL(write,)
816 816
817static inline struct pci_dev *pci_find_device(unsigned int vendor, 817static inline struct pci_dev *pci_find_device(unsigned int vendor,
818 unsigned int device, 818 unsigned int device,
819 const struct pci_dev *from) 819 struct pci_dev *from)
820{ 820{
821 return NULL; 821 return NULL;
822} 822}
@@ -838,7 +838,7 @@ static inline struct pci_dev *pci_get_subsys(unsigned int vendor,
838 unsigned int device, 838 unsigned int device,
839 unsigned int ss_vendor, 839 unsigned int ss_vendor,
840 unsigned int ss_device, 840 unsigned int ss_device,
841 const struct pci_dev *from) 841 struct pci_dev *from)
842{ 842{
843 return NULL; 843 return NULL;
844} 844}
diff --git a/include/linux/ramfs.h b/include/linux/ramfs.h
index b160fb18e8d6..37aaf2b39863 100644
--- a/include/linux/ramfs.h
+++ b/include/linux/ramfs.h
@@ -6,6 +6,7 @@ extern int ramfs_get_sb(struct file_system_type *fs_type,
6 int flags, const char *dev_name, void *data, struct vfsmount *mnt); 6 int flags, const char *dev_name, void *data, struct vfsmount *mnt);
7 7
8#ifndef CONFIG_MMU 8#ifndef CONFIG_MMU
9extern int ramfs_nommu_expand_for_mapping(struct inode *inode, size_t newsize);
9extern unsigned long ramfs_nommu_get_unmapped_area(struct file *file, 10extern unsigned long ramfs_nommu_get_unmapped_area(struct file *file,
10 unsigned long addr, 11 unsigned long addr,
11 unsigned long len, 12 unsigned long len,
diff --git a/include/linux/smb.h b/include/linux/smb.h
index caa43b2370cb..82fefddc5987 100644
--- a/include/linux/smb.h
+++ b/include/linux/smb.h
@@ -11,7 +11,9 @@
11 11
12#include <linux/types.h> 12#include <linux/types.h>
13#include <linux/magic.h> 13#include <linux/magic.h>
14#ifdef __KERNEL__
14#include <linux/time.h> 15#include <linux/time.h>
16#endif
15 17
16enum smb_protocol { 18enum smb_protocol {
17 SMB_PROTOCOL_NONE, 19 SMB_PROTOCOL_NONE,
diff --git a/include/linux/stacktrace.h b/include/linux/stacktrace.h
index 5da9794b2d78..b106fd8e0d5c 100644
--- a/include/linux/stacktrace.h
+++ b/include/linux/stacktrace.h
@@ -1,6 +1,8 @@
1#ifndef __LINUX_STACKTRACE_H 1#ifndef __LINUX_STACKTRACE_H
2#define __LINUX_STACKTRACE_H 2#define __LINUX_STACKTRACE_H
3 3
4struct task_struct;
5
4#ifdef CONFIG_STACKTRACE 6#ifdef CONFIG_STACKTRACE
5struct stack_trace { 7struct stack_trace {
6 unsigned int nr_entries, max_entries; 8 unsigned int nr_entries, max_entries;
diff --git a/include/net/9p/9p.h b/include/net/9p/9p.h
index b3d3e27c6299..c3626c0ba9d3 100644
--- a/include/net/9p/9p.h
+++ b/include/net/9p/9p.h
@@ -596,4 +596,5 @@ int p9_idpool_check(int id, struct p9_idpool *p);
596int p9_error_init(void); 596int p9_error_init(void);
597int p9_errstr2errno(char *, int); 597int p9_errstr2errno(char *, int);
598int p9_trans_fd_init(void); 598int p9_trans_fd_init(void);
599void p9_trans_fd_exit(void);
599#endif /* NET_9P_H */ 600#endif /* NET_9P_H */
diff --git a/include/net/9p/transport.h b/include/net/9p/transport.h
index 0db3a4038dc0..3ca737120a90 100644
--- a/include/net/9p/transport.h
+++ b/include/net/9p/transport.h
@@ -26,6 +26,8 @@
26#ifndef NET_9P_TRANSPORT_H 26#ifndef NET_9P_TRANSPORT_H
27#define NET_9P_TRANSPORT_H 27#define NET_9P_TRANSPORT_H
28 28
29#include <linux/module.h>
30
29/** 31/**
30 * enum p9_trans_status - different states of underlying transports 32 * enum p9_trans_status - different states of underlying transports
31 * @Connected: transport is connected and healthy 33 * @Connected: transport is connected and healthy
@@ -91,9 +93,12 @@ struct p9_trans_module {
91 int maxsize; /* max message size of transport */ 93 int maxsize; /* max message size of transport */
92 int def; /* this transport should be default */ 94 int def; /* this transport should be default */
93 struct p9_trans * (*create)(const char *, char *, int, unsigned char); 95 struct p9_trans * (*create)(const char *, char *, int, unsigned char);
96 struct module *owner;
94}; 97};
95 98
96void v9fs_register_trans(struct p9_trans_module *m); 99void v9fs_register_trans(struct p9_trans_module *m);
97struct p9_trans_module *v9fs_match_trans(const substring_t *name); 100void v9fs_unregister_trans(struct p9_trans_module *m);
98struct p9_trans_module *v9fs_default_trans(void); 101struct p9_trans_module *v9fs_get_trans_by_name(const substring_t *name);
102struct p9_trans_module *v9fs_get_default_trans(void);
103void v9fs_put_trans(struct p9_trans_module *m);
99#endif /* NET_9P_TRANSPORT_H */ 104#endif /* NET_9P_TRANSPORT_H */
diff --git a/include/net/sctp/sm.h b/include/net/sctp/sm.h
index 24811732bdb2..029a54a02396 100644
--- a/include/net/sctp/sm.h
+++ b/include/net/sctp/sm.h
@@ -227,6 +227,9 @@ struct sctp_chunk *sctp_make_abort_violation(const struct sctp_association *,
227 const struct sctp_chunk *, 227 const struct sctp_chunk *,
228 const __u8 *, 228 const __u8 *,
229 const size_t ); 229 const size_t );
230struct sctp_chunk *sctp_make_violation_paramlen(const struct sctp_association *,
231 const struct sctp_chunk *,
232 struct sctp_paramhdr *);
230struct sctp_chunk *sctp_make_heartbeat(const struct sctp_association *, 233struct sctp_chunk *sctp_make_heartbeat(const struct sctp_association *,
231 const struct sctp_transport *, 234 const struct sctp_transport *,
232 const void *payload, 235 const void *payload,
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-03 01:51:10 -0500