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authorTroy Heber <troy.heber@hp.com>2006-10-25 16:46:15 -0400
committerTony Luck <tony.luck@intel.com>2006-10-31 17:32:10 -0500
commitfa1d19e5d9a94120f31e5783ab44758f46892d94 (patch)
treecb685f4b1cc31d633d04561ea9f31e40e43a3fc1 /include
parent264b0f99308436deaee38bab99e586612d012fc1 (diff)
[IA64] move SAL_CACHE_FLUSH check later in boot
The check to see if the firmware drops interrupts during a SAL_CACHE_FLUSH is done to early in the boot. SAL_CACHE_FLUSH expects to be able to make PAL calls in virtual mode, on some cell based machines a fault occurs causing a MCA. This patch moves the check after mmu_context_init so the TLB and VHPT are properly setup. Signed-off-by Troy Heber <troy.heber@hp.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'include')
-rw-r--r--include/asm-ia64/sal.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/asm-ia64/sal.h b/include/asm-ia64/sal.h
index 0b210abbe003..d000689d9142 100644
--- a/include/asm-ia64/sal.h
+++ b/include/asm-ia64/sal.h
@@ -659,6 +659,7 @@ ia64_sal_freq_base (unsigned long which, unsigned long *ticks_per_second,
659} 659}
660 660
661extern s64 ia64_sal_cache_flush (u64 cache_type); 661extern s64 ia64_sal_cache_flush (u64 cache_type);
662extern void __init check_sal_cache_flush (void);
662 663
663/* Initialize all the processor and platform level instruction and data caches */ 664/* Initialize all the processor and platform level instruction and data caches */
664static inline s64 665static inline s64