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authorDavid Brownell <david-b@pacbell.net>2007-07-17 07:04:03 -0400
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-07-17 13:23:04 -0400
commitc06e677aed0c86480b01faa894967daa8aa3568a (patch)
tree804eaf65f578d25309d546592ada439d168d19b0 /include
parentdccd573bb02aa011a4a7146c02c409ac0bd722a0 (diff)
SPI: add 3wire mode flag
Add a new spi->mode bit: SPI_3WIRE, for chips where the SI and SO signals are shared (and which are thus only half duplex). Update the LM70 driver to require support for that hardware mode from the controller. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'include')
-rw-r--r--include/linux/spi/spi.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h
index 1be5ea059477..302b81d1d117 100644
--- a/include/linux/spi/spi.h
+++ b/include/linux/spi/spi.h
@@ -76,6 +76,7 @@ struct spi_device {
76#define SPI_MODE_3 (SPI_CPOL|SPI_CPHA) 76#define SPI_MODE_3 (SPI_CPOL|SPI_CPHA)
77#define SPI_CS_HIGH 0x04 /* chipselect active high? */ 77#define SPI_CS_HIGH 0x04 /* chipselect active high? */
78#define SPI_LSB_FIRST 0x08 /* per-word bits-on-wire */ 78#define SPI_LSB_FIRST 0x08 /* per-word bits-on-wire */
79#define SPI_3WIRE 0x10 /* SI/SO signals shared */
79 u8 bits_per_word; 80 u8 bits_per_word;
80 int irq; 81 int irq;
81 void *controller_state; 82 void *controller_state;