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authorLinus Torvalds <torvalds@linux-foundation.org>2008-04-21 18:58:35 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2008-04-21 18:58:35 -0400
commitbda0c0afa7a694bb1459fd023515aca681e4d79a (patch)
treecd8b9d9811463de2065cbe79d59689082d6c53cf /include
parent904e0ab54b7591b9cb01cfc0dbbedcc8bc0d949b (diff)
parentaf40b485ea2d957ae2f237ab0e33539ae8f29562 (diff)
Merge git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/pci-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/pci-2.6: (42 commits) PCI: Change PCI subsystem MAINTAINER PCI: pci-iommu-iotlb-flushing-speedup PCI: pci_setup_bridge() mustn't be __devinit PCI: pci_bus_size_cardbus() mustn't be __devinit PCI: pci_scan_device() mustn't be __devinit PCI: pci_alloc_child_bus() mustn't be __devinit PCI: replace remaining __FUNCTION__ occurrences PCI: Hotplug: fakephp: Return success, not ENODEV, when bus rescan is triggered PCI: Hotplug: Fix leaks in IBM Hot Plug Controller Driver - ibmphp_init_devno() PCI: clean up resource alignment management PCI: aerdrv_acpi.c: remove unneeded NULL check PCI: Update VIA CX700 quirk PCI: Expose PCI VPD through sysfs PCI: iommu: iotlb flushing PCI: simplify quirk debug output PCI: iova RB tree setup tweak PCI: parisc: use generic pci_enable_resources() PCI: ppc: use generic pci_enable_resources() PCI: powerpc: use generic pci_enable_resources() PCI: ia64: use generic pci_enable_resources() ...
Diffstat (limited to 'include')
-rw-r--r--include/asm-sh/mpc1211/pci.h2
-rw-r--r--include/linux/aer.h5
-rw-r--r--include/linux/ioport.h5
-rw-r--r--include/linux/pci-aspm.h56
-rw-r--r--include/linux/pci.h30
-rw-r--r--include/linux/pci_regs.h8
6 files changed, 80 insertions, 26 deletions
diff --git a/include/asm-sh/mpc1211/pci.h b/include/asm-sh/mpc1211/pci.h
index 5d3712c3a701..d9162c5ed76a 100644
--- a/include/asm-sh/mpc1211/pci.h
+++ b/include/asm-sh/mpc1211/pci.h
@@ -24,8 +24,6 @@
24#define PCI_PROBE_BIOS 1 24#define PCI_PROBE_BIOS 1
25#define PCI_PROBE_CONF1 2 25#define PCI_PROBE_CONF1 2
26#define PCI_PROBE_CONF2 4 26#define PCI_PROBE_CONF2 4
27#define PCI_NO_SORT 0x100
28#define PCI_BIOS_SORT 0x200
29#define PCI_NO_CHECKS 0x400 27#define PCI_NO_CHECKS 0x400
30#define PCI_ASSIGN_ROMS 0x1000 28#define PCI_ASSIGN_ROMS 0x1000
31#define PCI_BIOS_IRQ_SCAN 0x2000 29#define PCI_BIOS_IRQ_SCAN 0x2000
diff --git a/include/linux/aer.h b/include/linux/aer.h
index bcf236d825e8..f2518141de88 100644
--- a/include/linux/aer.h
+++ b/include/linux/aer.h
@@ -13,7 +13,6 @@ extern int pci_enable_pcie_error_reporting(struct pci_dev *dev);
13extern int pci_find_aer_capability(struct pci_dev *dev); 13extern int pci_find_aer_capability(struct pci_dev *dev);
14extern int pci_disable_pcie_error_reporting(struct pci_dev *dev); 14extern int pci_disable_pcie_error_reporting(struct pci_dev *dev);
15extern int pci_cleanup_aer_uncorrect_error_status(struct pci_dev *dev); 15extern int pci_cleanup_aer_uncorrect_error_status(struct pci_dev *dev);
16extern int pci_cleanup_aer_correct_error_status(struct pci_dev *dev);
17#else 16#else
18static inline int pci_enable_pcie_error_reporting(struct pci_dev *dev) 17static inline int pci_enable_pcie_error_reporting(struct pci_dev *dev)
19{ 18{
@@ -31,10 +30,6 @@ static inline int pci_cleanup_aer_uncorrect_error_status(struct pci_dev *dev)
31{ 30{
32 return -EINVAL; 31 return -EINVAL;
33} 32}
34static inline int pci_cleanup_aer_correct_error_status(struct pci_dev *dev)
35{
36 return -EINVAL;
37}
38#endif 33#endif
39 34
40#endif //_AER_H_ 35#endif //_AER_H_
diff --git a/include/linux/ioport.h b/include/linux/ioport.h
index 605d237364d2..d5d40a9f7929 100644
--- a/include/linux/ioport.h
+++ b/include/linux/ioport.h
@@ -44,7 +44,9 @@ struct resource_list {
44#define IORESOURCE_CACHEABLE 0x00004000 44#define IORESOURCE_CACHEABLE 0x00004000
45#define IORESOURCE_RANGELENGTH 0x00008000 45#define IORESOURCE_RANGELENGTH 0x00008000
46#define IORESOURCE_SHADOWABLE 0x00010000 46#define IORESOURCE_SHADOWABLE 0x00010000
47#define IORESOURCE_BUS_HAS_VGA 0x00080000 47
48#define IORESOURCE_SIZEALIGN 0x00020000 /* size indicates alignment */
49#define IORESOURCE_STARTALIGN 0x00040000 /* start field is alignment */
48 50
49#define IORESOURCE_DISABLED 0x10000000 51#define IORESOURCE_DISABLED 0x10000000
50#define IORESOURCE_UNSET 0x20000000 52#define IORESOURCE_UNSET 0x20000000
@@ -110,6 +112,7 @@ extern int allocate_resource(struct resource *root, struct resource *new,
110 void *alignf_data); 112 void *alignf_data);
111int adjust_resource(struct resource *res, resource_size_t start, 113int adjust_resource(struct resource *res, resource_size_t start,
112 resource_size_t size); 114 resource_size_t size);
115resource_size_t resource_alignment(struct resource *res);
113 116
114/* Convenience shorthand with allocation */ 117/* Convenience shorthand with allocation */
115#define request_region(start,n,name) __request_region(&ioport_resource, (start), (n), (name)) 118#define request_region(start,n,name) __request_region(&ioport_resource, (start), (n), (name))
diff --git a/include/linux/pci-aspm.h b/include/linux/pci-aspm.h
new file mode 100644
index 000000000000..a1a1e618e996
--- /dev/null
+++ b/include/linux/pci-aspm.h
@@ -0,0 +1,56 @@
1/*
2 * aspm.h
3 *
4 * PCI Express ASPM defines and function prototypes
5 *
6 * Copyright (C) 2007 Intel Corp.
7 * Zhang Yanmin (yanmin.zhang@intel.com)
8 * Shaohua Li (shaohua.li@intel.com)
9 *
10 * For more information, please consult the following manuals (look at
11 * http://www.pcisig.com/ for how to get them):
12 *
13 * PCI Express Specification
14 */
15
16#ifndef LINUX_ASPM_H
17#define LINUX_ASPM_H
18
19#include <linux/pci.h>
20
21#define PCIE_LINK_STATE_L0S 1
22#define PCIE_LINK_STATE_L1 2
23#define PCIE_LINK_STATE_CLKPM 4
24
25#ifdef CONFIG_PCIEASPM
26extern void pcie_aspm_init_link_state(struct pci_dev *pdev);
27extern void pcie_aspm_exit_link_state(struct pci_dev *pdev);
28extern void pcie_aspm_pm_state_change(struct pci_dev *pdev);
29extern void pci_disable_link_state(struct pci_dev *pdev, int state);
30#else
31static inline void pcie_aspm_init_link_state(struct pci_dev *pdev)
32{
33}
34static inline void pcie_aspm_exit_link_state(struct pci_dev *pdev)
35{
36}
37static inline void pcie_aspm_pm_state_change(struct pci_dev *pdev)
38{
39}
40static inline void pci_disable_link_state(struct pci_dev *pdev, int state)
41{
42}
43#endif
44
45#ifdef CONFIG_PCIEASPM_DEBUG /* this depends on CONFIG_PCIEASPM */
46extern void pcie_aspm_create_sysfs_dev_files(struct pci_dev *pdev);
47extern void pcie_aspm_remove_sysfs_dev_files(struct pci_dev *pdev);
48#else
49static inline void pcie_aspm_create_sysfs_dev_files(struct pci_dev *pdev)
50{
51}
52static inline void pcie_aspm_remove_sysfs_dev_files(struct pci_dev *pdev)
53{
54}
55#endif
56#endif /* LINUX_ASPM_H */
diff --git a/include/linux/pci.h b/include/linux/pci.h
index ea760e519c46..292491324b01 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -20,6 +20,8 @@
20/* Include the pci register defines */ 20/* Include the pci register defines */
21#include <linux/pci_regs.h> 21#include <linux/pci_regs.h>
22 22
23struct pci_vpd;
24
23/* 25/*
24 * The PCI interface treats multi-function devices as independent 26 * The PCI interface treats multi-function devices as independent
25 * devices. The slot/function address of each device is encoded 27 * devices. The slot/function address of each device is encoded
@@ -128,11 +130,11 @@ struct pci_cap_saved_state {
128 u32 data[0]; 130 u32 data[0];
129}; 131};
130 132
133struct pcie_link_state;
131/* 134/*
132 * The pci_dev structure is used to describe PCI devices. 135 * The pci_dev structure is used to describe PCI devices.
133 */ 136 */
134struct pci_dev { 137struct pci_dev {
135 struct list_head global_list; /* node in list of all PCI devices */
136 struct list_head bus_list; /* node in per-bus list */ 138 struct list_head bus_list; /* node in per-bus list */
137 struct pci_bus *bus; /* bus this device is on */ 139 struct pci_bus *bus; /* bus this device is on */
138 struct pci_bus *subordinate; /* bus this device bridges to */ 140 struct pci_bus *subordinate; /* bus this device bridges to */
@@ -165,6 +167,10 @@ struct pci_dev {
165 this is D0-D3, D0 being fully functional, 167 this is D0-D3, D0 being fully functional,
166 and D3 being off. */ 168 and D3 being off. */
167 169
170#ifdef CONFIG_PCIEASPM
171 struct pcie_link_state *link_state; /* ASPM link state. */
172#endif
173
168 pci_channel_state_t error_state; /* current connectivity state */ 174 pci_channel_state_t error_state; /* current connectivity state */
169 struct device dev; /* Generic device interface */ 175 struct device dev; /* Generic device interface */
170 176
@@ -181,6 +187,7 @@ struct pci_dev {
181 unsigned int transparent:1; /* Transparent PCI bridge */ 187 unsigned int transparent:1; /* Transparent PCI bridge */
182 unsigned int multifunction:1;/* Part of multi-function device */ 188 unsigned int multifunction:1;/* Part of multi-function device */
183 /* keep track of device state */ 189 /* keep track of device state */
190 unsigned int is_added:1;
184 unsigned int is_busmaster:1; /* device is busmaster */ 191 unsigned int is_busmaster:1; /* device is busmaster */
185 unsigned int no_msi:1; /* device may not use msi */ 192 unsigned int no_msi:1; /* device may not use msi */
186 unsigned int no_d1d2:1; /* only allow d0 or d3 */ 193 unsigned int no_d1d2:1; /* only allow d0 or d3 */
@@ -201,11 +208,11 @@ struct pci_dev {
201#ifdef CONFIG_PCI_MSI 208#ifdef CONFIG_PCI_MSI
202 struct list_head msi_list; 209 struct list_head msi_list;
203#endif 210#endif
211 struct pci_vpd *vpd;
204}; 212};
205 213
206extern struct pci_dev *alloc_pci_dev(void); 214extern struct pci_dev *alloc_pci_dev(void);
207 215
208#define pci_dev_g(n) list_entry(n, struct pci_dev, global_list)
209#define pci_dev_b(n) list_entry(n, struct pci_dev, bus_list) 216#define pci_dev_b(n) list_entry(n, struct pci_dev, bus_list)
210#define to_pci_dev(n) container_of(n, struct pci_dev, dev) 217#define to_pci_dev(n) container_of(n, struct pci_dev, dev)
211#define for_each_pci_dev(d) while ((d = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, d)) != NULL) 218#define for_each_pci_dev(d) while ((d = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, d)) != NULL)
@@ -449,7 +456,6 @@ extern struct bus_type pci_bus_type;
449/* Do NOT directly access these two variables, unless you are arch specific pci 456/* Do NOT directly access these two variables, unless you are arch specific pci
450 * code, or pci core code. */ 457 * code, or pci core code. */
451extern struct list_head pci_root_buses; /* list of all known PCI buses */ 458extern struct list_head pci_root_buses; /* list of all known PCI buses */
452extern struct list_head pci_devices; /* list of all devices */
453/* Some device drivers need know if pci is initiated */ 459/* Some device drivers need know if pci is initiated */
454extern int no_pci_devices(void); 460extern int no_pci_devices(void);
455 461
@@ -517,17 +523,13 @@ struct pci_bus *pci_find_next_bus(const struct pci_bus *from);
517 523
518struct pci_dev *pci_get_device(unsigned int vendor, unsigned int device, 524struct pci_dev *pci_get_device(unsigned int vendor, unsigned int device,
519 struct pci_dev *from); 525 struct pci_dev *from);
520struct pci_dev *pci_get_device_reverse(unsigned int vendor, unsigned int device,
521 struct pci_dev *from);
522
523struct pci_dev *pci_get_subsys(unsigned int vendor, unsigned int device, 526struct pci_dev *pci_get_subsys(unsigned int vendor, unsigned int device,
524 unsigned int ss_vendor, unsigned int ss_device, 527 unsigned int ss_vendor, unsigned int ss_device,
525 struct pci_dev *from); 528 const struct pci_dev *from);
526struct pci_dev *pci_get_slot(struct pci_bus *bus, unsigned int devfn); 529struct pci_dev *pci_get_slot(struct pci_bus *bus, unsigned int devfn);
527struct pci_dev *pci_get_bus_and_slot(unsigned int bus, unsigned int devfn); 530struct pci_dev *pci_get_bus_and_slot(unsigned int bus, unsigned int devfn);
528struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *from); 531struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *from);
529int pci_dev_present(const struct pci_device_id *ids); 532int pci_dev_present(const struct pci_device_id *ids);
530const struct pci_device_id *pci_find_present(const struct pci_device_id *ids);
531 533
532int pci_bus_read_config_byte(struct pci_bus *bus, unsigned int devfn, 534int pci_bus_read_config_byte(struct pci_bus *bus, unsigned int devfn,
533 int where, u8 *val); 535 int where, u8 *val);
@@ -601,7 +603,6 @@ int pcie_get_readrq(struct pci_dev *dev);
601int pcie_set_readrq(struct pci_dev *dev, int rq); 603int pcie_set_readrq(struct pci_dev *dev, int rq);
602void pci_update_resource(struct pci_dev *dev, struct resource *res, int resno); 604void pci_update_resource(struct pci_dev *dev, struct resource *res, int resno);
603int __must_check pci_assign_resource(struct pci_dev *dev, int i); 605int __must_check pci_assign_resource(struct pci_dev *dev, int i);
604int __must_check pci_assign_resource_fixed(struct pci_dev *dev, int i);
605int pci_select_bars(struct pci_dev *dev, unsigned long flags); 606int pci_select_bars(struct pci_dev *dev, unsigned long flags);
606 607
607/* ROM control related routines */ 608/* ROM control related routines */
@@ -626,6 +627,7 @@ int pci_claim_resource(struct pci_dev *, int);
626void pci_assign_unassigned_resources(void); 627void pci_assign_unassigned_resources(void);
627void pdev_enable_device(struct pci_dev *); 628void pdev_enable_device(struct pci_dev *);
628void pdev_sort_resources(struct pci_dev *, struct resource_list *); 629void pdev_sort_resources(struct pci_dev *, struct resource_list *);
630int pci_enable_resources(struct pci_dev *, int mask);
629void pci_fixup_irqs(u8 (*)(struct pci_dev *, u8 *), 631void pci_fixup_irqs(u8 (*)(struct pci_dev *, u8 *),
630 int (*)(struct pci_dev *, u8, u8)); 632 int (*)(struct pci_dev *, u8, u8));
631#define HAVE_PCI_REQ_REGIONS 2 633#define HAVE_PCI_REQ_REGIONS 2
@@ -793,18 +795,11 @@ static inline struct pci_dev *pci_get_device(unsigned int vendor,
793 return NULL; 795 return NULL;
794} 796}
795 797
796static inline struct pci_dev *pci_get_device_reverse(unsigned int vendor,
797 unsigned int device,
798 struct pci_dev *from)
799{
800 return NULL;
801}
802
803static inline struct pci_dev *pci_get_subsys(unsigned int vendor, 798static inline struct pci_dev *pci_get_subsys(unsigned int vendor,
804 unsigned int device, 799 unsigned int device,
805 unsigned int ss_vendor, 800 unsigned int ss_vendor,
806 unsigned int ss_device, 801 unsigned int ss_device,
807 struct pci_dev *from) 802 const struct pci_dev *from)
808{ 803{
809 return NULL; 804 return NULL;
810} 805}
@@ -817,7 +812,6 @@ static inline struct pci_dev *pci_get_class(unsigned int class,
817 812
818#define pci_dev_present(ids) (0) 813#define pci_dev_present(ids) (0)
819#define no_pci_devices() (1) 814#define no_pci_devices() (1)
820#define pci_find_present(ids) (NULL)
821#define pci_dev_put(dev) do { } while (0) 815#define pci_dev_put(dev) do { } while (0)
822 816
823static inline void pci_set_master(struct pci_dev *dev) 817static inline void pci_set_master(struct pci_dev *dev)
diff --git a/include/linux/pci_regs.h b/include/linux/pci_regs.h
index c1914a8b94a9..c0c1223c9194 100644
--- a/include/linux/pci_regs.h
+++ b/include/linux/pci_regs.h
@@ -395,9 +395,17 @@
395#define PCI_EXP_DEVSTA_AUXPD 0x10 /* AUX Power Detected */ 395#define PCI_EXP_DEVSTA_AUXPD 0x10 /* AUX Power Detected */
396#define PCI_EXP_DEVSTA_TRPND 0x20 /* Transactions Pending */ 396#define PCI_EXP_DEVSTA_TRPND 0x20 /* Transactions Pending */
397#define PCI_EXP_LNKCAP 12 /* Link Capabilities */ 397#define PCI_EXP_LNKCAP 12 /* Link Capabilities */
398#define PCI_EXP_LNKCAP_ASPMS 0xc00 /* ASPM Support */
399#define PCI_EXP_LNKCAP_L0SEL 0x7000 /* L0s Exit Latency */
400#define PCI_EXP_LNKCAP_L1EL 0x38000 /* L1 Exit Latency */
401#define PCI_EXP_LNKCAP_CLKPM 0x40000 /* L1 Clock Power Management */
398#define PCI_EXP_LNKCTL 16 /* Link Control */ 402#define PCI_EXP_LNKCTL 16 /* Link Control */
403#define PCI_EXP_LNKCTL_RL 0x20 /* Retrain Link */
404#define PCI_EXP_LNKCTL_CCC 0x40 /* Common Clock COnfiguration */
399#define PCI_EXP_LNKCTL_CLKREQ_EN 0x100 /* Enable clkreq */ 405#define PCI_EXP_LNKCTL_CLKREQ_EN 0x100 /* Enable clkreq */
400#define PCI_EXP_LNKSTA 18 /* Link Status */ 406#define PCI_EXP_LNKSTA 18 /* Link Status */
407#define PCI_EXP_LNKSTA_LT 0x800 /* Link Training */
408#define PCI_EXP_LNKSTA_SLC 0x1000 /* Slot Clock Configuration */
401#define PCI_EXP_SLTCAP 20 /* Slot Capabilities */ 409#define PCI_EXP_SLTCAP 20 /* Slot Capabilities */
402#define PCI_EXP_SLTCTL 24 /* Slot Control */ 410#define PCI_EXP_SLTCTL 24 /* Slot Control */
403#define PCI_EXP_SLTSTA 26 /* Slot Status */ 411#define PCI_EXP_SLTSTA 26 /* Slot Status */