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authorHans Verkuil <hverkuil@xs4all.nl>2006-04-02 11:50:42 -0400
committerMauro Carvalho Chehab <mchehab@infradead.org>2006-06-25 00:57:36 -0400
commitb7f8292c96463810edfecff70dd4631d47e5a36b (patch)
tree02b1cfb3f753ea82c6fa51c901420074875be355 /include
parent2eb606db1134ce860cc0cbf8b533b6315d182e21 (diff)
V4L/DVB (3711): Add support for VIDIOC_INT_S_CRYSTAL_FREQ internal command.
Some saa7115-based cards use a different crystal frequency and a different audio clock generation. Add a new VIDIOC_INT_S_CRYSTAL_FREQ command to be able to set these values. Also change the default APLL setting to 0. It makes no sense to have the audio clock independent from the video clock, this can lead to audio/video synchronization problems. Setting this to 0 is also consistent with the old saa7114.c source and the way the Hauppauge Windows driver sets it. Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab@infradead.org>
Diffstat (limited to 'include')
-rw-r--r--include/media/saa7115.h11
-rw-r--r--include/media/v4l2-common.h11
2 files changed, 21 insertions, 1 deletions
diff --git a/include/media/saa7115.h b/include/media/saa7115.h
index 6b4836f3f057..9f0e2285a099 100644
--- a/include/media/saa7115.h
+++ b/include/media/saa7115.h
@@ -1,5 +1,5 @@
1/* 1/*
2 saa7115.h - definition for saa7113/4/5 inputs 2 saa7115.h - definition for saa7113/4/5 inputs and frequency flags
3 3
4 Copyright (C) 2006 Hans Verkuil (hverkuil@xs4all.nl) 4 Copyright (C) 2006 Hans Verkuil (hverkuil@xs4all.nl)
5 5
@@ -33,5 +33,14 @@
33#define SAA7115_SVIDEO2 8 33#define SAA7115_SVIDEO2 8
34#define SAA7115_SVIDEO3 9 34#define SAA7115_SVIDEO3 9
35 35
36/* SAA7115 v4l2_crystal_freq frequency values */
37#define SAA7115_FREQ_32_11_MHZ 32110000 /* 32.11 MHz crystal, SAA7114/5 only */
38#define SAA7115_FREQ_24_576_MHZ 24576000 /* 24.576 MHz crystal */
39
40/* SAA7115 v4l2_crystal_freq audio clock control flags */
41#define SAA7115_FREQ_FL_UCGC (1 << 0) /* SA 3A[7], UCGC, SAA7115 only */
42#define SAA7115_FREQ_FL_CGCDIV (1 << 1) /* SA 3A[6], CGCDIV, SAA7115 only */
43#define SAA7115_FREQ_FL_APLL (1 << 2) /* SA 3A[3], APLL, SAA7114/5 only */
44
36#endif 45#endif
37 46
diff --git a/include/media/v4l2-common.h b/include/media/v4l2-common.h
index 642520acdfa7..827f7edcd665 100644
--- a/include/media/v4l2-common.h
+++ b/include/media/v4l2-common.h
@@ -211,4 +211,15 @@ struct v4l2_routing {
211#define VIDIOC_INT_S_VIDEO_ROUTING _IOW ('d', 111, struct v4l2_routing) 211#define VIDIOC_INT_S_VIDEO_ROUTING _IOW ('d', 111, struct v4l2_routing)
212#define VIDIOC_INT_G_VIDEO_ROUTING _IOR ('d', 112, struct v4l2_routing) 212#define VIDIOC_INT_G_VIDEO_ROUTING _IOR ('d', 112, struct v4l2_routing)
213 213
214struct v4l2_crystal_freq {
215 u32 freq; /* frequency in Hz of the crystal */
216 u32 flags; /* device specific flags */
217};
218
219/* Sets the frequency of the crystal used to generate the clocks.
220 An extra flags field allows device specific configuration regarding
221 clock frequency dividers, etc. If not used, then set flags to 0.
222 If the frequency is not supported, then -EINVAL is returned. */
223#define VIDIOC_INT_S_CRYSTAL_FREQ _IOW ('d', 113, struct v4l2_crystal_freq)
224
214#endif /* V4L2_COMMON_H_ */ 225#endif /* V4L2_COMMON_H_ */