Merge branch 'linus' into x86/kconfig

author: Ingo Molnar <mingo@elte.hu> 2008-06-16 05:28:04 -0400
committer: Ingo Molnar <mingo@elte.hu> 2008-06-16 05:28:04 -0400
commit: 7aaaec38fcd9ef3172e69f8c19f20113830a8498 (patch)
tree: b12a1c359ad53ae10601f77b3438bb27c3c8f337 /include
parent: 1ac97018169c5a13feaa90d9671f2d6ba2d9e86e (diff)
parent: 066519068ad2fbe98c7f45552b1f592903a9c8c8 (diff)
345 files changed, 3562 insertions, 2315 deletions
diff --git a/include/acpi/processor.h b/include/acpi/processor.h
index 06480bcabfdc..06ebb6ef72aa 100644
--- a/include/acpi/processor.h
+++ b/include/acpi/processor.h
@@ -319,6 +319,7 @@ static inline int acpi_processor_ppc_has_changed(struct acpi_processor *pr)
 #endif                          /* CONFIG_CPU_FREQ */
 /* in processor_throttling.c */
+int acpi_processor_tstate_has_changed(struct acpi_processor *pr);
 int acpi_processor_get_throttling_info(struct acpi_processor *pr);
 extern int acpi_processor_set_throttling(struct acpi_processor *pr, int state);
 extern struct file_operations acpi_processor_throttling_fops;
diff --git a/include/asm-alpha/barrier.h b/include/asm-alpha/barrier.h
index 384dc08d6f53..ac78eba909bc 100644
--- a/include/asm-alpha/barrier.h
+++ b/include/asm-alpha/barrier.h
@@ -24,7 +24,7 @@ __asm__ __volatile__("mb": : :"memory")
 #define smp_mb()        barrier()
 #define smp_rmb()       barrier()
 #define smp_wmb()       barrier()
-#define smp_read_barrier_depends()      barrier()
+#define smp_read_barrier_depends()      do { } while (0)
 #endif
 #define set_mb(var, value) \
diff --git a/include/asm-alpha/param.h b/include/asm-alpha/param.h
index 0982f1d39499..e691ecfedb2c 100644
--- a/include/asm-alpha/param.h
+++ b/include/asm-alpha/param.h
@@ -5,8 +5,12 @@
   hardware ignores reprogramming.  We also need userland buy-in to the 
   change in HZ, since this is visible in the wait4 resources etc.  */
+#ifdef __KERNEL__
 #define HZ              CONFIG_HZ
 #define USER_HZ         HZ
+#else
+#define HZ              1024
+#endif
 #define EXEC_PAGESIZE   8192
diff --git a/include/asm-alpha/pgtable.h b/include/asm-alpha/pgtable.h
index 05ce5fba43e3..3f0c59f6d8aa 100644
--- a/include/asm-alpha/pgtable.h
+++ b/include/asm-alpha/pgtable.h
@@ -287,17 +287,34 @@ extern inline pte_t pte_mkspecial(pte_t pte)	{ return pte; }
 #define pgd_index(address)      (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
 #define pgd_offset(mm, address) ((mm)->pgd+pgd_index(address))
+/*
+ * The smp_read_barrier_depends() in the following functions are required to
+ * order the load of *dir (the pointer in the top level page table) with any
+ * subsequent load of the returned pmd_t *ret (ret is data dependent on *dir).
+ *
+ * If this ordering is not enforced, the CPU might load an older value of
+ * *ret, which may be uninitialized data. See mm/memory.c:__pte_alloc for
+ * more details.
+ *
+ * Note that we never change the mm->pgd pointer after the task is running, so
+ * pgd_offset does not require such a barrier.
+ */
 /* Find an entry in the second-level page table.. */
 extern inline pmd_t * pmd_offset(pgd_t * dir, unsigned long address)
 {
-        return (pmd_t *) pgd_page_vaddr(*dir) + ((address >> PMD_SHIFT) & (PTRS_PER_PAGE - 1));
+        pmd_t *ret = (pmd_t *) pgd_page_vaddr(*dir) + ((address >> PMD_SHIFT) & (PTRS_PER_PAGE - 1));
+        smp_read_barrier_depends(); /* see above */
+        return ret;
 }
 /* Find an entry in the third-level page table.. */
 extern inline pte_t * pte_offset_kernel(pmd_t * dir, unsigned long address)
 {
-        return (pte_t *) pmd_page_vaddr(*dir)
+        pte_t *ret = (pte_t *) pmd_page_vaddr(*dir)
                + ((address >> PAGE_SHIFT) & (PTRS_PER_PAGE - 1));
+        smp_read_barrier_depends(); /* see above */
+        return ret;
 }
 #define pte_offset_map(dir,addr)        pte_offset_kernel((dir),(addr))
diff --git a/include/asm-arm/arch-at91/io.h b/include/asm-arm/arch-at91/io.h
index 80073fd36b8e..f8beaa228467 100644
--- a/include/asm-arm/arch-at91/io.h
+++ b/include/asm-arm/arch-at91/io.h
@@ -21,8 +21,6 @@
 #ifndef __ASM_ARCH_IO_H
 #define __ASM_ARCH_IO_H
-#include <asm/io.h>
 #define IO_SPACE_LIMIT          0xFFFFFFFF
 #define __io(a)                 ((void __iomem *)(a))
diff --git a/include/asm-arm/arch-omap/board-palmte.h b/include/asm-arm/arch-omap/board-palmte.h
index cd22035a7160..6fac2c8935be 100644
--- a/include/asm-arm/arch-omap/board-palmte.h
+++ b/include/asm-arm/arch-omap/board-palmte.h
@@ -14,8 +14,6 @@
 #ifndef __OMAP_BOARD_PALMTE_H
 #define __OMAP_BOARD_PALMTE_H
-#include <asm/arch/gpio.h>
 #define PALMTE_USBDETECT_GPIO   0
 #define PALMTE_USB_OR_DC_GPIO   1
 #define PALMTE_TSC_GPIO         4
diff --git a/include/asm-arm/arch-omap/clock.h b/include/asm-arm/arch-omap/clock.h
index 57523bdb642b..12a5e4de9518 100644
--- a/include/asm-arm/arch-omap/clock.h
+++ b/include/asm-arm/arch-omap/clock.h
@@ -73,6 +73,8 @@ struct clk {
 #endif
 };
+struct cpufreq_frequency_table;
 struct clk_functions {
        int             (*clk_enable)(struct clk *clk);
        void            (*clk_disable)(struct clk *clk);
@@ -83,6 +85,9 @@ struct clk_functions {
        void            (*clk_allow_idle)(struct clk *clk);
        void            (*clk_deny_idle)(struct clk *clk);
        void            (*clk_disable_unused)(struct clk *clk);
+#ifdef CONFIG_CPU_FREQ
+        void            (*clk_init_cpufreq_table)(struct cpufreq_frequency_table **);
+#endif
 };
 extern unsigned int mpurate;
diff --git a/include/asm-arm/arch-omap/common.h b/include/asm-arm/arch-omap/common.h
index 224e009e5296..36a3b62d4d8d 100644
--- a/include/asm-arm/arch-omap/common.h
+++ b/include/asm-arm/arch-omap/common.h
@@ -47,4 +47,8 @@ static inline int omap_register_i2c_bus(int bus_id, u32 clkrate,
 }
 #endif
+void omap2_set_globals_242x(void);
+void omap2_set_globals_243x(void);
+void omap2_set_globals_343x(void);
 #endif /* __ARCH_ARM_MACH_OMAP_COMMON_H */
diff --git a/include/asm-arm/arch-omap/control.h b/include/asm-arm/arch-omap/control.h
index 9944bb5d5330..59c0686f8be7 100644
--- a/include/asm-arm/arch-omap/control.h
+++ b/include/asm-arm/arch-omap/control.h
@@ -80,7 +80,7 @@
 #define OMAP24XX_CONTROL_SEC_TAP        (OMAP2_CONTROL_GENERAL + 0x0064)
 #define OMAP24XX_CONTROL_OCM_PUB_RAM_ADD        (OMAP2_CONTROL_GENERAL + 0x006c)
 #define OMAP24XX_CONTROL_EXT_SEC_RAM_START_ADD  (OMAP2_CONTROL_GENERAL + 0x0070)
-#define OMAP24XX_CONTROL_EXT_SEC_RAM_STOP_ADD   (OMAP2_CONTROL_GENERAL + 0x0074
+#define OMAP24XX_CONTROL_EXT_SEC_RAM_STOP_ADD   (OMAP2_CONTROL_GENERAL + 0x0074)
 #define OMAP24XX_CONTROL_SEC_STATUS             (OMAP2_CONTROL_GENERAL + 0x0080)
 #define OMAP24XX_CONTROL_SEC_ERR_STATUS         (OMAP2_CONTROL_GENERAL + 0x0084)
 #define OMAP24XX_CONTROL_STATUS                 (OMAP2_CONTROL_GENERAL + 0x0088)
diff --git a/include/asm-arm/arch-omap/entry-macro.S b/include/asm-arm/arch-omap/entry-macro.S
index 74cd57221c8e..369093a45fcf 100644
--- a/include/asm-arm/arch-omap/entry-macro.S
+++ b/include/asm-arm/arch-omap/entry-macro.S
@@ -8,6 +8,7 @@
 * warranty of any kind, whether express or implied.
 */
 #include <asm/hardware.h>
+#include <asm/arch/io.h>
 #include <asm/arch/irqs.h>
 #if defined(CONFIG_ARCH_OMAP1)
diff --git a/include/asm-arm/arch-omap/gpio.h b/include/asm-arm/arch-omap/gpio.h
index 86621a04cd8f..5ee6a49864c3 100644
--- a/include/asm-arm/arch-omap/gpio.h
+++ b/include/asm-arm/arch-omap/gpio.h
@@ -26,7 +26,6 @@
 #ifndef __ASM_ARCH_OMAP_GPIO_H
 #define __ASM_ARCH_OMAP_GPIO_H
-#include <asm/hardware.h>
 #include <asm/arch/irqs.h>
 #include <asm/io.h>
diff --git a/include/asm-arm/arch-omap/hardware.h b/include/asm-arm/arch-omap/hardware.h
index da572092e255..91d85b3417b7 100644
--- a/include/asm-arm/arch-omap/hardware.h
+++ b/include/asm-arm/arch-omap/hardware.h
@@ -41,7 +41,6 @@
 #include <asm/types.h>
 #include <asm/arch/cpu.h>
 #endif
-#include <asm/arch/io.h>
 #include <asm/arch/serial.h>
 /*
diff --git a/include/asm-arm/arch-omap/mmc.h b/include/asm-arm/arch-omap/mmc.h
index c9588f49eb52..7cfc5f258560 100644
--- a/include/asm-arm/arch-omap/mmc.h
+++ b/include/asm-arm/arch-omap/mmc.h
@@ -15,21 +15,16 @@
 #include <linux/device.h>
 #include <linux/mmc/host.h>
+#include <asm/arch/board.h>
 #define OMAP_MMC_MAX_SLOTS      2
 struct omap_mmc_platform_data {
        struct omap_mmc_conf    conf;
-        unsigned enabled:1;
        /* number of slots on board */
        unsigned nr_slots:2;
-        /* nomux means "standard" muxing is wrong on this board, and that
-         * board-specific code handled it before common init logic.
-         */
-        unsigned nomux:1;
-        /* 4 wire signaling is optional, and is only used for SD/SDIO and
-         * MMCv4 */
-        unsigned wire4:1;
        /* set if your board has components or wiring that limits the
         * maximum frequency on the MMC bus */
        unsigned int max_freq;
@@ -40,6 +35,11 @@ struct omap_mmc_platform_data {
         * not supported */
        int (* init)(struct device *dev);
        void (* cleanup)(struct device *dev);
+        void (* shutdown)(struct device *dev);
+        /* To handle board related suspend/resume functionality for MMC */
+        int (*suspend)(struct device *dev, int slot);
+        int (*resume)(struct device *dev, int slot);
        struct omap_mmc_slot_data {
                int (* set_bus_mode)(struct device *dev, int slot, int bus_mode);
@@ -56,13 +56,19 @@ struct omap_mmc_platform_data {
                const char *name;
                u32 ocr_mask;
+                /* Card detection IRQs */
+                int card_detect_irq;
+                int (* card_detect)(int irq);
+                unsigned int ban_openended:1;
        } slots[OMAP_MMC_MAX_SLOTS];
 };
 extern void omap_set_mmc_info(int host, const struct omap_mmc_platform_data *info);
 /* called from board-specific card detection service routine */
-extern void omap_mmc_notify_card_detect(struct device *dev, int slot, int detected);
 extern void omap_mmc_notify_cover_event(struct device *dev, int slot, int is_closed);
 #endif
diff --git a/include/asm-arm/arch-pxa/mfp-pxa27x.h b/include/asm-arm/arch-pxa/mfp-pxa27x.h
index eb6eaa174f8d..bc73ab84167c 100644
--- a/include/asm-arm/arch-pxa/mfp-pxa27x.h
+++ b/include/asm-arm/arch-pxa/mfp-pxa27x.h
@@ -112,6 +112,7 @@
 #define GPIO57_nIOIS16          MFP_CFG_IN(GPIO57, AF1)
 #define GPIO56_nPWAIT           MFP_CFG_IN(GPIO56, AF1)
 #define GPIO79_PSKTSEL          MFP_CFG_OUT(GPIO79, AF1, DRIVE_HIGH)
+#define GPIO104_PSKTSEL         MFP_CFG_OUT(GPIO104, AF1, DRIVE_HIGH)
 /* I2C */
 #define GPIO117_I2C_SCL         MFP_CFG_IN(GPIO117, AF1)
diff --git a/include/asm-arm/arch-pxa/pxa2xx-gpio.h b/include/asm-arm/arch-pxa/pxa2xx-gpio.h
index 763313c5e6be..b81cd63cb2eb 100644
--- a/include/asm-arm/arch-pxa/pxa2xx-gpio.h
+++ b/include/asm-arm/arch-pxa/pxa2xx-gpio.h
@@ -134,7 +134,11 @@
 #define GPIO93_CIF_DD_6         93      /* Camera data pin 6 */
 #define GPIO94_CIF_DD_5         94      /* Camera data pin 5 */
 #define GPIO95_CIF_DD_4         95      /* Camera data pin 4 */
+#define GPIO96_FFRXD            96      /* FFUART recieve */
+#define GPIO98_FFRTS            98      /* FFUART request to send */
 #define GPIO98_CIF_DD_0         98      /* Camera data pin 0 */
+#define GPIO99_FFTXD            99      /* FFUART transmit data */
+#define GPIO100_FFCTS           100     /* FFUART Clear to send */
 #define GPIO102_nPCE_1          102     /* PCMCIA (PXA27x) */
 #define GPIO103_CIF_DD_3        103     /* Camera data pin 3 */
 #define GPIO104_CIF_DD_2        104     /* Camera data pin 2 */
@@ -316,6 +320,8 @@
 #define GPIO85_nPCE_1_MD        (85 | GPIO_ALT_FN_1_OUT)
 #define GPIO85_CIF_LV_MD        (85 | GPIO_ALT_FN_3_IN)
 #define GPIO86_nPCE_1_MD        (86 | GPIO_ALT_FN_1_OUT)
+#define GPIO88_USBH1_PWR_MD     (88 | GPIO_ALT_FN_1_IN)
+#define GPIO89_USBH1_PEN_MD     (89 | GPIO_ALT_FN_2_OUT)
 #define GPIO90_CIF_DD_4_MD      (90 | GPIO_ALT_FN_3_IN)
 #define GPIO91_CIF_DD_5_MD      (91 | GPIO_ALT_FN_3_IN)
 #define GPIO92_MMCDAT0_MD       (92 | GPIO_ALT_FN_1_OUT)
@@ -324,8 +330,11 @@
 #define GPIO95_CIF_DD_4_MD      (95 | GPIO_ALT_FN_2_IN)
 #define GPIO95_KP_MKIN6_MD      (95 | GPIO_ALT_FN_3_IN)
 #define GPIO96_KP_DKIN3_MD      (96 | GPIO_ALT_FN_1_IN)
+#define GPIO96_FFRXD_MD         (96 | GPIO_ALT_FN_3_IN)
 #define GPIO97_KP_MKIN3_MD      (97 | GPIO_ALT_FN_3_IN)
 #define GPIO98_CIF_DD_0_MD      (98 | GPIO_ALT_FN_2_IN)
+#define GPIO98_FFRTS_MD         (98 | GPIO_ALT_FN_3_OUT)
+#define GPIO99_FFTXD_MD         (99 | GPIO_ALT_FN_3_OUT)
 #define GPIO100_KP_MKIN0_MD     (100 | GPIO_ALT_FN_1_IN)
 #define GPIO101_KP_MKIN1_MD     (101 | GPIO_ALT_FN_1_IN)
 #define GPIO102_nPCE_1_MD       (102 | GPIO_ALT_FN_1_OUT)
diff --git a/include/asm-arm/arch-pxa/regs-lcd.h b/include/asm-arm/arch-pxa/regs-lcd.h
index f762493f5141..3ba464c913a5 100644
--- a/include/asm-arm/arch-pxa/regs-lcd.h
+++ b/include/asm-arm/arch-pxa/regs-lcd.h
@@ -1,5 +1,8 @@
 #ifndef __ASM_ARCH_REGS_LCD_H
 #define __ASM_ARCH_REGS_LCD_H
+#include <asm/arch/bitfield.h>
 /*
 * LCD Controller Registers and Bits Definitions
 */
@@ -69,7 +72,7 @@
 #define LCCR0_QDM       (1 << 11)       /* LCD Quick Disable mask */
 #define LCCR0_PDD       (0xff << 12)    /* Palette DMA request delay */
 #define LCCR0_PDD_S     12
-#define LCCR0_BM        (1 << 20)       /* Branch mask */
+#define LCCR0_BM        (1 << 20)       /* Branch mask */
 #define LCCR0_OUM       (1 << 21)       /* Output FIFO underrun mask */
 #define LCCR0_LCDT      (1 << 22)       /* LCD panel type */
 #define LCCR0_RDSTM     (1 << 23)       /* Read status interrupt mask */
diff --git a/include/asm-arm/arch-sa1100/collie.h b/include/asm-arm/arch-sa1100/collie.h
index 14a344aa3cc7..762eba535813 100644
--- a/include/asm-arm/arch-sa1100/collie.h
+++ b/include/asm-arm/arch-sa1100/collie.h
@@ -34,9 +34,12 @@
 #define COLLIE_GPIO_ON_KEY              GPIO_GPIO (0)
 #define COLLIE_GPIO_AC_IN               GPIO_GPIO (1)
+#define COLLIE_GPIO_SDIO_INT            GPIO_GPIO (11)
 #define COLLIE_GPIO_CF_IRQ              GPIO_GPIO (14)
 #define COLLIE_GPIO_nREMOCON_INT        GPIO_GPIO (15)
 #define COLLIE_GPIO_UCB1x00_RESET       GPIO_GPIO (16)
+#define COLLIE_GPIO_nMIC_ON             GPIO_GPIO (17)
+#define COLLIE_GPIO_nREMOCON_ON         GPIO_GPIO (18)
 #define COLLIE_GPIO_CO                  GPIO_GPIO (20)
 #define COLLIE_GPIO_MCP_CLK             GPIO_GPIO (21)
 #define COLLIE_GPIO_CF_CD               GPIO_GPIO (22)
@@ -49,6 +52,7 @@
 #define COLLIE_IRQ_GPIO_ON_KEY          IRQ_GPIO0
 #define COLLIE_IRQ_GPIO_AC_IN           IRQ_GPIO1
+#define COLLIE_IRQ_GPIO_SDIO_IRQ        IRQ_GPIO11
 #define COLLIE_IRQ_GPIO_CF_IRQ          IRQ_GPIO14
 #define COLLIE_IRQ_GPIO_nREMOCON_INT    IRQ_GPIO15
 #define COLLIE_IRQ_GPIO_CO              IRQ_GPIO20
diff --git a/include/asm-arm/arch-sa1100/irqs.h b/include/asm-arm/arch-sa1100/irqs.h
index d7940683efb1..7bf80484bb77 100644
--- a/include/asm-arm/arch-sa1100/irqs.h
+++ b/include/asm-arm/arch-sa1100/irqs.h
@@ -141,7 +141,7 @@
 #define IRQ_LOCOMO_LT           (IRQ_BOARD_END + 17)
 #define IRQ_LOCOMO_SPI_RFR      (IRQ_BOARD_END + 18)
 #define IRQ_LOCOMO_SPI_RFW      (IRQ_BOARD_END + 19)
-#define IRQ_LOCOMO_SPI_OVRN     (IRQ_BOARD_END + 20)
+#define IRQ_LOCOMO_SPI_REND     (IRQ_BOARD_END + 20)
 #define IRQ_LOCOMO_SPI_TEND     (IRQ_BOARD_END + 21)
 /*
diff --git a/include/asm-arm/hardware/locomo.h b/include/asm-arm/hardware/locomo.h
index adab77780ed3..fb0645de6f31 100644
--- a/include/asm-arm/hardware/locomo.h
+++ b/include/asm-arm/hardware/locomo.h
@@ -58,6 +58,11 @@
 #define LOCOMO_SPIMD    0x00            /* SPI mode setting */
 #define LOCOMO_SPICT    0x04            /* SPI mode control */
 #define LOCOMO_SPIST    0x08            /* SPI status */
+#define LOCOMO_SPI_TEND (1 << 3)        /* Transfer end bit */
+#define LOCOMO_SPI_REND (1 << 2)        /* Receive end bit */
+#define LOCOMO_SPI_RFW  (1 << 1)        /* write buffer bit */
+#define LOCOMO_SPI_RFR  (1)             /* read buffer bit */
 #define LOCOMO_SPIIS    0x10            /* SPI interrupt status */
 #define LOCOMO_SPIWE    0x14            /* SPI interrupt status write enable */
 #define LOCOMO_SPIIE    0x18            /* SPI interrupt enable */
@@ -66,16 +71,12 @@
 #define LOCOMO_SPIRD    0x24            /* SPI receive data read */
 #define LOCOMO_SPITS    0x28            /* SPI transfer data shift */
 #define LOCOMO_SPIRS    0x2C            /* SPI receive data shift */
-#define LOCOMO_SPI_TEND (1 << 3)        /* Transfer end bit */
-#define LOCOMO_SPI_OVRN (1 << 2)        /* Over Run bit */
-#define LOCOMO_SPI_RFW  (1 << 1)        /* write buffer bit */
-#define LOCOMO_SPI_RFR  (1)             /* read buffer bit */
 /* GPIO */
 #define LOCOMO_GPD              0x90    /* GPIO direction */
 #define LOCOMO_GPE              0x94    /* GPIO input enable */
 #define LOCOMO_GPL              0x98    /* GPIO level */
-#define LOCOMO_GPO              0x9c    /* GPIO out data setteing */
+#define LOCOMO_GPO              0x9c    /* GPIO out data setting */
 #define LOCOMO_GRIE             0xa0    /* GPIO rise detection */
 #define LOCOMO_GFIE             0xa4    /* GPIO fall detection */
 #define LOCOMO_GIS              0xa8    /* GPIO edge detection status */
@@ -96,6 +97,9 @@
 #define LOCOMO_GPIO_DAC_SDATA   LOCOMO_GPIO(10)
 #define LOCOMO_GPIO_DAC_SCK     LOCOMO_GPIO(11)
 #define LOCOMO_GPIO_DAC_SLOAD   LOCOMO_GPIO(12)
+#define LOCOMO_GPIO_CARD_DETECT LOCOMO_GPIO(13)
+#define LOCOMO_GPIO_WRITE_PROT  LOCOMO_GPIO(14)
+#define LOCOMO_GPIO_CARD_POWER  LOCOMO_GPIO(15)
 /* Start the definitions of the devices.  Each device has an initial
 * base address and a series of offsets from that base address. */
@@ -122,7 +126,7 @@
 /* Audio controller */
 #define LOCOMO_AUDIO            0x54
 #define LOCOMO_ACC              0x00    /* Audio clock */
-#define LOCOMO_PAIF             0x7C    /* PCM audio interface */
+#define LOCOMO_PAIF             0xD0    /* PCM audio interface */
 /* Audio clock */
 #define LOCOMO_ACC_XON          0x80
 #define LOCOMO_ACC_XEN          0x40
@@ -162,7 +166,7 @@ extern struct bus_type locomo_bus_type;
 #define LOCOMO_DEVID_AUDIO      3
 #define LOCOMO_DEVID_LED        4
 #define LOCOMO_DEVID_UART       5
-#define LOCOMO_DEVID_SPI                6
+#define LOCOMO_DEVID_SPI        6
 struct locomo_dev {
        struct device   dev;
@@ -204,7 +208,6 @@ int locomo_gpio_read_level(struct device *dev, unsigned int bits);
 int locomo_gpio_read_output(struct device *dev, unsigned int bits);
 void locomo_gpio_write(struct device *dev, unsigned int bits, unsigned int set);
 /* M62332 control function */
 void locomo_m62332_senddata(struct locomo_dev *ldev, unsigned int dac_data, int channel);
diff --git a/include/asm-arm/page.h b/include/asm-arm/page.h
index 5c22b0112106..8e05bdb5f12f 100644
--- a/include/asm-arm/page.h
+++ b/include/asm-arm/page.h
@@ -179,10 +179,10 @@ typedef unsigned long pgprot_t;
 #endif /* STRICT_MM_TYPECHECKS */
-typedef struct page *pgtable_t;
 #endif /* CONFIG_MMU */
+typedef struct page *pgtable_t;
 #include <asm/memory.h>
 #endif /* !__ASSEMBLY__ */
diff --git a/include/asm-arm/pgtable-nommu.h b/include/asm-arm/pgtable-nommu.h
index 2e5868bbe03b..386fcc10a973 100644
--- a/include/asm-arm/pgtable-nommu.h
+++ b/include/asm-arm/pgtable-nommu.h
@@ -16,7 +16,6 @@
 #include <linux/slab.h>
 #include <asm/processor.h>
 #include <asm/page.h>
-#include <asm/io.h>
 /*
 * Trivial page table functions.
diff --git a/include/asm-arm/spinlock.h b/include/asm-arm/spinlock.h
index 800ba5254daf..2b41ebbfa7ff 100644
--- a/include/asm-arm/spinlock.h
+++ b/include/asm-arm/spinlock.h
@@ -142,7 +142,7 @@ static inline void __raw_write_unlock(raw_rwlock_t *rw)
 }
 /* write_can_lock - would write_trylock() succeed? */
-#define __raw_write_can_lock(x)         ((x)->lock == 0x80000000)
+#define __raw_write_can_lock(x)         ((x)->lock == 0)
 /*
 * Read locks are a bit more hairy:
diff --git a/include/asm-arm/system.h b/include/asm-arm/system.h
index 6335de9a2bb3..514af792a598 100644
--- a/include/asm-arm/system.h
+++ b/include/asm-arm/system.h
@@ -48,20 +48,6 @@
 #define CPUID_TCM       2
 #define CPUID_TLBTYPE   3
-#ifdef CONFIG_CPU_CP15
-#define read_cpuid(reg)                                                 \
-        ({                                                              \
-                unsigned int __val;                                     \
-                asm("mrc        p15, 0, %0, c0, c0, " __stringify(reg)  \
-                    : "=r" (__val)                                      \
-                    :                                                   \
-                    : "cc");                                            \
-                __val;                                                  \
-        })
-#else
-#define read_cpuid(reg) (processor_id)
-#endif
 /*
 * This is used to ensure the compiler did actually allocate the register we
 * asked it for some inline assembly sequences.  Apparently we can't trust
@@ -78,6 +64,21 @@
 #include <linux/stringify.h>
 #include <linux/irqflags.h>
+#ifdef CONFIG_CPU_CP15
+#define read_cpuid(reg)                                                 \
+        ({                                                              \
+                unsigned int __val;                                     \
+                asm("mrc        p15, 0, %0, c0, c0, " __stringify(reg)  \
+                    : "=r" (__val)                                      \
+                    :                                                   \
+                    : "cc");                                            \
+                __val;                                                  \
+        })
+#else
+extern unsigned int processor_id;
+#define read_cpuid(reg) (processor_id)
+#endif
 /*
 * The CPU ID never changes at run time, so we might as well tell the
 * compiler that it's constant.  Use this function to read the CPU ID
diff --git a/include/asm-blackfin/bfin-global.h b/include/asm-blackfin/bfin-global.h
index 716df7c85923..76033831eb35 100644
--- a/include/asm-blackfin/bfin-global.h
+++ b/include/asm-blackfin/bfin-global.h
@@ -37,7 +37,9 @@
 #include <linux/linkage.h>
 #include <linux/types.h>
-#if defined(CONFIG_DMA_UNCACHED_2M)
+#if defined(CONFIG_DMA_UNCACHED_4M)
+# define DMA_UNCACHED_REGION (4 * 1024 * 1024)
+#elif defined(CONFIG_DMA_UNCACHED_2M)
 # define DMA_UNCACHED_REGION (2 * 1024 * 1024)
 #elif defined(CONFIG_DMA_UNCACHED_1M)
 # define DMA_UNCACHED_REGION (1024 * 1024)
@@ -103,13 +105,6 @@ extern int sram_free(const void*);
 extern void *sram_alloc_with_lsl(size_t, unsigned long);
 extern int sram_free_with_lsl(const void*);
-extern void led_on(int);
-extern void led_off(int);
-extern void led_toggle(int);
-extern void led_disp_num(int);
-extern void led_toggle_num(int);
-extern void init_leds(void);
 extern const char bfin_board_name[];
 extern unsigned long wall_jiffies;
diff --git a/include/asm-blackfin/checksum.h b/include/asm-blackfin/checksum.h
index 2638f2586d2f..6f6af2b8e9e0 100644
--- a/include/asm-blackfin/checksum.h
+++ b/include/asm-blackfin/checksum.h
@@ -15,7 +15,7 @@
 *
 * it's best to have buff aligned on a 32-bit boundary
 */
-unsigned int csum_partial(const unsigned char *buff, int len, unsigned int sum);
+__wsum csum_partial(const void *buff, int len, __wsum sum);
 /*
 * the same as csum_partial, but copies from src while it
@@ -25,8 +25,8 @@ unsigned int csum_partial(const unsigned char *buff, int len, unsigned int sum);
 * better 64-bit) boundary
 */
-unsigned int csum_partial_copy(const unsigned char *src, unsigned char *dst,
+__wsum csum_partial_copy(const void *src, void *dst,
-                               int len, int sum);
+                               int len, __wsum sum);
 /*
 * the same as csum_partial_copy, but copies from user space.
@@ -35,20 +35,19 @@ unsigned int csum_partial_copy(const unsigned char *src, unsigned char *dst,
 * better 64-bit) boundary
 */
-extern unsigned int csum_partial_copy_from_user(const unsigned char *src,
+extern __wsum csum_partial_copy_from_user(const void __user *src, void *dst,
-                                                unsigned char *dst, int len,
+                                          int len, __wsum sum, int *csum_err);
-                                                int sum, int *csum_err);
 #define csum_partial_copy_nocheck(src, dst, len, sum)   \
        csum_partial_copy((src), (dst), (len), (sum))
-unsigned short ip_fast_csum(unsigned char *iph, unsigned int ihl);
+__sum16 ip_fast_csum(unsigned char *iph, unsigned int ihl);
 /*
 *      Fold a partial checksum
 */
-static inline unsigned int csum_fold(unsigned int sum)
+static inline __sum16 csum_fold(__wsum sum)
 {
        while (sum >> 16)
                sum = (sum & 0xffff) + (sum >> 16);
@@ -60,9 +59,9 @@ static inline unsigned int csum_fold(unsigned int sum)
 * returns a 16-bit checksum, already complemented
 */
-static inline unsigned int
+static inline __wsum
-csum_tcpudp_nofold(unsigned long saddr, unsigned long daddr, unsigned short len,
+csum_tcpudp_nofold(__be32 saddr, __be32 daddr, unsigned short len,
-                   unsigned short proto, unsigned int sum)
+                   unsigned short proto, __wsum sum)
 {
        __asm__ ("%0 = %0 + %1;\n\t"
@@ -84,9 +83,9 @@ csum_tcpudp_nofold(unsigned long saddr, unsigned long daddr, unsigned short len,
        return (sum);
 }
-static inline unsigned short int
+static inline __sum16
-csum_tcpudp_magic(unsigned long saddr, unsigned long daddr, unsigned short len,
+csum_tcpudp_magic(__be32 saddr, __be32 daddr, unsigned short len,
-                  unsigned short proto, unsigned int sum)
+                  unsigned short proto, __wsum sum)
 {
        return csum_fold(csum_tcpudp_nofold(saddr, daddr, len, proto, sum));
 }
@@ -96,6 +95,6 @@ csum_tcpudp_magic(unsigned long saddr, unsigned long daddr, unsigned short len,
 * in icmp.c
 */
-extern unsigned short ip_compute_csum(const unsigned char *buff, int len);
+extern __sum16 ip_compute_csum(const void *buff, int len);
 #endif                          /* _BFIN_CHECKSUM_H */
diff --git a/include/asm-blackfin/gpio.h b/include/asm-blackfin/gpio.h
index 27ff532a806c..ff95e9d88342 100644
--- a/include/asm-blackfin/gpio.h
+++ b/include/asm-blackfin/gpio.h
@@ -437,7 +437,6 @@ void gpio_set_value(unsigned gpio, int arg);
 int gpio_get_value(unsigned gpio);
 #ifndef BF548_FAMILY
-#define gpio_get_value(gpio)            get_gpio_data(gpio)
 #define gpio_set_value(gpio, value)     set_gpio_data(gpio, value)
 #endif
diff --git a/include/asm-blackfin/io.h b/include/asm-blackfin/io.h
index 574fe56989d1..cbbf7ffdbbff 100644
--- a/include/asm-blackfin/io.h
+++ b/include/asm-blackfin/io.h
@@ -117,10 +117,12 @@ static inline unsigned int readl(const volatile void __iomem *addr)
 extern void outsb(unsigned long port, const void *addr, unsigned long count);
 extern void outsw(unsigned long port, const void *addr, unsigned long count);
+extern void outsw_8(unsigned long port, const void *addr, unsigned long count);
 extern void outsl(unsigned long port, const void *addr, unsigned long count);
 extern void insb(unsigned long port, void *addr, unsigned long count);
 extern void insw(unsigned long port, void *addr, unsigned long count);
+extern void insw_8(unsigned long port, void *addr, unsigned long count);
 extern void insl(unsigned long port, void *addr, unsigned long count);
 extern void insl_16(unsigned long port, void *addr, unsigned long count);
diff --git a/include/asm-blackfin/mach-bf527/anomaly.h b/include/asm-blackfin/mach-bf527/anomaly.h
index 735fa02fafb2..4725268a5ada 100644
--- a/include/asm-blackfin/mach-bf527/anomaly.h
+++ b/include/asm-blackfin/mach-bf527/anomaly.h
@@ -15,12 +15,16 @@
 /* Multi-Issue Instruction with dsp32shiftimm in slot1 and P-reg Store in slot2 Not Supported */
 #define ANOMALY_05000074 (1)
+/* DMA_RUN Bit Is Not Valid after a Peripheral Receive Channel DMA Stops */
+#define ANOMALY_05000119 (1)
 /* Rx.H Cannot Be Used to Access 16-bit System MMR Registers */
 #define ANOMALY_05000122 (1)
 /* Spurious Hardware Error from an Access in the Shadow of a Conditional Branch */
 #define ANOMALY_05000245 (1)
 /* Sensitivity To Noise with Slow Input Edge Rates on External SPORT TX and RX Clocks */
 #define ANOMALY_05000265 (1)
+/* Errors when SSYNC, CSYNC, or Loads to LT, LB and LC Registers Are Interrupted */
+#define ANOMALY_05000312 (1)
 /* Incorrect Access of OTP_STATUS During otp_write() Function */
 #define ANOMALY_05000328 (1)
 /* Disallowed Configuration Prevents Subsequent Allowed Configuration on Host DMA Port */
@@ -92,7 +96,6 @@
 #define ANOMALY_05000266 (0)
 #define ANOMALY_05000273 (0)
 #define ANOMALY_05000311 (0)
-#define ANOMALY_05000312 (0)
 #define ANOMALY_05000323 (0)
 #define ANOMALY_05000363 (0)
diff --git a/include/asm-blackfin/mach-bf527/bfin_serial_5xx.h b/include/asm-blackfin/mach-bf527/bfin_serial_5xx.h
index 26e3c8076b4e..96bd09e31e36 100644
--- a/include/asm-blackfin/mach-bf527/bfin_serial_5xx.h
+++ b/include/asm-blackfin/mach-bf527/bfin_serial_5xx.h
@@ -53,6 +53,12 @@
 #define UART_SET_DLAB(uart)     do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0)
 #define UART_CLEAR_DLAB(uart)   do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0)
+#define UART_GET_CTS(x) gpio_get_value(x->cts_pin)
+#define UART_SET_RTS(x) gpio_set_value(x->rts_pin, 1)
+#define UART_CLEAR_RTS(x) gpio_set_value(x->rts_pin, 0)
+#define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v)
+#define UART_DISABLE_INTS(x) UART_PUT_IER(x, 0)
 #if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART1_CTSRTS)
 # define CONFIG_SERIAL_BFIN_CTSRTS
diff --git a/include/asm-blackfin/mach-bf527/blackfin.h b/include/asm-blackfin/mach-bf527/blackfin.h
index 2891727b6176..297821e2d79a 100644
--- a/include/asm-blackfin/mach-bf527/blackfin.h
+++ b/include/asm-blackfin/mach-bf527/blackfin.h
@@ -39,22 +39,22 @@
 #include "defBF522.h"
 #include "anomaly.h"
-#if defined(CONFIG_BF527)
+#if defined(CONFIG_BF527) || defined(CONFIG_BF526)
 #include "defBF527.h"
 #endif
-#if defined(CONFIG_BF525)
+#if defined(CONFIG_BF525) || defined(CONFIG_BF524)
 #include "defBF525.h"
 #endif
 #if !defined(__ASSEMBLY__)
 #include "cdefBF522.h"
-#if defined(CONFIG_BF527)
+#if defined(CONFIG_BF527) || defined(CONFIG_BF526)
 #include "cdefBF527.h"
 #endif
-#if defined(CONFIG_BF525)
+#if defined(CONFIG_BF525) || defined(CONFIG_BF524)
 #include "cdefBF525.h"
 #endif
 #endif
diff --git a/include/asm-blackfin/mach-bf533/anomaly.h b/include/asm-blackfin/mach-bf533/anomaly.h
index 5a6dcc5fa36c..8f7ea112fd3a 100644
--- a/include/asm-blackfin/mach-bf533/anomaly.h
+++ b/include/asm-blackfin/mach-bf533/anomaly.h
@@ -2,7 +2,7 @@
 * File: include/asm-blackfin/mach-bf533/anomaly.h
 * Bugs: Enter bugs at http://blackfin.uclinux.org/
 *
- * Copyright (C) 2004-2007 Analog Devices Inc.
+ * Copyright (C) 2004-2008 Analog Devices Inc.
 * Licensed under the GPL-2 or later.
 */
@@ -176,6 +176,21 @@
 #define ANOMALY_05000315 (1)
 /* Internal Voltage Regulator Values of 1.05V, 1.10V and 1.15V Not Allowed for LQFP Packages */
 #define ANOMALY_05000319 (ANOMALY_BF531 || ANOMALY_BF532)
+/* Serial Port (SPORT) Multichannel Transmit Failure when Channel 0 Is Disabled */
+#define ANOMALY_05000357 (1)
+/* UART Break Signal Issues */
+#define ANOMALY_05000363 (__SILICON_REVISION__ < 5)
+/* PPI Underflow Error Goes Undetected in ITU-R 656 Mode */
+#define ANOMALY_05000366 (1)
+/* Possible RETS Register Corruption when Subroutine Is under 5 Cycles in Duration */
+#define ANOMALY_05000371 (1)
+/* PPI Does Not Start Properly In Specific Mode */
+#define ANOMALY_05000400 (__SILICON_REVISION__ >= 5)
+/* SSYNC Stalls Processor when Executed from Non-Cacheable Memory */
+#define ANOMALY_05000402 (__SILICON_REVISION__ >= 5)
+/* Level-Sensitive External GPIO Wakeups May Cause Indefinite Stall */
+#define ANOMALY_05000403 (1)
 /* These anomalies have been "phased" out of analog.com anomaly sheets and are
 * here to show running on older silicon just isn't feasible.
@@ -249,20 +264,6 @@
 #define ANOMALY_05000192 (__SILICON_REVISION__ < 3)
 /* Internal Voltage Regulator may not start up */
 #define ANOMALY_05000206 (__SILICON_REVISION__ < 3)
-/* Serial Port (SPORT) Multichannel Transmit Failure when Channel 0 Is Disabled */
-#define ANOMALY_05000357 (1)
-/* UART Break Signal Issues */
-#define ANOMALY_05000363 (__SILICON_REVISION__ < 5)
-/* PPI Underflow Error Goes Undetected in ITU-R 656 Mode */
-#define ANOMALY_05000366 (1)
-/* Possible RETS Register Corruption when Subroutine Is under 5 Cycles in Duration */
-#define ANOMALY_05000371 (1)
-/* PPI Does Not Start Properly In Specific Mode */
-#define ANOMALY_05000400 (__SILICON_REVISION__ == 5)
-/* SSYNC Stalls Processor when Executed from Non-Cacheable Memory */
-#define ANOMALY_05000402 (__SILICON_REVISION__ == 5)
-/* Level-Sensitive External GPIO Wakeups May Cause Indefinite Stall */
-#define ANOMALY_05000403 (1)
 /* Anomalies that don't exist on this proc */
 #define ANOMALY_05000266 (0)
diff --git a/include/asm-blackfin/mach-bf533/bfin_serial_5xx.h b/include/asm-blackfin/mach-bf533/bfin_serial_5xx.h
index d016603b6615..e924569ad1d8 100644
--- a/include/asm-blackfin/mach-bf533/bfin_serial_5xx.h
+++ b/include/asm-blackfin/mach-bf533/bfin_serial_5xx.h
@@ -53,6 +53,12 @@
 #define UART_SET_DLAB(uart)     do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0)
 #define UART_CLEAR_DLAB(uart)   do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0)
+#define UART_GET_CTS(x) gpio_get_value(x->cts_pin)
+#define UART_SET_RTS(x) gpio_set_value(x->rts_pin, 1)
+#define UART_CLEAR_RTS(x) gpio_set_value(x->rts_pin, 0)
+#define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v)
+#define UART_DISABLE_INTS(x) UART_PUT_IER(x, 0)
 #ifdef CONFIG_BFIN_UART0_CTSRTS
 # define CONFIG_SERIAL_BFIN_CTSRTS
 # ifndef CONFIG_UART0_CTS_PIN
diff --git a/include/asm-blackfin/mach-bf537/anomaly.h b/include/asm-blackfin/mach-bf537/anomaly.h
index a6b08facb242..8460ab9c324f 100644
--- a/include/asm-blackfin/mach-bf537/anomaly.h
+++ b/include/asm-blackfin/mach-bf537/anomaly.h
@@ -2,7 +2,7 @@
 * File: include/asm-blackfin/mach-bf537/anomaly.h
 * Bugs: Enter bugs at http://blackfin.uclinux.org/
 *
- * Copyright (C) 2004-2007 Analog Devices Inc.
+ * Copyright (C) 2004-2008 Analog Devices Inc.
 * Licensed under the GPL-2 or later.
 */
@@ -132,8 +132,8 @@
 #define ANOMALY_05000322 (1)
 /* Ethernet MAC MDIO Reads Do Not Meet IEEE Specification */
 #define ANOMALY_05000341 (__SILICON_REVISION__ >= 3)
-/* New Feature: UART Remains Enabled after UART Boot (Not Available on Older Silicon) */
+/* New Feature: UART Remains Enabled after UART Boot */
-#define ANOMALY_05000350 (__SILICON_REVISION__ < 3)
+#define ANOMALY_05000350 (__SILICON_REVISION__ >= 3)
 /* Regulator Programming Blocked when Hibernate Wakeup Source Remains Active */
 #define ANOMALY_05000355 (1)
 /* Serial Port (SPORT) Multichannel Transmit Failure when Channel 0 Is Disabled */
@@ -145,12 +145,10 @@
 /* Possible RETS Register Corruption when Subroutine Is under 5 Cycles in Duration */
 #define ANOMALY_05000371 (1)
 /* SSYNC Stalls Processor when Executed from Non-Cacheable Memory */
-#define ANOMALY_05000402 (__SILICON_REVISION__ >= 3)
+#define ANOMALY_05000402 (__SILICON_REVISION__ >= 5)
 /* Level-Sensitive External GPIO Wakeups May Cause Indefinite Stall */
 #define ANOMALY_05000403 (1)
 /* Anomalies that don't exist on this proc */
 #define ANOMALY_05000125 (0)
 #define ANOMALY_05000158 (0)
diff --git a/include/asm-blackfin/mach-bf537/bfin_serial_5xx.h b/include/asm-blackfin/mach-bf537/bfin_serial_5xx.h
index f79d1a0e9129..41d7b6490bb1 100644
--- a/include/asm-blackfin/mach-bf537/bfin_serial_5xx.h
+++ b/include/asm-blackfin/mach-bf537/bfin_serial_5xx.h
@@ -53,6 +53,12 @@
 #define UART_SET_DLAB(uart)     do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0)
 #define UART_CLEAR_DLAB(uart)   do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0)
+#define UART_GET_CTS(x) gpio_get_value(x->cts_pin)
+#define UART_SET_RTS(x) gpio_set_value(x->rts_pin, 1)
+#define UART_CLEAR_RTS(x) gpio_set_value(x->rts_pin, 0)
+#define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v)
+#define UART_DISABLE_INTS(x) UART_PUT_IER(x, 0)
 #if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART1_CTSRTS)
 # define CONFIG_SERIAL_BFIN_CTSRTS
diff --git a/include/asm-blackfin/mach-bf548/anomaly.h b/include/asm-blackfin/mach-bf548/anomaly.h
index 49d3cebc5293..3ad59655881a 100644
--- a/include/asm-blackfin/mach-bf548/anomaly.h
+++ b/include/asm-blackfin/mach-bf548/anomaly.h
@@ -75,6 +75,8 @@
 #define ANOMALY_05000365 (1)
 /* Addressing Conflict between Boot ROM and Asynchronous Memory */
 #define ANOMALY_05000369 (1)
+/* Possible RETS Register Corruption when Subroutine Is under 5 Cycles in Duration */
+#define ANOMALY_05000371 (1)
 /* Mobile DDR Operation Not Functional */
 #define ANOMALY_05000377 (1)
 /* Security/Authentication Speedpath Causes Authentication To Fail To Initiate */
diff --git a/include/asm-blackfin/mach-bf548/bfin_serial_5xx.h b/include/asm-blackfin/mach-bf548/bfin_serial_5xx.h
index 5eb46a77d919..59b4ad4e5b4a 100644
--- a/include/asm-blackfin/mach-bf548/bfin_serial_5xx.h
+++ b/include/asm-blackfin/mach-bf548/bfin_serial_5xx.h
@@ -57,6 +57,12 @@
 #define UART_SET_DLAB(uart)     /* MMRs not muxed on BF54x */
 #define UART_CLEAR_DLAB(uart)   /* MMRs not muxed on BF54x */
+#define UART_GET_CTS(x) (UART_GET_MSR(x) & CTS)
+#define UART_SET_RTS(x) (UART_PUT_MCR(x, UART_GET_MCR(x) | MRTS))
+#define UART_CLEAR_RTS(x) (UART_PUT_MCR(x, UART_GET_MCR(x) & ~MRTS))
+#define UART_ENABLE_INTS(x, v) UART_SET_IER(x, v)
+#define UART_DISABLE_INTS(x) UART_CLEAR_IER(x, 0xF)
 #if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART1_CTSRTS)
 # define CONFIG_SERIAL_BFIN_CTSRTS
diff --git a/include/asm-blackfin/mach-bf561/anomaly.h b/include/asm-blackfin/mach-bf561/anomaly.h
index 82157caa96a2..5c5d7d7d695f 100644
--- a/include/asm-blackfin/mach-bf561/anomaly.h
+++ b/include/asm-blackfin/mach-bf561/anomaly.h
@@ -2,7 +2,7 @@
 * File: include/asm-blackfin/mach-bf561/anomaly.h
 * Bugs: Enter bugs at http://blackfin.uclinux.org/
 *
- * Copyright (C) 2004-2007 Analog Devices Inc.
+ * Copyright (C) 2004-2008 Analog Devices Inc.
 * Licensed under the GPL-2 or later.
 */
diff --git a/include/asm-blackfin/mach-bf561/bfin_serial_5xx.h b/include/asm-blackfin/mach-bf561/bfin_serial_5xx.h
index 7a9628769296..30d90b580f18 100644
--- a/include/asm-blackfin/mach-bf561/bfin_serial_5xx.h
+++ b/include/asm-blackfin/mach-bf561/bfin_serial_5xx.h
@@ -53,6 +53,12 @@
 #define UART_SET_DLAB(uart)     do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0)
 #define UART_CLEAR_DLAB(uart)   do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0)
+#define UART_GET_CTS(x) gpio_get_value(x->cts_pin)
+#define UART_SET_RTS(x) gpio_set_value(x->rts_pin, 1)
+#define UART_CLEAR_RTS(x) gpio_set_value(x->rts_pin, 0)
+#define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v)
+#define UART_DISABLE_INTS(x) UART_PUT_IER(x, 0)
 #ifdef CONFIG_BFIN_UART0_CTSRTS
 # define CONFIG_SERIAL_BFIN_CTSRTS
 # ifndef CONFIG_UART0_CTS_PIN
diff --git a/include/asm-blackfin/mach-bf561/dma.h b/include/asm-blackfin/mach-bf561/dma.h
index 21d982003e75..8bc46cd89a02 100644
--- a/include/asm-blackfin/mach-bf561/dma.h
+++ b/include/asm-blackfin/mach-bf561/dma.h
@@ -25,11 +25,11 @@
 #define CH_MEM_STREAM1_SRC      27       /* RX */
 #define CH_MEM_STREAM2_DEST     28
 #define CH_MEM_STREAM2_SRC      29
-#define CH_MEM_STREAM3_SRC      30
+#define CH_MEM_STREAM3_DEST     30
-#define CH_MEM_STREAM3_DEST     31
+#define CH_MEM_STREAM3_SRC      31
 #define CH_IMEM_STREAM0_DEST    32
 #define CH_IMEM_STREAM0_SRC     33
-#define CH_IMEM_STREAM1_SRC     34
+#define CH_IMEM_STREAM1_DEST    34
-#define CH_IMEM_STREAM1_DEST    35
+#define CH_IMEM_STREAM1_SRC     35
 #endif
diff --git a/include/asm-blackfin/serial.h b/include/asm-blackfin/serial.h
new file mode 100644
index 000000000000..994dd869558c
--- /dev/null
+++ b/include/asm-blackfin/serial.h
@@ -0,0 +1,5 @@
+/*
+ * include/asm-blackfin/serial.h
+ */
+#define SERIAL_EXTRA_IRQ_FLAGS IRQF_TRIGGER_HIGH
diff --git a/include/asm-frv/checksum.h b/include/asm-frv/checksum.h
index 9b1689850187..269da09ff637 100644
--- a/include/asm-frv/checksum.h
+++ b/include/asm-frv/checksum.h
@@ -75,7 +75,7 @@ __sum16 ip_fast_csum(const void *iph, unsigned int ihl)
            : "=r" (sum), "=r" (iph), "=r" (ihl), "=r" (inc), "=&r"(tmp)
            : "0" (sum), "1" (iph), "2" (ihl), "3" (4),
            "m"(*(volatile struct { int _[100]; } *)iph)
-            : "icc0", "icc1"
+            : "icc0", "icc1", "memory"
            );
        return (__force __sum16)~sum;
diff --git a/include/asm-frv/mem-layout.h b/include/asm-frv/mem-layout.h
index 734a1d0583b6..2947764fc0e0 100644
--- a/include/asm-frv/mem-layout.h
+++ b/include/asm-frv/mem-layout.h
@@ -31,6 +31,13 @@
 #define PAGE_MASK                       (~(PAGE_SIZE-1))
+/*
+ * the slab must be aligned such that load- and store-double instructions don't
+ * fault if used
+ */
+#define ARCH_KMALLOC_MINALIGN           8
+#define ARCH_SLAB_MINALIGN              8
 /*****************************************************************************/
 /*
 * virtual memory layout from kernel's point of view
diff --git a/include/asm-frv/system.h b/include/asm-frv/system.h
index cb307f8a6b48..d3a12a9079f7 100644
--- a/include/asm-frv/system.h
+++ b/include/asm-frv/system.h
@@ -179,7 +179,7 @@ do {							\
 #define mb()                    asm volatile ("membar" : : :"memory")
 #define rmb()                   asm volatile ("membar" : : :"memory")
 #define wmb()                   asm volatile ("membar" : : :"memory")
-#define read_barrier_depends()  barrier()
+#define read_barrier_depends()  do { } while (0)
 #ifdef CONFIG_SMP
 #define smp_mb()                        mb()
diff --git a/include/asm-generic/gpio.h b/include/asm-generic/gpio.h
index ecf675a59d21..6be061d09da9 100644
--- a/include/asm-generic/gpio.h
+++ b/include/asm-generic/gpio.h
@@ -1,8 +1,12 @@
 #ifndef _ASM_GENERIC_GPIO_H
 #define _ASM_GENERIC_GPIO_H
+#include <linux/types.h>
 #ifdef CONFIG_HAVE_GPIO_LIB
+#include <linux/compiler.h>
 /* Platforms may implement their GPIO interface with library code,
 * at a small performance cost for non-inlined operations and some
 * extra memory (for code and for per-GPIO table entries).
@@ -74,7 +78,7 @@ struct gpio_chip {
 extern const char *gpiochip_is_requested(struct gpio_chip *chip,
                        unsigned offset);
-extern int __init __must_check gpiochip_reserve(int start, int ngpio);
+extern int __must_check gpiochip_reserve(int start, int ngpio);
 /* add/remove chips */
 extern int gpiochip_add(struct gpio_chip *chip);
diff --git a/include/asm-h8300/cacheflush.h b/include/asm-h8300/cacheflush.h
index 71210d141b64..5ffdca217b95 100644
--- a/include/asm-h8300/cacheflush.h
+++ b/include/asm-h8300/cacheflush.h
@@ -3,7 +3,7 @@
 */
 #ifndef _ASM_H8300_CACHEFLUSH_H
-#define _AMS_H8300_CACHEFLUSH_H
+#define _ASM_H8300_CACHEFLUSH_H
 /*
 * Cache handling functions
diff --git a/include/asm-h8300/param.h b/include/asm-h8300/param.h
index 04f64f100379..1c72fb8080ff 100644
--- a/include/asm-h8300/param.h
+++ b/include/asm-h8300/param.h
@@ -1,14 +1,12 @@
 #ifndef _H8300_PARAM_H
 #define _H8300_PARAM_H
-#ifndef HZ
-#define HZ CONFIG_HZ
-#endif
 #ifdef __KERNEL__
+#define HZ              CONFIG_HZ
 #define USER_HZ         HZ
 #define CLOCKS_PER_SEC  (USER_HZ)
+#else
+#define HZ              100
 #endif
 #define EXEC_PAGESIZE   4096
diff --git a/include/asm-ia64/kvm.h b/include/asm-ia64/kvm.h
index eb2d3559d089..3f6a090cbd9a 100644
--- a/include/asm-ia64/kvm.h
+++ b/include/asm-ia64/kvm.h
@@ -22,14 +22,13 @@
 */
 #include <asm/types.h>
-#include <asm/fpu.h>
 #include <linux/ioctl.h>
 /* Architectural interrupt line count. */
 #define KVM_NR_INTERRUPTS 256
-#define KVM_IOAPIC_NUM_PINS  24
+#define KVM_IOAPIC_NUM_PINS  48
 struct kvm_ioapic_state {
        __u64 base_address;
@@ -61,6 +60,13 @@ struct kvm_ioapic_state {
 #define KVM_CONTEXT_SIZE        8*1024
+struct kvm_fpreg {
+        union {
+                unsigned long bits[2];
+                long double __dummy;    /* force 16-byte alignment */
+        } u;
+};
 union context {
        /* 8K size */
        char    dummy[KVM_CONTEXT_SIZE];
@@ -77,7 +83,7 @@ union context {
                unsigned long       ibr[8];
                unsigned long       dbr[8];
                unsigned long       pkr[8];
-                struct ia64_fpreg   fr[128];
+                struct kvm_fpreg   fr[128];
        };
 };
diff --git a/include/asm-ia64/machvec.h b/include/asm-ia64/machvec.h
index 9f020eb825c5..0721a5e8271e 100644
--- a/include/asm-ia64/machvec.h
+++ b/include/asm-ia64/machvec.h
@@ -126,6 +126,8 @@ extern void machvec_tlb_migrate_finish (struct mm_struct *);
 #  include <asm/machvec_hpzx1_swiotlb.h>
 # elif defined (CONFIG_IA64_SGI_SN2)
 #  include <asm/machvec_sn2.h>
+# elif defined (CONFIG_IA64_SGI_UV)
+#  include <asm/machvec_uv.h>
 # elif defined (CONFIG_IA64_GENERIC)
 # ifdef MACHVEC_PLATFORM_HEADER
diff --git a/include/asm-ia64/machvec_uv.h b/include/asm-ia64/machvec_uv.h
new file mode 100644
index 000000000000..2931447f3813
--- /dev/null
+++ b/include/asm-ia64/machvec_uv.h
@@ -0,0 +1,26 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * SGI UV Core Functions
+ *
+ * Copyright (C) 2008 Silicon Graphics, Inc. All rights reserved.
+ */
+#ifndef _ASM_IA64_MACHVEC_UV_H
+#define _ASM_IA64_MACHVEC_UV_H
+extern ia64_mv_setup_t uv_setup;
+/*
+ * This stuff has dual use!
+ *
+ * For a generic kernel, the macros are used to initialize the
+ * platform's machvec structure.  When compiling a non-generic kernel,
+ * the macros are used directly.
+ */
+#define platform_name                   "uv"
+#define platform_setup                  uv_setup
+#endif /* _ASM_IA64_MACHVEC_UV_H */
diff --git a/include/asm-ia64/patch.h b/include/asm-ia64/patch.h
index a71543084fb4..295fe6ab4584 100644
--- a/include/asm-ia64/patch.h
+++ b/include/asm-ia64/patch.h
@@ -21,6 +21,7 @@ extern void ia64_patch_imm60 (u64 insn_addr, u64 val);		/* patch "brl" w/ip-rel
 extern void ia64_patch_mckinley_e9 (unsigned long start, unsigned long end);
 extern void ia64_patch_vtop (unsigned long start, unsigned long end);
 extern void ia64_patch_phys_stack_reg(unsigned long val);
+extern void ia64_patch_rse (unsigned long start, unsigned long end);
 extern void ia64_patch_gate (void);
 #endif /* _ASM_IA64_PATCH_H */
diff --git a/include/asm-ia64/ptrace.h b/include/asm-ia64/ptrace.h
index 4b2a8d40ebc5..15f8dcfe6eee 100644
--- a/include/asm-ia64/ptrace.h
+++ b/include/asm-ia64/ptrace.h
@@ -76,7 +76,7 @@
 # define KERNEL_STACK_SIZE_ORDER                0
 #endif
-#define IA64_RBS_OFFSET                 ((IA64_TASK_SIZE + IA64_THREAD_INFO_SIZE + 15) & ~15)
+#define IA64_RBS_OFFSET                 ((IA64_TASK_SIZE + IA64_THREAD_INFO_SIZE + 31) & ~31)
 #define IA64_STK_OFFSET                 ((1 << KERNEL_STACK_SIZE_ORDER)*PAGE_SIZE)
 #define KERNEL_STACK_SIZE               IA64_STK_OFFSET
diff --git a/include/asm-ia64/sections.h b/include/asm-ia64/sections.h
index dc42a359894f..7286e4a9fe84 100644
--- a/include/asm-ia64/sections.h
+++ b/include/asm-ia64/sections.h
@@ -10,6 +10,7 @@
 extern char __per_cpu_start[], __per_cpu_end[], __phys_per_cpu_start[];
 extern char __start___vtop_patchlist[], __end___vtop_patchlist[];
+extern char __start___rse_patchlist[], __end___rse_patchlist[];
 extern char __start___mckinley_e9_bundles[], __end___mckinley_e9_bundles[];
 extern char __start___phys_stack_reg_patchlist[], __end___phys_stack_reg_patchlist[];
 extern char __start_gate_section[];
diff --git a/include/asm-ia64/uv/uv_hub.h b/include/asm-ia64/uv/uv_hub.h
new file mode 100644
index 000000000000..f607018af4a1
--- /dev/null
+++ b/include/asm-ia64/uv/uv_hub.h
@@ -0,0 +1,309 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * SGI UV architectural definitions
+ *
+ * Copyright (C) 2008 Silicon Graphics, Inc. All rights reserved.
+ */
+#ifndef __ASM_IA64_UV_HUB_H__
+#define __ASM_IA64_UV_HUB_H__
+#include <linux/numa.h>
+#include <linux/percpu.h>
+#include <asm/types.h>
+#include <asm/percpu.h>
+/*
+ * Addressing Terminology
+ *
+ *      M       - The low M bits of a physical address represent the offset
+ *                into the blade local memory. RAM memory on a blade is physically
+ *                contiguous (although various IO spaces may punch holes in
+ *                it)..
+ *
+ *      N       - Number of bits in the node portion of a socket physical
+ *                address.
+ *
+ *      NASID   - network ID of a router, Mbrick or Cbrick. Nasid values of
+ *                routers always have low bit of 1, C/MBricks have low bit
+ *                equal to 0. Most addressing macros that target UV hub chips
+ *                right shift the NASID by 1 to exclude the always-zero bit.
+ *                NASIDs contain up to 15 bits.
+ *
+ *      GNODE   - NASID right shifted by 1 bit. Most mmrs contain gnodes instead
+ *                of nasids.
+ *
+ *      PNODE   - the low N bits of the GNODE. The PNODE is the most useful variant
+ *                of the nasid for socket usage.
+ *
+ *
+ *  NumaLink Global Physical Address Format:
+ *  +--------------------------------+---------------------+
+ *  |00..000|      GNODE             |      NodeOffset     |
+ *  +--------------------------------+---------------------+
+ *          |<-------53 - M bits --->|<--------M bits ----->
+ *
+ *      M - number of node offset bits (35 .. 40)
+ *
+ *
+ *  Memory/UV-HUB Processor Socket Address Format:
+ *  +----------------+---------------+---------------------+
+ *  |00..000000000000|   PNODE       |      NodeOffset     |
+ *  +----------------+---------------+---------------------+
+ *                   <--- N bits --->|<--------M bits ----->
+ *
+ *      M - number of node offset bits (35 .. 40)
+ *      N - number of PNODE bits (0 .. 10)
+ *
+ *              Note: M + N cannot currently exceed 44 (x86_64) or 46 (IA64).
+ *              The actual values are configuration dependent and are set at
+ *              boot time. M & N values are set by the hardware/BIOS at boot.
+ */
+/*
+ * Maximum number of bricks in all partitions and in all coherency domains.
+ * This is the total number of bricks accessible in the numalink fabric. It
+ * includes all C & M bricks. Routers are NOT included.
+ *
+ * This value is also the value of the maximum number of non-router NASIDs
+ * in the numalink fabric.
+ *
+ * NOTE: a brick may contain 1 or 2 OS nodes. Don't get these confused.
+ */
+#define UV_MAX_NUMALINK_BLADES  16384
+/*
+ * Maximum number of C/Mbricks within a software SSI (hardware may support
+ * more).
+ */
+#define UV_MAX_SSI_BLADES       1
+/*
+ * The largest possible NASID of a C or M brick (+ 2)
+ */
+#define UV_MAX_NASID_VALUE      (UV_MAX_NUMALINK_NODES * 2)
+/*
+ * The following defines attributes of the HUB chip. These attributes are
+ * frequently referenced and are kept in the per-cpu data areas of each cpu.
+ * They are kept together in a struct to minimize cache misses.
+ */
+struct uv_hub_info_s {
+        unsigned long   global_mmr_base;
+        unsigned long   gpa_mask;
+        unsigned long   gnode_upper;
+        unsigned long   lowmem_remap_top;
+        unsigned long   lowmem_remap_base;
+        unsigned short  pnode;
+        unsigned short  pnode_mask;
+        unsigned short  coherency_domain_number;
+        unsigned short  numa_blade_id;
+        unsigned char   blade_processor_id;
+        unsigned char   m_val;
+        unsigned char   n_val;
+};
+DECLARE_PER_CPU(struct uv_hub_info_s, __uv_hub_info);
+#define uv_hub_info             (&__get_cpu_var(__uv_hub_info))
+#define uv_cpu_hub_info(cpu)    (&per_cpu(__uv_hub_info, cpu))
+/*
+ * Local & Global MMR space macros.
+ *      Note: macros are intended to be used ONLY by inline functions
+ *      in this file - not by other kernel code.
+ *              n -  NASID (full 15-bit global nasid)
+ *              g -  GNODE (full 15-bit global nasid, right shifted 1)
+ *              p -  PNODE (local part of nsids, right shifted 1)
+ */
+#define UV_NASID_TO_PNODE(n)            (((n) >> 1) & uv_hub_info->pnode_mask)
+#define UV_PNODE_TO_NASID(p)            (((p) << 1) | uv_hub_info->gnode_upper)
+#define UV_LOCAL_MMR_BASE               0xf4000000UL
+#define UV_GLOBAL_MMR32_BASE            0xf8000000UL
+#define UV_GLOBAL_MMR64_BASE            (uv_hub_info->global_mmr_base)
+#define UV_GLOBAL_MMR32_PNODE_SHIFT     15
+#define UV_GLOBAL_MMR64_PNODE_SHIFT     26
+#define UV_GLOBAL_MMR32_PNODE_BITS(p)   ((p) << (UV_GLOBAL_MMR32_PNODE_SHIFT))
+#define UV_GLOBAL_MMR64_PNODE_BITS(p)                                   \
+        ((unsigned long)(p) << UV_GLOBAL_MMR64_PNODE_SHIFT)
+/*
+ * Macros for converting between kernel virtual addresses, socket local physical
+ * addresses, and UV global physical addresses.
+ *      Note: use the standard __pa() & __va() macros for converting
+ *            between socket virtual and socket physical addresses.
+ */
+/* socket phys RAM --> UV global physical address */
+static inline unsigned long uv_soc_phys_ram_to_gpa(unsigned long paddr)
+{
+        if (paddr < uv_hub_info->lowmem_remap_top)
+                paddr += uv_hub_info->lowmem_remap_base;
+        return paddr | uv_hub_info->gnode_upper;
+}
+/* socket virtual --> UV global physical address */
+static inline unsigned long uv_gpa(void *v)
+{
+        return __pa(v) | uv_hub_info->gnode_upper;
+}
+/* socket virtual --> UV global physical address */
+static inline void *uv_vgpa(void *v)
+{
+        return (void *)uv_gpa(v);
+}
+/* UV global physical address --> socket virtual */
+static inline void *uv_va(unsigned long gpa)
+{
+        return __va(gpa & uv_hub_info->gpa_mask);
+}
+/* pnode, offset --> socket virtual */
+static inline void *uv_pnode_offset_to_vaddr(int pnode, unsigned long offset)
+{
+        return __va(((unsigned long)pnode << uv_hub_info->m_val) | offset);
+}
+/*
+ * Access global MMRs using the low memory MMR32 space. This region supports
+ * faster MMR access but not all MMRs are accessible in this space.
+ */
+static inline unsigned long *uv_global_mmr32_address(int pnode,
+                                unsigned long offset)
+{
+        return __va(UV_GLOBAL_MMR32_BASE |
+                       UV_GLOBAL_MMR32_PNODE_BITS(pnode) | offset);
+}
+static inline void uv_write_global_mmr32(int pnode, unsigned long offset,
+                                 unsigned long val)
+{
+        *uv_global_mmr32_address(pnode, offset) = val;
+}
+static inline unsigned long uv_read_global_mmr32(int pnode,
+                                                 unsigned long offset)
+{
+        return *uv_global_mmr32_address(pnode, offset);
+}
+/*
+ * Access Global MMR space using the MMR space located at the top of physical
+ * memory.
+ */
+static inline unsigned long *uv_global_mmr64_address(int pnode,
+                                unsigned long offset)
+{
+        return __va(UV_GLOBAL_MMR64_BASE |
+                    UV_GLOBAL_MMR64_PNODE_BITS(pnode) | offset);
+}
+static inline void uv_write_global_mmr64(int pnode, unsigned long offset,
+                                unsigned long val)
+{
+        *uv_global_mmr64_address(pnode, offset) = val;
+}
+static inline unsigned long uv_read_global_mmr64(int pnode,
+                                                 unsigned long offset)
+{
+        return *uv_global_mmr64_address(pnode, offset);
+}
+/*
+ * Access hub local MMRs. Faster than using global space but only local MMRs
+ * are accessible.
+ */
+static inline unsigned long *uv_local_mmr_address(unsigned long offset)
+{
+        return __va(UV_LOCAL_MMR_BASE | offset);
+}
+static inline unsigned long uv_read_local_mmr(unsigned long offset)
+{
+        return *uv_local_mmr_address(offset);
+}
+static inline void uv_write_local_mmr(unsigned long offset, unsigned long val)
+{
+        *uv_local_mmr_address(offset) = val;
+}
+/*
+ * Structures and definitions for converting between cpu, node, pnode, and blade
+ * numbers.
+ */
+/* Blade-local cpu number of current cpu. Numbered 0 .. <# cpus on the blade> */
+static inline int uv_blade_processor_id(void)
+{
+        return smp_processor_id();
+}
+/* Blade number of current cpu. Numnbered 0 .. <#blades -1> */
+static inline int uv_numa_blade_id(void)
+{
+        return 0;
+}
+/* Convert a cpu number to the the UV blade number */
+static inline int uv_cpu_to_blade_id(int cpu)
+{
+        return 0;
+}
+/* Convert linux node number to the UV blade number */
+static inline int uv_node_to_blade_id(int nid)
+{
+        return 0;
+}
+/* Convert a blade id to the PNODE of the blade */
+static inline int uv_blade_to_pnode(int bid)
+{
+        return 0;
+}
+/* Determine the number of possible cpus on a blade */
+static inline int uv_blade_nr_possible_cpus(int bid)
+{
+        return num_possible_cpus();
+}
+/* Determine the number of online cpus on a blade */
+static inline int uv_blade_nr_online_cpus(int bid)
+{
+        return num_online_cpus();
+}
+/* Convert a cpu id to the PNODE of the blade containing the cpu */
+static inline int uv_cpu_to_pnode(int cpu)
+{
+        return 0;
+}
+/* Convert a linux node number to the PNODE of the blade */
+static inline int uv_node_to_pnode(int nid)
+{
+        return 0;
+}
+/* Maximum possible number of blades */
+static inline int uv_num_possible_blades(void)
+{
+        return 1;
+}
+#endif /* __ASM_IA64_UV_HUB__ */
diff --git a/include/asm-ia64/uv/uv_mmrs.h b/include/asm-ia64/uv/uv_mmrs.h
new file mode 100644
index 000000000000..1cc1dbb0182f
--- /dev/null
+++ b/include/asm-ia64/uv/uv_mmrs.h
@@ -0,0 +1,266 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * SGI UV MMR definitions
+ *
+ * Copyright (C) 2007-2008 Silicon Graphics, Inc. All rights reserved.
+ */
+#ifndef __ASM_IA64_UV_MMRS__
+#define __ASM_IA64_UV_MMRS__
+/*
+ *       AUTO GENERATED - Do not edit
+ */
+ #define UV_MMR_ENABLE          (1UL << 63)
+/* ========================================================================= */
+/*                               UVH_NODE_ID                                 */
+/* ========================================================================= */
+#define UVH_NODE_ID 0x0UL
+#define UVH_NODE_ID_FORCE1_SHFT 0
+#define UVH_NODE_ID_FORCE1_MASK 0x0000000000000001UL
+#define UVH_NODE_ID_MANUFACTURER_SHFT 1
+#define UVH_NODE_ID_MANUFACTURER_MASK 0x0000000000000ffeUL
+#define UVH_NODE_ID_PART_NUMBER_SHFT 12
+#define UVH_NODE_ID_PART_NUMBER_MASK 0x000000000ffff000UL
+#define UVH_NODE_ID_REVISION_SHFT 28
+#define UVH_NODE_ID_REVISION_MASK 0x00000000f0000000UL
+#define UVH_NODE_ID_NODE_ID_SHFT 32
+#define UVH_NODE_ID_NODE_ID_MASK 0x00007fff00000000UL
+#define UVH_NODE_ID_NODES_PER_BIT_SHFT 48
+#define UVH_NODE_ID_NODES_PER_BIT_MASK 0x007f000000000000UL
+#define UVH_NODE_ID_NI_PORT_SHFT 56
+#define UVH_NODE_ID_NI_PORT_MASK 0x0f00000000000000UL
+union uvh_node_id_u {
+    unsigned long       v;
+    struct uvh_node_id_s {
+        unsigned long   force1        :  1;  /* RO */
+        unsigned long   manufacturer  : 11;  /* RO */
+        unsigned long   part_number   : 16;  /* RO */
+        unsigned long   revision      :  4;  /* RO */
+        unsigned long   node_id       : 15;  /* RW */
+        unsigned long   rsvd_47       :  1;  /*    */
+        unsigned long   nodes_per_bit :  7;  /* RW */
+        unsigned long   rsvd_55       :  1;  /*    */
+        unsigned long   ni_port       :  4;  /* RO */
+        unsigned long   rsvd_60_63    :  4;  /*    */
+    } s;
+};
+/* ========================================================================= */
+/*                UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_0_MMR                  */
+/* ========================================================================= */
+#define UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_0_MMR 0x16000d0UL
+#define UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_0_MMR_DEST_BASE_SHFT 24
+#define UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_0_MMR_DEST_BASE_MASK 0x00003fffff000000UL
+union uvh_rh_gam_alias210_redirect_config_0_mmr_u {
+    unsigned long       v;
+    struct uvh_rh_gam_alias210_redirect_config_0_mmr_s {
+        unsigned long   rsvd_0_23 : 24;  /*    */
+        unsigned long   dest_base : 22;  /* RW */
+        unsigned long   rsvd_46_63: 18;  /*    */
+    } s;
+};
+/* ========================================================================= */
+/*                UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_1_MMR                  */
+/* ========================================================================= */
+#define UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_1_MMR 0x16000e0UL
+#define UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_1_MMR_DEST_BASE_SHFT 24
+#define UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_1_MMR_DEST_BASE_MASK 0x00003fffff000000UL
+union uvh_rh_gam_alias210_redirect_config_1_mmr_u {
+    unsigned long       v;
+    struct uvh_rh_gam_alias210_redirect_config_1_mmr_s {
+        unsigned long   rsvd_0_23 : 24;  /*    */
+        unsigned long   dest_base : 22;  /* RW */
+        unsigned long   rsvd_46_63: 18;  /*    */
+    } s;
+};
+/* ========================================================================= */
+/*                UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_2_MMR                  */
+/* ========================================================================= */
+#define UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_2_MMR 0x16000f0UL
+#define UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_2_MMR_DEST_BASE_SHFT 24
+#define UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_2_MMR_DEST_BASE_MASK 0x00003fffff000000UL
+union uvh_rh_gam_alias210_redirect_config_2_mmr_u {
+    unsigned long       v;
+    struct uvh_rh_gam_alias210_redirect_config_2_mmr_s {
+        unsigned long   rsvd_0_23 : 24;  /*    */
+        unsigned long   dest_base : 22;  /* RW */
+        unsigned long   rsvd_46_63: 18;  /*    */
+    } s;
+};
+/* ========================================================================= */
+/*                    UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR                      */
+/* ========================================================================= */
+#define UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR 0x1600010UL
+#define UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR_BASE_SHFT 28
+#define UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR_BASE_MASK 0x00003ffff0000000UL
+#define UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR_GR4_SHFT 46
+#define UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR_GR4_MASK 0x0000400000000000UL
+#define UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR_N_GRU_SHFT 52
+#define UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR_N_GRU_MASK 0x00f0000000000000UL
+#define UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR_ENABLE_SHFT 63
+#define UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR_ENABLE_MASK 0x8000000000000000UL
+union uvh_rh_gam_gru_overlay_config_mmr_u {
+    unsigned long       v;
+    struct uvh_rh_gam_gru_overlay_config_mmr_s {
+        unsigned long   rsvd_0_27: 28;  /*    */
+        unsigned long   base   : 18;  /* RW */
+        unsigned long   gr4    :  1;  /* RW */
+        unsigned long   rsvd_47_51:  5;  /*    */
+        unsigned long   n_gru  :  4;  /* RW */
+        unsigned long   rsvd_56_62:  7;  /*    */
+        unsigned long   enable :  1;  /* RW */
+    } s;
+};
+/* ========================================================================= */
+/*                    UVH_RH_GAM_MMR_OVERLAY_CONFIG_MMR                      */
+/* ========================================================================= */
+#define UVH_RH_GAM_MMR_OVERLAY_CONFIG_MMR 0x1600028UL
+#define UVH_RH_GAM_MMR_OVERLAY_CONFIG_MMR_BASE_SHFT 26
+#define UVH_RH_GAM_MMR_OVERLAY_CONFIG_MMR_BASE_MASK 0x00003ffffc000000UL
+#define UVH_RH_GAM_MMR_OVERLAY_CONFIG_MMR_DUAL_HUB_SHFT 46
+#define UVH_RH_GAM_MMR_OVERLAY_CONFIG_MMR_DUAL_HUB_MASK 0x0000400000000000UL
+#define UVH_RH_GAM_MMR_OVERLAY_CONFIG_MMR_ENABLE_SHFT 63
+#define UVH_RH_GAM_MMR_OVERLAY_CONFIG_MMR_ENABLE_MASK 0x8000000000000000UL
+union uvh_rh_gam_mmr_overlay_config_mmr_u {
+    unsigned long       v;
+    struct uvh_rh_gam_mmr_overlay_config_mmr_s {
+        unsigned long   rsvd_0_25: 26;  /*    */
+        unsigned long   base     : 20;  /* RW */
+        unsigned long   dual_hub :  1;  /* RW */
+        unsigned long   rsvd_47_62: 16;  /*    */
+        unsigned long   enable   :  1;  /* RW */
+    } s;
+};
+/* ========================================================================= */
+/*                                 UVH_RTC                                   */
+/* ========================================================================= */
+#define UVH_RTC 0x28000UL
+#define UVH_RTC_REAL_TIME_CLOCK_SHFT 0
+#define UVH_RTC_REAL_TIME_CLOCK_MASK 0x00ffffffffffffffUL
+union uvh_rtc_u {
+    unsigned long       v;
+    struct uvh_rtc_s {
+        unsigned long   real_time_clock : 56;  /* RW */
+        unsigned long   rsvd_56_63      :  8;  /*    */
+    } s;
+};
+/* ========================================================================= */
+/*                          UVH_SI_ADDR_MAP_CONFIG                           */
+/* ========================================================================= */
+#define UVH_SI_ADDR_MAP_CONFIG 0xc80000UL
+#define UVH_SI_ADDR_MAP_CONFIG_M_SKT_SHFT 0
+#define UVH_SI_ADDR_MAP_CONFIG_M_SKT_MASK 0x000000000000003fUL
+#define UVH_SI_ADDR_MAP_CONFIG_N_SKT_SHFT 8
+#define UVH_SI_ADDR_MAP_CONFIG_N_SKT_MASK 0x0000000000000f00UL
+union uvh_si_addr_map_config_u {
+    unsigned long       v;
+    struct uvh_si_addr_map_config_s {
+        unsigned long   m_skt :  6;  /* RW */
+        unsigned long   rsvd_6_7:  2;  /*    */
+        unsigned long   n_skt :  4;  /* RW */
+        unsigned long   rsvd_12_63: 52;  /*    */
+    } s;
+};
+/* ========================================================================= */
+/*                       UVH_SI_ALIAS0_OVERLAY_CONFIG                        */
+/* ========================================================================= */
+#define UVH_SI_ALIAS0_OVERLAY_CONFIG 0xc80008UL
+#define UVH_SI_ALIAS0_OVERLAY_CONFIG_BASE_SHFT 24
+#define UVH_SI_ALIAS0_OVERLAY_CONFIG_BASE_MASK 0x00000000ff000000UL
+#define UVH_SI_ALIAS0_OVERLAY_CONFIG_M_ALIAS_SHFT 48
+#define UVH_SI_ALIAS0_OVERLAY_CONFIG_M_ALIAS_MASK 0x001f000000000000UL
+#define UVH_SI_ALIAS0_OVERLAY_CONFIG_ENABLE_SHFT 63
+#define UVH_SI_ALIAS0_OVERLAY_CONFIG_ENABLE_MASK 0x8000000000000000UL
+union uvh_si_alias0_overlay_config_u {
+    unsigned long       v;
+    struct uvh_si_alias0_overlay_config_s {
+        unsigned long   rsvd_0_23: 24;  /*    */
+        unsigned long   base    :  8;  /* RW */
+        unsigned long   rsvd_32_47: 16;  /*    */
+        unsigned long   m_alias :  5;  /* RW */
+        unsigned long   rsvd_53_62: 10;  /*    */
+        unsigned long   enable  :  1;  /* RW */
+    } s;
+};
+/* ========================================================================= */
+/*                       UVH_SI_ALIAS1_OVERLAY_CONFIG                        */
+/* ========================================================================= */
+#define UVH_SI_ALIAS1_OVERLAY_CONFIG 0xc80010UL
+#define UVH_SI_ALIAS1_OVERLAY_CONFIG_BASE_SHFT 24
+#define UVH_SI_ALIAS1_OVERLAY_CONFIG_BASE_MASK 0x00000000ff000000UL
+#define UVH_SI_ALIAS1_OVERLAY_CONFIG_M_ALIAS_SHFT 48
+#define UVH_SI_ALIAS1_OVERLAY_CONFIG_M_ALIAS_MASK 0x001f000000000000UL
+#define UVH_SI_ALIAS1_OVERLAY_CONFIG_ENABLE_SHFT 63
+#define UVH_SI_ALIAS1_OVERLAY_CONFIG_ENABLE_MASK 0x8000000000000000UL
+union uvh_si_alias1_overlay_config_u {
+    unsigned long       v;
+    struct uvh_si_alias1_overlay_config_s {
+        unsigned long   rsvd_0_23: 24;  /*    */
+        unsigned long   base    :  8;  /* RW */
+        unsigned long   rsvd_32_47: 16;  /*    */
+        unsigned long   m_alias :  5;  /* RW */
+        unsigned long   rsvd_53_62: 10;  /*    */
+        unsigned long   enable  :  1;  /* RW */
+    } s;
+};
+/* ========================================================================= */
+/*                       UVH_SI_ALIAS2_OVERLAY_CONFIG                        */
+/* ========================================================================= */
+#define UVH_SI_ALIAS2_OVERLAY_CONFIG 0xc80018UL
+#define UVH_SI_ALIAS2_OVERLAY_CONFIG_BASE_SHFT 24
+#define UVH_SI_ALIAS2_OVERLAY_CONFIG_BASE_MASK 0x00000000ff000000UL
+#define UVH_SI_ALIAS2_OVERLAY_CONFIG_M_ALIAS_SHFT 48
+#define UVH_SI_ALIAS2_OVERLAY_CONFIG_M_ALIAS_MASK 0x001f000000000000UL
+#define UVH_SI_ALIAS2_OVERLAY_CONFIG_ENABLE_SHFT 63
+#define UVH_SI_ALIAS2_OVERLAY_CONFIG_ENABLE_MASK 0x8000000000000000UL
+union uvh_si_alias2_overlay_config_u {
+    unsigned long       v;
+    struct uvh_si_alias2_overlay_config_s {
+        unsigned long   rsvd_0_23: 24;  /*    */
+        unsigned long   base    :  8;  /* RW */
+        unsigned long   rsvd_32_47: 16;  /*    */
+        unsigned long   m_alias :  5;  /* RW */
+        unsigned long   rsvd_53_62: 10;  /*    */
+        unsigned long   enable  :  1;  /* RW */
+    } s;
+};
+#endif /* __ASM_IA64_UV_MMRS__ */
diff --git a/include/asm-m32r/uaccess.h b/include/asm-m32r/uaccess.h
index bd8c83765a5c..1c7047bea200 100644
--- a/include/asm-m32r/uaccess.h
+++ b/include/asm-m32r/uaccess.h
@@ -14,6 +14,7 @@
 #include <linux/errno.h>
 #include <linux/thread_info.h>
 #include <asm/page.h>
+#include <asm/setup.h>
 #define VERIFY_READ 0
 #define VERIFY_WRITE 1
@@ -106,7 +107,6 @@ static inline void set_fs(mm_segment_t s)
 #else
 static inline int access_ok(int type, const void *addr, unsigned long size)
 {
-        extern unsigned long memory_start, memory_end;
        unsigned long val = (unsigned long)addr;
        return ((val >= memory_start) && ((val + size) < memory_end));
diff --git a/include/asm-m68k/bitops.h b/include/asm-m68k/bitops.h
index 83d1f286230b..3e8106442d5a 100644
--- a/include/asm-m68k/bitops.h
+++ b/include/asm-m68k/bitops.h
@@ -410,8 +410,49 @@ static inline int ext2_find_next_zero_bit(const void *vaddr, unsigned size,
        res = ext2_find_first_zero_bit (p, size - 32 * (p - addr));
        return (p - addr) * 32 + res;
 }
-#define ext2_find_next_bit(addr, size, off) \
-        generic_find_next_le_bit((unsigned long *)(addr), (size), (off))
+static inline int ext2_find_first_bit(const void *vaddr, unsigned size)
+{
+        const unsigned long *p = vaddr, *addr = vaddr;
+        int res;
+        if (!size)
+                return 0;
+        size = (size >> 5) + ((size & 31) > 0);
+        while (*p++ == 0UL) {
+                if (--size == 0)
+                        return (p - addr) << 5;
+        }
+        --p;
+        for (res = 0; res < 32; res++)
+                if (ext2_test_bit(res, p))
+                        break;
+        return (p - addr) * 32 + res;
+}
+static inline int ext2_find_next_bit(const void *vaddr, unsigned size,
+                                     unsigned offset)
+{
+        const unsigned long *addr = vaddr;
+        const unsigned long *p = addr + (offset >> 5);
+        int bit = offset & 31UL, res;
+        if (offset >= size)
+                return size;
+        if (bit) {
+                /* Look for one in first longword */
+                for (res = bit; res < 32; res++)
+                        if (ext2_test_bit(res, p))
+                                return (p - addr) * 32 + res;
+                p++;
+        }
+        /* No set bit yet, search remaining full bytes for a set bit */
+        res = ext2_find_first_bit(p, size - 32 * (p - addr));
+        return (p - addr) * 32 + res;
+}
 #endif /* __KERNEL__ */
diff --git a/include/asm-m68k/bug.h b/include/asm-m68k/bug.h
index 7b60776cc966..e5b528deb8a8 100644
--- a/include/asm-m68k/bug.h
+++ b/include/asm-m68k/bug.h
@@ -7,7 +7,7 @@
 #ifndef CONFIG_SUN3
 #define BUG() do { \
        printk("kernel BUG at %s:%d!\n", __FILE__, __LINE__); \
-        asm volatile("illegal"); \
+        __builtin_trap(); \
 } while (0)
 #else
 #define BUG() do { \
@@ -17,7 +17,7 @@
 #endif
 #else
 #define BUG() do { \
-        asm volatile("illegal"); \
+        __builtin_trap(); \
 } while (0)
 #endif
diff --git a/include/asm-m68k/io.h b/include/asm-m68k/io.h
index baf4f9b8acfc..657187f0c7c2 100644
--- a/include/asm-m68k/io.h
+++ b/include/asm-m68k/io.h
@@ -91,20 +91,20 @@ extern unsigned long gg2_isa_base;
 #undef MULTI_ISA
 #endif
-#define Q40_ISA (1)
+#define ISA_TYPE_Q40 (1)
-#define GG2_ISA (2)
+#define ISA_TYPE_GG2 (2)
-#define AG_ISA  (3)
+#define ISA_TYPE_AG  (3)
 #if defined(CONFIG_Q40) && !defined(MULTI_ISA)
-#define ISA_TYPE Q40_ISA
+#define ISA_TYPE ISA_TYPE_Q40
 #define ISA_SEX  0
 #endif
 #if defined(CONFIG_AMIGA_PCMCIA) && !defined(MULTI_ISA)
-#define ISA_TYPE AG_ISA
+#define ISA_TYPE ISA_TYPE_AG
 #define ISA_SEX  1
 #endif
 #if defined(CONFIG_GG2) && !defined(MULTI_ISA)
-#define ISA_TYPE GG2_ISA
+#define ISA_TYPE ISA_TYPE_GG2
 #define ISA_SEX  0
 #endif
@@ -126,13 +126,13 @@ static inline u8 __iomem *isa_itb(unsigned long addr)
  switch(ISA_TYPE)
    {
 #ifdef CONFIG_Q40
-    case Q40_ISA: return (u8 __iomem *)Q40_ISA_IO_B(addr);
+    case ISA_TYPE_Q40: return (u8 __iomem *)Q40_ISA_IO_B(addr);
 #endif
 #ifdef CONFIG_GG2
-    case GG2_ISA: return (u8 __iomem *)GG2_ISA_IO_B(addr);
+    case ISA_TYPE_GG2: return (u8 __iomem *)GG2_ISA_IO_B(addr);
 #endif
 #ifdef CONFIG_AMIGA_PCMCIA
-    case AG_ISA: return (u8 __iomem *)AG_ISA_IO_B(addr);
+    case ISA_TYPE_AG: return (u8 __iomem *)AG_ISA_IO_B(addr);
 #endif
    default: return NULL; /* avoid warnings, just in case */
    }
@@ -142,13 +142,13 @@ static inline u16 __iomem *isa_itw(unsigned long addr)
  switch(ISA_TYPE)
    {
 #ifdef CONFIG_Q40
-    case Q40_ISA: return (u16 __iomem *)Q40_ISA_IO_W(addr);
+    case ISA_TYPE_Q40: return (u16 __iomem *)Q40_ISA_IO_W(addr);
 #endif
 #ifdef CONFIG_GG2
-    case GG2_ISA: return (u16 __iomem *)GG2_ISA_IO_W(addr);
+    case ISA_TYPE_GG2: return (u16 __iomem *)GG2_ISA_IO_W(addr);
 #endif
 #ifdef CONFIG_AMIGA_PCMCIA
-    case AG_ISA: return (u16 __iomem *)AG_ISA_IO_W(addr);
+    case ISA_TYPE_AG: return (u16 __iomem *)AG_ISA_IO_W(addr);
 #endif
    default: return NULL; /* avoid warnings, just in case */
    }
@@ -158,7 +158,7 @@ static inline u32 __iomem *isa_itl(unsigned long addr)
  switch(ISA_TYPE)
    {
 #ifdef CONFIG_AMIGA_PCMCIA
-    case AG_ISA: return (u32 __iomem *)AG_ISA_IO_W(addr);
+    case ISA_TYPE_AG: return (u32 __iomem *)AG_ISA_IO_W(addr);
 #endif
    default: return 0; /* avoid warnings, just in case */
    }
@@ -168,13 +168,13 @@ static inline u8 __iomem *isa_mtb(unsigned long addr)
  switch(ISA_TYPE)
    {
 #ifdef CONFIG_Q40
-    case Q40_ISA: return (u8 __iomem *)Q40_ISA_MEM_B(addr);
+    case ISA_TYPE_Q40: return (u8 __iomem *)Q40_ISA_MEM_B(addr);
 #endif
 #ifdef CONFIG_GG2
-    case GG2_ISA: return (u8 __iomem *)GG2_ISA_MEM_B(addr);
+    case ISA_TYPE_GG2: return (u8 __iomem *)GG2_ISA_MEM_B(addr);
 #endif
 #ifdef CONFIG_AMIGA_PCMCIA
-    case AG_ISA: return (u8 __iomem *)addr;
+    case ISA_TYPE_AG: return (u8 __iomem *)addr;
 #endif
    default: return NULL; /* avoid warnings, just in case */
    }
@@ -184,13 +184,13 @@ static inline u16 __iomem *isa_mtw(unsigned long addr)
  switch(ISA_TYPE)
    {
 #ifdef CONFIG_Q40
-    case Q40_ISA: return (u16 __iomem *)Q40_ISA_MEM_W(addr);
+    case ISA_TYPE_Q40: return (u16 __iomem *)Q40_ISA_MEM_W(addr);
 #endif
 #ifdef CONFIG_GG2
-    case GG2_ISA: return (u16 __iomem *)GG2_ISA_MEM_W(addr);
+    case ISA_TYPE_GG2: return (u16 __iomem *)GG2_ISA_MEM_W(addr);
 #endif
 #ifdef CONFIG_AMIGA_PCMCIA
-    case AG_ISA: return (u16 __iomem *)addr;
+    case ISA_TYPE_AG: return (u16 __iomem *)addr;
 #endif
    default: return NULL; /* avoid warnings, just in case */
    }
@@ -218,13 +218,13 @@ static inline void isa_delay(void)
  switch(ISA_TYPE)
    {
 #ifdef CONFIG_Q40
-    case Q40_ISA: isa_outb(0,0x80); break;
+    case ISA_TYPE_Q40: isa_outb(0,0x80); break;
 #endif
 #ifdef CONFIG_GG2
-    case GG2_ISA: break;
+    case ISA_TYPE_GG2: break;
 #endif
 #ifdef CONFIG_AMIGA_PCMCIA
-    case AG_ISA: break;
+    case ISA_TYPE_AG: break;
 #endif
    default: break; /* avoid warnings */
    }
diff --git a/include/asm-m68k/setup.h b/include/asm-m68k/setup.h
index 2a8853cd6554..4dfb3952b375 100644
--- a/include/asm-m68k/setup.h
+++ b/include/asm-m68k/setup.h
@@ -248,7 +248,7 @@ extern unsigned long m68k_machtype;
 #ifndef __ASSEMBLY__
 extern unsigned long m68k_cputype;
 extern unsigned long m68k_fputype;
-extern unsigned long m68k_mmutype;              /* Not really used yet */
+extern unsigned long m68k_mmutype;
 #ifdef CONFIG_VME
 extern unsigned long vme_brdtype;
 #endif
diff --git a/include/asm-m68k/uaccess.h b/include/asm-m68k/uaccess.h
index 5c1264cf0c65..7107f3fbdbb6 100644
--- a/include/asm-m68k/uaccess.h
+++ b/include/asm-m68k/uaccess.h
@@ -14,7 +14,11 @@
 #define VERIFY_WRITE    1
 /* We let the MMU do all checking */
-#define access_ok(type,addr,size) 1
+static inline int access_ok(int type, const void __user *addr,
+                            unsigned long size)
+{
+        return 1;
+}
 /*
 * The exception table consists of pairs of addresses: the first is the
diff --git a/include/asm-mips/bitops.h b/include/asm-mips/bitops.h
index c2bd126c3b4e..642724734eba 100644
--- a/include/asm-mips/bitops.h
+++ b/include/asm-mips/bitops.h
@@ -558,11 +558,13 @@ static inline void __clear_bit_unlock(unsigned long nr, volatile unsigned long *
        __clear_bit(nr, addr);
 }
+#if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64)
 /*
 * Return the bit position (0..63) of the most significant 1 bit in a word
 * Returns -1 if no 1 bit exists
 */
-static inline int __ilog2(unsigned long x)
+static inline unsigned long __fls(unsigned long x)
 {
        int lz;
@@ -591,13 +593,6 @@ static inline int __ilog2(unsigned long x)
        return 63 - lz;
 }
-static inline unsigned long __fls(unsigned long x)
-{
-        return __ilog2(x);
-}
-#if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64)
 /*
 * __ffs - find first bit in word.
 * @word: The word to search
@@ -607,7 +602,7 @@ static inline unsigned long __fls(unsigned long x)
 */
 static inline unsigned long __ffs(unsigned long word)
 {
-        return __ilog2(word & -word);
+        return __fls(word & -word);
 }
 /*
@@ -654,6 +649,7 @@ static inline int ffs(int word)
 #else
 #include <asm-generic/bitops/__ffs.h>
+#include <asm-generic/bitops/__fls.h>
 #include <asm-generic/bitops/ffs.h>
 #include <asm-generic/bitops/fls.h>
 #include <asm-generic/bitops/fls64.h>
diff --git a/include/asm-mips/compiler.h b/include/asm-mips/compiler.h
index aa6b876bbd78..71f5c5cfc58a 100644
--- a/include/asm-mips/compiler.h
+++ b/include/asm-mips/compiler.h
@@ -9,10 +9,10 @@
 #define _ASM_COMPILER_H
 #if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4)
-#define GCC_IMM_ASM "n"
+#define GCC_IMM_ASM() "n"
 #define GCC_REG_ACCUM "$0"
 #else
-#define GCC_IMM_ASM "rn"
+#define GCC_IMM_ASM() "rn"
 #define GCC_REG_ACCUM "accum"
 #endif
diff --git a/include/asm-mips/gic.h b/include/asm-mips/gic.h
index 01b2f92dc33d..3a492f225f00 100644
--- a/include/asm-mips/gic.h
+++ b/include/asm-mips/gic.h
@@ -330,7 +330,7 @@
 #define GIC_SH_RMASK_OFS                0x0300
 #define GIC_CLR_INTR_MASK(intr, val) \
-        GICWRITE(GIC_REG_ADDR(SHARED, GIC_SH_RMASK_OFS + 4 + (((((intr) / 32) ^ 1) - 1) * 4)), ((val) << ((intr) % 32))
+        GICWRITE(GIC_REG_ADDR(SHARED, GIC_SH_RMASK_OFS + 4 + (((((intr) / 32) ^ 1) - 1) * 4)), ((val) << ((intr) % 32)))
 /* Register Map for Local Section */
 #define GIC_VPE_CTL_OFS                 0x0000
diff --git a/include/asm-mips/mach-au1x00/au1000.h b/include/asm-mips/mach-au1x00/au1000.h
index a05555165d05..1b5064dac007 100644
--- a/include/asm-mips/mach-au1x00/au1000.h
+++ b/include/asm-mips/mach-au1x00/au1000.h
@@ -40,8 +40,8 @@
 #include <linux/delay.h>
 #include <linux/types.h>
-#include <asm/io.h>
+#include <linux/io.h>
-#include <asm/irq.h>
+#include <linux/irq.h>
 /* cpu pipeline flush */
 void static inline au_sync(void)
@@ -63,32 +63,32 @@ void static inline au_sync_delay(int ms)
 void static inline au_writeb(u8 val, unsigned long reg)
 {
-        *(volatile u8 *)(reg) = val;
+        *(volatile u8 *)reg = val;
 }
 void static inline au_writew(u16 val, unsigned long reg)
 {
-        *(volatile u16 *)(reg) = val;
+        *(volatile u16 *)reg = val;
 }
 void static inline au_writel(u32 val, unsigned long reg)
 {
-        *(volatile u32 *)(reg) = val;
+        *(volatile u32 *)reg = val;
 }
 static inline u8 au_readb(unsigned long reg)
 {
-        return (*(volatile u8 *)reg);
+        return *(volatile u8 *)reg;
 }
 static inline u16 au_readw(unsigned long reg)
 {
-        return (*(volatile u16 *)reg);
+        return *(volatile u16 *)reg;
 }
 static inline u32 au_readl(unsigned long reg)
 {
-        return (*(volatile u32 *)reg);
+        return *(volatile u32 *)reg;
 }
@@ -117,76 +117,77 @@ extern struct au1xxx_irqmap au1xxx_irq_map[];
 #endif /* !defined (_LANGUAGE_ASSEMBLY) */
 /*
- * SDRAM Register Offsets
+ * SDRAM register offsets
 */
-#if defined(CONFIG_SOC_AU1000) || defined(CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1100)
+#if defined(CONFIG_SOC_AU1000) || defined(CONFIG_SOC_AU1500) || \
-#define MEM_SDMODE0             (0x0000)
+    defined(CONFIG_SOC_AU1100)
-#define MEM_SDMODE1             (0x0004)
+#define MEM_SDMODE0             0x0000
-#define MEM_SDMODE2             (0x0008)
+#define MEM_SDMODE1             0x0004
-#define MEM_SDADDR0             (0x000C)
+#define MEM_SDMODE2             0x0008
-#define MEM_SDADDR1             (0x0010)
+#define MEM_SDADDR0             0x000C
-#define MEM_SDADDR2             (0x0014)
+#define MEM_SDADDR1             0x0010
-#define MEM_SDREFCFG    (0x0018)
+#define MEM_SDADDR2             0x0014
-#define MEM_SDPRECMD    (0x001C)
+#define MEM_SDREFCFG            0x0018
-#define MEM_SDAUTOREF   (0x0020)
+#define MEM_SDPRECMD            0x001C
-#define MEM_SDWRMD0             (0x0024)
+#define MEM_SDAUTOREF           0x0020
-#define MEM_SDWRMD1             (0x0028)
+#define MEM_SDWRMD0             0x0024
-#define MEM_SDWRMD2             (0x002C)
+#define MEM_SDWRMD1             0x0028
-#define MEM_SDSLEEP             (0x0030)
+#define MEM_SDWRMD2             0x002C
-#define MEM_SDSMCKE             (0x0034)
+#define MEM_SDSLEEP             0x0030
+#define MEM_SDSMCKE             0x0034
 /*
 * MEM_SDMODE register content definitions
 */
-#define MEM_SDMODE_F            (1<<22)
+#define MEM_SDMODE_F            (1 << 22)
-#define MEM_SDMODE_SR           (1<<21)
+#define MEM_SDMODE_SR           (1 << 21)
-#define MEM_SDMODE_BS           (1<<20)
+#define MEM_SDMODE_BS           (1 << 20)
-#define MEM_SDMODE_RS           (3<<18)
+#define MEM_SDMODE_RS           (3 << 18)
-#define MEM_SDMODE_CS           (7<<15)
+#define MEM_SDMODE_CS           (7 << 15)
-#define MEM_SDMODE_TRAS         (15<<11)
+#define MEM_SDMODE_TRAS         (15 << 11)
-#define MEM_SDMODE_TMRD         (3<<9)
+#define MEM_SDMODE_TMRD         (3 << 9)
-#define MEM_SDMODE_TWR          (3<<7)
+#define MEM_SDMODE_TWR          (3 << 7)
-#define MEM_SDMODE_TRP          (3<<5)
+#define MEM_SDMODE_TRP          (3 << 5)
-#define MEM_SDMODE_TRCD         (3<<3)
+#define MEM_SDMODE_TRCD         (3 << 3)
-#define MEM_SDMODE_TCL          (7<<0)
+#define MEM_SDMODE_TCL          (7 << 0)
-#define MEM_SDMODE_BS_2Bank     (0<<20)
+#define MEM_SDMODE_BS_2Bank     (0 << 20)
-#define MEM_SDMODE_BS_4Bank     (1<<20)
+#define MEM_SDMODE_BS_4Bank     (1 << 20)
-#define MEM_SDMODE_RS_11Row     (0<<18)
+#define MEM_SDMODE_RS_11Row     (0 << 18)
-#define MEM_SDMODE_RS_12Row     (1<<18)
+#define MEM_SDMODE_RS_12Row     (1 << 18)
-#define MEM_SDMODE_RS_13Row     (2<<18)
+#define MEM_SDMODE_RS_13Row     (2 << 18)
-#define MEM_SDMODE_RS_N(N)      ((N)<<18)
+#define MEM_SDMODE_RS_N(N)      ((N) << 18)
-#define MEM_SDMODE_CS_7Col      (0<<15)
+#define MEM_SDMODE_CS_7Col      (0 << 15)
-#define MEM_SDMODE_CS_8Col      (1<<15)
+#define MEM_SDMODE_CS_8Col      (1 << 15)
-#define MEM_SDMODE_CS_9Col      (2<<15)
+#define MEM_SDMODE_CS_9Col      (2 << 15)
-#define MEM_SDMODE_CS_10Col     (3<<15)
+#define MEM_SDMODE_CS_10Col     (3 << 15)
-#define MEM_SDMODE_CS_11Col     (4<<15)
+#define MEM_SDMODE_CS_11Col     (4 << 15)
-#define MEM_SDMODE_CS_N(N)              ((N)<<15)
+#define MEM_SDMODE_CS_N(N)      ((N) << 15)
-#define MEM_SDMODE_TRAS_N(N)    ((N)<<11)
+#define MEM_SDMODE_TRAS_N(N)    ((N) << 11)
-#define MEM_SDMODE_TMRD_N(N)    ((N)<<9)
+#define MEM_SDMODE_TMRD_N(N)    ((N) << 9)
-#define MEM_SDMODE_TWR_N(N)             ((N)<<7)
+#define MEM_SDMODE_TWR_N(N)     ((N) << 7)
-#define MEM_SDMODE_TRP_N(N)             ((N)<<5)
+#define MEM_SDMODE_TRP_N(N)     ((N) << 5)
-#define MEM_SDMODE_TRCD_N(N)    ((N)<<3)
+#define MEM_SDMODE_TRCD_N(N)    ((N) << 3)
-#define MEM_SDMODE_TCL_N(N)             ((N)<<0)
+#define MEM_SDMODE_TCL_N(N)     ((N) << 0)
 /*
 * MEM_SDADDR register contents definitions
 */
-#define MEM_SDADDR_E                    (1<<20)
+#define MEM_SDADDR_E            (1 << 20)
-#define MEM_SDADDR_CSBA                 (0x03FF<<10)
+#define MEM_SDADDR_CSBA         (0x03FF << 10)
-#define MEM_SDADDR_CSMASK               (0x03FF<<0)
+#define MEM_SDADDR_CSMASK       (0x03FF << 0)
-#define MEM_SDADDR_CSBA_N(N)    ((N)&(0x03FF<<22)>>12)
+#define MEM_SDADDR_CSBA_N(N)    ((N) & (0x03FF << 22) >> 12)
-#define MEM_SDADDR_CSMASK_N(N)  ((N)&(0x03FF<<22)>>22)
+#define MEM_SDADDR_CSMASK_N(N)  ((N)&(0x03FF << 22) >> 22)
 /*
 * MEM_SDREFCFG register content definitions
 */
-#define MEM_SDREFCFG_TRC                (15<<28)
+#define MEM_SDREFCFG_TRC        (15 << 28)
-#define MEM_SDREFCFG_TRPM               (3<<26)
+#define MEM_SDREFCFG_TRPM       (3 << 26)
-#define MEM_SDREFCFG_E                  (1<<25)
+#define MEM_SDREFCFG_E          (1 << 25)
-#define MEM_SDREFCFG_RE                 (0x1ffffff<<0)
+#define MEM_SDREFCFG_RE         (0x1ffffff << 0)
-#define MEM_SDREFCFG_TRC_N(N)   ((N)<<MEM_SDREFCFG_TRC)
+#define MEM_SDREFCFG_TRC_N(N)   ((N) << MEM_SDREFCFG_TRC)
-#define MEM_SDREFCFG_TRPM_N(N)  ((N)<<MEM_SDREFCFG_TRPM)
+#define MEM_SDREFCFG_TRPM_N(N)  ((N) << MEM_SDREFCFG_TRPM)
 #define MEM_SDREFCFG_REF_N(N)   (N)
 #endif
@@ -199,25 +200,25 @@ extern struct au1xxx_irqmap au1xxx_irq_map[];
 /***********************************************************************/
 #if defined(CONFIG_SOC_AU1550) || defined(CONFIG_SOC_AU1200)
-#define MEM_SDMODE0             (0x0800)
+#define MEM_SDMODE0             0x0800
-#define MEM_SDMODE1             (0x0808)
+#define MEM_SDMODE1             0x0808
-#define MEM_SDMODE2             (0x0810)
+#define MEM_SDMODE2             0x0810
-#define MEM_SDADDR0             (0x0820)
+#define MEM_SDADDR0             0x0820
-#define MEM_SDADDR1             (0x0828)
+#define MEM_SDADDR1             0x0828
-#define MEM_SDADDR2             (0x0830)
+#define MEM_SDADDR2             0x0830
-#define MEM_SDCONFIGA   (0x0840)
+#define MEM_SDCONFIGA           0x0840
-#define MEM_SDCONFIGB   (0x0848)
+#define MEM_SDCONFIGB           0x0848
-#define MEM_SDSTAT              (0x0850)
+#define MEM_SDSTAT              0x0850
-#define MEM_SDERRADDR   (0x0858)
+#define MEM_SDERRADDR           0x0858
-#define MEM_SDSTRIDE0   (0x0860)
+#define MEM_SDSTRIDE0           0x0860
-#define MEM_SDSTRIDE1   (0x0868)
+#define MEM_SDSTRIDE1           0x0868
-#define MEM_SDSTRIDE2   (0x0870)
+#define MEM_SDSTRIDE2           0x0870
-#define MEM_SDWRMD0             (0x0880)
+#define MEM_SDWRMD0             0x0880
-#define MEM_SDWRMD1             (0x0888)
+#define MEM_SDWRMD1             0x0888
-#define MEM_SDWRMD2             (0x0890)
+#define MEM_SDWRMD2             0x0890
-#define MEM_SDPRECMD    (0x08C0)
+#define MEM_SDPRECMD            0x08C0
-#define MEM_SDAUTOREF   (0x08C8)
+#define MEM_SDAUTOREF           0x08C8
-#define MEM_SDSREF              (0x08D0)
+#define MEM_SDSREF              0x08D0
 #define MEM_SDSLEEP             MEM_SDSREF
 #endif
@@ -256,9 +257,9 @@ extern struct au1xxx_irqmap au1xxx_irq_map[];
 #define SSI0_PHYS_ADDR          0x11600000
 #define SSI1_PHYS_ADDR          0x11680000
 #define SYS_PHYS_ADDR           0x11900000
-#define PCMCIA_IO_PHYS_ADDR   0xF00000000ULL
+#define PCMCIA_IO_PHYS_ADDR     0xF00000000ULL
-#define PCMCIA_ATTR_PHYS_ADDR 0xF40000000ULL
+#define PCMCIA_ATTR_PHYS_ADDR   0xF40000000ULL
-#define PCMCIA_MEM_PHYS_ADDR  0xF80000000ULL
+#define PCMCIA_MEM_PHYS_ADDR    0xF80000000ULL
 #endif
 /********************************************************************/
@@ -290,13 +291,13 @@ extern struct au1xxx_irqmap au1xxx_irq_map[];
 #define UART3_PHYS_ADDR         0x11400000
 #define GPIO2_PHYS_ADDR         0x11700000
 #define SYS_PHYS_ADDR           0x11900000
-#define PCI_MEM_PHYS_ADDR     0x400000000ULL
+#define PCI_MEM_PHYS_ADDR       0x400000000ULL
-#define PCI_IO_PHYS_ADDR      0x500000000ULL
+#define PCI_IO_PHYS_ADDR        0x500000000ULL
-#define PCI_CONFIG0_PHYS_ADDR 0x600000000ULL
+#define PCI_CONFIG0_PHYS_ADDR   0x600000000ULL
-#define PCI_CONFIG1_PHYS_ADDR 0x680000000ULL
+#define PCI_CONFIG1_PHYS_ADDR   0x680000000ULL
-#define PCMCIA_IO_PHYS_ADDR   0xF00000000ULL
+#define PCMCIA_IO_PHYS_ADDR     0xF00000000ULL
-#define PCMCIA_ATTR_PHYS_ADDR 0xF40000000ULL
+#define PCMCIA_ATTR_PHYS_ADDR   0xF40000000ULL
-#define PCMCIA_MEM_PHYS_ADDR  0xF80000000ULL
+#define PCMCIA_MEM_PHYS_ADDR    0xF80000000ULL
 #endif
 /********************************************************************/
@@ -333,9 +334,9 @@ extern struct au1xxx_irqmap au1xxx_irq_map[];
 #define GPIO2_PHYS_ADDR         0x11700000
 #define SYS_PHYS_ADDR           0x11900000
 #define LCD_PHYS_ADDR           0x15000000
-#define PCMCIA_IO_PHYS_ADDR   0xF00000000ULL
+#define PCMCIA_IO_PHYS_ADDR     0xF00000000ULL
-#define PCMCIA_ATTR_PHYS_ADDR 0xF40000000ULL
+#define PCMCIA_ATTR_PHYS_ADDR   0xF40000000ULL
-#define PCMCIA_MEM_PHYS_ADDR  0xF80000000ULL
+#define PCMCIA_MEM_PHYS_ADDR    0xF80000000ULL
 #endif
 /***********************************************************************/
@@ -360,17 +361,17 @@ extern struct au1xxx_irqmap au1xxx_irq_map[];
 #define SYS_PHYS_ADDR           0x11900000
 #define DDMA_PHYS_ADDR          0x14002000
 #define PE_PHYS_ADDR            0x14008000
-#define PSC0_PHYS_ADDR          0x11A00000
+#define PSC0_PHYS_ADDR          0x11A00000
-#define PSC1_PHYS_ADDR          0x11B00000
+#define PSC1_PHYS_ADDR          0x11B00000
-#define PSC2_PHYS_ADDR          0x10A00000
+#define PSC2_PHYS_ADDR          0x10A00000
-#define PSC3_PHYS_ADDR          0x10B00000
+#define PSC3_PHYS_ADDR          0x10B00000
-#define PCI_MEM_PHYS_ADDR     0x400000000ULL
+#define PCI_MEM_PHYS_ADDR       0x400000000ULL
-#define PCI_IO_PHYS_ADDR      0x500000000ULL
+#define PCI_IO_PHYS_ADDR        0x500000000ULL
-#define PCI_CONFIG0_PHYS_ADDR 0x600000000ULL
+#define PCI_CONFIG0_PHYS_ADDR   0x600000000ULL
-#define PCI_CONFIG1_PHYS_ADDR 0x680000000ULL
+#define PCI_CONFIG1_PHYS_ADDR   0x680000000ULL
-#define PCMCIA_IO_PHYS_ADDR   0xF00000000ULL
+#define PCMCIA_IO_PHYS_ADDR     0xF00000000ULL
-#define PCMCIA_ATTR_PHYS_ADDR 0xF40000000ULL
+#define PCMCIA_ATTR_PHYS_ADDR   0xF40000000ULL
-#define PCMCIA_MEM_PHYS_ADDR  0xF80000000ULL
+#define PCMCIA_MEM_PHYS_ADDR    0xF80000000ULL
 #endif
 /***********************************************************************/
@@ -397,122 +398,121 @@ extern struct au1xxx_irqmap au1xxx_irq_map[];
 #define SWCNT_PHYS_ADDR         0x1110010C
 #define MAEFE_PHYS_ADDR         0x14012000
 #define MAEBE_PHYS_ADDR         0x14010000
-#define PCMCIA_IO_PHYS_ADDR   0xF00000000ULL
+#define PCMCIA_IO_PHYS_ADDR     0xF00000000ULL
-#define PCMCIA_ATTR_PHYS_ADDR 0xF40000000ULL
+#define PCMCIA_ATTR_PHYS_ADDR   0xF40000000ULL
-#define PCMCIA_MEM_PHYS_ADDR  0xF80000000ULL
+#define PCMCIA_MEM_PHYS_ADDR    0xF80000000ULL
 #endif
 /* Static Bus Controller */
-#define MEM_STCFG0                 0xB4001000
+#define MEM_STCFG0              0xB4001000
-#define MEM_STTIME0                0xB4001004
+#define MEM_STTIME0             0xB4001004
-#define MEM_STADDR0                0xB4001008
+#define MEM_STADDR0             0xB4001008
-#define MEM_STCFG1                 0xB4001010
+#define MEM_STCFG1              0xB4001010
-#define MEM_STTIME1                0xB4001014
+#define MEM_STTIME1             0xB4001014
-#define MEM_STADDR1                0xB4001018
+#define MEM_STADDR1             0xB4001018
-#define MEM_STCFG2                 0xB4001020
+#define MEM_STCFG2              0xB4001020
-#define MEM_STTIME2                0xB4001024
+#define MEM_STTIME2             0xB4001024
-#define MEM_STADDR2                0xB4001028
+#define MEM_STADDR2             0xB4001028
-#define MEM_STCFG3                 0xB4001030
+#define MEM_STCFG3              0xB4001030
-#define MEM_STTIME3                0xB4001034
+#define MEM_STTIME3             0xB4001034
-#define MEM_STADDR3                0xB4001038
+#define MEM_STADDR3             0xB4001038
 #if defined(CONFIG_SOC_AU1550) || defined(CONFIG_SOC_AU1200)
-#define MEM_STNDCTL                0xB4001100
+#define MEM_STNDCTL             0xB4001100
-#define MEM_STSTAT                 0xB4001104
+#define MEM_STSTAT              0xB4001104
-#define MEM_STNAND_CMD                  (0x0)
+#define MEM_STNAND_CMD          0x0
-#define MEM_STNAND_ADDR                 (0x4)
+#define MEM_STNAND_ADDR         0x4
-#define MEM_STNAND_DATA                (0x20)
+#define MEM_STNAND_DATA         0x20
 #endif
 /* Interrupt Controller 0 */
-#define IC0_CFG0RD                 0xB0400040
+#define IC0_CFG0RD              0xB0400040
-#define IC0_CFG0SET                0xB0400040
+#define IC0_CFG0SET             0xB0400040
-#define IC0_CFG0CLR                0xB0400044
+#define IC0_CFG0CLR             0xB0400044
-#define IC0_CFG1RD                 0xB0400048
+#define IC0_CFG1RD              0xB0400048
-#define IC0_CFG1SET                0xB0400048
+#define IC0_CFG1SET             0xB0400048
-#define IC0_CFG1CLR                0xB040004C
+#define IC0_CFG1CLR             0xB040004C
-#define IC0_CFG2RD                 0xB0400050
+#define IC0_CFG2RD              0xB0400050
-#define IC0_CFG2SET                0xB0400050
+#define IC0_CFG2SET             0xB0400050
-#define IC0_CFG2CLR                0xB0400054
+#define IC0_CFG2CLR             0xB0400054
-#define IC0_REQ0INT                0xB0400054
+#define IC0_REQ0INT             0xB0400054
-#define IC0_SRCRD                  0xB0400058
+#define IC0_SRCRD               0xB0400058
-#define IC0_SRCSET                 0xB0400058
+#define IC0_SRCSET              0xB0400058
-#define IC0_SRCCLR                 0xB040005C
+#define IC0_SRCCLR              0xB040005C
-#define IC0_REQ1INT                0xB040005C
+#define IC0_REQ1INT             0xB040005C
-#define IC0_ASSIGNRD               0xB0400060
+#define IC0_ASSIGNRD            0xB0400060
-#define IC0_ASSIGNSET              0xB0400060
+#define IC0_ASSIGNSET           0xB0400060
-#define IC0_ASSIGNCLR              0xB0400064
+#define IC0_ASSIGNCLR           0xB0400064
-#define IC0_WAKERD                 0xB0400068
+#define IC0_WAKERD              0xB0400068
-#define IC0_WAKESET                0xB0400068
+#define IC0_WAKESET             0xB0400068
-#define IC0_WAKECLR                0xB040006C
+#define IC0_WAKECLR             0xB040006C
-#define IC0_MASKRD                 0xB0400070
+#define IC0_MASKRD              0xB0400070
-#define IC0_MASKSET                0xB0400070
+#define IC0_MASKSET             0xB0400070
-#define IC0_MASKCLR                0xB0400074
+#define IC0_MASKCLR             0xB0400074
-#define IC0_RISINGRD               0xB0400078
+#define IC0_RISINGRD            0xB0400078
-#define IC0_RISINGCLR              0xB0400078
+#define IC0_RISINGCLR           0xB0400078
-#define IC0_FALLINGRD              0xB040007C
+#define IC0_FALLINGRD           0xB040007C
-#define IC0_FALLINGCLR             0xB040007C
+#define IC0_FALLINGCLR          0xB040007C
-#define IC0_TESTBIT                0xB0400080
+#define IC0_TESTBIT             0xB0400080
 /* Interrupt Controller 1 */
-#define IC1_CFG0RD                 0xB1800040
+#define IC1_CFG0RD              0xB1800040
-#define IC1_CFG0SET                0xB1800040
+#define IC1_CFG0SET             0xB1800040
-#define IC1_CFG0CLR                0xB1800044
+#define IC1_CFG0CLR             0xB1800044
-#define IC1_CFG1RD                 0xB1800048
+#define IC1_CFG1RD              0xB1800048
-#define IC1_CFG1SET                0xB1800048
+#define IC1_CFG1SET             0xB1800048
-#define IC1_CFG1CLR                0xB180004C
+#define IC1_CFG1CLR             0xB180004C
-#define IC1_CFG2RD                 0xB1800050
+#define IC1_CFG2RD              0xB1800050
-#define IC1_CFG2SET                0xB1800050
+#define IC1_CFG2SET             0xB1800050
-#define IC1_CFG2CLR                0xB1800054
+#define IC1_CFG2CLR             0xB1800054
-#define IC1_REQ0INT                0xB1800054
+#define IC1_REQ0INT             0xB1800054
-#define IC1_SRCRD                  0xB1800058
+#define IC1_SRCRD               0xB1800058
-#define IC1_SRCSET                 0xB1800058
+#define IC1_SRCSET              0xB1800058
-#define IC1_SRCCLR                 0xB180005C
+#define IC1_SRCCLR              0xB180005C
-#define IC1_REQ1INT                0xB180005C
+#define IC1_REQ1INT             0xB180005C
-#define IC1_ASSIGNRD               0xB1800060
+#define IC1_ASSIGNRD            0xB1800060
-#define IC1_ASSIGNSET              0xB1800060
+#define IC1_ASSIGNSET           0xB1800060
-#define IC1_ASSIGNCLR              0xB1800064
+#define IC1_ASSIGNCLR           0xB1800064
-#define IC1_WAKERD                 0xB1800068
+#define IC1_WAKERD              0xB1800068
-#define IC1_WAKESET                0xB1800068
+#define IC1_WAKESET             0xB1800068
-#define IC1_WAKECLR                0xB180006C
+#define IC1_WAKECLR             0xB180006C
-#define IC1_MASKRD                 0xB1800070
+#define IC1_MASKRD              0xB1800070
-#define IC1_MASKSET                0xB1800070
+#define IC1_MASKSET             0xB1800070
-#define IC1_MASKCLR                0xB1800074
+#define IC1_MASKCLR             0xB1800074
-#define IC1_RISINGRD               0xB1800078
+#define IC1_RISINGRD            0xB1800078
-#define IC1_RISINGCLR              0xB1800078
+#define IC1_RISINGCLR           0xB1800078
-#define IC1_FALLINGRD              0xB180007C
+#define IC1_FALLINGRD           0xB180007C
-#define IC1_FALLINGCLR             0xB180007C
+#define IC1_FALLINGCLR          0xB180007C
-#define IC1_TESTBIT                0xB1800080
+#define IC1_TESTBIT             0xB1800080
 /* Interrupt Configuration Modes */
-#define INTC_INT_DISABLED                0
+#define INTC_INT_DISABLED               0x0
-#define INTC_INT_RISE_EDGE             0x1
+#define INTC_INT_RISE_EDGE              0x1
-#define INTC_INT_FALL_EDGE             0x2
+#define INTC_INT_FALL_EDGE              0x2
-#define INTC_INT_RISE_AND_FALL_EDGE    0x3
+#define INTC_INT_RISE_AND_FALL_EDGE     0x3
-#define INTC_INT_HIGH_LEVEL            0x5
+#define INTC_INT_HIGH_LEVEL             0x5
-#define INTC_INT_LOW_LEVEL             0x6
+#define INTC_INT_LOW_LEVEL              0x6
-#define INTC_INT_HIGH_AND_LOW_LEVEL    0x7
+#define INTC_INT_HIGH_AND_LOW_LEVEL     0x7
 /* Interrupt Numbers */
 /* Au1000 */
@@ -579,18 +579,18 @@ enum soc_au1000_ints {
        AU1000_GPIO_31,
 };
-#define UART0_ADDR                0xB1100000
+#define UART0_ADDR              0xB1100000
-#define UART1_ADDR                0xB1200000
+#define UART1_ADDR              0xB1200000
-#define UART2_ADDR                0xB1300000
+#define UART2_ADDR              0xB1300000
-#define UART3_ADDR                0xB1400000
+#define UART3_ADDR              0xB1400000
-#define USB_OHCI_BASE             0x10100000 // phys addr for ioremap
+#define USB_OHCI_BASE           0x10100000      /* phys addr for ioremap */
-#define USB_HOST_CONFIG           0xB017fffc
+#define USB_HOST_CONFIG         0xB017FFFC
-#define AU1000_ETH0_BASE      0xB0500000
+#define AU1000_ETH0_BASE        0xB0500000
-#define AU1000_ETH1_BASE      0xB0510000
+#define AU1000_ETH1_BASE        0xB0510000
-#define AU1000_MAC0_ENABLE       0xB0520000
+#define AU1000_MAC0_ENABLE      0xB0520000
-#define AU1000_MAC1_ENABLE       0xB0520004
+#define AU1000_MAC1_ENABLE      0xB0520004
 #define NUM_ETH_INTERFACES 2
 #endif /* CONFIG_SOC_AU1000 */
@@ -662,16 +662,16 @@ enum soc_au1500_ints {
 #define INTC AU1000_PCI_INTC
 #define INTD AU1000_PCI_INTD
-#define UART0_ADDR                0xB1100000
+#define UART0_ADDR              0xB1100000
-#define UART3_ADDR                0xB1400000
+#define UART3_ADDR              0xB1400000
-#define USB_OHCI_BASE             0x10100000 // phys addr for ioremap
+#define USB_OHCI_BASE           0x10100000      /* phys addr for ioremap */
-#define USB_HOST_CONFIG           0xB017fffc
+#define USB_HOST_CONFIG         0xB017fffc
-#define AU1500_ETH0_BASE          0xB1500000
+#define AU1500_ETH0_BASE        0xB1500000
-#define AU1500_ETH1_BASE          0xB1510000
+#define AU1500_ETH1_BASE        0xB1510000
-#define AU1500_MAC0_ENABLE       0xB1520000
+#define AU1500_MAC0_ENABLE      0xB1520000
-#define AU1500_MAC1_ENABLE       0xB1520004
+#define AU1500_MAC1_ENABLE      0xB1520004
 #define NUM_ETH_INTERFACES 2
 #endif /* CONFIG_SOC_AU1500 */
@@ -739,15 +739,15 @@ enum soc_au1100_ints {
        AU1000_GPIO_31,
 };
-#define UART0_ADDR                0xB1100000
+#define UART0_ADDR              0xB1100000
-#define UART1_ADDR                0xB1200000
+#define UART1_ADDR              0xB1200000
-#define UART3_ADDR                0xB1400000
+#define UART3_ADDR              0xB1400000
-#define USB_OHCI_BASE             0x10100000 // phys addr for ioremap
+#define USB_OHCI_BASE           0x10100000      /* phys addr for ioremap */
-#define USB_HOST_CONFIG           0xB017fffc
+#define USB_HOST_CONFIG         0xB017FFFC
-#define AU1100_ETH0_BASE          0xB0500000
+#define AU1100_ETH0_BASE        0xB0500000
-#define AU1100_MAC0_ENABLE       0xB0520000
+#define AU1100_MAC0_ENABLE      0xB0520000
 #define NUM_ETH_INTERFACES 1
 #endif /* CONFIG_SOC_AU1100 */
@@ -826,18 +826,18 @@ enum soc_au1550_ints {
 #define INTC AU1550_PCI_INTC
 #define INTD AU1550_PCI_INTD
-#define UART0_ADDR                0xB1100000
+#define UART0_ADDR              0xB1100000
-#define UART1_ADDR                0xB1200000
+#define UART1_ADDR              0xB1200000
-#define UART3_ADDR                0xB1400000
+#define UART3_ADDR              0xB1400000
-#define USB_OHCI_BASE             0x14020000 // phys addr for ioremap
+#define USB_OHCI_BASE           0x14020000      /* phys addr for ioremap */
-#define USB_OHCI_LEN              0x00060000
+#define USB_OHCI_LEN            0x00060000
-#define USB_HOST_CONFIG           0xB4027ffc
+#define USB_HOST_CONFIG         0xB4027ffc
-#define AU1550_ETH0_BASE      0xB0500000
+#define AU1550_ETH0_BASE        0xB0500000
-#define AU1550_ETH1_BASE      0xB0510000
+#define AU1550_ETH1_BASE        0xB0510000
-#define AU1550_MAC0_ENABLE       0xB0520000
+#define AU1550_MAC0_ENABLE      0xB0520000
-#define AU1550_MAC1_ENABLE       0xB0520004
+#define AU1550_MAC1_ENABLE      0xB0520004
 #define NUM_ETH_INTERFACES 2
 #endif /* CONFIG_SOC_AU1550 */
@@ -911,32 +911,32 @@ enum soc_au1200_ints {
        AU1000_GPIO_31,
 };
-#define UART0_ADDR                0xB1100000
+#define UART0_ADDR              0xB1100000
-#define UART1_ADDR                0xB1200000
+#define UART1_ADDR              0xB1200000
-#define USB_UOC_BASE              0x14020020
+#define USB_UOC_BASE            0x14020020
-#define USB_UOC_LEN               0x20
+#define USB_UOC_LEN             0x20
-#define USB_OHCI_BASE             0x14020100
+#define USB_OHCI_BASE           0x14020100
-#define USB_OHCI_LEN              0x100
+#define USB_OHCI_LEN            0x100
-#define USB_EHCI_BASE             0x14020200
+#define USB_EHCI_BASE           0x14020200
-#define USB_EHCI_LEN              0x100
+#define USB_EHCI_LEN            0x100
-#define USB_UDC_BASE              0x14022000
+#define USB_UDC_BASE            0x14022000
-#define USB_UDC_LEN               0x2000
+#define USB_UDC_LEN             0x2000
-#define USB_MSR_BASE                      0xB4020000
+#define USB_MSR_BASE            0xB4020000
-#define USB_MSR_MCFG              4
+#define USB_MSR_MCFG            4
-#define USBMSRMCFG_OMEMEN         0
+#define USBMSRMCFG_OMEMEN       0
-#define USBMSRMCFG_OBMEN          1
+#define USBMSRMCFG_OBMEN        1
-#define USBMSRMCFG_EMEMEN         2
+#define USBMSRMCFG_EMEMEN       2
-#define USBMSRMCFG_EBMEN          3
+#define USBMSRMCFG_EBMEN        3
-#define USBMSRMCFG_DMEMEN         4
+#define USBMSRMCFG_DMEMEN       4
-#define USBMSRMCFG_DBMEN          5
+#define USBMSRMCFG_DBMEN        5
-#define USBMSRMCFG_GMEMEN         6
+#define USBMSRMCFG_GMEMEN       6
-#define USBMSRMCFG_OHCCLKEN       16
+#define USBMSRMCFG_OHCCLKEN     16
-#define USBMSRMCFG_EHCCLKEN       17
+#define USBMSRMCFG_EHCCLKEN     17
-#define USBMSRMCFG_UDCCLKEN       18
+#define USBMSRMCFG_UDCCLKEN     18
-#define USBMSRMCFG_PHYPLLEN       19
+#define USBMSRMCFG_PHYPLLEN     19
-#define USBMSRMCFG_RDCOMB         30
+#define USBMSRMCFG_RDCOMB       30
-#define USBMSRMCFG_PFEN           31
+#define USBMSRMCFG_PFEN         31
 #endif /* CONFIG_SOC_AU1200 */
@@ -949,259 +949,258 @@ enum soc_au1200_ints {
 #define INTX                    0xFF                    /* not valid */
 /* Programmable Counters 0 and 1 */
-#define SYS_BASE                   0xB1900000
+#define SYS_BASE                0xB1900000
-#define SYS_COUNTER_CNTRL          (SYS_BASE + 0x14)
+#define SYS_COUNTER_CNTRL       (SYS_BASE + 0x14)
-#  define SYS_CNTRL_E1S            (1<<23)
+#  define SYS_CNTRL_E1S         (1 << 23)
-#  define SYS_CNTRL_T1S            (1<<20)
+#  define SYS_CNTRL_T1S         (1 << 20)
-#  define SYS_CNTRL_M21            (1<<19)
+#  define SYS_CNTRL_M21         (1 << 19)
-#  define SYS_CNTRL_M11            (1<<18)
+#  define SYS_CNTRL_M11         (1 << 18)
-#  define SYS_CNTRL_M01            (1<<17)
+#  define SYS_CNTRL_M01         (1 << 17)
-#  define SYS_CNTRL_C1S            (1<<16)
+#  define SYS_CNTRL_C1S         (1 << 16)
-#  define SYS_CNTRL_BP             (1<<14)
+#  define SYS_CNTRL_BP          (1 << 14)
-#  define SYS_CNTRL_EN1            (1<<13)
+#  define SYS_CNTRL_EN1         (1 << 13)
-#  define SYS_CNTRL_BT1            (1<<12)
+#  define SYS_CNTRL_BT1         (1 << 12)
-#  define SYS_CNTRL_EN0            (1<<11)
+#  define SYS_CNTRL_EN0         (1 << 11)
-#  define SYS_CNTRL_BT0            (1<<10)
+#  define SYS_CNTRL_BT0         (1 << 10)
-#  define SYS_CNTRL_E0             (1<<8)
+#  define SYS_CNTRL_E0          (1 << 8)
-#  define SYS_CNTRL_E0S            (1<<7)
+#  define SYS_CNTRL_E0S         (1 << 7)
-#  define SYS_CNTRL_32S            (1<<5)
+#  define SYS_CNTRL_32S         (1 << 5)
-#  define SYS_CNTRL_T0S            (1<<4)
+#  define SYS_CNTRL_T0S         (1 << 4)
-#  define SYS_CNTRL_M20            (1<<3)
+#  define SYS_CNTRL_M20         (1 << 3)
-#  define SYS_CNTRL_M10            (1<<2)
+#  define SYS_CNTRL_M10         (1 << 2)
-#  define SYS_CNTRL_M00            (1<<1)
+#  define SYS_CNTRL_M00         (1 << 1)
-#  define SYS_CNTRL_C0S            (1<<0)
+#  define SYS_CNTRL_C0S         (1 << 0)
 /* Programmable Counter 0 Registers */
-#define SYS_TOYTRIM                 (SYS_BASE + 0)
+#define SYS_TOYTRIM             (SYS_BASE + 0)
-#define SYS_TOYWRITE                (SYS_BASE + 4)
+#define SYS_TOYWRITE            (SYS_BASE + 4)
-#define SYS_TOYMATCH0               (SYS_BASE + 8)
+#define SYS_TOYMATCH0           (SYS_BASE + 8)
-#define SYS_TOYMATCH1               (SYS_BASE + 0xC)
+#define SYS_TOYMATCH1           (SYS_BASE + 0xC)
-#define SYS_TOYMATCH2               (SYS_BASE + 0x10)
+#define SYS_TOYMATCH2           (SYS_BASE + 0x10)
-#define SYS_TOYREAD                 (SYS_BASE + 0x40)
+#define SYS_TOYREAD             (SYS_BASE + 0x40)
 /* Programmable Counter 1 Registers */
-#define SYS_RTCTRIM                 (SYS_BASE + 0x44)
+#define SYS_RTCTRIM             (SYS_BASE + 0x44)
-#define SYS_RTCWRITE                (SYS_BASE + 0x48)
+#define SYS_RTCWRITE            (SYS_BASE + 0x48)
-#define SYS_RTCMATCH0               (SYS_BASE + 0x4C)
+#define SYS_RTCMATCH0           (SYS_BASE + 0x4C)
-#define SYS_RTCMATCH1               (SYS_BASE + 0x50)
+#define SYS_RTCMATCH1           (SYS_BASE + 0x50)
-#define SYS_RTCMATCH2               (SYS_BASE + 0x54)
+#define SYS_RTCMATCH2           (SYS_BASE + 0x54)
-#define SYS_RTCREAD                 (SYS_BASE + 0x58)
+#define SYS_RTCREAD             (SYS_BASE + 0x58)
 /* I2S Controller */
-#define I2S_DATA                    0xB1000000
+#define I2S_DATA                0xB1000000
-#  define I2S_DATA_MASK        (0xffffff)
+#  define I2S_DATA_MASK         0xffffff
-#define I2S_CONFIG                0xB1000004
+#define I2S_CONFIG              0xB1000004
-#  define I2S_CONFIG_XU        (1<<25)
+#  define I2S_CONFIG_XU         (1 << 25)
-#  define I2S_CONFIG_XO        (1<<24)
+#  define I2S_CONFIG_XO         (1 << 24)
-#  define I2S_CONFIG_RU        (1<<23)
+#  define I2S_CONFIG_RU         (1 << 23)
-#  define I2S_CONFIG_RO        (1<<22)
+#  define I2S_CONFIG_RO         (1 << 22)
-#  define I2S_CONFIG_TR        (1<<21)
+#  define I2S_CONFIG_TR         (1 << 21)
-#  define I2S_CONFIG_TE        (1<<20)
+#  define I2S_CONFIG_TE         (1 << 20)
-#  define I2S_CONFIG_TF        (1<<19)
+#  define I2S_CONFIG_TF         (1 << 19)
-#  define I2S_CONFIG_RR        (1<<18)
+#  define I2S_CONFIG_RR         (1 << 18)
-#  define I2S_CONFIG_RE        (1<<17)
+#  define I2S_CONFIG_RE         (1 << 17)
-#  define I2S_CONFIG_RF        (1<<16)
+#  define I2S_CONFIG_RF         (1 << 16)
-#  define I2S_CONFIG_PD        (1<<11)
+#  define I2S_CONFIG_PD         (1 << 11)
-#  define I2S_CONFIG_LB        (1<<10)
+#  define I2S_CONFIG_LB         (1 << 10)
-#  define I2S_CONFIG_IC        (1<<9)
+#  define I2S_CONFIG_IC         (1 << 9)
-#  define I2S_CONFIG_FM_BIT    7
+#  define I2S_CONFIG_FM_BIT     7
-#  define I2S_CONFIG_FM_MASK     (0x3 << I2S_CONFIG_FM_BIT)
+#  define I2S_CONFIG_FM_MASK    (0x3 << I2S_CONFIG_FM_BIT)
-#    define I2S_CONFIG_FM_I2S    (0x0 << I2S_CONFIG_FM_BIT)
+#    define I2S_CONFIG_FM_I2S   (0x0 << I2S_CONFIG_FM_BIT)
-#    define I2S_CONFIG_FM_LJ     (0x1 << I2S_CONFIG_FM_BIT)
+#    define I2S_CONFIG_FM_LJ    (0x1 << I2S_CONFIG_FM_BIT)
-#    define I2S_CONFIG_FM_RJ     (0x2 << I2S_CONFIG_FM_BIT)
+#    define I2S_CONFIG_FM_RJ    (0x2 << I2S_CONFIG_FM_BIT)
-#  define I2S_CONFIG_TN        (1<<6)
+#  define I2S_CONFIG_TN         (1 << 6)
-#  define I2S_CONFIG_RN        (1<<5)
+#  define I2S_CONFIG_RN         (1 << 5)
-#  define I2S_CONFIG_SZ_BIT    0
+#  define I2S_CONFIG_SZ_BIT     0
-#  define I2S_CONFIG_SZ_MASK     (0x1F << I2S_CONFIG_SZ_BIT)
+#  define I2S_CONFIG_SZ_MASK    (0x1F << I2S_CONFIG_SZ_BIT)
-#define I2S_CONTROL                0xB1000008
+#define I2S_CONTROL             0xB1000008
-#  define I2S_CONTROL_D         (1<<1)
+#  define I2S_CONTROL_D         (1 << 1)
-#  define I2S_CONTROL_CE        (1<<0)
+#  define I2S_CONTROL_CE        (1 << 0)
 /* USB Host Controller */
 #ifndef USB_OHCI_LEN
-#define USB_OHCI_LEN              0x00100000
+#define USB_OHCI_LEN            0x00100000
 #endif
 #ifndef CONFIG_SOC_AU1200
 /* USB Device Controller */
-#define USBD_EP0RD                0xB0200000
+#define USBD_EP0RD              0xB0200000
-#define USBD_EP0WR                0xB0200004
+#define USBD_EP0WR              0xB0200004
-#define USBD_EP2WR                0xB0200008
+#define USBD_EP2WR              0xB0200008
-#define USBD_EP3WR                0xB020000C
+#define USBD_EP3WR              0xB020000C
-#define USBD_EP4RD                0xB0200010
+#define USBD_EP4RD              0xB0200010
-#define USBD_EP5RD                0xB0200014
+#define USBD_EP5RD              0xB0200014
-#define USBD_INTEN                0xB0200018
+#define USBD_INTEN              0xB0200018
-#define USBD_INTSTAT              0xB020001C
+#define USBD_INTSTAT            0xB020001C
-#  define USBDEV_INT_SOF       (1<<12)
+#  define USBDEV_INT_SOF        (1 << 12)
-#  define USBDEV_INT_HF_BIT    6
+#  define USBDEV_INT_HF_BIT     6
-#  define USBDEV_INT_HF_MASK   (0x3f << USBDEV_INT_HF_BIT)
+#  define USBDEV_INT_HF_MASK    (0x3f << USBDEV_INT_HF_BIT)
-#  define USBDEV_INT_CMPLT_BIT  0
+#  define USBDEV_INT_CMPLT_BIT  0
 #  define USBDEV_INT_CMPLT_MASK (0x3f << USBDEV_INT_CMPLT_BIT)
-#define USBD_CONFIG               0xB0200020
+#define USBD_CONFIG             0xB0200020
-#define USBD_EP0CS                0xB0200024
+#define USBD_EP0CS              0xB0200024
-#define USBD_EP2CS                0xB0200028
+#define USBD_EP2CS              0xB0200028
-#define USBD_EP3CS                0xB020002C
+#define USBD_EP3CS              0xB020002C
-#define USBD_EP4CS                0xB0200030
+#define USBD_EP4CS              0xB0200030
-#define USBD_EP5CS                0xB0200034
+#define USBD_EP5CS              0xB0200034
-#  define USBDEV_CS_SU         (1<<14)
+#  define USBDEV_CS_SU          (1 << 14)
-#  define USBDEV_CS_NAK        (1<<13)
+#  define USBDEV_CS_NAK         (1 << 13)
-#  define USBDEV_CS_ACK        (1<<12)
+#  define USBDEV_CS_ACK         (1 << 12)
-#  define USBDEV_CS_BUSY       (1<<11)
+#  define USBDEV_CS_BUSY        (1 << 11)
-#  define USBDEV_CS_TSIZE_BIT  1
+#  define USBDEV_CS_TSIZE_BIT   1
-#  define USBDEV_CS_TSIZE_MASK (0x3ff << USBDEV_CS_TSIZE_BIT)
+#  define USBDEV_CS_TSIZE_MASK  (0x3ff << USBDEV_CS_TSIZE_BIT)
-#  define USBDEV_CS_STALL      (1<<0)
+#  define USBDEV_CS_STALL       (1 << 0)
-#define USBD_EP0RDSTAT            0xB0200040
+#define USBD_EP0RDSTAT          0xB0200040
-#define USBD_EP0WRSTAT            0xB0200044
+#define USBD_EP0WRSTAT          0xB0200044
-#define USBD_EP2WRSTAT            0xB0200048
+#define USBD_EP2WRSTAT          0xB0200048
-#define USBD_EP3WRSTAT            0xB020004C
+#define USBD_EP3WRSTAT          0xB020004C
-#define USBD_EP4RDSTAT            0xB0200050
+#define USBD_EP4RDSTAT          0xB0200050
-#define USBD_EP5RDSTAT            0xB0200054
+#define USBD_EP5RDSTAT          0xB0200054
-#  define USBDEV_FSTAT_FLUSH     (1<<6)
+#  define USBDEV_FSTAT_FLUSH    (1 << 6)
-#  define USBDEV_FSTAT_UF        (1<<5)
+#  define USBDEV_FSTAT_UF       (1 << 5)
-#  define USBDEV_FSTAT_OF        (1<<4)
+#  define USBDEV_FSTAT_OF       (1 << 4)
-#  define USBDEV_FSTAT_FCNT_BIT  0
+#  define USBDEV_FSTAT_FCNT_BIT 0
 #  define USBDEV_FSTAT_FCNT_MASK (0x0f << USBDEV_FSTAT_FCNT_BIT)
-#define USBD_ENABLE               0xB0200058
+#define USBD_ENABLE             0xB0200058
-#  define USBDEV_ENABLE (1<<1)
+#  define USBDEV_ENABLE         (1 << 1)
-#  define USBDEV_CE     (1<<0)
+#  define USBDEV_CE             (1 << 0)
 #endif /* !CONFIG_SOC_AU1200 */
 /* Ethernet Controllers  */
 /* 4 byte offsets from AU1000_ETH_BASE */
-#define MAC_CONTROL                     0x0
+#define MAC_CONTROL             0x0
-#  define MAC_RX_ENABLE               (1<<2)
+#  define MAC_RX_ENABLE         (1 << 2)
-#  define MAC_TX_ENABLE               (1<<3)
+#  define MAC_TX_ENABLE         (1 << 3)
-#  define MAC_DEF_CHECK               (1<<5)
+#  define MAC_DEF_CHECK         (1 << 5)
-#  define MAC_SET_BL(X)       (((X)&0x3)<<6)
+#  define MAC_SET_BL(X)         (((X) & 0x3) << 6)
-#  define MAC_AUTO_PAD                (1<<8)
+#  define MAC_AUTO_PAD          (1 << 8)
-#  define MAC_DISABLE_RETRY          (1<<10)
+#  define MAC_DISABLE_RETRY     (1 << 10)
-#  define MAC_DISABLE_BCAST          (1<<11)
+#  define MAC_DISABLE_BCAST     (1 << 11)
-#  define MAC_LATE_COL               (1<<12)
+#  define MAC_LATE_COL          (1 << 12)
-#  define MAC_HASH_MODE              (1<<13)
+#  define MAC_HASH_MODE         (1 << 13)
-#  define MAC_HASH_ONLY              (1<<15)
+#  define MAC_HASH_ONLY         (1 << 15)
-#  define MAC_PASS_ALL               (1<<16)
+#  define MAC_PASS_ALL          (1 << 16)
-#  define MAC_INVERSE_FILTER         (1<<17)
+#  define MAC_INVERSE_FILTER    (1 << 17)
-#  define MAC_PROMISCUOUS            (1<<18)
+#  define MAC_PROMISCUOUS       (1 << 18)
-#  define MAC_PASS_ALL_MULTI         (1<<19)
+#  define MAC_PASS_ALL_MULTI    (1 << 19)
-#  define MAC_FULL_DUPLEX            (1<<20)
+#  define MAC_FULL_DUPLEX       (1 << 20)
-#  define MAC_NORMAL_MODE                 0
+#  define MAC_NORMAL_MODE       0
-#  define MAC_INT_LOOPBACK           (1<<21)
+#  define MAC_INT_LOOPBACK      (1 << 21)
-#  define MAC_EXT_LOOPBACK           (1<<22)
+#  define MAC_EXT_LOOPBACK      (1 << 22)
-#  define MAC_DISABLE_RX_OWN         (1<<23)
+#  define MAC_DISABLE_RX_OWN    (1 << 23)
-#  define MAC_BIG_ENDIAN             (1<<30)
+#  define MAC_BIG_ENDIAN        (1 << 30)
-#  define MAC_RX_ALL                 (1<<31)
+#  define MAC_RX_ALL            (1 << 31)
-#define MAC_ADDRESS_HIGH                0x4
+#define MAC_ADDRESS_HIGH        0x4
-#define MAC_ADDRESS_LOW                 0x8
+#define MAC_ADDRESS_LOW         0x8
-#define MAC_MCAST_HIGH                  0xC
+#define MAC_MCAST_HIGH          0xC
-#define MAC_MCAST_LOW                  0x10
+#define MAC_MCAST_LOW           0x10
-#define MAC_MII_CNTRL                  0x14
+#define MAC_MII_CNTRL           0x14
-#  define MAC_MII_BUSY                (1<<0)
+#  define MAC_MII_BUSY          (1 << 0)
-#  define MAC_MII_READ                     0
+#  define MAC_MII_READ          0
-#  define MAC_MII_WRITE               (1<<1)
+#  define MAC_MII_WRITE         (1 << 1)
-#  define MAC_SET_MII_SELECT_REG(X)   (((X)&0x1f)<<6)
+#  define MAC_SET_MII_SELECT_REG(X) (((X) & 0x1f) << 6)
-#  define MAC_SET_MII_SELECT_PHY(X)   (((X)&0x1f)<<11)
+#  define MAC_SET_MII_SELECT_PHY(X) (((X) & 0x1f) << 11)
-#define MAC_MII_DATA                   0x18
+#define MAC_MII_DATA            0x18
-#define MAC_FLOW_CNTRL                 0x1C
+#define MAC_FLOW_CNTRL          0x1C
-#  define MAC_FLOW_CNTRL_BUSY         (1<<0)
+#  define MAC_FLOW_CNTRL_BUSY   (1 << 0)
-#  define MAC_FLOW_CNTRL_ENABLE       (1<<1)
+#  define MAC_FLOW_CNTRL_ENABLE (1 << 1)
-#  define MAC_PASS_CONTROL            (1<<2)
+#  define MAC_PASS_CONTROL      (1 << 2)
-#  define MAC_SET_PAUSE(X)        (((X)&0xffff)<<16)
+#  define MAC_SET_PAUSE(X)      (((X) & 0xffff) << 16)
-#define MAC_VLAN1_TAG                  0x20
+#define MAC_VLAN1_TAG           0x20
-#define MAC_VLAN2_TAG                  0x24
+#define MAC_VLAN2_TAG           0x24
 /* Ethernet Controller Enable */
-#  define MAC_EN_CLOCK_ENABLE         (1<<0)
+#  define MAC_EN_CLOCK_ENABLE   (1 << 0)
-#  define MAC_EN_RESET0               (1<<1)
+#  define MAC_EN_RESET0         (1 << 1)
-#  define MAC_EN_TOSS                 (0<<2)
+#  define MAC_EN_TOSS           (0 << 2)
-#  define MAC_EN_CACHEABLE            (1<<3)
+#  define MAC_EN_CACHEABLE      (1 << 3)
-#  define MAC_EN_RESET1               (1<<4)
+#  define MAC_EN_RESET1         (1 << 4)
-#  define MAC_EN_RESET2               (1<<5)
+#  define MAC_EN_RESET2         (1 << 5)
-#  define MAC_DMA_RESET               (1<<6)
+#  define MAC_DMA_RESET         (1 << 6)
 /* Ethernet Controller DMA Channels */
-#define MAC0_TX_DMA_ADDR         0xB4004000
+#define MAC0_TX_DMA_ADDR        0xB4004000
-#define MAC1_TX_DMA_ADDR         0xB4004200
+#define MAC1_TX_DMA_ADDR        0xB4004200
 /* offsets from MAC_TX_RING_ADDR address */
-#define MAC_TX_BUFF0_STATUS             0x0
+#define MAC_TX_BUFF0_STATUS     0x0
-#  define TX_FRAME_ABORTED            (1<<0)
+#  define TX_FRAME_ABORTED      (1 << 0)
-#  define TX_JAB_TIMEOUT              (1<<1)
+#  define TX_JAB_TIMEOUT        (1 << 1)
-#  define TX_NO_CARRIER               (1<<2)
+#  define TX_NO_CARRIER         (1 << 2)
-#  define TX_LOSS_CARRIER             (1<<3)
+#  define TX_LOSS_CARRIER       (1 << 3)
-#  define TX_EXC_DEF                  (1<<4)
+#  define TX_EXC_DEF            (1 << 4)
-#  define TX_LATE_COLL_ABORT          (1<<5)
+#  define TX_LATE_COLL_ABORT    (1 << 5)
-#  define TX_EXC_COLL                 (1<<6)
+#  define TX_EXC_COLL           (1 << 6)
-#  define TX_UNDERRUN                 (1<<7)
+#  define TX_UNDERRUN           (1 << 7)
-#  define TX_DEFERRED                 (1<<8)
+#  define TX_DEFERRED           (1 << 8)
-#  define TX_LATE_COLL                (1<<9)
+#  define TX_LATE_COLL          (1 << 9)
-#  define TX_COLL_CNT_MASK         (0xF<<10)
+#  define TX_COLL_CNT_MASK      (0xF << 10)
-#  define TX_PKT_RETRY               (1<<31)
+#  define TX_PKT_RETRY          (1 << 31)
-#define MAC_TX_BUFF0_ADDR                0x4
+#define MAC_TX_BUFF0_ADDR       0x4
-#  define TX_DMA_ENABLE               (1<<0)
+#  define TX_DMA_ENABLE         (1 << 0)
-#  define TX_T_DONE                   (1<<1)
+#  define TX_T_DONE             (1 << 1)
-#  define TX_GET_DMA_BUFFER(X)    (((X)>>2)&0x3)
+#  define TX_GET_DMA_BUFFER(X)  (((X) >> 2) & 0x3)
-#define MAC_TX_BUFF0_LEN                 0x8
+#define MAC_TX_BUFF0_LEN        0x8
-#define MAC_TX_BUFF1_STATUS             0x10
+#define MAC_TX_BUFF1_STATUS     0x10
-#define MAC_TX_BUFF1_ADDR               0x14
+#define MAC_TX_BUFF1_ADDR       0x14
-#define MAC_TX_BUFF1_LEN                0x18
+#define MAC_TX_BUFF1_LEN        0x18
-#define MAC_TX_BUFF2_STATUS             0x20
+#define MAC_TX_BUFF2_STATUS     0x20
-#define MAC_TX_BUFF2_ADDR               0x24
+#define MAC_TX_BUFF2_ADDR       0x24
-#define MAC_TX_BUFF2_LEN                0x28
+#define MAC_TX_BUFF2_LEN        0x28
-#define MAC_TX_BUFF3_STATUS             0x30
+#define MAC_TX_BUFF3_STATUS     0x30
-#define MAC_TX_BUFF3_ADDR               0x34
+#define MAC_TX_BUFF3_ADDR       0x34
-#define MAC_TX_BUFF3_LEN                0x38
+#define MAC_TX_BUFF3_LEN        0x38
-#define MAC0_RX_DMA_ADDR         0xB4004100
+#define MAC0_RX_DMA_ADDR        0xB4004100
-#define MAC1_RX_DMA_ADDR         0xB4004300
+#define MAC1_RX_DMA_ADDR        0xB4004300
 /* offsets from MAC_RX_RING_ADDR */
-#define MAC_RX_BUFF0_STATUS              0x0
+#define MAC_RX_BUFF0_STATUS     0x0
-#  define RX_FRAME_LEN_MASK           0x3fff
+#  define RX_FRAME_LEN_MASK     0x3fff
-#  define RX_WDOG_TIMER              (1<<14)
+#  define RX_WDOG_TIMER         (1 << 14)
-#  define RX_RUNT                    (1<<15)
+#  define RX_RUNT               (1 << 15)
-#  define RX_OVERLEN                 (1<<16)
+#  define RX_OVERLEN            (1 << 16)
-#  define RX_COLL                    (1<<17)
+#  define RX_COLL               (1 << 17)
-#  define RX_ETHER                   (1<<18)
+#  define RX_ETHER              (1 << 18)
-#  define RX_MII_ERROR               (1<<19)
+#  define RX_MII_ERROR          (1 << 19)
-#  define RX_DRIBBLING               (1<<20)
+#  define RX_DRIBBLING          (1 << 20)
-#  define RX_CRC_ERROR               (1<<21)
+#  define RX_CRC_ERROR          (1 << 21)
-#  define RX_VLAN1                   (1<<22)
+#  define RX_VLAN1              (1 << 22)
-#  define RX_VLAN2                   (1<<23)
+#  define RX_VLAN2              (1 << 23)
-#  define RX_LEN_ERROR               (1<<24)
+#  define RX_LEN_ERROR          (1 << 24)
-#  define RX_CNTRL_FRAME             (1<<25)
+#  define RX_CNTRL_FRAME        (1 << 25)
-#  define RX_U_CNTRL_FRAME           (1<<26)
+#  define RX_U_CNTRL_FRAME      (1 << 26)
-#  define RX_MCAST_FRAME             (1<<27)
+#  define RX_MCAST_FRAME        (1 << 27)
-#  define RX_BCAST_FRAME             (1<<28)
+#  define RX_BCAST_FRAME        (1 << 28)
-#  define RX_FILTER_FAIL             (1<<29)
+#  define RX_FILTER_FAIL        (1 << 29)
-#  define RX_PACKET_FILTER           (1<<30)
+#  define RX_PACKET_FILTER      (1 << 30)
-#  define RX_MISSED_FRAME            (1<<31)
+#  define RX_MISSED_FRAME       (1 << 31)
 #  define RX_ERROR (RX_WDOG_TIMER | RX_RUNT | RX_OVERLEN |  \
-                    RX_COLL | RX_MII_ERROR | RX_CRC_ERROR | \
+                    RX_COLL | RX_MII_ERROR | RX_CRC_ERROR | \
-                    RX_LEN_ERROR | RX_U_CNTRL_FRAME | RX_MISSED_FRAME)
+                    RX_LEN_ERROR | RX_U_CNTRL_FRAME | RX_MISSED_FRAME)
-#define MAC_RX_BUFF0_ADDR                0x4
+#define MAC_RX_BUFF0_ADDR       0x4
-#  define RX_DMA_ENABLE               (1<<0)
+#  define RX_DMA_ENABLE         (1 << 0)
-#  define RX_T_DONE                   (1<<1)
+#  define RX_T_DONE             (1 << 1)
-#  define RX_GET_DMA_BUFFER(X)    (((X)>>2)&0x3)
+#  define RX_GET_DMA_BUFFER(X)  (((X) >> 2) & 0x3)
-#  define RX_SET_BUFF_ADDR(X)     ((X)&0xffffffc0)
+#  define RX_SET_BUFF_ADDR(X)   ((X) & 0xffffffc0)
-#define MAC_RX_BUFF1_STATUS              0x10
+#define MAC_RX_BUFF1_STATUS     0x10
-#define MAC_RX_BUFF1_ADDR                0x14
+#define MAC_RX_BUFF1_ADDR       0x14
-#define MAC_RX_BUFF2_STATUS              0x20
+#define MAC_RX_BUFF2_STATUS     0x20
-#define MAC_RX_BUFF2_ADDR                0x24
+#define MAC_RX_BUFF2_ADDR       0x24
-#define MAC_RX_BUFF3_STATUS              0x30
+#define MAC_RX_BUFF3_STATUS     0x30
-#define MAC_RX_BUFF3_ADDR                0x34
+#define MAC_RX_BUFF3_ADDR       0x34
 /* UARTS 0-3 */
-#define UART_BASE                 UART0_ADDR
+#define UART_BASE               UART0_ADDR
 #ifdef  CONFIG_SOC_AU1200
-#define UART_DEBUG_BASE           UART1_ADDR
+#define UART_DEBUG_BASE         UART1_ADDR
 #else
-#define UART_DEBUG_BASE           UART3_ADDR
+#define UART_DEBUG_BASE         UART3_ADDR
 #endif
 #define UART_RX         0       /* Receive buffer */
@@ -1294,341 +1293,337 @@ enum soc_au1200_ints {
 #define UART_MSR_DCTS   0x01    /* Delta CTS */
 #define UART_MSR_ANY_DELTA 0x0F /* Any of the delta bits! */
 /* SSIO */
-#define SSI0_STATUS                0xB1600000
+#define SSI0_STATUS             0xB1600000
-#  define SSI_STATUS_BF              (1<<4)
+#  define SSI_STATUS_BF         (1 << 4)
-#  define SSI_STATUS_OF              (1<<3)
+#  define SSI_STATUS_OF         (1 << 3)
-#  define SSI_STATUS_UF              (1<<2)
+#  define SSI_STATUS_UF         (1 << 2)
-#  define SSI_STATUS_D               (1<<1)
+#  define SSI_STATUS_D          (1 << 1)
-#  define SSI_STATUS_B               (1<<0)
+#  define SSI_STATUS_B          (1 << 0)
-#define SSI0_INT                   0xB1600004
+#define SSI0_INT                0xB1600004
-#  define SSI_INT_OI                 (1<<3)
+#  define SSI_INT_OI            (1 << 3)
-#  define SSI_INT_UI                 (1<<2)
+#  define SSI_INT_UI            (1 << 2)
-#  define SSI_INT_DI                 (1<<1)
+#  define SSI_INT_DI            (1 << 1)
-#define SSI0_INT_ENABLE            0xB1600008
+#define SSI0_INT_ENABLE         0xB1600008
-#  define SSI_INTE_OIE               (1<<3)
+#  define SSI_INTE_OIE          (1 << 3)
-#  define SSI_INTE_UIE               (1<<2)
+#  define SSI_INTE_UIE          (1 << 2)
-#  define SSI_INTE_DIE               (1<<1)
+#  define SSI_INTE_DIE          (1 << 1)
-#define SSI0_CONFIG                0xB1600020
+#define SSI0_CONFIG             0xB1600020
-#  define SSI_CONFIG_AO              (1<<24)
+#  define SSI_CONFIG_AO         (1 << 24)
-#  define SSI_CONFIG_DO              (1<<23)
+#  define SSI_CONFIG_DO         (1 << 23)
-#  define SSI_CONFIG_ALEN_BIT        20
+#  define SSI_CONFIG_ALEN_BIT   20
-#    define SSI_CONFIG_ALEN_MASK       (0x7<<20)
+#  define SSI_CONFIG_ALEN_MASK  (0x7 << 20)
-#  define SSI_CONFIG_DLEN_BIT        16
+#  define SSI_CONFIG_DLEN_BIT   16
-#    define SSI_CONFIG_DLEN_MASK       (0x7<<16)
+#  define SSI_CONFIG_DLEN_MASK  (0x7 << 16)
-#  define SSI_CONFIG_DD              (1<<11)
+#  define SSI_CONFIG_DD         (1 << 11)
-#  define SSI_CONFIG_AD              (1<<10)
+#  define SSI_CONFIG_AD         (1 << 10)
-#  define SSI_CONFIG_BM_BIT          8
+#  define SSI_CONFIG_BM_BIT     8
-#    define SSI_CONFIG_BM_MASK         (0x3<<8)
+#  define SSI_CONFIG_BM_MASK    (0x3 << 8)
-#  define SSI_CONFIG_CE              (1<<7)
+#  define SSI_CONFIG_CE         (1 << 7)
-#  define SSI_CONFIG_DP              (1<<6)
+#  define SSI_CONFIG_DP         (1 << 6)
-#  define SSI_CONFIG_DL              (1<<5)
+#  define SSI_CONFIG_DL         (1 << 5)
-#  define SSI_CONFIG_EP              (1<<4)
+#  define SSI_CONFIG_EP         (1 << 4)
-#define SSI0_ADATA                 0xB1600024
+#define SSI0_ADATA              0xB1600024
-#  define SSI_AD_D                   (1<<24)
+#  define SSI_AD_D              (1 << 24)
-#  define SSI_AD_ADDR_BIT            16
+#  define SSI_AD_ADDR_BIT       16
-#    define SSI_AD_ADDR_MASK           (0xff<<16)
+#  define SSI_AD_ADDR_MASK      (0xff << 16)
-#  define SSI_AD_DATA_BIT            0
+#  define SSI_AD_DATA_BIT       0
-#    define SSI_AD_DATA_MASK           (0xfff<<0)
+#  define SSI_AD_DATA_MASK      (0xfff << 0)
-#define SSI0_CLKDIV                0xB1600028
+#define SSI0_CLKDIV             0xB1600028
-#define SSI0_CONTROL               0xB1600100
+#define SSI0_CONTROL            0xB1600100
-#  define SSI_CONTROL_CD             (1<<1)
+#  define SSI_CONTROL_CD        (1 << 1)
-#  define SSI_CONTROL_E              (1<<0)
+#  define SSI_CONTROL_E         (1 << 0)
 /* SSI1 */
-#define SSI1_STATUS                0xB1680000
+#define SSI1_STATUS             0xB1680000
-#define SSI1_INT                   0xB1680004
+#define SSI1_INT                0xB1680004
-#define SSI1_INT_ENABLE            0xB1680008
+#define SSI1_INT_ENABLE         0xB1680008
-#define SSI1_CONFIG                0xB1680020
+#define SSI1_CONFIG             0xB1680020
-#define SSI1_ADATA                 0xB1680024
+#define SSI1_ADATA              0xB1680024
-#define SSI1_CLKDIV                0xB1680028
+#define SSI1_CLKDIV             0xB1680028
-#define SSI1_ENABLE                0xB1680100
+#define SSI1_ENABLE             0xB1680100
 /*
 * Register content definitions
 */
-#define SSI_STATUS_BF                           (1<<4)
+#define SSI_STATUS_BF           (1 << 4)
-#define SSI_STATUS_OF                           (1<<3)
+#define SSI_STATUS_OF           (1 << 3)
-#define SSI_STATUS_UF                           (1<<2)
+#define SSI_STATUS_UF           (1 << 2)
-#define SSI_STATUS_D                            (1<<1)
+#define SSI_STATUS_D            (1 << 1)
-#define SSI_STATUS_B                            (1<<0)
+#define SSI_STATUS_B            (1 << 0)
 /* SSI_INT */
-#define SSI_INT_OI                                      (1<<3)
+#define SSI_INT_OI              (1 << 3)
-#define SSI_INT_UI                                      (1<<2)
+#define SSI_INT_UI              (1 << 2)
-#define SSI_INT_DI                                      (1<<1)
+#define SSI_INT_DI              (1 << 1)
 /* SSI_INTEN */
-#define SSI_INTEN_OIE                           (1<<3)
+#define SSI_INTEN_OIE           (1 << 3)
-#define SSI_INTEN_UIE                           (1<<2)
+#define SSI_INTEN_UIE           (1 << 2)
-#define SSI_INTEN_DIE                           (1<<1)
+#define SSI_INTEN_DIE           (1 << 1)
-#define SSI_CONFIG_AO                           (1<<24)
+#define SSI_CONFIG_AO           (1 << 24)
-#define SSI_CONFIG_DO                           (1<<23)
+#define SSI_CONFIG_DO           (1 << 23)
-#define SSI_CONFIG_ALEN                         (7<<20)
+#define SSI_CONFIG_ALEN         (7 << 20)
-#define SSI_CONFIG_DLEN                         (15<<16)
+#define SSI_CONFIG_DLEN         (15 << 16)
-#define SSI_CONFIG_DD                           (1<<11)
+#define SSI_CONFIG_DD           (1 << 11)
-#define SSI_CONFIG_AD                           (1<<10)
+#define SSI_CONFIG_AD           (1 << 10)
-#define SSI_CONFIG_BM                           (3<<8)
+#define SSI_CONFIG_BM           (3 << 8)
-#define SSI_CONFIG_CE                           (1<<7)
+#define SSI_CONFIG_CE           (1 << 7)
-#define SSI_CONFIG_DP                           (1<<6)
+#define SSI_CONFIG_DP           (1 << 6)
-#define SSI_CONFIG_DL                           (1<<5)
+#define SSI_CONFIG_DL           (1 << 5)
-#define SSI_CONFIG_EP                           (1<<4)
+#define SSI_CONFIG_EP           (1 << 4)
-#define SSI_CONFIG_ALEN_N(N)            ((N-1)<<20)
+#define SSI_CONFIG_ALEN_N(N)    ((N-1) << 20)
-#define SSI_CONFIG_DLEN_N(N)            ((N-1)<<16)
+#define SSI_CONFIG_DLEN_N(N)    ((N-1) << 16)
-#define SSI_CONFIG_BM_HI                        (0<<8)
+#define SSI_CONFIG_BM_HI        (0 << 8)
-#define SSI_CONFIG_BM_LO                        (1<<8)
+#define SSI_CONFIG_BM_LO        (1 << 8)
-#define SSI_CONFIG_BM_CY                        (2<<8)
+#define SSI_CONFIG_BM_CY        (2 << 8)
-#define SSI_ADATA_D                                     (1<<24)
+#define SSI_ADATA_D             (1 << 24)
-#define SSI_ADATA_ADDR                          (0xFF<<16)
+#define SSI_ADATA_ADDR          (0xFF << 16)
-#define SSI_ADATA_DATA                          (0x0FFF)
+#define SSI_ADATA_DATA          0x0FFF
-#define SSI_ADATA_ADDR_N(N)                     (N<<16)
+#define SSI_ADATA_ADDR_N(N)     (N << 16)
-#define SSI_ENABLE_CD                           (1<<1)
+#define SSI_ENABLE_CD           (1 << 1)
-#define SSI_ENABLE_E                            (1<<0)
+#define SSI_ENABLE_E            (1 << 0)
 /* IrDA Controller */
-#define IRDA_BASE                 0xB0300000
+#define IRDA_BASE               0xB0300000
-#define IR_RING_PTR_STATUS        (IRDA_BASE+0x00)
+#define IR_RING_PTR_STATUS      (IRDA_BASE + 0x00)
-#define IR_RING_BASE_ADDR_H       (IRDA_BASE+0x04)
+#define IR_RING_BASE_ADDR_H     (IRDA_BASE + 0x04)
-#define IR_RING_BASE_ADDR_L       (IRDA_BASE+0x08)
+#define IR_RING_BASE_ADDR_L     (IRDA_BASE + 0x08)
-#define IR_RING_SIZE              (IRDA_BASE+0x0C)
+#define IR_RING_SIZE            (IRDA_BASE + 0x0C)
-#define IR_RING_PROMPT            (IRDA_BASE+0x10)
+#define IR_RING_PROMPT          (IRDA_BASE + 0x10)
-#define IR_RING_ADDR_CMPR         (IRDA_BASE+0x14)
+#define IR_RING_ADDR_CMPR       (IRDA_BASE + 0x14)
-#define IR_INT_CLEAR              (IRDA_BASE+0x18)
+#define IR_INT_CLEAR            (IRDA_BASE + 0x18)
-#define IR_CONFIG_1               (IRDA_BASE+0x20)
+#define IR_CONFIG_1             (IRDA_BASE + 0x20)
-#  define IR_RX_INVERT_LED        (1<<0)
+#  define IR_RX_INVERT_LED      (1 << 0)
-#  define IR_TX_INVERT_LED        (1<<1)
+#  define IR_TX_INVERT_LED      (1 << 1)
-#  define IR_ST                   (1<<2)
+#  define IR_ST                 (1 << 2)
-#  define IR_SF                   (1<<3)
+#  define IR_SF                 (1 << 3)
-#  define IR_SIR                  (1<<4)
+#  define IR_SIR                (1 << 4)
-#  define IR_MIR                  (1<<5)
+#  define IR_MIR                (1 << 5)
-#  define IR_FIR                  (1<<6)
+#  define IR_FIR                (1 << 6)
-#  define IR_16CRC                (1<<7)
+#  define IR_16CRC              (1 << 7)
-#  define IR_TD                   (1<<8)
+#  define IR_TD                 (1 << 8)
-#  define IR_RX_ALL               (1<<9)
+#  define IR_RX_ALL             (1 << 9)
-#  define IR_DMA_ENABLE           (1<<10)
+#  define IR_DMA_ENABLE         (1 << 10)
-#  define IR_RX_ENABLE            (1<<11)
+#  define IR_RX_ENABLE          (1 << 11)
-#  define IR_TX_ENABLE            (1<<12)
+#  define IR_TX_ENABLE          (1 << 12)
-#  define IR_LOOPBACK             (1<<14)
+#  define IR_LOOPBACK           (1 << 14)
-#  define IR_SIR_MODE             (IR_SIR | IR_DMA_ENABLE | \
+#  define IR_SIR_MODE           (IR_SIR | IR_DMA_ENABLE | \
-                                   IR_RX_ALL | IR_RX_ENABLE | IR_SF | IR_16CRC)
+                                 IR_RX_ALL | IR_RX_ENABLE | IR_SF | IR_16CRC)
-#define IR_SIR_FLAGS              (IRDA_BASE+0x24)
+#define IR_SIR_FLAGS            (IRDA_BASE + 0x24)
-#define IR_ENABLE                 (IRDA_BASE+0x28)
+#define IR_ENABLE               (IRDA_BASE + 0x28)
-#  define IR_RX_STATUS            (1<<9)
+#  define IR_RX_STATUS          (1 << 9)
-#  define IR_TX_STATUS            (1<<10)
+#  define IR_TX_STATUS          (1 << 10)
-#define IR_READ_PHY_CONFIG        (IRDA_BASE+0x2C)
+#define IR_READ_PHY_CONFIG      (IRDA_BASE + 0x2C)
-#define IR_WRITE_PHY_CONFIG       (IRDA_BASE+0x30)
+#define IR_WRITE_PHY_CONFIG     (IRDA_BASE + 0x30)
-#define IR_MAX_PKT_LEN            (IRDA_BASE+0x34)
+#define IR_MAX_PKT_LEN          (IRDA_BASE + 0x34)
-#define IR_RX_BYTE_CNT            (IRDA_BASE+0x38)
+#define IR_RX_BYTE_CNT          (IRDA_BASE + 0x38)
-#define IR_CONFIG_2               (IRDA_BASE+0x3C)
+#define IR_CONFIG_2             (IRDA_BASE + 0x3C)
-#  define IR_MODE_INV             (1<<0)
+#  define IR_MODE_INV           (1 << 0)
-#  define IR_ONE_PIN              (1<<1)
+#  define IR_ONE_PIN            (1 << 1)
-#define IR_INTERFACE_CONFIG       (IRDA_BASE+0x40)
+#define IR_INTERFACE_CONFIG     (IRDA_BASE + 0x40)
 /* GPIO */
-#define SYS_PINFUNC               0xB190002C
+#define SYS_PINFUNC             0xB190002C
-#  define SYS_PF_USB                    (1<<15) /* 2nd USB device/host */
+#  define SYS_PF_USB            (1 << 15)       /* 2nd USB device/host */
-#  define SYS_PF_U3                     (1<<14) /* GPIO23/U3TXD */
+#  define SYS_PF_U3             (1 << 14)       /* GPIO23/U3TXD */
-#  define SYS_PF_U2                     (1<<13) /* GPIO22/U2TXD */
+#  define SYS_PF_U2             (1 << 13)       /* GPIO22/U2TXD */
-#  define SYS_PF_U1                     (1<<12) /* GPIO21/U1TXD */
+#  define SYS_PF_U1             (1 << 12)       /* GPIO21/U1TXD */
-#  define SYS_PF_SRC                    (1<<11) /* GPIO6/SROMCKE */
+#  define SYS_PF_SRC            (1 << 11)       /* GPIO6/SROMCKE */
-#  define SYS_PF_CK5                    (1<<10) /* GPIO3/CLK5 */
+#  define SYS_PF_CK5            (1 << 10)       /* GPIO3/CLK5 */
-#  define SYS_PF_CK4                    (1<<9)  /* GPIO2/CLK4 */
+#  define SYS_PF_CK4            (1 << 9)        /* GPIO2/CLK4 */
-#  define SYS_PF_IRF                    (1<<8)  /* GPIO15/IRFIRSEL */
+#  define SYS_PF_IRF            (1 << 8)        /* GPIO15/IRFIRSEL */
-#  define SYS_PF_UR3                    (1<<7)  /* GPIO[14:9]/UART3 */
+#  define SYS_PF_UR3            (1 << 7)        /* GPIO[14:9]/UART3 */
-#  define SYS_PF_I2D                    (1<<6)  /* GPIO8/I2SDI */
+#  define SYS_PF_I2D            (1 << 6)        /* GPIO8/I2SDI */
-#  define SYS_PF_I2S                    (1<<5)  /* I2S/GPIO[29:31] */
+#  define SYS_PF_I2S            (1 << 5)        /* I2S/GPIO[29:31] */
-#  define SYS_PF_NI2                    (1<<4)  /* NI2/GPIO[24:28] */
+#  define SYS_PF_NI2            (1 << 4)        /* NI2/GPIO[24:28] */
-#  define SYS_PF_U0                     (1<<3)  /* U0TXD/GPIO20 */
+#  define SYS_PF_U0             (1 << 3)        /* U0TXD/GPIO20 */
-#  define SYS_PF_RD                     (1<<2)  /* IRTXD/GPIO19 */
+#  define SYS_PF_RD             (1 << 2)        /* IRTXD/GPIO19 */
-#  define SYS_PF_A97                    (1<<1)  /* AC97/SSL1 */
+#  define SYS_PF_A97            (1 << 1)        /* AC97/SSL1 */
-#  define SYS_PF_S0                     (1<<0)  /* SSI_0/GPIO[16:18] */
+#  define SYS_PF_S0             (1 << 0)        /* SSI_0/GPIO[16:18] */
-/* Au1100 Only */
+/* Au1100 only */
-#  define SYS_PF_PC                     (1<<18) /* PCMCIA/GPIO[207:204] */
+#  define SYS_PF_PC             (1 << 18)       /* PCMCIA/GPIO[207:204] */
-#  define SYS_PF_LCD                    (1<<17) /* extern lcd/GPIO[203:200] */
+#  define SYS_PF_LCD            (1 << 17)       /* extern lcd/GPIO[203:200] */
-#  define SYS_PF_CS                     (1<<16) /* EXTCLK0/32khz to gpio2 */
+#  define SYS_PF_CS             (1 << 16)       /* EXTCLK0/32KHz to gpio2 */
-#  define SYS_PF_EX0                    (1<<9)  /* gpio2/clock */
+#  define SYS_PF_EX0            (1 << 9)        /* GPIO2/clock */
-/* Au1550 Only.  Redefines lots of pins */
+/* Au1550 only.  Redefines lots of pins */
-#  define SYS_PF_PSC2_MASK              (7 << 17)
+#  define SYS_PF_PSC2_MASK      (7 << 17)
-#  define SYS_PF_PSC2_AC97              (0)
+#  define SYS_PF_PSC2_AC97      0
-#  define SYS_PF_PSC2_SPI               (0)
+#  define SYS_PF_PSC2_SPI       0
-#  define SYS_PF_PSC2_I2S               (1 << 17)
+#  define SYS_PF_PSC2_I2S       (1 << 17)
-#  define SYS_PF_PSC2_SMBUS             (3 << 17)
+#  define SYS_PF_PSC2_SMBUS     (3 << 17)
-#  define SYS_PF_PSC2_GPIO              (7 << 17)
+#  define SYS_PF_PSC2_GPIO      (7 << 17)
-#  define SYS_PF_PSC3_MASK              (7 << 20)
+#  define SYS_PF_PSC3_MASK      (7 << 20)
-#  define SYS_PF_PSC3_AC97              (0)
+#  define SYS_PF_PSC3_AC97      0
-#  define SYS_PF_PSC3_SPI               (0)
+#  define SYS_PF_PSC3_SPI       0
-#  define SYS_PF_PSC3_I2S               (1 << 20)
+#  define SYS_PF_PSC3_I2S       (1 << 20)
-#  define SYS_PF_PSC3_SMBUS             (3 << 20)
+#  define SYS_PF_PSC3_SMBUS     (3 << 20)
-#  define SYS_PF_PSC3_GPIO              (7 << 20)
+#  define SYS_PF_PSC3_GPIO      (7 << 20)
-#  define SYS_PF_PSC1_S1                (1 << 1)
+#  define SYS_PF_PSC1_S1        (1 << 1)
-#  define SYS_PF_MUST_BE_SET            ((1 << 5) | (1 << 2))
+#  define SYS_PF_MUST_BE_SET    ((1 << 5) | (1 << 2))
-/* Au1200 Only */
+/* Au1200 only */
 #ifdef CONFIG_SOC_AU1200
-#define SYS_PINFUNC_DMA         (1<<31)
+#define SYS_PINFUNC_DMA         (1 << 31)
-#define SYS_PINFUNC_S0A         (1<<30)
+#define SYS_PINFUNC_S0A         (1 << 30)
-#define SYS_PINFUNC_S1A         (1<<29)
+#define SYS_PINFUNC_S1A         (1 << 29)
-#define SYS_PINFUNC_LP0         (1<<28)
+#define SYS_PINFUNC_LP0         (1 << 28)
-#define SYS_PINFUNC_LP1         (1<<27)
+#define SYS_PINFUNC_LP1         (1 << 27)
-#define SYS_PINFUNC_LD16        (1<<26)
+#define SYS_PINFUNC_LD16        (1 << 26)
-#define SYS_PINFUNC_LD8         (1<<25)
+#define SYS_PINFUNC_LD8         (1 << 25)
-#define SYS_PINFUNC_LD1         (1<<24)
+#define SYS_PINFUNC_LD1         (1 << 24)
-#define SYS_PINFUNC_LD0         (1<<23)
+#define SYS_PINFUNC_LD0         (1 << 23)
-#define SYS_PINFUNC_P1A         (3<<21)
+#define SYS_PINFUNC_P1A         (3 << 21)
-#define SYS_PINFUNC_P1B         (1<<20)
+#define SYS_PINFUNC_P1B         (1 << 20)
-#define SYS_PINFUNC_FS3         (1<<19)
+#define SYS_PINFUNC_FS3         (1 << 19)
-#define SYS_PINFUNC_P0A         (3<<17)
+#define SYS_PINFUNC_P0A         (3 << 17)
-#define SYS_PINFUNC_CS          (1<<16)
+#define SYS_PINFUNC_CS          (1 << 16)
-#define SYS_PINFUNC_CIM         (1<<15)
+#define SYS_PINFUNC_CIM         (1 << 15)
-#define SYS_PINFUNC_P1C         (1<<14)
+#define SYS_PINFUNC_P1C         (1 << 14)
-#define SYS_PINFUNC_U1T         (1<<12)
+#define SYS_PINFUNC_U1T         (1 << 12)
-#define SYS_PINFUNC_U1R         (1<<11)
+#define SYS_PINFUNC_U1R         (1 << 11)
-#define SYS_PINFUNC_EX1         (1<<10)
+#define SYS_PINFUNC_EX1         (1 << 10)
-#define SYS_PINFUNC_EX0         (1<<9)
+#define SYS_PINFUNC_EX0         (1 << 9)
-#define SYS_PINFUNC_U0R         (1<<8)
+#define SYS_PINFUNC_U0R         (1 << 8)
-#define SYS_PINFUNC_MC          (1<<7)
+#define SYS_PINFUNC_MC          (1 << 7)
-#define SYS_PINFUNC_S0B         (1<<6)
+#define SYS_PINFUNC_S0B         (1 << 6)
-#define SYS_PINFUNC_S0C         (1<<5)
+#define SYS_PINFUNC_S0C         (1 << 5)
-#define SYS_PINFUNC_P0B         (1<<4)
+#define SYS_PINFUNC_P0B         (1 << 4)
-#define SYS_PINFUNC_U0T         (1<<3)
+#define SYS_PINFUNC_U0T         (1 << 3)
-#define SYS_PINFUNC_S1B         (1<<2)
+#define SYS_PINFUNC_S1B         (1 << 2)
 #endif
-#define SYS_TRIOUTRD              0xB1900100
+#define SYS_TRIOUTRD            0xB1900100
-#define SYS_TRIOUTCLR             0xB1900100
+#define SYS_TRIOUTCLR           0xB1900100
-#define SYS_OUTPUTRD              0xB1900108
+#define SYS_OUTPUTRD            0xB1900108
-#define SYS_OUTPUTSET             0xB1900108
+#define SYS_OUTPUTSET           0xB1900108
-#define SYS_OUTPUTCLR             0xB190010C
+#define SYS_OUTPUTCLR           0xB190010C
-#define SYS_PINSTATERD            0xB1900110
+#define SYS_PINSTATERD          0xB1900110
-#define SYS_PININPUTEN            0xB1900110
+#define SYS_PININPUTEN          0xB1900110
 /* GPIO2, Au1500, Au1550 only */
-#define GPIO2_BASE                0xB1700000
+#define GPIO2_BASE              0xB1700000
-#define GPIO2_DIR                 (GPIO2_BASE + 0)
+#define GPIO2_DIR               (GPIO2_BASE + 0)
-#define GPIO2_OUTPUT              (GPIO2_BASE + 8)
+#define GPIO2_OUTPUT            (GPIO2_BASE + 8)
-#define GPIO2_PINSTATE            (GPIO2_BASE + 0xC)
+#define GPIO2_PINSTATE          (GPIO2_BASE + 0xC)
-#define GPIO2_INTENABLE           (GPIO2_BASE + 0x10)
+#define GPIO2_INTENABLE         (GPIO2_BASE + 0x10)
-#define GPIO2_ENABLE              (GPIO2_BASE + 0x14)
+#define GPIO2_ENABLE            (GPIO2_BASE + 0x14)
 /* Power Management */
-#define SYS_SCRATCH0              0xB1900018
+#define SYS_SCRATCH0            0xB1900018
-#define SYS_SCRATCH1              0xB190001C
+#define SYS_SCRATCH1            0xB190001C
-#define SYS_WAKEMSK               0xB1900034
+#define SYS_WAKEMSK             0xB1900034
-#define SYS_ENDIAN                0xB1900038
+#define SYS_ENDIAN              0xB1900038
-#define SYS_POWERCTRL             0xB190003C
+#define SYS_POWERCTRL           0xB190003C
-#define SYS_WAKESRC               0xB190005C
+#define SYS_WAKESRC             0xB190005C
-#define SYS_SLPPWR                0xB1900078
+#define SYS_SLPPWR              0xB1900078
-#define SYS_SLEEP                 0xB190007C
+#define SYS_SLEEP               0xB190007C
 /* Clock Controller */
-#define SYS_FREQCTRL0             0xB1900020
+#define SYS_FREQCTRL0           0xB1900020
-#  define SYS_FC_FRDIV2_BIT         22
+#  define SYS_FC_FRDIV2_BIT     22
-#  define SYS_FC_FRDIV2_MASK        (0xff << SYS_FC_FRDIV2_BIT)
+#  define SYS_FC_FRDIV2_MASK    (0xff << SYS_FC_FRDIV2_BIT)
-#  define SYS_FC_FE2                (1<<21)
+#  define SYS_FC_FE2            (1 << 21)
-#  define SYS_FC_FS2                (1<<20)
+#  define SYS_FC_FS2            (1 << 20)
-#  define SYS_FC_FRDIV1_BIT         12
+#  define SYS_FC_FRDIV1_BIT     12
-#  define SYS_FC_FRDIV1_MASK        (0xff << SYS_FC_FRDIV1_BIT)
+#  define SYS_FC_FRDIV1_MASK    (0xff << SYS_FC_FRDIV1_BIT)
-#  define SYS_FC_FE1                (1<<11)
+#  define SYS_FC_FE1            (1 << 11)
-#  define SYS_FC_FS1                (1<<10)
+#  define SYS_FC_FS1            (1 << 10)
-#  define SYS_FC_FRDIV0_BIT         2
+#  define SYS_FC_FRDIV0_BIT     2
-#  define SYS_FC_FRDIV0_MASK        (0xff << SYS_FC_FRDIV0_BIT)
+#  define SYS_FC_FRDIV0_MASK    (0xff << SYS_FC_FRDIV0_BIT)
-#  define SYS_FC_FE0                (1<<1)
+#  define SYS_FC_FE0            (1 << 1)
-#  define SYS_FC_FS0                (1<<0)
+#  define SYS_FC_FS0            (1 << 0)
-#define SYS_FREQCTRL1             0xB1900024
+#define SYS_FREQCTRL1           0xB1900024
-#  define SYS_FC_FRDIV5_BIT         22
+#  define SYS_FC_FRDIV5_BIT     22
-#  define SYS_FC_FRDIV5_MASK        (0xff << SYS_FC_FRDIV5_BIT)
+#  define SYS_FC_FRDIV5_MASK    (0xff << SYS_FC_FRDIV5_BIT)
-#  define SYS_FC_FE5                (1<<21)
+#  define SYS_FC_FE5            (1 << 21)
-#  define SYS_FC_FS5                (1<<20)
+#  define SYS_FC_FS5            (1 << 20)
-#  define SYS_FC_FRDIV4_BIT         12
+#  define SYS_FC_FRDIV4_BIT     12
-#  define SYS_FC_FRDIV4_MASK        (0xff << SYS_FC_FRDIV4_BIT)
+#  define SYS_FC_FRDIV4_MASK    (0xff << SYS_FC_FRDIV4_BIT)
-#  define SYS_FC_FE4                (1<<11)
+#  define SYS_FC_FE4            (1 << 11)
-#  define SYS_FC_FS4                (1<<10)
+#  define SYS_FC_FS4            (1 << 10)
-#  define SYS_FC_FRDIV3_BIT         2
+#  define SYS_FC_FRDIV3_BIT     2
-#  define SYS_FC_FRDIV3_MASK        (0xff << SYS_FC_FRDIV3_BIT)
+#  define SYS_FC_FRDIV3_MASK    (0xff << SYS_FC_FRDIV3_BIT)
-#  define SYS_FC_FE3                (1<<1)
+#  define SYS_FC_FE3            (1 << 1)
-#  define SYS_FC_FS3                (1<<0)
+#  define SYS_FC_FS3            (1 << 0)
-#define SYS_CLKSRC                0xB1900028
+#define SYS_CLKSRC              0xB1900028
-#  define SYS_CS_ME1_BIT            27
+#  define SYS_CS_ME1_BIT        27
-#  define SYS_CS_ME1_MASK           (0x7<<SYS_CS_ME1_BIT)
+#  define SYS_CS_ME1_MASK       (0x7 << SYS_CS_ME1_BIT)
-#  define SYS_CS_DE1                (1<<26)
+#  define SYS_CS_DE1            (1 << 26)
-#  define SYS_CS_CE1                (1<<25)
+#  define SYS_CS_CE1            (1 << 25)
-#  define SYS_CS_ME0_BIT            22
+#  define SYS_CS_ME0_BIT        22
-#  define SYS_CS_ME0_MASK           (0x7<<SYS_CS_ME0_BIT)
+#  define SYS_CS_ME0_MASK       (0x7 << SYS_CS_ME0_BIT)
-#  define SYS_CS_DE0                (1<<21)
+#  define SYS_CS_DE0            (1 << 21)
-#  define SYS_CS_CE0                (1<<20)
+#  define SYS_CS_CE0            (1 << 20)
-#  define SYS_CS_MI2_BIT            17
+#  define SYS_CS_MI2_BIT        17
-#  define SYS_CS_MI2_MASK           (0x7<<SYS_CS_MI2_BIT)
+#  define SYS_CS_MI2_MASK       (0x7 << SYS_CS_MI2_BIT)
-#  define SYS_CS_DI2                (1<<16)
+#  define SYS_CS_DI2            (1 << 16)
-#  define SYS_CS_CI2                (1<<15)
+#  define SYS_CS_CI2            (1 << 15)
 #ifdef CONFIG_SOC_AU1100
-#  define SYS_CS_ML_BIT             7
+#  define SYS_CS_ML_BIT         7
-#  define SYS_CS_ML_MASK            (0x7<<SYS_CS_ML_BIT)
+#  define SYS_CS_ML_MASK        (0x7 << SYS_CS_ML_BIT)
-#  define SYS_CS_DL                 (1<<6)
+#  define SYS_CS_DL             (1 << 6)
-#  define SYS_CS_CL                 (1<<5)
+#  define SYS_CS_CL             (1 << 5)
 #else
-#  define SYS_CS_MUH_BIT            12
+#  define SYS_CS_MUH_BIT        12
-#  define SYS_CS_MUH_MASK           (0x7<<SYS_CS_MUH_BIT)
+#  define SYS_CS_MUH_MASK       (0x7 << SYS_CS_MUH_BIT)
-#  define SYS_CS_DUH                (1<<11)
+#  define SYS_CS_DUH            (1 << 11)
-#  define SYS_CS_CUH                (1<<10)
+#  define SYS_CS_CUH            (1 << 10)
-#  define SYS_CS_MUD_BIT            7
+#  define SYS_CS_MUD_BIT        7
-#  define SYS_CS_MUD_MASK           (0x7<<SYS_CS_MUD_BIT)
+#  define SYS_CS_MUD_MASK       (0x7 << SYS_CS_MUD_BIT)
-#  define SYS_CS_DUD                (1<<6)
+#  define SYS_CS_DUD            (1 << 6)
-#  define SYS_CS_CUD                (1<<5)
+#  define SYS_CS_CUD            (1 << 5)
 #endif
-#  define SYS_CS_MIR_BIT            2
+#  define SYS_CS_MIR_BIT        2
-#  define SYS_CS_MIR_MASK           (0x7<<SYS_CS_MIR_BIT)
+#  define SYS_CS_MIR_MASK       (0x7 << SYS_CS_MIR_BIT)
-#  define SYS_CS_DIR                (1<<1)
+#  define SYS_CS_DIR            (1 << 1)
-#  define SYS_CS_CIR                (1<<0)
+#  define SYS_CS_CIR            (1 << 0)
-#  define SYS_CS_MUX_AUX            0x1
+#  define SYS_CS_MUX_AUX        0x1
-#  define SYS_CS_MUX_FQ0            0x2
+#  define SYS_CS_MUX_FQ0        0x2
-#  define SYS_CS_MUX_FQ1            0x3
+#  define SYS_CS_MUX_FQ1        0x3
-#  define SYS_CS_MUX_FQ2            0x4
+#  define SYS_CS_MUX_FQ2        0x4
-#  define SYS_CS_MUX_FQ3            0x5
+#  define SYS_CS_MUX_FQ3        0x5
-#  define SYS_CS_MUX_FQ4            0x6
+#  define SYS_CS_MUX_FQ4        0x6
-#  define SYS_CS_MUX_FQ5            0x7
+#  define SYS_CS_MUX_FQ5        0x7
-#define SYS_CPUPLL                0xB1900060
+#define SYS_CPUPLL              0xB1900060
-#define SYS_AUXPLL                0xB1900064
+#define SYS_AUXPLL              0xB1900064
 /* AC97 Controller */
-#define AC97C_CONFIG              0xB0000000
+#define AC97C_CONFIG            0xB0000000
-#  define AC97C_RECV_SLOTS_BIT  13
+#  define AC97C_RECV_SLOTS_BIT  13
 #  define AC97C_RECV_SLOTS_MASK (0x3ff << AC97C_RECV_SLOTS_BIT)
-#  define AC97C_XMIT_SLOTS_BIT  3
+#  define AC97C_XMIT_SLOTS_BIT  3
 #  define AC97C_XMIT_SLOTS_MASK (0x3ff << AC97C_XMIT_SLOTS_BIT)
-#  define AC97C_SG              (1<<2)
+#  define AC97C_SG              (1 << 2)
-#  define AC97C_SYNC            (1<<1)
+#  define AC97C_SYNC            (1 << 1)
-#  define AC97C_RESET           (1<<0)
+#  define AC97C_RESET           (1 << 0)
-#define AC97C_STATUS              0xB0000004
+#define AC97C_STATUS            0xB0000004
-#  define AC97C_XU              (1<<11)
+#  define AC97C_XU              (1 << 11)
-#  define AC97C_XO              (1<<10)
+#  define AC97C_XO              (1 << 10)
-#  define AC97C_RU              (1<<9)
+#  define AC97C_RU              (1 << 9)
-#  define AC97C_RO              (1<<8)
+#  define AC97C_RO              (1 << 8)
-#  define AC97C_READY           (1<<7)
+#  define AC97C_READY           (1 << 7)
-#  define AC97C_CP              (1<<6)
+#  define AC97C_CP              (1 << 6)
-#  define AC97C_TR              (1<<5)
+#  define AC97C_TR              (1 << 5)
-#  define AC97C_TE              (1<<4)
+#  define AC97C_TE              (1 << 4)
-#  define AC97C_TF              (1<<3)
+#  define AC97C_TF              (1 << 3)
-#  define AC97C_RR              (1<<2)
+#  define AC97C_RR              (1 << 2)
-#  define AC97C_RE              (1<<1)
+#  define AC97C_RE              (1 << 1)
-#  define AC97C_RF              (1<<0)
+#  define AC97C_RF              (1 << 0)
-#define AC97C_DATA                0xB0000008
+#define AC97C_DATA              0xB0000008
-#define AC97C_CMD                 0xB000000C
+#define AC97C_CMD               0xB000000C
-#  define AC97C_WD_BIT          16
+#  define AC97C_WD_BIT          16
-#  define AC97C_READ            (1<<7)
+#  define AC97C_READ            (1 << 7)
-#  define AC97C_INDEX_MASK      0x7f
+#  define AC97C_INDEX_MASK      0x7f
-#define AC97C_CNTRL               0xB0000010
+#define AC97C_CNTRL             0xB0000010
-#  define AC97C_RS              (1<<1)
+#  define AC97C_RS              (1 << 1)
-#  define AC97C_CE              (1<<0)
+#  define AC97C_CE              (1 << 0)
 /* Secure Digital (SD) Controller */
 #define SD0_XMIT_FIFO   0xB0600000
@@ -1638,73 +1633,74 @@ enum soc_au1200_ints {
 #if defined(CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1550)
 /* Au1500 PCI Controller */
-#define Au1500_CFG_BASE           0xB4005000 // virtual, kseg0 addr
+#define Au1500_CFG_BASE         0xB4005000      /* virtual, KSEG1 addr */
-#define Au1500_PCI_CMEM           (Au1500_CFG_BASE + 0)
+#define Au1500_PCI_CMEM         (Au1500_CFG_BASE + 0)
-#define Au1500_PCI_CFG            (Au1500_CFG_BASE + 4)
+#define Au1500_PCI_CFG          (Au1500_CFG_BASE + 4)
-#  define PCI_ERROR ((1<<22) | (1<<23) | (1<<24) | (1<<25) | (1<<26) | (1<<27))
+#  define PCI_ERROR             ((1 << 22) | (1 << 23) | (1 << 24) | \
-#define Au1500_PCI_B2BMASK_CCH    (Au1500_CFG_BASE + 8)
+                                 (1 << 25) | (1 << 26) | (1 << 27))
-#define Au1500_PCI_B2B0_VID       (Au1500_CFG_BASE + 0xC)
+#define Au1500_PCI_B2BMASK_CCH  (Au1500_CFG_BASE + 8)
-#define Au1500_PCI_B2B1_ID        (Au1500_CFG_BASE + 0x10)
+#define Au1500_PCI_B2B0_VID     (Au1500_CFG_BASE + 0xC)
-#define Au1500_PCI_MWMASK_DEV     (Au1500_CFG_BASE + 0x14)
+#define Au1500_PCI_B2B1_ID      (Au1500_CFG_BASE + 0x10)
+#define Au1500_PCI_MWMASK_DEV   (Au1500_CFG_BASE + 0x14)
 #define Au1500_PCI_MWBASE_REV_CCL (Au1500_CFG_BASE + 0x18)
-#define Au1500_PCI_ERR_ADDR       (Au1500_CFG_BASE + 0x1C)
+#define Au1500_PCI_ERR_ADDR     (Au1500_CFG_BASE + 0x1C)
-#define Au1500_PCI_SPEC_INTACK    (Au1500_CFG_BASE + 0x20)
+#define Au1500_PCI_SPEC_INTACK  (Au1500_CFG_BASE + 0x20)
-#define Au1500_PCI_ID             (Au1500_CFG_BASE + 0x100)
+#define Au1500_PCI_ID           (Au1500_CFG_BASE + 0x100)
-#define Au1500_PCI_STATCMD        (Au1500_CFG_BASE + 0x104)
+#define Au1500_PCI_STATCMD      (Au1500_CFG_BASE + 0x104)
-#define Au1500_PCI_CLASSREV       (Au1500_CFG_BASE + 0x108)
+#define Au1500_PCI_CLASSREV     (Au1500_CFG_BASE + 0x108)
-#define Au1500_PCI_HDRTYPE        (Au1500_CFG_BASE + 0x10C)
+#define Au1500_PCI_HDRTYPE      (Au1500_CFG_BASE + 0x10C)
-#define Au1500_PCI_MBAR           (Au1500_CFG_BASE + 0x110)
+#define Au1500_PCI_MBAR         (Au1500_CFG_BASE + 0x110)
-#define Au1500_PCI_HDR            0xB4005100 // virtual, kseg0 addr
+#define Au1500_PCI_HDR          0xB4005100      /* virtual, KSEG1 addr */
-/* All of our structures, like pci resource, have 32 bit members.
+/*
+ * All of our structures, like PCI resource, have 32-bit members.
 * Drivers are expected to do an ioremap on the PCI MEM resource, but it's
- * hard to store 0x4 0000 0000 in a 32 bit type.  We require a small patch
+ * hard to store 0x4 0000 0000 in a 32-bit type.  We require a small patch
 * to __ioremap to check for addresses between (u32)Au1500_PCI_MEM_START and
- * (u32)Au1500_PCI_MEM_END and change those to the full 36 bit PCI MEM
+ * (u32)Au1500_PCI_MEM_END and change those to the full 36-bit PCI MEM
- * addresses.  For PCI IO, it's simpler because we get to do the ioremap
+ * addresses.  For PCI I/O, it's simpler because we get to do the ioremap
 * ourselves and then adjust the device's resources.
 */
-#define Au1500_EXT_CFG            0x600000000ULL
+#define Au1500_EXT_CFG          0x600000000ULL
-#define Au1500_EXT_CFG_TYPE1      0x680000000ULL
+#define Au1500_EXT_CFG_TYPE1    0x680000000ULL
-#define Au1500_PCI_IO_START       0x500000000ULL
+#define Au1500_PCI_IO_START     0x500000000ULL
-#define Au1500_PCI_IO_END         0x5000FFFFFULL
+#define Au1500_PCI_IO_END       0x5000FFFFFULL
-#define Au1500_PCI_MEM_START      0x440000000ULL
+#define Au1500_PCI_MEM_START    0x440000000ULL
-#define Au1500_PCI_MEM_END        0x44FFFFFFFULL
+#define Au1500_PCI_MEM_END      0x44FFFFFFFULL
 #define PCI_IO_START    0x00001000
 #define PCI_IO_END      0x000FFFFF
 #define PCI_MEM_START   0x40000000
 #define PCI_MEM_END     0x4FFFFFFF
-#define PCI_FIRST_DEVFN (0<<3)
+#define PCI_FIRST_DEVFN (0 << 3)
-#define PCI_LAST_DEVFN  (19<<3)
+#define PCI_LAST_DEVFN  (19 << 3)
-#define IOPORT_RESOURCE_START 0x00001000 /* skip legacy probing */
+#define IOPORT_RESOURCE_START   0x00001000      /* skip legacy probing */
-#define IOPORT_RESOURCE_END   0xffffffff
+#define IOPORT_RESOURCE_END     0xffffffff
-#define IOMEM_RESOURCE_START  0x10000000
+#define IOMEM_RESOURCE_START    0x10000000
-#define IOMEM_RESOURCE_END    0xffffffff
+#define IOMEM_RESOURCE_END      0xffffffff
 #else /* Au1000 and Au1100 and Au1200 */
-/* don't allow any legacy ports probing */
+/* Don't allow any legacy ports probing */
-#define IOPORT_RESOURCE_START 0x10000000
+#define IOPORT_RESOURCE_START   0x10000000
-#define IOPORT_RESOURCE_END   0xffffffff
+#define IOPORT_RESOURCE_END     0xffffffff
-#define IOMEM_RESOURCE_START  0x10000000
+#define IOMEM_RESOURCE_START    0x10000000
-#define IOMEM_RESOURCE_END    0xffffffff
+#define IOMEM_RESOURCE_END      0xffffffff
-#define PCI_IO_START    0
+#define PCI_IO_START    0
-#define PCI_IO_END      0
+#define PCI_IO_END      0
-#define PCI_MEM_START   0
+#define PCI_MEM_START   0
-#define PCI_MEM_END     0
+#define PCI_MEM_END     0
 #define PCI_FIRST_DEVFN 0
-#define PCI_LAST_DEVFN  0
+#define PCI_LAST_DEVFN  0
 #endif
 #ifndef _LANGUAGE_ASSEMBLY
-typedef volatile struct
+typedef volatile struct {
-{
        /* 0x0000 */ u32 toytrim;
        /* 0x0004 */ u32 toywrite;
        /* 0x0008 */ u32 toymatch0;
@@ -1746,13 +1742,14 @@ typedef volatile struct
        /* 0x010C */ u32 outputclr;
        /* 0x0110 */ u32 pinstaterd;
 #define pininputen pinstaterd
 } AU1X00_SYS;
-static AU1X00_SYS* const sys  = (AU1X00_SYS *)SYS_BASE;
+static AU1X00_SYS * const sys = (AU1X00_SYS *)SYS_BASE;
 #endif
-/* Processor information base on prid.
+/*
+ * Processor information based on PRID.
 * Copied from PowerPC.
 */
 #ifndef _LANGUAGE_ASSEMBLY
@@ -1767,9 +1764,8 @@ struct cpu_spec {
        unsigned char   cpu_pll_wo;     /* sys_cpupll reg. write-only */
 };
-extern struct cpu_spec          cpu_specs[];
+extern struct cpu_spec  cpu_specs[];
-extern struct cpu_spec          *cur_cpu_spec[];
+extern struct cpu_spec  *cur_cpu_spec[];
 #endif
 #endif
diff --git a/include/asm-mips/mach-au1x00/au1000_dma.h b/include/asm-mips/mach-au1x00/au1000_dma.h
index 9f29520e8fb0..c333b4e1cd44 100644
--- a/include/asm-mips/mach-au1x00/au1000_dma.h
+++ b/include/asm-mips/mach-au1x00/au1000_dma.h
@@ -1,11 +1,10 @@
 /*
 * BRIEF MODULE DESCRIPTION
- *      Defines for using and allocating dma channels on the Alchemy
+ *      Defines for using and allocating DMA channels on the Alchemy
- *      Au1000 mips processor.
+ *      Au1x00 MIPS processors.
 *
- * Copyright 2000 MontaVista Software Inc.
+ * Copyright 2000, 2008 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
+ * Author: MontaVista Software, Inc. <source@mvista.com>
- *              stevel@mvista.com or source@mvista.com
 *
 *  This program is free software; you can redistribute  it and/or modify it
 *  under  the terms of  the GNU General  Public License as published by the
@@ -31,7 +30,7 @@
 #ifndef __ASM_AU1000_DMA_H
 #define __ASM_AU1000_DMA_H
-#include <asm/io.h>             /* need byte IO */
+#include <linux/io.h>           /* need byte IO */
 #include <linux/spinlock.h>     /* And spinlocks */
 #include <linux/delay.h>
 #include <asm/system.h>
@@ -50,36 +49,36 @@
 #define DMA_DAH_MASK            (0x0f << 20)
 #define DMA_DID_BIT             16
 #define DMA_DID_MASK            (0x0f << DMA_DID_BIT)
-#define DMA_DS                  (1<<15)
+#define DMA_DS                  (1 << 15)
-#define DMA_BE                  (1<<13)
+#define DMA_BE                  (1 << 13)
-#define DMA_DR                  (1<<12)
+#define DMA_DR                  (1 << 12)
-#define DMA_TS8                 (1<<11)
+#define DMA_TS8                 (1 << 11)
 #define DMA_DW_BIT              9
 #define DMA_DW_MASK             (0x03 << DMA_DW_BIT)
 #define DMA_DW8                 (0 << DMA_DW_BIT)
 #define DMA_DW16                (1 << DMA_DW_BIT)
 #define DMA_DW32                (2 << DMA_DW_BIT)
-#define DMA_NC                  (1<<8)
+#define DMA_NC                  (1 << 8)
-#define DMA_IE                  (1<<7)
+#define DMA_IE                  (1 << 7)
-#define DMA_HALT                (1<<6)
+#define DMA_HALT                (1 << 6)
-#define DMA_GO                  (1<<5)
+#define DMA_GO                  (1 << 5)
-#define DMA_AB                  (1<<4)
+#define DMA_AB                  (1 << 4)
-#define DMA_D1                  (1<<3)
+#define DMA_D1                  (1 << 3)
-#define DMA_BE1                 (1<<2)
+#define DMA_BE1                 (1 << 2)
-#define DMA_D0                  (1<<1)
+#define DMA_D0                  (1 << 1)
-#define DMA_BE0                 (1<<0)
+#define DMA_BE0                 (1 << 0)
-#define DMA_PERIPHERAL_ADDR       0x00000008
+#define DMA_PERIPHERAL_ADDR     0x00000008
-#define DMA_BUFFER0_START         0x0000000C
+#define DMA_BUFFER0_START       0x0000000C
-#define DMA_BUFFER1_START         0x00000014
+#define DMA_BUFFER1_START       0x00000014
-#define DMA_BUFFER0_COUNT         0x00000010
+#define DMA_BUFFER0_COUNT       0x00000010
-#define DMA_BUFFER1_COUNT         0x00000018
+#define DMA_BUFFER1_COUNT       0x00000018
-#define DMA_BAH_BIT 16
+#define DMA_BAH_BIT     16
-#define DMA_BAH_MASK (0x0f << DMA_BAH_BIT)
+#define DMA_BAH_MASK    (0x0f << DMA_BAH_BIT)
-#define DMA_COUNT_BIT 0
+#define DMA_COUNT_BIT   0
-#define DMA_COUNT_MASK (0xffff << DMA_COUNT_BIT)
+#define DMA_COUNT_MASK  (0xffff << DMA_COUNT_BIT)
-/* DMA Device ID's follow */
+/* DMA Device IDs follow */
 enum {
        DMA_ID_UART0_TX = 0,
        DMA_ID_UART0_RX,
@@ -110,7 +109,8 @@ enum {
 };
 struct dma_chan {
-        int dev_id;             // this channel is allocated if >=0, free otherwise
+        int dev_id;             /* this channel is allocated if >= 0, */
+                                /* free otherwise */
        unsigned int io;
        const char *dev_str;
        int irq;
@@ -132,23 +132,23 @@ extern int au1000_dma_read_proc(char *buf, char **start, off_t fpos,
 extern void dump_au1000_dma_channel(unsigned int dmanr);
 extern spinlock_t au1000_dma_spin_lock;
+static inline struct dma_chan *get_dma_chan(unsigned int dmanr)
-static __inline__ struct dma_chan *get_dma_chan(unsigned int dmanr)
 {
-        if (dmanr >= NUM_AU1000_DMA_CHANNELS
+        if (dmanr >= NUM_AU1000_DMA_CHANNELS ||
-            || au1000_dma_table[dmanr].dev_id < 0)
+            au1000_dma_table[dmanr].dev_id < 0)
                return NULL;
        return &au1000_dma_table[dmanr];
 }
-static __inline__ unsigned long claim_dma_lock(void)
+static inline unsigned long claim_dma_lock(void)
 {
        unsigned long flags;
        spin_lock_irqsave(&au1000_dma_spin_lock, flags);
        return flags;
 }
-static __inline__ void release_dma_lock(unsigned long flags)
+static inline void release_dma_lock(unsigned long flags)
 {
        spin_unlock_irqrestore(&au1000_dma_spin_lock, flags);
 }
@@ -156,48 +156,53 @@ static __inline__ void release_dma_lock(unsigned long flags)
 /*
 * Set the DMA buffer enable bits in the mode register.
 */
-static __inline__ void enable_dma_buffer0(unsigned int dmanr)
+static inline void enable_dma_buffer0(unsigned int dmanr)
 {
        struct dma_chan *chan = get_dma_chan(dmanr);
        if (!chan)
                return;
        au_writel(DMA_BE0, chan->io + DMA_MODE_SET);
 }
-static __inline__ void enable_dma_buffer1(unsigned int dmanr)
+static inline void enable_dma_buffer1(unsigned int dmanr)
 {
        struct dma_chan *chan = get_dma_chan(dmanr);
        if (!chan)
                return;
        au_writel(DMA_BE1, chan->io + DMA_MODE_SET);
 }
-static __inline__ void enable_dma_buffers(unsigned int dmanr)
+static inline void enable_dma_buffers(unsigned int dmanr)
 {
        struct dma_chan *chan = get_dma_chan(dmanr);
        if (!chan)
                return;
        au_writel(DMA_BE0 | DMA_BE1, chan->io + DMA_MODE_SET);
 }
-static __inline__ void start_dma(unsigned int dmanr)
+static inline void start_dma(unsigned int dmanr)
 {
        struct dma_chan *chan = get_dma_chan(dmanr);
        if (!chan)
                return;
        au_writel(DMA_GO, chan->io + DMA_MODE_SET);
 }
 #define DMA_HALT_POLL 0x5000
-static __inline__ void halt_dma(unsigned int dmanr)
+static inline void halt_dma(unsigned int dmanr)
 {
        struct dma_chan *chan = get_dma_chan(dmanr);
        int i;
        if (!chan)
                return;
        au_writel(DMA_GO, chan->io + DMA_MODE_CLEAR);
-        // poll the halt bit
+        /* Poll the halt bit */
        for (i = 0; i < DMA_HALT_POLL; i++)
                if (au_readl(chan->io + DMA_MODE_READ) & DMA_HALT)
                        break;
@@ -205,55 +210,57 @@ static __inline__ void halt_dma(unsigned int dmanr)
                printk(KERN_INFO "halt_dma: HALT poll expired!\n");
 }
+static inline void disable_dma(unsigned int dmanr)
-static __inline__ void disable_dma(unsigned int dmanr)
 {
        struct dma_chan *chan = get_dma_chan(dmanr);
        if (!chan)
                return;
        halt_dma(dmanr);
-        // now we can disable the buffers
+        /* Now we can disable the buffers */
        au_writel(~DMA_GO, chan->io + DMA_MODE_CLEAR);
 }
-static __inline__ int dma_halted(unsigned int dmanr)
+static inline int dma_halted(unsigned int dmanr)
 {
        struct dma_chan *chan = get_dma_chan(dmanr);
        if (!chan)
                return 1;
        return (au_readl(chan->io + DMA_MODE_READ) & DMA_HALT) ? 1 : 0;
 }
-/* initialize a DMA channel */
+/* Initialize a DMA channel. */
-static __inline__ void init_dma(unsigned int dmanr)
+static inline void init_dma(unsigned int dmanr)
 {
        struct dma_chan *chan = get_dma_chan(dmanr);
        u32 mode;
        if (!chan)
                return;
        disable_dma(dmanr);
-        // set device FIFO address
+        /* Set device FIFO address */
-        au_writel(CPHYSADDR(chan->fifo_addr),
+        au_writel(CPHYSADDR(chan->fifo_addr), chan->io + DMA_PERIPHERAL_ADDR);
-                  chan->io + DMA_PERIPHERAL_ADDR);
        mode = chan->mode | (chan->dev_id << DMA_DID_BIT);
        if (chan->irq)
                mode |= DMA_IE;
        au_writel(~mode, chan->io + DMA_MODE_CLEAR);
-        au_writel(mode, chan->io + DMA_MODE_SET);
+        au_writel(mode,  chan->io + DMA_MODE_SET);
 }
 /*
- * set mode for a specific DMA channel
+ * Set mode for a specific DMA channel
 */
-static __inline__ void set_dma_mode(unsigned int dmanr, unsigned int mode)
+static inline void set_dma_mode(unsigned int dmanr, unsigned int mode)
 {
        struct dma_chan *chan = get_dma_chan(dmanr);
        if (!chan)
                return;
        /*
@@ -266,36 +273,37 @@ static __inline__ void set_dma_mode(unsigned int dmanr, unsigned int mode)
        chan->mode |= mode;
 }
-static __inline__ unsigned int get_dma_mode(unsigned int dmanr)
+static inline unsigned int get_dma_mode(unsigned int dmanr)
 {
        struct dma_chan *chan = get_dma_chan(dmanr);
        if (!chan)
                return 0;
        return chan->mode;
 }
-static __inline__ int get_dma_active_buffer(unsigned int dmanr)
+static inline int get_dma_active_buffer(unsigned int dmanr)
 {
        struct dma_chan *chan = get_dma_chan(dmanr);
        if (!chan)
                return -1;
        return (au_readl(chan->io + DMA_MODE_READ) & DMA_AB) ? 1 : 0;
 }
 /*
- * set the device FIFO address for a specific DMA channel - only
+ * Set the device FIFO address for a specific DMA channel - only
 * applicable to GPO4 and GPO5. All the other devices have fixed
 * FIFO addresses.
 */
-static __inline__ void set_dma_fifo_addr(unsigned int dmanr,
+static inline void set_dma_fifo_addr(unsigned int dmanr, unsigned int a)
-                                         unsigned int a)
 {
        struct dma_chan *chan = get_dma_chan(dmanr);
        if (!chan)
                return;
-        if (chan->mode & DMA_DS)        /* second bank of device ids */
+        if (chan->mode & DMA_DS)        /* second bank of device IDs */
                return;
        if (chan->dev_id != DMA_ID_GP04 && chan->dev_id != DMA_ID_GP05)
@@ -307,16 +315,19 @@ static __inline__ void set_dma_fifo_addr(unsigned int dmanr,
 /*
 * Clear the DMA buffer done bits in the mode register.
 */
-static __inline__ void clear_dma_done0(unsigned int dmanr)
+static inline void clear_dma_done0(unsigned int dmanr)
 {
        struct dma_chan *chan = get_dma_chan(dmanr);
        if (!chan)
                return;
        au_writel(DMA_D0, chan->io + DMA_MODE_CLEAR);
 }
-static __inline__ void clear_dma_done1(unsigned int dmanr)
+static inline void clear_dma_done1(unsigned int dmanr)
 {
        struct dma_chan *chan = get_dma_chan(dmanr);
        if (!chan)
                return;
        au_writel(DMA_D1, chan->io + DMA_MODE_CLEAR);
@@ -325,16 +336,17 @@ static __inline__ void clear_dma_done1(unsigned int dmanr)
 /*
 * This does nothing - not applicable to Au1000 DMA.
 */
-static __inline__ void set_dma_page(unsigned int dmanr, char pagenr)
+static inline void set_dma_page(unsigned int dmanr, char pagenr)
 {
 }
 /*
 * Set Buffer 0 transfer address for specific DMA channel.
 */
-static __inline__ void set_dma_addr0(unsigned int dmanr, unsigned int a)
+static inline void set_dma_addr0(unsigned int dmanr, unsigned int a)
 {
        struct dma_chan *chan = get_dma_chan(dmanr);
        if (!chan)
                return;
        au_writel(a, chan->io + DMA_BUFFER0_START);
@@ -343,9 +355,10 @@ static __inline__ void set_dma_addr0(unsigned int dmanr, unsigned int a)
 /*
 * Set Buffer 1 transfer address for specific DMA channel.
 */
-static __inline__ void set_dma_addr1(unsigned int dmanr, unsigned int a)
+static inline void set_dma_addr1(unsigned int dmanr, unsigned int a)
 {
        struct dma_chan *chan = get_dma_chan(dmanr);
        if (!chan)
                return;
        au_writel(a, chan->io + DMA_BUFFER1_START);
@@ -355,10 +368,10 @@ static __inline__ void set_dma_addr1(unsigned int dmanr, unsigned int a)
 /*
 * Set Buffer 0 transfer size (max 64k) for a specific DMA channel.
 */
-static __inline__ void set_dma_count0(unsigned int dmanr,
+static inline void set_dma_count0(unsigned int dmanr, unsigned int count)
-                                      unsigned int count)
 {
        struct dma_chan *chan = get_dma_chan(dmanr);
        if (!chan)
                return;
        count &= DMA_COUNT_MASK;
@@ -368,10 +381,10 @@ static __inline__ void set_dma_count0(unsigned int dmanr,
 /*
 * Set Buffer 1 transfer size (max 64k) for a specific DMA channel.
 */
-static __inline__ void set_dma_count1(unsigned int dmanr,
+static inline void set_dma_count1(unsigned int dmanr, unsigned int count)
-                                      unsigned int count)
 {
        struct dma_chan *chan = get_dma_chan(dmanr);
        if (!chan)
                return;
        count &= DMA_COUNT_MASK;
@@ -381,10 +394,10 @@ static __inline__ void set_dma_count1(unsigned int dmanr,
 /*
 * Set both buffer transfer sizes (max 64k) for a specific DMA channel.
 */
-static __inline__ void set_dma_count(unsigned int dmanr,
+static inline void set_dma_count(unsigned int dmanr, unsigned int count)
-                                     unsigned int count)
 {
        struct dma_chan *chan = get_dma_chan(dmanr);
        if (!chan)
                return;
        count &= DMA_COUNT_MASK;
@@ -396,35 +409,36 @@ static __inline__ void set_dma_count(unsigned int dmanr,
 * Returns which buffer has its done bit set in the mode register.
 * Returns -1 if neither or both done bits set.
 */
-static __inline__ unsigned int get_dma_buffer_done(unsigned int dmanr)
+static inline unsigned int get_dma_buffer_done(unsigned int dmanr)
 {
        struct dma_chan *chan = get_dma_chan(dmanr);
        if (!chan)
                return 0;
+        return au_readl(chan->io + DMA_MODE_READ) & (DMA_D0 | DMA_D1);
-    return au_readl(chan->io + DMA_MODE_READ) & (DMA_D0 | DMA_D1);
 }
 /*
 * Returns the DMA channel's Buffer Done IRQ number.
 */
-static __inline__ int get_dma_done_irq(unsigned int dmanr)
+static inline int get_dma_done_irq(unsigned int dmanr)
 {
        struct dma_chan *chan = get_dma_chan(dmanr);
        if (!chan)
                return -1;
        return chan->irq;
 }
 /*
 * Get DMA residue count. Returns the number of _bytes_ left to transfer.
 */
-static __inline__ int get_dma_residue(unsigned int dmanr)
+static inline int get_dma_residue(unsigned int dmanr)
 {
        int curBufCntReg, count;
        struct dma_chan *chan = get_dma_chan(dmanr);
        if (!chan)
                return 0;
@@ -442,4 +456,3 @@ static __inline__ int get_dma_residue(unsigned int dmanr)
 }
 #endif /* __ASM_AU1000_DMA_H */
diff --git a/include/asm-mips/mach-au1x00/au1000_gpio.h b/include/asm-mips/mach-au1x00/au1000_gpio.h
index 298f92012e8e..d8c96fda5549 100644
--- a/include/asm-mips/mach-au1x00/au1000_gpio.h
+++ b/include/asm-mips/mach-au1x00/au1000_gpio.h
@@ -2,12 +2,12 @@
 * FILE NAME au1000_gpio.h
 *
 * BRIEF MODULE DESCRIPTION
- *      API to Alchemy Au1000 GPIO device.
+ *      API to Alchemy Au1xx0 GPIO device.
 *
 *  Author: MontaVista Software, Inc.  <source@mvista.com>
- *          Steve Longerbeam <stevel@mvista.com>
+ *          Steve Longerbeam
 *
- * Copyright 2001 MontaVista Software Inc.
+ * Copyright 2001, 2008 MontaVista Software Inc.
 *
 *  This program is free software; you can redistribute  it and/or modify it
 *  under  the terms of  the GNU General  Public License as published by the
@@ -37,12 +37,12 @@
 #define AU1000GPIO_IOC_MAGIC 'A'
-#define AU1000GPIO_IN           _IOR (AU1000GPIO_IOC_MAGIC, 0, int)
+#define AU1000GPIO_IN           _IOR(AU1000GPIO_IOC_MAGIC, 0, int)
-#define AU1000GPIO_SET          _IOW (AU1000GPIO_IOC_MAGIC, 1, int)
+#define AU1000GPIO_SET          _IOW(AU1000GPIO_IOC_MAGIC, 1, int)
-#define AU1000GPIO_CLEAR        _IOW (AU1000GPIO_IOC_MAGIC, 2, int)
+#define AU1000GPIO_CLEAR        _IOW(AU1000GPIO_IOC_MAGIC, 2, int)
-#define AU1000GPIO_OUT          _IOW (AU1000GPIO_IOC_MAGIC, 3, int)
+#define AU1000GPIO_OUT          _IOW(AU1000GPIO_IOC_MAGIC, 3, int)
-#define AU1000GPIO_TRISTATE     _IOW (AU1000GPIO_IOC_MAGIC, 4, int)
+#define AU1000GPIO_TRISTATE     _IOW(AU1000GPIO_IOC_MAGIC, 4, int)
-#define AU1000GPIO_AVAIL_MASK   _IOR (AU1000GPIO_IOC_MAGIC, 5, int)
+#define AU1000GPIO_AVAIL_MASK   _IOR(AU1000GPIO_IOC_MAGIC, 5, int)
 #ifdef __KERNEL__
 extern u32 get_au1000_avail_gpio_mask(void);
diff --git a/include/asm-mips/mach-au1x00/au1550_spi.h b/include/asm-mips/mach-au1x00/au1550_spi.h
index c2f0466523ec..40e6c489833a 100644
--- a/include/asm-mips/mach-au1x00/au1550_spi.h
+++ b/include/asm-mips/mach-au1x00/au1550_spi.h
@@ -1,5 +1,5 @@
 /*
- * au1550_spi.h - au1550 psc spi controller driver - platform data struct
+ * au1550_spi.h - Au1550 PSC SPI controller driver - platform data structure
 */
 #ifndef _AU1550_SPI_H_
diff --git a/include/asm-mips/mach-au1x00/au1xxx.h b/include/asm-mips/mach-au1x00/au1xxx.h
index 947135941033..1b3655090ed3 100644
--- a/include/asm-mips/mach-au1x00/au1xxx.h
+++ b/include/asm-mips/mach-au1x00/au1xxx.h
@@ -23,10 +23,10 @@
 #ifndef _AU1XXX_H_
 #define _AU1XXX_H_
 #include <asm/mach-au1x00/au1000.h>
-#if defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100) || defined(CONFIG_MIPS_DB1500) || defined(CONFIG_MIPS_DB1550)
+#if defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100) || \
+    defined(CONFIG_MIPS_DB1500) || defined(CONFIG_MIPS_DB1550)
 #include <asm/mach-db1x00/db1x00.h>
 #elif defined(CONFIG_MIPS_PB1550)
diff --git a/include/asm-mips/mach-au1x00/au1xxx_dbdma.h b/include/asm-mips/mach-au1x00/au1xxx_dbdma.h
index 93d507cea518..44a67bf05dc1 100644
--- a/include/asm-mips/mach-au1x00/au1xxx_dbdma.h
+++ b/include/asm-mips/mach-au1x00/au1xxx_dbdma.h
@@ -28,17 +28,18 @@
 *  675 Mass Ave, Cambridge, MA 02139, USA.
 */
-/* Specifics for the Au1xxx Descriptor-Based DMA Controllers, first
+/*
- * seen in the AU1550 part.
+ * Specifics for the Au1xxx Descriptor-Based DMA Controller,
+ * first seen in the AU1550 part.
 */
 #ifndef _AU1000_DBDMA_H_
 #define _AU1000_DBDMA_H_
 #ifndef _LANGUAGE_ASSEMBLY
-/* The DMA base addresses.
+/*
- * The Channels are every 256 bytes (0x0100) from the channel 0 base.
+ * The DMA base addresses.
+ * The channels are every 256 bytes (0x0100) from the channel 0 base.
 * Interrupt status/enable is bits 15:0 for channels 15 to zero.
 */
 #define DDMA_GLOBAL_BASE        0xb4003000
@@ -51,16 +52,14 @@ typedef volatile struct dbdma_global {
        u32     ddma_inten;
 } dbdma_global_t;
-/* General Configuration.
+/* General Configuration. */
-*/
 #define DDMA_CONFIG_AF          (1 << 2)
 #define DDMA_CONFIG_AH          (1 << 1)
 #define DDMA_CONFIG_AL          (1 << 0)
 #define DDMA_THROTTLE_EN        (1 << 31)
-/* The structure of a DMA Channel.
+/* The structure of a DMA Channel. */
-*/
 typedef volatile struct au1xxx_dma_channel {
        u32     ddma_cfg;       /* See below */
        u32     ddma_desptr;    /* 32-byte aligned pointer to descriptor */
@@ -69,8 +68,7 @@ typedef volatile struct au1xxx_dma_channel {
        u32     ddma_irq;       /* If bit 0 set, interrupt pending */
        u32     ddma_stat;      /* See below */
        u32     ddma_bytecnt;   /* Byte count, valid only when chan idle */
-        /* Remainder, up to the 256 byte boundary, is reserved.
+        /* Remainder, up to the 256 byte boundary, is reserved. */
-        */
 } au1x_dma_chan_t;
 #define DDMA_CFG_SED    (1 << 9)        /* source DMA level/edge detect */
@@ -84,7 +82,8 @@ typedef volatile struct au1xxx_dma_channel {
 #define DDMA_CFG_DBE    (1 << 1)        /* Destination big endian */
 #define DDMA_CFG_EN     (1 << 0)        /* Channel enable */
-/* Always set when descriptor processing done, regardless of
+/*
+ * Always set when descriptor processing done, regardless of
 * interrupt enable state.  Reflected in global intstat, don't
 * clear this until global intstat is read/used.
 */
@@ -94,7 +93,8 @@ typedef volatile struct au1xxx_dma_channel {
 #define DDMA_STAT_V     (1 << 1)        /* Descriptor valid */
 #define DDMA_STAT_H     (1 << 0)        /* Channel Halted */
-/* "Standard" DDMA Descriptor.
+/*
+ * "Standard" DDMA Descriptor.
 * Must be 32-byte aligned.
 */
 typedef volatile struct au1xxx_ddma_desc {
@@ -106,8 +106,9 @@ typedef volatile struct au1xxx_ddma_desc {
        u32     dscr_dest1;             /* See below */
        u32     dscr_stat;              /* completion status */
        u32     dscr_nxtptr;            /* Next descriptor pointer (mostly) */
-        /* First 32bytes are HW specific!!!
+        /*
-           Lets have some SW data following.. make sure its 32bytes
+         * First 32 bytes are HW specific!!!
+         * Lets have some SW data following -- make sure it's 32 bytes.
         */
        u32     sw_status;
        u32     sw_context;
@@ -130,10 +131,9 @@ typedef volatile struct au1xxx_ddma_desc {
 #define DSCR_CMD0_CV            (0x1 << 2)      /* Clear Valid when done */
 #define DSCR_CMD0_ST_MASK       (0x3 << 0)      /* Status instruction */
-#define SW_STATUS_INUSE         (1<<0)
+#define SW_STATUS_INUSE         (1 << 0)
-/* Command 0 device IDs.
+/* Command 0 device IDs. */
-*/
 #ifdef CONFIG_SOC_AU1550
 #define DSCR_CMD0_UART0_TX      0
 #define DSCR_CMD0_UART0_RX      1
@@ -198,16 +198,15 @@ typedef volatile struct au1xxx_ddma_desc {
 #define DSCR_CMD0_THROTTLE      30
 #define DSCR_CMD0_ALWAYS        31
 #define DSCR_NDEV_IDS           32
-/* THis macro is used to find/create custom device types */
+/* This macro is used to find/create custom device types */
-#define DSCR_DEV2CUSTOM_ID(x, d)        (((((x)&0xFFFF)<<8)|0x32000000)|((d)&0xFF))
+#define DSCR_DEV2CUSTOM_ID(x, d) (((((x) & 0xFFFF) << 8) | 0x32000000) | \
-#define DSCR_CUSTOM2DEV_ID(x)   ((x)&0xFF)
+                                  ((d) & 0xFF))
+#define DSCR_CUSTOM2DEV_ID(x)   ((x) & 0xFF)
 #define DSCR_CMD0_SID(x)        (((x) & 0x1f) << 25)
 #define DSCR_CMD0_DID(x)        (((x) & 0x1f) << 20)
-/* Source/Destination transfer width.
+/* Source/Destination transfer width. */
-*/
 #define DSCR_CMD0_BYTE          0
 #define DSCR_CMD0_HALFWORD      1
 #define DSCR_CMD0_WORD          2
@@ -215,16 +214,14 @@ typedef volatile struct au1xxx_ddma_desc {
 #define DSCR_CMD0_SW(x)         (((x) & 0x3) << 18)
 #define DSCR_CMD0_DW(x)         (((x) & 0x3) << 16)
-/* DDMA Descriptor Type.
+/* DDMA Descriptor Type. */
-*/
 #define DSCR_CMD0_STANDARD      0
 #define DSCR_CMD0_LITERAL       1
 #define DSCR_CMD0_CMP_BRANCH    2
 #define DSCR_CMD0_DT(x)         (((x) & 0x3) << 13)
-/* Status Instruction.
+/* Status Instruction. */
-*/
 #define DSCR_CMD0_ST_NOCHANGE   0       /* Don't change */
 #define DSCR_CMD0_ST_CURRENT    1       /* Write current status */
 #define DSCR_CMD0_ST_CMD0       2       /* Write cmd0 with V cleared */
@@ -232,23 +229,20 @@ typedef volatile struct au1xxx_ddma_desc {
 #define DSCR_CMD0_ST(x)         (((x) & 0x3) << 0)
-/* Descriptor Command 1
+/* Descriptor Command 1. */
-*/
 #define DSCR_CMD1_SUPTR_MASK    (0xf << 28)     /* upper 4 bits of src addr */
 #define DSCR_CMD1_DUPTR_MASK    (0xf << 24)     /* upper 4 bits of dest addr */
 #define DSCR_CMD1_FL_MASK       (0x3 << 22)     /* Flag bits */
 #define DSCR_CMD1_BC_MASK       (0x3fffff)      /* Byte count */
-/* Flag description.
+/* Flag description. */
-*/
 #define DSCR_CMD1_FL_MEM_STRIDE0        0
 #define DSCR_CMD1_FL_MEM_STRIDE1        1
 #define DSCR_CMD1_FL_MEM_STRIDE2        2
 #define DSCR_CMD1_FL(x)         (((x) & 0x3) << 22)
-/* Source1, 1-dimensional stride.
+/* Source1, 1-dimensional stride. */
-*/
 #define DSCR_SRC1_STS_MASK      (3 << 30)       /* Src xfer size */
 #define DSCR_SRC1_SAM_MASK      (3 << 28)       /* Src xfer movement */
 #define DSCR_SRC1_SB_MASK       (0x3fff << 14)  /* Block size */
@@ -256,8 +250,7 @@ typedef volatile struct au1xxx_ddma_desc {
 #define DSCR_SRC1_SS_MASK       (0x3fff << 0)   /* Stride */
 #define DSCR_SRC1_SS(x)         (((x) & 0x3fff) << 0)
-/* Dest1, 1-dimensional stride.
+/* Dest1, 1-dimensional stride. */
-*/
 #define DSCR_DEST1_DTS_MASK     (3 << 30)       /* Dest xfer size */
 #define DSCR_DEST1_DAM_MASK     (3 << 28)       /* Dest xfer movement */
 #define DSCR_DEST1_DB_MASK      (0x3fff << 14)  /* Block size */
@@ -279,29 +272,27 @@ typedef volatile struct au1xxx_ddma_desc {
 #define DSCR_SRC1_SAM(x)        (((x) & 3) << 28)
 #define DSCR_DEST1_DAM(x)       (((x) & 3) << 28)
-/* The next descriptor pointer.
+/* The next descriptor pointer. */
-*/
 #define DSCR_NXTPTR_MASK        (0x07ffffff)
 #define DSCR_NXTPTR(x)          ((x) >> 5)
 #define DSCR_GET_NXTPTR(x)      ((x) << 5)
 #define DSCR_NXTPTR_MS          (1 << 27)
-/* The number of DBDMA channels.
+/* The number of DBDMA channels. */
-*/
 #define NUM_DBDMA_CHANS 16
 /*
- * Ddma API definitions
+ * DDMA API definitions
 * FIXME: may not fit to this header file
 */
 typedef struct dbdma_device_table {
-        u32             dev_id;
+        u32     dev_id;
-        u32             dev_flags;
+        u32     dev_flags;
-        u32             dev_tsize;
+        u32     dev_tsize;
-        u32             dev_devwidth;
+        u32     dev_devwidth;
-        u32             dev_physaddr;           /* If FIFO */
+        u32     dev_physaddr;           /* If FIFO */
-        u32             dev_intlevel;
+        u32     dev_intlevel;
-        u32             dev_intpolarity;
+        u32     dev_intpolarity;
 } dbdev_tab_t;
@@ -316,44 +307,41 @@ typedef struct dbdma_chan_config {
        au1x_ddma_desc_t        *chan_desc_base;
        au1x_ddma_desc_t        *get_ptr, *put_ptr, *cur_ptr;
        void                    *chan_callparam;
-        void (*chan_callback)(int, void *);
+        void                    (*chan_callback)(int, void *);
 } chan_tab_t;
 #define DEV_FLAGS_INUSE         (1 << 0)
 #define DEV_FLAGS_ANYUSE        (1 << 1)
 #define DEV_FLAGS_OUT           (1 << 2)
 #define DEV_FLAGS_IN            (1 << 3)
-#define DEV_FLAGS_BURSTABLE (1 << 4)
+#define DEV_FLAGS_BURSTABLE     (1 << 4)
 #define DEV_FLAGS_SYNC          (1 << 5)
-/* end Ddma API definitions */
+/* end DDMA API definitions */
-/* External functions for drivers to use.
+/*
-*/
+ * External functions for drivers to use.
-/* Use this to allocate a dbdma channel.  The device ids are one of the
+ * Use this to allocate a DBDMA channel.  The device IDs are one of
- * DSCR_CMD0 devices IDs, which is usually redefined to a more
+ * the DSCR_CMD0 devices IDs, which is usually redefined to a more
- * meaningful name.  The 'callback' is called during dma completion
+ * meaningful name.  The 'callback' is called during DMA completion
 * interrupt.
 */
 extern u32 au1xxx_dbdma_chan_alloc(u32 srcid, u32 destid,
-        void (*callback)(int, void *), void *callparam);
+                                   void (*callback)(int, void *),
+                                   void *callparam);
 #define DBDMA_MEM_CHAN  DSCR_CMD0_ALWAYS
-/* Set the device width of a in/out fifo.
+/* Set the device width of an in/out FIFO. */
-*/
 u32 au1xxx_dbdma_set_devwidth(u32 chanid, int bits);
-/* Allocate a ring of descriptors for dbdma.
+/* Allocate a ring of descriptors for DBDMA. */
-*/
 u32 au1xxx_dbdma_ring_alloc(u32 chanid, int entries);
-/* Put buffers on source/destination descriptors.
+/* Put buffers on source/destination descriptors. */
-*/
 u32 _au1xxx_dbdma_put_source(u32 chanid, void *buf, int nbytes, u32 flags);
 u32 _au1xxx_dbdma_put_dest(u32 chanid, void *buf, int nbytes, u32 flags);
-/* Get a buffer from the destination descriptor.
+/* Get a buffer from the destination descriptor. */
-*/
 u32 au1xxx_dbdma_get_dest(u32 chanid, void **buf, int *nbytes);
 void au1xxx_dbdma_stop(u32 chanid);
@@ -364,29 +352,35 @@ u32 au1xxx_get_dma_residue(u32 chanid);
 void au1xxx_dbdma_chan_free(u32 chanid);
 void au1xxx_dbdma_dump(u32 chanid);
-u32 au1xxx_dbdma_put_dscr(u32 chanid, au1x_ddma_desc_t *dscr );
+u32 au1xxx_dbdma_put_dscr(u32 chanid, au1x_ddma_desc_t *dscr);
-u32 au1xxx_ddma_add_device( dbdev_tab_t *dev );
+u32 au1xxx_ddma_add_device(dbdev_tab_t *dev);
-void * au1xxx_ddma_get_nextptr_virt(au1x_ddma_desc_t *dp);
+extern void au1xxx_ddma_del_device(u32 devid);
+void *au1xxx_ddma_get_nextptr_virt(au1x_ddma_desc_t *dp);
 /*
-        Some compatibilty macros --
+ * Some compatibilty macros -- needed to make changes to API
-                Needed to make changes to API without breaking existing drivers
+ * without breaking existing drivers.
-*/
+ */
-#define au1xxx_dbdma_put_source(chanid, buf, nbytes)_au1xxx_dbdma_put_source(chanid, buf, nbytes, DDMA_FLAGS_IE)
+#define au1xxx_dbdma_put_source(chanid, buf, nbytes)                    \
-#define au1xxx_dbdma_put_source_flags(chanid, buf, nbytes, flags) _au1xxx_dbdma_put_source(chanid, buf, nbytes, flags)
+        _au1xxx_dbdma_put_source(chanid, buf, nbytes, DDMA_FLAGS_IE)
-#define put_source_flags(chanid, buf, nbytes, flags) au1xxx_dbdma_put_source_flags(chanid, buf, nbytes, flags)
+#define au1xxx_dbdma_put_source_flags(chanid, buf, nbytes, flags)       \
+        _au1xxx_dbdma_put_source(chanid, buf, nbytes, flags)
+#define put_source_flags(chanid, buf, nbytes, flags)                    \
-#define au1xxx_dbdma_put_dest(chanid, buf, nbytes) _au1xxx_dbdma_put_dest(chanid, buf, nbytes, DDMA_FLAGS_IE)
+        au1xxx_dbdma_put_source_flags(chanid, buf, nbytes, flags)
-#define au1xxx_dbdma_put_dest_flags(chanid, buf, nbytes, flags) _au1xxx_dbdma_put_dest(chanid, buf, nbytes, flags)
-#define put_dest_flags(chanid, buf, nbytes, flags) au1xxx_dbdma_put_dest_flags(chanid, buf, nbytes, flags)
+#define au1xxx_dbdma_put_dest(chanid, buf, nbytes)                      \
+        _au1xxx_dbdma_put_dest(chanid, buf, nbytes, DDMA_FLAGS_IE)
+#define au1xxx_dbdma_put_dest_flags(chanid, buf, nbytes, flags)         \
+        _au1xxx_dbdma_put_dest(chanid, buf, nbytes, flags)
+#define put_dest_flags(chanid, buf, nbytes, flags)                      \
+        au1xxx_dbdma_put_dest_flags(chanid, buf, nbytes, flags)
 /*
 *      Flags for the put_source/put_dest functions.
 */
-#define DDMA_FLAGS_IE   (1<<0)
+#define DDMA_FLAGS_IE   (1 << 0)
-#define DDMA_FLAGS_NOIE (1<<1)
+#define DDMA_FLAGS_NOIE (1 << 1)
 #endif /* _LANGUAGE_ASSEMBLY */
 #endif /* _AU1000_DBDMA_H_ */
diff --git a/include/asm-mips/mach-au1x00/au1xxx_ide.h b/include/asm-mips/mach-au1x00/au1xxx_ide.h
index b493a5e46c63..60638b8969ba 100644
--- a/include/asm-mips/mach-au1x00/au1xxx_ide.h
+++ b/include/asm-mips/mach-au1x00/au1xxx_ide.h
@@ -31,167 +31,164 @@
 */
 #ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA
-        #define DMA_WAIT_TIMEOUT        100
+#define DMA_WAIT_TIMEOUT        100
-        #define NUM_DESCRIPTORS         PRD_ENTRIES
+#define NUM_DESCRIPTORS         PRD_ENTRIES
 #else /* CONFIG_BLK_DEV_IDE_AU1XXX_PIO_DBDMA */
-        #define NUM_DESCRIPTORS         2
+#define NUM_DESCRIPTORS         2
 #endif
 #ifndef AU1XXX_ATA_RQSIZE
-        #define AU1XXX_ATA_RQSIZE       128
+#define AU1XXX_ATA_RQSIZE       128
 #endif
 /* Disable Burstable-Support for DBDMA */
 #ifndef CONFIG_BLK_DEV_IDE_AU1XXX_BURSTABLE_ON
-        #define CONFIG_BLK_DEV_IDE_AU1XXX_BURSTABLE_ON  0
+#define CONFIG_BLK_DEV_IDE_AU1XXX_BURSTABLE_ON  0
 #endif
 #ifdef CONFIG_PM
 /*
-* This will enable the device to be powered up when write() or read()
+ * This will enable the device to be powered up when write() or read()
-* is called. If this is not defined, the driver will return -EBUSY.
+ * is called. If this is not defined, the driver will return -EBUSY.
-*/
+ */
 #define WAKE_ON_ACCESS 1
-typedef struct
+typedef struct {
-{
+        spinlock_t              lock;   /* Used to block on state transitions */
-        spinlock_t         lock;       /* Used to block on state transitions */
+        au1xxx_power_dev_t      *dev;   /* Power Managers device structure */
-        au1xxx_power_dev_t *dev;       /* Power Managers device structure */
+        unsigned                stopped; /* Used to signal device is stopped */
-        unsigned           stopped;    /* USed to signaling device is stopped */
 } pm_state;
 #endif
+typedef struct {
-typedef struct
+        u32                     tx_dev_id, rx_dev_id, target_dev_id;
-{
+        u32                     tx_chan, rx_chan;
-        u32                     tx_dev_id, rx_dev_id, target_dev_id;
+        void                    *tx_desc_head, *rx_desc_head;
-        u32                     tx_chan, rx_chan;
+        ide_hwif_t              *hwif;
-        void                    *tx_desc_head, *rx_desc_head;
-        ide_hwif_t              *hwif;
 #ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA
-        ide_drive_t             *drive;
+        ide_drive_t             *drive;
-        struct dbdma_cmd        *dma_table_cpu;
+        struct dbdma_cmd        *dma_table_cpu;
-        dma_addr_t              dma_table_dma;
+        dma_addr_t              dma_table_dma;
 #endif
        int                     irq;
        u32                     regbase;
 #ifdef CONFIG_PM
-        pm_state                pm;
+        pm_state                pm;
 #endif
 } _auide_hwif;
-/*******************************************************************************
+/******************************************************************************/
-* PIO Mode timing calculation :                                                *
+/* PIO Mode timing calculation :                                              */
-*                                                                              *
+/*                                                                            */
-* Static Bus Spec   ATA Spec                                                   *
+/* Static Bus Spec   ATA Spec                                                 */
-*      Tcsoe      =   t1                                                       *
+/*      Tcsoe      =    t1                                                    */
-*      Toecs      =   t9                                                       *
+/*      Toecs      =    t9                                                    */
-*      Twcs       =   t9                                                       *
+/*      Twcs       =    t9                                                    */
-*      Tcsh       =   t2i | t2                                                 *
+/*      Tcsh       =    t2i | t2                                              */
-*      Tcsoff     =   t2i | t2                                                 *
+/*      Tcsoff     =    t2i | t2                                              */
-*      Twp        =   t2                                                       *
+/*      Twp        =    t2                                                    */
-*      Tcsw       =   t1                                                       *
+/*      Tcsw       =    t1                                                    */
-*      Tpm        =   0                                                        *
+/*      Tpm        =    0                                                     */
-*      Ta         =   t1+t2                                                    *
+/*      Ta         =    t1+t2                                                 */
-*******************************************************************************/
+/******************************************************************************/
-#define TCSOE_MASK            (0x07<<29)
+#define TCSOE_MASK              (0x07 << 29)
-#define TOECS_MASK            (0x07<<26)
+#define TOECS_MASK              (0x07 << 26)
-#define TWCS_MASK             (0x07<<28)
+#define TWCS_MASK               (0x07 << 28)
-#define TCSH_MASK             (0x0F<<24)
+#define TCSH_MASK               (0x0F << 24)
-#define TCSOFF_MASK           (0x07<<20)
+#define TCSOFF_MASK             (0x07 << 20)
-#define TWP_MASK              (0x3F<<14)
+#define TWP_MASK                (0x3F << 14)
-#define TCSW_MASK             (0x0F<<10)
+#define TCSW_MASK               (0x0F << 10)
-#define TPM_MASK              (0x0F<<6)
+#define TPM_MASK                (0x0F << 6)
-#define TA_MASK               (0x3F<<0)
+#define TA_MASK                 (0x3F << 0)
-#define TS_MASK               (1<<8)
+#define TS_MASK                 (1 << 8)
 /* Timing parameters PIO mode 0 */
-#define SBC_IDE_PIO0_TCSOE    (0x04<<29)
+#define SBC_IDE_PIO0_TCSOE      (0x04 << 29)
-#define SBC_IDE_PIO0_TOECS    (0x01<<26)
+#define SBC_IDE_PIO0_TOECS      (0x01 << 26)
-#define SBC_IDE_PIO0_TWCS     (0x02<<28)
+#define SBC_IDE_PIO0_TWCS       (0x02 << 28)
-#define SBC_IDE_PIO0_TCSH     (0x08<<24)
+#define SBC_IDE_PIO0_TCSH       (0x08 << 24)
-#define SBC_IDE_PIO0_TCSOFF   (0x07<<20)
+#define SBC_IDE_PIO0_TCSOFF     (0x07 << 20)
-#define SBC_IDE_PIO0_TWP      (0x10<<14)
+#define SBC_IDE_PIO0_TWP        (0x10 << 14)
-#define SBC_IDE_PIO0_TCSW     (0x04<<10)
+#define SBC_IDE_PIO0_TCSW       (0x04 << 10)
-#define SBC_IDE_PIO0_TPM      (0x0<<6)
+#define SBC_IDE_PIO0_TPM        (0x00 << 6)
-#define SBC_IDE_PIO0_TA       (0x15<<0)
+#define SBC_IDE_PIO0_TA         (0x15 << 0)
 /* Timing parameters PIO mode 1 */
-#define SBC_IDE_PIO1_TCSOE    (0x03<<29)
+#define SBC_IDE_PIO1_TCSOE      (0x03 << 29)
-#define SBC_IDE_PIO1_TOECS    (0x01<<26)
+#define SBC_IDE_PIO1_TOECS      (0x01 << 26)
-#define SBC_IDE_PIO1_TWCS     (0x01<<28)
+#define SBC_IDE_PIO1_TWCS       (0x01 << 28)
-#define SBC_IDE_PIO1_TCSH     (0x06<<24)
+#define SBC_IDE_PIO1_TCSH       (0x06 << 24)
-#define SBC_IDE_PIO1_TCSOFF   (0x06<<20)
+#define SBC_IDE_PIO1_TCSOFF     (0x06 << 20)
-#define SBC_IDE_PIO1_TWP      (0x08<<14)
+#define SBC_IDE_PIO1_TWP        (0x08 << 14)
-#define SBC_IDE_PIO1_TCSW     (0x03<<10)
+#define SBC_IDE_PIO1_TCSW       (0x03 << 10)
-#define SBC_IDE_PIO1_TPM      (0x00<<6)
+#define SBC_IDE_PIO1_TPM        (0x00 << 6)
-#define SBC_IDE_PIO1_TA       (0x0B<<0)
+#define SBC_IDE_PIO1_TA         (0x0B << 0)
 /* Timing parameters PIO mode 2 */
-#define SBC_IDE_PIO2_TCSOE    (0x05<<29)
+#define SBC_IDE_PIO2_TCSOE      (0x05 << 29)
-#define SBC_IDE_PIO2_TOECS    (0x01<<26)
+#define SBC_IDE_PIO2_TOECS      (0x01 << 26)
-#define SBC_IDE_PIO2_TWCS     (0x01<<28)
+#define SBC_IDE_PIO2_TWCS       (0x01 << 28)
-#define SBC_IDE_PIO2_TCSH     (0x07<<24)
+#define SBC_IDE_PIO2_TCSH       (0x07 << 24)
-#define SBC_IDE_PIO2_TCSOFF   (0x07<<20)
+#define SBC_IDE_PIO2_TCSOFF     (0x07 << 20)
-#define SBC_IDE_PIO2_TWP      (0x1F<<14)
+#define SBC_IDE_PIO2_TWP        (0x1F << 14)
-#define SBC_IDE_PIO2_TCSW     (0x05<<10)
+#define SBC_IDE_PIO2_TCSW       (0x05 << 10)
-#define SBC_IDE_PIO2_TPM      (0x00<<6)
+#define SBC_IDE_PIO2_TPM        (0x00 << 6)
-#define SBC_IDE_PIO2_TA       (0x22<<0)
+#define SBC_IDE_PIO2_TA         (0x22 << 0)
 /* Timing parameters PIO mode 3 */
-#define SBC_IDE_PIO3_TCSOE    (0x05<<29)
+#define SBC_IDE_PIO3_TCSOE      (0x05 << 29)
-#define SBC_IDE_PIO3_TOECS    (0x01<<26)
+#define SBC_IDE_PIO3_TOECS      (0x01 << 26)
-#define SBC_IDE_PIO3_TWCS     (0x01<<28)
+#define SBC_IDE_PIO3_TWCS       (0x01 << 28)
-#define SBC_IDE_PIO3_TCSH     (0x0D<<24)
+#define SBC_IDE_PIO3_TCSH       (0x0D << 24)
-#define SBC_IDE_PIO3_TCSOFF   (0x0D<<20)
+#define SBC_IDE_PIO3_TCSOFF     (0x0D << 20)
-#define SBC_IDE_PIO3_TWP      (0x15<<14)
+#define SBC_IDE_PIO3_TWP        (0x15 << 14)
-#define SBC_IDE_PIO3_TCSW     (0x05<<10)
+#define SBC_IDE_PIO3_TCSW       (0x05 << 10)
-#define SBC_IDE_PIO3_TPM      (0x00<<6)
+#define SBC_IDE_PIO3_TPM        (0x00 << 6)
-#define SBC_IDE_PIO3_TA       (0x1A<<0)
+#define SBC_IDE_PIO3_TA         (0x1A << 0)
 /* Timing parameters PIO mode 4 */
-#define SBC_IDE_PIO4_TCSOE    (0x04<<29)
+#define SBC_IDE_PIO4_TCSOE      (0x04 << 29)
-#define SBC_IDE_PIO4_TOECS    (0x01<<26)
+#define SBC_IDE_PIO4_TOECS      (0x01 << 26)
-#define SBC_IDE_PIO4_TWCS     (0x01<<28)
+#define SBC_IDE_PIO4_TWCS       (0x01 << 28)
-#define SBC_IDE_PIO4_TCSH     (0x04<<24)
+#define SBC_IDE_PIO4_TCSH       (0x04 << 24)
-#define SBC_IDE_PIO4_TCSOFF   (0x04<<20)
+#define SBC_IDE_PIO4_TCSOFF     (0x04 << 20)
-#define SBC_IDE_PIO4_TWP      (0x0D<<14)
+#define SBC_IDE_PIO4_TWP        (0x0D << 14)
-#define SBC_IDE_PIO4_TCSW     (0x03<<10)
+#define SBC_IDE_PIO4_TCSW       (0x03 << 10)
-#define SBC_IDE_PIO4_TPM      (0x00<<6)
+#define SBC_IDE_PIO4_TPM        (0x00 << 6)
-#define SBC_IDE_PIO4_TA       (0x12<<0)
+#define SBC_IDE_PIO4_TA         (0x12 << 0)
 /* Timing parameters MDMA mode 0 */
-#define SBC_IDE_MDMA0_TCSOE   (0x03<<29)
+#define SBC_IDE_MDMA0_TCSOE     (0x03 << 29)
-#define SBC_IDE_MDMA0_TOECS   (0x01<<26)
+#define SBC_IDE_MDMA0_TOECS     (0x01 << 26)
-#define SBC_IDE_MDMA0_TWCS    (0x01<<28)
+#define SBC_IDE_MDMA0_TWCS      (0x01 << 28)
-#define SBC_IDE_MDMA0_TCSH    (0x07<<24)
+#define SBC_IDE_MDMA0_TCSH      (0x07 << 24)
-#define SBC_IDE_MDMA0_TCSOFF  (0x07<<20)
+#define SBC_IDE_MDMA0_TCSOFF    (0x07 << 20)
-#define SBC_IDE_MDMA0_TWP     (0x0C<<14)
+#define SBC_IDE_MDMA0_TWP       (0x0C << 14)
-#define SBC_IDE_MDMA0_TCSW    (0x03<<10)
+#define SBC_IDE_MDMA0_TCSW      (0x03 << 10)
-#define SBC_IDE_MDMA0_TPM     (0x00<<6)
+#define SBC_IDE_MDMA0_TPM       (0x00 << 6)
-#define SBC_IDE_MDMA0_TA      (0x0F<<0)
+#define SBC_IDE_MDMA0_TA        (0x0F << 0)
 /* Timing parameters MDMA mode 1 */
-#define SBC_IDE_MDMA1_TCSOE   (0x05<<29)
+#define SBC_IDE_MDMA1_TCSOE     (0x05 << 29)
-#define SBC_IDE_MDMA1_TOECS   (0x01<<26)
+#define SBC_IDE_MDMA1_TOECS     (0x01 << 26)
-#define SBC_IDE_MDMA1_TWCS    (0x01<<28)
+#define SBC_IDE_MDMA1_TWCS      (0x01 << 28)
-#define SBC_IDE_MDMA1_TCSH    (0x05<<24)
+#define SBC_IDE_MDMA1_TCSH      (0x05 << 24)
-#define SBC_IDE_MDMA1_TCSOFF  (0x05<<20)
+#define SBC_IDE_MDMA1_TCSOFF    (0x05 << 20)
-#define SBC_IDE_MDMA1_TWP     (0x0F<<14)
+#define SBC_IDE_MDMA1_TWP       (0x0F << 14)
-#define SBC_IDE_MDMA1_TCSW    (0x05<<10)
+#define SBC_IDE_MDMA1_TCSW      (0x05 << 10)
-#define SBC_IDE_MDMA1_TPM     (0x00<<6)
+#define SBC_IDE_MDMA1_TPM       (0x00 << 6)
-#define SBC_IDE_MDMA1_TA      (0x15<<0)
+#define SBC_IDE_MDMA1_TA        (0x15 << 0)
 /* Timing parameters MDMA mode 2 */
-#define SBC_IDE_MDMA2_TCSOE   (0x04<<29)
+#define SBC_IDE_MDMA2_TCSOE     (0x04 << 29)
-#define SBC_IDE_MDMA2_TOECS   (0x01<<26)
+#define SBC_IDE_MDMA2_TOECS     (0x01 << 26)
-#define SBC_IDE_MDMA2_TWCS    (0x01<<28)
+#define SBC_IDE_MDMA2_TWCS      (0x01 << 28)
-#define SBC_IDE_MDMA2_TCSH    (0x04<<24)
+#define SBC_IDE_MDMA2_TCSH      (0x04 << 24)
-#define SBC_IDE_MDMA2_TCSOFF  (0x04<<20)
+#define SBC_IDE_MDMA2_TCSOFF    (0x04 << 20)
-#define SBC_IDE_MDMA2_TWP     (0x0D<<14)
+#define SBC_IDE_MDMA2_TWP       (0x0D << 14)
-#define SBC_IDE_MDMA2_TCSW    (0x04<<10)
+#define SBC_IDE_MDMA2_TCSW      (0x04 << 10)
-#define SBC_IDE_MDMA2_TPM     (0x00<<6)
+#define SBC_IDE_MDMA2_TPM       (0x00 << 6)
-#define SBC_IDE_MDMA2_TA      (0x12<<0)
+#define SBC_IDE_MDMA2_TA        (0x12 << 0)
 #define SBC_IDE_TIMING(mode) \
-         SBC_IDE_##mode##_TWCS | \
+        (SBC_IDE_##mode##_TWCS | \
-         SBC_IDE_##mode##_TCSH | \
+         SBC_IDE_##mode##_TCSH | \
-         SBC_IDE_##mode##_TCSOFF | \
+         SBC_IDE_##mode##_TCSOFF | \
-         SBC_IDE_##mode##_TWP | \
+         SBC_IDE_##mode##_TWP | \
-         SBC_IDE_##mode##_TCSW | \
+         SBC_IDE_##mode##_TCSW | \
-         SBC_IDE_##mode##_TPM | \
+         SBC_IDE_##mode##_TPM | \
-         SBC_IDE_##mode##_TA
+         SBC_IDE_##mode##_TA)
diff --git a/include/asm-mips/mach-au1x00/au1xxx_psc.h b/include/asm-mips/mach-au1x00/au1xxx_psc.h
index 1bd4e27caf6b..dae4eca2417e 100644
--- a/include/asm-mips/mach-au1x00/au1xxx_psc.h
+++ b/include/asm-mips/mach-au1x00/au1xxx_psc.h
@@ -33,7 +33,6 @@
 #ifndef _AU1000_PSC_H_
 #define _AU1000_PSC_H_
 /* The PSC base addresses.  */
 #ifdef CONFIG_SOC_AU1550
 #define PSC0_BASE_ADDR          0xb1a00000
@@ -47,8 +46,8 @@
 #define PSC1_BASE_ADDR          0xb1b00000
 #endif
-/* The PSC select and control registers are common to
+/*
- * all protocols.
+ * The PSC select and control registers are common to all protocols.
 */
 #define PSC_SEL_OFFSET          0x00000000
 #define PSC_CTRL_OFFSET         0x00000004
@@ -59,18 +58,17 @@
 #define PSC_SEL_CLK_SERCLK      (2 << 4)
 #define PSC_SEL_PS_MASK         0x00000007
-#define PSC_SEL_PS_DISABLED     (0)
+#define PSC_SEL_PS_DISABLED     0
-#define PSC_SEL_PS_SPIMODE      (2)
+#define PSC_SEL_PS_SPIMODE      2
-#define PSC_SEL_PS_I2SMODE      (3)
+#define PSC_SEL_PS_I2SMODE      3
-#define PSC_SEL_PS_AC97MODE     (4)
+#define PSC_SEL_PS_AC97MODE     4
-#define PSC_SEL_PS_SMBUSMODE    (5)
+#define PSC_SEL_PS_SMBUSMODE    5
-#define PSC_CTRL_DISABLE        (0)
+#define PSC_CTRL_DISABLE        0
-#define PSC_CTRL_SUSPEND        (2)
+#define PSC_CTRL_SUSPEND        2
-#define PSC_CTRL_ENABLE         (3)
+#define PSC_CTRL_ENABLE         3
-/* AC97 Registers.
+/* AC97 Registers. */
-*/
 #define PSC_AC97CFG_OFFSET      0x00000008
 #define PSC_AC97MSK_OFFSET      0x0000000c
 #define PSC_AC97PCR_OFFSET      0x00000010
@@ -95,8 +93,7 @@
 #define PSC_AC97GPO             (AC97_PSC_BASE + PSC_AC97GPO_OFFSET)
 #define PSC_AC97GPI             (AC97_PSC_BASE + PSC_AC97GPI_OFFSET)
-/* AC97 Config Register.
+/* AC97 Config Register. */
-*/
 #define PSC_AC97CFG_RT_MASK     (3 << 30)
 #define PSC_AC97CFG_RT_FIFO1    (0 << 30)
 #define PSC_AC97CFG_RT_FIFO2    (1 << 30)
@@ -118,20 +115,19 @@
 #define PSC_AC97CFG_RXSLOT_MASK (0x3ff << 1)
 #define PSC_AC97CFG_GE_ENABLE   (1)
-/* Enable slots 3-12.
+/* Enable slots 3-12. */
-*/
 #define PSC_AC97CFG_TXSLOT_ENA(x)       (1 << (((x) - 3) + 11))
 #define PSC_AC97CFG_RXSLOT_ENA(x)       (1 << (((x) - 3) + 1))
-/* The word length equation is ((x) * 2) + 2, so choose 'x' appropriately.
+/*
+ * The word length equation is ((x) * 2) + 2, so choose 'x' appropriately.
 * The only sensible numbers are 7, 9, or possibly 11.  Nah, just do the
 * arithmetic in the macro.
 */
-#define PSC_AC97CFG_SET_LEN(x)  (((((x)-2)/2) & 0xf) << 21)
+#define PSC_AC97CFG_SET_LEN(x)  (((((x) - 2) / 2) & 0xf) << 21)
 #define PSC_AC97CFG_GET_LEN(x)  (((((x) >> 21) & 0xf) * 2) + 2)
-/* AC97 Mask Register.
+/* AC97 Mask Register. */
-*/
 #define PSC_AC97MSK_GR          (1 << 25)
 #define PSC_AC97MSK_CD          (1 << 24)
 #define PSC_AC97MSK_RR          (1 << 13)
@@ -148,8 +144,7 @@
                                 PSC_AC97MSK_TO | PSC_AC97MSK_TU | \
                                 PSC_AC97MSK_RD | PSC_AC97MSK_TD)
-/* AC97 Protocol Control Register.
+/* AC97 Protocol Control Register. */
-*/
 #define PSC_AC97PCR_RC          (1 << 6)
 #define PSC_AC97PCR_RP          (1 << 5)
 #define PSC_AC97PCR_RS          (1 << 4)
@@ -157,8 +152,7 @@
 #define PSC_AC97PCR_TP          (1 << 1)
 #define PSC_AC97PCR_TS          (1 << 0)
-/* AC97 Status register (read only).
+/* AC97 Status register (read only). */
-*/
 #define PSC_AC97STAT_CB         (1 << 26)
 #define PSC_AC97STAT_CP         (1 << 25)
 #define PSC_AC97STAT_CR         (1 << 24)
@@ -174,8 +168,7 @@
 #define PSC_AC97STAT_DR         (1 << 1)
 #define PSC_AC97STAT_SR         (1 << 0)
-/* AC97 Event Register.
+/* AC97 Event Register. */
-*/
 #define PSC_AC97EVNT_GR         (1 << 25)
 #define PSC_AC97EVNT_CD         (1 << 24)
 #define PSC_AC97EVNT_RR         (1 << 13)
@@ -187,22 +180,18 @@
 #define PSC_AC97EVNT_RD         (1 << 5)
 #define PSC_AC97EVNT_TD         (1 << 4)
-/* CODEC Command Register.
+/* CODEC Command Register. */
-*/
 #define PSC_AC97CDC_RD          (1 << 25)
 #define PSC_AC97CDC_ID_MASK     (3 << 23)
 #define PSC_AC97CDC_INDX_MASK   (0x7f << 16)
-#define PSC_AC97CDC_ID(x)       (((x) & 0x3) << 23)
+#define PSC_AC97CDC_ID(x)       (((x) & 0x03) << 23)
 #define PSC_AC97CDC_INDX(x)     (((x) & 0x7f) << 16)
-/* AC97 Reset Control Register.
+/* AC97 Reset Control Register. */
-*/
 #define PSC_AC97RST_RST         (1 << 1)
 #define PSC_AC97RST_SNC         (1 << 0)
+/* PSC in I2S Mode. */
-/* PSC in I2S Mode.
-*/
 typedef struct  psc_i2s {
        u32     psc_sel;
        u32     psc_ctrl;
@@ -215,8 +204,7 @@ typedef struct	psc_i2s {
        u32     psc_i2sudf;
 } psc_i2s_t;
-/* I2S Config Register.
+/* I2S Config Register. */
-*/
 #define PSC_I2SCFG_RT_MASK      (3 << 30)
 #define PSC_I2SCFG_RT_FIFO1     (0 << 30)
 #define PSC_I2SCFG_RT_FIFO2     (1 << 30)
@@ -247,8 +235,7 @@ typedef struct	psc_i2s {
 #define PSC_I2SCFG_MLJ          (1 << 10)
 #define PSC_I2SCFG_XM           (1 << 9)
-/* The word length equation is simply LEN+1.
+/* The word length equation is simply LEN+1. */
- */
 #define PSC_I2SCFG_SET_LEN(x)   ((((x) - 1) & 0x1f) << 4)
 #define PSC_I2SCFG_GET_LEN(x)   ((((x) >> 4) & 0x1f) + 1)
@@ -256,8 +243,7 @@ typedef struct	psc_i2s {
 #define PSC_I2SCFG_MLF          (1 << 1)
 #define PSC_I2SCFG_MS           (1 << 0)
-/* I2S Mask Register.
+/* I2S Mask Register. */
-*/
 #define PSC_I2SMSK_RR           (1 << 13)
 #define PSC_I2SMSK_RO           (1 << 12)
 #define PSC_I2SMSK_RU           (1 << 11)
@@ -271,8 +257,7 @@ typedef struct	psc_i2s {
                                 PSC_I2SMSK_TO | PSC_I2SMSK_TU | \
                                 PSC_I2SMSK_RD | PSC_I2SMSK_TD)
-/* I2S Protocol Control Register.
+/* I2S Protocol Control Register. */
-*/
 #define PSC_I2SPCR_RC           (1 << 6)
 #define PSC_I2SPCR_RP           (1 << 5)
 #define PSC_I2SPCR_RS           (1 << 4)
@@ -280,8 +265,7 @@ typedef struct	psc_i2s {
 #define PSC_I2SPCR_TP           (1 << 1)
 #define PSC_I2SPCR_TS           (1 << 0)
-/* I2S Status register (read only).
+/* I2S Status register (read only). */
-*/
 #define PSC_I2SSTAT_RF          (1 << 13)
 #define PSC_I2SSTAT_RE          (1 << 12)
 #define PSC_I2SSTAT_RR          (1 << 11)
@@ -294,8 +278,7 @@ typedef struct	psc_i2s {
 #define PSC_I2SSTAT_DR          (1 << 1)
 #define PSC_I2SSTAT_SR          (1 << 0)
-/* I2S Event Register.
+/* I2S Event Register. */
-*/
 #define PSC_I2SEVNT_RR          (1 << 13)
 #define PSC_I2SEVNT_RO          (1 << 12)
 #define PSC_I2SEVNT_RU          (1 << 11)
@@ -305,8 +288,7 @@ typedef struct	psc_i2s {
 #define PSC_I2SEVNT_RD          (1 << 5)
 #define PSC_I2SEVNT_TD          (1 << 4)
-/* PSC in SPI Mode.
+/* PSC in SPI Mode. */
-*/
 typedef struct  psc_spi {
        u32     psc_sel;
        u32     psc_ctrl;
@@ -318,8 +300,7 @@ typedef struct	psc_spi {
        u32     psc_spitxrx;
 } psc_spi_t;
-/* SPI Config Register.
+/* SPI Config Register. */
-*/
 #define PSC_SPICFG_RT_MASK      (3 << 30)
 #define PSC_SPICFG_RT_FIFO1     (0 << 30)
 #define PSC_SPICFG_RT_FIFO2     (1 << 30)
@@ -355,8 +336,7 @@ typedef struct	psc_spi {
 #define PSC_SPICFG_MLF          (1 << 1)
 #define PSC_SPICFG_MO           (1 << 0)
-/* SPI Mask Register.
+/* SPI Mask Register. */
-*/
 #define PSC_SPIMSK_MM           (1 << 16)
 #define PSC_SPIMSK_RR           (1 << 13)
 #define PSC_SPIMSK_RO           (1 << 12)
@@ -371,16 +351,14 @@ typedef struct	psc_spi {
                                 PSC_SPIMSK_TU | PSC_SPIMSK_SD | \
                                 PSC_SPIMSK_MD)
-/* SPI Protocol Control Register.
+/* SPI Protocol Control Register. */
-*/
 #define PSC_SPIPCR_RC           (1 << 6)
 #define PSC_SPIPCR_SP           (1 << 5)
 #define PSC_SPIPCR_SS           (1 << 4)
 #define PSC_SPIPCR_TC           (1 << 2)
 #define PSC_SPIPCR_MS           (1 << 0)
-/* SPI Status register (read only).
+/* SPI Status register (read only). */
-*/
 #define PSC_SPISTAT_RF          (1 << 13)
 #define PSC_SPISTAT_RE          (1 << 12)
 #define PSC_SPISTAT_RR          (1 << 11)
@@ -393,8 +371,7 @@ typedef struct	psc_spi {
 #define PSC_SPISTAT_DR          (1 << 1)
 #define PSC_SPISTAT_SR          (1 << 0)
-/* SPI Event Register.
+/* SPI Event Register. */
-*/
 #define PSC_SPIEVNT_MM          (1 << 16)
 #define PSC_SPIEVNT_RR          (1 << 13)
 #define PSC_SPIEVNT_RO          (1 << 12)
@@ -405,13 +382,11 @@ typedef struct	psc_spi {
 #define PSC_SPIEVNT_SD          (1 << 5)
 #define PSC_SPIEVNT_MD          (1 << 4)
-/* Transmit register control.
+/* Transmit register control. */
-*/
 #define PSC_SPITXRX_LC          (1 << 29)
 #define PSC_SPITXRX_SR          (1 << 28)
-/* PSC in SMBus (I2C) Mode.
+/* PSC in SMBus (I2C) Mode. */
-*/
 typedef struct  psc_smb {
        u32     psc_sel;
        u32     psc_ctrl;
@@ -424,8 +399,7 @@ typedef struct	psc_smb {
        u32     psc_smbtmr;
 } psc_smb_t;
-/* SMBus Config Register.
+/* SMBus Config Register. */
-*/
 #define PSC_SMBCFG_RT_MASK      (3 << 30)
 #define PSC_SMBCFG_RT_FIFO1     (0 << 30)
 #define PSC_SMBCFG_RT_FIFO2     (1 << 30)
@@ -452,8 +426,7 @@ typedef struct	psc_smb {
 #define PSC_SMBCFG_SET_SLV(x)   (((x) & 0x7f) << 1)
-/* SMBus Mask Register.
+/* SMBus Mask Register. */
-*/
 #define PSC_SMBMSK_DN           (1 << 30)
 #define PSC_SMBMSK_AN           (1 << 29)
 #define PSC_SMBMSK_AL           (1 << 28)
@@ -471,13 +444,11 @@ typedef struct	psc_smb {
                                 PSC_SMBMSK_TU | PSC_SMBMSK_SD | \
                                 PSC_SMBMSK_MD)
-/* SMBus Protocol Control Register.
+/* SMBus Protocol Control Register. */
-*/
 #define PSC_SMBPCR_DC           (1 << 2)
 #define PSC_SMBPCR_MS           (1 << 0)
-/* SMBus Status register (read only).
+/* SMBus Status register (read only). */
-*/
 #define PSC_SMBSTAT_BB          (1 << 28)
 #define PSC_SMBSTAT_RF          (1 << 13)
 #define PSC_SMBSTAT_RE          (1 << 12)
@@ -491,8 +462,7 @@ typedef struct	psc_smb {
 #define PSC_SMBSTAT_DR          (1 << 1)
 #define PSC_SMBSTAT_SR          (1 << 0)
-/* SMBus Event Register.
+/* SMBus Event Register. */
-*/
 #define PSC_SMBEVNT_DN          (1 << 30)
 #define PSC_SMBEVNT_AN          (1 << 29)
 #define PSC_SMBEVNT_AL          (1 << 28)
@@ -510,15 +480,13 @@ typedef struct	psc_smb {
                                 PSC_SMBEVNT_TU | PSC_SMBEVNT_SD | \
                                 PSC_SMBEVNT_MD)
-/* Transmit register control.
+/* Transmit register control. */
-*/
 #define PSC_SMBTXRX_RSR         (1 << 28)
 #define PSC_SMBTXRX_STP         (1 << 29)
-#define PSC_SMBTXRX_DATAMASK    (0xff)
+#define PSC_SMBTXRX_DATAMASK    0xff
-/* SMBus protocol timers register.
+/* SMBus protocol timers register. */
-*/
+#define PSC_SMBTMR_SET_TH(x)    (((x) & 0x03) << 30)
-#define PSC_SMBTMR_SET_TH(x)    (((x) & 0x3) << 30)
 #define PSC_SMBTMR_SET_PS(x)    (((x) & 0x1f) << 25)
 #define PSC_SMBTMR_SET_PU(x)    (((x) & 0x1f) << 20)
 #define PSC_SMBTMR_SET_SH(x)    (((x) & 0x1f) << 15)
@@ -526,5 +494,4 @@ typedef struct	psc_smb {
 #define PSC_SMBTMR_SET_CL(x)    (((x) & 0x1f) << 5)
 #define PSC_SMBTMR_SET_CH(x)    (((x) & 0x1f) << 0)
 #endif /* _AU1000_PSC_H_ */
diff --git a/include/asm-mips/mach-db1x00/db1200.h b/include/asm-mips/mach-db1x00/db1200.h
index eedd048a7261..27f26102b1bb 100644
--- a/include/asm-mips/mach-db1x00/db1200.h
+++ b/include/asm-mips/mach-db1x00/db1200.h
@@ -1,6 +1,6 @@
 /*
- * AMD Alchemy DB1200 Referrence Board
+ * AMD Alchemy DBAu1200 Reference Board
- * Board Registers defines.
+ * Board register defines.
 *
 * ########################################################################
 *
@@ -27,26 +27,25 @@
 #include <linux/types.h>
 #include <asm/mach-au1x00/au1xxx_psc.h>
-// This is defined in au1000.h with bogus value
+#define DBDMA_AC97_TX_CHAN      DSCR_CMD0_PSC1_TX
-#undef AU1X00_EXTERNAL_INT
+#define DBDMA_AC97_RX_CHAN      DSCR_CMD0_PSC1_RX
+#define DBDMA_I2S_TX_CHAN       DSCR_CMD0_PSC1_TX
+#define DBDMA_I2S_RX_CHAN       DSCR_CMD0_PSC1_RX
-#define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX
+/*
-#define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX
+ * SPI and SMB are muxed on the DBAu1200 board.
-#define DBDMA_I2S_TX_CHAN DSCR_CMD0_PSC1_TX
+ * Refer to board documentation.
-#define DBDMA_I2S_RX_CHAN DSCR_CMD0_PSC1_RX
-/* SPI and SMB are muxed on the Pb1200 board.
-   Refer to board documentation.
 */
-#define SPI_PSC_BASE        PSC0_BASE_ADDR
+#define SPI_PSC_BASE            PSC0_BASE_ADDR
-#define SMBUS_PSC_BASE      PSC0_BASE_ADDR
+#define SMBUS_PSC_BASE          PSC0_BASE_ADDR
-/* AC97 and I2S are muxed on the Pb1200 board.
+/*
-   Refer to board documentation.
+ * AC'97 and I2S are muxed on the DBAu1200 board.
+ * Refer to board documentation.
 */
-#define AC97_PSC_BASE       PSC1_BASE_ADDR
+#define AC97_PSC_BASE           PSC1_BASE_ADDR
 #define I2S_PSC_BASE            PSC1_BASE_ADDR
-#define BCSR_KSEG1_ADDR 0xB9800000
+#define BCSR_KSEG1_ADDR         0xB9800000
 typedef volatile struct
 {
@@ -102,9 +101,9 @@ static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
 #define BCSR_STATUS_SWAPBOOT    0x0040
 #define BCSR_STATUS_FLASHBUSY   0x0100
 #define BCSR_STATUS_IDECBLID    0x0200
-#define BCSR_STATUS_SD0WP               0x0400
+#define BCSR_STATUS_SD0WP       0x0400
-#define BCSR_STATUS_U0RXD               0x1000
+#define BCSR_STATUS_U0RXD       0x1000
-#define BCSR_STATUS_U1RXD               0x2000
+#define BCSR_STATUS_U1RXD       0x2000
 #define BCSR_SWITCHES_OCTAL     0x00FF
 #define BCSR_SWITCHES_DIP_1     0x0080
@@ -122,8 +121,8 @@ static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
 #define BCSR_RESETS_DC          0x0004
 #define BCSR_RESETS_IDE         0x0008
 #define BCSR_RESETS_TV          0x0010
-/* not resets but in the same register */
+/* Not resets but in the same register */
-#define BCSR_RESETS_PWMR1mUX 0x0800
+#define BCSR_RESETS_PWMR1MUX    0x0800
 #define BCSR_RESETS_PCS0MUX     0x1000
 #define BCSR_RESETS_PCS1MUX     0x2000
 #define BCSR_RESETS_SPISEL      0x4000
@@ -160,7 +159,7 @@ static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
 #define BCSR_INT_PC0STSCHG      0x0008
 #define BCSR_INT_PC1            0x0010
 #define BCSR_INT_PC1STSCHG      0x0020
-#define BCSR_INT_DC                     0x0040
+#define BCSR_INT_DC             0x0040
 #define BCSR_INT_FLASHBUSY      0x0080
 #define BCSR_INT_PC0INSERT      0x0100
 #define BCSR_INT_PC0EJECT       0x0200
@@ -179,10 +178,10 @@ static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
 #define IDE_DDMA_REQ            DSCR_CMD0_DMA_REQ1
 #define IDE_RQSIZE              128
-#define NAND_PHYS_ADDR   0x20000000
+#define NAND_PHYS_ADDR          0x20000000
 /*
- * External Interrupts for Pb1200 as of 8/6/2004.
+ * External Interrupts for DBAu1200 as of 8/6/2004.
 * Bit positions in the CPLD registers can be calculated by taking
 * the interrupt define and subtracting the DB1200_INT_BEGIN value.
 *
@@ -211,23 +210,21 @@ enum external_pb1200_ints {
 };
-/* For drivers/pcmcia/au1000_db1x00.c */
+/*
+ * DBAu1200 specific PCMCIA defines for drivers/pcmcia/au1000_db1x00.c
-/* PCMCIA Db1x00 specific defines */
+ */
+#define PCMCIA_MAX_SOCK  1
-#define PCMCIA_MAX_SOCK 1
+#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK + 1)
-#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK+1)
 /* VPP/VCC */
-#define SET_VCC_VPP(VCC, VPP, SLOT)\
+#define SET_VCC_VPP(VCC, VPP, SLOT) \
-        ((((VCC)<<2) | ((VPP)<<0)) << ((SLOT)*8))
+        ((((VCC) << 2) | ((VPP) << 0)) << ((SLOT) * 8))
-#define BOARD_PC0_INT DB1200_PC0_INT
+#define BOARD_PC0_INT   DB1200_PC0_INT
-#define BOARD_PC1_INT DB1200_PC1_INT
+#define BOARD_PC1_INT   DB1200_PC1_INT
-#define BOARD_CARD_INSERTED(SOCKET) bcsr->sig_status & (1<<(8+(2*SOCKET)))
+#define BOARD_CARD_INSERTED(SOCKET) bcsr->sig_status & (1 << (8 + (2 * SOCKET)))
-/* Nand chip select */
+/* NAND chip select */
 #define NAND_CS 1
 #endif /* __ASM_DB1200_H */
diff --git a/include/asm-mips/mach-db1x00/db1x00.h b/include/asm-mips/mach-db1x00/db1x00.h
index e7a88ba35833..612ae90dbcb8 100644
--- a/include/asm-mips/mach-db1x00/db1x00.h
+++ b/include/asm-mips/mach-db1x00/db1x00.h
@@ -1,9 +1,8 @@
 /*
- * AMD Alchemy DB1x00 Reference Boards
+ * AMD Alchemy DBAu1x00 Reference Boards
 *
- * Copyright 2001 MontaVista Software Inc.
+ * Copyright 2001, 2008 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
+ * Author: MontaVista Software, Inc. <source@mvista.com>
- *              ppopov@mvista.com or source@mvista.com
 * Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org)
 *
 * ########################################################################
@@ -32,26 +31,26 @@
 #ifdef CONFIG_MIPS_DB1550
-#define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX
+#define DBDMA_AC97_TX_CHAN      DSCR_CMD0_PSC1_TX
-#define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX
+#define DBDMA_AC97_RX_CHAN      DSCR_CMD0_PSC1_RX
-#define DBDMA_I2S_TX_CHAN  DSCR_CMD0_PSC3_TX
+#define DBDMA_I2S_TX_CHAN       DSCR_CMD0_PSC3_TX
-#define DBDMA_I2S_RX_CHAN  DSCR_CMD0_PSC3_RX
+#define DBDMA_I2S_RX_CHAN       DSCR_CMD0_PSC3_RX
-#define SPI_PSC_BASE       PSC0_BASE_ADDR
+#define SPI_PSC_BASE            PSC0_BASE_ADDR
-#define AC97_PSC_BASE      PSC1_BASE_ADDR
+#define AC97_PSC_BASE           PSC1_BASE_ADDR
-#define SMBUS_PSC_BASE     PSC2_BASE_ADDR
+#define SMBUS_PSC_BASE          PSC2_BASE_ADDR
-#define I2S_PSC_BASE       PSC3_BASE_ADDR
+#define I2S_PSC_BASE            PSC3_BASE_ADDR
-#define BCSR_KSEG1_ADDR 0xAF000000
+#define BCSR_KSEG1_ADDR         0xAF000000
-#define NAND_PHYS_ADDR  0x20000000
+#define NAND_PHYS_ADDR          0x20000000
 #else
 #define BCSR_KSEG1_ADDR 0xAE000000
 #endif
 /*
- * Overlay data structure of the Db1x00 board registers.
+ * Overlay data structure of the DBAu1x00 board registers.
- * Registers located at physical 0E0000xx, KSEG1 0xAE0000xx
+ * Registers are located at physical 0E0000xx, KSEG1 0xAE0000xx.
 */
 typedef volatile struct
 {
@@ -138,18 +137,19 @@ typedef volatile struct
 #define BCSR_SWRESET_RESET              0x0080
-/* PCMCIA Db1x00 specific defines */
+/* PCMCIA DBAu1x00 specific defines */
-#define PCMCIA_MAX_SOCK 1
+#define PCMCIA_MAX_SOCK  1
-#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK+1)
+#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK + 1)
 /* VPP/VCC */
 #define SET_VCC_VPP(VCC, VPP, SLOT)\
-        ((((VCC)<<2) | ((VPP)<<0)) << ((SLOT)*8))
+        ((((VCC) << 2) | ((VPP) << 0)) << ((SLOT) * 8))
-/* SD controller macros */
 /*
- * Detect card.
+ * SD controller macros
 */
+/* Detect card. */
 #define mmc_card_inserted(_n_, _res_) \
        do { \
                BCSR * const bcsr = (BCSR *)0xAE000000; \
@@ -176,10 +176,10 @@ typedef volatile struct
                unsigned long mmc_pwr, mmc_wp, board_specific; \
                if ((_n_)) { \
                        mmc_pwr = BCSR_BOARD_SD1_PWR; \
-                        mmc_wp = BCSR_BOARD_SD1_WP; \
+                        mmc_wp  = BCSR_BOARD_SD1_WP; \
                } else { \
                        mmc_pwr = BCSR_BOARD_SD0_PWR; \
-                        mmc_wp = BCSR_BOARD_SD0_WP; \
+                        mmc_wp  = BCSR_BOARD_SD0_WP; \
                } \
                board_specific = au_readl((unsigned long)(&bcsr->specific)); \
                if (!(board_specific & mmc_wp)) {/* low means card present */ \
@@ -190,17 +190,19 @@ typedef volatile struct
        } while (0)
-/* NAND defines */
+/*
-/* Timing values as described in databook, * ns value stripped of
+ * NAND defines
+ *
+ * Timing values as described in databook, * ns value stripped of the
 * lower 2 bits.
- * These defines are here rather than an SOC1550 generic file because
+ * These defines are here rather than an Au1550 generic file because
 * the parts chosen on another board may be different and may require
 * different timings.
 */
-#define NAND_T_H                        (18 >> 2)
+#define NAND_T_H                (18 >> 2)
-#define NAND_T_PUL                      (30 >> 2)
+#define NAND_T_PUL              (30 >> 2)
-#define NAND_T_SU                       (30 >> 2)
+#define NAND_T_SU               (30 >> 2)
-#define NAND_T_WH                       (30 >> 2)
+#define NAND_T_WH               (30 >> 2)
 /* Bitfield shift amounts */
 #define NAND_T_H_SHIFT          0
@@ -208,16 +210,15 @@ typedef volatile struct
 #define NAND_T_SU_SHIFT         8
 #define NAND_T_WH_SHIFT         12
-#define NAND_TIMING     ((NAND_T_H   & 0xF)     << NAND_T_H_SHIFT)   | \
+#define NAND_TIMING     (((NAND_T_H   & 0xF) << NAND_T_H_SHIFT)   | \
-                        ((NAND_T_PUL & 0xF)     << NAND_T_PUL_SHIFT) | \
+                         ((NAND_T_PUL & 0xF) << NAND_T_PUL_SHIFT) | \
-                        ((NAND_T_SU  & 0xF)     << NAND_T_SU_SHIFT)  | \
+                         ((NAND_T_SU  & 0xF) << NAND_T_SU_SHIFT)  | \
-                        ((NAND_T_WH  & 0xF)     << NAND_T_WH_SHIFT)
+                         ((NAND_T_WH  & 0xF) << NAND_T_WH_SHIFT))
-#define NAND_CS 1
+#define NAND_CS         1
-/* should be done by yamon */
+/* Should be done by YAMON */
-#define NAND_STCFG  0x00400005 /* 8-bit NAND */
+#define NAND_STCFG      0x00400005 /* 8-bit NAND */
-#define NAND_STTIME 0x00007774 /* valid for 396MHz SD=2 only */
+#define NAND_STTIME     0x00007774 /* valid for 396 MHz SD=2 only */
-#define NAND_STADDR 0x12000FFF /* physical address 0x20000000 */
+#define NAND_STADDR     0x12000FFF /* physical address 0x20000000 */
 #endif /* __ASM_DB1X00_H */
diff --git a/include/asm-mips/mach-pb1x00/pb1000.h b/include/asm-mips/mach-pb1x00/pb1000.h
index b52e0e7ee3fb..6d1ff9060e44 100644
--- a/include/asm-mips/mach-pb1x00/pb1000.h
+++ b/include/asm-mips/mach-pb1x00/pb1000.h
@@ -1,9 +1,8 @@
 /*
- * Alchemy Semi PB1000 Referrence Board
+ * Alchemy Semi Pb1000 Referrence Board
 *
- * Copyright 2001 MontaVista Software Inc.
+ * Copyright 2001, 2008 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
+ * Author: MontaVista Software, Inc. <source@mvista.com>
- *              ppopov@mvista.com or source@mvista.com
 *
 * ########################################################################
 *
@@ -28,145 +27,61 @@
 #define __ASM_PB1000_H
 /* PCMCIA PB1000 specific defines */
-#define PCMCIA_MAX_SOCK 1
+#define PCMCIA_MAX_SOCK  1
-#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK+1)
+#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK + 1)
-#define PB1000_PCR     0xBE000000
+#define PB1000_PCR              0xBE000000
-#  define PCR_SLOT_0_VPP0  (1<<0)
+#  define PCR_SLOT_0_VPP0       (1 << 0)
-#  define PCR_SLOT_0_VPP1  (1<<1)
+#  define PCR_SLOT_0_VPP1       (1 << 1)
-#  define PCR_SLOT_0_VCC0  (1<<2)
+#  define PCR_SLOT_0_VCC0       (1 << 2)
-#  define PCR_SLOT_0_VCC1  (1<<3)
+#  define PCR_SLOT_0_VCC1       (1 << 3)
-#  define PCR_SLOT_0_RST   (1<<4)
+#  define PCR_SLOT_0_RST        (1 << 4)
+#  define PCR_SLOT_1_VPP0       (1 << 8)
-#  define PCR_SLOT_1_VPP0  (1<<8)
+#  define PCR_SLOT_1_VPP1       (1 << 9)
-#  define PCR_SLOT_1_VPP1  (1<<9)
+#  define PCR_SLOT_1_VCC0       (1 << 10)
-#  define PCR_SLOT_1_VCC0  (1<<10)
+#  define PCR_SLOT_1_VCC1       (1 << 11)
-#  define PCR_SLOT_1_VCC1  (1<<11)
+#  define PCR_SLOT_1_RST        (1 << 12)
-#  define PCR_SLOT_1_RST   (1<<12)
+#define PB1000_MDR              0xBE000004
-#define PB1000_MDR     0xBE000004
+#  define MDR_PI                (1 << 5)        /* PCMCIA int latch  */
-#  define MDR_PI        (1<<5)  /* pcmcia int latch  */
+#  define MDR_EPI               (1 << 14)       /* enable PCMCIA int */
-#  define MDR_EPI      (1<<14)  /* enable pcmcia int */
+#  define MDR_CPI               (1 << 15)       /* clear  PCMCIA int  */
-#  define MDR_CPI      (1<<15)  /* clear pcmcia int  */
+#define PB1000_ACR1             0xBE000008
-#define PB1000_ACR1    0xBE000008
+#  define ACR1_SLOT_0_CD1       (1 << 0)        /* card detect 1        */
-#  define ACR1_SLOT_0_CD1    (1<<0)  /* card detect 1     */
+#  define ACR1_SLOT_0_CD2       (1 << 1)        /* card detect 2        */
-#  define ACR1_SLOT_0_CD2    (1<<1)  /* card detect 2     */
+#  define ACR1_SLOT_0_READY     (1 << 2)        /* ready                */
-#  define ACR1_SLOT_0_READY  (1<<2)  /* ready             */
+#  define ACR1_SLOT_0_STATUS    (1 << 3)        /* status change        */
-#  define ACR1_SLOT_0_STATUS (1<<3)  /* status change     */
+#  define ACR1_SLOT_0_VS1       (1 << 4)        /* voltage sense 1      */
-#  define ACR1_SLOT_0_VS1    (1<<4)  /* voltage sense 1   */
+#  define ACR1_SLOT_0_VS2       (1 << 5)        /* voltage sense 2      */
-#  define ACR1_SLOT_0_VS2    (1<<5)  /* voltage sense 2   */
+#  define ACR1_SLOT_0_INPACK    (1 << 6)        /* inpack pin status    */
-#  define ACR1_SLOT_0_INPACK (1<<6)  /* inpack pin status */
+#  define ACR1_SLOT_1_CD1       (1 << 8)        /* card detect 1        */
-#  define ACR1_SLOT_1_CD1    (1<<8)  /* card detect 1     */
+#  define ACR1_SLOT_1_CD2       (1 << 9)        /* card detect 2        */
-#  define ACR1_SLOT_1_CD2    (1<<9)  /* card detect 2     */
+#  define ACR1_SLOT_1_READY     (1 << 10)       /* ready                */
-#  define ACR1_SLOT_1_READY  (1<<10) /* ready             */
+#  define ACR1_SLOT_1_STATUS    (1 << 11)       /* status change        */
-#  define ACR1_SLOT_1_STATUS (1<<11) /* status change     */
+#  define ACR1_SLOT_1_VS1       (1 << 12)       /* voltage sense 1      */
-#  define ACR1_SLOT_1_VS1    (1<<12) /* voltage sense 1   */
+#  define ACR1_SLOT_1_VS2       (1 << 13)       /* voltage sense 2      */
-#  define ACR1_SLOT_1_VS2    (1<<13) /* voltage sense 2   */
+#  define ACR1_SLOT_1_INPACK    (1 << 14)       /* inpack pin status    */
-#  define ACR1_SLOT_1_INPACK (1<<14) /* inpack pin status */
+#define CPLD_AUX0               0xBE00000C
-#define CPLD_AUX0      0xBE00000C
+#define CPLD_AUX1               0xBE000010
-#define CPLD_AUX1      0xBE000010
+#define CPLD_AUX2               0xBE000014
-#define CPLD_AUX2      0xBE000014
 /* Voltage levels */
 /* VPPEN1 - VPPEN0 */
-#define VPP_GND ((0<<1) | (0<<0))
+#define VPP_GND ((0 << 1) | (0 << 0))
-#define VPP_5V  ((1<<1) | (0<<0))
+#define VPP_5V  ((1 << 1) | (0 << 0))
-#define VPP_3V  ((0<<1) | (1<<0))
+#define VPP_3V  ((0 << 1) | (1 << 0))
-#define VPP_12V ((0<<1) | (1<<0))
+#define VPP_12V ((0 << 1) | (1 << 0))
-#define VPP_HIZ ((1<<1) | (1<<0))
+#define VPP_HIZ ((1 << 1) | (1 << 0))
 /* VCCEN1 - VCCEN0 */
-#define VCC_3V  ((0<<1) | (1<<0))
+#define VCC_3V  ((0 << 1) | (1 << 0))
-#define VCC_5V  ((1<<1) | (0<<0))
+#define VCC_5V  ((1 << 1) | (0 << 0))
-#define VCC_HIZ ((0<<1) | (0<<0))
+#define VCC_HIZ ((0 << 1) | (0 << 0))
 /* VPP/VCC */
-#define SET_VCC_VPP(VCC, VPP, SLOT)\
+#define SET_VCC_VPP(VCC, VPP, SLOT) \
-        ((((VCC)<<2) | ((VPP)<<0)) << ((SLOT)*8))
+        ((((VCC) << 2) | ((VPP) << 0)) << ((SLOT) * 8))
-/* PCI PB1000 specific defines */
-/* The reason these defines are here instead of au1000.h is because
- * the Au1000 does not have a PCI bus controller so the PCI implementation
- * on the some of the older Pb1000 boards was very board specific.
- */
-#define PCI_CONFIG_BASE   0xBA020000 /* the only external slot */
-#define SDRAM_DEVID       0xBA010000
-#define SDRAM_CMD         0xBA010004
-#define SDRAM_CLASS       0xBA010008
-#define SDRAM_MISC        0xBA01000C
-#define SDRAM_MBAR        0xBA010010
-#define PCI_IO_DATA_PORT  0xBA800000
-#define PCI_IO_ADDR       0xBE00001C
-#define PCI_INT_ACK       0xBBC00000
-#define PCI_IO_READ       0xBBC00020
-#define PCI_IO_WRITE      0xBBC00030
-#define PCI_BRIDGE_CONFIG 0xBE000018
-#define PCI_IO_START      0x10000000
-#define PCI_IO_END        0x1000ffff
-#define PCI_MEM_START     0x18000000
-#define PCI_MEM_END       0x18ffffff
-#define PCI_FIRST_DEVFN   0
-#define PCI_LAST_DEVFN    1
-static inline u8 au_pci_io_readb(u32 addr)
-{
-        writel(addr, PCI_IO_ADDR);
-        writel((readl(PCI_BRIDGE_CONFIG) & 0xffffcfff) | (1<<12), PCI_BRIDGE_CONFIG);
-        return (readl(PCI_IO_DATA_PORT) & 0xff);
-}
-static inline u16 au_pci_io_readw(u32 addr)
-{
-        writel(addr, PCI_IO_ADDR);
-        writel((readl(PCI_BRIDGE_CONFIG) & 0xffffcfff) | (1<<13), PCI_BRIDGE_CONFIG);
-        return (readl(PCI_IO_DATA_PORT) & 0xffff);
-}
-static inline u32 au_pci_io_readl(u32 addr)
-{
-        writel(addr, PCI_IO_ADDR);
-        writel((readl(PCI_BRIDGE_CONFIG) & 0xffffcfff), PCI_BRIDGE_CONFIG);
-        return readl(PCI_IO_DATA_PORT);
-}
-static inline void au_pci_io_writeb(u8 val, u32 addr)
-{
-        writel(addr, PCI_IO_ADDR);
-        writel((readl(PCI_BRIDGE_CONFIG) & 0xffffcfff) | (1<<12), PCI_BRIDGE_CONFIG);
-        writel(val, PCI_IO_DATA_PORT);
-}
-static inline void au_pci_io_writew(u16 val, u32 addr)
-{
-        writel(addr, PCI_IO_ADDR);
-        writel((readl(PCI_BRIDGE_CONFIG) & 0xffffcfff) | (1<<13), PCI_BRIDGE_CONFIG);
-        writel(val, PCI_IO_DATA_PORT);
-}
-static inline void au_pci_io_writel(u32 val, u32 addr)
-{
-        writel(addr, PCI_IO_ADDR);
-        writel(readl(PCI_BRIDGE_CONFIG) & 0xffffcfff, PCI_BRIDGE_CONFIG);
-        writel(val, PCI_IO_DATA_PORT);
-}
-static inline void set_sdram_extbyte(void)
-{
-        writel(readl(PCI_BRIDGE_CONFIG) & 0xffffff00, PCI_BRIDGE_CONFIG);
-}
-static inline void set_slot_extbyte(void)
-{
-        writel((readl(PCI_BRIDGE_CONFIG) & 0xffffbf00) | 0x18, PCI_BRIDGE_CONFIG);
-}
 #endif /* __ASM_PB1000_H */
diff --git a/include/asm-mips/mach-pb1x00/pb1100.h b/include/asm-mips/mach-pb1x00/pb1100.h
index 63aa3926b297..b1a60f1cbd02 100644
--- a/include/asm-mips/mach-pb1x00/pb1100.h
+++ b/include/asm-mips/mach-pb1x00/pb1100.h
@@ -1,9 +1,8 @@
 /*
- * Alchemy Semi PB1100 Referrence Board
+ * Alchemy Semi Pb1100 Referrence Board
 *
- * Copyright 2001 MontaVista Software Inc.
+ * Copyright 2001, 2008 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
+ * Author: MontaVista Software, Inc. <source@mvista.com>
- *              ppopov@mvista.com or source@mvista.com
 *
 * ########################################################################
 *
@@ -27,59 +26,60 @@
 #ifndef __ASM_PB1100_H
 #define __ASM_PB1100_H
-#define PB1100_IDENT          0xAE000000
+#define PB1100_IDENT            0xAE000000
-#define BOARD_STATUS_REG      0xAE000004
+#define BOARD_STATUS_REG        0xAE000004
-#  define PB1100_ROM_SEL         (1<<15)
+#  define PB1100_ROM_SEL        (1 << 15)
-#  define PB1100_ROM_SIZ         (1<<14)
+#  define PB1100_ROM_SIZ        (1 << 14)
-#  define PB1100_SWAP_BOOT       (1<<13)
+#  define PB1100_SWAP_BOOT      (1 << 13)
-#  define PB1100_FLASH_WP        (1<<12)
+#  define PB1100_FLASH_WP       (1 << 12)
-#  define PB1100_ROM_H_STS       (1<<11)
+#  define PB1100_ROM_H_STS      (1 << 11)
-#  define PB1100_ROM_L_STS       (1<<10)
+#  define PB1100_ROM_L_STS      (1 << 10)
-#  define PB1100_FLASH_H_STS      (1<<9)
+#  define PB1100_FLASH_H_STS    (1 << 9)
-#  define PB1100_FLASH_L_STS      (1<<8)
+#  define PB1100_FLASH_L_STS    (1 << 8)
-#  define PB1100_SRAM_SIZ         (1<<7)
+#  define PB1100_SRAM_SIZ       (1 << 7)
-#  define PB1100_TSC_BUSY         (1<<6)
+#  define PB1100_TSC_BUSY       (1 << 6)
-#  define PB1100_PCMCIA_VS_MASK   (3<<4)
+#  define PB1100_PCMCIA_VS_MASK (3 << 4)
-#  define PB1100_RS232_CD         (1<<3)
+#  define PB1100_RS232_CD       (1 << 3)
-#  define PB1100_RS232_CTS        (1<<2)
+#  define PB1100_RS232_CTS      (1 << 2)
-#  define PB1100_RS232_DSR        (1<<1)
+#  define PB1100_RS232_DSR      (1 << 1)
-#  define PB1100_RS232_RI         (1<<0)
+#  define PB1100_RS232_RI       (1 << 0)
-#define PB1100_IRDA_RS232     0xAE00000C
+#define PB1100_IRDA_RS232       0xAE00000C
-#  define PB1100_IRDA_FULL       (0<<14) /* full power */
+#  define PB1100_IRDA_FULL      (0 << 14)       /* full power           */
-#  define PB1100_IRDA_SHUTDOWN   (1<<14)
+#  define PB1100_IRDA_SHUTDOWN  (1 << 14)
-#  define PB1100_IRDA_TT         (2<<14) /* 2/3 power */
+#  define PB1100_IRDA_TT        (2 << 14)       /* 2/3 power            */
-#  define PB1100_IRDA_OT         (3<<14) /* 1/3 power */
+#  define PB1100_IRDA_OT        (3 << 14)       /* 1/3 power            */
-#  define PB1100_IRDA_FIR        (1<<13)
+#  define PB1100_IRDA_FIR       (1 << 13)
-#define PCMCIA_BOARD_REG     0xAE000010
+#define PCMCIA_BOARD_REG        0xAE000010
-#  define PB1100_SD_WP1_RO       (1<<15) /* read only */
+#  define PB1100_SD_WP1_RO      (1 << 15)       /* read only            */
-#  define PB1100_SD_WP0_RO       (1<<14) /* read only */
+#  define PB1100_SD_WP0_RO      (1 << 14)       /* read only            */
-#  define PB1100_SD_PWR1         (1<<11) /* applies power to SD1 */
+#  define PB1100_SD_PWR1        (1 << 11)       /* applies power to SD1 */
-#  define PB1100_SD_PWR0         (1<<10) /* applies power to SD0 */
+#  define PB1100_SD_PWR0        (1 << 10)       /* applies power to SD0 */
-#  define PB1100_SEL_SD_CONN1     (1<<9)
+#  define PB1100_SEL_SD_CONN1   (1 << 9)
-#  define PB1100_SEL_SD_CONN0     (1<<8)
+#  define PB1100_SEL_SD_CONN0   (1 << 8)
-#  define PC_DEASSERT_RST         (1<<7)
+#  define PC_DEASSERT_RST       (1 << 7)
-#  define PC_DRV_EN               (1<<4)
+#  define PC_DRV_EN             (1 << 4)
-#define PB1100_G_CONTROL      0xAE000014 /* graphics control */
+#define PB1100_G_CONTROL        0xAE000014      /* graphics control     */
-#define PB1100_RST_VDDI       0xAE00001C
+#define PB1100_RST_VDDI         0xAE00001C
-#  define PB1100_SOFT_RESET      (1<<15) /* clear to reset the board */
+#  define PB1100_SOFT_RESET     (1 << 15)       /* clear to reset the board */
-#  define PB1100_VDDI_MASK        (0x1F)
+#  define PB1100_VDDI_MASK      0x1F
-#define PB1100_LEDS           0xAE000018
+#define PB1100_LEDS             0xAE000018
-/* 11:8 is 4 discreet LEDs. Clearing a bit illuminates the LED.
+/*
- * 7:0 is the LED Display's decimal points.
+ * 11:8 is 4 discreet LEDs. Clearing a bit illuminates the LED.
+ * 7:0  is the LED Display's decimal points.
 */
-#define PB1100_HEX_LED        0xAE000018
+#define PB1100_HEX_LED          0xAE000018
-/* PCMCIA PB1100 specific defines */
+/* PCMCIA Pb1100 specific defines */
-#define PCMCIA_MAX_SOCK 0
+#define PCMCIA_MAX_SOCK  0
-#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK+1)
+#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK + 1)
 /* VPP/VCC */
-#define SET_VCC_VPP(VCC, VPP) (((VCC)<<2) | ((VPP)<<0))
+#define SET_VCC_VPP(VCC, VPP) (((VCC) << 2) | ((VPP) << 0))
 #endif /* __ASM_PB1100_H */
diff --git a/include/asm-mips/mach-pb1x00/pb1200.h b/include/asm-mips/mach-pb1x00/pb1200.h
index e2c6bcac3b42..c8618df88cb5 100644
--- a/include/asm-mips/mach-pb1x00/pb1200.h
+++ b/include/asm-mips/mach-pb1x00/pb1200.h
@@ -1,5 +1,5 @@
 /*
- * AMD Alchemy PB1200 Referrence Board
+ * AMD Alchemy Pb1200 Referrence Board
 * Board Registers defines.
 *
 * ########################################################################
@@ -27,21 +27,20 @@
 #include <linux/types.h>
 #include <asm/mach-au1x00/au1xxx_psc.h>
-// This is defined in au1000.h with bogus value
+#define DBDMA_AC97_TX_CHAN      DSCR_CMD0_PSC1_TX
-#undef AU1X00_EXTERNAL_INT
+#define DBDMA_AC97_RX_CHAN      DSCR_CMD0_PSC1_RX
+#define DBDMA_I2S_TX_CHAN       DSCR_CMD0_PSC1_TX
+#define DBDMA_I2S_RX_CHAN       DSCR_CMD0_PSC1_RX
-#define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX
+/*
-#define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX
+ * SPI and SMB are muxed on the Pb1200 board.
-#define DBDMA_I2S_TX_CHAN DSCR_CMD0_PSC1_TX
+ * Refer to board documentation.
-#define DBDMA_I2S_RX_CHAN DSCR_CMD0_PSC1_RX
-/* SPI and SMB are muxed on the Pb1200 board.
-   Refer to board documentation.
 */
-#define SPI_PSC_BASE        PSC0_BASE_ADDR
+#define SPI_PSC_BASE            PSC0_BASE_ADDR
-#define SMBUS_PSC_BASE      PSC0_BASE_ADDR
+#define SMBUS_PSC_BASE          PSC0_BASE_ADDR
-/* AC97 and I2S are muxed on the Pb1200 board.
+/*
-   Refer to board documentation.
+ * AC97 and I2S are muxed on the Pb1200 board.
+ * Refer to board documentation.
 */
 #define AC97_PSC_BASE       PSC1_BASE_ADDR
 #define I2S_PSC_BASE            PSC1_BASE_ADDR
@@ -102,10 +101,10 @@ static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
 #define BCSR_STATUS_SWAPBOOT    0x0040
 #define BCSR_STATUS_FLASHBUSY   0x0100
 #define BCSR_STATUS_IDECBLID    0x0200
-#define BCSR_STATUS_SD0WP               0x0400
+#define BCSR_STATUS_SD0WP       0x0400
-#define BCSR_STATUS_SD1WP               0x0800
+#define BCSR_STATUS_SD1WP       0x0800
-#define BCSR_STATUS_U0RXD               0x1000
+#define BCSR_STATUS_U0RXD       0x1000
-#define BCSR_STATUS_U1RXD               0x2000
+#define BCSR_STATUS_U1RXD       0x2000
 #define BCSR_SWITCHES_OCTAL     0x00FF
 #define BCSR_SWITCHES_DIP_1     0x0080
@@ -123,11 +122,11 @@ static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
 #define BCSR_RESETS_DC          0x0004
 #define BCSR_RESETS_IDE         0x0008
 /* not resets but in the same register */
-#define BCSR_RESETS_WSCFSM  0x0800
+#define BCSR_RESETS_WSCFSM      0x0800
 #define BCSR_RESETS_PCS0MUX     0x1000
 #define BCSR_RESETS_PCS1MUX     0x2000
 #define BCSR_RESETS_SPISEL      0x4000
-#define BCSR_RESETS_SD1MUX  0x8000
+#define BCSR_RESETS_SD1MUX      0x8000
 #define BCSR_PCMCIA_PC0VPP      0x0003
 #define BCSR_PCMCIA_PC0VCC      0x000C
@@ -163,7 +162,7 @@ static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
 #define BCSR_INT_PC0STSCHG      0x0008
 #define BCSR_INT_PC1            0x0010
 #define BCSR_INT_PC1STSCHG      0x0020
-#define BCSR_INT_DC                     0x0040
+#define BCSR_INT_DC             0x0040
 #define BCSR_INT_FLASHBUSY      0x0080
 #define BCSR_INT_PC0INSERT      0x0100
 #define BCSR_INT_PC0EJECT       0x0200
@@ -174,14 +173,6 @@ static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
 #define BCSR_INT_SD1INSERT      0x4000
 #define BCSR_INT_SD1EJECT       0x8000
-/* PCMCIA Db1x00 specific defines */
-#define PCMCIA_MAX_SOCK 1
-#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK+1)
-/* VPP/VCC */
-#define SET_VCC_VPP(VCC, VPP, SLOT)\
-        ((((VCC)<<2) | ((VPP)<<0)) << ((SLOT)*8))
 #define SMC91C111_PHYS_ADDR     0x0D000300
 #define SMC91C111_INT           PB1200_ETH_INT
@@ -192,18 +183,19 @@ static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
 #define IDE_DDMA_REQ            DSCR_CMD0_DMA_REQ1
 #define IDE_RQSIZE              128
-#define NAND_PHYS_ADDR   0x1C000000
+#define NAND_PHYS_ADDR  0x1C000000
-/* Timing values as described in databook, * ns value stripped of
+/*
+ * Timing values as described in databook, * ns value stripped of
 * lower 2 bits.
- * These defines are here rather than an SOC1200 generic file because
+ * These defines are here rather than an Au1200 generic file because
 * the parts chosen on another board may be different and may require
 * different timings.
 */
-#define NAND_T_H                        (18 >> 2)
+#define NAND_T_H                (18 >> 2)
-#define NAND_T_PUL                      (30 >> 2)
+#define NAND_T_PUL              (30 >> 2)
-#define NAND_T_SU                       (30 >> 2)
+#define NAND_T_SU               (30 >> 2)
-#define NAND_T_WH                       (30 >> 2)
+#define NAND_T_WH               (30 >> 2)
 /* Bitfield shift amounts */
 #define NAND_T_H_SHIFT          0
@@ -211,11 +203,10 @@ static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
 #define NAND_T_SU_SHIFT         8
 #define NAND_T_WH_SHIFT         12
-#define NAND_TIMING     ((NAND_T_H   & 0xF)     << NAND_T_H_SHIFT)   | \
+#define NAND_TIMING     (((NAND_T_H   & 0xF) << NAND_T_H_SHIFT)   | \
-                        ((NAND_T_PUL & 0xF)     << NAND_T_PUL_SHIFT) | \
+                         ((NAND_T_PUL & 0xF) << NAND_T_PUL_SHIFT) | \
-                        ((NAND_T_SU  & 0xF)     << NAND_T_SU_SHIFT)  | \
+                         ((NAND_T_SU  & 0xF) << NAND_T_SU_SHIFT)  | \
-                        ((NAND_T_WH  & 0xF)     << NAND_T_WH_SHIFT)
+                         ((NAND_T_WH  & 0xF) << NAND_T_WH_SHIFT))
 /*
 * External Interrupts for Pb1200 as of 8/6/2004.
@@ -248,13 +239,21 @@ enum external_pb1200_ints {
        PB1200_INT_END          = PB1200_INT_BEGIN + 15
 };
-/* For drivers/pcmcia/au1000_db1x00.c */
+/*
-#define BOARD_PC0_INT PB1200_PC0_INT
+ * Pb1200 specific PCMCIA defines for drivers/pcmcia/au1000_db1x00.c
-#define BOARD_PC1_INT PB1200_PC1_INT
+ */
-#define BOARD_CARD_INSERTED(SOCKET) bcsr->sig_status & (1<<(8+(2*SOCKET)))
+#define PCMCIA_MAX_SOCK  1
+#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK + 1)
-/* Nand chip select */
+/* VPP/VCC */
+#define SET_VCC_VPP(VCC, VPP, SLOT) \
+        ((((VCC) << 2) | ((VPP) << 0)) << ((SLOT) * 8))
+#define BOARD_PC0_INT   PB1200_PC0_INT
+#define BOARD_PC1_INT   PB1200_PC1_INT
+#define BOARD_CARD_INSERTED(SOCKET) bcsr->sig_status & (1 << (8 + (2 * SOCKET)))
+/* NAND chip select */
 #define NAND_CS 1
 #endif /* __ASM_PB1200_H */
diff --git a/include/asm-mips/mach-pb1x00/pb1500.h b/include/asm-mips/mach-pb1x00/pb1500.h
index ff6d40c87a25..da51a2eb7b82 100644
--- a/include/asm-mips/mach-pb1x00/pb1500.h
+++ b/include/asm-mips/mach-pb1x00/pb1500.h
@@ -1,9 +1,8 @@
 /*
- * Alchemy Semi PB1500 Referrence Board
+ * Alchemy Semi Pb1500 Referrence Board
 *
- * Copyright 2001 MontaVista Software Inc.
+ * Copyright 2001, 2008 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
+ * Author: MontaVista Software, Inc. <source@mvista.com>
- *              ppopov@mvista.com or source@mvista.com
 *
 * ########################################################################
 *
@@ -27,25 +26,24 @@
 #ifndef __ASM_PB1500_H
 #define __ASM_PB1500_H
+#define IDENT_BOARD_REG         0xAE000000
+#define BOARD_STATUS_REG        0xAE000004
+#define PCI_BOARD_REG           0xAE000010
+#define PCMCIA_BOARD_REG        0xAE000010
+#  define PC_DEASSERT_RST             0x80
+#  define PC_DRV_EN                   0x10
+#define PB1500_G_CONTROL        0xAE000014
+#define PB1500_RST_VDDI         0xAE00001C
+#define PB1500_LEDS             0xAE000018
-#define IDENT_BOARD_REG           0xAE000000
+#define PB1500_HEX_LED          0xAF000004
-#define BOARD_STATUS_REG          0xAE000004
+#define PB1500_HEX_LED_BLANK    0xAF000008
-#define PCI_BOARD_REG             0xAE000010
-#define PCMCIA_BOARD_REG          0xAE000010
-  #define PC_DEASSERT_RST               0x80
-  #define PC_DRV_EN                     0x10
-#define PB1500_G_CONTROL          0xAE000014
-#define PB1500_RST_VDDI           0xAE00001C
-#define PB1500_LEDS               0xAE000018
-#define PB1500_HEX_LED            0xAF000004
+/* PCMCIA Pb1500 specific defines */
-#define PB1500_HEX_LED_BLANK      0xAF000008
+#define PCMCIA_MAX_SOCK  0
+#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK + 1)
-/* PCMCIA PB1500 specific defines */
-#define PCMCIA_MAX_SOCK 0
-#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK+1)
 /* VPP/VCC */
-#define SET_VCC_VPP(VCC, VPP) (((VCC)<<2) | ((VPP)<<0))
+#define SET_VCC_VPP(VCC, VPP) (((VCC) << 2) | ((VPP) << 0))
 #endif /* __ASM_PB1500_H */
diff --git a/include/asm-mips/mach-pb1x00/pb1550.h b/include/asm-mips/mach-pb1x00/pb1550.h
index c2ab0e2df4ae..6704a11497db 100644
--- a/include/asm-mips/mach-pb1x00/pb1550.h
+++ b/include/asm-mips/mach-pb1x00/pb1550.h
@@ -30,15 +30,15 @@
 #include <linux/types.h>
 #include <asm/mach-au1x00/au1xxx_psc.h>
-#define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX
+#define DBDMA_AC97_TX_CHAN      DSCR_CMD0_PSC1_TX
-#define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX
+#define DBDMA_AC97_RX_CHAN      DSCR_CMD0_PSC1_RX
-#define DBDMA_I2S_TX_CHAN DSCR_CMD0_PSC3_TX
+#define DBDMA_I2S_TX_CHAN       DSCR_CMD0_PSC3_TX
-#define DBDMA_I2S_RX_CHAN DSCR_CMD0_PSC3_RX
+#define DBDMA_I2S_RX_CHAN       DSCR_CMD0_PSC3_RX
-#define SPI_PSC_BASE        PSC0_BASE_ADDR
+#define SPI_PSC_BASE            PSC0_BASE_ADDR
-#define AC97_PSC_BASE       PSC1_BASE_ADDR
+#define AC97_PSC_BASE           PSC1_BASE_ADDR
-#define SMBUS_PSC_BASE      PSC2_BASE_ADDR
+#define SMBUS_PSC_BASE          PSC2_BASE_ADDR
-#define I2S_PSC_BASE        PSC3_BASE_ADDR
+#define I2S_PSC_BASE            PSC3_BASE_ADDR
 #define BCSR_PHYS_ADDR 0xAF000000
@@ -129,12 +129,12 @@ static BCSR * const bcsr = (BCSR *)BCSR_PHYS_ADDR;
 #define BCSR_SYSTEM_POWEROFF    0x4000
 #define BCSR_SYSTEM_RESET       0x8000
-#define PCMCIA_MAX_SOCK 1
+#define PCMCIA_MAX_SOCK  1
-#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK+1)
+#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK + 1)
 /* VPP/VCC */
-#define SET_VCC_VPP(VCC, VPP, SLOT)\
+#define SET_VCC_VPP(VCC, VPP, SLOT) \
-        ((((VCC)<<2) | ((VPP)<<0)) << ((SLOT)*8))
+        ((((VCC) << 2) | ((VPP) << 0)) << ((SLOT) * 8))
 #if defined(CONFIG_MTD_PB1550_BOOT) && defined(CONFIG_MTD_PB1550_USER)
 #define PB1550_BOTH_BANKS
@@ -144,16 +144,17 @@ static BCSR * const bcsr = (BCSR *)BCSR_PHYS_ADDR;
 #define PB1550_USER_ONLY
 #endif
-/* Timing values as described in databook, * ns value stripped of
+/*
+ * Timing values as described in databook, * ns value stripped of
 * lower 2 bits.
 * These defines are here rather than an SOC1550 generic file because
 * the parts chosen on another board may be different and may require
 * different timings.
 */
-#define NAND_T_H                        (18 >> 2)
+#define NAND_T_H                (18 >> 2)
-#define NAND_T_PUL                      (30 >> 2)
+#define NAND_T_PUL              (30 >> 2)
-#define NAND_T_SU                       (30 >> 2)
+#define NAND_T_SU               (30 >> 2)
-#define NAND_T_WH                       (30 >> 2)
+#define NAND_T_WH               (30 >> 2)
 /* Bitfield shift amounts */
 #define NAND_T_H_SHIFT          0
@@ -161,16 +162,16 @@ static BCSR * const bcsr = (BCSR *)BCSR_PHYS_ADDR;
 #define NAND_T_SU_SHIFT         8
 #define NAND_T_WH_SHIFT         12
-#define NAND_TIMING     ((NAND_T_H   & 0xF)     << NAND_T_H_SHIFT)   | \
+#define NAND_TIMING     (((NAND_T_H   & 0xF) << NAND_T_H_SHIFT)   | \
-                        ((NAND_T_PUL & 0xF)     << NAND_T_PUL_SHIFT) | \
+                         ((NAND_T_PUL & 0xF) << NAND_T_PUL_SHIFT) | \
-                        ((NAND_T_SU  & 0xF)     << NAND_T_SU_SHIFT)  | \
+                         ((NAND_T_SU  & 0xF) << NAND_T_SU_SHIFT)  | \
-                        ((NAND_T_WH  & 0xF)     << NAND_T_WH_SHIFT)
+                         ((NAND_T_WH  & 0xF) << NAND_T_WH_SHIFT))
 #define NAND_CS 1
-/* should be done by yamon */
+/* Should be done by YAMON */
-#define NAND_STCFG  0x00400005 /* 8-bit NAND */
+#define NAND_STCFG      0x00400005 /* 8-bit NAND */
-#define NAND_STTIME 0x00007774 /* valid for 396MHz SD=2 only */
+#define NAND_STTIME     0x00007774 /* valid for 396 MHz SD=2 only */
-#define NAND_STADDR 0x12000FFF /* physical address 0x20000000 */
+#define NAND_STADDR     0x12000FFF /* physical address 0x20000000 */
 #endif /* __ASM_PB1550_H */
diff --git a/include/asm-mips/mipsregs.h b/include/asm-mips/mipsregs.h
index aa17f658f73c..a46f8e258e6b 100644
--- a/include/asm-mips/mipsregs.h
+++ b/include/asm-mips/mipsregs.h
@@ -765,6 +765,9 @@ do {									\
 #define read_c0_index()         __read_32bit_c0_register($0, 0)
 #define write_c0_index(val)     __write_32bit_c0_register($0, 0, val)
+#define read_c0_random()        __read_32bit_c0_register($1, 0)
+#define write_c0_random(val)    __write_32bit_c0_register($1, 0, val)
 #define read_c0_entrylo0()      __read_ulong_c0_register($2, 0)
 #define write_c0_entrylo0(val)  __write_ulong_c0_register($2, 0, val)
diff --git a/include/asm-mips/pgtable.h b/include/asm-mips/pgtable.h
index 2f597eea4448..6a0edf72ffbc 100644
--- a/include/asm-mips/pgtable.h
+++ b/include/asm-mips/pgtable.h
@@ -239,9 +239,10 @@ static inline pte_t pte_mkdirty(pte_t pte)
 static inline pte_t pte_mkyoung(pte_t pte)
 {
        pte.pte_low |= _PAGE_ACCESSED;
-        if (pte.pte_low & _PAGE_READ)
+        if (pte.pte_low & _PAGE_READ) {
                pte.pte_low  |= _PAGE_SILENT_READ;
                pte.pte_high |= _PAGE_SILENT_READ;
+        }
        return pte;
 }
 #else
diff --git a/include/asm-mips/rtlx.h b/include/asm-mips/rtlx.h
index 65778c890a62..4ca3063ed2ce 100644
--- a/include/asm-mips/rtlx.h
+++ b/include/asm-mips/rtlx.h
@@ -3,7 +3,7 @@
 *
 */
-#ifndef __ASM_RTLX_H
+#ifndef __ASM_RTLX_H_
 #define __ASM_RTLX_H_
 #include <irq.h>
@@ -29,13 +29,13 @@ extern unsigned int rtlx_read_poll(int index, int can_sleep);
 extern unsigned int rtlx_write_poll(int index);
 enum rtlx_state {
-        RTLX_STATE_UNUSED,
+        RTLX_STATE_UNUSED = 0,
        RTLX_STATE_INITIALISED,
        RTLX_STATE_REMOTE_READY,
        RTLX_STATE_OPENED
 };
-#define RTLX_BUFFER_SIZE 1024
+#define RTLX_BUFFER_SIZE 2048
 /* each channel supports read and write.
   linux (vpe0) reads lx_buffer  and writes rt_buffer
diff --git a/include/asm-mn10300/ipcbuf.h b/include/asm-mn10300/ipcbuf.h
index efbbef8d1c69..f6f63d448272 100644
--- a/include/asm-mn10300/ipcbuf.h
+++ b/include/asm-mn10300/ipcbuf.h
@@ -1,4 +1,4 @@
-#ifndef _ASM_IPCBUF_H_
+#ifndef _ASM_IPCBUF_H
 #define _ASM_IPCBUF_H
 /*
diff --git a/include/asm-parisc/assembly.h b/include/asm-parisc/assembly.h
index 5587f0023881..ffb208840ecc 100644
--- a/include/asm-parisc/assembly.h
+++ b/include/asm-parisc/assembly.h
@@ -31,9 +31,8 @@
 #define STREGM  std,ma
 #define SHRREG  shrd
 #define SHLREG  shld
-#define ADDIB   addib,*
-#define CMPB    cmpb,*
 #define ANDCM   andcm,*
+#define COND(x) * ## x
 #define RP_OFFSET       16
 #define FRAME_SIZE      128
 #define CALLEE_REG_FRAME_SIZE   144
@@ -46,9 +45,8 @@
 #define STREGM  stwm
 #define SHRREG  shr
 #define SHLREG  shlw
-#define ADDIB   addib,
-#define CMPB    cmpb,
 #define ANDCM   andcm
+#define COND(x) x
 #define RP_OFFSET       20
 #define FRAME_SIZE      64
 #define CALLEE_REG_FRAME_SIZE   128
diff --git a/include/asm-parisc/checksum.h b/include/asm-parisc/checksum.h
index cc3ec1bd8919..e9639ccc3fce 100644
--- a/include/asm-parisc/checksum.h
+++ b/include/asm-parisc/checksum.h
@@ -65,7 +65,7 @@ static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl)
 "2:\n"
        : "=r" (sum), "=r" (iph), "=r" (ihl)
        : "1" (iph), "2" (ihl)
-        : "r19", "r20", "r21" );
+        : "r19", "r20", "r21", "memory");
        return (__force __sum16)sum;
 }
diff --git a/include/asm-parisc/ioctl.h b/include/asm-parisc/ioctl.h
index 68338d2bda4e..ec8efa02beda 100644
--- a/include/asm-parisc/ioctl.h
+++ b/include/asm-parisc/ioctl.h
@@ -32,21 +32,6 @@
 * NOTE: This limits the max parameter size to 16kB -1 !
 */
-#define _IOC_NRBITS     8
-#define _IOC_TYPEBITS   8
-#define _IOC_SIZEBITS   14
-#define _IOC_DIRBITS    2
-#define _IOC_NRMASK     ((1 << _IOC_NRBITS)-1)
-#define _IOC_TYPEMASK   ((1 << _IOC_TYPEBITS)-1)
-#define _IOC_SIZEMASK   ((1 << _IOC_SIZEBITS)-1)
-#define _IOC_DIRMASK    ((1 << _IOC_DIRBITS)-1)
-#define _IOC_NRSHIFT    0
-#define _IOC_TYPESHIFT  (_IOC_NRSHIFT+_IOC_NRBITS)
-#define _IOC_SIZESHIFT  (_IOC_TYPESHIFT+_IOC_TYPEBITS)
-#define _IOC_DIRSHIFT   (_IOC_SIZESHIFT+_IOC_SIZEBITS)
 /*
 * Direction bits.
 */
@@ -54,40 +39,6 @@
 #define _IOC_WRITE      2U
 #define _IOC_READ       1U
-#define _IOC(dir,type,nr,size) \
+#include <asm-generic/ioctl.h>
-        (((dir)  << _IOC_DIRSHIFT) | \
-         ((type) << _IOC_TYPESHIFT) | \
-         ((nr)   << _IOC_NRSHIFT) | \
-         ((size) << _IOC_SIZESHIFT))
-/* provoke compile error for invalid uses of size argument */
-extern unsigned int __invalid_size_argument_for_IOC;
-#define _IOC_TYPECHECK(t) \
-        ((sizeof(t) == sizeof(t[1]) && \
-          sizeof(t) < (1 << _IOC_SIZEBITS)) ? \
-          sizeof(t) : __invalid_size_argument_for_IOC)
-/* used to create numbers */
-#define _IO(type,nr)            _IOC(_IOC_NONE,(type),(nr),0)
-#define _IOR(type,nr,size)      _IOC(_IOC_READ,(type),(nr),(_IOC_TYPECHECK(size)))
-#define _IOW(type,nr,size)      _IOC(_IOC_WRITE,(type),(nr),(_IOC_TYPECHECK(size)))
-#define _IOWR(type,nr,size)     _IOC(_IOC_READ|_IOC_WRITE,(type),(nr),(_IOC_TYPECHECK(size)))
-#define _IOR_BAD(type,nr,size)  _IOC(_IOC_READ,(type),(nr),sizeof(size))
-#define _IOW_BAD(type,nr,size)  _IOC(_IOC_WRITE,(type),(nr),sizeof(size))
-#define _IOWR_BAD(type,nr,size) _IOC(_IOC_READ|_IOC_WRITE,(type),(nr),sizeof(size))
-/* used to decode ioctl numbers.. */
-#define _IOC_DIR(nr)            (((nr) >> _IOC_DIRSHIFT) & _IOC_DIRMASK)
-#define _IOC_TYPE(nr)           (((nr) >> _IOC_TYPESHIFT) & _IOC_TYPEMASK)
-#define _IOC_NR(nr)             (((nr) >> _IOC_NRSHIFT) & _IOC_NRMASK)
-#define _IOC_SIZE(nr)           (((nr) >> _IOC_SIZESHIFT) & _IOC_SIZEMASK)
-/* ...and for the drivers/sound files... */
-#define IOC_IN          (_IOC_WRITE << _IOC_DIRSHIFT)
-#define IOC_OUT         (_IOC_READ << _IOC_DIRSHIFT)
-#define IOC_INOUT       ((_IOC_WRITE|_IOC_READ) << _IOC_DIRSHIFT)
-#define IOCSIZE_MASK    (_IOC_SIZEMASK << _IOC_SIZESHIFT)
-#define IOCSIZE_SHIFT   (_IOC_SIZESHIFT)
 #endif /* _ASM_PARISC_IOCTL_H */
diff --git a/include/asm-parisc/ioctls.h b/include/asm-parisc/ioctls.h
index ee84e4172c36..6747fad07a3e 100644
--- a/include/asm-parisc/ioctls.h
+++ b/include/asm-parisc/ioctls.h
@@ -46,6 +46,10 @@
 #define TIOCSBRK        0x5427  /* BSD compatibility */
 #define TIOCCBRK        0x5428  /* BSD compatibility */
 #define TIOCGSID        _IOR('T', 20, int) /* Return the session ID of FD */
+#define TCGETS2         _IOR('T',0x2A, struct termios2)
+#define TCSETS2         _IOW('T',0x2B, struct termios2)
+#define TCSETSW2        _IOW('T',0x2C, struct termios2)
+#define TCSETSF2        _IOW('T',0x2D, struct termios2)
 #define TIOCGPTN        _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */
 #define TIOCSPTLCK      _IOW('T',0x31, int)  /* Lock/unlock Pty */
diff --git a/include/asm-parisc/termbits.h b/include/asm-parisc/termbits.h
index e847fe979684..d8bbc73b16b7 100644
--- a/include/asm-parisc/termbits.h
+++ b/include/asm-parisc/termbits.h
@@ -141,6 +141,7 @@ struct ktermios {
 #define HUPCL   0002000
 #define CLOCAL  0004000
 #define CBAUDEX 0010000
+#define    BOTHER 0010000
 #define    B57600 0010001
 #define   B115200 0010002
 #define   B230400 0010003
@@ -156,10 +157,12 @@ struct ktermios {
 #define  B3000000 0010015
 #define  B3500000 0010016
 #define  B4000000 0010017
-#define CIBAUD    002003600000  /* input baud rate (not used) */
+#define CIBAUD    002003600000          /* input baud rate */
 #define CMSPAR    010000000000          /* mark or space (stick) parity */
 #define CRTSCTS   020000000000          /* flow control */
+#define IBSHIFT 16              /* Shift from CBAUD to CIBAUD */
 /* c_lflag bits */
 #define ISIG    0000001
diff --git a/include/asm-parisc/termios.h b/include/asm-parisc/termios.h
index 5345b3420475..a2a57a4548af 100644
--- a/include/asm-parisc/termios.h
+++ b/include/asm-parisc/termios.h
@@ -80,8 +80,10 @@ struct termio {
        copy_to_user((termio)->c_cc, (termios)->c_cc, NCC); \
 })
-#define user_termios_to_kernel_termios(k, u) copy_from_user(k, u, sizeof(struct termios))
+#define user_termios_to_kernel_termios(k, u) copy_from_user(k, u, sizeof(struct termios2))
-#define kernel_termios_to_user_termios(u, k) copy_to_user(u, k, sizeof(struct termios))
+#define kernel_termios_to_user_termios(u, k) copy_to_user(u, k, sizeof(struct termios2))
+#define user_termios_to_kernel_termios_1(k, u) copy_from_user(k, u, sizeof(struct termios))
+#define kernel_termios_to_user_termios_1(u, k) copy_to_user(u, k, sizeof(struct termios))
 #endif  /* __KERNEL__ */
diff --git a/include/asm-powerpc/io.h b/include/asm-powerpc/io.h
index e0062d73db1c..89189488e286 100644
--- a/include/asm-powerpc/io.h
+++ b/include/asm-powerpc/io.h
@@ -100,7 +100,7 @@ static inline type name(const volatile type __iomem *addr)		\
 {                                                                       \
        type ret;                                                       \
        __asm__ __volatile__("sync;" insn ";twi 0,%0,0;isync"           \
-                : "=r" (ret) : "r" (addr), "m" (*addr));                \
+                : "=r" (ret) : "r" (addr), "m" (*addr) : "memory");     \
        return ret;                                                     \
 }
@@ -108,8 +108,8 @@ static inline type name(const volatile type __iomem *addr)		\
 static inline void name(volatile type __iomem *addr, type val)          \
 {                                                                       \
        __asm__ __volatile__("sync;" insn                               \
-                : "=m" (*addr) : "r" (val), "r" (addr));                \
+                : "=m" (*addr) : "r" (val), "r" (addr) : "memory");     \
-        IO_SET_SYNC_FLAG();                                     \
+        IO_SET_SYNC_FLAG();                                             \
 }
@@ -333,7 +333,8 @@ static inline unsigned int name(unsigned int port)	\
                "       .long   3b,5b\n"                \
                ".previous"                             \
                : "=&r" (x)                             \
-                : "r" (port + _IO_BASE));               \
+                : "r" (port + _IO_BASE)                 \
+                : "memory");                            \
        return x;                                       \
 }
@@ -350,7 +351,8 @@ static inline void name(unsigned int val, unsigned int port) \
                "       .long   0b,2b\n"                \
                "       .long   1b,2b\n"                \
                ".previous"                             \
-                : : "r" (val), "r" (port + _IO_BASE));  \
+                : : "r" (val), "r" (port + _IO_BASE)    \
+                : "memory");                            \
 }
 __do_in_asm(_rec_inb, "lbzx")
diff --git a/include/asm-powerpc/kvm_ppc.h b/include/asm-powerpc/kvm_ppc.h
index b35a7e3ef978..5a21115228af 100644
--- a/include/asm-powerpc/kvm_ppc.h
+++ b/include/asm-powerpc/kvm_ppc.h
@@ -57,6 +57,7 @@ extern int kvmppc_handle_store(struct kvm_run *run, struct kvm_vcpu *vcpu,
 extern int kvmppc_emulate_instruction(struct kvm_run *run,
                                      struct kvm_vcpu *vcpu);
+extern int kvmppc_emulate_mmio(struct kvm_run *run, struct kvm_vcpu *vcpu);
 extern void kvmppc_mmu_map(struct kvm_vcpu *vcpu, u64 gvaddr, gfn_t gfn,
                           u64 asid, u32 flags);
diff --git a/include/asm-powerpc/mmu-hash64.h b/include/asm-powerpc/mmu-hash64.h
index 0dff76776044..39c5c5f62bf5 100644
--- a/include/asm-powerpc/mmu-hash64.h
+++ b/include/asm-powerpc/mmu-hash64.h
@@ -177,6 +177,7 @@ extern struct mmu_psize_def mmu_psize_defs[MMU_PAGE_COUNT];
 extern int mmu_linear_psize;
 extern int mmu_virtual_psize;
 extern int mmu_vmalloc_psize;
+extern int mmu_vmemmap_psize;
 extern int mmu_io_psize;
 extern int mmu_kernel_ssize;
 extern int mmu_highuser_ssize;
diff --git a/include/asm-powerpc/mpic.h b/include/asm-powerpc/mpic.h
index 943c5a3fac8a..a4d0f876b427 100644
--- a/include/asm-powerpc/mpic.h
+++ b/include/asm-powerpc/mpic.h
@@ -428,12 +428,11 @@ extern void mpic_init(struct mpic *mpic);
 */
-/* Change/Read the priority of an interrupt. Default is 8 for irqs and
+/* Change the priority of an interrupt. Default is 8 for irqs and
 * 10 for IPIs. You can call this on both IPIs and IRQ numbers, but the
 * IPI number is then the offset'ed (linux irq number mapped to the IPI)
 */
 extern void mpic_irq_set_priority(unsigned int irq, unsigned int pri);
-extern unsigned int mpic_irq_get_priority(unsigned int irq);
 /* Setup a non-boot CPU */
 extern void mpic_setup_this_cpu(void);
diff --git a/include/asm-powerpc/pgtable-ppc64.h b/include/asm-powerpc/pgtable-ppc64.h
index 27f18695f7d6..cc6a43ba41d0 100644
--- a/include/asm-powerpc/pgtable-ppc64.h
+++ b/include/asm-powerpc/pgtable-ppc64.h
@@ -65,15 +65,15 @@
 #define VMALLOC_REGION_ID       (REGION_ID(VMALLOC_START))
 #define KERNEL_REGION_ID        (REGION_ID(PAGE_OFFSET))
+#define VMEMMAP_REGION_ID       (0xfUL)
 #define USER_REGION_ID          (0UL)
 /*
- * Defines the address of the vmemap area, in the top 16th of the
+ * Defines the address of the vmemap area, in its own region
- * kernel region.
 */
-#define VMEMMAP_BASE (ASM_CONST(CONFIG_KERNEL_START) + \
+#define VMEMMAP_BASE            (VMEMMAP_REGION_ID << REGION_SHIFT)
-                                        (0xfUL << (REGION_SHIFT - 4)))
+#define vmemmap                 ((struct page *)VMEMMAP_BASE)
-#define vmemmap ((struct page *)VMEMMAP_BASE)
 /*
 * Common bits in a linux-style PTE.  These match the bits in the
diff --git a/include/asm-powerpc/uaccess.h b/include/asm-powerpc/uaccess.h
index 8e798e3758bc..1a0736f8803f 100644
--- a/include/asm-powerpc/uaccess.h
+++ b/include/asm-powerpc/uaccess.h
@@ -380,7 +380,7 @@ static inline unsigned long __copy_from_user_inatomic(void *to,
                const void __user *from, unsigned long n)
 {
        if (__builtin_constant_p(n) && (n <= 8)) {
-                unsigned long ret;
+                unsigned long ret = 1;
                switch (n) {
                case 1:
@@ -406,7 +406,7 @@ static inline unsigned long __copy_to_user_inatomic(void __user *to,
                const void *from, unsigned long n)
 {
        if (__builtin_constant_p(n) && (n <= 8)) {
-                unsigned long ret;
+                unsigned long ret = 1;
                switch (n) {
                case 1:
diff --git a/include/asm-ppc/system.h b/include/asm-ppc/system.h
index 0593cb889d45..70ebd333c55b 100644
--- a/include/asm-ppc/system.h
+++ b/include/asm-ppc/system.h
@@ -178,7 +178,7 @@ static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size
 }
-extern inline void * xchg_ptr(void * m, void * val)
+static inline void * xchg_ptr(void * m, void * val)
 {
        return (void *) xchg_u32(m, (unsigned long) val);
 }
diff --git a/include/asm-s390/debug.h b/include/asm-s390/debug.h
index 335baf4fc64f..9450ce6e32de 100644
--- a/include/asm-s390/debug.h
+++ b/include/asm-s390/debug.h
@@ -120,10 +120,10 @@ debug_entry_t* debug_exception_common(debug_info_t* id, int level,
 /* Debug Feature API: */
-debug_info_t* debug_register(char* name, int pages, int nr_areas,
+debug_info_t *debug_register(const char *name, int pages, int nr_areas,
                             int buf_size);
-debug_info_t *debug_register_mode(char *name, int pages, int nr_areas,
+debug_info_t *debug_register_mode(const char *name, int pages, int nr_areas,
                                  int buf_size, mode_t mode, uid_t uid,
                                  gid_t gid);
diff --git a/include/asm-s390/system.h b/include/asm-s390/system.h
index e0d4500d5f95..819e7d99ca0c 100644
--- a/include/asm-s390/system.h
+++ b/include/asm-s390/system.h
@@ -315,14 +315,14 @@ __cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size)
        asm volatile(                                           \
                "       lctlg   %1,%2,0(%0)\n"                  \
                : : "a" (&array), "i" (low), "i" (high),        \
-                    "m" (*(addrtype *)(array)));                \
+                    "m" (*(addrtype *)(&array)));               \
        })
 #define __ctl_store(array, low, high) ({                        \
        typedef struct { char _[sizeof(array)]; } addrtype;     \
        asm volatile(                                           \
                "       stctg   %2,%3,0(%1)\n"                  \
-                : "=m" (*(addrtype *)(array))                   \
+                : "=m" (*(addrtype *)(&array))                  \
                : "a" (&array), "i" (low), "i" (high));         \
        })
@@ -333,14 +333,14 @@ __cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size)
        asm volatile(                                           \
                "       lctl    %1,%2,0(%0)\n"                  \
                : : "a" (&array), "i" (low), "i" (high),        \
-                    "m" (*(addrtype *)(array)));                \
+                    "m" (*(addrtype *)(&array)));               \
 })
 #define __ctl_store(array, low, high) ({                        \
        typedef struct { char _[sizeof(array)]; } addrtype;     \
        asm volatile(                                           \
                "       stctl   %2,%3,0(%1)\n"                  \
-                : "=m" (*(addrtype *)(array))                   \
+                : "=m" (*(addrtype *)(&array))                  \
                : "a" (&array), "i" (low), "i" (high));         \
        })
diff --git a/include/asm-s390/types.h b/include/asm-s390/types.h
index 78dda038dd47..41c547656130 100644
--- a/include/asm-s390/types.h
+++ b/include/asm-s390/types.h
@@ -10,9 +10,9 @@
 #define _S390_TYPES_H
 #ifndef __s390x__
-# include <asm-generic/int-l64.h>
-#else
 # include <asm-generic/int-ll64.h>
+#else
+# include <asm-generic/int-l64.h>
 #endif
 #ifndef __ASSEMBLY__
@@ -40,7 +40,13 @@ typedef __signed__ long saddr_t;
 #ifndef __ASSEMBLY__
+typedef u64 dma64_addr_t;
+#ifdef __s390x__
+/* DMA addresses come in 32-bit and 64-bit flavours. */
+typedef u64 dma_addr_t;
+#else
 typedef u32 dma_addr_t;
+#endif
 #ifndef __s390x__
 typedef union {
diff --git a/include/asm-sh/checksum_32.h b/include/asm-sh/checksum_32.h
index 4bc8357e8892..14b7ac2f0a07 100644
--- a/include/asm-sh/checksum_32.h
+++ b/include/asm-sh/checksum_32.h
@@ -109,7 +109,7 @@ static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl)
           will assume they contain their original values. */
        : "=r" (sum), "=r" (iph), "=r" (ihl), "=&r" (__dummy0), "=&z" (__dummy1)
        : "1" (iph), "2" (ihl)
-        : "t");
+        : "t", "memory");
        return  csum_fold(sum);
 }
diff --git a/include/asm-sh/kgdb.h b/include/asm-sh/kgdb.h
index 4bc8cb187d11..24e42078f36f 100644
--- a/include/asm-sh/kgdb.h
+++ b/include/asm-sh/kgdb.h
@@ -66,18 +66,4 @@ extern int     setjmp(jmp_buf __jmpb);
 /* Forced breakpoint */
 #define breakpoint()    __asm__ __volatile__("trapa   #0x3c")
-/* Taken from sh-stub.c of GDB 4.18 */
-static const char hexchars[] = "0123456789abcdef";
-/* Get high hex bits */
-static inline char highhex(const int x)
-{
-        return hexchars[(x >> 4) & 0xf];
-}
-/* Get low hex bits */
-static inline char lowhex(const int x)
-{
-        return hexchars[x & 0xf];
-}
 #endif
diff --git a/include/asm-sparc/asi.h b/include/asm-sparc/asi.h
index 58c3754da926..158f9b00d43f 100644
--- a/include/asm-sparc/asi.h
+++ b/include/asm-sparc/asi.h
@@ -1,4 +1,3 @@
-/* $Id: asi.h,v 1.18 1998/03/09 14:04:46 jj Exp $ */
 #ifndef _SPARC_ASI_H
 #define _SPARC_ASI_H
diff --git a/include/asm-sparc/auxio.h b/include/asm-sparc/auxio.h
index ee83aefb20dc..e552b8d68450 100644
--- a/include/asm-sparc/auxio.h
+++ b/include/asm-sparc/auxio.h
@@ -1,4 +1,4 @@
-/* $Id: auxio.h,v 1.18 1997/11/07 15:01:45 jj Exp $
+/*
 * auxio.h:  Definitions and code for the Auxiliary I/O register.
 *
 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
diff --git a/include/asm-sparc/bitops.h b/include/asm-sparc/bitops.h
index cb3cefab6e09..68b98a7e6454 100644
--- a/include/asm-sparc/bitops.h
+++ b/include/asm-sparc/bitops.h
@@ -1,4 +1,4 @@
-/* $Id: bitops.h,v 1.67 2001/11/19 18:36:34 davem Exp $
+/*
 * bitops.h: Bit string operations on the Sparc.
 *
 * Copyright 1995 David S. Miller (davem@caip.rutgers.edu)
diff --git a/include/asm-sparc/btfixup.h b/include/asm-sparc/btfixup.h
index c2868d0f60b6..08277e6fb4cd 100644
--- a/include/asm-sparc/btfixup.h
+++ b/include/asm-sparc/btfixup.h
@@ -1,4 +1,4 @@
-/* $Id: btfixup.h,v 1.4 1998/03/09 14:04:43 jj Exp $
+/*
 *  asm-sparc/btfixup.h:    Macros for boot time linking.
 *
 *  Copyright (C) 1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
diff --git a/include/asm-sparc/checksum.h b/include/asm-sparc/checksum.h
index 34518ea7bf1b..d044ddb5a3cf 100644
--- a/include/asm-sparc/checksum.h
+++ b/include/asm-sparc/checksum.h
@@ -1,4 +1,3 @@
-/* $Id: checksum.h,v 1.33 2002/02/01 22:01:05 davem Exp $ */
 #ifndef __SPARC_CHECKSUM_H
 #define __SPARC_CHECKSUM_H
diff --git a/include/asm-sparc/clock.h b/include/asm-sparc/clock.h
index e708e6b50d2b..2cf99dadec56 100644
--- a/include/asm-sparc/clock.h
+++ b/include/asm-sparc/clock.h
@@ -1,4 +1,4 @@
-/* $Id: clock.h,v 1.3 1995/11/25 02:31:25 davem Exp $
+/*
 * clock.h:  Definitions for clock operations on the Sparc.
 *
 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
diff --git a/include/asm-sparc/contregs.h b/include/asm-sparc/contregs.h
index 0e05afe02d44..48fa8a4ef357 100644
--- a/include/asm-sparc/contregs.h
+++ b/include/asm-sparc/contregs.h
@@ -1,4 +1,3 @@
-/* $Id: contregs.h,v 1.8 2000/12/28 22:49:11 davem Exp $ */
 #ifndef _SPARC_CONTREGS_H
 #define _SPARC_CONTREGS_H
diff --git a/include/asm-sparc/cypress.h b/include/asm-sparc/cypress.h
index 99599533efbc..95e9772ea394 100644
--- a/include/asm-sparc/cypress.h
+++ b/include/asm-sparc/cypress.h
@@ -1,4 +1,4 @@
-/* $Id: cypress.h,v 1.6 1996/08/29 09:48:09 davem Exp $
+/*
 * cypress.h: Cypress module specific definitions and defines.
 *
 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
diff --git a/include/asm-sparc/delay.h b/include/asm-sparc/delay.h
index 48aa70eef997..bc9aba2bead6 100644
--- a/include/asm-sparc/delay.h
+++ b/include/asm-sparc/delay.h
@@ -1,4 +1,4 @@
-/* $Id: delay.h,v 1.11 2001/01/01 01:46:15 davem Exp $
+/*
 * delay.h: Linux delay routines on the Sparc.
 *
 * Copyright (C) 1994 David S. Miller (davem@caip.rutgers.edu).
diff --git a/include/asm-sparc/ebus.h b/include/asm-sparc/ebus.h
index 54652887c127..491f85d662df 100644
--- a/include/asm-sparc/ebus.h
+++ b/include/asm-sparc/ebus.h
@@ -1,4 +1,4 @@
-/* $Id: ebus.h,v 1.2 1999/09/11 23:05:55 zaitcev Exp $
+/*
 * ebus.h: PCI to Ebus pseudo driver software state.
 *
 * Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be) 
diff --git a/include/asm-sparc/ecc.h b/include/asm-sparc/ecc.h
index 8e27ceccb76d..ccb84b66fef1 100644
--- a/include/asm-sparc/ecc.h
+++ b/include/asm-sparc/ecc.h
@@ -1,4 +1,4 @@
-/* $Id: ecc.h,v 1.3 1996/04/25 06:12:57 davem Exp $
+/*
 * ecc.h: Definitions and defines for the external cache/memory
 *        controller on the sun4m.
 *
diff --git a/include/asm-sparc/eeprom.h b/include/asm-sparc/eeprom.h
index a8ff7496ddf5..e17beeceb405 100644
--- a/include/asm-sparc/eeprom.h
+++ b/include/asm-sparc/eeprom.h
@@ -1,4 +1,4 @@
-/* $Id: eeprom.h,v 1.3 1995/11/25 02:31:38 davem Exp $
+/*
 * eeprom.h:  Definitions for the Sun eeprom.
 *
 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
diff --git a/include/asm-sparc/elf.h b/include/asm-sparc/elf.h
index d2516eed3a38..d043f80bc2fd 100644
--- a/include/asm-sparc/elf.h
+++ b/include/asm-sparc/elf.h
@@ -1,4 +1,3 @@
-/* $Id: elf.h,v 1.22 2000/07/12 01:27:08 davem Exp $ */
 #ifndef __ASMSPARC_ELF_H
 #define __ASMSPARC_ELF_H
diff --git a/include/asm-sparc/fcntl.h b/include/asm-sparc/fcntl.h
index 5ec546349fc8..07bd2d80257f 100644
--- a/include/asm-sparc/fcntl.h
+++ b/include/asm-sparc/fcntl.h
@@ -1,4 +1,3 @@
-/* $Id: fcntl.h,v 1.16 2001/09/20 00:35:33 davem Exp $ */
 #ifndef _SPARC_FCNTL_H
 #define _SPARC_FCNTL_H
diff --git a/include/asm-sparc/head.h b/include/asm-sparc/head.h
index e6532c3e09c9..7c35491a8b53 100644
--- a/include/asm-sparc/head.h
+++ b/include/asm-sparc/head.h
@@ -1,4 +1,3 @@
-/* $Id: head.h,v 1.39 2000/05/26 22:18:45 ecd Exp $ */
 #ifndef __SPARC_HEAD_H
 #define __SPARC_HEAD_H
diff --git a/include/asm-sparc/idprom.h b/include/asm-sparc/idprom.h
index 59083ed85232..41adb417a4e5 100644
--- a/include/asm-sparc/idprom.h
+++ b/include/asm-sparc/idprom.h
@@ -1,4 +1,4 @@
-/* $Id: idprom.h,v 1.6 1996/08/04 10:35:07 ecd Exp $
+/*
 * idprom.h: Macros and defines for idprom routines
 *
 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
diff --git a/include/asm-sparc/io.h b/include/asm-sparc/io.h
index 243bf8e9a058..3a3e7bdb06b3 100644
--- a/include/asm-sparc/io.h
+++ b/include/asm-sparc/io.h
@@ -1,6 +1,3 @@
-/*
- * $Id: io.h,v 1.30 2001/12/21 01:23:21 davem Exp $
- */
 #ifndef __SPARC_IO_H
 #define __SPARC_IO_H
diff --git a/include/asm-sparc/ioctl.h b/include/asm-sparc/ioctl.h
index e6fc4de19940..7d6bd51321b9 100644
--- a/include/asm-sparc/ioctl.h
+++ b/include/asm-sparc/ioctl.h
@@ -1,4 +1,3 @@
-/* $Id: ioctl.h,v 1.6 1999/12/01 23:58:36 davem Exp $ */
 #ifndef _SPARC_IOCTL_H
 #define _SPARC_IOCTL_H
diff --git a/include/asm-sparc/kdebug.h b/include/asm-sparc/kdebug.h
index 631f15ffef73..f69fe7d84b3c 100644
--- a/include/asm-sparc/kdebug.h
+++ b/include/asm-sparc/kdebug.h
@@ -1,4 +1,4 @@
-/* $Id: kdebug.h,v 1.11 2000/06/04 06:23:53 anton Exp $
+/*
 * kdebug.h:  Defines and definitions for debugging the Linux kernel
 *            under various kernel debuggers.
 *
diff --git a/include/asm-sparc/machines.h b/include/asm-sparc/machines.h
index d831350f5428..d6c6bf836206 100644
--- a/include/asm-sparc/machines.h
+++ b/include/asm-sparc/machines.h
@@ -1,4 +1,4 @@
-/* $Id: machines.h,v 1.4 1995/11/25 02:31:58 davem Exp $
+/*
 * machines.h:  Defines for taking apart the machine type value in the
 *              idprom and determining the kind of machine we are on.
 *
diff --git a/include/asm-sparc/mbus.h b/include/asm-sparc/mbus.h
index ecacdf4075d7..bb5ae614b166 100644
--- a/include/asm-sparc/mbus.h
+++ b/include/asm-sparc/mbus.h
@@ -1,4 +1,4 @@
-/* $Id: mbus.h,v 1.9 1997/06/24 15:48:12 jj Exp $
+/*
 * mbus.h:  Various defines for MBUS modules.
 *
 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
diff --git a/include/asm-sparc/memreg.h b/include/asm-sparc/memreg.h
index 5fb95c828da6..845ad2b39183 100644
--- a/include/asm-sparc/memreg.h
+++ b/include/asm-sparc/memreg.h
@@ -1,4 +1,3 @@
-/* $Id: memreg.h,v 1.8 1996/08/29 09:48:23 davem Exp $ */
 #ifndef _SPARC_MEMREG_H
 #define _SPARC_MEMREG_H
 /* memreg.h:  Definitions of the values found in the synchronous
diff --git a/include/asm-sparc/mman.h b/include/asm-sparc/mman.h
index e18be984c01d..fdfbbf0a4736 100644
--- a/include/asm-sparc/mman.h
+++ b/include/asm-sparc/mman.h
@@ -1,4 +1,3 @@
-/* $Id: mman.h,v 1.9 2000/03/15 02:44:23 davem Exp $ */
 #ifndef __SPARC_MMAN_H__
 #define __SPARC_MMAN_H__
@@ -24,9 +23,8 @@
 #ifdef __KERNEL__
 #ifndef __ASSEMBLY__
-#define arch_mmap_check sparc_mmap_check
+#define arch_mmap_check(addr,len,flags) sparc_mmap_check(addr,len)
-int sparc_mmap_check(unsigned long addr, unsigned long len,
+int sparc_mmap_check(unsigned long addr, unsigned long len);
-                unsigned long flags);
 #endif
 #endif
diff --git a/include/asm-sparc/mostek.h b/include/asm-sparc/mostek.h
index 958d0513a6d4..29aad11b8f00 100644
--- a/include/asm-sparc/mostek.h
+++ b/include/asm-sparc/mostek.h
@@ -1,4 +1,4 @@
-/* $Id: mostek.h,v 1.13 2001/01/11 15:07:09 davem Exp $
+/*
 * mostek.h:  Describes the various Mostek time of day clock registers.
 *
 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
diff --git a/include/asm-sparc/mpmbox.h b/include/asm-sparc/mpmbox.h
index 0e1bc5801d8a..f8423039b242 100644
--- a/include/asm-sparc/mpmbox.h
+++ b/include/asm-sparc/mpmbox.h
@@ -1,4 +1,4 @@
-/* $Id: mpmbox.h,v 1.4 1996/04/25 06:13:19 davem Exp $
+/*
 * mpmbox.h:  Interface and defines for the OpenProm mailbox
 *               facilities for MP machines under Linux.
 *
diff --git a/include/asm-sparc/msi.h b/include/asm-sparc/msi.h
index ff72cbd946a4..724ca5667052 100644
--- a/include/asm-sparc/msi.h
+++ b/include/asm-sparc/msi.h
@@ -1,4 +1,4 @@
-/* $Id: msi.h,v 1.3 1996/08/29 09:48:25 davem Exp $
+/*
 * msi.h:  Defines specific to the MBus - Sbus - Interface.
 *
 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
diff --git a/include/asm-sparc/mxcc.h b/include/asm-sparc/mxcc.h
index 128fe9708135..c0517bd05bde 100644
--- a/include/asm-sparc/mxcc.h
+++ b/include/asm-sparc/mxcc.h
@@ -1,4 +1,4 @@
-/* $Id: mxcc.h,v 1.7 1997/04/20 14:11:46 ecd Exp $
+/*
 * mxcc.h:  Definitions of the Viking MXCC registers
 *
 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
diff --git a/include/asm-sparc/namei.h b/include/asm-sparc/namei.h
index 618344d89cc4..0646102fb020 100644
--- a/include/asm-sparc/namei.h
+++ b/include/asm-sparc/namei.h
@@ -1,4 +1,4 @@
-/* $Id: namei.h,v 1.16 2000/04/13 00:55:54 davem Exp $
+/*
 * linux/include/asm-sparc/namei.h
 *
 * Routines to handle famous /usr/gnemul/s*.
diff --git a/include/asm-sparc/obio.h b/include/asm-sparc/obio.h
index 47854a2a12cf..1a7544ceb574 100644
--- a/include/asm-sparc/obio.h
+++ b/include/asm-sparc/obio.h
@@ -1,4 +1,4 @@
-/* $Id: obio.h,v 1.4 1998/03/09 14:04:55 jj Exp $
+/*
 * obio.h:  Some useful locations in 0xFXXXXXXXX PA obio space on sun4d.
 *
 * Copyright (C) 1997 Jakub Jelinek <jj@sunsite.mff.cuni.cz>
diff --git a/include/asm-sparc/openprom.h b/include/asm-sparc/openprom.h
index 12929a20f536..ed4b6bc2b102 100644
--- a/include/asm-sparc/openprom.h
+++ b/include/asm-sparc/openprom.h
@@ -1,4 +1,3 @@
-/* $Id: openprom.h,v 1.24 2000/06/04 06:23:53 anton Exp $ */
 #ifndef __SPARC_OPENPROM_H
 #define __SPARC_OPENPROM_H
diff --git a/include/asm-sparc/oplib.h b/include/asm-sparc/oplib.h
index 7becc846544a..61c3ca6a8ac3 100644
--- a/include/asm-sparc/oplib.h
+++ b/include/asm-sparc/oplib.h
@@ -1,4 +1,4 @@
-/* $Id: oplib.h,v 1.23 2001/12/21 00:54:31 davem Exp $
+/*
 * oplib.h:  Describes the interface and available routines in the
 *           Linux Prom library.
 *
diff --git a/include/asm-sparc/page.h b/include/asm-sparc/page.h
index 1625a8c3e0d2..6aa9e4c910cf 100644
--- a/include/asm-sparc/page.h
+++ b/include/asm-sparc/page.h
@@ -1,4 +1,4 @@
-/* $Id: page.h,v 1.55 2000/10/30 21:01:41 davem Exp $
+/*
 * page.h:  Various defines and such for MMU operations on the Sparc for
 *          the Linux kernel.
 *
diff --git a/include/asm-sparc/param.h b/include/asm-sparc/param.h
index 86ba59af9d2c..9836d9a3cb9a 100644
--- a/include/asm-sparc/param.h
+++ b/include/asm-sparc/param.h
@@ -1,4 +1,3 @@
-/* $Id: param.h,v 1.4 2000/10/30 21:01:41 davem Exp $ */
 #ifndef _ASMSPARC_PARAM_H
 #define _ASMSPARC_PARAM_H
diff --git a/include/asm-sparc/pbm.h b/include/asm-sparc/pbm.h
index fedd9c6e875c..458a4916d14d 100644
--- a/include/asm-sparc/pbm.h
+++ b/include/asm-sparc/pbm.h
@@ -1,4 +1,4 @@
-/* $Id: pbm.h,v 1.3 1999/12/20 17:06:35 zaitcev Exp $
+/*
 *
 * pbm.h: PCI bus module pseudo driver software state
 *        Adopted from sparc64 by V. Roganov and G. Raiko
diff --git a/include/asm-sparc/pcic.h b/include/asm-sparc/pcic.h
index dedea14d87c8..f20ef562b265 100644
--- a/include/asm-sparc/pcic.h
+++ b/include/asm-sparc/pcic.h
@@ -1,4 +1,4 @@
-/* $Id: pcic.h,v 1.4 1999/11/17 07:34:20 zaitcev Exp $
+/*
 * pcic.h: JavaEngine 1 specific PCI definitions.
 *
 * Copyright (C) 1998 V. Roganov and G. Raiko
diff --git a/include/asm-sparc/pgalloc.h b/include/asm-sparc/pgalloc.h
index 6292cd00e5af..681582d26969 100644
--- a/include/asm-sparc/pgalloc.h
+++ b/include/asm-sparc/pgalloc.h
@@ -1,4 +1,3 @@
-/* $Id: pgalloc.h,v 1.16 2001/12/21 04:56:17 davem Exp $ */
 #ifndef _SPARC_PGALLOC_H
 #define _SPARC_PGALLOC_H
diff --git a/include/asm-sparc/pgtable.h b/include/asm-sparc/pgtable.h
index d84af6d95f5c..60512296b2ca 100644
--- a/include/asm-sparc/pgtable.h
+++ b/include/asm-sparc/pgtable.h
@@ -1,4 +1,3 @@
-/* $Id: pgtable.h,v 1.110 2001/12/21 04:56:17 davem Exp $ */
 #ifndef _SPARC_PGTABLE_H
 #define _SPARC_PGTABLE_H
diff --git a/include/asm-sparc/pgtsrmmu.h b/include/asm-sparc/pgtsrmmu.h
index edeb9811e728..808555fc1d58 100644
--- a/include/asm-sparc/pgtsrmmu.h
+++ b/include/asm-sparc/pgtsrmmu.h
@@ -1,4 +1,4 @@
-/* $Id: pgtsrmmu.h,v 1.31 2000/07/16 21:48:52 anton Exp $
+/*
 * pgtsrmmu.h:  SRMMU page table defines and code.
 *
 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
diff --git a/include/asm-sparc/pgtsun4.h b/include/asm-sparc/pgtsun4.h
index 60bda107f206..5a0d661fb82e 100644
--- a/include/asm-sparc/pgtsun4.h
+++ b/include/asm-sparc/pgtsun4.h
@@ -1,4 +1,4 @@
-/* $Id: pgtsun4.h,v 1.5 2000/06/05 06:08:46 anton Exp $
+/*
 * pgtsun4.h:  Sun4 specific pgtable.h defines and code.
 *
 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
diff --git a/include/asm-sparc/pgtsun4c.h b/include/asm-sparc/pgtsun4c.h
index f53b6dbc5fe3..aeb25e912179 100644
--- a/include/asm-sparc/pgtsun4c.h
+++ b/include/asm-sparc/pgtsun4c.h
@@ -1,4 +1,4 @@
-/* $Id: pgtsun4c.h,v 1.37 2000/06/05 06:08:46 anton Exp $
+/*
 * pgtsun4c.h:  Sun4c specific pgtable.h defines and code.
 *
 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
diff --git a/include/asm-sparc/psr.h b/include/asm-sparc/psr.h
index 213970477a24..b8c0e5f0a66b 100644
--- a/include/asm-sparc/psr.h
+++ b/include/asm-sparc/psr.h
@@ -1,4 +1,4 @@
-/* $Id: psr.h,v 1.15 1997/10/04 08:54:22 ecd Exp $
+/*
 * psr.h: This file holds the macros for masking off various parts of
 *        the processor status register on the Sparc. This is valid
 *        for Version 8. On the V9 this is renamed to the PSTATE
diff --git a/include/asm-sparc/ptrace.h b/include/asm-sparc/ptrace.h
index 6b5e6ce5043c..11f3bc2bb3f5 100644
--- a/include/asm-sparc/ptrace.h
+++ b/include/asm-sparc/ptrace.h
@@ -1,4 +1,3 @@
-/* $Id: ptrace.h,v 1.25 1997/03/04 16:27:25 jj Exp $ */
 #ifndef _SPARC_PTRACE_H
 #define _SPARC_PTRACE_H
@@ -10,6 +9,8 @@
 #ifndef __ASSEMBLY__
+#include <linux/types.h>
 struct pt_regs {
        unsigned long psr;
        unsigned long pc;
diff --git a/include/asm-sparc/resource.h b/include/asm-sparc/resource.h
index 0514c304e130..985948a41299 100644
--- a/include/asm-sparc/resource.h
+++ b/include/asm-sparc/resource.h
@@ -1,4 +1,4 @@
-/* $Id: resource.h,v 1.12 2000/09/23 02:09:21 davem Exp $
+/*
 * resource.h: Resource definitions.
 *
 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
diff --git a/include/asm-sparc/ross.h b/include/asm-sparc/ross.h
index f2c14b5080ed..ecb6e81786a6 100644
--- a/include/asm-sparc/ross.h
+++ b/include/asm-sparc/ross.h
@@ -1,4 +1,4 @@
-/* $Id: ross.h,v 1.13 1998/01/07 06:49:11 baccala Exp $
+/*
 * ross.h: Ross module specific definitions and defines.
 *
 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
diff --git a/include/asm-sparc/rtc.h b/include/asm-sparc/rtc.h
index f4f261dde699..f9ecb1fe2ecd 100644
--- a/include/asm-sparc/rtc.h
+++ b/include/asm-sparc/rtc.h
@@ -1,5 +1,4 @@
-/* $Id: rtc.h,v 1.2 1996/08/21 23:17:39 ecd Exp $
+/*
- *
 * rtc.h: Definitions for access to the Mostek real time clock
 *
 * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu)
diff --git a/include/asm-sparc/sbi.h b/include/asm-sparc/sbi.h
index 86a603ac7b20..5eb7f1965d33 100644
--- a/include/asm-sparc/sbi.h
+++ b/include/asm-sparc/sbi.h
@@ -1,4 +1,4 @@
-/* $Id: sbi.h,v 1.2 1998/03/09 14:04:48 jj Exp $
+/*
 * sbi.h:  SBI (Sbus Interface on sun4d) definitions
 *
 * Copyright (C) 1997 Jakub Jelinek <jj@sunsite.mff.cuni.cz>
diff --git a/include/asm-sparc/sbus.h b/include/asm-sparc/sbus.h
index 27d076c46964..f1d2fe1c9a30 100644
--- a/include/asm-sparc/sbus.h
+++ b/include/asm-sparc/sbus.h
@@ -1,4 +1,4 @@
-/* $Id: sbus.h,v 1.22 2000/02/18 13:50:50 davem Exp $
+/*
 * sbus.h:  Defines for the Sun SBus.
 *
 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
diff --git a/include/asm-sparc/scatterlist.h b/include/asm-sparc/scatterlist.h
index e08d3d775b08..c82609ca1d0f 100644
--- a/include/asm-sparc/scatterlist.h
+++ b/include/asm-sparc/scatterlist.h
@@ -1,4 +1,3 @@
-/* $Id: scatterlist.h,v 1.8 2001/12/17 07:05:15 davem Exp $ */
 #ifndef _SPARC_SCATTERLIST_H
 #define _SPARC_SCATTERLIST_H
diff --git a/include/asm-sparc/shmparam.h b/include/asm-sparc/shmparam.h
index bb93a6f74a38..59a1243c12f3 100644
--- a/include/asm-sparc/shmparam.h
+++ b/include/asm-sparc/shmparam.h
@@ -1,4 +1,3 @@
-/* $Id: shmparam.h,v 1.6 1999/12/09 10:32:41 davem Exp $ */
 #ifndef _ASMSPARC_SHMPARAM_H
 #define _ASMSPARC_SHMPARAM_H
diff --git a/include/asm-sparc/sigcontext.h b/include/asm-sparc/sigcontext.h
index 7fa2c7d01ab4..c5fb60dcbd75 100644
--- a/include/asm-sparc/sigcontext.h
+++ b/include/asm-sparc/sigcontext.h
@@ -1,4 +1,3 @@
-/* $Id: sigcontext.h,v 1.14 1999/09/06 08:22:05 jj Exp $ */
 #ifndef __SPARC_SIGCONTEXT_H
 #define __SPARC_SIGCONTEXT_H
diff --git a/include/asm-sparc/siginfo.h b/include/asm-sparc/siginfo.h
index 2c3ea8b22448..3c71af135c52 100644
--- a/include/asm-sparc/siginfo.h
+++ b/include/asm-sparc/siginfo.h
@@ -1,7 +1,3 @@
-/* $Id: siginfo.h,v 1.9 2002/02/08 03:57:18 davem Exp $
- * siginfo.c:
- */
 #ifndef _SPARC_SIGINFO_H
 #define _SPARC_SIGINFO_H
diff --git a/include/asm-sparc/signal.h b/include/asm-sparc/signal.h
index 94071c75701f..683657d6e685 100644
--- a/include/asm-sparc/signal.h
+++ b/include/asm-sparc/signal.h
@@ -1,4 +1,3 @@
-/* $Id: signal.h,v 1.35 1999/09/06 08:22:04 jj Exp $ */
 #ifndef _ASMSPARC_SIGNAL_H
 #define _ASMSPARC_SIGNAL_H
diff --git a/include/asm-sparc/smpprim.h b/include/asm-sparc/smpprim.h
index e7b6d346ae10..eb849d862c64 100644
--- a/include/asm-sparc/smpprim.h
+++ b/include/asm-sparc/smpprim.h
@@ -1,4 +1,4 @@
-/*  $Id: smpprim.h,v 1.5 1996/08/29 09:48:49 davem Exp $
+/*
 *  smpprim.h:  SMP locking primitives on the Sparc
 *
 *  God knows we won't be actually using this code for some time
diff --git a/include/asm-sparc/socket.h b/include/asm-sparc/socket.h
index a00e15df227c..bf50d0c2d583 100644
--- a/include/asm-sparc/socket.h
+++ b/include/asm-sparc/socket.h
@@ -1,4 +1,3 @@
-/* $Id: socket.h,v 1.17 2001/06/13 16:25:03 davem Exp $ */
 #ifndef _ASM_SOCKET_H
 #define _ASM_SOCKET_H
diff --git a/include/asm-sparc/stat.h b/include/asm-sparc/stat.h
index a5b4272f2894..2299e1d5d94c 100644
--- a/include/asm-sparc/stat.h
+++ b/include/asm-sparc/stat.h
@@ -1,4 +1,3 @@
-/* $Id: stat.h,v 1.12 2000/08/04 05:35:55 davem Exp $ */
 #ifndef _SPARC_STAT_H
 #define _SPARC_STAT_H
diff --git a/include/asm-sparc/statfs.h b/include/asm-sparc/statfs.h
index d623f144247d..304520fa8863 100644
--- a/include/asm-sparc/statfs.h
+++ b/include/asm-sparc/statfs.h
@@ -1,4 +1,3 @@
-/* $Id: statfs.h,v 1.4 1996/06/07 00:41:05 ecd Exp $ */
 #ifndef _SPARC_STATFS_H
 #define _SPARC_STATFS_H
diff --git a/include/asm-sparc/string.h b/include/asm-sparc/string.h
index cb1e923356c6..8d7c0dd4f299 100644
--- a/include/asm-sparc/string.h
+++ b/include/asm-sparc/string.h
@@ -1,4 +1,4 @@
-/* $Id: string.h,v 1.36 2001/12/21 00:54:31 davem Exp $
+/*
 * string.h: External definitions for optimized assembly string
 *           routines for the Linux Kernel.
 *
diff --git a/include/asm-sparc/sun4paddr.h b/include/asm-sparc/sun4paddr.h
index d863bfd5f09a..d52985f19f42 100644
--- a/include/asm-sparc/sun4paddr.h
+++ b/include/asm-sparc/sun4paddr.h
@@ -1,4 +1,4 @@
-/* $Id: sun4paddr.h,v 1.3 1998/07/28 16:53:27 jj Exp $
+/*
 * sun4paddr.h:  Various physical addresses on sun4 machines
 *
 * Copyright (C) 1997 Anton Blanchard (anton@progsoc.uts.edu.au)
diff --git a/include/asm-sparc/sunbpp.h b/include/asm-sparc/sunbpp.h
index 568db79b730d..92ee1a8ff3a2 100644
--- a/include/asm-sparc/sunbpp.h
+++ b/include/asm-sparc/sunbpp.h
@@ -1,4 +1,4 @@
-/* $Id: sunbpp.h,v 1.1 1999/08/08 14:09:49 shadow Exp $
+/*
 * include/asm-sparc/sunbpp.h
 */
diff --git a/include/asm-sparc/sysen.h b/include/asm-sparc/sysen.h
index 692fa6f2296a..6af34abde6e7 100644
--- a/include/asm-sparc/sysen.h
+++ b/include/asm-sparc/sysen.h
@@ -1,4 +1,4 @@
-/* $Id: sysen.h,v 1.3 1995/11/25 02:32:58 davem Exp $
+/*
 * sysen.h:  Bit fields within the "System Enable" register accessed via
 *           the ASI_CONTROL address space at address AC_SYSENABLE.
 *
diff --git a/include/asm-sparc/termios.h b/include/asm-sparc/termios.h
index 733d40504e1e..f7b4409c35ff 100644
--- a/include/asm-sparc/termios.h
+++ b/include/asm-sparc/termios.h
@@ -1,4 +1,3 @@
-/* $Id: termios.h,v 1.32 2001/06/01 08:12:11 davem Exp $ */
 #ifndef _SPARC_TERMIOS_H
 #define _SPARC_TERMIOS_H
diff --git a/include/asm-sparc/timer.h b/include/asm-sparc/timer.h
index cb1fa1d1f184..d909565f9410 100644
--- a/include/asm-sparc/timer.h
+++ b/include/asm-sparc/timer.h
@@ -1,4 +1,4 @@
-/* $Id: timer.h,v 1.21 1999/04/20 13:22:51 anton Exp $
+/*
 * timer.h:  Definitions for the timer chips on the Sparc.
 *
 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
diff --git a/include/asm-sparc/traps.h b/include/asm-sparc/traps.h
index f62c7f878ee1..bebdbf8f43a8 100644
--- a/include/asm-sparc/traps.h
+++ b/include/asm-sparc/traps.h
@@ -1,4 +1,4 @@
-/* $Id: traps.h,v 1.9 1998/03/09 14:04:53 jj Exp $
+/*
 * traps.h:  Format of entries for the Sparc trap table.
 *
 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
diff --git a/include/asm-sparc/tsunami.h b/include/asm-sparc/tsunami.h
index 887add5c466b..5bbd1d523baa 100644
--- a/include/asm-sparc/tsunami.h
+++ b/include/asm-sparc/tsunami.h
@@ -1,4 +1,4 @@
-/* $Id: tsunami.h,v 1.5 1996/08/29 09:49:03 davem Exp $
+/*
 * tsunami.h:  Module specific definitions for Tsunami V8 Sparcs
 *
 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
diff --git a/include/asm-sparc/turbosparc.h b/include/asm-sparc/turbosparc.h
index 31d2350a5818..17c73282db0a 100644
--- a/include/asm-sparc/turbosparc.h
+++ b/include/asm-sparc/turbosparc.h
@@ -1,4 +1,4 @@
-/* $Id: turbosparc.h,v 1.4 1998/08/16 16:02:42 ecd Exp $
+/*
 * turbosparc.h:  Defines specific to the TurboSparc module.
 *            This is SRMMU stuff.
 *
diff --git a/include/asm-sparc/types.h b/include/asm-sparc/types.h
index 1b08ef860a66..07734f942405 100644
--- a/include/asm-sparc/types.h
+++ b/include/asm-sparc/types.h
@@ -1,4 +1,3 @@
-/* $Id: types.h,v 1.13 2001/12/21 01:22:59 davem Exp $ */
 #ifndef _SPARC_TYPES_H
 #define _SPARC_TYPES_H
diff --git a/include/asm-sparc/uaccess.h b/include/asm-sparc/uaccess.h
index 366b11696ee3..47d5619d43fa 100644
--- a/include/asm-sparc/uaccess.h
+++ b/include/asm-sparc/uaccess.h
@@ -1,4 +1,4 @@
-/* $Id: uaccess.h,v 1.24 2001/10/30 04:32:24 davem Exp $
+/*
 * uaccess.h: User space memore access functions.
 *
 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
diff --git a/include/asm-sparc/vac-ops.h b/include/asm-sparc/vac-ops.h
index ab6f53b913ea..d10527611f11 100644
--- a/include/asm-sparc/vac-ops.h
+++ b/include/asm-sparc/vac-ops.h
@@ -1,4 +1,3 @@
-/* $Id: vac-ops.h,v 1.13 1998/01/30 10:59:59 jj Exp $ */
 #ifndef _SPARC_VAC_OPS_H
 #define _SPARC_VAC_OPS_H
diff --git a/include/asm-sparc/vaddrs.h b/include/asm-sparc/vaddrs.h
index 91097392c8cc..f6ca4779056c 100644
--- a/include/asm-sparc/vaddrs.h
+++ b/include/asm-sparc/vaddrs.h
@@ -1,4 +1,3 @@
-/* $Id: vaddrs.h,v 1.27 2001/07/04 00:18:18 davem Exp $ */
 #ifndef _SPARC_VADDRS_H
 #define _SPARC_VADDRS_H
diff --git a/include/asm-sparc/viking.h b/include/asm-sparc/viking.h
index 7541da71b9d6..989930aeb093 100644
--- a/include/asm-sparc/viking.h
+++ b/include/asm-sparc/viking.h
@@ -1,4 +1,4 @@
-/* $Id: viking.h,v 1.19 1997/04/20 14:11:48 ecd Exp $
+/*
 * viking.h:  Defines specific to the GNU/Viking MBUS module.
 *            This is SRMMU stuff.
 *
diff --git a/include/asm-sparc/winmacro.h b/include/asm-sparc/winmacro.h
index 096f3d3d90c3..5b0a06dc3bcb 100644
--- a/include/asm-sparc/winmacro.h
+++ b/include/asm-sparc/winmacro.h
@@ -1,4 +1,4 @@
-/* $Id: winmacro.h,v 1.22 2000/05/09 17:40:15 davem Exp $
+/*
 * winmacro.h: Window loading-unloading macros.
 *
 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
diff --git a/include/asm-sparc64/apb.h b/include/asm-sparc64/apb.h
index 80f0df289a66..8f3b57db810f 100644
--- a/include/asm-sparc64/apb.h
+++ b/include/asm-sparc64/apb.h
@@ -1,4 +1,4 @@
-/* $Id: apb.h,v 1.2 1998/04/01 20:41:49 ecd Exp $
+/*
 * apb.h: Advanced PCI Bridge Configuration Registers and Bits
 *
 * Copyright (C) 1998  Eddie C. Dost  (ecd@skynet.be)
diff --git a/include/asm-sparc64/asi.h b/include/asm-sparc64/asi.h
index 662a21107ae6..bc57c405e7d3 100644
--- a/include/asm-sparc64/asi.h
+++ b/include/asm-sparc64/asi.h
@@ -1,4 +1,3 @@
-/* $Id: asi.h,v 1.5 2001/03/29 11:47:47 davem Exp $ */
 #ifndef _SPARC64_ASI_H
 #define _SPARC64_ASI_H
diff --git a/include/asm-sparc64/auxio.h b/include/asm-sparc64/auxio.h
index 81a590a50a1f..c4100494c7a5 100644
--- a/include/asm-sparc64/auxio.h
+++ b/include/asm-sparc64/auxio.h
@@ -1,4 +1,4 @@
-/* $Id: auxio.h,v 1.3 2001/06/05 08:16:34 davem Exp $
+/*
 * auxio.h:  Definitions and code for the Auxiliary I/O registers.
 *
 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
diff --git a/include/asm-sparc64/bbc.h b/include/asm-sparc64/bbc.h
index 368fce4eedba..423a85800aae 100644
--- a/include/asm-sparc64/bbc.h
+++ b/include/asm-sparc64/bbc.h
@@ -1,4 +1,4 @@
-/* $Id: bbc.h,v 1.2 2001/03/26 23:47:18 davem Exp $
+/*
 * bbc.h: Defines for BootBus Controller found on UltraSPARC-III
 *        systems.
 *
diff --git a/include/asm-sparc64/bitops.h b/include/asm-sparc64/bitops.h
index 11f9d8146cdf..bb87b8080220 100644
--- a/include/asm-sparc64/bitops.h
+++ b/include/asm-sparc64/bitops.h
@@ -1,4 +1,4 @@
-/* $Id: bitops.h,v 1.39 2002/01/30 01:40:00 davem Exp $
+/*
 * bitops.h: Bit string operations on the V9.
 *
 * Copyright 1996, 1997 David S. Miller (davem@caip.rutgers.edu)
diff --git a/include/asm-sparc64/chafsr.h b/include/asm-sparc64/chafsr.h
index fd1688335ace..85c69b38220b 100644
--- a/include/asm-sparc64/chafsr.h
+++ b/include/asm-sparc64/chafsr.h
@@ -1,4 +1,3 @@
-/* $Id: chafsr.h,v 1.1 2001/03/28 10:56:34 davem Exp $ */
 #ifndef _SPARC64_CHAFSR_H
 #define _SPARC64_CHAFSR_H
diff --git a/include/asm-sparc64/checksum.h b/include/asm-sparc64/checksum.h
index 70a006da7634..b290564c8ce0 100644
--- a/include/asm-sparc64/checksum.h
+++ b/include/asm-sparc64/checksum.h
@@ -1,4 +1,3 @@
-/* $Id: checksum.h,v 1.19 2002/02/09 19:49:31 davem Exp $ */
 #ifndef __SPARC64_CHECKSUM_H
 #define __SPARC64_CHECKSUM_H
diff --git a/include/asm-sparc64/chmctrl.h b/include/asm-sparc64/chmctrl.h
index 53047f9f6423..859b4a4b0d30 100644
--- a/include/asm-sparc64/chmctrl.h
+++ b/include/asm-sparc64/chmctrl.h
@@ -1,4 +1,3 @@
-/* $Id: chmctrl.h,v 1.1 2001/03/29 11:43:28 davem Exp $ */
 #ifndef _SPARC64_CHMCTRL_H
 #define _SPARC64_CHMCTRL_H
diff --git a/include/asm-sparc64/dcr.h b/include/asm-sparc64/dcr.h
index e9a3f305815d..620c9ba642e9 100644
--- a/include/asm-sparc64/dcr.h
+++ b/include/asm-sparc64/dcr.h
@@ -1,4 +1,3 @@
-/* $Id: dcr.h,v 1.4 2001/03/09 17:56:37 davem Exp $ */
 #ifndef _SPARC64_DCR_H
 #define _SPARC64_DCR_H
diff --git a/include/asm-sparc64/display7seg.h b/include/asm-sparc64/display7seg.h
index 955a3502218e..c066a8964eab 100644
--- a/include/asm-sparc64/display7seg.h
+++ b/include/asm-sparc64/display7seg.h
@@ -1,4 +1,4 @@
-/* $Id: display7seg.h,v 1.2 2000/08/02 06:22:35 davem Exp $
+/*
 *
 * display7seg - Driver interface for the 7-segment display
 * present on Sun Microsystems CP1400 and CP1500
diff --git a/include/asm-sparc64/dma.h b/include/asm-sparc64/dma.h
index a9fd06183972..9d4c024bd3b3 100644
--- a/include/asm-sparc64/dma.h
+++ b/include/asm-sparc64/dma.h
@@ -1,4 +1,4 @@
-/* $Id: dma.h,v 1.21 2001/12/13 04:16:52 davem Exp $
+/*
 * include/asm-sparc64/dma.h
 *
 * Copyright 1996 (C) David S. Miller (davem@caip.rutgers.edu)
diff --git a/include/asm-sparc64/ebus.h b/include/asm-sparc64/ebus.h
index 9c1c6db2a790..fcc62b97ced5 100644
--- a/include/asm-sparc64/ebus.h
+++ b/include/asm-sparc64/ebus.h
@@ -1,4 +1,4 @@
-/* $Id: ebus.h,v 1.10 2001/03/14 05:00:55 davem Exp $
+/*
 * ebus.h: PCI to Ebus pseudo driver software state.
 *
 * Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be)
diff --git a/include/asm-sparc64/elf.h b/include/asm-sparc64/elf.h
index 11c8e68d712a..0818a1308f4e 100644
--- a/include/asm-sparc64/elf.h
+++ b/include/asm-sparc64/elf.h
@@ -1,4 +1,3 @@
-/* $Id: elf.h,v 1.32 2002/02/09 19:49:31 davem Exp $ */
 #ifndef __ASM_SPARC64_ELF_H
 #define __ASM_SPARC64_ELF_H
diff --git a/include/asm-sparc64/envctrl.h b/include/asm-sparc64/envctrl.h
index 53a6653815eb..a5668a082b14 100644
--- a/include/asm-sparc64/envctrl.h
+++ b/include/asm-sparc64/envctrl.h
@@ -1,4 +1,4 @@
-/* $Id: envctrl.h,v 1.3 2000/11/03 00:37:40 davem Exp $
+/*
 *
 * envctrl.h: Definitions for access to the i2c environment
 *            monitoring on Ultrasparc systems.
diff --git a/include/asm-sparc64/estate.h b/include/asm-sparc64/estate.h
index a719c3d2f6b1..520c08560d1b 100644
--- a/include/asm-sparc64/estate.h
+++ b/include/asm-sparc64/estate.h
@@ -1,4 +1,3 @@
-/* $Id: estate.h,v 1.1 2001/03/28 10:56:34 davem Exp $ */
 #ifndef _SPARC64_ESTATE_H
 #define _SPARC64_ESTATE_H
diff --git a/include/asm-sparc64/fcntl.h b/include/asm-sparc64/fcntl.h
index 111f6b3b8925..8a09ca7aa2f2 100644
--- a/include/asm-sparc64/fcntl.h
+++ b/include/asm-sparc64/fcntl.h
@@ -1,4 +1,3 @@
-/* $Id: fcntl.h,v 1.12 2001/09/20 00:35:34 davem Exp $ */
 #ifndef _SPARC64_FCNTL_H
 #define _SPARC64_FCNTL_H
diff --git a/include/asm-sparc64/fhc.h b/include/asm-sparc64/fhc.h
index 9e7f1b0d78b9..ddffcdfbc984 100644
--- a/include/asm-sparc64/fhc.h
+++ b/include/asm-sparc64/fhc.h
@@ -1,4 +1,4 @@
-/* $Id: fhc.h,v 1.5 1999/09/21 14:39:29 davem Exp $
+/*
 * fhc.h: Structures for central/fhc pseudo driver on Sunfire/Starfire/Wildfire.
 *
 * Copyright (C) 1997, 1999 David S. Miller (davem@redhat.com)
diff --git a/include/asm-sparc64/head.h b/include/asm-sparc64/head.h
index 67960a751f4d..10e9dabc4c41 100644
--- a/include/asm-sparc64/head.h
+++ b/include/asm-sparc64/head.h
@@ -1,4 +1,3 @@
-/* $Id: head.h,v 1.30 1997/08/08 08:34:33 jj Exp $ */
 #ifndef _SPARC64_HEAD_H
 #define _SPARC64_HEAD_H
diff --git a/include/asm-sparc64/ide.h b/include/asm-sparc64/ide.h
index c5fdabe0b42d..1282676da1cd 100644
--- a/include/asm-sparc64/ide.h
+++ b/include/asm-sparc64/ide.h
@@ -1,4 +1,4 @@
-/* $Id: ide.h,v 1.21 2001/09/25 20:21:48 kanoj Exp $
+/*
 * ide.h: Ultra/PCI specific IDE glue.
 *
 * Copyright (C) 1997  David S. Miller (davem@caip.rutgers.edu)
diff --git a/include/asm-sparc64/idprom.h b/include/asm-sparc64/idprom.h
index 77fbf987385f..a363fa0a112a 100644
--- a/include/asm-sparc64/idprom.h
+++ b/include/asm-sparc64/idprom.h
@@ -1,4 +1,4 @@
-/* $Id: idprom.h,v 1.2 1997/04/04 00:50:16 davem Exp $
+/*
 * idprom.h: Macros and defines for idprom routines
 *
 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
diff --git a/include/asm-sparc64/io.h b/include/asm-sparc64/io.h
index c299b853b5ba..3158960f3eb5 100644
--- a/include/asm-sparc64/io.h
+++ b/include/asm-sparc64/io.h
@@ -24,7 +24,8 @@ static inline u8 _inb(unsigned long addr)
        __asm__ __volatile__("lduba\t[%1] %2, %0\t/* pci_inb */"
                             : "=r" (ret)
-                             : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L));
+                             : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
+                             : "memory");
        return ret;
 }
@@ -35,7 +36,8 @@ static inline u16 _inw(unsigned long addr)
        __asm__ __volatile__("lduha\t[%1] %2, %0\t/* pci_inw */"
                             : "=r" (ret)
-                             : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L));
+                             : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
+                             : "memory");
        return ret;
 }
@@ -46,7 +48,8 @@ static inline u32 _inl(unsigned long addr)
        __asm__ __volatile__("lduwa\t[%1] %2, %0\t/* pci_inl */"
                             : "=r" (ret)
-                             : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L));
+                             : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
+                             : "memory");
        return ret;
 }
@@ -55,21 +58,24 @@ static inline void _outb(u8 b, unsigned long addr)
 {
        __asm__ __volatile__("stba\t%r0, [%1] %2\t/* pci_outb */"
                             : /* no outputs */
-                             : "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L));
+                             : "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
+                             : "memory");
 }
 static inline void _outw(u16 w, unsigned long addr)
 {
        __asm__ __volatile__("stha\t%r0, [%1] %2\t/* pci_outw */"
                             : /* no outputs */
-                             : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L));
+                             : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
+                             : "memory");
 }
 static inline void _outl(u32 l, unsigned long addr)
 {
        __asm__ __volatile__("stwa\t%r0, [%1] %2\t/* pci_outl */"
                             : /* no outputs */
-                             : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L));
+                             : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
+                             : "memory");
 }
 #define inb(__addr)             (_inb((unsigned long)(__addr)))
@@ -128,7 +134,8 @@ static inline u8 _readb(const volatile void __iomem *addr)
        __asm__ __volatile__("lduba\t[%1] %2, %0\t/* pci_readb */"
                             : "=r" (ret)
-                             : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L));
+                             : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
+                             : "memory");
        return ret;
 }
@@ -137,7 +144,8 @@ static inline u16 _readw(const volatile void __iomem *addr)
        __asm__ __volatile__("lduha\t[%1] %2, %0\t/* pci_readw */"
                             : "=r" (ret)
-                             : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L));
+                             : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
+                             : "memory");
        return ret;
 }
@@ -147,7 +155,8 @@ static inline u32 _readl(const volatile void __iomem *addr)
        __asm__ __volatile__("lduwa\t[%1] %2, %0\t/* pci_readl */"
                             : "=r" (ret)
-                             : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L));
+                             : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
+                             : "memory");
        return ret;
 }
@@ -157,7 +166,8 @@ static inline u64 _readq(const volatile void __iomem *addr)
        __asm__ __volatile__("ldxa\t[%1] %2, %0\t/* pci_readq */"
                             : "=r" (ret)
-                             : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L));
+                             : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
+                             : "memory");
        return ret;
 }
@@ -166,28 +176,32 @@ static inline void _writeb(u8 b, volatile void __iomem *addr)
 {
        __asm__ __volatile__("stba\t%r0, [%1] %2\t/* pci_writeb */"
                             : /* no outputs */
-                             : "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L));
+                             : "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
+                             : "memory");
 }
 static inline void _writew(u16 w, volatile void __iomem *addr)
 {
        __asm__ __volatile__("stha\t%r0, [%1] %2\t/* pci_writew */"
                             : /* no outputs */
-                             : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L));
+                             : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
+                             : "memory");
 }
 static inline void _writel(u32 l, volatile void __iomem *addr)
 {
        __asm__ __volatile__("stwa\t%r0, [%1] %2\t/* pci_writel */"
                             : /* no outputs */
-                             : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L));
+                             : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
+                             : "memory");
 }
 static inline void _writeq(u64 q, volatile void __iomem *addr)
 {
        __asm__ __volatile__("stxa\t%r0, [%1] %2\t/* pci_writeq */"
                             : /* no outputs */
-                             : "Jr" (q), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L));
+                             : "Jr" (q), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
+                             : "memory");
 }
 #define readb(__addr)           _readb(__addr)
@@ -299,7 +313,8 @@ static inline u8 _sbus_readb(const volatile void __iomem *addr)
        __asm__ __volatile__("lduba\t[%1] %2, %0\t/* sbus_readb */"
                             : "=r" (ret)
-                             : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
+                             : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)
+                             : "memory");
        return ret;
 }
@@ -310,7 +325,8 @@ static inline u16 _sbus_readw(const volatile void __iomem *addr)
        __asm__ __volatile__("lduha\t[%1] %2, %0\t/* sbus_readw */"
                             : "=r" (ret)
-                             : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
+                             : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)
+                             : "memory");
        return ret;
 }
@@ -321,7 +337,8 @@ static inline u32 _sbus_readl(const volatile void __iomem *addr)
        __asm__ __volatile__("lduwa\t[%1] %2, %0\t/* sbus_readl */"
                             : "=r" (ret)
-                             : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
+                             : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)
+                             : "memory");
        return ret;
 }
@@ -332,7 +349,8 @@ static inline u64 _sbus_readq(const volatile void __iomem *addr)
        __asm__ __volatile__("ldxa\t[%1] %2, %0\t/* sbus_readq */"
                             : "=r" (ret)
-                             : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
+                             : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)
+                             : "memory");
        return ret;
 }
@@ -341,28 +359,32 @@ static inline void _sbus_writeb(u8 b, volatile void __iomem *addr)
 {
        __asm__ __volatile__("stba\t%r0, [%1] %2\t/* sbus_writeb */"
                             : /* no outputs */
-                             : "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
+                             : "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)
+                             : "memory");
 }
 static inline void _sbus_writew(u16 w, volatile void __iomem *addr)
 {
        __asm__ __volatile__("stha\t%r0, [%1] %2\t/* sbus_writew */"
                             : /* no outputs */
-                             : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
+                             : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)
+                             : "memory");
 }
 static inline void _sbus_writel(u32 l, volatile void __iomem *addr)
 {
        __asm__ __volatile__("stwa\t%r0, [%1] %2\t/* sbus_writel */"
                             : /* no outputs */
-                             : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
+                             : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)
+                             : "memory");
 }
 static inline void _sbus_writeq(u64 l, volatile void __iomem *addr)
 {
        __asm__ __volatile__("stxa\t%r0, [%1] %2\t/* sbus_writeq */"
                             : /* no outputs */
-                             : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
+                             : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)
+                             : "memory");
 }
 #define sbus_readb(__addr)              _sbus_readb(__addr)
diff --git a/include/asm-sparc64/ioctl.h b/include/asm-sparc64/ioctl.h
index 253d0b57b316..d634c21b4724 100644
--- a/include/asm-sparc64/ioctl.h
+++ b/include/asm-sparc64/ioctl.h
@@ -1,4 +1,3 @@
-/* $Id: ioctl.h,v 1.2 1998/10/15 05:40:38 jj Exp $ */
 #ifndef _SPARC64_IOCTL_H
 #define _SPARC64_IOCTL_H
diff --git a/include/asm-sparc64/ioctls.h b/include/asm-sparc64/ioctls.h
index c1be40647c99..94d1b75e512b 100644
--- a/include/asm-sparc64/ioctls.h
+++ b/include/asm-sparc64/ioctls.h
@@ -1,4 +1,3 @@
-/* $Id: ioctls.h,v 1.7 1998/02/23 02:49:41 davem Exp $ */
 #ifndef _ASM_SPARC64_IOCTLS_H
 #define _ASM_SPARC64_IOCTLS_H
diff --git a/include/asm-sparc64/lsu.h b/include/asm-sparc64/lsu.h
index 79f109840c39..7190f8de90a0 100644
--- a/include/asm-sparc64/lsu.h
+++ b/include/asm-sparc64/lsu.h
@@ -1,4 +1,3 @@
-/* $Id: lsu.h,v 1.2 1997/04/04 00:50:22 davem Exp $ */
 #ifndef _SPARC64_LSU_H
 #define _SPARC64_LSU_H
diff --git a/include/asm-sparc64/mman.h b/include/asm-sparc64/mman.h
index e584563b56eb..d2ae67cd1bdc 100644
--- a/include/asm-sparc64/mman.h
+++ b/include/asm-sparc64/mman.h
@@ -1,4 +1,3 @@
-/* $Id: mman.h,v 1.2 2000/03/15 02:44:26 davem Exp $ */
 #ifndef __SPARC64_MMAN_H__
 #define __SPARC64_MMAN_H__
@@ -24,9 +23,8 @@
 #ifdef __KERNEL__
 #ifndef __ASSEMBLY__
-#define arch_mmap_check sparc64_mmap_check
+#define arch_mmap_check(addr,len,flags) sparc64_mmap_check(addr,len)
-int sparc64_mmap_check(unsigned long addr, unsigned long len,
+int sparc64_mmap_check(unsigned long addr, unsigned long len);
-                unsigned long flags);
 #endif
 #endif
diff --git a/include/asm-sparc64/mmu_context.h b/include/asm-sparc64/mmu_context.h
index 9fc225ed5500..5693ab482606 100644
--- a/include/asm-sparc64/mmu_context.h
+++ b/include/asm-sparc64/mmu_context.h
@@ -1,4 +1,3 @@
-/* $Id: mmu_context.h,v 1.54 2002/02/09 19:49:31 davem Exp $ */
 #ifndef __SPARC64_MMU_CONTEXT_H
 #define __SPARC64_MMU_CONTEXT_H
diff --git a/include/asm-sparc64/namei.h b/include/asm-sparc64/namei.h
index 275161f21213..cbc1b4c06891 100644
--- a/include/asm-sparc64/namei.h
+++ b/include/asm-sparc64/namei.h
@@ -1,4 +1,4 @@
-/* $Id: namei.h,v 1.17 2000/04/13 00:55:54 davem Exp $
+/*
 * linux/include/asm-sparc64/namei.h
 *
 * Routines to handle famous /usr/gnemul/s*.
diff --git a/include/asm-sparc64/openprom.h b/include/asm-sparc64/openprom.h
index 26ec046715c8..b69e4a8c9170 100644
--- a/include/asm-sparc64/openprom.h
+++ b/include/asm-sparc64/openprom.h
@@ -1,4 +1,3 @@
-/* $Id: openprom.h,v 1.9 2001/03/16 10:22:02 davem Exp $ */
 #ifndef __SPARC64_OPENPROM_H
 #define __SPARC64_OPENPROM_H
diff --git a/include/asm-sparc64/page.h b/include/asm-sparc64/page.h
index 618117def0dc..93f0881b766e 100644
--- a/include/asm-sparc64/page.h
+++ b/include/asm-sparc64/page.h
@@ -1,5 +1,3 @@
-/* $Id: page.h,v 1.39 2002/02/09 19:49:31 davem Exp $ */
 #ifndef _SPARC64_PAGE_H
 #define _SPARC64_PAGE_H
diff --git a/include/asm-sparc64/pgalloc.h b/include/asm-sparc64/pgalloc.h
index 3ee2d406373b..326de104d014 100644
--- a/include/asm-sparc64/pgalloc.h
+++ b/include/asm-sparc64/pgalloc.h
@@ -1,4 +1,3 @@
-/* $Id: pgalloc.h,v 1.30 2001/12/21 04:56:17 davem Exp $ */
 #ifndef _SPARC64_PGALLOC_H
 #define _SPARC64_PGALLOC_H
diff --git a/include/asm-sparc64/pgtable.h b/include/asm-sparc64/pgtable.h
index 0e200e7acec7..b87017747b5d 100644
--- a/include/asm-sparc64/pgtable.h
+++ b/include/asm-sparc64/pgtable.h
@@ -1,4 +1,4 @@
-/* $Id: pgtable.h,v 1.156 2002/02/09 19:49:31 davem Exp $
+/*
 * pgtable.h: SpitFire page table operations.
 *
 * Copyright 1996,1997 David S. Miller (davem@caip.rutgers.edu)
diff --git a/include/asm-sparc64/pil.h b/include/asm-sparc64/pil.h
index 2f5d126f7163..eaac842d88c3 100644
--- a/include/asm-sparc64/pil.h
+++ b/include/asm-sparc64/pil.h
@@ -1,4 +1,3 @@
-/* $Id: pil.h,v 1.1 2002/01/23 11:27:36 davem Exp $ */
 #ifndef _SPARC64_PIL_H
 #define _SPARC64_PIL_H
diff --git a/include/asm-sparc64/processor.h b/include/asm-sparc64/processor.h
index 885b6a1dcae4..26b4e5255761 100644
--- a/include/asm-sparc64/processor.h
+++ b/include/asm-sparc64/processor.h
@@ -1,4 +1,4 @@
-/* $Id: processor.h,v 1.83 2002/02/10 06:04:33 davem Exp $
+/*
 * include/asm-sparc64/processor.h
 *
 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
diff --git a/include/asm-sparc64/psrcompat.h b/include/asm-sparc64/psrcompat.h
index 3614ca04753f..44b6327dbbf5 100644
--- a/include/asm-sparc64/psrcompat.h
+++ b/include/asm-sparc64/psrcompat.h
@@ -1,4 +1,3 @@
-/* $Id: psrcompat.h,v 1.5 1998/10/06 09:28:39 jj Exp $ */
 #ifndef _SPARC64_PSRCOMPAT_H
 #define _SPARC64_PSRCOMPAT_H
diff --git a/include/asm-sparc64/pstate.h b/include/asm-sparc64/pstate.h
index 949aebaf991d..a26a53777bb0 100644
--- a/include/asm-sparc64/pstate.h
+++ b/include/asm-sparc64/pstate.h
@@ -1,4 +1,3 @@
-/* $Id: pstate.h,v 1.6 1997/06/25 07:39:45 jj Exp $ */
 #ifndef _SPARC64_PSTATE_H
 #define _SPARC64_PSTATE_H
diff --git a/include/asm-sparc64/ptrace.h b/include/asm-sparc64/ptrace.h
index 90972a5ada59..b163da79bb6d 100644
--- a/include/asm-sparc64/ptrace.h
+++ b/include/asm-sparc64/ptrace.h
@@ -128,6 +128,17 @@ struct sparc_trapf {
 #ifdef __KERNEL__
+struct global_reg_snapshot {
+        unsigned long           tstate;
+        unsigned long           tpc;
+        unsigned long           tnpc;
+        unsigned long           o7;
+        unsigned long           i7;
+        struct thread_info      *thread;
+        unsigned long           pad1;
+        unsigned long           pad2;
+};
 #define __ARCH_WANT_COMPAT_SYS_PTRACE
 #define force_successful_syscall_return()           \
@@ -295,6 +306,20 @@ extern void __show_regs(struct pt_regs *);
 #define SF_XARG5  0x58
 #define SF_XXARG  0x5c
+#ifdef __KERNEL__
+/* global_reg_snapshot offsets */
+#define GR_SNAP_TSTATE  0x00
+#define GR_SNAP_TPC     0x08
+#define GR_SNAP_TNPC    0x10
+#define GR_SNAP_O7      0x18
+#define GR_SNAP_I7      0x20
+#define GR_SNAP_THREAD  0x28
+#define GR_SNAP_PAD1    0x30
+#define GR_SNAP_PAD2    0x38
+#endif  /*  __KERNEL__  */
 /* Stuff for the ptrace system call */
 #define PTRACE_SPARC_DETACH       11
 #define PTRACE_GETREGS            12
diff --git a/include/asm-sparc64/reg.h b/include/asm-sparc64/reg.h
index fc68f90181b3..77aa4804a60d 100644
--- a/include/asm-sparc64/reg.h
+++ b/include/asm-sparc64/reg.h
@@ -1,4 +1,4 @@
-/* $Id: reg.h,v 1.6 1999/09/06 08:22:10 jj Exp $
+/*
 * linux/asm-sparc64/reg.h
 * Layout of the registers as expected by gdb on the Sparc
 * we should replace the user.h definitions with those in
diff --git a/include/asm-sparc64/resource.h b/include/asm-sparc64/resource.h
index aa469795a6b0..4f08fb5e4ca4 100644
--- a/include/asm-sparc64/resource.h
+++ b/include/asm-sparc64/resource.h
@@ -1,4 +1,4 @@
-/* $Id: resource.h,v 1.8 2000/09/23 02:09:21 davem Exp $
+/*
 * resource.h: Resource definitions.
 *
 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
diff --git a/include/asm-sparc64/rtc.h b/include/asm-sparc64/rtc.h
index cb17334595c9..f9ecb1fe2ecd 100644
--- a/include/asm-sparc64/rtc.h
+++ b/include/asm-sparc64/rtc.h
@@ -1,5 +1,4 @@
-/* $Id: rtc.h,v 1.1 1996/12/26 14:22:35 davem Exp $
+/*
- *
 * rtc.h: Definitions for access to the Mostek real time clock
 *
 * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu)
diff --git a/include/asm-sparc64/rwsem.h b/include/asm-sparc64/rwsem.h
index 1294b7ce5d06..1dc129ac2feb 100644
--- a/include/asm-sparc64/rwsem.h
+++ b/include/asm-sparc64/rwsem.h
@@ -1,4 +1,4 @@
-/* $Id: rwsem.h,v 1.5 2001/11/18 00:12:56 davem Exp $
+/*
 * rwsem.h: R/W semaphores implemented using CAS
 *
 * Written by David S. Miller (davem@redhat.com), 2001.
diff --git a/include/asm-sparc64/scatterlist.h b/include/asm-sparc64/scatterlist.h
index 6df23f070b1a..81bd058f9382 100644
--- a/include/asm-sparc64/scatterlist.h
+++ b/include/asm-sparc64/scatterlist.h
@@ -1,4 +1,3 @@
-/* $Id: scatterlist.h,v 1.11 2001/12/17 07:05:15 davem Exp $ */
 #ifndef _SPARC64_SCATTERLIST_H
 #define _SPARC64_SCATTERLIST_H
diff --git a/include/asm-sparc64/shmparam.h b/include/asm-sparc64/shmparam.h
index 8c66fded8a32..1ed0d6701a9b 100644
--- a/include/asm-sparc64/shmparam.h
+++ b/include/asm-sparc64/shmparam.h
@@ -1,4 +1,3 @@
-/* $Id: shmparam.h,v 1.5 2001/09/24 21:17:57 kanoj Exp $ */
 #ifndef _ASMSPARC64_SHMPARAM_H
 #define _ASMSPARC64_SHMPARAM_H
diff --git a/include/asm-sparc64/sigcontext.h b/include/asm-sparc64/sigcontext.h
index d8073373db8c..1c868d680cfc 100644
--- a/include/asm-sparc64/sigcontext.h
+++ b/include/asm-sparc64/sigcontext.h
@@ -1,4 +1,3 @@
-/* $Id: sigcontext.h,v 1.12 1999/09/06 08:22:09 jj Exp $ */
 #ifndef __SPARC64_SIGCONTEXT_H
 #define __SPARC64_SIGCONTEXT_H
diff --git a/include/asm-sparc64/signal.h b/include/asm-sparc64/signal.h
index c49f32d38707..2a7c7934ac0a 100644
--- a/include/asm-sparc64/signal.h
+++ b/include/asm-sparc64/signal.h
@@ -1,4 +1,3 @@
-/* $Id: signal.h,v 1.9 1999/09/06 08:22:11 jj Exp $ */
 #ifndef _ASMSPARC64_SIGNAL_H
 #define _ASMSPARC64_SIGNAL_H
diff --git a/include/asm-sparc64/smp.h b/include/asm-sparc64/smp.h
index 1c1c5ea5cea5..cd0311b2e19d 100644
--- a/include/asm-sparc64/smp.h
+++ b/include/asm-sparc64/smp.h
@@ -1,6 +1,6 @@
 /* smp.h: Sparc64 specific SMP stuff.
 *
- * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
+ * Copyright (C) 1996, 2008 David S. Miller (davem@davemloft.net)
 */
 #ifndef _SPARC64_SMP_H
@@ -44,6 +44,8 @@ extern int hard_smp_processor_id(void);
 extern void smp_fill_in_sib_core_maps(void);
 extern void cpu_play_dead(void);
+extern void smp_fetch_global_regs(void);
 #ifdef CONFIG_HOTPLUG_CPU
 extern int __cpu_disable(void);
 extern void __cpu_die(unsigned int cpu);
@@ -55,6 +57,7 @@ extern void __cpu_die(unsigned int cpu);
 #define hard_smp_processor_id()         0
 #define smp_fill_in_sib_core_maps() do { } while (0)
+#define smp_fetch_global_regs() do { } while (0)
 #endif /* !(CONFIG_SMP) */
diff --git a/include/asm-sparc64/socket.h b/include/asm-sparc64/socket.h
index 8cf071fae3eb..5af688f56716 100644
--- a/include/asm-sparc64/socket.h
+++ b/include/asm-sparc64/socket.h
@@ -1,4 +1,3 @@
-/* $Id: socket.h,v 1.10 2001/06/13 16:25:03 davem Exp $ */
 #ifndef _ASM_SOCKET_H
 #define _ASM_SOCKET_H
diff --git a/include/asm-sparc64/starfire.h b/include/asm-sparc64/starfire.h
index 48b50b5e35b0..07bafd31e33c 100644
--- a/include/asm-sparc64/starfire.h
+++ b/include/asm-sparc64/starfire.h
@@ -1,4 +1,4 @@
-/* $Id: starfire.h,v 1.2 2001/07/04 00:18:18 davem Exp $
+/*
 * starfire.h: Group all starfire specific code together.
 *
 * Copyright (C) 2000 Anton Blanchard (anton@samba.org)
diff --git a/include/asm-sparc64/stat.h b/include/asm-sparc64/stat.h
index 128c27e57f0b..9650fdea847f 100644
--- a/include/asm-sparc64/stat.h
+++ b/include/asm-sparc64/stat.h
@@ -1,4 +1,3 @@
-/* $Id: stat.h,v 1.7 2000/08/04 05:35:55 davem Exp $ */
 #ifndef _SPARC64_STAT_H
 #define _SPARC64_STAT_H
diff --git a/include/asm-sparc64/statfs.h b/include/asm-sparc64/statfs.h
index 185b6c481b24..79b3c890a5fa 100644
--- a/include/asm-sparc64/statfs.h
+++ b/include/asm-sparc64/statfs.h
@@ -1,4 +1,3 @@
-/* $Id: statfs.h,v 1.2 1997/04/14 17:05:22 jj Exp $ */
 #ifndef _SPARC64_STATFS_H
 #define _SPARC64_STATFS_H
diff --git a/include/asm-sparc64/string.h b/include/asm-sparc64/string.h
index c7d88622cb27..43161f2d17eb 100644
--- a/include/asm-sparc64/string.h
+++ b/include/asm-sparc64/string.h
@@ -1,4 +1,4 @@
-/* $Id: string.h,v 1.20 2001/09/27 04:36:24 kanoj Exp $
+/*
 * string.h: External definitions for optimized assembly string
 *           routines for the Linux Kernel.
 *
diff --git a/include/asm-sparc64/sunbpp.h b/include/asm-sparc64/sunbpp.h
index b441cc9c426c..8e171b7a9f4f 100644
--- a/include/asm-sparc64/sunbpp.h
+++ b/include/asm-sparc64/sunbpp.h
@@ -1,4 +1,4 @@
-/* $Id: sunbpp.h,v 1.1 1999/08/13 06:21:44 shadow Exp $
+/*
 * include/asm-sparc64/sunbpp.h
 */
diff --git a/include/asm-sparc64/termios.h b/include/asm-sparc64/termios.h
index cacbea171ad7..1f5dab25dda5 100644
--- a/include/asm-sparc64/termios.h
+++ b/include/asm-sparc64/termios.h
@@ -1,4 +1,3 @@
-/* $Id: termios.h,v 1.11 2001/06/01 08:12:11 davem Exp $ */
 #ifndef _SPARC64_TERMIOS_H
 #define _SPARC64_TERMIOS_H
diff --git a/include/asm-sparc64/thread_info.h b/include/asm-sparc64/thread_info.h
index 71e42d1a80d9..e5873e385306 100644
--- a/include/asm-sparc64/thread_info.h
+++ b/include/asm-sparc64/thread_info.h
@@ -38,7 +38,7 @@ struct thread_info {
        struct task_struct      *task;
        unsigned long           flags;
        __u8                    fpsaved[7];
-        __u8                    pad;
+        __u8                    status;
        unsigned long           ksp;
        /* D$ line 2 */
@@ -217,7 +217,7 @@ register struct thread_info *current_thread_info_reg asm("g6");
 *       nop
 */
 #define TIF_SYSCALL_TRACE       0       /* syscall trace active */
-#define TIF_RESTORE_SIGMASK     1       /* restore signal mask in do_signal() */
+/* flags bit 1 is available */
 #define TIF_SIGPENDING          2       /* signal pending */
 #define TIF_NEED_RESCHED        3       /* rescheduling necessary */
 #define TIF_PERFCTR             4       /* performance counters active */
@@ -244,14 +244,34 @@ register struct thread_info *current_thread_info_reg asm("g6");
 #define _TIF_32BIT              (1<<TIF_32BIT)
 #define _TIF_SECCOMP            (1<<TIF_SECCOMP)
 #define _TIF_SYSCALL_AUDIT      (1<<TIF_SYSCALL_AUDIT)
-#define _TIF_RESTORE_SIGMASK    (1<<TIF_RESTORE_SIGMASK)
 #define _TIF_ABI_PENDING        (1<<TIF_ABI_PENDING)
 #define _TIF_POLLING_NRFLAG     (1<<TIF_POLLING_NRFLAG)
 #define _TIF_USER_WORK_MASK     ((0xff << TI_FLAG_WSAVED_SHIFT) | \
-                                 (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK | \
+                                 (_TIF_SIGPENDING | \
                                  _TIF_NEED_RESCHED | _TIF_PERFCTR))
+/*
+ * Thread-synchronous status.
+ *
+ * This is different from the flags in that nobody else
+ * ever touches our thread-synchronous status, so we don't
+ * have to worry about atomic accesses.
+ *
+ * Note that there are only 8 bits available.
+ */
+#define TS_RESTORE_SIGMASK      0x0001  /* restore signal mask in do_signal() */
+#ifndef __ASSEMBLY__
+#define HAVE_SET_RESTORE_SIGMASK        1
+static inline void set_restore_sigmask(void)
+{
+        struct thread_info *ti = current_thread_info();
+        ti->status |= TS_RESTORE_SIGMASK;
+        set_bit(TIF_SIGPENDING, &ti->flags);
+}
+#endif  /* !__ASSEMBLY__ */
 #endif /* __KERNEL__ */
 #endif /* _ASM_THREAD_INFO_H */
diff --git a/include/asm-sparc64/ttable.h b/include/asm-sparc64/ttable.h
index 52d67d394107..0ba199587e07 100644
--- a/include/asm-sparc64/ttable.h
+++ b/include/asm-sparc64/ttable.h
@@ -1,4 +1,3 @@
-/* $Id: ttable.h,v 1.18 2002/02/09 19:49:32 davem Exp $ */
 #ifndef _SPARC64_TTABLE_H
 #define _SPARC64_TTABLE_H
diff --git a/include/asm-sparc64/types.h b/include/asm-sparc64/types.h
index 5dbe04f4044a..b27ccc85202f 100644
--- a/include/asm-sparc64/types.h
+++ b/include/asm-sparc64/types.h
@@ -1,4 +1,3 @@
-/* $Id: types.h,v 1.4 2001/10/09 02:24:35 davem Exp $ */
 #ifndef _SPARC64_TYPES_H
 #define _SPARC64_TYPES_H
diff --git a/include/asm-sparc64/uaccess.h b/include/asm-sparc64/uaccess.h
index d8547b87e730..5fcbaf68c3f6 100644
--- a/include/asm-sparc64/uaccess.h
+++ b/include/asm-sparc64/uaccess.h
@@ -1,4 +1,3 @@
-/* $Id: uaccess.h,v 1.35 2002/02/09 19:49:31 davem Exp $ */
 #ifndef _ASM_UACCESS_H
 #define _ASM_UACCESS_H
diff --git a/include/asm-sparc64/uctx.h b/include/asm-sparc64/uctx.h
index 6eaf16ef23f6..dc937c75ffdd 100644
--- a/include/asm-sparc64/uctx.h
+++ b/include/asm-sparc64/uctx.h
@@ -1,4 +1,4 @@
-/* $Id: uctx.h,v 1.1 1997/06/18 16:51:58 davem Exp $
+/*
 * uctx.h: Sparc64 {set,get}context() register state layouts.
 *
 * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
diff --git a/include/asm-sparc64/utrap.h b/include/asm-sparc64/utrap.h
index 81b0ebf3736c..e49e5c46ad68 100644
--- a/include/asm-sparc64/utrap.h
+++ b/include/asm-sparc64/utrap.h
@@ -1,4 +1,4 @@
-/* $Id: utrap.h,v 1.1 1997/10/14 16:21:31 jj Exp $
+/*
 * include/asm-sparc64/utrap.h
 *
 * Copyright (C) 1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
diff --git a/include/asm-sparc64/watchdog.h b/include/asm-sparc64/watchdog.h
index 4d5b03b60e4d..5baf2d3919cf 100644
--- a/include/asm-sparc64/watchdog.h
+++ b/include/asm-sparc64/watchdog.h
@@ -1,4 +1,4 @@
-/* $Id: watchdog.h,v 1.1 2001/01/18 04:47:44 davem Exp $
+/*
 *
 * watchdog - Driver interface for the hardware watchdog timers
 * present on Sun Microsystems boardsets
diff --git a/include/asm-um/irq.h b/include/asm-um/irq.h
index de389a477cdd..4a2037f8204b 100644
--- a/include/asm-um/irq.h
+++ b/include/asm-um/irq.h
@@ -15,8 +15,9 @@
 #define SIGIO_WRITE_IRQ         11
 #define TELNETD_IRQ             12
 #define XTERM_IRQ               13
+#define RANDOM_IRQ              14
-#define LAST_IRQ XTERM_IRQ
+#define LAST_IRQ RANDOM_IRQ
 #define NR_IRQS (LAST_IRQ + 1)
 #endif
diff --git a/include/asm-um/keyboard.h b/include/asm-um/keyboard.h
deleted file mode 100644
index ee2e2303d0e4..000000000000
--- a/include/asm-um/keyboard.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef __UM_KEYBOARD_H
-#define __UM_KEYBOARD_H
-#include "asm/arch/keyboard.h"
-#endif
diff --git a/include/asm-um/mmu_context.h b/include/asm-um/mmu_context.h
index 6686fc524ca1..54f42e8b0105 100644
--- a/include/asm-um/mmu_context.h
+++ b/include/asm-um/mmu_context.h
@@ -22,16 +22,10 @@ extern void force_flush_all(void);
 static inline void activate_mm(struct mm_struct *old, struct mm_struct *new)
 {
        /*
-         * This is called by fs/exec.c and fs/aio.c. In the first case, for an
+         * This is called by fs/exec.c and sys_unshare()
-         * exec, we don't need to do anything as we're called from userspace
+         * when the new ->mm is used for the first time.
-         * and thus going to use a new host PID. In the second, we're called
-         * from a kernel thread, and thus need to go doing the mmap's on the
-         * host. Since they're very expensive, we want to avoid that as far as
-         * possible.
         */
-        if (old != new && (current->flags & PF_BORROWED_MM))
+        __switch_mm(&new->context.id);
-                __switch_mm(&new->context.id);
        arch_dup_mmap(old, new);
 }
diff --git a/include/asm-um/page.h b/include/asm-um/page.h
index 381f96b1c825..916e1a61999f 100644
--- a/include/asm-um/page.h
+++ b/include/asm-um/page.h
@@ -7,16 +7,20 @@
 #ifndef __UM_PAGE_H
 #define __UM_PAGE_H
-struct page;
+#include <linux/const.h>
-#include <linux/types.h>
-#include <asm/vm-flags.h>
 /* PAGE_SHIFT determines the page size */
 #define PAGE_SHIFT      12
-#define PAGE_SIZE       (1UL << PAGE_SHIFT)
+#define PAGE_SIZE       (_AC(1, UL) << PAGE_SHIFT)
 #define PAGE_MASK       (~(PAGE_SIZE-1))
+#ifndef __ASSEMBLY__
+struct page;
+#include <linux/types.h>
+#include <asm/vm-flags.h>
 /*
 * These are used to make use of C type-checking..
 */
@@ -120,4 +124,5 @@ extern struct page *arch_validate(struct page *page, gfp_t mask, int order);
 #include <asm-generic/memory_model.h>
 #include <asm-generic/page.h>
-#endif
+#endif  /* __ASSEMBLY__ */
+#endif  /* __UM_PAGE_H */
diff --git a/include/asm-um/param.h b/include/asm-um/param.h
index 4cd4a226f8c1..e44f4e60d16d 100644
--- a/include/asm-um/param.h
+++ b/include/asm-um/param.h
@@ -13,6 +13,8 @@
 #define HZ CONFIG_HZ
 #define USER_HZ 100        /* .. some user interfaces are in "ticks" */
 #define CLOCKS_PER_SEC (USER_HZ)  /* frequency at which times() counts */
+#else
+#define HZ 100
 #endif
 #endif
diff --git a/include/asm-v850/clinkage.h b/include/asm-v850/clinkage.h
index 2b622adccae5..c389691d6f86 100644
--- a/include/asm-v850/clinkage.h
+++ b/include/asm-v850/clinkage.h
@@ -11,7 +11,7 @@
 * Written by Miles Bader <miles@gnu.org>
 */
-#ifndef __CLINKAGE_H__
+#ifndef __V850_CLINKAGE_H__
 #define __V850_CLINKAGE_H__
 #include <asm/macrology.h>
diff --git a/include/asm-v850/param.h b/include/asm-v850/param.h
index 281832690290..4391f5fe0204 100644
--- a/include/asm-v850/param.h
+++ b/include/asm-v850/param.h
@@ -26,6 +26,8 @@
 # define HZ             CONFIG_HZ
 # define USER_HZ        100
 # define CLOCKS_PER_SEC USER_HZ
+#else
+# define HZ             100
 #endif
 #endif /* __V850_PARAM_H__ */
diff --git a/include/asm-x86/i387.h b/include/asm-x86/i387.h
index 6b722d315936..37672f79dcc8 100644
--- a/include/asm-x86/i387.h
+++ b/include/asm-x86/i387.h
@@ -193,6 +193,8 @@ static inline int restore_i387(struct _fpstate __user *buf)
 #else  /* CONFIG_X86_32 */
+extern void finit(void);
 static inline void tolerant_fwait(void)
 {
        asm volatile("fnclex ; fwait");
diff --git a/include/asm-x86/kvm_x86_emulate.h b/include/asm-x86/kvm_x86_emulate.h
index d6337f941c98..b877bbd2d3a7 100644
--- a/include/asm-x86/kvm_x86_emulate.h
+++ b/include/asm-x86/kvm_x86_emulate.h
@@ -135,6 +135,7 @@ struct decode_cache {
        u8 modrm_rm;
        u8 use_modrm_ea;
        unsigned long modrm_ea;
+        void *modrm_ptr;
        unsigned long modrm_val;
        struct fetch_cache fetch;
 };
diff --git a/include/asm-x86/page.h b/include/asm-x86/page.h
index b381f4a5a0bd..dc936dddf161 100644
--- a/include/asm-x86/page.h
+++ b/include/asm-x86/page.h
@@ -10,8 +10,16 @@
 #ifdef __KERNEL__
-#define PHYSICAL_PAGE_MASK      (PAGE_MASK & __PHYSICAL_MASK)
+#define __PHYSICAL_MASK         ((phys_addr_t)(1ULL << __PHYSICAL_MASK_SHIFT) - 1)
-#define PTE_MASK                (_AT(long, PHYSICAL_PAGE_MASK))
+#define __VIRTUAL_MASK          ((1UL << __VIRTUAL_MASK_SHIFT) - 1)
+/* Cast PAGE_MASK to a signed type so that it is sign-extended if
+   virtual addresses are 32-bits but physical addresses are larger
+   (ie, 32-bit PAE). */
+#define PHYSICAL_PAGE_MASK      (((signed long)PAGE_MASK) & __PHYSICAL_MASK)
+/* PTE_MASK extracts the PFN from a (pte|pmd|pud|pgd)val_t */
+#define PTE_MASK                ((pteval_t)PHYSICAL_PAGE_MASK)
 #define PMD_PAGE_SIZE           (_AC(1, UL) << PMD_SHIFT)
 #define PMD_PAGE_MASK           (~(PMD_PAGE_SIZE-1))
@@ -24,9 +32,6 @@
 /* to align the pointer to the (next) page boundary */
 #define PAGE_ALIGN(addr)        (((addr)+PAGE_SIZE-1)&PAGE_MASK)
-#define __PHYSICAL_MASK         _AT(phys_addr_t, (_AC(1,ULL) << __PHYSICAL_MASK_SHIFT) - 1)
-#define __VIRTUAL_MASK          ((_AC(1,UL) << __VIRTUAL_MASK_SHIFT) - 1)
 #ifndef __ASSEMBLY__
 #include <linux/types.h>
 #endif
diff --git a/include/asm-x86/pgtable-3level.h b/include/asm-x86/pgtable-3level.h
index 8b4a9d44b7f4..c93dbb6c2624 100644
--- a/include/asm-x86/pgtable-3level.h
+++ b/include/asm-x86/pgtable-3level.h
@@ -120,9 +120,9 @@ static inline void pud_clear(pud_t *pudp)
                write_cr3(pgd);
 }
-#define pud_page(pud) ((struct page *) __va(pud_val(pud) & PAGE_MASK))
+#define pud_page(pud) ((struct page *) __va(pud_val(pud) & PTE_MASK))
-#define pud_page_vaddr(pud) ((unsigned long) __va(pud_val(pud) & PAGE_MASK))
+#define pud_page_vaddr(pud) ((unsigned long) __va(pud_val(pud) & PTE_MASK))
 /* Find an entry in the second-level page table.. */
@@ -160,7 +160,7 @@ static inline int pte_none(pte_t pte)
 static inline unsigned long pte_pfn(pte_t pte)
 {
-        return (pte_val(pte) & ~_PAGE_NX) >> PAGE_SHIFT;
+        return (pte_val(pte) & PTE_MASK) >> PAGE_SHIFT;
 }
 /*
diff --git a/include/asm-x86/pgtable.h b/include/asm-x86/pgtable.h
index 801b31f71452..97c271b2910b 100644
--- a/include/asm-x86/pgtable.h
+++ b/include/asm-x86/pgtable.h
@@ -57,7 +57,9 @@
 #define _KERNPG_TABLE   (_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED |    \
                         _PAGE_DIRTY)
-#define _PAGE_CHG_MASK  (PTE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY)
+/* Set of bits not changed in pte_modify */
+#define _PAGE_CHG_MASK  (PTE_MASK | _PAGE_PCD | _PAGE_PWT |             \
+                         _PAGE_ACCESSED | _PAGE_DIRTY)
 #define _PAGE_CACHE_MASK        (_PAGE_PCD | _PAGE_PWT)
 #define _PAGE_CACHE_WB          (0)
@@ -288,13 +290,22 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
         * Chop off the NX bit (if present), and add the NX portion of
         * the newprot (if present):
         */
-        val &= _PAGE_CHG_MASK & ~_PAGE_NX;
+        val &= _PAGE_CHG_MASK;
-        val |= pgprot_val(newprot) & __supported_pte_mask;
+        val |= pgprot_val(newprot) & (~_PAGE_CHG_MASK) & __supported_pte_mask;
        return __pte(val);
 }
-#define pte_pgprot(x) __pgprot(pte_val(x) & (0xfff | _PAGE_NX))
+/* mprotect needs to preserve PAT bits when updating vm_page_prot */
+#define pgprot_modify pgprot_modify
+static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot)
+{
+        pgprotval_t preservebits = pgprot_val(oldprot) & _PAGE_CHG_MASK;
+        pgprotval_t addbits = pgprot_val(newprot);
+        return __pgprot(preservebits | addbits);
+}
+#define pte_pgprot(x) __pgprot(pte_val(x) & ~PTE_MASK)
 #define canon_pgprot(p) __pgprot(pgprot_val(p) & __supported_pte_mask)
diff --git a/include/asm-x86/pgtable_32.h b/include/asm-x86/pgtable_32.h
index d7f0403bbecb..32ca03109a4c 100644
--- a/include/asm-x86/pgtable_32.h
+++ b/include/asm-x86/pgtable_32.h
@@ -88,7 +88,7 @@ extern unsigned long pg0[];
 /* To avoid harmful races, pmd_none(x) should check only the lower when PAE */
 #define pmd_none(x)     (!(unsigned long)pmd_val((x)))
 #define pmd_present(x)  (pmd_val((x)) & _PAGE_PRESENT)
-#define pmd_bad(x) ((pmd_val(x) & (~PAGE_MASK & ~_PAGE_USER)) != _KERNPG_TABLE)
+#define pmd_bad(x) ((pmd_val(x) & (~PTE_MASK & ~_PAGE_USER)) != _KERNPG_TABLE)
 #define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT))
@@ -159,7 +159,7 @@ static inline int pud_large(pud_t pud) { return 0; }
 #define pmd_page(pmd) (pfn_to_page(pmd_val((pmd)) >> PAGE_SHIFT))
 #define pmd_page_vaddr(pmd)                                     \
-        ((unsigned long)__va(pmd_val((pmd)) & PAGE_MASK))
+        ((unsigned long)__va(pmd_val((pmd)) & PTE_MASK))
 #if defined(CONFIG_HIGHPTE)
 #define pte_offset_map(dir, address)                                    \
diff --git a/include/asm-x86/pgtable_64.h b/include/asm-x86/pgtable_64.h
index efe83dcbd412..1cc50d22d735 100644
--- a/include/asm-x86/pgtable_64.h
+++ b/include/asm-x86/pgtable_64.h
@@ -151,19 +151,19 @@ static inline void native_pgd_clear(pgd_t *pgd)
 #ifndef __ASSEMBLY__
-static inline unsigned long pgd_bad(pgd_t pgd)
+static inline int pgd_bad(pgd_t pgd)
 {
-        return pgd_val(pgd) & ~(PTE_MASK | _KERNPG_TABLE | _PAGE_USER);
+        return (pgd_val(pgd) & ~(PTE_MASK | _PAGE_USER)) != _KERNPG_TABLE;
 }
-static inline unsigned long pud_bad(pud_t pud)
+static inline int pud_bad(pud_t pud)
 {
-        return pud_val(pud) & ~(PTE_MASK | _KERNPG_TABLE | _PAGE_USER);
+        return (pud_val(pud) & ~(PTE_MASK | _PAGE_USER)) != _KERNPG_TABLE;
 }
-static inline unsigned long pmd_bad(pmd_t pmd)
+static inline int pmd_bad(pmd_t pmd)
 {
-        return pmd_val(pmd) & ~(PTE_MASK | _KERNPG_TABLE | _PAGE_USER);
+        return (pmd_val(pmd) & ~(PTE_MASK | _PAGE_USER)) != _KERNPG_TABLE;
 }
 #define pte_none(x)     (!pte_val((x)))
diff --git a/include/asm-x86/tlbflush.h b/include/asm-x86/tlbflush.h
index 0c0674d94255..35c76ceb9f40 100644
--- a/include/asm-x86/tlbflush.h
+++ b/include/asm-x86/tlbflush.h
@@ -22,12 +22,23 @@ static inline void __native_flush_tlb(void)
 static inline void __native_flush_tlb_global(void)
 {
-        unsigned long cr4 = read_cr4();
+        unsigned long flags;
+        unsigned long cr4;
+        /*
+         * Read-modify-write to CR4 - protect it from preemption and
+         * from interrupts. (Use the raw variant because this code can
+         * be called from deep inside debugging code.)
+         */
+        raw_local_irq_save(flags);
+        cr4 = read_cr4();
        /* clear PGE */
        write_cr4(cr4 & ~X86_CR4_PGE);
        /* write old PGE again and flush TLBs */
        write_cr4(cr4);
+        raw_local_irq_restore(flags);
 }
 static inline void __native_flush_tlb_single(unsigned long addr)
diff --git a/include/asm-x86/xen/page.h b/include/asm-x86/xen/page.h
index 01799305f02a..baf3a4dce28c 100644
--- a/include/asm-x86/xen/page.h
+++ b/include/asm-x86/xen/page.h
@@ -127,7 +127,7 @@ static inline void set_phys_to_machine(unsigned long pfn, unsigned long mfn)
 static inline unsigned long pte_mfn(pte_t pte)
 {
-        return (pte.pte & ~_PAGE_NX) >> PAGE_SHIFT;
+        return (pte.pte & PTE_MASK) >> PAGE_SHIFT;
 }
 static inline pte_t mfn_pte(unsigned long page_nr, pgprot_t pgprot)
diff --git a/include/asm-xtensa/param.h b/include/asm-xtensa/param.h
index 82ad34d92d35..ba03d5aeab6b 100644
--- a/include/asm-xtensa/param.h
+++ b/include/asm-xtensa/param.h
@@ -15,6 +15,8 @@
 # define HZ             CONFIG_HZ       /* internal timer frequency */
 # define USER_HZ        100             /* for user interfaces in "ticks" */
 # define CLOCKS_PER_SEC (USER_HZ)       /* frequnzy at which times() counts */
+#else
+# define HZ             100
 #endif
 #define EXEC_PAGESIZE   4096
diff --git a/include/linux/Kbuild b/include/linux/Kbuild
index b7d81b2a9041..93b98856007a 100644
--- a/include/linux/Kbuild
+++ b/include/linux/Kbuild
@@ -92,7 +92,6 @@ header-y += if_slip.h
 header-y += if_strip.h
 header-y += if_tun.h
 header-y += if_tunnel.h
-header-y += in6.h
 header-y += in_route.h
 header-y += ioctl.h
 header-y += ip6_tunnel.h
@@ -105,7 +104,6 @@ header-y += ixjuser.h
 header-y += jffs2.h
 header-y += keyctl.h
 header-y += limits.h
-header-y += dlm_plock.h
 header-y += magic.h
 header-y += major.h
 header-y += matroxfb.h
@@ -190,6 +188,7 @@ unifdef-y += cyclades.h
 unifdef-y += dccp.h
 unifdef-y += dirent.h
 unifdef-y += dlm.h
+unifdef-y += dlm_plock.h
 unifdef-y += edd.h
 unifdef-y += elf.h
 unifdef-y += elfcore.h
@@ -236,6 +235,7 @@ unifdef-y += if_vlan.h
 unifdef-y += igmp.h
 unifdef-y += inet_diag.h
 unifdef-y += in.h
+unifdef-y += in6.h
 unifdef-y += inotify.h
 unifdef-y += input.h
 unifdef-y += ip.h
diff --git a/include/linux/atm.h b/include/linux/atm.h
index 60136684e0af..c791ddd96939 100644
--- a/include/linux/atm.h
+++ b/include/linux/atm.h
@@ -16,14 +16,11 @@
 * documentation. Do not change them.
 */
-#ifdef __KERNEL__
-#include <linux/socket.h>
-#include <linux/types.h>
-#endif
 #include <linux/compiler.h>
 #include <linux/atmapi.h>
 #include <linux/atmsap.h>
 #include <linux/atmioc.h>
+#include <linux/types.h>
 /* general ATM constants */
@@ -212,7 +209,7 @@ struct sockaddr_atmsvc {
        char            pub[ATM_E164_LEN+1]; /* public address (E.164) */
                                        /* unused addresses must be bzero'ed */
        char            lij_type;       /* role in LIJ call; one of ATM_LIJ* */
-        uint32_t        lij_id;         /* LIJ call identifier */
+        __u32   lij_id;         /* LIJ call identifier */
    } sas_addr __ATM_API_ALIGN;         /* SVC address */
 };
diff --git a/include/linux/atm_tcp.h b/include/linux/atm_tcp.h
index 18787f9b2f19..375638f8554b 100644
--- a/include/linux/atm_tcp.h
+++ b/include/linux/atm_tcp.h
@@ -8,11 +8,9 @@
 #define LINUX_ATM_TCP_H
 #include <linux/atmapi.h>
+#include <linux/atm.h>
-#ifdef __KERNEL__
-#include <linux/types.h>
-#endif
 #include <linux/atmioc.h>
+#include <linux/types.h>
 /*
@@ -20,9 +18,9 @@
 */
 struct atmtcp_hdr {
-        uint16_t        vpi;
+        __u16   vpi;
-        uint16_t        vci;
+        __u16   vci;
-        uint32_t        length;         /* ... of data part */
+        __u32   length;         /* ... of data part */
 };
 /*
diff --git a/include/linux/binfmts.h b/include/linux/binfmts.h
index b512e48f6d8e..ee0ed48e8348 100644
--- a/include/linux/binfmts.h
+++ b/include/linux/binfmts.h
@@ -99,6 +99,7 @@ extern int copy_strings_kernel(int argc,char ** argv,struct linux_binprm *bprm);
 extern void compute_creds(struct linux_binprm *binprm);
 extern int do_coredump(long signr, int exit_code, struct pt_regs * regs);
 extern int set_binfmt(struct linux_binfmt *new);
+extern void free_bprm(struct linux_binprm *);
 #endif /* __KERNEL__ */
 #endif /* _LINUX_BINFMTS_H */
diff --git a/include/linux/bitmap.h b/include/linux/bitmap.h
index 43b406def35f..1abfe664c444 100644
--- a/include/linux/bitmap.h
+++ b/include/linux/bitmap.h
@@ -110,7 +110,6 @@ extern int __bitmap_weight(const unsigned long *bitmap, int bits);
 extern int bitmap_scnprintf(char *buf, unsigned int len,
                        const unsigned long *src, int nbits);
-extern int bitmap_scnprintf_len(unsigned int len);
 extern int __bitmap_parse(const char *buf, unsigned int buflen, int is_user,
                        unsigned long *dst, int nbits);
 extern int bitmap_parse_user(const char __user *ubuf, unsigned int ulen,
diff --git a/include/linux/bitrev.h b/include/linux/bitrev.h
index 05e540d6963a..7ffe03f4693d 100644
--- a/include/linux/bitrev.h
+++ b/include/linux/bitrev.h
@@ -10,6 +10,7 @@ static inline u8 bitrev8(u8 byte)
        return byte_rev_table[byte];
 }
+extern u16 bitrev16(u16 in);
 extern u32 bitrev32(u32 in);
 #endif /* _LINUX_BITREV_H */
diff --git a/include/linux/blktrace_api.h b/include/linux/blktrace_api.h
index cfc3147e5cf9..e3ef903aae88 100644
--- a/include/linux/blktrace_api.h
+++ b/include/linux/blktrace_api.h
@@ -55,6 +55,7 @@ enum blktrace_act {
 enum blktrace_notify {
        __BLK_TN_PROCESS = 0,           /* establish pid/name mapping */
        __BLK_TN_TIMESTAMP,             /* include system clock */
+        __BLK_TN_MESSAGE,               /* Character string message */
 };
@@ -79,6 +80,7 @@ enum blktrace_notify {
 #define BLK_TN_PROCESS          (__BLK_TN_PROCESS | BLK_TC_ACT(BLK_TC_NOTIFY))
 #define BLK_TN_TIMESTAMP        (__BLK_TN_TIMESTAMP | BLK_TC_ACT(BLK_TC_NOTIFY))
+#define BLK_TN_MESSAGE          (__BLK_TN_MESSAGE | BLK_TC_ACT(BLK_TC_NOTIFY))
 #define BLK_IO_TRACE_MAGIC      0x65617400
 #define BLK_IO_TRACE_VERSION    0x07
@@ -119,6 +121,7 @@ struct blk_trace {
        int trace_state;
        struct rchan *rchan;
        unsigned long *sequence;
+        unsigned char *msg_data;
        u16 act_mask;
        u64 start_lba;
        u64 end_lba;
@@ -149,7 +152,28 @@ extern void blk_trace_shutdown(struct request_queue *);
 extern void __blk_add_trace(struct blk_trace *, sector_t, int, int, u32, int, int, void *);
 extern int do_blk_trace_setup(struct request_queue *q,
        char *name, dev_t dev, struct blk_user_trace_setup *buts);
+extern void __trace_note_message(struct blk_trace *, const char *fmt, ...);
+/**
+ * blk_add_trace_msg - Add a (simple) message to the blktrace stream
+ * @q:          queue the io is for
+ * @fmt:        format to print message in
+ * args...      Variable argument list for format
+ *
+ * Description:
+ *     Records a (simple) message onto the blktrace stream.
+ *
+ *     NOTE: BLK_TN_MAX_MSG characters are output at most.
+ *     NOTE: Can not use 'static inline' due to presence of var args...
+ *
+ **/
+#define blk_add_trace_msg(q, fmt, ...)                                  \
+        do {                                                            \
+                struct blk_trace *bt = (q)->blk_trace;                  \
+                if (unlikely(bt))                                       \
+                        __trace_note_message(bt, fmt, ##__VA_ARGS__);   \
+        } while (0)
+#define BLK_TN_MAX_MSG          128
 /**
 * blk_add_trace_rq - Add a trace for a request oriented action
@@ -299,6 +323,8 @@ extern int blk_trace_remove(struct request_queue *q);
 #define blk_trace_setup(q, name, dev, arg)      (-ENOTTY)
 #define blk_trace_startstop(q, start)           (-ENOTTY)
 #define blk_trace_remove(q)                     (-ENOTTY)
+#define blk_add_trace_msg(q, fmt, ...)          do { } while (0)
 #endif /* CONFIG_BLK_DEV_IO_TRACE */
 #endif /* __KERNEL__ */
 #endif
diff --git a/include/linux/capability.h b/include/linux/capability.h
index f4ea0dd9a618..fa830f8de032 100644
--- a/include/linux/capability.h
+++ b/include/linux/capability.h
@@ -31,11 +31,11 @@ struct task_struct;
 #define _LINUX_CAPABILITY_VERSION_1  0x19980330
 #define _LINUX_CAPABILITY_U32S_1     1
-#define _LINUX_CAPABILITY_VERSION_2  0x20071026
+#define _LINUX_CAPABILITY_VERSION_2  0x20071026  /* deprecated - use v3 */
 #define _LINUX_CAPABILITY_U32S_2     2
-#define _LINUX_CAPABILITY_VERSION    _LINUX_CAPABILITY_VERSION_2
+#define _LINUX_CAPABILITY_VERSION_3  0x20080522
-#define _LINUX_CAPABILITY_U32S       _LINUX_CAPABILITY_U32S_2
+#define _LINUX_CAPABILITY_U32S_3     2
 typedef struct __user_cap_header_struct {
        __u32 version;
@@ -77,10 +77,23 @@ struct vfs_cap_data {
        } data[VFS_CAP_U32];
 };
-#ifdef __KERNEL__
+#ifndef __KERNEL__
+/*
+ * Backwardly compatible definition for source code - trapped in a
+ * 32-bit world. If you find you need this, please consider using
+ * libcap to untrap yourself...
+ */
+#define _LINUX_CAPABILITY_VERSION  _LINUX_CAPABILITY_VERSION_1
+#define _LINUX_CAPABILITY_U32S     _LINUX_CAPABILITY_U32S_1
+#else
+#define _KERNEL_CAPABILITY_VERSION _LINUX_CAPABILITY_VERSION_3
+#define _KERNEL_CAPABILITY_U32S    _LINUX_CAPABILITY_U32S_3
 typedef struct kernel_cap_struct {
-        __u32 cap[_LINUX_CAPABILITY_U32S];
+        __u32 cap[_KERNEL_CAPABILITY_U32S];
 } kernel_cap_t;
 #define _USER_CAP_HEADER_SIZE  (sizeof(struct __user_cap_header_struct))
@@ -351,7 +364,7 @@ typedef struct kernel_cap_struct {
 */
 #define CAP_FOR_EACH_U32(__capi)  \
-        for (__capi = 0; __capi < _LINUX_CAPABILITY_U32S; ++__capi)
+        for (__capi = 0; __capi < _KERNEL_CAPABILITY_U32S; ++__capi)
 # define CAP_FS_MASK_B0     (CAP_TO_MASK(CAP_CHOWN)             \
                            | CAP_TO_MASK(CAP_DAC_OVERRIDE)     \
@@ -361,7 +374,7 @@ typedef struct kernel_cap_struct {
 # define CAP_FS_MASK_B1     (CAP_TO_MASK(CAP_MAC_OVERRIDE))
-#if _LINUX_CAPABILITY_U32S != 2
+#if _KERNEL_CAPABILITY_U32S != 2
 # error Fix up hand-coded capability macro initializers
 #else /* HAND-CODED capability initializers */
@@ -372,7 +385,7 @@ typedef struct kernel_cap_struct {
 # define CAP_NFSD_SET     ((kernel_cap_t){{ CAP_FS_MASK_B0|CAP_TO_MASK(CAP_SYS_RESOURCE), \
                                        CAP_FS_MASK_B1 } })
-#endif /* _LINUX_CAPABILITY_U32S != 2 */
+#endif /* _KERNEL_CAPABILITY_U32S != 2 */
 #define CAP_INIT_INH_SET    CAP_EMPTY_SET
diff --git a/include/linux/cpuidle.h b/include/linux/cpuidle.h
index 51e6b1e520e6..dcf77fa826b5 100644
--- a/include/linux/cpuidle.h
+++ b/include/linux/cpuidle.h
@@ -82,6 +82,7 @@ struct cpuidle_state_kobj {
 };
 struct cpuidle_device {
+        unsigned int            registered:1;
        unsigned int            enabled:1;
        unsigned int            cpu;
diff --git a/include/linux/cpumask.h b/include/linux/cpumask.h
index 9650806fe2ea..5df3db58fcc6 100644
--- a/include/linux/cpumask.h
+++ b/include/linux/cpumask.h
@@ -289,13 +289,6 @@ static inline int __cpumask_scnprintf(char *buf, int len,
        return bitmap_scnprintf(buf, len, srcp->bits, nbits);
 }
-#define cpumask_scnprintf_len(len) \
-                        __cpumask_scnprintf_len((len))
-static inline int __cpumask_scnprintf_len(int len)
-{
-        return bitmap_scnprintf_len(len);
-}
 #define cpumask_parse_user(ubuf, ulen, dst) \
                        __cpumask_parse_user((ubuf), (ulen), &(dst), NR_CPUS)
 static inline int __cpumask_parse_user(const char __user *buf, int len,
diff --git a/include/linux/device.h b/include/linux/device.h
index 8c23e3dfe3ac..6a2d04c011bc 100644
--- a/include/linux/device.h
+++ b/include/linux/device.h
@@ -183,7 +183,6 @@ struct class {
        struct module           *owner;
        struct kset             subsys;
-        struct list_head        children;
        struct list_head        devices;
        struct list_head        interfaces;
        struct kset             class_dirs;
@@ -386,6 +385,9 @@ static inline const char *dev_name(struct device *dev)
        return dev->bus_id;
 }
+extern int dev_set_name(struct device *dev, const char *name, ...)
+                        __attribute__((format(printf, 2, 3)));
 #ifdef CONFIG_NUMA
 static inline int dev_to_node(struct device *dev)
 {
@@ -450,9 +452,21 @@ extern int __must_check device_reprobe(struct device *dev);
 /*
 * Easy functions for dynamically creating devices on the fly
 */
+extern struct device *device_create_vargs(struct class *cls,
+                                          struct device *parent,
+                                          dev_t devt,
+                                          void *drvdata,
+                                          const char *fmt,
+                                          va_list vargs);
 extern struct device *device_create(struct class *cls, struct device *parent,
                                    dev_t devt, const char *fmt, ...)
                                    __attribute__((format(printf, 4, 5)));
+extern struct device *device_create_drvdata(struct class *cls,
+                                            struct device *parent,
+                                            dev_t devt,
+                                            void *drvdata,
+                                            const char *fmt, ...)
+                                    __attribute__((format(printf, 5, 6)));
 extern void device_destroy(struct class *cls, dev_t devt);
 /*
diff --git a/include/linux/fdtable.h b/include/linux/fdtable.h
index a118f3c0b240..4aab6f12cfab 100644
--- a/include/linux/fdtable.h
+++ b/include/linux/fdtable.h
@@ -93,6 +93,7 @@ struct files_struct *get_files_struct(struct task_struct *);
 void put_files_struct(struct files_struct *fs);
 void reset_files_struct(struct files_struct *);
 int unshare_files(struct files_struct **);
+struct files_struct *dup_fd(struct files_struct *, int *);
 extern struct kmem_cache *files_cachep;
diff --git a/include/linux/fs.h b/include/linux/fs.h
index f413085f748e..d490779f18d9 100644
--- a/include/linux/fs.h
+++ b/include/linux/fs.h
@@ -2000,7 +2000,10 @@ extern int simple_fill_super(struct super_block *, int, struct tree_descr *);
 extern int simple_pin_fs(struct file_system_type *, struct vfsmount **mount, int *count);
 extern void simple_release_fs(struct vfsmount **mount, int *count);
-extern ssize_t simple_read_from_buffer(void __user *, size_t, loff_t *, const void *, size_t);
+extern ssize_t simple_read_from_buffer(void __user *to, size_t count,
+                        loff_t *ppos, const void *from, size_t available);
+extern ssize_t memory_read_from_buffer(void *to, size_t count, loff_t *ppos,
+                        const void *from, size_t available);
 #ifdef CONFIG_MIGRATION
 extern int buffer_migrate_page(struct address_space *,
diff --git a/include/linux/fuse.h b/include/linux/fuse.h
index 5c86f1196c3a..d48282197696 100644
--- a/include/linux/fuse.h
+++ b/include/linux/fuse.h
@@ -109,6 +109,7 @@ struct fuse_file_lock {
 #define FUSE_POSIX_LOCKS        (1 << 1)
 #define FUSE_FILE_OPS           (1 << 2)
 #define FUSE_ATOMIC_O_TRUNC     (1 << 3)
+#define FUSE_BIG_WRITES         (1 << 5)
 /**
 * Release flags
diff --git a/include/linux/genhd.h b/include/linux/genhd.h
index e9874e7fcdf9..ae7aec3cabee 100644
--- a/include/linux/genhd.h
+++ b/include/linux/genhd.h
@@ -525,7 +525,7 @@ struct unixware_disklabel {
 #define ADDPART_FLAG_RAID       1
 #define ADDPART_FLAG_WHOLEDISK  2
-extern dev_t blk_lookup_devt(const char *name);
+extern dev_t blk_lookup_devt(const char *name, int part);
 extern char *disk_name (struct gendisk *hd, int part, char *buf);
 extern int rescan_partitions(struct gendisk *disk, struct block_device *bdev);
@@ -553,7 +553,7 @@ static inline struct block_device *bdget_disk(struct gendisk *disk, int index)
 static inline void printk_all_partitions(void) { }
-static inline dev_t blk_lookup_devt(const char *name)
+static inline dev_t blk_lookup_devt(const char *name, int part)
 {
        dev_t devt = MKDEV(0, 0);
        return devt;
diff --git a/include/linux/gpio.h b/include/linux/gpio.h
index 4987a84078ef..98be6c5762b9 100644
--- a/include/linux/gpio.h
+++ b/include/linux/gpio.h
@@ -8,6 +8,9 @@
 #else
+#include <linux/types.h>
+#include <linux/errno.h>
 /*
 * Some platforms don't support the GPIO programming interface.
 *
diff --git a/include/linux/hid.h b/include/linux/hid.h
index 4ce3b7a979ba..fe56b86f2c67 100644
--- a/include/linux/hid.h
+++ b/include/linux/hid.h
@@ -2,8 +2,6 @@
 #define __HID_H
 /*
- * $Id: hid.h,v 1.24 2001/12/27 10:37:41 vojtech Exp $
- *
 *  Copyright (c) 1999 Andreas Gal
 *  Copyright (c) 2000-2001 Vojtech Pavlik
 *  Copyright (c) 2006-2007 Jiri Kosina
@@ -285,6 +283,7 @@ struct hid_item {
 #define HID_QUIRK_HWHEEL_WHEEL_INVERT           0x04000000
 #define HID_QUIRK_MICROSOFT_KEYS                0x08000000
 #define HID_QUIRK_FULLSPEED_INTERVAL            0x10000000
+#define HID_QUIRK_APPLE_NUMLOCK_EMULATION       0x20000000
 /*
 * Separate quirks for runtime report descriptor fixup
diff --git a/include/linux/hiddev.h b/include/linux/hiddev.h
index acbdae6d7ae1..a416b904ba90 100644
--- a/include/linux/hiddev.h
+++ b/include/linux/hiddev.h
@@ -2,8 +2,6 @@
 #define _HIDDEV_H
 /*
- * $Id: hiddev.h,v 1.2 2001/04/26 11:26:09 vojtech Exp $
- *
 *  Copyright (c) 1999-2000 Vojtech Pavlik
 *
 *  Sponsored by SuSE
diff --git a/include/linux/i2c.h b/include/linux/i2c.h
index 6716ec808c5e..fb9af6a0fe9c 100644
--- a/include/linux/i2c.h
+++ b/include/linux/i2c.h
@@ -155,8 +155,6 @@ struct i2c_driver {
 * @driver: device's driver, hence pointer to access routines
 * @dev: Driver model device node for the slave.
 * @irq: indicates the IRQ generated by this device (if any)
- * @driver_name: Identifies new-style driver used with this device; also
- *      used as the module name for hotplug/coldplug modprobe support.
 * @list: list of active/busy clients (DEPRECATED)
 * @released: used to synchronize client releases & detaches and references
 *
@@ -174,7 +172,6 @@ struct i2c_client {
        struct i2c_driver *driver;      /* and our access routines      */
        struct device dev;              /* the device structure         */
        int irq;                        /* irq issued by device (or -1) */
-        char driver_name[KOBJ_NAME_LEN];
        struct list_head list;          /* DEPRECATED */
        struct completion released;
 };
@@ -200,8 +197,7 @@ static inline void i2c_set_clientdata (struct i2c_client *dev, void *data)
 /**
 * struct i2c_board_info - template for device creation
- * @driver_name: identifies the driver to be bound to the device
+ * @type: chip type, to initialize i2c_client.name
- * @type: optional chip type information, to initialize i2c_client.name
 * @flags: to initialize i2c_client.flags
 * @addr: stored in i2c_client.addr
 * @platform_data: stored in i2c_client.dev.platform_data
@@ -220,7 +216,6 @@ static inline void i2c_set_clientdata (struct i2c_client *dev, void *data)
 * with the adapter already known.
 */
 struct i2c_board_info {
-        char            driver_name[KOBJ_NAME_LEN];
        char            type[I2C_NAME_SIZE];
        unsigned short  flags;
        unsigned short  addr;
diff --git a/include/linux/i2c/pcf857x.h b/include/linux/i2c/pcf857x.h
index ba8ea6e16476..0767a2a6b2f1 100644
--- a/include/linux/i2c/pcf857x.h
+++ b/include/linux/i2c/pcf857x.h
@@ -12,8 +12,7 @@
 * @context: optional parameter passed to setup() and teardown()
 *
 * In addition to the I2C_BOARD_INFO() state appropriate to each chip,
- * the i2c_board_info used with the pcf875x driver must provide the
+ * the i2c_board_info used with the pcf875x driver must provide its
- * chip "type" ("pcf8574", "pcf8574a", "pcf8575", "pcf8575c") and its
 * platform_data (pointer to one of these structures) with at least
 * the gpio_base value initialized.
 *
diff --git a/include/linux/ide.h b/include/linux/ide.h
index b0135b0c3a04..9918772bf274 100644
--- a/include/linux/ide.h
+++ b/include/linux/ide.h
@@ -153,7 +153,7 @@ enum {		ide_unknown,	ide_generic,	ide_pci,
                ide_qd65xx,     ide_umc8672,    ide_ht6560b,
                ide_rz1000,     ide_trm290,
                ide_cmd646,     ide_cy82c693,   ide_4drives,
-                ide_pmac,       ide_etrax100,   ide_acorn,
+                ide_pmac,       ide_acorn,
                ide_au1xxx,     ide_palm3710
 };
@@ -965,7 +965,6 @@ typedef struct ide_task_s {
 void ide_tf_dump(const char *, struct ide_taskfile *);
 extern void SELECT_DRIVE(ide_drive_t *);
-extern void SELECT_MASK(ide_drive_t *, int);
 extern int drive_is_ready(ide_drive_t *);
@@ -1058,8 +1057,8 @@ enum {
        IDE_HFLAG_NO_SET_MODE           = (1 << 9),
        /* trust BIOS for programming chipset/device for DMA */
        IDE_HFLAG_TRUST_BIOS_FOR_DMA    = (1 << 10),
-        /* host uses VDMA (tied with IDE_HFLAG_CS5520 for now) */
+        /* host is CS5510/CS5520 */
-        IDE_HFLAG_VDMA                  = (1 << 11),
+        IDE_HFLAG_CS5520                = (1 << 11),
        /* ATAPI DMA is unsupported */
        IDE_HFLAG_NO_ATAPI_DMA          = (1 << 12),
        /* set if host is a "non-bootable" controller */
@@ -1070,8 +1069,6 @@ enum {
        IDE_HFLAG_NO_AUTODMA            = (1 << 15),
        /* host uses MMIO */
        IDE_HFLAG_MMIO                  = (1 << 16),
-        /* host is CS5510/CS5520 */
-        IDE_HFLAG_CS5520                = IDE_HFLAG_VDMA,
        /* no LBA48 */
        IDE_HFLAG_NO_LBA48              = (1 << 17),
        /* no LBA48 DMA */
@@ -1101,6 +1098,8 @@ enum {
        IDE_HFLAG_NO_IO_32BIT           = (1 << 30),
        /* never unmask IRQs */
        IDE_HFLAG_NO_UNMASK_IRQS        = (1 << 31),
+        /* host uses VDMA (disabled for now) */
+        IDE_HFLAG_VDMA                  = 0,
 };
 #ifdef CONFIG_BLK_DEV_OFFBOARD
diff --git a/include/linux/in_route.h b/include/linux/in_route.h
index 61f25c30a2a0..b261b8c915f0 100644
--- a/include/linux/in_route.h
+++ b/include/linux/in_route.h
@@ -10,19 +10,19 @@
 #define RTCF_NOPMTUDISC RTM_F_NOPMTUDISC
 #define RTCF_NOTIFY     0x00010000
-#define RTCF_DIRECTDST  0x00020000
+#define RTCF_DIRECTDST  0x00020000 /* unused */
 #define RTCF_REDIRECTED 0x00040000
-#define RTCF_TPROXY     0x00080000
+#define RTCF_TPROXY     0x00080000 /* unused */
-#define RTCF_FAST       0x00200000
+#define RTCF_FAST       0x00200000 /* unused */
-#define RTCF_MASQ       0x00400000
+#define RTCF_MASQ       0x00400000 /* unused */
-#define RTCF_SNAT       0x00800000
+#define RTCF_SNAT       0x00800000 /* unused */
 #define RTCF_DOREDIRECT 0x01000000
 #define RTCF_DIRECTSRC  0x04000000
 #define RTCF_DNAT       0x08000000
 #define RTCF_BROADCAST  0x10000000
 #define RTCF_MULTICAST  0x20000000
-#define RTCF_REJECT     0x40000000
+#define RTCF_REJECT     0x40000000 /* unused */
 #define RTCF_LOCAL      0x80000000
 #define RTCF_NAT        (RTCF_DNAT|RTCF_SNAT)
diff --git a/include/linux/inetdevice.h b/include/linux/inetdevice.h
index 7009b0cdd06f..c6f51ad52d5b 100644
--- a/include/linux/inetdevice.h
+++ b/include/linux/inetdevice.h
@@ -117,7 +117,6 @@ struct in_ifaddr
        __be32                  ifa_address;
        __be32                  ifa_mask;
        __be32                  ifa_broadcast;
-        __be32                  ifa_anycast;
        unsigned char           ifa_scope;
        unsigned char           ifa_flags;
        unsigned char           ifa_prefixlen;
diff --git a/include/linux/init_task.h b/include/linux/init_task.h
index b24c2875aa05..9927a88674a3 100644
--- a/include/linux/init_task.h
+++ b/include/linux/init_task.h
@@ -1,7 +1,6 @@
 #ifndef _LINUX__INIT_TASK_H
 #define _LINUX__INIT_TASK_H
-#include <linux/fdtable.h>
 #include <linux/rcupdate.h>
 #include <linux/irqflags.h>
 #include <linux/utsname.h>
@@ -12,27 +11,7 @@
 #include <linux/securebits.h>
 #include <net/net_namespace.h>
-#define INIT_FDTABLE \
+extern struct files_struct init_files;
-{                                                       \
-        .max_fds        = NR_OPEN_DEFAULT,              \
-        .fd             = &init_files.fd_array[0],      \
-        .close_on_exec  = (fd_set *)&init_files.close_on_exec_init, \
-        .open_fds       = (fd_set *)&init_files.open_fds_init,  \
-        .rcu            = RCU_HEAD_INIT,                \
-        .next           = NULL,                         \
-}
-#define INIT_FILES \
-{                                                       \
-        .count          = ATOMIC_INIT(1),               \
-        .fdt            = &init_files.fdtab,            \
-        .fdtab          = INIT_FDTABLE,                 \
-        .file_lock      = __SPIN_LOCK_UNLOCKED(init_task.file_lock), \
-        .next_fd        = 0,                            \
-        .close_on_exec_init = { { 0, } },               \
-        .open_fds_init  = { { 0, } },                   \
-        .fd_array       = { NULL, }                     \
-}
 #define INIT_KIOCTX(name, which_mm) \
 {                                                       \
diff --git a/include/linux/input.h b/include/linux/input.h
index 28a094fcfe20..e075c4b762fb 100644
--- a/include/linux/input.h
+++ b/include/linux/input.h
@@ -637,7 +637,9 @@ struct input_absinfo {
 #define SW_LID                  0x00  /* set = lid shut */
 #define SW_TABLET_MODE          0x01  /* set = tablet mode */
 #define SW_HEADPHONE_INSERT     0x02  /* set = inserted */
-#define SW_RADIO                0x03  /* set = radio enabled */
+#define SW_RFKILL_ALL           0x03  /* rfkill master switch, type "any"
+                                         set = radio enabled */
+#define SW_RADIO                SW_RFKILL_ALL   /* deprecated */
 #define SW_MAX                  0x0f
 #define SW_CNT                  (SW_MAX+1)
diff --git a/include/linux/ioport.h b/include/linux/ioport.h
index d5d40a9f7929..c6801bffe76d 100644
--- a/include/linux/ioport.h
+++ b/include/linux/ioport.h
@@ -53,14 +53,14 @@ struct resource_list {
 #define IORESOURCE_AUTO         0x40000000
 #define IORESOURCE_BUSY         0x80000000      /* Driver has marked this resource busy */
-/* ISA PnP IRQ specific bits (IORESOURCE_BITS) */
+/* PnP IRQ specific bits (IORESOURCE_BITS) */
 #define IORESOURCE_IRQ_HIGHEDGE         (1<<0)
 #define IORESOURCE_IRQ_LOWEDGE          (1<<1)
 #define IORESOURCE_IRQ_HIGHLEVEL        (1<<2)
 #define IORESOURCE_IRQ_LOWLEVEL         (1<<3)
 #define IORESOURCE_IRQ_SHAREABLE        (1<<4)
-/* ISA PnP DMA specific bits (IORESOURCE_BITS) */
+/* PnP DMA specific bits (IORESOURCE_BITS) */
 #define IORESOURCE_DMA_TYPE_MASK        (3<<0)
 #define IORESOURCE_DMA_8BIT             (0<<0)
 #define IORESOURCE_DMA_8AND16BIT        (1<<0)
@@ -76,7 +76,7 @@ struct resource_list {
 #define IORESOURCE_DMA_TYPEB            (2<<6)
 #define IORESOURCE_DMA_TYPEF            (3<<6)
-/* ISA PnP memory I/O specific bits (IORESOURCE_BITS) */
+/* PnP memory I/O specific bits (IORESOURCE_BITS) */
 #define IORESOURCE_MEM_WRITEABLE        (1<<0)  /* dup: IORESOURCE_READONLY */
 #define IORESOURCE_MEM_CACHEABLE        (1<<1)  /* dup: IORESOURCE_CACHEABLE */
 #define IORESOURCE_MEM_RANGELENGTH      (1<<2)  /* dup: IORESOURCE_RANGELENGTH */
diff --git a/include/linux/ipv6.h b/include/linux/ipv6.h
index 10b666b61add..cde056e08181 100644
--- a/include/linux/ipv6.h
+++ b/include/linux/ipv6.h
@@ -396,8 +396,10 @@ static inline struct request_sock *inet6_reqsk_alloc(struct request_sock_ops *op
 {
        struct request_sock *req = reqsk_alloc(ops);
-        if (req != NULL)
+        if (req != NULL) {
                inet_rsk(req)->inet6_rsk_offset = inet6_rsk_offset(req);
+                inet6_rsk(req)->pktopts = NULL;
+        }
        return req;
 }
diff --git a/include/linux/jbd2.h b/include/linux/jbd2.h
index 05e2b307161a..d147f0f90360 100644
--- a/include/linux/jbd2.h
+++ b/include/linux/jbd2.h
@@ -919,6 +919,9 @@ struct journal_s
        struct proc_dir_entry   *j_proc_entry;
        struct transaction_stats_s j_stats;
+        /* Failed journal commit ID */
+        unsigned int            j_failed_commit;
        /*
         * An opaque pointer to fs-private information.  ext3 puts its
         * superblock pointer here
diff --git a/include/linux/kallsyms.h b/include/linux/kallsyms.h
index 82de2fb62cb7..00c1801099fa 100644
--- a/include/linux/kallsyms.h
+++ b/include/linux/kallsyms.h
@@ -83,16 +83,6 @@ __attribute__((format(printf,1,2)));
 static inline void __check_printsym_format(const char *fmt, ...)
 {
 }
-/* ia64 and ppc64 use function descriptors, which contain the real address */
-#if defined(CONFIG_IA64) || defined(CONFIG_PPC64)
-#define print_fn_descriptor_symbol(fmt, addr)           \
-do {                                            \
-        unsigned long *__faddr = (unsigned long*) addr;         \
-        print_symbol(fmt, __faddr[0]);          \
-} while (0)
-#else
-#define print_fn_descriptor_symbol(fmt, addr) print_symbol(fmt, addr)
-#endif
 static inline void print_symbol(const char *fmt, unsigned long addr)
 {
@@ -101,6 +91,20 @@ static inline void print_symbol(const char *fmt, unsigned long addr)
                       __builtin_extract_return_addr((void *)addr));
 }
+/*
+ * Pretty-print a function pointer.
+ *
+ * ia64 and ppc64 function pointers are really function descriptors,
+ * which contain a pointer the real address.
+ */
+static inline void print_fn_descriptor_symbol(const char *fmt, void *addr)
+{
+#if defined(CONFIG_IA64) || defined(CONFIG_PPC64)
+        addr = *(void **)addr;
+#endif
+        print_symbol(fmt, (unsigned long)addr);
+}
 #ifndef CONFIG_64BIT
 #define print_ip_sym(ip)                \
 do {                                    \
diff --git a/include/linux/kernel.h b/include/linux/kernel.h
index 4d46e299afb5..792bf0aa779b 100644
--- a/include/linux/kernel.h
+++ b/include/linux/kernel.h
@@ -276,7 +276,17 @@ extern void print_hex_dump(const char *level, const char *prefix_str,
                                const void *buf, size_t len, bool ascii);
 extern void print_hex_dump_bytes(const char *prefix_str, int prefix_type,
                        const void *buf, size_t len);
-#define hex_asc(x)      "0123456789abcdef"[x]
+extern const char hex_asc[];
+#define hex_asc_lo(x)   hex_asc[((x) & 0x0f)]
+#define hex_asc_hi(x)   hex_asc[((x) & 0xf0) >> 4]
+static inline char *pack_hex_byte(char *buf, u8 byte)
+{
+        *buf++ = hex_asc_hi(byte);
+        *buf++ = hex_asc_lo(byte);
+        return buf;
+}
 #define pr_emerg(fmt, arg...) \
        printk(KERN_EMERG fmt, ##arg)
diff --git a/include/linux/kvm_host.h b/include/linux/kvm_host.h
index 398978972b7a..092b1b25291d 100644
--- a/include/linux/kvm_host.h
+++ b/include/linux/kvm_host.h
@@ -297,7 +297,7 @@ static inline gpa_t gfn_to_gpa(gfn_t gfn)
        return (gpa_t)gfn << PAGE_SHIFT;
 }
-static inline void kvm_migrate_apic_timer(struct kvm_vcpu *vcpu)
+static inline void kvm_migrate_timers(struct kvm_vcpu *vcpu)
 {
        set_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests);
 }
diff --git a/include/linux/libata.h b/include/linux/libata.h
index 0f17643e0a6e..e57e5d08312d 100644
--- a/include/linux/libata.h
+++ b/include/linux/libata.h
@@ -111,13 +111,10 @@ enum {
        /* various global constants */
        LIBATA_MAX_PRD          = ATA_MAX_PRD / 2,
        LIBATA_DUMB_MAX_PRD     = ATA_MAX_PRD / 4,      /* Worst case */
-        ATA_MAX_PORTS           = 8,
        ATA_DEF_QUEUE           = 1,
        /* tag ATA_MAX_QUEUE - 1 is reserved for internal commands */
        ATA_MAX_QUEUE           = 32,
        ATA_TAG_INTERNAL        = ATA_MAX_QUEUE - 1,
-        ATA_MAX_BUS             = 2,
-        ATA_DEF_BUSY_WAIT       = 10000,
        ATA_SHORT_PAUSE         = (HZ >> 6) + 1,
        ATAPI_MAX_DRAIN         = 16 << 10,
@@ -341,7 +338,7 @@ enum {
        ATA_EH_PMP_TRIES        = 5,
        ATA_EH_PMP_LINK_TRIES   = 3,
-        SATA_PMP_SCR_TIMEOUT    = 250,
+        SATA_PMP_RW_TIMEOUT     = 3000,         /* PMP read/write timeout */
        /* Horkage types. May be set by libata or controller on drives
           (some horkage may be drive/controller pair dependant */
@@ -351,7 +348,7 @@ enum {
        ATA_HORKAGE_NONCQ       = (1 << 2),     /* Don't use NCQ */
        ATA_HORKAGE_MAX_SEC_128 = (1 << 3),     /* Limit max sects to 128 */
        ATA_HORKAGE_BROKEN_HPA  = (1 << 4),     /* Broken HPA */
-        ATA_HORKAGE_SKIP_PM     = (1 << 5),     /* Skip PM operations */
+        ATA_HORKAGE_DISABLE     = (1 << 5),     /* Disable it */
        ATA_HORKAGE_HPA_SIZE    = (1 << 6),     /* native size off by one */
        ATA_HORKAGE_IPM         = (1 << 7),     /* Link PM problems */
        ATA_HORKAGE_IVB         = (1 << 8),     /* cbl det validity bit bugs */
@@ -821,8 +818,6 @@ struct ata_timing {
        unsigned short udma;            /* t2CYCTYP/2 */
 };
-#define FIT(v, vmin, vmax)      max_t(short, min_t(short, v, vmax), vmin)
 /*
 * Core layer - drivers/ata/libata-core.c
 */
@@ -1437,7 +1432,8 @@ extern void ata_sff_qc_prep(struct ata_queued_cmd *qc);
 extern void ata_sff_dumb_qc_prep(struct ata_queued_cmd *qc);
 extern void ata_sff_dev_select(struct ata_port *ap, unsigned int device);
 extern u8 ata_sff_check_status(struct ata_port *ap);
-extern u8 ata_sff_altstatus(struct ata_port *ap);
+extern void ata_sff_pause(struct ata_port *ap);
+extern void ata_sff_dma_pause(struct ata_port *ap);
 extern int ata_sff_busy_sleep(struct ata_port *ap,
                              unsigned long timeout_pat, unsigned long timeout);
 extern int ata_sff_wait_ready(struct ata_link *link, unsigned long deadline);
@@ -1498,19 +1494,6 @@ extern int ata_pci_sff_init_one(struct pci_dev *pdev,
 #endif /* CONFIG_PCI */
 /**
- *      ata_sff_pause - Flush writes and pause 400 nanoseconds.
- *      @ap: Port to wait for.
- *
- *      LOCKING:
- *      Inherited from caller.
- */
-static inline void ata_sff_pause(struct ata_port *ap)
-{
-        ata_sff_altstatus(ap);
-        ndelay(400);
-}
-/**
 *      ata_sff_busy_wait - Wait for a port status register
 *      @ap: Port to wait for.
 *      @bits: bits that must be clear
diff --git a/include/linux/math64.h b/include/linux/math64.h
index c1a5f81501ff..c87f1528703a 100644
--- a/include/linux/math64.h
+++ b/include/linux/math64.h
@@ -81,4 +81,25 @@ static inline s64 div_s64(s64 dividend, s32 divisor)
 }
 #endif
+u32 iter_div_u64_rem(u64 dividend, u32 divisor, u64 *remainder);
+static __always_inline u32
+__iter_div_u64_rem(u64 dividend, u32 divisor, u64 *remainder)
+{
+        u32 ret = 0;
+        while (dividend >= divisor) {
+                /* The following asm() prevents the compiler from
+                   optimising this loop into a modulo operation.  */
+                asm("" : "+rm"(dividend));
+                dividend -= divisor;
+                ret++;
+        }
+        *remainder = dividend;
+        return ret;
+}
 #endif /* _LINUX_MATH64_H */
diff --git a/include/linux/memory_hotplug.h b/include/linux/memory_hotplug.h
index 73e358612eaf..ea9f5ad9ec8e 100644
--- a/include/linux/memory_hotplug.h
+++ b/include/linux/memory_hotplug.h
@@ -77,14 +77,6 @@ extern int __add_pages(struct zone *zone, unsigned long start_pfn,
 extern int __remove_pages(struct zone *zone, unsigned long start_pfn,
        unsigned long nr_pages);
-/*
- * Walk through all memory which is registered as resource.
- * arg is (start_pfn, nr_pages, private_arg_pointer)
- */
-extern int walk_memory_resource(unsigned long start_pfn,
-                        unsigned long nr_pages, void *arg,
-                        int (*func)(unsigned long, unsigned long, void *));
 #ifdef CONFIG_NUMA
 extern int memory_add_physaddr_to_nid(u64 start);
 #else
@@ -199,6 +191,14 @@ static inline void register_page_bootmem_info_node(struct pglist_data *pgdat)
 #endif /* ! CONFIG_MEMORY_HOTPLUG */
+/*
+ * Walk through all memory which is registered as resource.
+ * arg is (start_pfn, nr_pages, private_arg_pointer)
+ */
+extern int walk_memory_resource(unsigned long start_pfn,
+                        unsigned long nr_pages, void *arg,
+                        int (*func)(unsigned long, unsigned long, void *));
 extern int add_memory(int nid, u64 start, u64 size);
 extern int arch_add_memory(int nid, u64 start, u64 size);
 extern int remove_memory(u64 start, u64 size);
diff --git a/include/linux/mm.h b/include/linux/mm.h
index c31a9cd2a30e..586a943cab01 100644
--- a/include/linux/mm.h
+++ b/include/linux/mm.h
@@ -760,16 +760,17 @@ unsigned long unmap_vmas(struct mmu_gather **tlb,
 * (see walk_page_range for more details)
 */
 struct mm_walk {
-        int (*pgd_entry)(pgd_t *, unsigned long, unsigned long, void *);
+        int (*pgd_entry)(pgd_t *, unsigned long, unsigned long, struct mm_walk *);
-        int (*pud_entry)(pud_t *, unsigned long, unsigned long, void *);
+        int (*pud_entry)(pud_t *, unsigned long, unsigned long, struct mm_walk *);
-        int (*pmd_entry)(pmd_t *, unsigned long, unsigned long, void *);
+        int (*pmd_entry)(pmd_t *, unsigned long, unsigned long, struct mm_walk *);
-        int (*pte_entry)(pte_t *, unsigned long, unsigned long, void *);
+        int (*pte_entry)(pte_t *, unsigned long, unsigned long, struct mm_walk *);
-        int (*pte_hole)(unsigned long, unsigned long, void *);
+        int (*pte_hole)(unsigned long, unsigned long, struct mm_walk *);
+        struct mm_struct *mm;
+        void *private;
 };
-int walk_page_range(const struct mm_struct *, unsigned long addr,
+int walk_page_range(unsigned long addr, unsigned long end,
-                    unsigned long end, const struct mm_walk *walk,
+                struct mm_walk *walk);
-                    void *private);
 void free_pgd_range(struct mmu_gather **tlb, unsigned long addr,
                unsigned long end, unsigned long floor, unsigned long ceiling);
 void free_pgtables(struct mmu_gather **tlb, struct vm_area_struct *start_vma,
diff --git a/include/linux/mm_types.h b/include/linux/mm_types.h
index eb7c16cc9559..02a27ae78539 100644
--- a/include/linux/mm_types.h
+++ b/include/linux/mm_types.h
@@ -226,8 +226,17 @@ struct mm_struct {
        rwlock_t                ioctx_list_lock;        /* aio lock */
        struct kioctx           *ioctx_list;
 #ifdef CONFIG_MM_OWNER
-        struct task_struct *owner;      /* The thread group leader that */
+        /*
-                                        /* owns the mm_struct.          */
+         * "owner" points to a task that is regarded as the canonical
+         * user/owner of this mm. All of the following must be true in
+         * order for it to be changed:
+         *
+         * current == mm->owner
+         * current->mm != mm
+         * new_owner->mm == mm
+         * new_owner->alloc_lock is held
+         */
+        struct task_struct *owner;
 #endif
 #ifdef CONFIG_PROC_FS
diff --git a/include/linux/mman.h b/include/linux/mman.h
index 87920a0852a3..dab8892e6ff1 100644
--- a/include/linux/mman.h
+++ b/include/linux/mman.h
@@ -17,14 +17,14 @@
 extern int sysctl_overcommit_memory;
 extern int sysctl_overcommit_ratio;
-extern atomic_t vm_committed_space;
+extern atomic_long_t vm_committed_space;
 #ifdef CONFIG_SMP
 extern void vm_acct_memory(long pages);
 #else
 static inline void vm_acct_memory(long pages)
 {
-        atomic_add(pages, &vm_committed_space);
+        atomic_long_add(pages, &vm_committed_space);
 }
 #endif
diff --git a/include/linux/mmzone.h b/include/linux/mmzone.h
index c463cd8a15a4..443bc7cd8c62 100644
--- a/include/linux/mmzone.h
+++ b/include/linux/mmzone.h
@@ -703,7 +703,7 @@ extern struct pglist_data *next_online_pgdat(struct pglist_data *pgdat);
 extern struct zone *next_zone(struct zone *zone);
 /**
- * for_each_pgdat - helper macro to iterate over all nodes
+ * for_each_online_pgdat - helper macro to iterate over all online nodes
 * @pgdat - pointer to a pg_data_t variable
 */
 #define for_each_online_pgdat(pgdat)                    \
diff --git a/include/linux/mod_devicetable.h b/include/linux/mod_devicetable.h
index d73eceaa7afb..69b2342d5ebb 100644
--- a/include/linux/mod_devicetable.h
+++ b/include/linux/mod_devicetable.h
@@ -375,7 +375,8 @@ struct virtio_device_id {
 struct i2c_device_id {
        char name[I2C_NAME_SIZE];
-        kernel_ulong_t driver_data;     /* Data private to the driver */
+        kernel_ulong_t driver_data      /* Data private to the driver */
+                        __attribute__((aligned(sizeof(kernel_ulong_t))));
 };
diff --git a/include/linux/msdos_fs.h b/include/linux/msdos_fs.h
index b03b27457413..81cd36b735b0 100644
--- a/include/linux/msdos_fs.h
+++ b/include/linux/msdos_fs.h
@@ -57,12 +57,6 @@
 #define MSDOS_DOT       ".          "   /* ".", padded to MSDOS_NAME chars */
 #define MSDOS_DOTDOT    "..         "   /* "..", padded to MSDOS_NAME chars */
-/* media of boot sector */
-static inline int fat_valid_media(u8 media)
-{
-        return 0xf8 <= media || media == 0xf0;
-}
 #define FAT_FIRST_ENT(s, x)     ((MSDOS_SB(s)->fat_bits == 32 ? 0x0FFFFF00 : \
        MSDOS_SB(s)->fat_bits == 16 ? 0xFF00 : 0xF00) | (x))
@@ -334,6 +328,12 @@ static inline void fatwchar_to16(__u8 *dst, const wchar_t *src, size_t len)
 #endif
 }
+/* media of boot sector */
+static inline int fat_valid_media(u8 media)
+{
+        return 0xf8 <= media || media == 0xf0;
+}
 /* fat/cache.c */
 extern void fat_cache_inval_inode(struct inode *inode);
 extern int fat_get_cluster(struct inode *inode, int cluster,
diff --git a/include/linux/msg.h b/include/linux/msg.h
index 6f3b8e79a991..56abf1558fdd 100644
--- a/include/linux/msg.h
+++ b/include/linux/msg.h
@@ -64,11 +64,11 @@ struct msginfo {
 #define MSGMNB 16384   /* <= INT_MAX */   /* default max size of a message queue */
 /* unused */
-#define MSGPOOL (MSGMNI * MSGMNB) /* size in bytes of message pool */
+#define MSGPOOL (MSGMNI * MSGMNB / 1024) /* size in kbytes of message pool */
 #define MSGTQL  MSGMNB            /* number of system message headers */
 #define MSGMAP  MSGMNB            /* number of entries in message map */
 #define MSGSSZ  16                /* message segment size */
-#define __MSGSEG (MSGPOOL / MSGSSZ) /* max no. of segments */
+#define __MSGSEG ((MSGPOOL * 1024) / MSGSSZ) /* max no. of segments */
 #define MSGSEG (__MSGSEG <= 0xffff ? __MSGSEG : 0xffff)
 #ifdef __KERNEL__
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index c42bc7f533a5..53ea3dc8b0e8 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -1,7 +1,7 @@
 /*
 *  linux/include/linux/mtd/nand.h
 *
- *  Copyright (c) 2000 David Woodhouse <dwmw2@mvhi.com>
+ *  Copyright (c) 2000 David Woodhouse <dwmw2@infradead.org>
 *                     Steven J. Hill <sjhill@realitydiluted.com>
 *                     Thomas Gleixner <tglx@linutronix.de>
 *
diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h
index 7c1d4466583b..f27fd2009334 100644
--- a/include/linux/netdevice.h
+++ b/include/linux/netdevice.h
@@ -93,14 +93,16 @@ struct wireless_dev;
 *      used.
 */
 
-#if !defined(CONFIG_AX25) && !defined(CONFIG_AX25_MODULE) && !defined(CONFIG_TR)
+#if defined(CONFIG_WLAN_80211) || defined(CONFIG_AX25) || defined(CONFIG_AX25_MODULE)
-#define LL_MAX_HEADER   32
+# if defined(CONFIG_MAC80211_MESH)
+#  define LL_MAX_HEADER 128
+# else
+#  define LL_MAX_HEADER 96
+# endif
+#elif defined(CONFIG_TR)
+# define LL_MAX_HEADER 48
 #else
-#if defined(CONFIG_AX25) || defined(CONFIG_AX25_MODULE)
+# define LL_MAX_HEADER 32
-#define LL_MAX_HEADER   96
-#else
-#define LL_MAX_HEADER   48
-#endif
 #endif
 #if !defined(CONFIG_NET_IPIP) && !defined(CONFIG_NET_IPIP_MODULE) && \
@@ -244,11 +246,16 @@ struct hh_cache
 *
 * We could use other alignment values, but we must maintain the
 * relationship HH alignment <= LL alignment.
+ *
+ * LL_ALLOCATED_SPACE also takes into account the tailroom the device
+ * may need.
 */
 #define LL_RESERVED_SPACE(dev) \
-        (((dev)->hard_header_len&~(HH_DATA_MOD - 1)) + HH_DATA_MOD)
+        ((((dev)->hard_header_len+(dev)->needed_headroom)&~(HH_DATA_MOD - 1)) + HH_DATA_MOD)
 #define LL_RESERVED_SPACE_EXTRA(dev,extra) \
-        ((((dev)->hard_header_len+extra)&~(HH_DATA_MOD - 1)) + HH_DATA_MOD)
+        ((((dev)->hard_header_len+(dev)->needed_headroom+(extra))&~(HH_DATA_MOD - 1)) + HH_DATA_MOD)
+#define LL_ALLOCATED_SPACE(dev) \
+        ((((dev)->hard_header_len+(dev)->needed_headroom+(dev)->needed_tailroom)&~(HH_DATA_MOD - 1)) + HH_DATA_MOD)
 struct header_ops {
        int     (*create) (struct sk_buff *skb, struct net_device *dev,
@@ -567,6 +574,13 @@ struct net_device
        unsigned short          type;   /* interface hardware type      */
        unsigned short          hard_header_len;        /* hardware hdr length  */
+        /* extra head- and tailroom the hardware may need, but not in all cases
+         * can this be guaranteed, especially tailroom. Some cases also use
+         * LL_MAX_HEADER instead to allocate the skb.
+         */
+        unsigned short          needed_headroom;
+        unsigned short          needed_tailroom;
        struct net_device       *master; /* Pointer to master device of a group,
                                          * which this device is member of.
                                          */
@@ -715,6 +729,9 @@ struct net_device
        struct net              *nd_net;
 #endif
+        /* mid-layer private */
+        void                    *ml_priv;
        /* bridge stuff */
        struct net_bridge_port  *br_port;
        /* macvlan */
@@ -728,6 +745,9 @@ struct net_device
        /* rtnetlink link ops */
        const struct rtnl_link_ops *rtnl_link_ops;
+        /* VLAN feature mask */
+        unsigned long vlan_features;
        /* for setting kernel sock attribute on TCP connection setup */
 #define GSO_MAX_SIZE            65536
        unsigned int            gso_max_size;
diff --git a/include/linux/netfilter.h b/include/linux/netfilter.h
index e4c66593b5c6..0c5eb7ed8b3f 100644
--- a/include/linux/netfilter.h
+++ b/include/linux/netfilter.h
@@ -3,7 +3,6 @@
 #ifdef __KERNEL__
 #include <linux/init.h>
-#include <linux/types.h>
 #include <linux/skbuff.h>
 #include <linux/net.h>
 #include <linux/netdevice.h>
@@ -14,6 +13,7 @@
 #include <linux/list.h>
 #include <net/net_namespace.h>
 #endif
+#include <linux/types.h>
 #include <linux/compiler.h>
 /* Responses from hook functions. */
diff --git a/include/linux/netfilter_arp/arp_tables.h b/include/linux/netfilter_arp/arp_tables.h
index dd9c97f2d436..590ac3d6d5d6 100644
--- a/include/linux/netfilter_arp/arp_tables.h
+++ b/include/linux/netfilter_arp/arp_tables.h
@@ -11,11 +11,11 @@
 #ifdef __KERNEL__
 #include <linux/if.h>
-#include <linux/types.h>
 #include <linux/in.h>
 #include <linux/if_arp.h>
 #include <linux/skbuff.h>
 #endif
+#include <linux/types.h>
 #include <linux/compiler.h>
 #include <linux/netfilter_arp.h>
diff --git a/include/linux/netfilter_ipv4/ip_tables.h b/include/linux/netfilter_ipv4/ip_tables.h
index bfc889f90276..092bd50581a9 100644
--- a/include/linux/netfilter_ipv4/ip_tables.h
+++ b/include/linux/netfilter_ipv4/ip_tables.h
@@ -17,11 +17,11 @@
 #ifdef __KERNEL__
 #include <linux/if.h>
-#include <linux/types.h>
 #include <linux/in.h>
 #include <linux/ip.h>
 #include <linux/skbuff.h>
 #endif
+#include <linux/types.h>
 #include <linux/compiler.h>
 #include <linux/netfilter_ipv4.h>
diff --git a/include/linux/netfilter_ipv6/ip6_tables.h b/include/linux/netfilter_ipv6/ip6_tables.h
index f2507dcc5750..1089e33cf633 100644
--- a/include/linux/netfilter_ipv6/ip6_tables.h
+++ b/include/linux/netfilter_ipv6/ip6_tables.h
@@ -17,11 +17,11 @@
 #ifdef __KERNEL__
 #include <linux/if.h>
-#include <linux/types.h>
 #include <linux/in6.h>
 #include <linux/ipv6.h>
 #include <linux/skbuff.h>
 #endif
+#include <linux/types.h>
 #include <linux/compiler.h>
 #include <linux/netfilter_ipv6.h>
diff --git a/include/linux/page-flags.h b/include/linux/page-flags.h
index 590cff32415d..f31debfac926 100644
--- a/include/linux/page-flags.h
+++ b/include/linux/page-flags.h
@@ -306,5 +306,29 @@ static inline void __ClearPageTail(struct page *page)
 }
 #endif /* !PAGEFLAGS_EXTENDED */
+#define PAGE_FLAGS      (1 << PG_lru   | 1 << PG_private   | 1 << PG_locked | \
+                         1 << PG_buddy | 1 << PG_writeback | \
+                         1 << PG_slab  | 1 << PG_swapcache | 1 << PG_active)
+/*
+ * Flags checked in bad_page().  Pages on the free list should not have
+ * these flags set.  It they are, there is a problem.
+ */
+#define PAGE_FLAGS_CLEAR_WHEN_BAD (PAGE_FLAGS | 1 << PG_reclaim | 1 << PG_dirty)
+/*
+ * Flags checked when a page is freed.  Pages being freed should not have
+ * these flags set.  It they are, there is a problem.
+ */
+#define PAGE_FLAGS_CHECK_AT_FREE (PAGE_FLAGS | 1 << PG_reserved)
+/*
+ * Flags checked when a page is prepped for return by the page allocator.
+ * Pages being prepped should not have these flags set.  It they are, there
+ * is a problem.
+ */
+#define PAGE_FLAGS_CHECK_AT_PREP (PAGE_FLAGS | 1 << PG_reserved | 1 << PG_dirty)
 #endif /* !__GENERATING_BOUNDS_H */
 #endif  /* PAGE_FLAGS_H */
diff --git a/include/linux/parser.h b/include/linux/parser.h
index 26b2bdfcaf06..7dcd05075756 100644
--- a/include/linux/parser.h
+++ b/include/linux/parser.h
@@ -29,5 +29,5 @@ int match_token(char *, match_table_t table, substring_t args[]);
 int match_int(substring_t *, int *result);
 int match_octal(substring_t *, int *result);
 int match_hex(substring_t *, int *result);
-void match_strcpy(char *, const substring_t *);
+size_t match_strlcpy(char *, const substring_t *, size_t);
 char *match_strdup(const substring_t *);
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 509159bcd4e7..d18b1dd49fab 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -206,6 +206,7 @@ struct pci_dev {
        struct bin_attribute *rom_attr; /* attribute descriptor for sysfs ROM entry */
        int rom_attr_enabled;           /* has display of the rom attribute been enabled? */
        struct bin_attribute *res_attr[DEVICE_COUNT_RESOURCE]; /* sysfs file for resources */
+        struct bin_attribute *res_attr_wc[DEVICE_COUNT_RESOURCE]; /* sysfs file for WC mapping of resources */
 #ifdef CONFIG_PCI_MSI
        struct list_head msi_list;
 #endif
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index cf6dbd759395..eafc9d6d2b35 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -716,6 +716,7 @@
 #define PCI_DEVICE_ID_HP_CISSA          0x3220
 #define PCI_DEVICE_ID_HP_CISSC          0x3230
 #define PCI_DEVICE_ID_HP_CISSD          0x3238
+#define PCI_DEVICE_ID_HP_CISSE          0x323a
 #define PCI_DEVICE_ID_HP_ZX2_IOC        0x4031
 #define PCI_VENDOR_ID_PCTECH            0x1042
@@ -1761,6 +1762,7 @@
 #define PCI_VENDOR_ID_INTASHIELD        0x135a
 #define PCI_DEVICE_ID_INTASHIELD_IS200  0x0d80
+#define PCI_DEVICE_ID_INTASHIELD_IS400  0x0dc0
 #define PCI_VENDOR_ID_QUATECH           0x135C
 #define PCI_DEVICE_ID_QUATECH_QSC100    0x0010
@@ -2383,6 +2385,9 @@
 #define PCI_DEVICE_ID_INTEL_ICH10_4     0x3a30
 #define PCI_DEVICE_ID_INTEL_ICH10_5     0x3a60
 #define PCI_DEVICE_ID_INTEL_IOAT_SNB    0x402f
+#define PCI_DEVICE_ID_INTEL_5400_ERR    0x4030
+#define PCI_DEVICE_ID_INTEL_5400_FBD0   0x4035
+#define PCI_DEVICE_ID_INTEL_5400_FBD1   0x4036
 #define PCI_DEVICE_ID_INTEL_IOAT_SCNB   0x65ff
 #define PCI_DEVICE_ID_INTEL_TOLAPAI_0   0x5031
 #define PCI_DEVICE_ID_INTEL_TOLAPAI_1   0x5032
diff --git a/include/linux/percpu.h b/include/linux/percpu.h
index d746a2abb322..4cdd393e71e1 100644
--- a/include/linux/percpu.h
+++ b/include/linux/percpu.h
@@ -13,8 +13,14 @@
        __attribute__((__section__(".data.percpu")))                    \
        PER_CPU_ATTRIBUTES __typeof__(type) per_cpu__##name
+#ifdef MODULE
+#define SHARED_ALIGNED_SECTION ".data.percpu"
+#else
+#define SHARED_ALIGNED_SECTION ".data.percpu.shared_aligned"
+#endif
 #define DEFINE_PER_CPU_SHARED_ALIGNED(type, name)                       \
-        __attribute__((__section__(".data.percpu.shared_aligned")))     \
+        __attribute__((__section__(SHARED_ALIGNED_SECTION)))            \
        PER_CPU_ATTRIBUTES __typeof__(type) per_cpu__##name             \
        ____cacheline_aligned_in_smp
 #else
diff --git a/include/linux/proc_fs.h b/include/linux/proc_fs.h
index 9883bc942262..fff1d27ddb4c 100644
--- a/include/linux/proc_fs.h
+++ b/include/linux/proc_fs.h
@@ -9,6 +9,8 @@
 struct net;
 struct completion;
+struct mm_struct;
 /*
 * The proc filesystem constants/structures
 */
@@ -101,8 +103,6 @@ extern spinlock_t proc_subdir_lock;
 extern void proc_root_init(void);
 extern void proc_misc_init(void);
-struct mm_struct;
 void proc_flush_task(struct task_struct *task);
 struct dentry *proc_pid_lookup(struct inode *dir, struct dentry * dentry, struct nameidata *);
 int proc_pid_readdir(struct file * filp, void * dirent, filldir_t filldir);
diff --git a/include/linux/raid/bitmap.h b/include/linux/raid/bitmap.h
index 47fbcba11850..78bfdea24a8e 100644
--- a/include/linux/raid/bitmap.h
+++ b/include/linux/raid/bitmap.h
@@ -262,7 +262,6 @@ int  bitmap_create(mddev_t *mddev);
 void bitmap_flush(mddev_t *mddev);
 void bitmap_destroy(mddev_t *mddev);
-char *file_path(struct file *file, char *buf, int count);
 void bitmap_print_sb(struct bitmap *bitmap);
 void bitmap_update_sb(struct bitmap *bitmap);
diff --git a/include/linux/raid/md.h b/include/linux/raid/md.h
index 81a1a02d4566..b7386ae9d288 100644
--- a/include/linux/raid/md.h
+++ b/include/linux/raid/md.h
@@ -72,6 +72,8 @@
 */
 #define MD_PATCHLEVEL_VERSION           3
+extern int mdp_major;
 extern int register_md_personality (struct mdk_personality *p);
 extern int unregister_md_personality (struct mdk_personality *p);
 extern mdk_thread_t * md_register_thread (void (*run) (mddev_t *mddev),
diff --git a/include/linux/raid/md_k.h b/include/linux/raid/md_k.h
index 812ffa590cff..3dea9f545c8f 100644
--- a/include/linux/raid/md_k.h
+++ b/include/linux/raid/md_k.h
@@ -180,13 +180,15 @@ struct mddev_s
        int                             sync_speed_min;
        int                             sync_speed_max;
+        /* resync even though the same disks are shared among md-devices */
+        int                             parallel_resync;
        int                             ok_start_degraded;
        /* recovery/resync flags 
         * NEEDED:   we might need to start a resync/recover
         * RUNNING:  a thread is running, or about to be started
         * SYNC:     actually doing a resync, not a recovery
-         * ERR:      and IO error was detected - abort the resync/recovery
+         * INTR:     resync needs to be aborted for some reason
-         * INTR:     someone requested a (clean) early abort.
         * DONE:     thread is done and is waiting to be reaped
         * REQUEST:  user-space has requested a sync (used with SYNC)
         * CHECK:    user-space request for for check-only, no repair
@@ -196,7 +198,6 @@ struct mddev_s
         */
 #define MD_RECOVERY_RUNNING     0
 #define MD_RECOVERY_SYNC        1
-#define MD_RECOVERY_ERR         2
 #define MD_RECOVERY_INTR        3
 #define MD_RECOVERY_DONE        4
 #define MD_RECOVERY_NEEDED      5
diff --git a/include/linux/rtnetlink.h b/include/linux/rtnetlink.h
index 44c81c744538..b358c704d102 100644
--- a/include/linux/rtnetlink.h
+++ b/include/linux/rtnetlink.h
@@ -246,6 +246,7 @@ enum rt_class_t
 {
        RT_TABLE_UNSPEC=0,
 /* User defined values */
+        RT_TABLE_COMPAT=252,
        RT_TABLE_DEFAULT=253,
        RT_TABLE_MAIN=254,
        RT_TABLE_LOCAL=255,
@@ -267,10 +268,10 @@ enum rtattr_type_t
        RTA_PREFSRC,
        RTA_METRICS,
        RTA_MULTIPATH,
-        RTA_PROTOINFO,
+        RTA_PROTOINFO, /* no longer used */
        RTA_FLOW,
        RTA_CACHEINFO,
-        RTA_SESSION,
+        RTA_SESSION, /* no longer used */
        RTA_MP_ALGO, /* no longer used */
        RTA_TABLE,
        __RTA_MAX
diff --git a/include/linux/sched.h b/include/linux/sched.h
index 4ab9f32f9238..c5d3f847ca8d 100644
--- a/include/linux/sched.h
+++ b/include/linux/sched.h
@@ -766,7 +766,6 @@ struct sched_domain {
        struct sched_domain *child;     /* bottom domain must be null terminated */
        struct sched_group *groups;     /* the balancing groups of the domain */
        cpumask_t span;                 /* span of all CPUs in this domain */
-        int first_cpu;                  /* cache of the first cpu in this domain */
        unsigned long min_interval;     /* Minimum balance interval ms */
        unsigned long max_interval;     /* Maximum balance interval ms */
        unsigned int busy_factor;       /* less balancing by factor if busy */
@@ -1848,7 +1847,9 @@ extern void exit_thread(void);
 extern void exit_files(struct task_struct *);
 extern void __cleanup_signal(struct signal_struct *);
 extern void __cleanup_sighand(struct sighand_struct *);
 extern void exit_itimers(struct signal_struct *);
+extern void flush_itimer_signals(void);
 extern NORET_TYPE void do_group_exit(int);
@@ -2025,9 +2026,22 @@ static inline int fatal_signal_pending(struct task_struct *p)
        return signal_pending(p) && __fatal_signal_pending(p);
 }
+static inline int signal_pending_state(long state, struct task_struct *p)
+{
+        if (!(state & (TASK_INTERRUPTIBLE | TASK_WAKEKILL)))
+                return 0;
+        if (!signal_pending(p))
+                return 0;
+        if (state & (__TASK_STOPPED | __TASK_TRACED))
+                return 0;
+        return (state & TASK_INTERRUPTIBLE) || __fatal_signal_pending(p);
+}
 static inline int need_resched(void)
 {
-        return unlikely(test_tsk_need_resched(current));
+        return unlikely(test_thread_flag(TIF_NEED_RESCHED));
 }
 /*
@@ -2038,7 +2052,7 @@ static inline int need_resched(void)
 * cond_resched_softirq() will enable bhs before scheduling.
 */
 extern int _cond_resched(void);
-#ifdef CONFIG_PREEMPT
+#ifdef CONFIG_PREEMPT_BKL
 static inline int cond_resched(void)
 {
        return 0;
diff --git a/include/linux/serial_core.h b/include/linux/serial_core.h
index d32123ae08ad..d8f31de632c5 100644
--- a/include/linux/serial_core.h
+++ b/include/linux/serial_core.h
@@ -192,6 +192,7 @@ struct uart_ops {
        void            (*shutdown)(struct uart_port *);
        void            (*set_termios)(struct uart_port *, struct ktermios *new,
                                       struct ktermios *old);
+        void            (*set_ldisc)(struct uart_port *);
        void            (*pm)(struct uart_port *, unsigned int state,
                              unsigned int oldstate);
        int             (*set_wake)(struct uart_port *, unsigned int state);
diff --git a/include/linux/slab.h b/include/linux/slab.h
index 805ed4b92f9a..c2ad35016599 100644
--- a/include/linux/slab.h
+++ b/include/linux/slab.h
@@ -276,6 +276,17 @@ static inline void *kzalloc(size_t size, gfp_t flags)
        return kmalloc(size, flags | __GFP_ZERO);
 }
+/**
+ * kzalloc_node - allocate zeroed memory from a particular memory node.
+ * @size: how many bytes of memory are required.
+ * @flags: the type of memory to allocate (see kmalloc).
+ * @node: memory node from which to allocate
+ */
+static inline void *kzalloc_node(size_t size, gfp_t flags, int node)
+{
+        return kmalloc_node(size, flags | __GFP_ZERO, node);
+}
 #ifdef CONFIG_SLABINFO
 extern const struct seq_operations slabinfo_op;
 ssize_t slabinfo_write(struct file *, const char __user *, size_t, loff_t *);
diff --git a/include/linux/sm501.h b/include/linux/sm501.h
index bca134544700..95c1c39ba445 100644
--- a/include/linux/sm501.h
+++ b/include/linux/sm501.h
@@ -71,8 +71,8 @@ extern unsigned long sm501_gpio_get(struct device *dev,
 #define SM501FB_FLAG_DISABLE_AT_EXIT    (1<<1)
 #define SM501FB_FLAG_USE_HWCURSOR       (1<<2)
 #define SM501FB_FLAG_USE_HWACCEL        (1<<3)
-#define SM501FB_FLAG_PANEL_USE_FPEN     (1<<4)
+#define SM501FB_FLAG_PANEL_NO_FPEN      (1<<4)
-#define SM501FB_FLAG_PANEL_USE_VBIASEN  (1<<5)
+#define SM501FB_FLAG_PANEL_NO_VBIASEN   (1<<5)
 struct sm501_platdata_fbsub {
        struct fb_videomode     *def_mode;
diff --git a/include/linux/spi/mmc_spi.h b/include/linux/spi/mmc_spi.h
index e9bbe3ebd721..d5ca78b93a3b 100644
--- a/include/linux/spi/mmc_spi.h
+++ b/include/linux/spi/mmc_spi.h
@@ -1,6 +1,8 @@
 #ifndef __LINUX_SPI_MMC_SPI_H
 #define __LINUX_SPI_MMC_SPI_H
+#include <linux/interrupt.h>
 struct device;
 struct mmc_host;
diff --git a/include/linux/ssb/ssb_driver_gige.h b/include/linux/ssb/ssb_driver_gige.h
index 01fbdf5fef22..942e38736901 100644
--- a/include/linux/ssb/ssb_driver_gige.h
+++ b/include/linux/ssb/ssb_driver_gige.h
@@ -100,7 +100,7 @@ extern char * nvram_get(const char *name);
 /* Get the device MAC address */
 static inline void ssb_gige_get_macaddr(struct pci_dev *pdev, u8 *macaddr)
 {
-#ifdef CONFIG_BCM947XX
+#ifdef CONFIG_BCM47XX
        char *res = nvram_get("et0macaddr");
        if (res)
                memcpy(macaddr, res, 6);
diff --git a/include/linux/sunrpc/svc_rdma.h b/include/linux/sunrpc/svc_rdma.h
index c11bbcc081f9..05eb4664d0dd 100644
--- a/include/linux/sunrpc/svc_rdma.h
+++ b/include/linux/sunrpc/svc_rdma.h
@@ -71,7 +71,8 @@ extern atomic_t rdma_stat_sq_prod;
 * completes.
 */
 struct svc_rdma_op_ctxt {
-        struct svc_rdma_op_ctxt *next;
+        struct svc_rdma_op_ctxt *read_hdr;
+        struct list_head free_list;
        struct xdr_buf arg;
        struct list_head dto_q;
        enum ib_wr_opcode wr_op;
@@ -85,7 +86,6 @@ struct svc_rdma_op_ctxt {
        struct page *pages[RPCSVC_MAXPAGES];
 };
-#define RDMACTXT_F_READ_DONE    1
 #define RDMACTXT_F_LAST_CTXT    2
 struct svcxprt_rdma {
@@ -104,7 +104,8 @@ struct svcxprt_rdma {
        struct ib_pd         *sc_pd;
-        struct svc_rdma_op_ctxt  *sc_ctxt_head;
+        atomic_t             sc_ctxt_used;
+        struct list_head     sc_ctxt_free;
        int                  sc_ctxt_cnt;
        int                  sc_ctxt_bump;
        int                  sc_ctxt_max;
@@ -123,6 +124,7 @@ struct svcxprt_rdma {
        struct list_head     sc_dto_q;          /* DTO tasklet I/O pending Q */
        struct list_head     sc_read_complete_q;
        spinlock_t           sc_read_complete_lock;
+        struct work_struct   sc_work;
 };
 /* sc_flags */
 #define RDMAXPRT_RQ_PENDING     1
@@ -164,8 +166,8 @@ extern int svc_rdma_sendto(struct svc_rqst *);
 /* svc_rdma_transport.c */
 extern int svc_rdma_send(struct svcxprt_rdma *, struct ib_send_wr *);
-extern int svc_rdma_send_error(struct svcxprt_rdma *, struct rpcrdma_msg *,
+extern void svc_rdma_send_error(struct svcxprt_rdma *, struct rpcrdma_msg *,
-                               enum rpcrdma_errcode);
+                                enum rpcrdma_errcode);
 struct page *svc_rdma_get_page(void);
 extern int svc_rdma_post_recv(struct svcxprt_rdma *);
 extern int svc_rdma_create_listen(struct svc_serv *, int, struct sockaddr *);
diff --git a/include/linux/tcp.h b/include/linux/tcp.h
index d96d9b122304..b31b6b74aa28 100644
--- a/include/linux/tcp.h
+++ b/include/linux/tcp.h
@@ -239,11 +239,6 @@ static inline struct tcp_request_sock *tcp_rsk(const struct request_sock *req)
        return (struct tcp_request_sock *)req;
 }
-struct tcp_deferred_accept_info {
-        struct sock *listen_sk;
-        struct request_sock *request;
-};
 struct tcp_sock {
        /* inet_connection_sock has to be the first member of tcp_sock */
        struct inet_connection_sock     inet_conn;
@@ -355,7 +350,7 @@ struct tcp_sock {
        u32     lost_retrans_low;       /* Sent seq after any rxmit (lowest) */
        u16     advmss;         /* Advertised MSS                       */
-        u16     prior_ssthresh; /* ssthresh saved at recovery start     */
+        u32     prior_ssthresh; /* ssthresh saved at recovery start     */
        u32     lost_out;       /* Lost packets                 */
        u32     sacked_out;     /* SACK'd packets                       */
        u32     fackets_out;    /* FACK'd packets                       */
@@ -379,8 +374,6 @@ struct tcp_sock {
        unsigned int            keepalive_intvl;  /* time interval between keep alive probes */
        int                     linger2;
-        struct tcp_deferred_accept_info defer_tcp_accept;
        unsigned long last_synq_overflow; 
        u32     tso_deferred;
diff --git a/include/linux/time.h b/include/linux/time.h
index d32ef0ad4c0a..e15206a7e82e 100644
--- a/include/linux/time.h
+++ b/include/linux/time.h
@@ -6,6 +6,7 @@
 #ifdef __KERNEL__
 # include <linux/cache.h>
 # include <linux/seqlock.h>
+# include <linux/math64.h>
 #endif
 #ifndef _STRUCT_TIMESPEC
@@ -169,18 +170,13 @@ extern struct timeval ns_to_timeval(const s64 nsec);
 * timespec_add_ns - Adds nanoseconds to a timespec
 * @a:          pointer to timespec to be incremented
 * @ns:         unsigned nanoseconds value to be added
+ *
+ * This must always be inlined because its used from the x86-64 vdso,
+ * which cannot call other kernel functions.
 */
-static inline void timespec_add_ns(struct timespec *a, u64 ns)
+static __always_inline void timespec_add_ns(struct timespec *a, u64 ns)
 {
-        ns += a->tv_nsec;
+        a->tv_sec += __iter_div_u64_rem(a->tv_nsec + ns, NSEC_PER_SEC, &ns);
-        while(unlikely(ns >= NSEC_PER_SEC)) {
-                /* The following asm() prevents the compiler from
-                 * optimising this loop into a modulo operation.  */
-                asm("" : "+r"(ns));
-                ns -= NSEC_PER_SEC;
-                a->tv_sec++;
-        }
        a->tv_nsec = ns;
 }
 #endif /* __KERNEL__ */
diff --git a/include/linux/topology.h b/include/linux/topology.h
index 4bb7074a2c3a..24f3d2282e11 100644
--- a/include/linux/topology.h
+++ b/include/linux/topology.h
@@ -166,7 +166,9 @@ void arch_update_cpu_topology(void);
        .busy_idx               = 3,                    \
        .idle_idx               = 3,                    \
        .flags                  = SD_LOAD_BALANCE       \
-                                | SD_SERIALIZE, \
+                                | SD_BALANCE_NEWIDLE    \
+                                | SD_WAKE_AFFINE        \
+                                | SD_SERIALIZE,         \
        .last_balance           = jiffies,              \
        .balance_interval       = 64,                   \
 }
diff --git a/include/linux/tty.h b/include/linux/tty.h
index 7f7121f9c968..324a3b231d40 100644
--- a/include/linux/tty.h
+++ b/include/linux/tty.h
@@ -36,7 +36,7 @@
 #define N_6PACK         7
 #define N_MASC          8       /* Reserved for Mobitex module <kaz@cafe.net> */
 #define N_R3964         9       /* Reserved for Simatic R3964 module */
-#define N_PROFIBUS_FDL  10      /* Reserved for Profibus <Dave@mvhi.com> */
+#define N_PROFIBUS_FDL  10      /* Reserved for Profibus */
 #define N_IRDA          11      /* Linux IrDa - http://irda.sourceforge.net/ */
 #define N_SMSBLOCK      12      /* SMS block mode - for talking to GSM data */
                                /* cards about SMS messages */
diff --git a/include/linux/types.h b/include/linux/types.h
index 9dc2346627b4..d4a9ce6e2760 100644
--- a/include/linux/types.h
+++ b/include/linux/types.h
@@ -197,8 +197,6 @@ typedef u64 resource_size_t;
 typedef u32 resource_size_t;
 #endif
-#endif  /* __KERNEL__ */
 struct ustat {
        __kernel_daddr_t        f_tfree;
        __kernel_ino_t          f_tinode;
@@ -206,4 +204,6 @@ struct ustat {
        char                    f_fpack[6];
 };
+#endif  /* __KERNEL__ */
 #endif /* _LINUX_TYPES_H */
diff --git a/include/linux/usb/association.h b/include/linux/usb/association.h
new file mode 100644
index 000000000000..07c5e3cf5898
--- /dev/null
+++ b/include/linux/usb/association.h
@@ -0,0 +1,150 @@
+/*
+ * Wireless USB - Cable Based Association
+ *
+ * Copyright (C) 2006 Intel Corporation
+ * Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License version
+ * 2 as published by the Free Software Foundation.
+ *
+ */
+#ifndef __LINUX_USB_ASSOCIATION_H
+#define __LINUX_USB_ASSOCIATION_H
+/*
+ * Association attributes
+ *
+ * Association Models Supplement to WUSB 1.0 T[3-1]
+ *
+ * Each field in the structures has it's ID, it's length and then the
+ * value. This is the actual definition of the field's ID and its
+ * length.
+ */
+struct wusb_am_attr {
+        __u8 id;
+        __u8 len;
+};
+/* Different fields defined by the spec */
+#define WUSB_AR_AssociationTypeId       { .id = 0x0000, .len =  2 }
+#define WUSB_AR_AssociationSubTypeId    { .id = 0x0001, .len =  2 }
+#define WUSB_AR_Length                  { .id = 0x0002, .len =  4 }
+#define WUSB_AR_AssociationStatus       { .id = 0x0004, .len =  4 }
+#define WUSB_AR_LangID                  { .id = 0x0008, .len =  2 }
+#define WUSB_AR_DeviceFriendlyName      { .id = 0x000b, .len = 64 } /* max */
+#define WUSB_AR_HostFriendlyName        { .id = 0x000c, .len = 64 } /* max */
+#define WUSB_AR_CHID                    { .id = 0x1000, .len = 16 }
+#define WUSB_AR_CDID                    { .id = 0x1001, .len = 16 }
+#define WUSB_AR_ConnectionContext       { .id = 0x1002, .len = 48 }
+#define WUSB_AR_BandGroups              { .id = 0x1004, .len =  2 }
+/* CBAF Control Requests (AMS1.0[T4-1] */
+enum {
+        CBAF_REQ_GET_ASSOCIATION_INFORMATION = 0x01,
+        CBAF_REQ_GET_ASSOCIATION_REQUEST,
+        CBAF_REQ_SET_ASSOCIATION_RESPONSE
+};
+/*
+ * CBAF USB-interface defitions
+ *
+ * No altsettings, one optional interrupt endpoint.
+ */
+enum {
+        CBAF_IFACECLASS    = 0xef,
+        CBAF_IFACESUBCLASS = 0x03,
+        CBAF_IFACEPROTOCOL = 0x01,
+};
+/* Association Information (AMS1.0[T4-3]) */
+struct wusb_cbaf_assoc_info {
+        __le16 Length;
+        __u8 NumAssociationRequests;
+        __le16 Flags;
+        __u8 AssociationRequestsArray[];
+} __attribute__((packed));
+/* Association Request (AMS1.0[T4-4]) */
+struct wusb_cbaf_assoc_request {
+        __u8 AssociationDataIndex;
+        __u8 Reserved;
+        __le16 AssociationTypeId;
+        __le16 AssociationSubTypeId;
+        __le32 AssociationTypeInfoSize;
+} __attribute__((packed));
+enum {
+        AR_TYPE_WUSB                    = 0x0001,
+        AR_TYPE_WUSB_RETRIEVE_HOST_INFO = 0x0000,
+        AR_TYPE_WUSB_ASSOCIATE          = 0x0001,
+};
+/* Association Attribute header (AMS1.0[3.8]) */
+struct wusb_cbaf_attr_hdr {
+        __le16 id;
+        __le16 len;
+} __attribute__((packed));
+/* Host Info (AMS1.0[T4-7]) (yeah, more headers and fields...) */
+struct wusb_cbaf_host_info {
+        struct wusb_cbaf_attr_hdr AssociationTypeId_hdr;
+        __le16 AssociationTypeId;
+        struct wusb_cbaf_attr_hdr AssociationSubTypeId_hdr;
+        __le16 AssociationSubTypeId;
+        struct wusb_cbaf_attr_hdr CHID_hdr;
+        struct wusb_ckhdid CHID;
+        struct wusb_cbaf_attr_hdr LangID_hdr;
+        __le16 LangID;
+        struct wusb_cbaf_attr_hdr HostFriendlyName_hdr;
+        __u8 HostFriendlyName[];
+} __attribute__((packed));
+/* Device Info (AMS1.0[T4-8])
+ *
+ * I still don't get this tag'n'header stuff for each goddamn
+ * field...
+ */
+struct wusb_cbaf_device_info {
+        struct wusb_cbaf_attr_hdr Length_hdr;
+        __le32 Length;
+        struct wusb_cbaf_attr_hdr CDID_hdr;
+        struct wusb_ckhdid CDID;
+        struct wusb_cbaf_attr_hdr BandGroups_hdr;
+        __le16 BandGroups;
+        struct wusb_cbaf_attr_hdr LangID_hdr;
+        __le16 LangID;
+        struct wusb_cbaf_attr_hdr DeviceFriendlyName_hdr;
+        __u8 DeviceFriendlyName[];
+} __attribute__((packed));
+/* Connection Context; CC_DATA - Success case (AMS1.0[T4-9]) */
+struct wusb_cbaf_cc_data {
+        struct wusb_cbaf_attr_hdr AssociationTypeId_hdr;
+        __le16 AssociationTypeId;
+        struct wusb_cbaf_attr_hdr AssociationSubTypeId_hdr;
+        __le16 AssociationSubTypeId;
+        struct wusb_cbaf_attr_hdr Length_hdr;
+        __le32 Length;
+        struct wusb_cbaf_attr_hdr ConnectionContext_hdr;
+        struct wusb_ckhdid CHID;
+        struct wusb_ckhdid CDID;
+        struct wusb_ckhdid CK;
+        struct wusb_cbaf_attr_hdr BandGroups_hdr;
+        __le16 BandGroups;
+} __attribute__((packed));
+/* CC_DATA - Failure case (AMS1.0[T4-10]) */
+struct wusb_cbaf_cc_data_fail {
+        struct wusb_cbaf_attr_hdr AssociationTypeId_hdr;
+        __le16 AssociationTypeId;
+        struct wusb_cbaf_attr_hdr AssociationSubTypeId_hdr;
+        __le16 AssociationSubTypeId;
+        struct wusb_cbaf_attr_hdr Length_hdr;
+        __le16 Length;
+        struct wusb_cbaf_attr_hdr AssociationStatus_hdr;
+        __u32 AssociationStatus;
+} __attribute__((packed));
+#endif  /* __LINUX_USB_ASSOCIATION_H */
diff --git a/include/linux/usb/cdc.h b/include/linux/usb/cdc.h
index 71e52f2f6a38..ca228bb94218 100644
--- a/include/linux/usb/cdc.h
+++ b/include/linux/usb/cdc.h
@@ -130,6 +130,15 @@ struct usb_cdc_ether_desc {
        __u8    bNumberPowerFilters;
 } __attribute__ ((packed));
+/* "Telephone Control Model Functional Descriptor" from CDC WMC spec 6.3..3 */
+struct usb_cdc_dmm_desc {
+        __u8    bFunctionLength;
+        __u8    bDescriptorType;
+        __u8    bDescriptorSubtype;
+        __u16   bcdVersion;
+        __le16  wMaxCommand;
+} __attribute__ ((packed));
 /* "MDLM Functional Descriptor" from CDC WMC spec 6.7.2.3 */
 struct usb_cdc_mdlm_desc {
        __u8    bLength;
diff --git a/include/linux/videodev2.h b/include/linux/videodev2.h
index c1411189ba6c..4a535ea1e123 100644
--- a/include/linux/videodev2.h
+++ b/include/linux/videodev2.h
@@ -865,9 +865,9 @@ struct v4l2_querymenu
 #define V4L2_CID_HFLIP                  (V4L2_CID_BASE+20)
 #define V4L2_CID_VFLIP                  (V4L2_CID_BASE+21)
-/* Deprecated, use V4L2_CID_PAN_RESET and V4L2_CID_TILT_RESET */
+/* Deprecated; use V4L2_CID_PAN_RESET and V4L2_CID_TILT_RESET */
-#define V4L2_CID_HCENTER_DEPRECATED     (V4L2_CID_BASE+22)
+#define V4L2_CID_HCENTER                (V4L2_CID_BASE+22)
-#define V4L2_CID_VCENTER_DEPRECATED     (V4L2_CID_BASE+23)
+#define V4L2_CID_VCENTER                (V4L2_CID_BASE+23)
 #define V4L2_CID_POWER_LINE_FREQUENCY   (V4L2_CID_BASE+24)
 enum v4l2_power_line_frequency {
diff --git a/include/linux/virtio_blk.h b/include/linux/virtio_blk.h
index d4695a3356d0..5f79a5f9de79 100644
--- a/include/linux/virtio_blk.h
+++ b/include/linux/virtio_blk.h
@@ -10,18 +10,19 @@
 #define VIRTIO_BLK_F_SIZE_MAX   1       /* Indicates maximum segment size */
 #define VIRTIO_BLK_F_SEG_MAX    2       /* Indicates maximum # of segments */
 #define VIRTIO_BLK_F_GEOMETRY   4       /* Legacy geometry available  */
+#define VIRTIO_BLK_F_RO         5       /* Disk is read-only */
 struct virtio_blk_config
 {
        /* The capacity (in 512-byte sectors). */
-        __le64 capacity;
+        __u64 capacity;
        /* The maximum segment size (if VIRTIO_BLK_F_SIZE_MAX) */
-        __le32 size_max;
+        __u32 size_max;
        /* The maximum number of segments (if VIRTIO_BLK_F_SEG_MAX) */
-        __le32 seg_max;
+        __u32 seg_max;
        /* geometry the device (if VIRTIO_BLK_F_GEOMETRY) */
        struct virtio_blk_geometry {
-                __le16 cylinders;
+                __u16 cylinders;
                __u8 heads;
                __u8 sectors;
        } geometry;
diff --git a/include/linux/virtio_config.h b/include/linux/virtio_config.h
index 50db245c81ad..f364bbf63c34 100644
--- a/include/linux/virtio_config.h
+++ b/include/linux/virtio_config.h
@@ -15,6 +15,10 @@
 /* We've given up on this device. */
 #define VIRTIO_CONFIG_S_FAILED          0x80
+/* Do we get callbacks when the ring is completely used, even if we've
+ * suppressed them? */
+#define VIRTIO_F_NOTIFY_ON_EMPTY        24
 #ifdef __KERNEL__
 #include <linux/virtio.h>
@@ -99,7 +103,7 @@ static inline bool virtio_has_feature(const struct virtio_device *vdev,
 * The return value is -ENOENT if the feature doesn't exist.  Otherwise
 * the config value is copied into whatever is pointed to by v. */
 #define virtio_config_val(vdev, fbit, offset, v) \
-        virtio_config_buf((vdev), (fbit), (offset), (v), sizeof(v))
+        virtio_config_buf((vdev), (fbit), (offset), (v), sizeof(*v))
 static inline int virtio_config_buf(struct virtio_device *vdev,
                                    unsigned int fbit,
diff --git a/include/linux/virtio_net.h b/include/linux/virtio_net.h
index 9405aa6cdf26..38c0571820fb 100644
--- a/include/linux/virtio_net.h
+++ b/include/linux/virtio_net.h
@@ -38,7 +38,7 @@ struct virtio_net_hdr
 #define VIRTIO_NET_HDR_GSO_ECN          0x80    // TCP has ECN set
        __u8 gso_type;
        __u16 hdr_len;          /* Ethernet + IP + tcp/udp hdrs */
-        __u16 gso_size;         /* Bytes to append to gso_hdr_len per frame */
+        __u16 gso_size;         /* Bytes to append to hdr_len per frame */
        __u16 csum_start;       /* Position to start checksumming from */
        __u16 csum_offset;      /* Offset after that to place checksum */
 };
diff --git a/include/linux/virtio_rng.h b/include/linux/virtio_rng.h
new file mode 100644
index 000000000000..331afb6c9f62
--- /dev/null
+++ b/include/linux/virtio_rng.h
@@ -0,0 +1,8 @@
+#ifndef _LINUX_VIRTIO_RNG_H
+#define _LINUX_VIRTIO_RNG_H
+#include <linux/virtio_config.h>
+/* The ID for virtio_rng */
+#define VIRTIO_ID_RNG   4
+#endif /* _LINUX_VIRTIO_RNG_H */
diff --git a/include/linux/wm97xx.h b/include/linux/wm97xx.h
index 4d13732e9cf0..6f69968eab24 100644
--- a/include/linux/wm97xx.h
+++ b/include/linux/wm97xx.h
@@ -100,6 +100,7 @@
 #define WM9713_ADCSEL_Y         0x0004  /* Y measurement */
 #define WM9713_ADCSEL_PRES      0x0008  /* Pressure measurement */
 #define WM9713_COO              0x0001  /* enable coordinate mode */
+#define WM9713_45W              0x1000  /* set for 5 wire panel */
 #define WM9713_PDEN             0x0800  /* measure only when pen down */
 #define WM9713_ADCSEL_MASK      0x00fe  /* ADC selection mask */
 #define WM9713_WAIT             0x0200  /* coordinate wait */
diff --git a/include/media/v4l2-dev.h b/include/media/v4l2-dev.h
index a807d2f86ee8..33f01ae08f76 100644
--- a/include/media/v4l2-dev.h
+++ b/include/media/v4l2-dev.h
@@ -40,7 +40,6 @@
 #define VFL_TYPE_VTX            3
 /*  Video standard functions  */
-extern unsigned int v4l2_video_std_fps(struct v4l2_standard *vs);
 extern char *v4l2_norm_to_name(v4l2_std_id id);
 extern int v4l2_video_std_construct(struct v4l2_standard *vs,
                                    int id, char *name);
diff --git a/include/media/videobuf-core.h b/include/media/videobuf-core.h
index 5b39a22533fe..874f1340d049 100644
--- a/include/media/videobuf-core.h
+++ b/include/media/videobuf-core.h
@@ -237,6 +237,9 @@ unsigned int videobuf_poll_stream(struct file *file,
 int videobuf_mmap_setup(struct videobuf_queue *q,
                        unsigned int bcount, unsigned int bsize,
                        enum v4l2_memory memory);
+int __videobuf_mmap_setup(struct videobuf_queue *q,
+                        unsigned int bcount, unsigned int bsize,
+                        enum v4l2_memory memory);
 int videobuf_mmap_free(struct videobuf_queue *q);
 int videobuf_mmap_mapper(struct videobuf_queue *q,
                         struct vm_area_struct *vma);
diff --git a/include/net/9p/9p.h b/include/net/9p/9p.h
index 585eb4496990..b3d3e27c6299 100644
--- a/include/net/9p/9p.h
+++ b/include/net/9p/9p.h
@@ -29,14 +29,31 @@
 #ifdef CONFIG_NET_9P_DEBUG
-#define P9_DEBUG_ERROR          (1<<0)
+/**
-#define P9_DEBUG_9P             (1<<2)
+ * enum p9_debug_flags - bits for mount time debug parameter
-#define P9_DEBUG_VFS            (1<<3)
+ * @P9_DEBUG_ERROR: more verbose error messages including original error string
-#define P9_DEBUG_CONV           (1<<4)
+ * @P9_DEBUG_9P: 9P protocol tracing
-#define P9_DEBUG_MUX            (1<<5)
+ * @P9_DEBUG_VFS: VFS API tracing
-#define P9_DEBUG_TRANS          (1<<6)
+ * @P9_DEBUG_CONV: protocol conversion tracing
-#define P9_DEBUG_SLABS          (1<<7)
+ * @P9_DEBUG_MUX: trace management of concurrent transactions
-#define P9_DEBUG_FCALL          (1<<8)
+ * @P9_DEBUG_TRANS: transport tracing
+ * @P9_DEBUG_SLABS: memory management tracing
+ * @P9_DEBUG_FCALL: verbose dump of protocol messages
+ *
+ * These flags are passed at mount time to turn on various levels of
+ * verbosity and tracing which will be output to the system logs.
+ */
+enum p9_debug_flags {
+        P9_DEBUG_ERROR =        (1<<0),
+        P9_DEBUG_9P =           (1<<2),
+        P9_DEBUG_VFS =          (1<<3),
+        P9_DEBUG_CONV =         (1<<4),
+        P9_DEBUG_MUX =          (1<<5),
+        P9_DEBUG_TRANS =        (1<<6),
+        P9_DEBUG_SLABS =        (1<<7),
+        P9_DEBUG_FCALL =        (1<<8),
+};
 extern unsigned int p9_debug_level;
@@ -62,9 +79,47 @@ do { \
                format , __FUNCTION__, task_pid_nr(current), ## arg); \
 } while (0)
+/**
+ * enum p9_msg_t - 9P message types
+ * @P9_TVERSION: version handshake request
+ * @P9_RVERSION: version handshake response
+ * @P9_TAUTH: request to establish authentication channel
+ * @P9_RAUTH: response with authentication information
+ * @P9_TATTACH: establish user access to file service
+ * @P9_RATTACH: response with top level handle to file hierarchy
+ * @P9_TERROR: not used
+ * @P9_RERROR: response for any failed request
+ * @P9_TFLUSH: request to abort a previous request
+ * @P9_RFLUSH: response when previous request has been cancelled
+ * @P9_TWALK: descend a directory hierarchy
+ * @P9_RWALK: response with new handle for position within hierarchy
+ * @P9_TOPEN: prepare a handle for I/O on an existing file
+ * @P9_ROPEN: response with file access information
+ * @P9_TCREATE: prepare a handle for I/O on a new file
+ * @P9_RCREATE: response with file access information
+ * @P9_TREAD: request to transfer data from a file or directory
+ * @P9_RREAD: response with data requested
+ * @P9_TWRITE: reuqest to transfer data to a file
+ * @P9_RWRITE: response with out much data was transfered to file
+ * @P9_TCLUNK: forget about a handle to an entity within the file system
+ * @P9_RCLUNK: response when server has forgotten about the handle
+ * @P9_TREMOVE: request to remove an entity from the hierarchy
+ * @P9_RREMOVE: response when server has removed the entity
+ * @P9_TSTAT: request file entity attributes
+ * @P9_RSTAT: response with file entity attributes
+ * @P9_TWSTAT: request to update file entity attributes
+ * @P9_RWSTAT: response when file entity attributes are updated
+ *
+ * There are 14 basic operations in 9P2000, paired as
+ * requests and responses.  The one special case is ERROR
+ * as there is no @P9_TERROR request for clients to transmit to
+ * the server, but the server may respond to any other request
+ * with an @P9_RERROR.
+ *
+ * See Also: http://plan9.bell-labs.com/sys/man/5/INDEX.html
+ */
-/* Message Types */
+enum p9_msg_t {
-enum {
        P9_TVERSION = 100,
        P9_RVERSION,
        P9_TAUTH = 102,
@@ -95,30 +150,71 @@ enum {
        P9_RWSTAT,
 };
-/* open modes */
+/**
-enum {
+ * enum p9_open_mode_t - 9P open modes
+ * @P9_OREAD: open file for reading only
+ * @P9_OWRITE: open file for writing only
+ * @P9_ORDWR: open file for reading or writing
+ * @P9_OEXEC: open file for execution
+ * @P9_OTRUNC: truncate file to zero-length before opening it
+ * @P9_OREXEC: close the file when an exec(2) system call is made
+ * @P9_ORCLOSE: remove the file when the file is closed
+ * @P9_OAPPEND: open the file and seek to the end
+ * @P9_OEXCL: only create a file, do not open it
+ *
+ * 9P open modes differ slightly from Posix standard modes.
+ * In particular, there are extra modes which specify different
+ * semantic behaviors than may be available on standard Posix
+ * systems.  For example, @P9_OREXEC and @P9_ORCLOSE are modes that
+ * most likely will not be issued from the Linux VFS client, but may
+ * be supported by servers.
+ *
+ * See Also: http://plan9.bell-labs.com/magic/man2html/2/open
+ */
+enum p9_open_mode_t {
        P9_OREAD = 0x00,
        P9_OWRITE = 0x01,
        P9_ORDWR = 0x02,
        P9_OEXEC = 0x03,
-        P9_OEXCL = 0x04,
        P9_OTRUNC = 0x10,
        P9_OREXEC = 0x20,
        P9_ORCLOSE = 0x40,
        P9_OAPPEND = 0x80,
-};
+        P9_OEXCL = 0x1000,
+};
-/* permissions */
-enum {
+/**
+ * enum p9_perm_t - 9P permissions
+ * @P9_DMDIR: mode bite for directories
+ * @P9_DMAPPEND: mode bit for is append-only
+ * @P9_DMEXCL: mode bit for excluse use (only one open handle allowed)
+ * @P9_DMMOUNT: mode bite for mount points
+ * @P9_DMAUTH: mode bit for authentication file
+ * @P9_DMTMP: mode bit for non-backed-up files
+ * @P9_DMSYMLINK: mode bit for symbolic links (9P2000.u)
+ * @P9_DMLINK: mode bit for hard-link (9P2000.u)
+ * @P9_DMDEVICE: mode bit for device files (9P2000.u)
+ * @P9_DMNAMEDPIPE: mode bit for named pipe (9P2000.u)
+ * @P9_DMSOCKET: mode bit for socket (9P2000.u)
+ * @P9_DMSETUID: mode bit for setuid (9P2000.u)
+ * @P9_DMSETGID: mode bit for setgid (9P2000.u)
+ * @P9_DMSETVTX: mode bit for sticky bit (9P2000.u)
+ *
+ * 9P permissions differ slightly from Posix standard modes.
+ *
+ * See Also: http://plan9.bell-labs.com/magic/man2html/2/stat
+ */
+enum p9_perm_t {
        P9_DMDIR = 0x80000000,
        P9_DMAPPEND = 0x40000000,
        P9_DMEXCL = 0x20000000,
        P9_DMMOUNT = 0x10000000,
        P9_DMAUTH = 0x08000000,
        P9_DMTMP = 0x04000000,
+/* 9P2000.u extensions */
        P9_DMSYMLINK = 0x02000000,
        P9_DMLINK = 0x01000000,
-        /* 9P2000.u extensions */
        P9_DMDEVICE = 0x00800000,
        P9_DMNAMEDPIPE = 0x00200000,
        P9_DMSOCKET = 0x00100000,
@@ -127,8 +223,26 @@ enum {
        P9_DMSETVTX = 0x00010000,
 };
-/* qid.types */
+/**
-enum {
+ * enum p9_qid_t - QID types
+ * @P9_QTDIR: directory
+ * @P9_QTAPPEND: append-only
+ * @P9_QTEXCL: excluse use (only one open handle allowed)
+ * @P9_QTMOUNT: mount points
+ * @P9_QTAUTH: authentication file
+ * @P9_QTTMP: non-backed-up files
+ * @P9_QTSYMLINK: symbolic links (9P2000.u)
+ * @P9_QTLINK: hard-link (9P2000.u)
+ * @P9_QTFILE: normal files
+ *
+ * QID types are a subset of permissions - they are primarily
+ * used to differentiate semantics for a file system entity via
+ * a jump-table.  Their value is also the most signifigant 16 bits
+ * of the permission_t
+ *
+ * See Also: http://plan9.bell-labs.com/magic/man2html/2/stat
+ */
+enum p9_qid_t {
        P9_QTDIR = 0x80,
        P9_QTAPPEND = 0x40,
        P9_QTEXCL = 0x20,
@@ -140,6 +254,7 @@ enum {
        P9_QTFILE = 0x00,
 };
+/* 9P Magic Numbers */
 #define P9_NOTAG        (u16)(~0)
 #define P9_NOFID        (u32)(~0)
 #define P9_MAXWELEM     16
@@ -147,19 +262,69 @@ enum {
 /* ample room for Twrite/Rread header */
 #define P9_IOHDRSZ      24
+/**
+ * struct p9_str - length prefixed string type
+ * @len: length of the string
+ * @str: the string
+ *
+ * The protocol uses length prefixed strings for all
+ * string data, so we replicate that for our internal
+ * string members.
+ */
 struct p9_str {
        u16 len;
        char *str;
 };
-/* qids are the unique ID for a file (like an inode */
+/**
+ * struct p9_qid - file system entity information
+ * @type: 8-bit type &p9_qid_t
+ * @version: 16-bit monotonically incrementing version number
+ * @path: 64-bit per-server-unique ID for a file system element
+ *
+ * qids are identifiers used by 9P servers to track file system
+ * entities.  The type is used to differentiate semantics for operations
+ * on the entity (ie. read means something different on a directory than
+ * on a file).  The path provides a server unique index for an entity
+ * (roughly analogous to an inode number), while the version is updated
+ * every time a file is modified and can be used to maintain cache
+ * coherency between clients and serves.
+ * Servers will often differentiate purely synthetic entities by setting
+ * their version to 0, signaling that they should never be cached and
+ * should be accessed synchronously.
+ *
+ * See Also://plan9.bell-labs.com/magic/man2html/2/stat
+ */
 struct p9_qid {
        u8 type;
        u32 version;
        u64 path;
 };
-/* Plan 9 file metadata (stat) structure */
+/**
+ * struct p9_stat - file system metadata information
+ * @size: length prefix for this stat structure instance
+ * @type: the type of the server (equivilent to a major number)
+ * @dev: the sub-type of the server (equivilent to a minor number)
+ * @qid: unique id from the server of type &p9_qid
+ * @mode: Plan 9 format permissions of type &p9_perm_t
+ * @atime: Last access/read time
+ * @mtime: Last modify/write time
+ * @length: file length
+ * @name: last element of path (aka filename) in type &p9_str
+ * @uid: owner name in type &p9_str
+ * @gid: group owner in type &p9_str
+ * @muid: last modifier in type &p9_str
+ * @extension: area used to encode extended UNIX support in type &p9_str
+ * @n_uid: numeric user id of owner (part of 9p2000.u extension)
+ * @n_gid: numeric group id (part of 9p2000.u extension)
+ * @n_muid: numeric user id of laster modifier (part of 9p2000.u extension)
+ *
+ * See Also: http://plan9.bell-labs.com/magic/man2html/2/stat
+ */
 struct p9_stat {
        u16 size;
        u16 type;
@@ -179,10 +344,14 @@ struct p9_stat {
        u32 n_muid;                     /* 9p2000.u extensions */
 };
-/* file metadata (stat) structure used to create Twstat message
+/*
-   The is similar to p9_stat, but the strings don't point to
+ * file metadata (stat) structure used to create Twstat message
-   the same memory block and should be freed separately
+ * The is identical to &p9_stat, but the strings don't point to
-*/
+ * the same memory block and should be freed separately
+ *
+ * See Also: http://plan9.bell-labs.com/magic/man2html/2/stat
+ */
 struct p9_wstat {
        u16 size;
        u16 type;
@@ -335,10 +504,20 @@ struct p9_twstat {
 struct p9_rwstat {
 };
-/*
+/**
-  * fcall is the primary packet structure
+ * struct p9_fcall - primary packet structure
-  *
+ * @size: prefixed length of the structure
-  */
+ * @id: protocol operating identifier of type &p9_msg_t
+ * @tag: transaction id of the request
+ * @sdata: payload
+ * @params: per-operation parameters
+ *
+ * &p9_fcall represents the structure for all 9P RPC
+ * transactions.  Requests are packaged into fcalls, and reponses
+ * must be extracted from them.
+ *
+ * See Also: http://plan9.bell-labs.com/magic/man2html/2/fcall
+ */
 struct p9_fcall {
        u32 size;
@@ -416,4 +595,5 @@ int p9_idpool_check(int id, struct p9_idpool *p);
 int p9_error_init(void);
 int p9_errstr2errno(char *, int);
+int p9_trans_fd_init(void);
 #endif /* NET_9P_H */
diff --git a/include/net/9p/client.h b/include/net/9p/client.h
index e52f93d9ac5f..c936dd14de41 100644
--- a/include/net/9p/client.h
+++ b/include/net/9p/client.h
@@ -26,6 +26,23 @@
 #ifndef NET_9P_CLIENT_H
 #define NET_9P_CLIENT_H
+/**
+ * struct p9_client - per client instance state
+ * @lock: protect @fidlist
+ * @msize: maximum data size negotiated by protocol
+ * @dotu: extension flags negotiated by protocol
+ * @trans_mod: module API instantiated with this client
+ * @trans: tranport instance state and API
+ * @conn: connection state information used by trans_fd
+ * @fidpool: fid handle accounting for session
+ * @fidlist: List of active fid handles
+ *
+ * The client structure is used to keep track of various per-client
+ * state that has been instantiated.
+ *
+ * Bugs: duplicated data and potentially unnecessary elements.
+ */
 struct p9_client {
        spinlock_t lock; /* protect client structure */
        int msize;
@@ -38,6 +55,24 @@ struct p9_client {
        struct list_head fidlist;
 };
+/**
+ * struct p9_fid - file system entity handle
+ * @clnt: back pointer to instantiating &p9_client
+ * @fid: numeric identifier for this handle
+ * @mode: current mode of this fid (enum?)
+ * @qid: the &p9_qid server identifier this handle points to
+ * @iounit: the server reported maximum transaction size for this file
+ * @uid: the numeric uid of the local user who owns this handle
+ * @aux: transport specific information (unused?)
+ * @rdir_fpos: tracks offset of file position when reading directory contents
+ * @rdir_pos: (unused?)
+ * @rdir_fcall: holds response of last directory read request
+ * @flist: per-client-instance fid tracking
+ * @dlist: per-dentry fid tracking
+ *
+ * TODO: This needs lots of explanation.
+ */
 struct p9_fid {
        struct p9_client *clnt;
        u32 fid;
diff --git a/include/net/9p/transport.h b/include/net/9p/transport.h
index d2209ae9d18b..0db3a4038dc0 100644
--- a/include/net/9p/transport.h
+++ b/include/net/9p/transport.h
@@ -26,12 +26,40 @@
 #ifndef NET_9P_TRANSPORT_H
 #define NET_9P_TRANSPORT_H
+/**
+ * enum p9_trans_status - different states of underlying transports
+ * @Connected: transport is connected and healthy
+ * @Disconnected: transport has been disconnected
+ * @Hung: transport is connected by wedged
+ *
+ * This enumeration details the various states a transport
+ * instatiation can be in.
+ */
 enum p9_trans_status {
        Connected,
        Disconnected,
        Hung,
 };
+/**
+ * struct p9_trans - per-transport state and API
+ * @status: transport &p9_trans_status
+ * @msize: negotiated maximum packet size (duplicate from client)
+ * @extended: negotiated protocol extensions (duplicate from client)
+ * @priv: transport private data
+ * @close: member function to disconnect and close the transport
+ * @rpc: member function to issue a request to the transport
+ *
+ * This is the basic API for a transport instance.  It is used as
+ * a handle by the client to issue requests.  This interface is currently
+ * in flux during reorganization.
+ *
+ * Bugs: there is lots of duplicated data here and its not clear that
+ * the member functions need to be per-instance versus per transport
+ * module.
+ */
 struct p9_trans {
        enum p9_trans_status status;
        int msize;
@@ -42,6 +70,21 @@ struct p9_trans {
                                                        struct p9_fcall **rc);
 };
+/**
+ * struct p9_trans_module - transport module interface
+ * @list: used to maintain a list of currently available transports
+ * @name: the human-readable name of the transport
+ * @maxsize: transport provided maximum packet size
+ * @def: set if this transport should be considered the default
+ * @create: member function to create a new connection on this transport
+ *
+ * This is the basic API for a transport module which is registered by the
+ * transport module with the 9P core network module and used by the client
+ * to instantiate a new connection on a transport.
+ *
+ * Bugs: the transport module list isn't protected.
+ */
 struct p9_trans_module {
        struct list_head list;
        char *name;             /* name of transport */
@@ -53,5 +96,4 @@ struct p9_trans_module {
 void v9fs_register_trans(struct p9_trans_module *m);
 struct p9_trans_module *v9fs_match_trans(const substring_t *name);
 struct p9_trans_module *v9fs_default_trans(void);
 #endif /* NET_9P_TRANSPORT_H */
diff --git a/include/net/addrconf.h b/include/net/addrconf.h
index 0a2f0372df31..bbd3d583c6e6 100644
--- a/include/net/addrconf.h
+++ b/include/net/addrconf.h
@@ -94,6 +94,28 @@ extern void			addrconf_join_solict(struct net_device *dev,
 extern void                     addrconf_leave_solict(struct inet6_dev *idev,
                                        struct in6_addr *addr);
+static inline unsigned long addrconf_timeout_fixup(u32 timeout,
+                                                    unsigned unit)
+{
+        if (timeout == 0xffffffff)
+                return ~0UL;
+        /*
+         * Avoid arithmetic overflow.
+         * Assuming unit is constant and non-zero, this "if" statement
+         * will go away on 64bit archs.
+         */
+        if (0xfffffffe > LONG_MAX / unit && timeout > LONG_MAX / unit)
+                return LONG_MAX / unit;
+        return timeout;
+}
+static inline int addrconf_finite_timeout(unsigned long timeout)
+{
+        return ~timeout;
+}
 /*
 *      IPv6 Address Label subsystem (addrlabel.c)
 */
diff --git a/include/net/genetlink.h b/include/net/genetlink.h
index decdda546829..747c255d1df0 100644
--- a/include/net/genetlink.h
+++ b/include/net/genetlink.h
@@ -162,9 +162,9 @@ static inline int genlmsg_end(struct sk_buff *skb, void *hdr)
 * @skb: socket buffer the message is stored in
 * @hdr: generic netlink message header
 */
-static inline int genlmsg_cancel(struct sk_buff *skb, void *hdr)
+static inline void genlmsg_cancel(struct sk_buff *skb, void *hdr)
 {
-        return nlmsg_cancel(skb, hdr - GENL_HDRLEN - NLMSG_HDRLEN);
+        nlmsg_cancel(skb, hdr - GENL_HDRLEN - NLMSG_HDRLEN);
 }
 /**
diff --git a/include/net/inet_sock.h b/include/net/inet_sock.h
index a42cd63d241a..9fabe5b38912 100644
--- a/include/net/inet_sock.h
+++ b/include/net/inet_sock.h
@@ -197,4 +197,14 @@ static inline int inet_iif(const struct sk_buff *skb)
        return skb->rtable->rt_iif;
 }
+static inline struct request_sock *inet_reqsk_alloc(struct request_sock_ops *ops)
+{
+        struct request_sock *req = reqsk_alloc(ops);
+        if (req != NULL)
+                inet_rsk(req)->opt = NULL;
+        return req;
+}
 #endif  /* _INET_SOCK_H */
diff --git a/include/net/irda/discovery.h b/include/net/irda/discovery.h
index e4efad1f9eff..0ce93398720d 100644
--- a/include/net/irda/discovery.h
+++ b/include/net/irda/discovery.h
@@ -57,9 +57,6 @@ typedef union {
        __u8  byte[2];
 } __u16_host_order;
-/* Same purpose, different application */
-#define u16ho(array) (* ((__u16 *) array))
 /* Types of discovery */
 typedef enum {
        DISCOVERY_LOG,          /* What's in our discovery log */
diff --git a/include/net/mac80211.h b/include/net/mac80211.h
index 4a80d74975e8..dae3f9ec1154 100644
--- a/include/net/mac80211.h
+++ b/include/net/mac80211.h
@@ -1594,13 +1594,16 @@ void ieee80211_wake_queues(struct ieee80211_hw *hw);
 void ieee80211_scan_completed(struct ieee80211_hw *hw);
 /**
- * ieee80211_iterate_active_interfaces - iterate active interfaces
+ * ieee80211_iterate_active_interfaces- iterate active interfaces
 *
 * This function iterates over the interfaces associated with a given
 * hardware that are currently active and calls the callback for them.
+ * This function allows the iterator function to sleep, when the iterator
+ * function is atomic @ieee80211_iterate_active_interfaces_atomic can
+ * be used.
 *
 * @hw: the hardware struct of which the interfaces should be iterated over
- * @iterator: the iterator function to call, cannot sleep
+ * @iterator: the iterator function to call
 * @data: first argument of the iterator function
 */
 void ieee80211_iterate_active_interfaces(struct ieee80211_hw *hw,
@@ -1609,6 +1612,24 @@ void ieee80211_iterate_active_interfaces(struct ieee80211_hw *hw,
                                         void *data);
 /**
+ * ieee80211_iterate_active_interfaces_atomic - iterate active interfaces
+ *
+ * This function iterates over the interfaces associated with a given
+ * hardware that are currently active and calls the callback for them.
+ * This function requires the iterator callback function to be atomic,
+ * if that is not desired, use @ieee80211_iterate_active_interfaces instead.
+ *
+ * @hw: the hardware struct of which the interfaces should be iterated over
+ * @iterator: the iterator function to call, cannot sleep
+ * @data: first argument of the iterator function
+ */
+void ieee80211_iterate_active_interfaces_atomic(struct ieee80211_hw *hw,
+                                                void (*iterator)(void *data,
+                                                    u8 *mac,
+                                                    struct ieee80211_vif *vif),
+                                                void *data);
+/**
 * ieee80211_start_tx_ba_session - Start a tx Block Ack session.
 * @hw: pointer as obtained from ieee80211_alloc_hw().
 * @ra: receiver address of the BA session recipient
diff --git a/include/net/ndisc.h b/include/net/ndisc.h
index 9c451ff2f4f4..a01b7c4dc763 100644
--- a/include/net/ndisc.h
+++ b/include/net/ndisc.h
@@ -129,6 +129,10 @@ extern int 			ndisc_ifinfo_sysctl_change(struct ctl_table *ctl,
                                                           void __user *buffer,
                                                           size_t *lenp,
                                                           loff_t *ppos);
+int ndisc_ifinfo_sysctl_strategy(ctl_table *ctl, int __user *name,
+                                 int nlen, void __user *oldval,
+                                 size_t __user *oldlenp,
+                                 void __user *newval, size_t newlen);
 #endif
 extern void                     inet6_ifinfo_notify(int event,
diff --git a/include/net/netlink.h b/include/net/netlink.h
index a5506c42f03c..dfc3701dfcc3 100644
--- a/include/net/netlink.h
+++ b/include/net/netlink.h
@@ -556,14 +556,12 @@ static inline void *nlmsg_get_pos(struct sk_buff *skb)
 * @skb: socket buffer the message is stored in
 * @mark: mark to trim to
 *
- * Trims the message to the provided mark. Returns -1.
+ * Trims the message to the provided mark.
 */
-static inline int nlmsg_trim(struct sk_buff *skb, const void *mark)
+static inline void nlmsg_trim(struct sk_buff *skb, const void *mark)
 {
        if (mark)
                skb_trim(skb, (unsigned char *) mark - skb->data);
-        return -1;
 }
 /**
@@ -572,11 +570,11 @@ static inline int nlmsg_trim(struct sk_buff *skb, const void *mark)
 * @nlh: netlink message header
 *
 * Removes the complete netlink message including all
- * attributes from the socket buffer again. Returns -1.
+ * attributes from the socket buffer again.
 */
-static inline int nlmsg_cancel(struct sk_buff *skb, struct nlmsghdr *nlh)
+static inline void nlmsg_cancel(struct sk_buff *skb, struct nlmsghdr *nlh)
 {
-        return nlmsg_trim(skb, nlh);
+        nlmsg_trim(skb, nlh);
 }
 /**
@@ -772,12 +770,13 @@ static inline int __nla_parse_nested_compat(struct nlattr *tb[], int maxtype,
                                            const struct nla_policy *policy,
                                            int len)
 {
-        if (nla_len(nla) < len)
+        int nested_len = nla_len(nla) - NLA_ALIGN(len);
-                return -1;
-        if (nla_len(nla) >= NLA_ALIGN(len) + sizeof(struct nlattr))
+        if (nested_len < 0)
-                return nla_parse_nested(tb, maxtype,
+                return -EINVAL;
-                                        nla_data(nla) + NLA_ALIGN(len),
+        if (nested_len >= nla_attr_size(0))
-                                        policy);
+                return nla_parse(tb, maxtype, nla_data(nla) + NLA_ALIGN(len),
+                                 nested_len, policy);
        memset(tb, 0, sizeof(struct nlattr *) * (maxtype + 1));
        return 0;
 }
@@ -1079,11 +1078,11 @@ static inline int nla_nest_compat_end(struct sk_buff *skb, struct nlattr *start)
 * @start: container attribute
 *
 * Removes the container attribute and including all nested
- * attributes. Returns -1.
+ * attributes. Returns -EMSGSIZE
 */
-static inline int nla_nest_cancel(struct sk_buff *skb, struct nlattr *start)
+static inline void nla_nest_cancel(struct sk_buff *skb, struct nlattr *start)
 {
-        return nlmsg_trim(skb, start);
+        nlmsg_trim(skb, start);
 }
 /**
diff --git a/include/net/request_sock.h b/include/net/request_sock.h
index b220b5f624de..0c96e7bed5db 100644
--- a/include/net/request_sock.h
+++ b/include/net/request_sock.h
@@ -115,8 +115,8 @@ struct request_sock_queue {
        struct request_sock     *rskq_accept_head;
        struct request_sock     *rskq_accept_tail;
        rwlock_t                syn_wait_lock;
-        u16                     rskq_defer_accept;
+        u8                      rskq_defer_accept;
-        /* 2 bytes hole, try to pack */
+        /* 3 bytes hole, try to pack */
        struct listen_sock      *listen_opt;
 };
diff --git a/include/net/sctp/structs.h b/include/net/sctp/structs.h
index 0ce0443c5b79..7f25195f9855 100644
--- a/include/net/sctp/structs.h
+++ b/include/net/sctp/structs.h
@@ -548,7 +548,8 @@ struct sctp_af {
        struct dst_entry *(*get_dst)    (struct sctp_association *asoc,
                                         union sctp_addr *daddr,
                                         union sctp_addr *saddr);
-        void            (*get_saddr)    (struct sctp_association *asoc,
+        void            (*get_saddr)    (struct sctp_sock *sk,
+                                         struct sctp_association *asoc,
                                         struct dst_entry *dst,
                                         union sctp_addr *daddr,
                                         union sctp_addr *saddr);
@@ -587,6 +588,7 @@ struct sctp_af {
        int             (*is_ce)        (const struct sk_buff *sk);
        void            (*seq_dump_addr)(struct seq_file *seq,
                                         union sctp_addr *addr);
+        void            (*ecn_capable)(struct sock *sk);
        __u16           net_header_len;
        int             sockaddr_len;
        sa_family_t     sa_family;
@@ -901,7 +903,10 @@ struct sctp_transport {
         *              calculation completes (i.e. the DATA chunk
         *              is SACK'd) clear this flag.
         */
-        int rto_pending;
+        __u8 rto_pending;
+        /* Flag to track the current fast recovery state */
+        __u8 fast_recovery;
        /*
         * These are the congestion stats.
@@ -920,6 +925,9 @@ struct sctp_transport {
        /* Data that has been sent, but not acknowledged. */
        __u32 flight_size;
+        /* TSN marking the fast recovery exit point */
+        __u32 fast_recovery_exit;
        /* Destination */
        struct dst_entry *dst;
        /* Source address. */
@@ -1044,7 +1052,7 @@ void sctp_transport_route(struct sctp_transport *, union sctp_addr *,
                          struct sctp_sock *);
 void sctp_transport_pmtu(struct sctp_transport *);
 void sctp_transport_free(struct sctp_transport *);
-void sctp_transport_reset_timers(struct sctp_transport *);
+void sctp_transport_reset_timers(struct sctp_transport *, int);
 void sctp_transport_hold(struct sctp_transport *);
 void sctp_transport_put(struct sctp_transport *);
 void sctp_transport_update_rto(struct sctp_transport *, __u32);
@@ -1134,6 +1142,9 @@ struct sctp_outq {
        /* How many unackd bytes do we have in-flight?  */
        __u32 outstanding_bytes;
+        /* Are we doing fast-rtx on this queue */
+        char fast_rtx;
        /* Corked? */
        char cork;
diff --git a/include/net/syncppp.h b/include/net/syncppp.h
index 877efa434700..e43f4070d892 100644
--- a/include/net/syncppp.h
+++ b/include/net/syncppp.h
@@ -59,7 +59,7 @@ struct ppp_device
 static inline struct sppp *sppp_of(struct net_device *dev) 
 {
-        struct ppp_device **ppp = dev->priv;
+        struct ppp_device **ppp = dev->ml_priv;
        BUG_ON((*ppp)->dev != dev);
        return &(*ppp)->sppp;
 }
diff --git a/include/net/tcp.h b/include/net/tcp.h
index 633147cb6bbc..cf54034019d9 100644
--- a/include/net/tcp.h
+++ b/include/net/tcp.h
@@ -139,7 +139,6 @@ extern void tcp_time_wait(struct sock *sk, int state, int timeo);
 #define MAX_TCP_KEEPINTVL       32767
 #define MAX_TCP_KEEPCNT         127
 #define MAX_TCP_SYNCNT          127
-#define MAX_TCP_ACCEPT_DEFERRED 65535
 #define TCP_SYNQ_INTERVAL       (HZ/5)  /* Period of SYNACK timer */
@@ -433,7 +432,6 @@ extern struct sk_buff *		tcp_make_synack(struct sock *sk,
 extern int                      tcp_disconnect(struct sock *sk, int flags);
-extern void                     tcp_unhash(struct sock *sk);
 /* From syncookies.c */
 extern __u32 syncookie_secret[2][16-4+SHA_DIGEST_WORDS];
diff --git a/include/net/transp_v6.h b/include/net/transp_v6.h
index 27394e0447d8..112934a3288d 100644
--- a/include/net/transp_v6.h
+++ b/include/net/transp_v6.h
@@ -40,7 +40,8 @@ extern int			datagram_recv_ctl(struct sock *sk,
                                                  struct msghdr *msg,
                                                  struct sk_buff *skb);
-extern int                      datagram_send_ctl(struct msghdr *msg,
+extern int                      datagram_send_ctl(struct net *net,
+                                                  struct msghdr *msg,
                                                  struct flowi *fl,
                                                  struct ipv6_txoptions *opt,
                                                  int *hlimit, int *tclass);
diff --git a/include/net/udp.h b/include/net/udp.h
index 3e55a99b0ba3..ccce83707046 100644
--- a/include/net/udp.h
+++ b/include/net/udp.h
@@ -135,6 +135,7 @@ extern void	udp_err(struct sk_buff *, u32);
 extern int      udp_sendmsg(struct kiocb *iocb, struct sock *sk,
                            struct msghdr *msg, size_t len);
+extern void     udp_flush_pending_frames(struct sock *sk);
 extern int      udp_rcv(struct sk_buff *skb);
 extern int      udp_ioctl(struct sock *sk, int cmd, unsigned long arg);
diff --git a/include/rdma/ib_verbs.h b/include/rdma/ib_verbs.h
index 911a661b7278..31d30b1852e8 100644
--- a/include/rdma/ib_verbs.h
+++ b/include/rdma/ib_verbs.h
@@ -105,7 +105,6 @@ enum ib_device_cap_flags {
         */
        IB_DEVICE_UD_IP_CSUM            = (1<<18),
        IB_DEVICE_UD_TSO                = (1<<19),
-        IB_DEVICE_SEND_W_INV            = (1<<21),
 };
 enum ib_atomic_cap {
diff --git a/include/sound/ac97_codec.h b/include/sound/ac97_codec.h
index 049edc5e6461..9c309daf492b 100644
--- a/include/sound/ac97_codec.h
+++ b/include/sound/ac97_codec.h
@@ -505,6 +505,7 @@ struct snd_ac97 {
                        unsigned short pcmreg[3];       // PCM registers
                        unsigned short codec_cfg[3];    // CODEC_CFG bits
                        unsigned char swap_mic_linein;  // AD1986/AD1986A only
+                        unsigned char lo_as_master;     /* LO as master */
                } ad18xx;
                unsigned int dev_flags;         /* device specific */
        } spec;
diff --git a/include/sound/soc.h b/include/sound/soc.h
index e6ea6f750941..d3c8c033dff8 100644
--- a/include/sound/soc.h
+++ b/include/sound/soc.h
@@ -238,7 +238,7 @@ int snd_soc_info_volsw(struct snd_kcontrol *kcontrol,
        struct snd_ctl_elem_info *uinfo);
 int snd_soc_info_volsw_ext(struct snd_kcontrol *kcontrol,
        struct snd_ctl_elem_info *uinfo);
-#define snd_soc_info_bool_ext           snd_ctl_boolean_mono
+#define snd_soc_info_bool_ext           snd_ctl_boolean_mono_info
 int snd_soc_get_volsw(struct snd_kcontrol *kcontrol,
        struct snd_ctl_elem_value *ucontrol);
 int snd_soc_put_volsw(struct snd_kcontrol *kcontrol,
author	Ingo Molnar <mingo@elte.hu>	2008-06-16 05:28:04 -0400
committer	Ingo Molnar <mingo@elte.hu>	2008-06-16 05:28:04 -0400
commit	7aaaec38fcd9ef3172e69f8c19f20113830a8498 (patch)
tree	b12a1c359ad53ae10601f77b3438bb27c3c8f337 /include
parent	1ac97018169c5a13feaa90d9671f2d6ba2d9e86e (diff)
parent	066519068ad2fbe98c7f45552b1f592903a9c8c8 (diff)