aboutsummaryrefslogtreecommitdiffstats
path: root/include
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@g5.osdl.org>2006-06-22 18:07:59 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2006-06-22 18:07:59 -0400
commit6c763eb9ead86c612492b59287b36c0dcf7d09b1 (patch)
tree46497ff44bcf909517bffac70f0d6c7ad45ae1f0 /include
parentdcc1a66a09420ccc5a22671bddc5a842f92d67e5 (diff)
parentcf34a8e07f02c76f3f1232eecb681301a3d7b10b (diff)
Merge master.kernel.org:/pub/scm/linux/kernel/git/gregkh/pci-2.6
* master.kernel.org:/pub/scm/linux/kernel/git/gregkh/pci-2.6: (27 commits) [PATCH] PCI: nVidia quirk to make AER PCI-E extended capability visible [PATCH] PCI: fix issues with extended conf space when MMCONFIG disabled because of e820 [PATCH] PCI: Bus Parity Status sysfs interface [PATCH] PCI: fix memory leak in MMCONFIG error path [PATCH] PCI: fix error with pci_get_device() call in the mpc85xx driver [PATCH] PCI: MSI-K8T-Neo2-Fir: run only where needed [PATCH] PCI: fix race with pci_walk_bus and pci_destroy_dev [PATCH] PCI: clean up pci documentation to be more specific [PATCH] PCI: remove unneeded msi code [PATCH] PCI: don't move ioapics below PCI bridge [PATCH] PCI: cleanup unused variable about msi driver [PATCH] PCI: disable msi mode in pci_disable_device [PATCH] PCI: Allow MSI to work on kexec kernel [PATCH] PCI: AMD 8131 MSI quirk called too late, bus_flags not inherited ? [PATCH] PCI: Move various PCI IDs to header file [PATCH] PCI Bus Parity Status-broken hardware attribute, EDAC foundation [PATCH] PCI: i386/x86_84: disable PCI resource decode on device disable [PATCH] PCI ACPI: Rename the functions to avoid multiple instances. [PATCH] PCI: don't enable device if already enabled [PATCH] PCI: Add a "enable" sysfs attribute to the pci devices to allow userspace (Xorg) to enable devices without doing foul direct access ...
Diffstat (limited to 'include')
-rw-r--r--include/asm-i386/msi.h10
-rw-r--r--include/asm-ia64/hw_irq.h15
-rw-r--r--include/asm-ia64/machvec.h7
-rw-r--r--include/asm-ia64/machvec_sn2.h7
-rw-r--r--include/asm-ia64/msi.h12
-rw-r--r--include/asm-ia64/sn/intr.h8
-rw-r--r--include/asm-ia64/sn/pcibr_provider.h5
-rw-r--r--include/asm-ia64/sn/pcibus_provider_defs.h17
-rw-r--r--include/asm-ia64/sn/tiocp.h3
-rw-r--r--include/asm-x86_64/msi.h10
-rw-r--r--include/linux/pci.h4
-rw-r--r--include/linux/pci_ids.h11
12 files changed, 99 insertions, 10 deletions
diff --git a/include/asm-i386/msi.h b/include/asm-i386/msi.h
index f041d4495faf..b11c4b7dfaef 100644
--- a/include/asm-i386/msi.h
+++ b/include/asm-i386/msi.h
@@ -9,7 +9,15 @@
9#include <asm/desc.h> 9#include <asm/desc.h>
10#include <mach_apic.h> 10#include <mach_apic.h>
11 11
12#define LAST_DEVICE_VECTOR 232 12#define LAST_DEVICE_VECTOR (FIRST_SYSTEM_VECTOR - 1)
13#define MSI_TARGET_CPU_SHIFT 12 13#define MSI_TARGET_CPU_SHIFT 12
14 14
15extern struct msi_ops msi_apic_ops;
16
17static inline int msi_arch_init(void)
18{
19 msi_register(&msi_apic_ops);
20 return 0;
21}
22
15#endif /* ASM_MSI_H */ 23#endif /* ASM_MSI_H */
diff --git a/include/asm-ia64/hw_irq.h b/include/asm-ia64/hw_irq.h
index 0cf119b42f7d..ea8b8c407ab4 100644
--- a/include/asm-ia64/hw_irq.h
+++ b/include/asm-ia64/hw_irq.h
@@ -47,9 +47,19 @@ typedef u8 ia64_vector;
47#define IA64_CMC_VECTOR 0x1f /* corrected machine-check interrupt vector */ 47#define IA64_CMC_VECTOR 0x1f /* corrected machine-check interrupt vector */
48/* 48/*
49 * Vectors 0x20-0x2f are reserved for legacy ISA IRQs. 49 * Vectors 0x20-0x2f are reserved for legacy ISA IRQs.
50 * Use vectors 0x30-0xe7 as the default device vector range for ia64.
51 * Platforms may choose to reduce this range in platform_irq_setup, but the
52 * platform range must fall within
53 * [IA64_DEF_FIRST_DEVICE_VECTOR..IA64_DEF_LAST_DEVICE_VECTOR]
50 */ 54 */
51#define IA64_FIRST_DEVICE_VECTOR 0x30 55extern int ia64_first_device_vector;
52#define IA64_LAST_DEVICE_VECTOR 0xe7 56extern int ia64_last_device_vector;
57
58#define IA64_DEF_FIRST_DEVICE_VECTOR 0x30
59#define IA64_DEF_LAST_DEVICE_VECTOR 0xe7
60#define IA64_FIRST_DEVICE_VECTOR ia64_first_device_vector
61#define IA64_LAST_DEVICE_VECTOR ia64_last_device_vector
62#define IA64_MAX_DEVICE_VECTORS (IA64_DEF_LAST_DEVICE_VECTOR - IA64_DEF_FIRST_DEVICE_VECTOR + 1)
53#define IA64_NUM_DEVICE_VECTORS (IA64_LAST_DEVICE_VECTOR - IA64_FIRST_DEVICE_VECTOR + 1) 63#define IA64_NUM_DEVICE_VECTORS (IA64_LAST_DEVICE_VECTOR - IA64_FIRST_DEVICE_VECTOR + 1)
54 64
55#define IA64_MCA_RENDEZ_VECTOR 0xe8 /* MCA rendez interrupt */ 65#define IA64_MCA_RENDEZ_VECTOR 0xe8 /* MCA rendez interrupt */
@@ -83,6 +93,7 @@ extern struct hw_interrupt_type irq_type_ia64_lsapic; /* CPU-internal interrupt
83 93
84extern int assign_irq_vector (int irq); /* allocate a free vector */ 94extern int assign_irq_vector (int irq); /* allocate a free vector */
85extern void free_irq_vector (int vector); 95extern void free_irq_vector (int vector);
96extern int reserve_irq_vector (int vector);
86extern void ia64_send_ipi (int cpu, int vector, int delivery_mode, int redirect); 97extern void ia64_send_ipi (int cpu, int vector, int delivery_mode, int redirect);
87extern void register_percpu_irq (ia64_vector vec, struct irqaction *action); 98extern void register_percpu_irq (ia64_vector vec, struct irqaction *action);
88 99
diff --git a/include/asm-ia64/machvec.h b/include/asm-ia64/machvec.h
index 0df72a134c8b..15b545a897a4 100644
--- a/include/asm-ia64/machvec.h
+++ b/include/asm-ia64/machvec.h
@@ -75,6 +75,7 @@ typedef unsigned char ia64_mv_readb_relaxed_t (const volatile void __iomem *);
75typedef unsigned short ia64_mv_readw_relaxed_t (const volatile void __iomem *); 75typedef unsigned short ia64_mv_readw_relaxed_t (const volatile void __iomem *);
76typedef unsigned int ia64_mv_readl_relaxed_t (const volatile void __iomem *); 76typedef unsigned int ia64_mv_readl_relaxed_t (const volatile void __iomem *);
77typedef unsigned long ia64_mv_readq_relaxed_t (const volatile void __iomem *); 77typedef unsigned long ia64_mv_readq_relaxed_t (const volatile void __iomem *);
78typedef int ia64_mv_msi_init_t (void);
78 79
79static inline void 80static inline void
80machvec_noop (void) 81machvec_noop (void)
@@ -153,6 +154,7 @@ extern void machvec_tlb_migrate_finish (struct mm_struct *);
153# define platform_readl_relaxed ia64_mv.readl_relaxed 154# define platform_readl_relaxed ia64_mv.readl_relaxed
154# define platform_readq_relaxed ia64_mv.readq_relaxed 155# define platform_readq_relaxed ia64_mv.readq_relaxed
155# define platform_migrate ia64_mv.migrate 156# define platform_migrate ia64_mv.migrate
157# define platform_msi_init ia64_mv.msi_init
156# endif 158# endif
157 159
158/* __attribute__((__aligned__(16))) is required to make size of the 160/* __attribute__((__aligned__(16))) is required to make size of the
@@ -202,6 +204,7 @@ struct ia64_machine_vector {
202 ia64_mv_readl_relaxed_t *readl_relaxed; 204 ia64_mv_readl_relaxed_t *readl_relaxed;
203 ia64_mv_readq_relaxed_t *readq_relaxed; 205 ia64_mv_readq_relaxed_t *readq_relaxed;
204 ia64_mv_migrate_t *migrate; 206 ia64_mv_migrate_t *migrate;
207 ia64_mv_msi_init_t *msi_init;
205} __attribute__((__aligned__(16))); /* align attrib? see above comment */ 208} __attribute__((__aligned__(16))); /* align attrib? see above comment */
206 209
207#define MACHVEC_INIT(name) \ 210#define MACHVEC_INIT(name) \
@@ -247,6 +250,7 @@ struct ia64_machine_vector {
247 platform_readl_relaxed, \ 250 platform_readl_relaxed, \
248 platform_readq_relaxed, \ 251 platform_readq_relaxed, \
249 platform_migrate, \ 252 platform_migrate, \
253 platform_msi_init, \
250} 254}
251 255
252extern struct ia64_machine_vector ia64_mv; 256extern struct ia64_machine_vector ia64_mv;
@@ -400,5 +404,8 @@ extern int ia64_pci_legacy_write(struct pci_bus *bus, u16 port, u32 val, u8 size
400#ifndef platform_migrate 404#ifndef platform_migrate
401# define platform_migrate machvec_noop_task 405# define platform_migrate machvec_noop_task
402#endif 406#endif
407#ifndef platform_msi_init
408# define platform_msi_init ((ia64_mv_msi_init_t*)NULL)
409#endif
403 410
404#endif /* _ASM_IA64_MACHVEC_H */ 411#endif /* _ASM_IA64_MACHVEC_H */
diff --git a/include/asm-ia64/machvec_sn2.h b/include/asm-ia64/machvec_sn2.h
index da1d43755afe..cf724dc79d8c 100644
--- a/include/asm-ia64/machvec_sn2.h
+++ b/include/asm-ia64/machvec_sn2.h
@@ -67,6 +67,8 @@ extern ia64_mv_dma_sync_sg_for_device sn_dma_sync_sg_for_device;
67extern ia64_mv_dma_mapping_error sn_dma_mapping_error; 67extern ia64_mv_dma_mapping_error sn_dma_mapping_error;
68extern ia64_mv_dma_supported sn_dma_supported; 68extern ia64_mv_dma_supported sn_dma_supported;
69extern ia64_mv_migrate_t sn_migrate; 69extern ia64_mv_migrate_t sn_migrate;
70extern ia64_mv_msi_init_t sn_msi_init;
71
70 72
71/* 73/*
72 * This stuff has dual use! 74 * This stuff has dual use!
@@ -117,6 +119,11 @@ extern ia64_mv_migrate_t sn_migrate;
117#define platform_dma_mapping_error sn_dma_mapping_error 119#define platform_dma_mapping_error sn_dma_mapping_error
118#define platform_dma_supported sn_dma_supported 120#define platform_dma_supported sn_dma_supported
119#define platform_migrate sn_migrate 121#define platform_migrate sn_migrate
122#ifdef CONFIG_PCI_MSI
123#define platform_msi_init sn_msi_init
124#else
125#define platform_msi_init ((ia64_mv_msi_init_t*)NULL)
126#endif
120 127
121#include <asm/sn/io.h> 128#include <asm/sn/io.h>
122 129
diff --git a/include/asm-ia64/msi.h b/include/asm-ia64/msi.h
index 97890f7762b3..bb92b0dbde2f 100644
--- a/include/asm-ia64/msi.h
+++ b/include/asm-ia64/msi.h
@@ -14,4 +14,16 @@ static inline void set_intr_gate (int nr, void *func) {}
14#define ack_APIC_irq ia64_eoi 14#define ack_APIC_irq ia64_eoi
15#define MSI_TARGET_CPU_SHIFT 4 15#define MSI_TARGET_CPU_SHIFT 4
16 16
17extern struct msi_ops msi_apic_ops;
18
19static inline int msi_arch_init(void)
20{
21 if (platform_msi_init)
22 return platform_msi_init();
23
24 /* default ops for most ia64 platforms */
25 msi_register(&msi_apic_ops);
26 return 0;
27}
28
17#endif /* ASM_MSI_H */ 29#endif /* ASM_MSI_H */
diff --git a/include/asm-ia64/sn/intr.h b/include/asm-ia64/sn/intr.h
index 60a51a406eec..12b54ddb06be 100644
--- a/include/asm-ia64/sn/intr.h
+++ b/include/asm-ia64/sn/intr.h
@@ -10,6 +10,7 @@
10#define _ASM_IA64_SN_INTR_H 10#define _ASM_IA64_SN_INTR_H
11 11
12#include <linux/rcupdate.h> 12#include <linux/rcupdate.h>
13#include <asm/sn/types.h>
13 14
14#define SGI_UART_VECTOR 0xe9 15#define SGI_UART_VECTOR 0xe9
15 16
@@ -40,6 +41,7 @@ struct sn_irq_info {
40 int irq_cpuid; /* kernel logical cpuid */ 41 int irq_cpuid; /* kernel logical cpuid */
41 int irq_irq; /* the IRQ number */ 42 int irq_irq; /* the IRQ number */
42 int irq_int_bit; /* Bridge interrupt pin */ 43 int irq_int_bit; /* Bridge interrupt pin */
44 /* <0 means MSI */
43 u64 irq_xtalkaddr; /* xtalkaddr IRQ is sent to */ 45 u64 irq_xtalkaddr; /* xtalkaddr IRQ is sent to */
44 int irq_bridge_type;/* pciio asic type (pciio.h) */ 46 int irq_bridge_type;/* pciio asic type (pciio.h) */
45 void *irq_bridge; /* bridge generating irq */ 47 void *irq_bridge; /* bridge generating irq */
@@ -53,6 +55,12 @@ struct sn_irq_info {
53}; 55};
54 56
55extern void sn_send_IPI_phys(int, long, int, int); 57extern void sn_send_IPI_phys(int, long, int, int);
58extern u64 sn_intr_alloc(nasid_t, int,
59 struct sn_irq_info *,
60 int, nasid_t, int);
61extern void sn_intr_free(nasid_t, int, struct sn_irq_info *);
62extern struct sn_irq_info *sn_retarget_vector(struct sn_irq_info *, nasid_t, int);
63extern struct list_head **sn_irq_lh;
56 64
57#define CPU_VECTOR_TO_IRQ(cpuid,vector) (vector) 65#define CPU_VECTOR_TO_IRQ(cpuid,vector) (vector)
58 66
diff --git a/include/asm-ia64/sn/pcibr_provider.h b/include/asm-ia64/sn/pcibr_provider.h
index 51260ab70d91..e3b0c3fe5eed 100644
--- a/include/asm-ia64/sn/pcibr_provider.h
+++ b/include/asm-ia64/sn/pcibr_provider.h
@@ -55,6 +55,7 @@
55#define PCI32_ATE_V (0x1 << 0) 55#define PCI32_ATE_V (0x1 << 0)
56#define PCI32_ATE_CO (0x1 << 1) 56#define PCI32_ATE_CO (0x1 << 1)
57#define PCI32_ATE_PREC (0x1 << 2) 57#define PCI32_ATE_PREC (0x1 << 2)
58#define PCI32_ATE_MSI (0x1 << 2)
58#define PCI32_ATE_PREF (0x1 << 3) 59#define PCI32_ATE_PREF (0x1 << 3)
59#define PCI32_ATE_BAR (0x1 << 4) 60#define PCI32_ATE_BAR (0x1 << 4)
60#define PCI32_ATE_ADDR_SHFT 12 61#define PCI32_ATE_ADDR_SHFT 12
@@ -117,8 +118,8 @@ struct pcibus_info {
117 118
118extern int pcibr_init_provider(void); 119extern int pcibr_init_provider(void);
119extern void *pcibr_bus_fixup(struct pcibus_bussoft *, struct pci_controller *); 120extern void *pcibr_bus_fixup(struct pcibus_bussoft *, struct pci_controller *);
120extern dma_addr_t pcibr_dma_map(struct pci_dev *, unsigned long, size_t); 121extern dma_addr_t pcibr_dma_map(struct pci_dev *, unsigned long, size_t, int type);
121extern dma_addr_t pcibr_dma_map_consistent(struct pci_dev *, unsigned long, size_t); 122extern dma_addr_t pcibr_dma_map_consistent(struct pci_dev *, unsigned long, size_t, int type);
122extern void pcibr_dma_unmap(struct pci_dev *, dma_addr_t, int); 123extern void pcibr_dma_unmap(struct pci_dev *, dma_addr_t, int);
123 124
124/* 125/*
diff --git a/include/asm-ia64/sn/pcibus_provider_defs.h b/include/asm-ia64/sn/pcibus_provider_defs.h
index ce3f6c328241..8f7c83d0f6d3 100644
--- a/include/asm-ia64/sn/pcibus_provider_defs.h
+++ b/include/asm-ia64/sn/pcibus_provider_defs.h
@@ -3,7 +3,7 @@
3 * License. See the file "COPYING" in the main directory of this archive 3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details. 4 * for more details.
5 * 5 *
6 * Copyright (C) 1992 - 1997, 2000-2004 Silicon Graphics, Inc. All rights reserved. 6 * Copyright (C) 1992 - 1997, 2000-2005 Silicon Graphics, Inc. All rights reserved.
7 */ 7 */
8#ifndef _ASM_IA64_SN_PCI_PCIBUS_PROVIDER_H 8#ifndef _ASM_IA64_SN_PCI_PCIBUS_PROVIDER_H
9#define _ASM_IA64_SN_PCI_PCIBUS_PROVIDER_H 9#define _ASM_IA64_SN_PCI_PCIBUS_PROVIDER_H
@@ -45,13 +45,24 @@ struct pci_controller;
45 */ 45 */
46 46
47struct sn_pcibus_provider { 47struct sn_pcibus_provider {
48 dma_addr_t (*dma_map)(struct pci_dev *, unsigned long, size_t); 48 dma_addr_t (*dma_map)(struct pci_dev *, unsigned long, size_t, int flags);
49 dma_addr_t (*dma_map_consistent)(struct pci_dev *, unsigned long, size_t); 49 dma_addr_t (*dma_map_consistent)(struct pci_dev *, unsigned long, size_t, int flags);
50 void (*dma_unmap)(struct pci_dev *, dma_addr_t, int); 50 void (*dma_unmap)(struct pci_dev *, dma_addr_t, int);
51 void * (*bus_fixup)(struct pcibus_bussoft *, struct pci_controller *); 51 void * (*bus_fixup)(struct pcibus_bussoft *, struct pci_controller *);
52 void (*force_interrupt)(struct sn_irq_info *); 52 void (*force_interrupt)(struct sn_irq_info *);
53 void (*target_interrupt)(struct sn_irq_info *); 53 void (*target_interrupt)(struct sn_irq_info *);
54}; 54};
55 55
56/*
57 * Flags used by the map interfaces
58 * bits 3:0 specifies format of passed in address
59 * bit 4 specifies that address is to be used for MSI
60 */
61
62#define SN_DMA_ADDRTYPE(x) ((x) & 0xf)
63#define SN_DMA_ADDR_PHYS 1 /* address is an xio address. */
64#define SN_DMA_ADDR_XIO 2 /* address is phys memory */
65#define SN_DMA_MSI 0x10 /* Bus address is to be used for MSI */
66
56extern struct sn_pcibus_provider *sn_pci_provider[]; 67extern struct sn_pcibus_provider *sn_pci_provider[];
57#endif /* _ASM_IA64_SN_PCI_PCIBUS_PROVIDER_H */ 68#endif /* _ASM_IA64_SN_PCI_PCIBUS_PROVIDER_H */
diff --git a/include/asm-ia64/sn/tiocp.h b/include/asm-ia64/sn/tiocp.h
index f47c08ab483c..e8ad0bb5b6c5 100644
--- a/include/asm-ia64/sn/tiocp.h
+++ b/include/asm-ia64/sn/tiocp.h
@@ -3,13 +3,14 @@
3 * License. See the file "COPYING" in the main directory of this archive 3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details. 4 * for more details.
5 * 5 *
6 * Copyright (C) 2003-2004 Silicon Graphics, Inc. All rights reserved. 6 * Copyright (C) 2003-2005 Silicon Graphics, Inc. All rights reserved.
7 */ 7 */
8#ifndef _ASM_IA64_SN_PCI_TIOCP_H 8#ifndef _ASM_IA64_SN_PCI_TIOCP_H
9#define _ASM_IA64_SN_PCI_TIOCP_H 9#define _ASM_IA64_SN_PCI_TIOCP_H
10 10
11#define TIOCP_HOST_INTR_ADDR 0x003FFFFFFFFFFFFFUL 11#define TIOCP_HOST_INTR_ADDR 0x003FFFFFFFFFFFFFUL
12#define TIOCP_PCI64_CMDTYPE_MEM (0x1ull << 60) 12#define TIOCP_PCI64_CMDTYPE_MEM (0x1ull << 60)
13#define TIOCP_PCI64_CMDTYPE_MSI (0x3ull << 60)
13 14
14 15
15/***************************************************************************** 16/*****************************************************************************
diff --git a/include/asm-x86_64/msi.h b/include/asm-x86_64/msi.h
index 356e0e82f50b..3ad2346624b2 100644
--- a/include/asm-x86_64/msi.h
+++ b/include/asm-x86_64/msi.h
@@ -10,7 +10,15 @@
10#include <asm/mach_apic.h> 10#include <asm/mach_apic.h>
11#include <asm/smp.h> 11#include <asm/smp.h>
12 12
13#define LAST_DEVICE_VECTOR 232 13#define LAST_DEVICE_VECTOR (FIRST_SYSTEM_VECTOR - 1)
14#define MSI_TARGET_CPU_SHIFT 12 14#define MSI_TARGET_CPU_SHIFT 12
15 15
16extern struct msi_ops msi_apic_ops;
17
18static inline int msi_arch_init(void)
19{
20 msi_register(&msi_apic_ops);
21 return 0;
22}
23
16#endif /* ASM_MSI_H */ 24#endif /* ASM_MSI_H */
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 6c4bc773f7b7..62a8c22f5f60 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -162,6 +162,9 @@ struct pci_dev {
162 unsigned int is_busmaster:1; /* device is busmaster */ 162 unsigned int is_busmaster:1; /* device is busmaster */
163 unsigned int no_msi:1; /* device may not use msi */ 163 unsigned int no_msi:1; /* device may not use msi */
164 unsigned int block_ucfg_access:1; /* userspace config space access is blocked */ 164 unsigned int block_ucfg_access:1; /* userspace config space access is blocked */
165 unsigned int broken_parity_status:1; /* Device generates false positive parity */
166 unsigned int msi_enabled:1;
167 unsigned int msix_enabled:1;
165 168
166 u32 saved_config_space[16]; /* config space saved at suspend time */ 169 u32 saved_config_space[16]; /* config space saved at suspend time */
167 struct hlist_head saved_cap_space; 170 struct hlist_head saved_cap_space;
@@ -496,6 +499,7 @@ int pci_set_dma_mask(struct pci_dev *dev, u64 mask);
496int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask); 499int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask);
497void pci_update_resource(struct pci_dev *dev, struct resource *res, int resno); 500void pci_update_resource(struct pci_dev *dev, struct resource *res, int resno);
498int pci_assign_resource(struct pci_dev *dev, int i); 501int pci_assign_resource(struct pci_dev *dev, int i);
502int pci_assign_resource_fixed(struct pci_dev *dev, int i);
499void pci_restore_bars(struct pci_dev *dev); 503void pci_restore_bars(struct pci_dev *dev);
500 504
501/* ROM control related routines */ 505/* ROM control related routines */
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index bcfe9d4f56ae..fd54a9d4c3d4 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -848,7 +848,12 @@
848 848
849 849
850#define PCI_VENDOR_ID_QLOGIC 0x1077 850#define PCI_VENDOR_ID_QLOGIC 0x1077
851#define PCI_DEVICE_ID_QLOGIC_ISP10160 0x1016
851#define PCI_DEVICE_ID_QLOGIC_ISP1020 0x1020 852#define PCI_DEVICE_ID_QLOGIC_ISP1020 0x1020
853#define PCI_DEVICE_ID_QLOGIC_ISP1080 0x1080
854#define PCI_DEVICE_ID_QLOGIC_ISP12160 0x1216
855#define PCI_DEVICE_ID_QLOGIC_ISP1240 0x1240
856#define PCI_DEVICE_ID_QLOGIC_ISP1280 0x1280
852#define PCI_DEVICE_ID_QLOGIC_ISP2100 0x2100 857#define PCI_DEVICE_ID_QLOGIC_ISP2100 0x2100
853#define PCI_DEVICE_ID_QLOGIC_ISP2200 0x2200 858#define PCI_DEVICE_ID_QLOGIC_ISP2200 0x2200
854#define PCI_DEVICE_ID_QLOGIC_ISP2300 0x2300 859#define PCI_DEVICE_ID_QLOGIC_ISP2300 0x2300
@@ -1018,6 +1023,7 @@
1018#define PCI_DEVICE_ID_NVIDIA_NVENET_8 0x0056 1023#define PCI_DEVICE_ID_NVIDIA_NVENET_8 0x0056
1019#define PCI_DEVICE_ID_NVIDIA_NVENET_9 0x0057 1024#define PCI_DEVICE_ID_NVIDIA_NVENET_9 0x0057
1020#define PCI_DEVICE_ID_NVIDIA_CK804_AUDIO 0x0059 1025#define PCI_DEVICE_ID_NVIDIA_CK804_AUDIO 0x0059
1026#define PCI_DEVICE_ID_NVIDIA_CK804_PCIE 0x005d
1021#define PCI_DEVICE_ID_NVIDIA_NFORCE2_SMBUS 0x0064 1027#define PCI_DEVICE_ID_NVIDIA_NFORCE2_SMBUS 0x0064
1022#define PCI_DEVICE_ID_NVIDIA_NFORCE2_IDE 0x0065 1028#define PCI_DEVICE_ID_NVIDIA_NFORCE2_IDE 0x0065
1023#define PCI_DEVICE_ID_NVIDIA_NVENET_2 0x0066 1029#define PCI_DEVICE_ID_NVIDIA_NVENET_2 0x0066
@@ -1946,6 +1952,7 @@
1946 1952
1947#define PCI_VENDOR_ID_MELLANOX 0x15b3 1953#define PCI_VENDOR_ID_MELLANOX 0x15b3
1948#define PCI_DEVICE_ID_MELLANOX_TAVOR 0x5a44 1954#define PCI_DEVICE_ID_MELLANOX_TAVOR 0x5a44
1955#define PCI_DEVICE_ID_MELLANOX_TAVOR_BRIDGE 0x5a46
1949#define PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT 0x6278 1956#define PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT 0x6278
1950#define PCI_DEVICE_ID_MELLANOX_ARBEL 0x6282 1957#define PCI_DEVICE_ID_MELLANOX_ARBEL 0x6282
1951#define PCI_DEVICE_ID_MELLANOX_SINAI_OLD 0x5e8c 1958#define PCI_DEVICE_ID_MELLANOX_SINAI_OLD 0x5e8c
@@ -1969,6 +1976,9 @@
1969#define PCI_VENDOR_ID_NETCELL 0x169c 1976#define PCI_VENDOR_ID_NETCELL 0x169c
1970#define PCI_DEVICE_ID_REVOLUTION 0x0044 1977#define PCI_DEVICE_ID_REVOLUTION 0x0044
1971 1978
1979#define PCI_VENDOR_ID_VITESSE 0x1725
1980#define PCI_DEVICE_ID_VITESSE_VSC7174 0x7174
1981
1972#define PCI_VENDOR_ID_LINKSYS 0x1737 1982#define PCI_VENDOR_ID_LINKSYS 0x1737
1973#define PCI_DEVICE_ID_LINKSYS_EG1064 0x1064 1983#define PCI_DEVICE_ID_LINKSYS_EG1064 0x1064
1974 1984
@@ -2148,6 +2158,7 @@
2148#define PCI_DEVICE_ID_INTEL_ICH8_4 0x2815 2158#define PCI_DEVICE_ID_INTEL_ICH8_4 0x2815
2149#define PCI_DEVICE_ID_INTEL_ICH8_5 0x283e 2159#define PCI_DEVICE_ID_INTEL_ICH8_5 0x283e
2150#define PCI_DEVICE_ID_INTEL_ICH8_6 0x2850 2160#define PCI_DEVICE_ID_INTEL_ICH8_6 0x2850
2161#define PCI_DEVICE_ID_INTEL_GD31244 0x3200
2151#define PCI_DEVICE_ID_INTEL_82855PM_HB 0x3340 2162#define PCI_DEVICE_ID_INTEL_82855PM_HB 0x3340
2152#define PCI_DEVICE_ID_INTEL_82830_HB 0x3575 2163#define PCI_DEVICE_ID_INTEL_82830_HB 0x3575
2153#define PCI_DEVICE_ID_INTEL_82830_CGC 0x3577 2164#define PCI_DEVICE_ID_INTEL_82830_CGC 0x3577