diff options
author | Atsushi Nemoto <anemo@mba.ocn.ne.jp> | 2006-10-20 12:28:26 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2006-11-29 20:14:43 -0500 |
commit | 4e3884fc83f40b5daabceeee3a428a8ebebbbe4a (patch) | |
tree | 2d0a92ec08c1cd1fdd8247b2b9124afd90d2b215 /include | |
parent | acd86b8622099c3206e0a1665545ae2318089b9c (diff) |
[MIPS] Use "long" for 64-bit values on 64-bit kernel.
This would get rid of some warnings about "long" vs. "long long".
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include')
-rw-r--r-- | include/asm-mips/addrspace.h | 40 |
1 files changed, 22 insertions, 18 deletions
diff --git a/include/asm-mips/addrspace.h b/include/asm-mips/addrspace.h index 45c706e34df1..c6275088cf65 100644 --- a/include/asm-mips/addrspace.h +++ b/include/asm-mips/addrspace.h | |||
@@ -19,12 +19,16 @@ | |||
19 | #define _ATYPE_ | 19 | #define _ATYPE_ |
20 | #define _ATYPE32_ | 20 | #define _ATYPE32_ |
21 | #define _ATYPE64_ | 21 | #define _ATYPE64_ |
22 | #define _LLCONST_(x) x | 22 | #define _CONST64_(x) x |
23 | #else | 23 | #else |
24 | #define _ATYPE_ __PTRDIFF_TYPE__ | 24 | #define _ATYPE_ __PTRDIFF_TYPE__ |
25 | #define _ATYPE32_ int | 25 | #define _ATYPE32_ int |
26 | #define _ATYPE64_ long long | 26 | #define _ATYPE64_ __s64 |
27 | #define _LLCONST_(x) x ## LL | 27 | #ifdef CONFIG_64BIT |
28 | #define _CONST64_(x) x ## L | ||
29 | #else | ||
30 | #define _CONST64_(x) x ## LL | ||
31 | #endif | ||
28 | #endif | 32 | #endif |
29 | 33 | ||
30 | /* | 34 | /* |
@@ -48,7 +52,7 @@ | |||
48 | */ | 52 | */ |
49 | #define CPHYSADDR(a) ((_ACAST32_(a)) & 0x1fffffff) | 53 | #define CPHYSADDR(a) ((_ACAST32_(a)) & 0x1fffffff) |
50 | #define XPHYSADDR(a) ((_ACAST64_(a)) & \ | 54 | #define XPHYSADDR(a) ((_ACAST64_(a)) & \ |
51 | _LLCONST_(0x000000ffffffffff)) | 55 | _CONST64_(0x000000ffffffffff)) |
52 | 56 | ||
53 | #ifdef CONFIG_64BIT | 57 | #ifdef CONFIG_64BIT |
54 | 58 | ||
@@ -57,14 +61,14 @@ | |||
57 | * The compatibility segments use the full 64-bit sign extended value. Note | 61 | * The compatibility segments use the full 64-bit sign extended value. Note |
58 | * the R8000 doesn't have them so don't reference these in generic MIPS code. | 62 | * the R8000 doesn't have them so don't reference these in generic MIPS code. |
59 | */ | 63 | */ |
60 | #define XKUSEG _LLCONST_(0x0000000000000000) | 64 | #define XKUSEG _CONST64_(0x0000000000000000) |
61 | #define XKSSEG _LLCONST_(0x4000000000000000) | 65 | #define XKSSEG _CONST64_(0x4000000000000000) |
62 | #define XKPHYS _LLCONST_(0x8000000000000000) | 66 | #define XKPHYS _CONST64_(0x8000000000000000) |
63 | #define XKSEG _LLCONST_(0xc000000000000000) | 67 | #define XKSEG _CONST64_(0xc000000000000000) |
64 | #define CKSEG0 _LLCONST_(0xffffffff80000000) | 68 | #define CKSEG0 _CONST64_(0xffffffff80000000) |
65 | #define CKSEG1 _LLCONST_(0xffffffffa0000000) | 69 | #define CKSEG1 _CONST64_(0xffffffffa0000000) |
66 | #define CKSSEG _LLCONST_(0xffffffffc0000000) | 70 | #define CKSSEG _CONST64_(0xffffffffc0000000) |
67 | #define CKSEG3 _LLCONST_(0xffffffffe0000000) | 71 | #define CKSEG3 _CONST64_(0xffffffffe0000000) |
68 | 72 | ||
69 | #define CKSEG0ADDR(a) (CPHYSADDR(a) | CKSEG0) | 73 | #define CKSEG0ADDR(a) (CPHYSADDR(a) | CKSEG0) |
70 | #define CKSEG1ADDR(a) (CPHYSADDR(a) | CKSEG1) | 74 | #define CKSEG1ADDR(a) (CPHYSADDR(a) | CKSEG1) |
@@ -122,7 +126,7 @@ | |||
122 | #define PHYS_TO_XKSEG_UNCACHED(p) PHYS_TO_XKPHYS(K_CALG_UNCACHED,(p)) | 126 | #define PHYS_TO_XKSEG_UNCACHED(p) PHYS_TO_XKPHYS(K_CALG_UNCACHED,(p)) |
123 | #define PHYS_TO_XKSEG_CACHED(p) PHYS_TO_XKPHYS(K_CALG_COH_SHAREABLE,(p)) | 127 | #define PHYS_TO_XKSEG_CACHED(p) PHYS_TO_XKPHYS(K_CALG_COH_SHAREABLE,(p)) |
124 | #define XKPHYS_TO_PHYS(p) ((p) & TO_PHYS_MASK) | 128 | #define XKPHYS_TO_PHYS(p) ((p) & TO_PHYS_MASK) |
125 | #define PHYS_TO_XKPHYS(cm,a) (_LLCONST_(0x8000000000000000) | \ | 129 | #define PHYS_TO_XKPHYS(cm,a) (_CONST64_(0x8000000000000000) | \ |
126 | ((cm)<<59) | (a)) | 130 | ((cm)<<59) | (a)) |
127 | 131 | ||
128 | #if defined (CONFIG_CPU_R4300) \ | 132 | #if defined (CONFIG_CPU_R4300) \ |
@@ -132,20 +136,20 @@ | |||
132 | || defined (CONFIG_CPU_NEVADA) \ | 136 | || defined (CONFIG_CPU_NEVADA) \ |
133 | || defined (CONFIG_CPU_TX49XX) \ | 137 | || defined (CONFIG_CPU_TX49XX) \ |
134 | || defined (CONFIG_CPU_MIPS64) | 138 | || defined (CONFIG_CPU_MIPS64) |
135 | #define TO_PHYS_MASK _LLCONST_(0x0000000fffffffff) /* 2^^36 - 1 */ | 139 | #define TO_PHYS_MASK _CONST64_(0x0000000fffffffff) /* 2^^36 - 1 */ |
136 | #endif | 140 | #endif |
137 | 141 | ||
138 | #if defined (CONFIG_CPU_R8000) | 142 | #if defined (CONFIG_CPU_R8000) |
139 | /* We keep KUSIZE consistent with R4000 for now (2^^40) instead of (2^^48) */ | 143 | /* We keep KUSIZE consistent with R4000 for now (2^^40) instead of (2^^48) */ |
140 | #define TO_PHYS_MASK _LLCONST_(0x000000ffffffffff) /* 2^^40 - 1 */ | 144 | #define TO_PHYS_MASK _CONST64_(0x000000ffffffffff) /* 2^^40 - 1 */ |
141 | #endif | 145 | #endif |
142 | 146 | ||
143 | #if defined (CONFIG_CPU_R10000) | 147 | #if defined (CONFIG_CPU_R10000) |
144 | #define TO_PHYS_MASK _LLCONST_(0x000000ffffffffff) /* 2^^40 - 1 */ | 148 | #define TO_PHYS_MASK _CONST64_(0x000000ffffffffff) /* 2^^40 - 1 */ |
145 | #endif | 149 | #endif |
146 | 150 | ||
147 | #if defined(CONFIG_CPU_SB1) || defined(CONFIG_CPU_SB1A) | 151 | #if defined(CONFIG_CPU_SB1) || defined(CONFIG_CPU_SB1A) |
148 | #define TO_PHYS_MASK _LLCONST_(0x00000fffffffffff) /* 2^^44 - 1 */ | 152 | #define TO_PHYS_MASK _CONST64_(0x00000fffffffffff) /* 2^^44 - 1 */ |
149 | #endif | 153 | #endif |
150 | 154 | ||
151 | #ifndef CONFIG_CPU_R8000 | 155 | #ifndef CONFIG_CPU_R8000 |
@@ -155,7 +159,7 @@ | |||
155 | * in order to catch bugs in the source code. | 159 | * in order to catch bugs in the source code. |
156 | */ | 160 | */ |
157 | 161 | ||
158 | #define COMPAT_K1BASE32 _LLCONST_(0xffffffffa0000000) | 162 | #define COMPAT_K1BASE32 _CONST64_(0xffffffffa0000000) |
159 | #define PHYS_TO_COMPATK1(x) ((x) | COMPAT_K1BASE32) /* 32-bit compat k1 */ | 163 | #define PHYS_TO_COMPATK1(x) ((x) | COMPAT_K1BASE32) /* 32-bit compat k1 */ |
160 | 164 | ||
161 | #endif | 165 | #endif |