diff options
author | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-11-30 11:11:18 -0500 |
---|---|---|
committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-11-30 11:11:18 -0500 |
commit | b62c855938be50c13f3f2aa81fafe4a9ca2b6650 (patch) | |
tree | c133f2b64893561347415d1861f8926c24f12daf /include | |
parent | 80cbd911ca25535f6bb66bbcbb98950ec328eb40 (diff) | |
parent | e252d4c362ad89c5b533833d9e7493c732215925 (diff) |
Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm:
[ARM] 4680/1: parentheses around NR_IRQS definition
[ARM] 4679/1: AT91: Change maintainer email address
[ARM] 4675/1: pxa: fix mfp address definition error for pxa320
[ARM] 4674/1: pxa: increase LCD PCLK drive strength to fast 2mA for PXA300/PXA310
[ARM] 4673/1: pxa: add missing IRQ_SSP4 definitions for PXA3xx
[ARM] 4672/1: pxa: fix DRCMR(n) to support PXA27x and later processors
[ARM] 4665/1: fix __und_usr wrt accessing the undefined insn in user space
[ARM] 4659/1: remove possibilities for spurious false negative with __kuser_cmpxchg
[ARM] 4661/1: fix do_undefinstr wrt the enabling of IRQs
[ARM] uengine: fix memset size error
[ARM] 4648/1: i.MX/MX1 ensure more complete AITC initialization
[ARM] 4611/2: AT91: Fix GPIO buttons pins on SAM9261-EK.
[ARM] 4650/1: AT91: New-style init of I2C, support for i2c-gpio
[ARM] 4604/2: AT91: Master clock divistor on SAM9
[ARM] 4662/1: Fix PXA serial driver compilation if SERIAL_PXA_CONSOLE is disabled
[ARM] PXA ssp: unlock when ssp tries to close an invalid port
[ARM] 4654/1: pxa: update default MFP register value
[ARM] 4653/1: pxa: fix a gpio typo in mfp-pxa320.h
[ARM] 4652/1: pxa: fix a typo of pxa27x usb host clk definition
[ARM] 4651/1: pxa: add PXA3xx specific IRQ definitions
Diffstat (limited to 'include')
-rw-r--r-- | include/asm-arm/arch-at91/board.h | 3 | ||||
-rw-r--r-- | include/asm-arm/arch-ixp23xx/irqs.h | 2 | ||||
-rw-r--r-- | include/asm-arm/arch-omap/board-innovator.h | 2 | ||||
-rw-r--r-- | include/asm-arm/arch-pxa/irqs.h | 20 | ||||
-rw-r--r-- | include/asm-arm/arch-pxa/mfp-pxa300.h | 2 | ||||
-rw-r--r-- | include/asm-arm/arch-pxa/mfp-pxa320.h | 2 | ||||
-rw-r--r-- | include/asm-arm/arch-pxa/mfp.h | 18 | ||||
-rw-r--r-- | include/asm-arm/arch-pxa/pxa-regs.h | 5 |
8 files changed, 41 insertions, 13 deletions
diff --git a/include/asm-arm/arch-at91/board.h b/include/asm-arm/arch-at91/board.h index c0d7075982c1..79054965baa6 100644 --- a/include/asm-arm/arch-at91/board.h +++ b/include/asm-arm/arch-at91/board.h | |||
@@ -33,6 +33,7 @@ | |||
33 | 33 | ||
34 | #include <linux/mtd/partitions.h> | 34 | #include <linux/mtd/partitions.h> |
35 | #include <linux/device.h> | 35 | #include <linux/device.h> |
36 | #include <linux/i2c.h> | ||
36 | #include <linux/spi/spi.h> | 37 | #include <linux/spi/spi.h> |
37 | 38 | ||
38 | /* USB Device */ | 39 | /* USB Device */ |
@@ -94,7 +95,7 @@ struct at91_nand_data { | |||
94 | extern void __init at91_add_device_nand(struct at91_nand_data *data); | 95 | extern void __init at91_add_device_nand(struct at91_nand_data *data); |
95 | 96 | ||
96 | /* I2C*/ | 97 | /* I2C*/ |
97 | extern void __init at91_add_device_i2c(void); | 98 | extern void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices); |
98 | 99 | ||
99 | /* SPI */ | 100 | /* SPI */ |
100 | extern void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices); | 101 | extern void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices); |
diff --git a/include/asm-arm/arch-ixp23xx/irqs.h b/include/asm-arm/arch-ixp23xx/irqs.h index e69639585721..27c580898958 100644 --- a/include/asm-arm/arch-ixp23xx/irqs.h +++ b/include/asm-arm/arch-ixp23xx/irqs.h | |||
@@ -153,7 +153,7 @@ | |||
153 | */ | 153 | */ |
154 | #define NR_IXP23XX_MACH_IRQS 32 | 154 | #define NR_IXP23XX_MACH_IRQS 32 |
155 | 155 | ||
156 | #define NR_IRQS NR_IXP23XX_IRQS + NR_IXP23XX_MACH_IRQS | 156 | #define NR_IRQS (NR_IXP23XX_IRQS + NR_IXP23XX_MACH_IRQS) |
157 | 157 | ||
158 | #define IXP23XX_MACH_IRQ(irq) (NR_IXP23XX_IRQ + (irq)) | 158 | #define IXP23XX_MACH_IRQ(irq) (NR_IXP23XX_IRQ + (irq)) |
159 | 159 | ||
diff --git a/include/asm-arm/arch-omap/board-innovator.h b/include/asm-arm/arch-omap/board-innovator.h index b3cf33441f6e..56d2c98e143c 100644 --- a/include/asm-arm/arch-omap/board-innovator.h +++ b/include/asm-arm/arch-omap/board-innovator.h | |||
@@ -37,7 +37,7 @@ | |||
37 | #define OMAP1510P1_EMIFF_PRI_VALUE 0x00 | 37 | #define OMAP1510P1_EMIFF_PRI_VALUE 0x00 |
38 | 38 | ||
39 | #define NR_FPGA_IRQS 24 | 39 | #define NR_FPGA_IRQS 24 |
40 | #define NR_IRQS IH_BOARD_BASE + NR_FPGA_IRQS | 40 | #define NR_IRQS (IH_BOARD_BASE + NR_FPGA_IRQS) |
41 | 41 | ||
42 | #ifndef __ASSEMBLY__ | 42 | #ifndef __ASSEMBLY__ |
43 | void fpga_write(unsigned char val, int reg); | 43 | void fpga_write(unsigned char val, int reg); |
diff --git a/include/asm-arm/arch-pxa/irqs.h b/include/asm-arm/arch-pxa/irqs.h index 6238dbf7a236..b76ee6d1f5b4 100644 --- a/include/asm-arm/arch-pxa/irqs.h +++ b/include/asm-arm/arch-pxa/irqs.h | |||
@@ -13,7 +13,7 @@ | |||
13 | 13 | ||
14 | #define PXA_IRQ(x) (x) | 14 | #define PXA_IRQ(x) (x) |
15 | 15 | ||
16 | #ifdef CONFIG_PXA27x | 16 | #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) |
17 | #define IRQ_SSP3 PXA_IRQ(0) /* SSP3 service request */ | 17 | #define IRQ_SSP3 PXA_IRQ(0) /* SSP3 service request */ |
18 | #define IRQ_MSL PXA_IRQ(1) /* MSL Interface interrupt */ | 18 | #define IRQ_MSL PXA_IRQ(1) /* MSL Interface interrupt */ |
19 | #define IRQ_USBH2 PXA_IRQ(2) /* USB Host interrupt 1 (OHCI) */ | 19 | #define IRQ_USBH2 PXA_IRQ(2) /* USB Host interrupt 1 (OHCI) */ |
@@ -52,11 +52,27 @@ | |||
52 | #define IRQ_RTC1Hz PXA_IRQ(30) /* RTC HZ Clock Tick */ | 52 | #define IRQ_RTC1Hz PXA_IRQ(30) /* RTC HZ Clock Tick */ |
53 | #define IRQ_RTCAlrm PXA_IRQ(31) /* RTC Alarm */ | 53 | #define IRQ_RTCAlrm PXA_IRQ(31) /* RTC Alarm */ |
54 | 54 | ||
55 | #ifdef CONFIG_PXA27x | 55 | #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) |
56 | #define IRQ_TPM PXA_IRQ(32) /* TPM interrupt */ | 56 | #define IRQ_TPM PXA_IRQ(32) /* TPM interrupt */ |
57 | #define IRQ_CAMERA PXA_IRQ(33) /* Camera Interface */ | 57 | #define IRQ_CAMERA PXA_IRQ(33) /* Camera Interface */ |
58 | #endif | 58 | #endif |
59 | 59 | ||
60 | #ifdef CONFIG_PXA3xx | ||
61 | #define IRQ_SSP4 PXA_IRQ(13) /* SSP4 service request */ | ||
62 | #define IRQ_CIR PXA_IRQ(34) /* Consumer IR */ | ||
63 | #define IRQ_TSI PXA_IRQ(36) /* Touch Screen Interface (PXA320) */ | ||
64 | #define IRQ_USIM2 PXA_IRQ(38) /* USIM2 Controller */ | ||
65 | #define IRQ_GRPHICS PXA_IRQ(39) /* Graphics Controller */ | ||
66 | #define IRQ_MMC2 PXA_IRQ(41) /* MMC2 Controller */ | ||
67 | #define IRQ_1WIRE PXA_IRQ(44) /* 1-Wire Controller */ | ||
68 | #define IRQ_NAND PXA_IRQ(45) /* NAND Controller */ | ||
69 | #define IRQ_USB2 PXA_IRQ(46) /* USB 2.0 Device Controller */ | ||
70 | #define IRQ_WAKEUP0 PXA_IRQ(49) /* EXT_WAKEUP0 */ | ||
71 | #define IRQ_WAKEUP1 PXA_IRQ(50) /* EXT_WAKEUP1 */ | ||
72 | #define IRQ_DMEMC PXA_IRQ(51) /* Dynamic Memory Controller */ | ||
73 | #define IRQ_MMC3 PXA_IRQ(55) /* MMC3 Controller (PXA310) */ | ||
74 | #endif | ||
75 | |||
60 | #define PXA_GPIO_IRQ_BASE (64) | 76 | #define PXA_GPIO_IRQ_BASE (64) |
61 | #define PXA_GPIO_IRQ_NUM (128) | 77 | #define PXA_GPIO_IRQ_NUM (128) |
62 | 78 | ||
diff --git a/include/asm-arm/arch-pxa/mfp-pxa300.h b/include/asm-arm/arch-pxa/mfp-pxa300.h index 822a27cd7864..a20996649889 100644 --- a/include/asm-arm/arch-pxa/mfp-pxa300.h +++ b/include/asm-arm/arch-pxa/mfp-pxa300.h | |||
@@ -179,7 +179,7 @@ | |||
179 | #define GPIO62_LCD_CS_N MFP_CFG_DRV(GPIO62, AF2, DS01X) | 179 | #define GPIO62_LCD_CS_N MFP_CFG_DRV(GPIO62, AF2, DS01X) |
180 | #define GPIO72_LCD_FCLK MFP_CFG_DRV(GPIO72, AF1, DS01X) | 180 | #define GPIO72_LCD_FCLK MFP_CFG_DRV(GPIO72, AF1, DS01X) |
181 | #define GPIO73_LCD_LCLK MFP_CFG_DRV(GPIO73, AF1, DS01X) | 181 | #define GPIO73_LCD_LCLK MFP_CFG_DRV(GPIO73, AF1, DS01X) |
182 | #define GPIO74_LCD_PCLK MFP_CFG_DRV(GPIO74, AF1, DS01X) | 182 | #define GPIO74_LCD_PCLK MFP_CFG_DRV(GPIO74, AF1, DS02X) |
183 | #define GPIO75_LCD_BIAS MFP_CFG_DRV(GPIO75, AF1, DS01X) | 183 | #define GPIO75_LCD_BIAS MFP_CFG_DRV(GPIO75, AF1, DS01X) |
184 | #define GPIO76_LCD_VSYNC MFP_CFG_DRV(GPIO76, AF2, DS01X) | 184 | #define GPIO76_LCD_VSYNC MFP_CFG_DRV(GPIO76, AF2, DS01X) |
185 | 185 | ||
diff --git a/include/asm-arm/arch-pxa/mfp-pxa320.h b/include/asm-arm/arch-pxa/mfp-pxa320.h index 488a5bbc49e9..52deedcaf3bd 100644 --- a/include/asm-arm/arch-pxa/mfp-pxa320.h +++ b/include/asm-arm/arch-pxa/mfp-pxa320.h | |||
@@ -18,7 +18,7 @@ | |||
18 | #include <asm/arch/mfp.h> | 18 | #include <asm/arch/mfp.h> |
19 | 19 | ||
20 | /* GPIO */ | 20 | /* GPIO */ |
21 | #define GPIO46_GPIO MFP_CFG(GPIO6, AF0) | 21 | #define GPIO46_GPIO MFP_CFG(GPIO46, AF0) |
22 | #define GPIO49_GPIO MFP_CFG(GPIO49, AF0) | 22 | #define GPIO49_GPIO MFP_CFG(GPIO49, AF0) |
23 | #define GPIO50_GPIO MFP_CFG(GPIO50, AF0) | 23 | #define GPIO50_GPIO MFP_CFG(GPIO50, AF0) |
24 | #define GPIO51_GPIO MFP_CFG(GPIO51, AF0) | 24 | #define GPIO51_GPIO MFP_CFG(GPIO51, AF0) |
diff --git a/include/asm-arm/arch-pxa/mfp.h b/include/asm-arm/arch-pxa/mfp.h index ac4157af5a8e..03c508d94f0e 100644 --- a/include/asm-arm/arch-pxa/mfp.h +++ b/include/asm-arm/arch-pxa/mfp.h | |||
@@ -346,23 +346,31 @@ typedef uint32_t mfp_cfg_t; | |||
346 | #define MFP_CFG_PIN(mfp_cfg) (((mfp_cfg) >> 16) & 0xffff) | 346 | #define MFP_CFG_PIN(mfp_cfg) (((mfp_cfg) >> 16) & 0xffff) |
347 | #define MFP_CFG_VAL(mfp_cfg) ((mfp_cfg) & 0xffff) | 347 | #define MFP_CFG_VAL(mfp_cfg) ((mfp_cfg) & 0xffff) |
348 | 348 | ||
349 | #define MFPR_DEFAULT (0x0000) | 349 | /* |
350 | * MFP register defaults to | ||
351 | * drive strength fast 3mA (010'b) | ||
352 | * edge detection logic disabled | ||
353 | * alternate function 0 | ||
354 | */ | ||
355 | #define MFPR_DEFAULT (0x0840) | ||
350 | 356 | ||
351 | #define MFP_CFG(pin, af) \ | 357 | #define MFP_CFG(pin, af) \ |
352 | ((MFP_PIN_##pin << 16) | MFPR_DEFAULT | (MFP_##af)) | 358 | ((MFP_PIN_##pin << 16) | MFPR_DEFAULT | (MFP_##af)) |
353 | 359 | ||
354 | #define MFP_CFG_DRV(pin, af, drv) \ | 360 | #define MFP_CFG_DRV(pin, af, drv) \ |
355 | ((MFP_PIN_##pin << 16) | MFPR_DEFAULT |\ | 361 | ((MFP_PIN_##pin << 16) | (MFPR_DEFAULT & ~MFPR_DRV_MASK) |\ |
356 | ((MFP_##drv) << 10) | (MFP_##af)) | 362 | ((MFP_##drv) << 10) | (MFP_##af)) |
357 | 363 | ||
358 | #define MFP_CFG_LPM(pin, af, lpm) \ | 364 | #define MFP_CFG_LPM(pin, af, lpm) \ |
359 | ((MFP_PIN_##pin << 16) | MFPR_DEFAULT | (MFP_##af) |\ | 365 | ((MFP_PIN_##pin << 16) | (MFPR_DEFAULT & ~MFPR_LPM_MASK) |\ |
360 | (((MFP_LPM_##lpm) & 0x3) << 7) |\ | 366 | (((MFP_LPM_##lpm) & 0x3) << 7) |\ |
361 | (((MFP_LPM_##lpm) & 0x4) << 12) |\ | 367 | (((MFP_LPM_##lpm) & 0x4) << 12) |\ |
362 | (((MFP_LPM_##lpm) & 0x8) << 10)) | 368 | (((MFP_LPM_##lpm) & 0x8) << 10) |\ |
369 | (MFP_##af)) | ||
363 | 370 | ||
364 | #define MFP_CFG_X(pin, af, drv, lpm) \ | 371 | #define MFP_CFG_X(pin, af, drv, lpm) \ |
365 | ((MFP_PIN_##pin << 16) | MFPR_DEFAULT |\ | 372 | ((MFP_PIN_##pin << 16) |\ |
373 | (MFPR_DEFAULT & ~(MFPR_DRV_MASK | MFPR_LPM_MASK)) |\ | ||
366 | ((MFP_##drv) << 10) | (MFP_##af) |\ | 374 | ((MFP_##drv) << 10) | (MFP_##af) |\ |
367 | (((MFP_LPM_##lpm) & 0x3) << 7) |\ | 375 | (((MFP_LPM_##lpm) & 0x3) << 7) |\ |
368 | (((MFP_LPM_##lpm) & 0x4) << 12) |\ | 376 | (((MFP_LPM_##lpm) & 0x4) << 12) |\ |
diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h index bb68b598c436..6b33df6f1995 100644 --- a/include/asm-arm/arch-pxa/pxa-regs.h +++ b/include/asm-arm/arch-pxa/pxa-regs.h | |||
@@ -110,7 +110,10 @@ | |||
110 | #define DALGN __REG(0x400000a0) /* DMA Alignment Register */ | 110 | #define DALGN __REG(0x400000a0) /* DMA Alignment Register */ |
111 | #define DINT __REG(0x400000f0) /* DMA Interrupt Register */ | 111 | #define DINT __REG(0x400000f0) /* DMA Interrupt Register */ |
112 | 112 | ||
113 | #define DRCMR(n) __REG2(0x40000100, (n)<<2) | 113 | #define DRCMR(n) (*(((n) < 64) ? \ |
114 | &__REG2(0x40000100, ((n) & 0x3f) << 2) : \ | ||
115 | &__REG2(0x40001100, ((n) & 0x3f) << 2))) | ||
116 | |||
114 | #define DRCMR0 __REG(0x40000100) /* Request to Channel Map Register for DREQ 0 */ | 117 | #define DRCMR0 __REG(0x40000100) /* Request to Channel Map Register for DREQ 0 */ |
115 | #define DRCMR1 __REG(0x40000104) /* Request to Channel Map Register for DREQ 1 */ | 118 | #define DRCMR1 __REG(0x40000104) /* Request to Channel Map Register for DREQ 1 */ |
116 | #define DRCMR2 __REG(0x40000108) /* Request to Channel Map Register for I2S receive Request */ | 119 | #define DRCMR2 __REG(0x40000108) /* Request to Channel Map Register for I2S receive Request */ |