Merge branch 'for-linus' of git://www.linux-m32r.org/git/takata/linux-2.6_dev

* 'for-linus' of git://www.linux-m32r.org/git/takata/linux-2.6_dev:
  m32r: Rename STI/CLI macros
  m32r: build fix of entry.S
  m32r: Separate syscall table from entry.S
  m32r: Cosmetic updates of arch/m32r/kernel/entry.S
  m32r: Exit ei_handler directly for no IRQ case or IPI operations
  m32r: Simplify ei_handler code
  m32r: Define symbols to unify platform-dependent ICU checks
  m32r: Move dot.gdbinit files
  m32r: Rearrange platform-dependent codes
  m32r: Add defconfig file for the usrv platform.
  m32r: Update defconfig files for 2.6.23-rc1
  m32r: Move defconfig files to arch/m32r/configs/

2 files changed, 28 insertions, 8 deletions

diff --git a/include/asm-m32r/assembler.h b/include/asm-m32r/assembler.h
index 47041d19d4a8..26351539b5ff 100644
--- a/include/asm-m32r/assembler.h
+++ b/include/asm-m32r/assembler.h
@@ -52,27 +52,27 @@
         .endm
 
 #if !(defined(CONFIG_CHIP_M32102) || defined(CONFIG_CHIP_M32104))
-#define STI(reg) STI_M reg
-        .macro STI_M reg
+#define ENABLE_INTERRUPTS(reg) ENABLE_INTERRUPTS reg
+        .macro ENABLE_INTERRUPTS reg
         setpsw  #0x40       ->  nop
         ; WORKAROUND: "-> nop" is a workaround for the M32700(TS1).
         .endm
 
-#define CLI(reg) CLI_M reg
-        .macro CLI_M reg
+#define DISABLE_INTERRUPTS(reg) DISABLE_INTERRUPTS reg
+        .macro DISABLE_INTERRUPTS reg
         clrpsw  #0x40       ->  nop
         ; WORKAROUND: "-> nop" is a workaround for the M32700(TS1).
         .endm
 #else   /* CONFIG_CHIP_M32102 || CONFIG_CHIP_M32104 */
-#define STI(reg) STI_M reg
-        .macro STI_M reg
+#define ENABLE_INTERRUPTS(reg) ENABLE_INTERRUPTS reg
+        .macro ENABLE_INTERRUPTS reg
         mvfc    \reg, psw
         or3     \reg, \reg, #0x0040
         mvtc    \reg, psw
         .endm
 
-#define CLI(reg) CLI_M reg
-        .macro CLI_M reg
+#define DISABLE_INTERRUPTS(reg) DISABLE_INTERRUPTS reg
+        .macro DISABLE_INTERRUPTS reg
         mvfc    \reg, psw
         and3    \reg, \reg, #0xffbf
         mvtc    \reg, psw
diff --git a/include/asm-m32r/m32r.h b/include/asm-m32r/m32r.h
index decfc59907c7..214b44b40757 100644
--- a/include/asm-m32r/m32r.h
+++ b/include/asm-m32r/m32r.h
@@ -22,12 +22,26 @@
 #include <asm/m32700ut/m32700ut_pld.h>
 #include <asm/m32700ut/m32700ut_lan.h>
 #include <asm/m32700ut/m32700ut_lcd.h>
+/* for ei_handler:linux/arch/m32r/kernel/entry.S */
+#define M32R_INT1ICU_ISTS       PLD_ICUISTS
+#define M32R_INT1ICU_IRQ_BASE   M32700UT_PLD_IRQ_BASE
+#define M32R_INT0ICU_ISTS       M32700UT_LAN_ICUISTS
+#define M32R_INT0ICU_IRQ_BASE   M32700UT_LAN_PLD_IRQ_BASE
+#define M32R_INT2ICU_ISTS       M32700UT_LCD_ICUISTS
+#define M32R_INT2ICU_IRQ_BASE   M32700UT_LCD_PLD_IRQ_BASE
 #endif  /* CONFIG_PLAT_M32700UT */
 
 #if defined(CONFIG_PLAT_OPSPUT)
 #include <asm/opsput/opsput_pld.h>
 #include <asm/opsput/opsput_lan.h>
 #include <asm/opsput/opsput_lcd.h>
+/* for ei_handler:linux/arch/m32r/kernel/entry.S */
+#define M32R_INT1ICU_ISTS       PLD_ICUISTS
+#define M32R_INT1ICU_IRQ_BASE   OPSPUT_PLD_IRQ_BASE
+#define M32R_INT0ICU_ISTS       OPSPUT_LAN_ICUISTS
+#define M32R_INT0ICU_IRQ_BASE   OPSPUT_LAN_PLD_IRQ_BASE
+#define M32R_INT2ICU_ISTS       OPSPUT_LCD_ICUISTS
+#define M32R_INT2ICU_IRQ_BASE   OPSPUT_LCD_PLD_IRQ_BASE
 #endif  /* CONFIG_PLAT_OPSPUT */
 
 #if defined(CONFIG_PLAT_MAPPI2)
@@ -40,10 +54,16 @@
 
 #if defined(CONFIG_PLAT_USRV)
 #include <asm/m32700ut/m32700ut_pld.h>
+/* for ei_handler:linux/arch/m32r/kernel/entry.S */
+#define M32R_INT1ICU_ISTS       PLD_ICUISTS
+#define M32R_INT1ICU_IRQ_BASE   M32700UT_PLD_IRQ_BASE
 #endif
 
 #if defined(CONFIG_PLAT_M32104UT)
 #include <asm/m32104ut/m32104ut_pld.h>
+/* for ei_handler:linux/arch/m32r/kernel/entry.S */
+#define M32R_INT1ICU_ISTS       PLD_ICUISTS
+#define M32R_INT1ICU_IRQ_BASE   M32104UT_PLD_IRQ_BASE
 #endif  /* CONFIG_PLAT_M32104 */
 
 /*