diff options
author | David S. Miller <davem@davemloft.net> | 2008-03-26 03:19:43 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2008-03-26 03:19:43 -0400 |
commit | 99cd220133cdf2a559529d522a78b2ebc1bef2d8 (patch) | |
tree | f65066410c4166880d0a7b5210227370c53b0010 /include | |
parent | 3d5ae6b69eacfac025021998d2ce159768edcfe1 (diff) |
[SPARC64]: Fix sparse errors in arch/sparc64/kernel/traps.c
Add 'UL' markers to DCU_* macros.
Declare C functions called from assembler in entry.h
Declare C functions called from within the sparc64 arch
code in include/asm-sparc64/*.h headers as appropriate.
Remove unused routines in traps.c
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include')
-rw-r--r-- | include/asm-sparc64/dcu.h | 41 | ||||
-rw-r--r-- | include/asm-sparc64/pgtable.h | 2 |
2 files changed, 23 insertions, 20 deletions
diff --git a/include/asm-sparc64/dcu.h b/include/asm-sparc64/dcu.h index ecbed2ae548f..0f704e106a1b 100644 --- a/include/asm-sparc64/dcu.h +++ b/include/asm-sparc64/dcu.h | |||
@@ -1,26 +1,27 @@ | |||
1 | /* $Id: dcu.h,v 1.2 2001/03/01 23:23:33 davem Exp $ */ | ||
2 | #ifndef _SPARC64_DCU_H | 1 | #ifndef _SPARC64_DCU_H |
3 | #define _SPARC64_DCU_H | 2 | #define _SPARC64_DCU_H |
4 | 3 | ||
4 | #include <linux/const.h> | ||
5 | |||
5 | /* UltraSparc-III Data Cache Unit Control Register */ | 6 | /* UltraSparc-III Data Cache Unit Control Register */ |
6 | #define DCU_CP 0x0002000000000000 /* Physical Cache Enable w/o mmu*/ | 7 | #define DCU_CP _AC(0x0002000000000000,UL) /* Phys Cache Enable w/o mmu */ |
7 | #define DCU_CV 0x0001000000000000 /* Virtual Cache Enable w/o mmu */ | 8 | #define DCU_CV _AC(0x0001000000000000,UL) /* Virt Cache Enable w/o mmu */ |
8 | #define DCU_ME 0x0000800000000000 /* NC-store Merging Enable */ | 9 | #define DCU_ME _AC(0x0000800000000000,UL) /* NC-store Merging Enable */ |
9 | #define DCU_RE 0x0000400000000000 /* RAW bypass Enable */ | 10 | #define DCU_RE _AC(0x0000400000000000,UL) /* RAW bypass Enable */ |
10 | #define DCU_PE 0x0000200000000000 /* PCache Enable */ | 11 | #define DCU_PE _AC(0x0000200000000000,UL) /* PCache Enable */ |
11 | #define DCU_HPE 0x0000100000000000 /* HW prefetch Enable */ | 12 | #define DCU_HPE _AC(0x0000100000000000,UL) /* HW prefetch Enable */ |
12 | #define DCU_SPE 0x0000080000000000 /* SW prefetch Enable */ | 13 | #define DCU_SPE _AC(0x0000080000000000,UL) /* SW prefetch Enable */ |
13 | #define DCU_SL 0x0000040000000000 /* Secondary load steering Enab */ | 14 | #define DCU_SL _AC(0x0000040000000000,UL) /* Secondary ld-steering Enab*/ |
14 | #define DCU_WE 0x0000020000000000 /* WCache enable */ | 15 | #define DCU_WE _AC(0x0000020000000000,UL) /* WCache enable */ |
15 | #define DCU_PM 0x000001fe00000000 /* PA Watchpoint Byte Mask */ | 16 | #define DCU_PM _AC(0x000001fe00000000,UL) /* PA Watchpoint Byte Mask */ |
16 | #define DCU_VM 0x00000001fe000000 /* VA Watchpoint Byte Mask */ | 17 | #define DCU_VM _AC(0x00000001fe000000,UL) /* VA Watchpoint Byte Mask */ |
17 | #define DCU_PR 0x0000000001000000 /* PA Watchpoint Read Enable */ | 18 | #define DCU_PR _AC(0x0000000001000000,UL) /* PA Watchpoint Read Enable */ |
18 | #define DCU_PW 0x0000000000800000 /* PA Watchpoint Write Enable */ | 19 | #define DCU_PW _AC(0x0000000000800000,UL) /* PA Watchpoint Write Enable*/ |
19 | #define DCU_VR 0x0000000000400000 /* VA Watchpoint Read Enable */ | 20 | #define DCU_VR _AC(0x0000000000400000,UL) /* VA Watchpoint Read Enable */ |
20 | #define DCU_VW 0x0000000000200000 /* VA Watchpoint Write Enable */ | 21 | #define DCU_VW _AC(0x0000000000200000,UL) /* VA Watchpoint Write Enable*/ |
21 | #define DCU_DM 0x0000000000000008 /* DMMU Enable */ | 22 | #define DCU_DM _AC(0x0000000000000008,UL) /* DMMU Enable */ |
22 | #define DCU_IM 0x0000000000000004 /* IMMU Enable */ | 23 | #define DCU_IM _AC(0x0000000000000004,UL) /* IMMU Enable */ |
23 | #define DCU_DC 0x0000000000000002 /* Data Cache Enable */ | 24 | #define DCU_DC _AC(0x0000000000000002,UL) /* Data Cache Enable */ |
24 | #define DCU_IC 0x0000000000000001 /* Instruction Cache Enable */ | 25 | #define DCU_IC _AC(0x0000000000000001,UL) /* Instruction Cache Enable */ |
25 | 26 | ||
26 | #endif /* _SPARC64_DCU_H */ | 27 | #endif /* _SPARC64_DCU_H */ |
diff --git a/include/asm-sparc64/pgtable.h b/include/asm-sparc64/pgtable.h index 95303f5be86b..549e45266b68 100644 --- a/include/asm-sparc64/pgtable.h +++ b/include/asm-sparc64/pgtable.h | |||
@@ -761,6 +761,8 @@ extern unsigned long get_fb_unmapped_area(struct file *filp, unsigned long, | |||
761 | extern void pgtable_cache_init(void); | 761 | extern void pgtable_cache_init(void); |
762 | extern void sun4v_register_fault_status(void); | 762 | extern void sun4v_register_fault_status(void); |
763 | extern void sun4v_ktsb_register(void); | 763 | extern void sun4v_ktsb_register(void); |
764 | extern void __init cheetah_ecache_flush_init(void); | ||
765 | extern void sun4v_patch_tlb_handlers(void); | ||
764 | 766 | ||
765 | extern unsigned long cmdline_memory_size; | 767 | extern unsigned long cmdline_memory_size; |
766 | 768 | ||