diff options
author | Jack Morgenstein <jackm@dev.mellanox.co.il> | 2011-12-12 23:10:33 -0500 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2011-12-13 13:56:05 -0500 |
commit | 623ed84b1f9553bc962c2aca92f488aa6f27ecd1 (patch) | |
tree | e83f5c25e071e3dcef12122166a1996c0027c612 /include | |
parent | 9f048bfba15a22d1d1ce0c1f44567fa16bed4d25 (diff) |
mlx4_core: initial header-file changes for SRIOV support
These changes will not affect module operation as yet. They
are only to get some structs and enums in place for use by
subsequent patches (making those smaller).
Added here:
* sriov state structs and inlines (mlx4_is_master/slave/mfunc)
* comm-channel and vhcr support structures
* enum values for new FW and comm-channel virtual commands
(i.e., commands, passed via the comm channel to the PF-driver).
* prototypes for many command wrapper functions (used by the
PF context for processing FW commands passed to it by the VFs).
* struct mlx4_eqe is moved from eq.c to mlx4.h (it will be used
by other mlx4_core source files).
Signed-off-by: Jack Morgenstein <jackm@dev.mellanox.co.il>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include')
-rw-r--r-- | include/linux/mlx4/cmd.h | 29 | ||||
-rw-r--r-- | include/linux/mlx4/device.h | 42 |
2 files changed, 68 insertions, 3 deletions
diff --git a/include/linux/mlx4/cmd.h b/include/linux/mlx4/cmd.h index b56e4587208d..e8e92814c8a0 100644 --- a/include/linux/mlx4/cmd.h +++ b/include/linux/mlx4/cmd.h | |||
@@ -59,12 +59,15 @@ enum { | |||
59 | MLX4_CMD_HW_HEALTH_CHECK = 0x50, | 59 | MLX4_CMD_HW_HEALTH_CHECK = 0x50, |
60 | MLX4_CMD_SET_PORT = 0xc, | 60 | MLX4_CMD_SET_PORT = 0xc, |
61 | MLX4_CMD_SET_NODE = 0x5a, | 61 | MLX4_CMD_SET_NODE = 0x5a, |
62 | MLX4_CMD_QUERY_FUNC = 0x56, | ||
62 | MLX4_CMD_ACCESS_DDR = 0x2e, | 63 | MLX4_CMD_ACCESS_DDR = 0x2e, |
63 | MLX4_CMD_MAP_ICM = 0xffa, | 64 | MLX4_CMD_MAP_ICM = 0xffa, |
64 | MLX4_CMD_UNMAP_ICM = 0xff9, | 65 | MLX4_CMD_UNMAP_ICM = 0xff9, |
65 | MLX4_CMD_MAP_ICM_AUX = 0xffc, | 66 | MLX4_CMD_MAP_ICM_AUX = 0xffc, |
66 | MLX4_CMD_UNMAP_ICM_AUX = 0xffb, | 67 | MLX4_CMD_UNMAP_ICM_AUX = 0xffb, |
67 | MLX4_CMD_SET_ICM_SIZE = 0xffd, | 68 | MLX4_CMD_SET_ICM_SIZE = 0xffd, |
69 | /*master notify fw on finish for slave's flr*/ | ||
70 | MLX4_CMD_INFORM_FLR_DONE = 0x5b, | ||
68 | 71 | ||
69 | /* TPT commands */ | 72 | /* TPT commands */ |
70 | MLX4_CMD_SW2HW_MPT = 0xd, | 73 | MLX4_CMD_SW2HW_MPT = 0xd, |
@@ -119,6 +122,26 @@ enum { | |||
119 | /* miscellaneous commands */ | 122 | /* miscellaneous commands */ |
120 | MLX4_CMD_DIAG_RPRT = 0x30, | 123 | MLX4_CMD_DIAG_RPRT = 0x30, |
121 | MLX4_CMD_NOP = 0x31, | 124 | MLX4_CMD_NOP = 0x31, |
125 | MLX4_CMD_ACCESS_MEM = 0x2e, | ||
126 | MLX4_CMD_SET_VEP = 0x52, | ||
127 | |||
128 | /* Ethernet specific commands */ | ||
129 | MLX4_CMD_SET_VLAN_FLTR = 0x47, | ||
130 | MLX4_CMD_SET_MCAST_FLTR = 0x48, | ||
131 | MLX4_CMD_DUMP_ETH_STATS = 0x49, | ||
132 | |||
133 | /* Communication channel commands */ | ||
134 | MLX4_CMD_ARM_COMM_CHANNEL = 0x57, | ||
135 | MLX4_CMD_GEN_EQE = 0x58, | ||
136 | |||
137 | /* virtual commands */ | ||
138 | MLX4_CMD_ALLOC_RES = 0xf00, | ||
139 | MLX4_CMD_FREE_RES = 0xf01, | ||
140 | MLX4_CMD_MCAST_ATTACH = 0xf05, | ||
141 | MLX4_CMD_UCAST_ATTACH = 0xf06, | ||
142 | MLX4_CMD_PROMISC = 0xf08, | ||
143 | MLX4_CMD_QUERY_FUNC_CAP = 0xf0a, | ||
144 | MLX4_CMD_QP_ATTACH = 0xf0b, | ||
122 | 145 | ||
123 | /* debug commands */ | 146 | /* debug commands */ |
124 | MLX4_CMD_QUERY_DEBUG_MSG = 0x2a, | 147 | MLX4_CMD_QUERY_DEBUG_MSG = 0x2a, |
@@ -126,6 +149,7 @@ enum { | |||
126 | 149 | ||
127 | /* statistics commands */ | 150 | /* statistics commands */ |
128 | MLX4_CMD_QUERY_IF_STAT = 0X54, | 151 | MLX4_CMD_QUERY_IF_STAT = 0X54, |
152 | MLX4_CMD_SET_IF_STAT = 0X55, | ||
129 | }; | 153 | }; |
130 | 154 | ||
131 | enum { | 155 | enum { |
@@ -135,7 +159,8 @@ enum { | |||
135 | }; | 159 | }; |
136 | 160 | ||
137 | enum { | 161 | enum { |
138 | MLX4_MAILBOX_SIZE = 4096 | 162 | MLX4_MAILBOX_SIZE = 4096, |
163 | MLX4_ACCESS_MEM_ALIGN = 256, | ||
139 | }; | 164 | }; |
140 | 165 | ||
141 | enum { | 166 | enum { |
@@ -192,4 +217,6 @@ static inline int mlx4_cmd_imm(struct mlx4_dev *dev, u64 in_param, u64 *out_para | |||
192 | struct mlx4_cmd_mailbox *mlx4_alloc_cmd_mailbox(struct mlx4_dev *dev); | 217 | struct mlx4_cmd_mailbox *mlx4_alloc_cmd_mailbox(struct mlx4_dev *dev); |
193 | void mlx4_free_cmd_mailbox(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox); | 218 | void mlx4_free_cmd_mailbox(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox); |
194 | 219 | ||
220 | u32 mlx4_comm_get_version(void); | ||
221 | |||
195 | #endif /* MLX4_CMD_H */ | 222 | #endif /* MLX4_CMD_H */ |
diff --git a/include/linux/mlx4/device.h b/include/linux/mlx4/device.h index ca2c39771c38..b9466af2348f 100644 --- a/include/linux/mlx4/device.h +++ b/include/linux/mlx4/device.h | |||
@@ -47,6 +47,9 @@ | |||
47 | enum { | 47 | enum { |
48 | MLX4_FLAG_MSI_X = 1 << 0, | 48 | MLX4_FLAG_MSI_X = 1 << 0, |
49 | MLX4_FLAG_OLD_PORT_CMDS = 1 << 1, | 49 | MLX4_FLAG_OLD_PORT_CMDS = 1 << 1, |
50 | MLX4_FLAG_MASTER = 1 << 2, | ||
51 | MLX4_FLAG_SLAVE = 1 << 3, | ||
52 | MLX4_FLAG_SRIOV = 1 << 4, | ||
50 | }; | 53 | }; |
51 | 54 | ||
52 | enum { | 55 | enum { |
@@ -58,6 +61,15 @@ enum { | |||
58 | }; | 61 | }; |
59 | 62 | ||
60 | enum { | 63 | enum { |
64 | MLX4_MAX_NUM_PF = 16, | ||
65 | MLX4_MAX_NUM_VF = 64, | ||
66 | MLX4_MFUNC_MAX = 80, | ||
67 | MLX4_MFUNC_EQ_NUM = 4, | ||
68 | MLX4_MFUNC_MAX_EQES = 8, | ||
69 | MLX4_MFUNC_EQE_MASK = (MLX4_MFUNC_MAX_EQES - 1) | ||
70 | }; | ||
71 | |||
72 | enum { | ||
61 | MLX4_DEV_CAP_FLAG_RC = 1LL << 0, | 73 | MLX4_DEV_CAP_FLAG_RC = 1LL << 0, |
62 | MLX4_DEV_CAP_FLAG_UC = 1LL << 1, | 74 | MLX4_DEV_CAP_FLAG_UC = 1LL << 1, |
63 | MLX4_DEV_CAP_FLAG_UD = 1LL << 2, | 75 | MLX4_DEV_CAP_FLAG_UD = 1LL << 2, |
@@ -117,7 +129,11 @@ enum mlx4_event { | |||
117 | MLX4_EVENT_TYPE_PORT_CHANGE = 0x09, | 129 | MLX4_EVENT_TYPE_PORT_CHANGE = 0x09, |
118 | MLX4_EVENT_TYPE_EQ_OVERFLOW = 0x0f, | 130 | MLX4_EVENT_TYPE_EQ_OVERFLOW = 0x0f, |
119 | MLX4_EVENT_TYPE_ECC_DETECT = 0x0e, | 131 | MLX4_EVENT_TYPE_ECC_DETECT = 0x0e, |
120 | MLX4_EVENT_TYPE_CMD = 0x0a | 132 | MLX4_EVENT_TYPE_CMD = 0x0a, |
133 | MLX4_EVENT_TYPE_VEP_UPDATE = 0x19, | ||
134 | MLX4_EVENT_TYPE_COMM_CHANNEL = 0x18, | ||
135 | MLX4_EVENT_TYPE_FLR_EVENT = 0x1c, | ||
136 | MLX4_EVENT_TYPE_NONE = 0xff, | ||
121 | }; | 137 | }; |
122 | 138 | ||
123 | enum { | 139 | enum { |
@@ -184,6 +200,7 @@ enum mlx4_qp_region { | |||
184 | }; | 200 | }; |
185 | 201 | ||
186 | enum mlx4_port_type { | 202 | enum mlx4_port_type { |
203 | MLX4_PORT_TYPE_NONE = 0, | ||
187 | MLX4_PORT_TYPE_IB = 1, | 204 | MLX4_PORT_TYPE_IB = 1, |
188 | MLX4_PORT_TYPE_ETH = 2, | 205 | MLX4_PORT_TYPE_ETH = 2, |
189 | MLX4_PORT_TYPE_AUTO = 3 | 206 | MLX4_PORT_TYPE_AUTO = 3 |
@@ -216,6 +233,7 @@ static inline u64 mlx4_fw_ver(u64 major, u64 minor, u64 subminor) | |||
216 | 233 | ||
217 | struct mlx4_caps { | 234 | struct mlx4_caps { |
218 | u64 fw_ver; | 235 | u64 fw_ver; |
236 | u32 function; | ||
219 | int num_ports; | 237 | int num_ports; |
220 | int vl_cap[MLX4_MAX_PORTS + 1]; | 238 | int vl_cap[MLX4_MAX_PORTS + 1]; |
221 | int ib_mtu_cap[MLX4_MAX_PORTS + 1]; | 239 | int ib_mtu_cap[MLX4_MAX_PORTS + 1]; |
@@ -466,6 +484,7 @@ struct mlx4_counter { | |||
466 | struct mlx4_dev { | 484 | struct mlx4_dev { |
467 | struct pci_dev *pdev; | 485 | struct pci_dev *pdev; |
468 | unsigned long flags; | 486 | unsigned long flags; |
487 | unsigned long num_slaves; | ||
469 | struct mlx4_caps caps; | 488 | struct mlx4_caps caps; |
470 | struct radix_tree_root qp_table_tree; | 489 | struct radix_tree_root qp_table_tree; |
471 | u8 rev_id; | 490 | u8 rev_id; |
@@ -494,8 +513,27 @@ struct mlx4_init_port_param { | |||
494 | #define mlx4_foreach_ib_transport_port(port, dev) \ | 513 | #define mlx4_foreach_ib_transport_port(port, dev) \ |
495 | for ((port) = 1; (port) <= (dev)->caps.num_ports; (port)++) \ | 514 | for ((port) = 1; (port) <= (dev)->caps.num_ports; (port)++) \ |
496 | if (((dev)->caps.port_mask & 1 << ((port) - 1)) || \ | 515 | if (((dev)->caps.port_mask & 1 << ((port) - 1)) || \ |
497 | ((dev)->caps.flags & MLX4_DEV_CAP_FLAG_IBOE)) | 516 | ((dev)->caps.flags & MLX4_DEV_CAP_FLAG_IBOE)) |
517 | |||
518 | static inline int mlx4_is_master(struct mlx4_dev *dev) | ||
519 | { | ||
520 | return dev->flags & MLX4_FLAG_MASTER; | ||
521 | } | ||
522 | |||
523 | static inline int mlx4_is_qp_reserved(struct mlx4_dev *dev, u32 qpn) | ||
524 | { | ||
525 | return (qpn < dev->caps.sqp_start + 8); | ||
526 | } | ||
498 | 527 | ||
528 | static inline int mlx4_is_mfunc(struct mlx4_dev *dev) | ||
529 | { | ||
530 | return dev->flags & (MLX4_FLAG_SLAVE | MLX4_FLAG_MASTER); | ||
531 | } | ||
532 | |||
533 | static inline int mlx4_is_slave(struct mlx4_dev *dev) | ||
534 | { | ||
535 | return dev->flags & MLX4_FLAG_SLAVE; | ||
536 | } | ||
499 | 537 | ||
500 | int mlx4_buf_alloc(struct mlx4_dev *dev, int size, int max_direct, | 538 | int mlx4_buf_alloc(struct mlx4_dev *dev, int size, int max_direct, |
501 | struct mlx4_buf *buf); | 539 | struct mlx4_buf *buf); |