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authorPaul Mundt <lethal@linux-sh.org>2012-06-19 23:37:50 -0400
committerPaul Mundt <lethal@linux-sh.org>2012-06-19 23:37:50 -0400
commite1eaf354528ceb002c8e2840a55c44cd76aaaed8 (patch)
tree714f5410ceb924fe7b7447d7a4af58d5433c6a48 /include
parent0412ddc82223ea2bb3a9db21355e5fe0862a97e5 (diff)
parent609d7558f232e583a31951c65a6ee43d81c65720 (diff)
Merge branch 'sh/clkfwk' into sh-latest
Diffstat (limited to 'include')
-rw-r--r--include/linux/sh_clk.h21
1 files changed, 17 insertions, 4 deletions
diff --git a/include/linux/sh_clk.h b/include/linux/sh_clk.h
index c513b73cd7cb..50910913b268 100644
--- a/include/linux/sh_clk.h
+++ b/include/linux/sh_clk.h
@@ -18,7 +18,6 @@ struct clk_mapping {
18 struct kref ref; 18 struct kref ref;
19}; 19};
20 20
21
22struct sh_clk_ops { 21struct sh_clk_ops {
23#ifdef CONFIG_SH_CLK_CPG_LEGACY 22#ifdef CONFIG_SH_CLK_CPG_LEGACY
24 void (*init)(struct clk *clk); 23 void (*init)(struct clk *clk);
@@ -31,6 +30,10 @@ struct sh_clk_ops {
31 long (*round_rate)(struct clk *clk, unsigned long rate); 30 long (*round_rate)(struct clk *clk, unsigned long rate);
32}; 31};
33 32
33#define SH_CLK_DIV_MSK(div) ((1 << (div)) - 1)
34#define SH_CLK_DIV4_MSK SH_CLK_DIV_MSK(4)
35#define SH_CLK_DIV6_MSK SH_CLK_DIV_MSK(6)
36
34struct clk { 37struct clk {
35 struct list_head node; 38 struct list_head node;
36 struct clk *parent; 39 struct clk *parent;
@@ -52,6 +55,7 @@ struct clk {
52 unsigned int enable_bit; 55 unsigned int enable_bit;
53 void __iomem *mapped_reg; 56 void __iomem *mapped_reg;
54 57
58 unsigned int div_mask;
55 unsigned long arch_flags; 59 unsigned long arch_flags;
56 void *priv; 60 void *priv;
57 struct clk_mapping *mapping; 61 struct clk_mapping *mapping;
@@ -65,6 +69,8 @@ struct clk {
65#define CLK_ENABLE_REG_16BIT BIT(2) 69#define CLK_ENABLE_REG_16BIT BIT(2)
66#define CLK_ENABLE_REG_8BIT BIT(3) 70#define CLK_ENABLE_REG_8BIT BIT(3)
67 71
72#define CLK_MASK_DIV_ON_DISABLE BIT(4)
73
68#define CLK_ENABLE_REG_MASK (CLK_ENABLE_REG_32BIT | \ 74#define CLK_ENABLE_REG_MASK (CLK_ENABLE_REG_32BIT | \
69 CLK_ENABLE_REG_16BIT | \ 75 CLK_ENABLE_REG_16BIT | \
70 CLK_ENABLE_REG_8BIT) 76 CLK_ENABLE_REG_8BIT)
@@ -146,14 +152,17 @@ static inline int __deprecated sh_clk_mstp32_register(struct clk *clks, int nr)
146 .enable_reg = (void __iomem *)_reg, \ 152 .enable_reg = (void __iomem *)_reg, \
147 .enable_bit = _shift, \ 153 .enable_bit = _shift, \
148 .arch_flags = _div_bitmap, \ 154 .arch_flags = _div_bitmap, \
155 .div_mask = SH_CLK_DIV4_MSK, \
149 .flags = _flags, \ 156 .flags = _flags, \
150} 157}
151 158
152struct clk_div4_table { 159struct clk_div_table {
153 struct clk_div_mult_table *div_mult_table; 160 struct clk_div_mult_table *div_mult_table;
154 void (*kick)(struct clk *clk); 161 void (*kick)(struct clk *clk);
155}; 162};
156 163
164#define clk_div4_table clk_div_table
165
157int sh_clk_div4_register(struct clk *clks, int nr, 166int sh_clk_div4_register(struct clk *clks, int nr,
158 struct clk_div4_table *table); 167 struct clk_div4_table *table);
159int sh_clk_div4_enable_register(struct clk *clks, int nr, 168int sh_clk_div4_enable_register(struct clk *clks, int nr,
@@ -165,7 +174,9 @@ int sh_clk_div4_reparent_register(struct clk *clks, int nr,
165 _num_parents, _src_shift, _src_width) \ 174 _num_parents, _src_shift, _src_width) \
166{ \ 175{ \
167 .enable_reg = (void __iomem *)_reg, \ 176 .enable_reg = (void __iomem *)_reg, \
168 .flags = _flags, \ 177 .enable_bit = 0, /* unused */ \
178 .flags = _flags | CLK_MASK_DIV_ON_DISABLE, \
179 .div_mask = SH_CLK_DIV6_MSK, \
169 .parent_table = _parents, \ 180 .parent_table = _parents, \
170 .parent_num = _num_parents, \ 181 .parent_num = _num_parents, \
171 .src_shift = _src_shift, \ 182 .src_shift = _src_shift, \
@@ -176,7 +187,9 @@ int sh_clk_div4_reparent_register(struct clk *clks, int nr,
176{ \ 187{ \
177 .parent = _parent, \ 188 .parent = _parent, \
178 .enable_reg = (void __iomem *)_reg, \ 189 .enable_reg = (void __iomem *)_reg, \
179 .flags = _flags, \ 190 .enable_bit = 0, /* unused */ \
191 .div_mask = SH_CLK_DIV6_MSK, \
192 .flags = _flags | CLK_MASK_DIV_ON_DISABLE, \
180} 193}
181 194
182int sh_clk_div6_register(struct clk *clks, int nr); 195int sh_clk_div6_register(struct clk *clks, int nr);